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-rw-r--r--scripts/src/bus.lua8
-rw-r--r--src/devices/bus/hp_dio/hp98544.cpp262
-rw-r--r--src/devices/bus/hp_dio/hp98544.h82
-rw-r--r--src/devices/bus/hp_dio/hp98603.cpp94
-rw-r--r--src/devices/bus/hp_dio/hp98603a.cpp77
-rw-r--r--src/devices/bus/hp_dio/hp98603a.h (renamed from src/devices/bus/hp_dio/hp98603.h)14
-rw-r--r--src/devices/bus/hp_dio/hp98603b.cpp72
-rw-r--r--src/devices/bus/hp_dio/hp98603b.h38
-rw-r--r--src/devices/bus/isa/areplay.cpp614
-rw-r--r--src/devices/bus/isa/areplay.h102
-rw-r--r--src/devices/bus/isa/isa.cpp5
-rw-r--r--src/devices/bus/isa/isa.h1
-rw-r--r--src/devices/bus/isa/isa_cards.cpp4
-rw-r--r--src/devices/cpu/mcs51/mcs51.cpp6
-rw-r--r--src/mame/drivers/dec8.cpp308
-rw-r--r--src/mame/drivers/docastle.cpp22
-rw-r--r--src/mame/drivers/goldstar.cpp31
-rw-r--r--src/mame/drivers/hp9k_3xx.cpp56
-rw-r--r--src/mame/drivers/vegas.cpp18
-rw-r--r--src/mame/drivers/x68k.cpp2
-rw-r--r--src/mame/includes/dec8.h15
-rw-r--r--src/mame/includes/docastle.h2
-rw-r--r--src/mame/mame.lst1
23 files changed, 1519 insertions, 315 deletions
diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua
index d57cd09c690..5b1cbc1e0e4 100644
--- a/scripts/src/bus.lua
+++ b/scripts/src/bus.lua
@@ -836,8 +836,10 @@ if (BUSES["HPDIO"]~=null) then
MAME_DIR .. "src/devices/bus/hp_dio/hp_dio.h",
MAME_DIR .. "src/devices/bus/hp_dio/hp98544.cpp",
MAME_DIR .. "src/devices/bus/hp_dio/hp98544.h",
- MAME_DIR .. "src/devices/bus/hp_dio/hp98603.cpp",
- MAME_DIR .. "src/devices/bus/hp_dio/hp98603.h",
+ MAME_DIR .. "src/devices/bus/hp_dio/hp98603a.cpp",
+ MAME_DIR .. "src/devices/bus/hp_dio/hp98603a.h",
+ MAME_DIR .. "src/devices/bus/hp_dio/hp98603b.cpp",
+ MAME_DIR .. "src/devices/bus/hp_dio/hp98603b.h",
MAME_DIR .. "src/devices/bus/hp_dio/hp98644.cpp",
MAME_DIR .. "src/devices/bus/hp_dio/hp98644.h",
}
@@ -1134,6 +1136,8 @@ if (BUSES["ISA"]~=null) then
MAME_DIR .. "src/devices/bus/isa/myb3k_fdc.h",
MAME_DIR .. "src/devices/bus/isa/eis_sad8852.cpp",
MAME_DIR .. "src/devices/bus/isa/eis_sad8852.h",
+ MAME_DIR .. "src/devices/bus/isa/areplay.cpp",
+ MAME_DIR .. "src/devices/bus/isa/areplay.h",
}
end
diff --git a/src/devices/bus/hp_dio/hp98544.cpp b/src/devices/bus/hp_dio/hp98544.cpp
index 96b464a9f86..c0b2b8177b7 100644
--- a/src/devices/bus/hp_dio/hp98544.cpp
+++ b/src/devices/bus/hp_dio/hp98544.cpp
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:R. Belmont
+// copyright-holders:R. Belmont, Sven Schnelle
/***************************************************************************
HP98544 high-resolution monochrome board
@@ -85,6 +85,10 @@ void dio16_98544_device::device_start()
write16_delegate(FUNC(dio16_98544_device::vram_w), this));
m_dio->install_memory(0x560000, 0x563fff, read16_delegate(FUNC(dio16_98544_device::rom_r), this),
write16_delegate(FUNC(dio16_98544_device::rom_w), this));
+ m_dio->install_memory(0x564000, 0x567fff, read16_delegate(FUNC(dio16_98544_device::ctrl_r), this),
+ write16_delegate(FUNC(dio16_98544_device::ctrl_w), this));
+ m_cursor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dio16_98544_device::cursor_callback),this));
+ m_cursor_timer->adjust(attotime::from_hz(3));
}
//-------------------------------------------------
@@ -97,6 +101,34 @@ void dio16_98544_device::device_reset()
m_palette[1] = rgb_t(255, 255, 255);
m_palette[0] = rgb_t(0, 0, 0);
+ m_pixel_replacement_rule = TOPCAT_REPLACE_RULE_SRC;
+}
+
+TIMER_CALLBACK_MEMBER(dio16_98544_device::cursor_callback)
+{
+ m_cursor_timer->adjust(attotime::from_hz(5));
+ m_cursor_state ^= true;
+
+ if (m_cursor_ctrl & 0x02) {
+ for(int i = 0; i < m_cursor_width; i++) {
+ m_vram[(m_cursor_y_pos * 512) + (m_cursor_x_pos + i)/2] = m_cursor_state ? 0xffff : 0;
+ m_vram[((m_cursor_y_pos-1) * 512) + (m_cursor_x_pos + i)/2] = m_cursor_state ? 0xffff : 0;
+ m_vram[((m_cursor_y_pos-2) * 512) + (m_cursor_x_pos + i)/2] = m_cursor_state ? 0xffff : 0;
+ }
+ }
+}
+
+void dio16_98544_device::update_cursor(int x, int y, uint8_t ctrl, uint8_t width)
+{
+ for(int i = 0; i < m_cursor_width; i++) {
+ m_vram[(m_cursor_y_pos * 512) + (m_cursor_x_pos + i)/2] = 0;
+ m_vram[((m_cursor_y_pos-1) * 512) + (m_cursor_x_pos + i)/2] = 0;
+ m_vram[((m_cursor_y_pos-2) * 512) + (m_cursor_x_pos + i)/2] = 0;
+ }
+ m_cursor_x_pos = x;
+ m_cursor_y_pos = y;
+ m_cursor_ctrl = ctrl;
+ m_cursor_width = width;
}
READ16_MEMBER(dio16_98544_device::vram_r)
@@ -106,6 +138,7 @@ READ16_MEMBER(dio16_98544_device::vram_r)
WRITE16_MEMBER(dio16_98544_device::vram_w)
{
+// execute_rule(data, (replacement_rule_t)m_pixel_replacement_rule, &data);
COMBINE_DATA(&m_vram[offset]);
}
@@ -117,9 +150,234 @@ READ16_MEMBER(dio16_98544_device::rom_r)
// the video chip registers live here, so these writes are valid
WRITE16_MEMBER(dio16_98544_device::rom_w)
{
- printf("rom_w: %02x at %x (mask %04x)\n", data, offset, mem_mask);
}
+void dio16_98544_device::execute_rule(uint16_t src, replacement_rule_t rule, uint16_t *dst)
+{
+ switch(rule & 0x0f) {
+ case TOPCAT_REPLACE_RULE_CLEAR:
+ *dst = 0;
+ break;
+ case TOPCAT_REPLACE_RULE_SRC_AND_DST:
+ *dst &= src;
+ break;
+ case TOPCAT_REPLACE_RULE_SRC_AND_NOT_DST:
+ *dst = ~(*dst) & src;
+ break;
+ case TOPCAT_REPLACE_RULE_SRC:
+ *dst = src;
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_SRC_AND_DST:
+ *dst &= ~src;
+ break;
+ case TOPCAT_REPLACE_RULE_NOP:
+ break;
+ case TOPCAT_REPLACE_RULE_SRC_XOR_DST:
+ *dst ^= src;
+ break;
+ case TOPCAT_REPLACE_RULE_SRC_OR_DST:
+ *dst |= src;
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_SRC_AND_NOT_DST:
+ *dst = ~(*dst) & ~src;
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_SRC_XOR_DST:
+ *dst ^= ~src;
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_DST:
+ *dst ^= 0xffff;
+ break;
+ case TOPCAT_REPLACE_RULE_SRC_OR_NOT_DST:
+ *dst = src | ~(*dst);
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_SRC:
+ *dst = ~src;
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_SRC_OR_DST:
+ *dst = ~src | *dst;
+ break;
+ case TOPCAT_REPLACE_RULE_NOT_SRC_OR_NOT_DST:
+ *dst = ~src | ~(*dst);
+ break;
+ case TOPCAT_REPLACE_RULE_SET:
+ *dst = 0xffff;
+ break;
+
+ }
+}
+
+void dio16_98544_device::window_move(void)
+{
+ for(int line = 0; line < m_block_mover_pixel_height; line++) {
+ for(int column = 0; column < m_block_mover_pixel_width; column++) {
+ uint16_t sdata = m_vram[((m_source_y_pixel + line) * 1024 + (m_source_x_pixel + column))/2];
+ uint16_t *ddata = &m_vram[((m_dst_y_pixel + line) * 1024 + (m_dst_x_pixel + column))/2];
+ execute_rule(sdata, (replacement_rule_t)((m_move_replacement_rule >> 4) & 0x0f), ddata);
+ execute_rule(sdata, (replacement_rule_t)(m_move_replacement_rule & 0x0f), ddata);
+ }
+ }
+}
+
+WRITE16_MEMBER(dio16_98544_device::ctrl_w)
+{
+ if (mem_mask == 0xff00)
+ data >>= 8;
+
+ if (mem_mask == 0x00ff) {
+ logerror("%s: write ignored\n", __FUNCTION__);
+ return;
+ }
+
+ switch(offset) {
+ case TOPCAT_REG_VBLANK:
+ m_vblank = data & 0xff;
+ break;
+ case TOPCAT_REG_WMOVE_ACTIVE:
+ break;
+ case TOPCAT_REG_VERT_RETRACE_INTRQ:
+ m_vert_retrace_intrq = data;
+ break;
+ case TOPCAT_REG_WMOVE_INTRQ:
+ m_wmove_intrq = data;
+ break;
+ case TOPCAT_REG_DISPLAY_PLANE_ENABLE:
+ m_display_enable_planes = data;
+ break;
+ case TOPCAT_REG_DISPLAY_WRITE_ENABLE_PLANE:
+ m_write_enable_plane = data;
+ break;
+ case TOPCAT_REG_DISPLAY_READ_ENABLE_PLANE:
+ m_read_enable_plane = data;
+ break;
+ case TOPCAT_REG_FB_WRITE_ENABLE:
+ m_fb_write_enable = data;
+ break;
+ case TOPCAT_REG_START_WMOVE:
+ window_move();
+ break;
+ case TOPCAT_REG_ENABLE_BLINK_PLANES:
+ logerror("ENABLE_BLINK_PLANES: %04x\n", data);
+ m_enable_blink_planes = data;
+ break;
+ case TOPCAT_REG_ENABLE_ALT_FRAME:
+ logerror("ENABLE_ALT_PLANE: %04x\n", data);
+ m_enable_alt_frame = data;
+ break;
+ case TOPCAT_REG_PIXEL_REPLACE_RULE:
+ logerror("PIXEL RR: data %04X mask %04X\n", data, mem_mask);
+ m_pixel_replacement_rule = data;
+ break;
+ case TOPCAT_REG_MOVE_REPLACE_RULE:
+ logerror("MOVE RR: data %04X mask %04X\n", data, mem_mask);
+ m_move_replacement_rule = data;
+ break;
+ case TOPCAT_REG_SOURCE_X_PIXEL:
+ m_source_x_pixel = data;
+ break;
+ case TOPCAT_REG_SOURCE_Y_PIXEL:
+ m_source_y_pixel = data;
+ break;
+ case TOPCAT_REG_DST_X_PIXEL:
+ m_dst_x_pixel = data;
+ break;
+ case TOPCAT_REG_DST_Y_PIXEL:
+ m_dst_y_pixel = data;
+ break;
+ case TOPCAT_REG_BLOCK_MOVER_PIXEL_WIDTH:
+ m_block_mover_pixel_width = data;
+ break;
+ case TOPCAT_REG_BLOCK_MOVER_PIXEL_HEIGHT:
+ m_block_mover_pixel_height = data;
+ break;
+ case TOPCAT_REG_CURSOR_CNTL:
+ update_cursor(m_cursor_x_pos, m_cursor_y_pos, data, m_cursor_width);
+ break;
+ case TOPCAT_REG_CURSOR_X_POS:
+ update_cursor(data, m_cursor_y_pos, m_cursor_ctrl, m_cursor_width);
+ break;
+ case TOPCAT_REG_CURSOR_Y_POS:
+ update_cursor(m_cursor_x_pos, data, m_cursor_ctrl, m_cursor_width);
+ break;
+ case TOPCAT_REG_CURSOR_WIDTH:
+ update_cursor(m_cursor_x_pos, m_cursor_y_pos, m_cursor_ctrl, data);
+ break;
+ default:
+ logerror("unknown register: %02X = %04x\n", offset, data, mem_mask);
+ break;
+ }
+}
+
+READ16_MEMBER(dio16_98544_device::ctrl_r)
+{
+ uint16_t ret = 0xffff;
+
+ switch(offset) {
+ case TOPCAT_REG_VBLANK:
+ ret = m_vblank;
+ break;
+ case TOPCAT_REG_WMOVE_ACTIVE:
+ ret = m_wmove_active;
+ break;
+ case TOPCAT_REG_VERT_RETRACE_INTRQ:
+ ret = m_vert_retrace_intrq;
+ break;
+ case TOPCAT_REG_WMOVE_INTRQ:
+ ret = m_wmove_intrq;
+ break;
+ case TOPCAT_REG_DISPLAY_PLANE_ENABLE:
+ ret = m_display_enable_planes;
+ break;
+ case TOPCAT_REG_DISPLAY_WRITE_ENABLE_PLANE:
+ ret = m_write_enable_plane;
+ break;
+ case TOPCAT_REG_DISPLAY_READ_ENABLE_PLANE:
+ ret = m_read_enable_plane;
+ break;
+ case TOPCAT_REG_FB_WRITE_ENABLE:
+ ret = m_fb_write_enable;
+ break;
+ case TOPCAT_REG_START_WMOVE:
+ ret = 0;
+ break;
+ case TOPCAT_REG_ENABLE_BLINK_PLANES:
+ ret = m_enable_blink_planes;
+ break;
+ case TOPCAT_REG_ENABLE_ALT_FRAME:
+ ret = m_enable_alt_frame;
+ break;
+ case TOPCAT_REG_CURSOR_CNTL:
+ ret = m_cursor_ctrl;
+ break;
+ case TOPCAT_REG_PIXEL_REPLACE_RULE:
+ ret = m_pixel_replacement_rule;
+ break;
+ case TOPCAT_REG_MOVE_REPLACE_RULE:
+ ret = m_move_replacement_rule;
+ break;
+ case TOPCAT_REG_SOURCE_X_PIXEL:
+ ret = m_source_x_pixel;
+ break;
+ case TOPCAT_REG_SOURCE_Y_PIXEL:
+ ret = m_source_y_pixel;
+ break;
+ case TOPCAT_REG_DST_X_PIXEL:
+ ret = m_dst_x_pixel;
+ break;
+ case TOPCAT_REG_DST_Y_PIXEL:
+ ret = m_dst_y_pixel;
+ break;
+ case TOPCAT_REG_BLOCK_MOVER_PIXEL_WIDTH:
+ ret = m_block_mover_pixel_width;
+ break;
+ case TOPCAT_REG_BLOCK_MOVER_PIXEL_HEIGHT:
+ ret = m_block_mover_pixel_height;
+ break;
+ default:
+ logerror("unknown register read %02x\n", offset);
+ break;
+ }
+ return ret;
+}
uint32_t dio16_98544_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
uint32_t *scanline;
diff --git a/src/devices/bus/hp_dio/hp98544.h b/src/devices/bus/hp_dio/hp98544.h
index 499d305573b..730f375d988 100644
--- a/src/devices/bus/hp_dio/hp98544.h
+++ b/src/devices/bus/hp_dio/hp98544.h
@@ -26,8 +26,12 @@ public:
DECLARE_WRITE16_MEMBER(vram_w);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
+ DECLARE_READ16_MEMBER(ctrl_r);
+ DECLARE_WRITE16_MEMBER(ctrl_w);
-protected:
+ TIMER_CALLBACK_MEMBER(cursor_callback);
+
+ protected:
dio16_98544_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
@@ -38,12 +42,86 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual const tiny_rom_entry *device_rom_region() const override;
+ typedef enum {
+ TOPCAT_REPLACE_RULE_CLEAR, /* 0 */
+ TOPCAT_REPLACE_RULE_SRC_AND_DST,
+ TOPCAT_REPLACE_RULE_SRC_AND_NOT_DST,
+ TOPCAT_REPLACE_RULE_SRC,
+ TOPCAT_REPLACE_RULE_NOT_SRC_AND_DST,
+ TOPCAT_REPLACE_RULE_NOP,
+ TOPCAT_REPLACE_RULE_SRC_XOR_DST,
+ TOPCAT_REPLACE_RULE_SRC_OR_DST,
+ TOPCAT_REPLACE_RULE_NOT_SRC_AND_NOT_DST,
+ TOPCAT_REPLACE_RULE_NOT_SRC_XOR_DST,
+ TOPCAT_REPLACE_RULE_NOT_DST,
+ TOPCAT_REPLACE_RULE_SRC_OR_NOT_DST,
+ TOPCAT_REPLACE_RULE_NOT_SRC,
+ TOPCAT_REPLACE_RULE_NOT_SRC_OR_DST,
+ TOPCAT_REPLACE_RULE_NOT_SRC_OR_NOT_DST,
+ TOPCAT_REPLACE_RULE_SET,
+ } replacement_rule_t;
+
private:
- uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ enum topcat_reg {
+ TOPCAT_REG_VBLANK=0x20,
+ TOPCAT_REG_WMOVE_ACTIVE=0x22,
+ TOPCAT_REG_VERT_RETRACE_INTRQ=0x24,
+ TOPCAT_REG_WMOVE_INTRQ=0x26,
+ TOPCAT_REG_DISPLAY_PLANE_ENABLE=0x40,
+ TOPCAT_REG_DISPLAY_WRITE_ENABLE_PLANE=0x44,
+ TOPCAT_REG_DISPLAY_READ_ENABLE_PLANE=0x46,
+ TOPCAT_REG_FB_WRITE_ENABLE=0x48,
+ TOPCAT_REG_START_WMOVE=0x4e,
+ TOPCAT_REG_ENABLE_BLINK_PLANES=0x50,
+ TOPCAT_REG_ENABLE_ALT_FRAME=0x54,
+ TOPCAT_REG_CURSOR_CNTL=0x56,
+ TOPCAT_REG_PIXEL_REPLACE_RULE=0x75,
+ TOPCAT_REG_MOVE_REPLACE_RULE=0x77,
+ TOPCAT_REG_SOURCE_X_PIXEL=0x79,
+ TOPCAT_REG_SOURCE_Y_PIXEL=0x7b,
+ TOPCAT_REG_DST_X_PIXEL=0x7d,
+ TOPCAT_REG_DST_Y_PIXEL=0x7f,
+ TOPCAT_REG_BLOCK_MOVER_PIXEL_WIDTH=0x81,
+ TOPCAT_REG_BLOCK_MOVER_PIXEL_HEIGHT=0x83,
+ TOPCAT_REG_CURSOR_X_POS=0x85,
+ TOPCAT_REG_CURSOR_Y_POS=0x87,
+ TOPCAT_REG_CURSOR_WIDTH=0x89,
+ };
+
+ void window_move(void);
+ void execute_rule(uint16_t src, replacement_rule_t rule, uint16_t *dst);
+ uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ void update_cursor(int x, int y, uint8_t ctrl, uint8_t width);
std::vector<uint16_t> m_vram;
uint32_t m_palette[2];
uint8_t *m_rom;
+
+ uint8_t m_vblank;
+ uint8_t m_wmove_active;
+ uint8_t m_vert_retrace_intrq;
+ uint8_t m_wmove_intrq;
+ uint8_t m_display_enable_planes;
+ uint8_t m_write_enable_plane;
+ uint8_t m_read_enable_plane;
+ uint8_t m_fb_write_enable;
+ uint8_t m_enable_blink_planes;
+ uint8_t m_enable_alt_frame;
+ uint8_t m_cursor_ctrl;
+ uint8_t m_move_replacement_rule;
+ uint8_t m_pixel_replacement_rule;
+ uint16_t m_source_x_pixel;
+ uint16_t m_source_y_pixel;
+ uint16_t m_dst_x_pixel;
+ uint16_t m_dst_y_pixel;
+ uint16_t m_block_mover_pixel_width;
+ uint16_t m_block_mover_pixel_height;
+
+ emu_timer *m_cursor_timer;
+ bool m_cursor_state;
+ uint16_t m_cursor_x_pos;
+ uint16_t m_cursor_y_pos;
+ uint16_t m_cursor_width;
};
// device type definition
diff --git a/src/devices/bus/hp_dio/hp98603.cpp b/src/devices/bus/hp_dio/hp98603.cpp
deleted file mode 100644
index a9b9718d7d4..00000000000
--- a/src/devices/bus/hp_dio/hp98603.cpp
+++ /dev/null
@@ -1,94 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Sven Schnelle
-/***************************************************************************
-
- HP98603 BASIC ROM card
-
-***************************************************************************/
-
-#include "emu.h"
-#include "hp98603.h"
-
-DEFINE_DEVICE_TYPE(HPDIO_98603, dio16_98603_device, "dio98603", "HP98603 BASIC ROM card")
-
-#define HP98603_ROM_REGION "98603_rom"
-
-ROM_START(hp98603)
- ROM_REGION(0x100000, HP98603_ROM_REGION, 0)
-
- ROM_SYSTEM_BIOS(0, "basic4", "BASIC 4.0")
- ROMX_LOAD("98603_80001.bin", 0x00001, 32768, CRC(5d8c9657) SHA1(f5d89e7f8a61072f362532d1b5e05f5b5e3f42b3), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80002.bin", 0x10001, 32768, CRC(7e4e0ca8) SHA1(3230c7825f5058a1e1a06776da6064b049417b50), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80003.bin", 0x20001, 32768, CRC(b5da5f81) SHA1(69578ee197531e9474a0edb4c2f068b20118d25f), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80004.bin", 0x30001, 32768, CRC(ea050835) SHA1(3be7c1bd394b11fdfee38ebf40beb9352f38722d), ROM_SKIP(1) | ROM_BIOS(1))
-
- ROMX_LOAD("98603_80005.bin", 0x00000, 32768, CRC(1380d489) SHA1(e346857d9df9a06269f9fa57684fbe64edd0134b), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80006.bin", 0x10000, 32768, CRC(19752031) SHA1(5e28ee9d527b297a8898dde50ab6e41bbc0c2572), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80007.bin", 0x20000, 32768, CRC(72aa2225) SHA1(3c92cdd40adc7438d30b95eae14e4497b7e14f38), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80008.bin", 0x30000, 32768, CRC(f617ae2e) SHA1(f59b63058e7e87eabc5dc5233895bb57579eb3f7), ROM_SKIP(1) | ROM_BIOS(1))
-
- ROMX_LOAD("98603_80009.bin", 0x40001, 32768, CRC(9c128571) SHA1(7827cfbf710d8bba3ce9b42ec3368b17a5b5ff78), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80010.bin", 0x50001, 32768, CRC(12528317) SHA1(e11d6c40334c41be68e2717d816e0895f8f7afa8), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80011.bin", 0x60001, 32768, CRC(1d279451) SHA1(2ce966b8499d2d810056d147f71ba2b6cc909bc6), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80012.bin", 0x70001, 32768, CRC(a1d6374e) SHA1(ca860b762503a05a4bfbd17a77bef28d01d7d279), ROM_SKIP(1) | ROM_BIOS(1))
-
- ROMX_LOAD("98603_80013.bin", 0x40000, 32768, CRC(e554d97e) SHA1(c792c4f0097bed032ca31c88fde660d4db25b3dc), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80014.bin", 0x50000, 32768, CRC(c0db7e02) SHA1(add3e7312ac07e5ed4281aae2d46e1a4389d6ea2), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80015.bin", 0x60000, 32768, CRC(f85bb699) SHA1(bd7f690e3b4fb8952517b0acd6ac878cd50f5736), ROM_SKIP(1) | ROM_BIOS(1))
- ROMX_LOAD("98603_80016.bin", 0x70000, 32768, CRC(d887acab) SHA1(a9cbbaa5f053f374d6cbda614b727df35a61ace1), ROM_SKIP(1) | ROM_BIOS(1))
-
- ROM_SYSTEM_BIOS(1, "basic51", "BASIC 5.1")
- ROMX_LOAD("u1.bin", 0x00000, 65536, CRC(ba50d9e0) SHA1(064e3cbbc7ee01f279a289684616ae3b8744a7c9), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u2.bin", 0x20000, 65536, CRC(65f58d3e) SHA1(8367cecb46fa6f9abe9e78b42c25ce8699d5d3f3), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u3.bin", 0x40000, 65536, CRC(9bc70573) SHA1(b7e375e11f6758d59d32236fc1c42eafc892d247), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u4.bin", 0x60000, 65536, CRC(52debeba) SHA1(996e83e604501979fd80ae47ff1cda9890613982), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u5.bin", 0x80000, 65536, CRC(93b4bce8) SHA1(77efec9a95b9e543e1cdb00196d1794ca0c8b4ba), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u6.bin", 0xa0000, 65536, CRC(bda3d054) SHA1(c83d6f571ce5aa63ad3954ac02ff4069c01a1464), ROM_SKIP(1) | ROM_BIOS(2))
-
- ROMX_LOAD("u9.bin", 0x00001, 65536, CRC(009e9fcb) SHA1(520f583a826516f7d676391daf31ed035162c263), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u10.bin", 0x20001, 65536, CRC(84f90a1d) SHA1(9358aa7fa83ed9617d318936cbab79002853b0ce), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u11.bin", 0x40001, 65536, CRC(e486e0f3) SHA1(66b5dd6c2c277156ad6c3ee5b99c34e243d897be), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u12.bin", 0x60001, 65536, CRC(d5a08c7b) SHA1(be997cf9bbdb8fdd6c7e95754747016293c51c7f), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u13.bin", 0x80001, 65536, CRC(9811c34c) SHA1(1655cac651889950b881e6be72f035c7de0a1aed), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD("u14.bin", 0xa0001, 65536, CRC(96527d4e) SHA1(6706ab97eab4465ea4fa2d6b07e8107468e83818), ROM_SKIP(1) | ROM_BIOS(2))
-ROM_END
-
-MACHINE_CONFIG_START(dio16_98603_device::device_add_mconfig)
-MACHINE_CONFIG_END
-
-const tiny_rom_entry *dio16_98603_device::device_rom_region() const
-{
- return ROM_NAME(hp98603);
-}
-
-dio16_98603_device::dio16_98603_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- dio16_98603_device(mconfig, HPDIO_98603, tag, owner, clock)
-{
-}
-
-dio16_98603_device::dio16_98603_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- device_t(mconfig, type, tag, owner, clock),
- device_dio16_card_interface(mconfig, *this)
-{
-}
-
-void dio16_98603_device::device_start()
-{
- set_dio_device();
-}
-
-void dio16_98603_device::device_reset()
-{
- m_rom = device().machine().root_device().memregion(this->subtag(HP98603_ROM_REGION).c_str())->base();
- m_dio->install_memory(0x100000, 0x1fffff, read16_delegate(FUNC(dio16_98603_device::rom_r), this),
- write16_delegate(FUNC(dio16_98603_device::rom_w), this));
-}
-
-READ16_MEMBER(dio16_98603_device::rom_r)
-{
- return m_rom[offset*2] | (m_rom[offset*2+1] << 8);
-}
-
-WRITE16_MEMBER(dio16_98603_device::rom_w)
-{
-}
diff --git a/src/devices/bus/hp_dio/hp98603a.cpp b/src/devices/bus/hp_dio/hp98603a.cpp
new file mode 100644
index 00000000000..c49f5e99dd6
--- /dev/null
+++ b/src/devices/bus/hp_dio/hp98603a.cpp
@@ -0,0 +1,77 @@
+// license:BSD-3-Clause
+// copyright-holders:Sven Schnelle
+/***************************************************************************
+
+ HP98603A BASIC ROM card
+
+***************************************************************************/
+
+#include "emu.h"
+#include "hp98603a.h"
+
+DEFINE_DEVICE_TYPE(HPDIO_98603A, dio16_98603a_device, "dio98603a", "HP98603A BASIC 4.0 ROM card")
+
+#define HP98603A_ROM_REGION "98603a_rom"
+
+ROM_START(hp98603a)
+ ROM_REGION(0x80000, HP98603A_ROM_REGION, 0)
+ ROM_LOAD16_BYTE("98603_80001.bin", 0x00001, 32768, CRC(5d8c9657) SHA1(f5d89e7f8a61072f362532d1b5e05f5b5e3f42b3))
+ ROM_LOAD16_BYTE("98603_80002.bin", 0x10001, 32768, CRC(7e4e0ca8) SHA1(3230c7825f5058a1e1a06776da6064b049417b50))
+ ROM_LOAD16_BYTE("98603_80003.bin", 0x20001, 32768, CRC(b5da5f81) SHA1(69578ee197531e9474a0edb4c2f068b20118d25f))
+ ROM_LOAD16_BYTE("98603_80004.bin", 0x30001, 32768, CRC(ea050835) SHA1(3be7c1bd394b11fdfee38ebf40beb9352f38722d))
+
+ ROM_LOAD16_BYTE("98603_80005.bin", 0x00000, 32768, CRC(1380d489) SHA1(e346857d9df9a06269f9fa57684fbe64edd0134b))
+ ROM_LOAD16_BYTE("98603_80006.bin", 0x10000, 32768, CRC(19752031) SHA1(5e28ee9d527b297a8898dde50ab6e41bbc0c2572))
+ ROM_LOAD16_BYTE("98603_80007.bin", 0x20000, 32768, CRC(72aa2225) SHA1(3c92cdd40adc7438d30b95eae14e4497b7e14f38))
+ ROM_LOAD16_BYTE("98603_80008.bin", 0x30000, 32768, CRC(f617ae2e) SHA1(f59b63058e7e87eabc5dc5233895bb57579eb3f7))
+
+ ROM_LOAD16_BYTE("98603_80009.bin", 0x40001, 32768, CRC(9c128571) SHA1(7827cfbf710d8bba3ce9b42ec3368b17a5b5ff78))
+ ROM_LOAD16_BYTE("98603_80010.bin", 0x50001, 32768, CRC(12528317) SHA1(e11d6c40334c41be68e2717d816e0895f8f7afa8))
+ ROM_LOAD16_BYTE("98603_80011.bin", 0x60001, 32768, CRC(1d279451) SHA1(2ce966b8499d2d810056d147f71ba2b6cc909bc6))
+ ROM_LOAD16_BYTE("98603_80012.bin", 0x70001, 32768, CRC(a1d6374e) SHA1(ca860b762503a05a4bfbd17a77bef28d01d7d279))
+
+ ROM_LOAD16_BYTE("98603_80013.bin", 0x40000, 32768, CRC(e554d97e) SHA1(c792c4f0097bed032ca31c88fde660d4db25b3dc))
+ ROM_LOAD16_BYTE("98603_80014.bin", 0x50000, 32768, CRC(c0db7e02) SHA1(add3e7312ac07e5ed4281aae2d46e1a4389d6ea2))
+ ROM_LOAD16_BYTE("98603_80015.bin", 0x60000, 32768, CRC(f85bb699) SHA1(bd7f690e3b4fb8952517b0acd6ac878cd50f5736))
+ ROM_LOAD16_BYTE("98603_80016.bin", 0x70000, 32768, CRC(d887acab) SHA1(a9cbbaa5f053f374d6cbda614b727df35a61ace1))
+ROM_END
+
+MACHINE_CONFIG_START(dio16_98603a_device::device_add_mconfig)
+MACHINE_CONFIG_END
+
+const tiny_rom_entry *dio16_98603a_device::device_rom_region() const
+{
+ return ROM_NAME(hp98603a);
+}
+
+dio16_98603a_device::dio16_98603a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ dio16_98603a_device(mconfig, HPDIO_98603A, tag, owner, clock)
+{
+}
+
+dio16_98603a_device::dio16_98603a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, type, tag, owner, clock),
+ device_dio16_card_interface(mconfig, *this)
+{
+}
+
+void dio16_98603a_device::device_start()
+{
+ set_dio_device();
+}
+
+void dio16_98603a_device::device_reset()
+{
+ m_rom = device().machine().root_device().memregion(this->subtag(HP98603A_ROM_REGION).c_str())->base();
+ m_dio->install_memory(0x80000, 0xfffff, read16_delegate(FUNC(dio16_98603a_device::rom_r), this),
+ write16_delegate(FUNC(dio16_98603a_device::rom_w), this));
+}
+
+READ16_MEMBER(dio16_98603a_device::rom_r)
+{
+ return m_rom[offset*2] | (m_rom[offset*2+1] << 8);
+}
+
+WRITE16_MEMBER(dio16_98603a_device::rom_w)
+{
+}
diff --git a/src/devices/bus/hp_dio/hp98603.h b/src/devices/bus/hp_dio/hp98603a.h
index c9db3fd723a..30a501b1b39 100644
--- a/src/devices/bus/hp_dio/hp98603.h
+++ b/src/devices/bus/hp_dio/hp98603a.h
@@ -1,25 +1,25 @@
// license:BSD-3-Clause
// copyright-holders:Sven Schnelle
-#ifndef MAME_BUS_HPDIO_98603_H
-#define MAME_BUS_HPDIO_98603_H
+#ifndef MAME_BUS_HPDIO_98603A_H
+#define MAME_BUS_HPDIO_98603A_H
#pragma once
#include "hp_dio.h"
-class dio16_98603_device :
+class dio16_98603a_device :
public device_t,
public device_dio16_card_interface
{
public:
// construction/destruction
- dio16_98603_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ dio16_98603a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
protected:
- dio16_98603_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ dio16_98603a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@@ -33,6 +33,6 @@ private:
uint8_t *m_rom;
};
-DECLARE_DEVICE_TYPE(HPDIO_98603, dio16_98603_device)
+DECLARE_DEVICE_TYPE(HPDIO_98603A, dio16_98603a_device)
-#endif // MAME_BUS_HPDIO_98603_H
+#endif // MAME_BUS_HPDIO_98603A_H
diff --git a/src/devices/bus/hp_dio/hp98603b.cpp b/src/devices/bus/hp_dio/hp98603b.cpp
new file mode 100644
index 00000000000..41a49dc61e0
--- /dev/null
+++ b/src/devices/bus/hp_dio/hp98603b.cpp
@@ -0,0 +1,72 @@
+// license:BSD-3-Clause
+// copyright-holders:Sven Schnelle
+/***************************************************************************
+
+ HP98603B BASIC ROM card
+
+***************************************************************************/
+
+#include "emu.h"
+#include "hp98603b.h"
+
+DEFINE_DEVICE_TYPE(HPDIO_98603B, dio16_98603b_device, "dio98603b", "HP98603 BASIC ROM card")
+
+#define HP98603B_ROM_REGION "98603b_rom"
+
+ROM_START(hp98603b)
+ ROM_REGION(0x100000, HP98603B_ROM_REGION, 0)
+
+ ROM_LOAD16_BYTE("u1.bin", 0x00000, 65536, CRC(ba50d9e0) SHA1(064e3cbbc7ee01f279a289684616ae3b8744a7c9))
+ ROM_LOAD16_BYTE("u2.bin", 0x20000, 65536, CRC(65f58d3e) SHA1(8367cecb46fa6f9abe9e78b42c25ce8699d5d3f3))
+ ROM_LOAD16_BYTE("u3.bin", 0x40000, 65536, CRC(9bc70573) SHA1(b7e375e11f6758d59d32236fc1c42eafc892d247))
+ ROM_LOAD16_BYTE("u4.bin", 0x60000, 65536, CRC(52debeba) SHA1(996e83e604501979fd80ae47ff1cda9890613982))
+ ROM_LOAD16_BYTE("u5.bin", 0x80000, 65536, CRC(93b4bce8) SHA1(77efec9a95b9e543e1cdb00196d1794ca0c8b4ba))
+ ROM_LOAD16_BYTE("u6.bin", 0xa0000, 65536, CRC(bda3d054) SHA1(c83d6f571ce5aa63ad3954ac02ff4069c01a1464))
+
+ ROM_LOAD16_BYTE("u9.bin", 0x00001, 65536, CRC(009e9fcb) SHA1(520f583a826516f7d676391daf31ed035162c263))
+ ROM_LOAD16_BYTE("u10.bin", 0x20001, 65536, CRC(84f90a1d) SHA1(9358aa7fa83ed9617d318936cbab79002853b0ce))
+ ROM_LOAD16_BYTE("u11.bin", 0x40001, 65536, CRC(e486e0f3) SHA1(66b5dd6c2c277156ad6c3ee5b99c34e243d897be))
+ ROM_LOAD16_BYTE("u12.bin", 0x60001, 65536, CRC(d5a08c7b) SHA1(be997cf9bbdb8fdd6c7e95754747016293c51c7f))
+ ROM_LOAD16_BYTE("u13.bin", 0x80001, 65536, CRC(9811c34c) SHA1(1655cac651889950b881e6be72f035c7de0a1aed))
+ ROM_LOAD16_BYTE("u14.bin", 0xa0001, 65536, CRC(96527d4e) SHA1(6706ab97eab4465ea4fa2d6b07e8107468e83818))
+ROM_END
+
+MACHINE_CONFIG_START(dio16_98603b_device::device_add_mconfig)
+MACHINE_CONFIG_END
+
+const tiny_rom_entry *dio16_98603b_device::device_rom_region() const
+{
+ return ROM_NAME(hp98603b);
+}
+
+dio16_98603b_device::dio16_98603b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ dio16_98603b_device(mconfig, HPDIO_98603B, tag, owner, clock)
+{
+}
+
+dio16_98603b_device::dio16_98603b_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, type, tag, owner, clock),
+ device_dio16_card_interface(mconfig, *this)
+{
+}
+
+void dio16_98603b_device::device_start()
+{
+ set_dio_device();
+}
+
+void dio16_98603b_device::device_reset()
+{
+ m_rom = device().machine().root_device().memregion(this->subtag(HP98603B_ROM_REGION).c_str())->base();
+ m_dio->install_memory(0x100000, 0x1fffff, read16_delegate(FUNC(dio16_98603b_device::rom_r), this),
+ write16_delegate(FUNC(dio16_98603b_device::rom_w), this));
+}
+
+READ16_MEMBER(dio16_98603b_device::rom_r)
+{
+ return m_rom[offset*2] | (m_rom[offset*2+1] << 8);
+}
+
+WRITE16_MEMBER(dio16_98603b_device::rom_w)
+{
+}
diff --git a/src/devices/bus/hp_dio/hp98603b.h b/src/devices/bus/hp_dio/hp98603b.h
new file mode 100644
index 00000000000..8d1780432a5
--- /dev/null
+++ b/src/devices/bus/hp_dio/hp98603b.h
@@ -0,0 +1,38 @@
+// license:BSD-3-Clause
+// copyright-holders:Sven Schnelle
+
+#ifndef MAME_BUS_HPDIO_98603B_H
+#define MAME_BUS_HPDIO_98603B_H
+
+#pragma once
+
+#include "hp_dio.h"
+
+class dio16_98603b_device :
+ public device_t,
+ public device_dio16_card_interface
+{
+public:
+ // construction/destruction
+ dio16_98603b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ DECLARE_READ16_MEMBER(rom_r);
+ DECLARE_WRITE16_MEMBER(rom_w);
+
+protected:
+ dio16_98603b_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // optional information overrides
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual const tiny_rom_entry *device_rom_region() const override;
+
+private:
+ uint8_t *m_rom;
+};
+
+DECLARE_DEVICE_TYPE(HPDIO_98603B, dio16_98603b_device)
+
+#endif // MAME_BUS_HPDIO_98603B_H
diff --git a/src/devices/bus/isa/areplay.cpp b/src/devices/bus/isa/areplay.cpp
new file mode 100644
index 00000000000..68c665f8bab
--- /dev/null
+++ b/src/devices/bus/isa/areplay.cpp
@@ -0,0 +1,614 @@
+// license:BSD-3-Clause
+// copyright-holders:Bavarese
+/***************************************************************************
+ Action Replay for DOS (DATEL UK 1994/1995).
+ Requires 386/486 and DOS 3.2 or above (no Windows).
+
+ Hardware details:
+ - 6 DIP switches define hardware address and i/o port,
+ another 6 define the IRQ
+ DIP switches should only be altered when PC is off. No Plug & Play.
+
+ - 2 x UM 6264 (= two 8 K x 8 CMOS SRAM chips)
+ - 1 x AMD 29f010 (= 1 Mbit 128Kb x8 flash memory)
+
+ - 4 rectangular PAL chips with port / address / glue logic
+
+ Codes printed on PCB (compatible with flash firmware)
+ REF1066
+ 07/11/94
+ An earlier design with REF1033 dated 28/10/93 is known.
+---------------------------------------------------------------------------------
+ Usage: individual drivers needed for real (AREPLAY.COM) and
+ protected mode (PROT.EXE; incompatible with EMM386 or QEMM).
+
+ Hard disk space _required_ for temp.files by following sections:
+ 1. .\AREPLAY.CFG (vital configuration file written by initial SETUP)
+
+ 2. file viewer (even if only disk A or B are accessed) -> C:\ARVRAM.DSK
+
+ 3. virtual memory managed by AROS, a complex but largely
+ undocumented operating system (in flash ROM) -> C:\ARVRAM.RAM
+
+ 4. the possibility array of certain trainers -> C:\POSSIBIL.ITY
+
+ If hard disk gets unvailable or isn't present, lockups occur!
+
+
+ Freezer notes: configuration changes (DOS startup files or
+ altered DIP switches) usually render a freezed image unusable.
+
+ Main problem is that Areplay.com must be at a precise location given
+ by (scratch RAM + offset $10) = (BIOS extension address + $3010);
+ at least with 4.8 software release.
+
+ To debug crashes in unfreeze, set the DEBUG DIP switch. 'Offset' is
+ the freezed location of Areplay.com. It must be the same as the
+ offset shown when the Areplay TSR is loaded into memory.
+
+ Always keep a 1:1 copy of CONFIG.SYS, AUTOEXEC.BAT and notes about
+ DIPs + environment (a write protected boot disk would be ideal).
+
+ HIMEM.SYS parameters matter. Mess 0.186 with 'ct486' liked:
+ device=HIMEM.SYS /MACHINE:AT /TESTMEM:ON /CPUCLOCK:ON
+ Second 8K BIOS chunk must not be detected as available RAM!
+ (check with Msd.exe supplied by DOS 6.x)
+
+ Software caches like DoubleSpace, Smartdrive are incompatible w.freeze
+ because of possible hard disk corruption (a flush is done though).
+ ***************************************************************************
+ Hardware / logic
+ ----------------
+ GAL/PAL logic is undumped. Yet well-documented C-64 * Replay
+ cartridges give an idea of some basic principles (similar
+ ROM/RAM banking, flip-flops).
+
+ There is no NMI on the ISA card and no attempt was made to
+ hide the card from evil minded programmers.
+
+ A constant Irq heartbeat is generated after the card is
+ correctly initialized (when the Areplay.com driver loaded).
+
+ Cyclic led flashes (on the freezer extension outside the PC case)
+ indicate activity.
+
+ Byte watch, slow motion, key polling and most other functions are
+ implemented in software (via interrupt hooks).
+
+ Bit 3 in the single read register indicates if the interrupt came
+ from the card or originated elsewhere. The bit is used to
+ decide whether to invoke Action Replay - or skip functionality
+ altogether.
+ Assumption: reset upon each read and set by external logic.
+
+ The BIOS extension segment comprises 16K from C8000 on:
+ ------------- ROM location set by DIP switches --------------------
+ 8 K ROM segment (determined by write to port 1, usually $0280)
+ + 4 K RAM bank (1-1F; determined by write to port 2, usually $0281)
+ + 4 K scratch RAM (always present, never banked; for vital variables)
+ -------------------------------------------------------------------
+
+
+ Firmware revisions
+ ------------------
+ First revision had a non-upgradeable ROM <= V4.0 (undumped).
+
+ Newer hardware was equipped with AM29010 EEPROM (*)
+
+ Firmware (say V48ROM.ROM with V4 switch) is loaded and banked
+ in before boot - just like any other BIOS extension.
+
+ Datel drivers refuse to load if the BIOS area chosen is empty
+ or the API level of driver and internal (AR)OS do not match.
+
+ As a rule of thumb, versions 4.1 - 4.8 of the TSR run on V4 hardware
+
+ Driver revisions known are
+ 4.1 (outdated; described in German manual, about 1994),
+ 4.8 (widely available, ca. 1995) and 5.0 (when released?)
+
+ Before distribution via mailbox, flash files (labeled VxxROM.ROM)
+ were obfuscated by adding 4,3,2,1 to byte 0,1,2,3.
+
+ This driver accepts encrypted or unencrypted VxxROM.ROM files.
+
+ TODO:
+ (*) unblock flash upgrades, currently intelflash doesn't cooperate
+
+ - XMS / EMS memory not really tested
+
+ - compatibility with * official * 5.0 binaries (if they exist)
+
+ - improve banking; add missing / secret bits.
+ Bit 7 in read register seems to be added in later V5 hardware.
+
+ No 'magic bits' to disable ROM/RAM or cart were found. Bit 5
+ in first write register is set when freezer menu is active.
+*********************************************************************************/
+#include "emu.h"
+#include "areplay.h"
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+DEFINE_DEVICE_TYPE(ISA8_AREPLAY, isa8_areplay_device, "areplay", "Action Replay for DOS - DATEL UK 1994")
+
+//-------------------------------------------------
+// ROM( action replay ) V4.8 or V5.0
+//-------------------------------------------------
+
+// - official V4.8 firmware = CRC(6c4a64ce)
+// - encoded V5.0 beta firmware = CRC(0ff4d5ef)
+ROM_START( areplay )
+ ROM_REGION(0x20000,"v48rom.rom",0)
+ ROM_LOAD( "v48rom.rom", 0x0000, 0x20000, CRC(6c4a64ce) SHA1(fac68327a4c8b3cb03def2a69e5930c845a09047) )
+
+ ROM_REGION(0x40000,"v50rom.rom",0)
+ ROM_LOAD( "v50rom.rom", 0x0000, 0x20000, CRC(0ff4d5ef) SHA1(eb4cd4f71ebf6d604b8e7924141389585b92ff5e) )
+ROM_END
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+const tiny_rom_entry *isa8_areplay_device::device_rom_region() const
+{
+ return ROM_NAME( areplay );
+}
+
+//-------------------------------------------------
+// device_add_mconfig - add device configuration
+//-------------------------------------------------
+MACHINE_CONFIG_START(isa8_areplay_device::device_add_mconfig)
+ MCFG_TIMER_DRIVER_ADD_PERIODIC("heartbeat", isa8_areplay_device, heartbeat_timer, attotime::from_hz(18))
+MACHINE_CONFIG_END
+//**************************************************************************
+
+//-------------------------------------------------
+// isa8_areplay_device - constructor
+//-------------------------------------------------
+isa8_areplay_device::isa8_areplay_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, ISA8_AREPLAY, tag, owner, clock),
+ device_isa8_card_interface(mconfig, *this)
+{
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+void isa8_areplay_device::device_start()
+{
+ set_isa_device();
+
+ one_shot_timer = timer_alloc(0);
+}
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+void isa8_areplay_device::device_reset()
+{
+ uint32_t bank_start;
+ uint32_t bank_end;
+
+ uint8_t *dest;
+ uint16_t io_port_end;
+
+ m_write_port1 = 0; // bit 5 set = no IRQs --------- correct?
+
+ m_timer_fired = true;
+ force_irq_to(false); // side effect on global variable: m_is_heartbeat_present = false
+
+ m_current_irq_selected = 5;
+
+ m_current_rom_page = 0;
+ m_current_RAM_PAGE = INITIAL_RAM_BANK_NO;
+
+ int rom = ioport("ROM_ADDRESS")->read();
+ switch(rom)
+ {
+ default:
+ m_current_rom_start = 0xc8000 + (rom * 0x4000);
+ break;
+
+ case 3:
+ m_current_rom_start = 0xd2000;
+ break;
+
+ case 4:
+ case 5:
+ case 6:
+ m_current_rom_start = 0xd4000 + ( (rom - 4) * 0x4000);
+ break;
+ }
+
+ int port = ioport("PORT")->read();
+
+ uint16_t io_port = 0x280; // default
+ if( (port >= 0) && (port <= 3) )
+ io_port = 0x280 + (port * 0x10);
+
+ int i_no = ioport("IRQ")->read();
+ if( (i_no >= 2) && (i_no <= 7) )
+ m_current_irq_selected = i_no;
+
+ // Unmap all 16K (8 K + two independent RAM banks a 4 K):
+ m_isa->unmap_bank(m_current_rom_start, m_current_rom_start + SIZE_ROM_WINDOW + (SIZE_RAM_BANK * 2) - 1 );
+
+ char str[40];
+ sprintf(str, "v%drom.rom", 48 + (2 * ioport("COMPATIBILITY")->read()) ); // load "v48rom.rom"
+
+ m_isa->install_rom(this, m_current_rom_start, m_current_rom_start + SIZE_ROM_WINDOW - 1, str, str);
+
+ memcpy(&m_banked_flash[0], memregion(str)->base(), sizeof(m_banked_flash)); // copy to memory.
+
+ if(m_banked_flash[0] != 0x55) // if blob is unbootable, decode and keep copy in banked_flash -
+ {
+ uint8_t table[4];
+ table[0]=4; table[1]=3; table[2]=2; table[3]=1;
+
+ for(uint32_t i = 0; i < sizeof(m_banked_flash); i++)
+ m_banked_flash[i] -= table[i & 3];
+ }
+
+ dest = machine().root_device().memregion("isa")->base() + m_current_rom_start - 0xc0000;
+ memcpy(dest, &m_banked_flash[0], SIZE_ROM_WINDOW); // place bootable BIOS extension (8 K)
+
+ // RAM range: install (4 K chunks)
+ bank_start = m_current_rom_start + SIZE_ROM_WINDOW;
+ bank_end = bank_start + SIZE_RAM_BANK -1;
+
+ m_isa->install_bank(bank_start,
+ bank_end, "banked_ram", &m_board_ram[INITIAL_RAM_BANK_NO * SIZE_RAM_BANK]);
+
+ // Scratch RAM has a seperate space never banked out. Reserve an extra space -
+ bank_start = bank_end + 1;
+ bank_end = bank_start + SIZE_RAM_BANK -1;
+
+ m_isa->install_bank(bank_start,
+ bank_end , "banked_ram", &m_board_ram[SCRATCH_RAM_BANK_NO * SIZE_RAM_BANK]);
+
+ // Protect entire bank to deter Himem.sys from detecting free memory -
+ m_isa->writeprotect_bank(bank_start, bank_end);
+
+ // If only address 0-3 is covered and port changes occur, Unfreeze hangs (one cause of several)
+ if( ioport("DEBUG")->read()) // [DEBUG]: cover complete I-O range from 0280 - 02b3.
+ {
+ io_port = 0x280;
+ io_port_end = io_port + 0x33;
+ }
+ else
+ { // cover only offset 0 - 3 (+ io_port)
+ io_port_end = io_port + 3;
+ }
+ m_isa->install_device(io_port, io_port_end, read8_delegate(FUNC(isa8_areplay_device::ar_read), this), write8_delegate(FUNC(isa8_areplay_device::ar_write), this));
+
+ if(dest[0]==0x55) // if 'bootable' signature present...
+ {
+ if ( (ioport("FREEZE_BUTTON")->read() > 0) || (ioport("SLOMO_SWITCH")->read() > 0) )
+ popmessage("FREEZE and SLOMO should be disabled before startup!\n[Action Replay]");
+ else
+ popmessage("Action Replay %1.1f from %x to %x / PORT %x - %x/ IRQ %x", 4.8f + (0.2f * ioport("COMPATIBILITY")->read()),
+ m_current_rom_start, bank_end,
+ io_port, io_port_end,
+ m_current_irq_selected
+ );
+ }
+}
+
+
+// ----------- ONE READ REGISTER (bits must match when probing for ports. Expected value of bit 7 varies with firmware)
+// bit 0 : (unkown). Must be 1 at startup
+// bit 1 : FREEZE BUTTON (if bit is 0 then 1 is poked to scratch RAM offset + 0xD0 on firmware version 5) * active low *
+// bit 2 : (unkown). Must be 0 at startup
+// bit 3 : ACTION_REPLAY_IRQ. Must be 0 at startup! * active high *
+// bit 4 : (unknown). Must be 1 at startup
+// bit 5 : (unknown). Must be 0 at startup
+// bit 6 : SLOW MOTION SWITCH. Must be 0 at startup * active high *
+// bit 7 : (unknown). Must be 1 at startup of V5.0 firmware and 0 at startup of V4.8.
+READ8_MEMBER(isa8_areplay_device::ar_read)
+{
+ offset = offset & 1;
+
+ int data = 1 | 16; // unknown bits 0 and 4 must be 1 at all times
+
+ if ( ioport("FREEZE_BUTTON")->read() == 0 ) // * active low * [bit 1]
+ data |= FREEZE_BUTTON_BIT;
+
+ if (m_is_heartbeat_present) // * active high * [bit 3]
+ {
+ force_irq_to(false); // sets 'm_is_heartbeat_present' to false
+ data |= ACTION_REPLAY_IRQ; // status bit needed for sensing of IRQ (1 = AR activity)
+ }
+
+ if (ioport("SLOMO_SWITCH")->read() > 0) // ? active high ? [bit 6] 0x40
+ data |= SLOMO_SWITCH_BIT;
+
+ if (ioport("COMPATIBILITY")->read() > 0)
+ data |= 0x80; // V5.0 'port sensing' appears to need it
+
+ return data;
+}
+
+// ----------- TWO WRITE EGISTERS :
+
+// --- WRITE PORT #1: [ROM] bank select (always in 8 K chunks; $1FFF).
+// Used to communicate with the AM29010 flash chip (access patterns: see datasheet)
+
+// bit 0 : (set to 1 by flash routine, else 0) WRITE ENABLE ?
+// bit 1 : (unknown); leftover bits from address? Usually 0.
+
+// bit 2 : A14 [ bits 2 - 4 select one 8 K bank in 128 K ROM space ]
+// bit 3 : A15 [ bits 2 - 4 select one 8 K bank in 128 K ROM space ]
+// bit 4 : A16 [ bits 2 - 4 select one 8 K bank in 128 K ROM space ]
+// bit 5 : A17. Usually 0. Sense AM29010 flash 'reset' (0xf0) ?
+
+// bit 6 : (unknown); leftover bits from address? Usually 0.
+// bit 7 : LED (bit inverted by firmware when Action Replay is ready)
+
+// --------------------------------------------------------------------------------
+// --- WRITE PORT #2: [RAM] bank select
+
+// bits 0...4 : [RAM] bank select (5 bits address 1 out of 32) pages of 4 K size.
+// bits 5 + 6 : (unknown)
+// Bit 7 : INTERRUPT ENABLE * active high *. Needed for IRQ sensing (pokes data 0x00, then 0x80)
+// Bit 7 = 0 : "disable interrupts"
+// Bit 7 = 1 : "enable interrupts "
+
+WRITE8_MEMBER(isa8_areplay_device::ar_write)
+{
+ uint32_t bank_start;
+ uint32_t bank_end;
+
+ static bool old_irq_state;
+ static bool old_led_state;
+
+ static uint16_t old_tsr_start, old_bank, old_port;
+ uint16_t tsr_start, bank, port;
+
+ // Debug freezes which crash the host (usually because start addresses no longer match):
+ if( ioport("DEBUG")->read())
+ {
+ uint8_t *scratch = machine().root_device().memregion("isa")->base() + m_current_rom_start - 0xc0000 + 3 * SIZE_RAM_BANK;
+ memcpy(&m_post_mortem_ram[0], scratch, 0x20); // make post mortem dump
+
+ tsr_start= m_post_mortem_ram[0x12] | (m_post_mortem_ram[0x13] << 8);
+ bank = m_post_mortem_ram[7];
+ port = m_post_mortem_ram[0] | (m_post_mortem_ram[1] << 8); // locations valid for 4.8
+
+ if( (bank != old_bank ) ||
+ (tsr_start != old_tsr_start) ||
+ (port != old_port)
+ )
+ {
+ if(tsr_start > 0)
+ popmessage("Tsr start address %x\n[Action Replay]",tsr_start);
+
+ if( (old_tsr_start > 0) &&
+ (old_bank > 0) &&
+ (old_port > 0)
+ )
+ {
+ popmessage("Change detected: OFFSET: %x -> %x\nROM BANK: %x -> %x...\nPORT %x -> %x\n[Action Replay]",
+ old_tsr_start, tsr_start,
+ old_bank, bank,
+ old_port, port
+ );
+ }
+
+ old_tsr_start = tsr_start;
+ old_bank = bank;
+ old_port = port;
+ }
+ }
+
+ offset = offset & 1;
+
+ switch(offset)
+ {
+ // ****************
+ // WRITE PORT #1
+ // ****************
+ case 0: // (EEP)ROM bank select ( 1FFF = 8 K chunks). Range: 0...15 (allows 128 K)
+
+ m_write_port1 = data;
+
+ bank_end = m_current_rom_start + SIZE_ROM_WINDOW - 1;
+ if(data & WRITE_ENABLE_BIT) // detect write to EEPROM area
+ {
+ m_isa->unmap_bank(m_current_rom_start, bank_end);
+ m_isa->install_bank(m_current_rom_start, bank_end,
+ "banked_flash", &m_banked_flash[ 16 * SIZE_ROM_WINDOW ]
+ );
+
+ if(data == 0x01 ) // attempt to query manufacturer ID ?
+ {
+ popmessage("EEPROM updates are unemulated!\n[Action Replay]");
+ m_isa->install_bank(m_current_rom_start, bank_end,
+ "banked_flash", &m_banked_flash[ m_current_rom_page * SIZE_ROM_WINDOW ]
+ );
+ }
+ }
+ else
+ { // ROM PAGE 0 * IS * USED. MSB BITS (11000011) ARE ALWAYS ZERO:
+ m_current_rom_page = (data & 0x3c) >> 2; // bits 2...5
+
+ m_isa->unmap_bank(m_current_rom_start, bank_end);
+ m_isa->install_bank(m_current_rom_start, bank_end,
+ "banked_flash", &m_banked_flash[ m_current_rom_page * SIZE_ROM_WINDOW ]
+ );
+
+ m_isa->writeprotect_bank(m_current_rom_start, bank_end); // *** write protect ROM bank ****
+ }
+
+ if( ((data & LED_ENABLE_BIT) > 0) && (old_led_state == false) )
+ if( ioport("DEBUG")->read() != 0 ) printf(" [Action Replay LED 0 > 1] ");
+
+ if( ((data & LED_ENABLE_BIT) == 0) && (old_led_state == true) )
+ if( ioport("DEBUG")->read() != 0 ) printf(" [Action Replay LED 1 > 0] ");
+
+ old_led_state = (data & LED_ENABLE_BIT) ? true : false; // keep position of statement
+
+ break; // (end of) case 0
+
+ // ****************
+ // WRITE PORT #2
+ // ****************
+ case 1: // RAM bank select ( FFF = 4K size). Range: 0...31 (128 K possible; amount probed by firmware)
+
+ if(old_irq_state == false) // Trigger IRQ only if 0 => 1 transition
+ {
+ if( ((data & PORT2_IRQ_ENABLE) > 0 ) )
+ {
+ if(m_timer_fired == true)
+ {
+ if(m_is_heartbeat_present == false)
+ force_irq_to(true);
+ }
+ }
+ } // old irq state was ZERO.
+
+ if( (data & PORT2_IRQ_ENABLE) == 0 ) // driver reactivates stuck IRQ by forcing the bit to 0, then 1
+ force_irq_to(false);
+
+ old_irq_state = (data & PORT2_IRQ_ENABLE) ? true : false; // keep position of statement
+
+ bank_start = m_current_rom_start + SIZE_ROM_WINDOW;
+ bank_end = bank_start + SIZE_RAM_BANK - 1;
+
+ m_isa->unmap_bank(bank_start, bank_end);
+
+ m_current_RAM_PAGE = data & 0x1f; // Bits 0..4
+
+ m_isa->install_bank(bank_start, bank_end ,
+ "banked_ram", &m_board_ram[ SIZE_RAM_BANK * m_current_RAM_PAGE ]
+ );
+ break; // (end of) case 1 : RAM bank
+ }
+}
+
+void isa8_areplay_device::device_timer(emu_timer &timer, device_timer_id tid, int param, void *ptr)
+{
+ switch (tid)
+ {
+ default:
+
+if( ioport("DEBUG")->read() != 0 )
+ printf("\nONE SHOT **** stopped ****!");
+ m_timer_fired = true;
+
+ force_irq_to(false);
+ break;
+
+ } // switch (timer ID)
+}
+
+
+// Subroutine
+// => side effect on global variable: m_is_heartbeat_present = flag;
+
+void isa8_areplay_device::force_irq_to(bool flag)
+{
+ m_is_heartbeat_present = flag; // flag indicates the IRQ is generated by Action Replay
+
+ if(flag == false)
+ one_shot_timer->adjust(attotime::never);
+ else
+ one_shot_timer->adjust(attotime::from_msec(ONE_SHOT_TIMER_DELAY_MS));
+ raise_processor_interrupt(m_current_irq_selected, flag);
+}
+
+TIMER_DEVICE_CALLBACK_MEMBER(isa8_areplay_device::heartbeat_timer)
+{
+ if(!m_is_heartbeat_present)
+ {
+ m_timer_fired = false;
+
+ force_irq_to(true); // side effect: m_is_heartbeat_present = true
+ }
+}
+
+void isa8_areplay_device::raise_processor_interrupt(int ref, bool state)
+{
+ switch(ref)
+ {
+ case 2:
+ m_isa->irq2_w(state ? ASSERT_LINE : CLEAR_LINE);
+ break;
+
+ case 3:
+ m_isa->irq3_w(state ? ASSERT_LINE : CLEAR_LINE);
+ break;
+
+ case 4:
+ m_isa->irq4_w(state ? ASSERT_LINE : CLEAR_LINE);
+ break;
+
+ case 5:
+ m_isa->irq5_w(state ? ASSERT_LINE : CLEAR_LINE);
+ break;
+
+ case 6:
+ m_isa->irq6_w(state ? ASSERT_LINE : CLEAR_LINE);
+ break;
+
+ case 7:
+ m_isa->irq7_w(state ? ASSERT_LINE : CLEAR_LINE);
+ break;
+ }
+}
+
+static INPUT_PORTS_START( areplay_dsw )
+ PORT_START("FREEZE_BUTTON")
+ PORT_DIPNAME(0x01, 0x00, "Freeze (push to activate Action Replay)") PORT_IMPULSE(4)
+ PORT_DIPSETTING(0x00, DEF_STR(Off))
+ PORT_DIPSETTING(0x01, DEF_STR(On))
+
+ PORT_START("SLOMO_SWITCH")
+ PORT_DIPNAME(0x01, 0x00, "Slow motion switch (switch OFF at startup)") PORT_TOGGLE
+ PORT_DIPSETTING(0x00, DEF_STR(Off))
+ PORT_DIPSETTING(0x01, DEF_STR(On))
+
+ PORT_START("ROM_ADDRESS")
+ PORT_DIPNAME( 0xff, 0x00, "16K ROM bank (disable BIOS shadowing; exclude in EMM386)")
+ PORT_DIPSETTING( 0, "C8000 - CBFFF (at times occupied by graphics o.HD contr.)" )
+ PORT_DIPSETTING( 1, "CC000 - CFFFF" )
+ PORT_DIPSETTING( 2, "D0000 - D3FFF" )
+ PORT_DIPSETTING( 3, "D2000 - D5FFF" )
+ PORT_DIPSETTING( 4, "D4000 - D7FFF" )
+ PORT_DIPSETTING( 5, "D8000 - DBFFF" )
+ PORT_DIPSETTING( 6, "DC000 - DFFFF" )
+
+ PORT_START("PORT")
+ PORT_DIPNAME( 0xff, 0x00, "I/O port")
+ PORT_DIPSETTING( 0, "0x280" )
+ PORT_DIPSETTING( 1, "0x290" )
+ PORT_DIPSETTING( 2, "0x2A0" )
+ PORT_DIPSETTING( 3, "0x2B0" )
+
+ PORT_START("IRQ")
+ PORT_DIPNAME( 0xff, 5, "Interrupt number")
+ PORT_DIPSETTING( 2, "2 (sometimes usable; timer irq / occupied by 8259A)" )
+ PORT_DIPSETTING( 3, "3 (free if not occupied by COM-2 or COM-4)" )
+ PORT_DIPSETTING( 4, "4 (do not use if COM-1 or COM-3 present)" )
+ PORT_DIPSETTING( 5, "5 (recommended; usually LPT-2)" )
+ PORT_DIPSETTING( 6, "6 (do not use if FDC controller present)" )
+ PORT_DIPSETTING( 7, "7 (recommended; usually LPT-1)" )
+
+ PORT_START("COMPATIBILITY")
+ PORT_DIPNAME(0xff, 0x00, "Hardware compatibility") PORT_TOGGLE
+ PORT_DIPSETTING( 0, "4.8 (AMD flash)" )
+ PORT_DIPSETTING( 1, "5.0 (AMD flash w.different I/O)" )
+
+ PORT_START("DEBUG")
+ PORT_DIPNAME(0xff, 0x00, "* DEBUGGING ON *") PORT_TOGGLE
+ PORT_DIPSETTING(0x00, DEF_STR(Off))
+ PORT_DIPSETTING(0x01, DEF_STR(On))
+INPUT_PORTS_END
+
+//-------------------------------------------------
+// isa8_areplay_device - constructor
+//-------------------------------------------------
+ioport_constructor isa8_areplay_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( areplay_dsw );
+}
diff --git a/src/devices/bus/isa/areplay.h b/src/devices/bus/isa/areplay.h
new file mode 100644
index 00000000000..1e2640a22b8
--- /dev/null
+++ b/src/devices/bus/isa/areplay.h
@@ -0,0 +1,102 @@
+// license:BSD-3-Clause
+// copyright-holders:Bavarese
+/***************************************************************************
+
+ Action Replay for DOS (ISA card 1994; DATEL UK)
+
+***************************************************************************/
+
+#ifndef MAME_BUS_ISA_AREPLAY_H
+#define MAME_BUS_ISA_AREPLAY_H
+
+#pragma once
+
+#include "isa.h"
+#include "machine/timer.h"
+
+//**************************************************************************
+// MACROS / CONSTANTS
+//**************************************************************************
+// One shot timer (555 timer with unknown interval)
+// TODO: determine exact value
+#define ONE_SHOT_TIMER_DELAY_MS 100
+
+#define SIZE_ROM_WINDOW 0x2000
+#define SIZE_RAM_BANK 0x1000
+
+
+// This is the RAM bank chosen when the AR starts up (after Reset):
+#define INITIAL_RAM_BANK_NO 1
+
+// Assume the scratch is at bank 0 in RAM (0 never selected by firmware, which only accesses 1 - 1F)
+#define SCRATCH_RAM_BANK_NO 0
+
+
+// Port 1:
+#define WRITE_ENABLE_BIT 0x01
+#define FREEZE_BUTTON_BIT 0x02
+#define ACTION_REPLAY_IRQ 0x08
+#define SLOMO_SWITCH_BIT 0x40
+#define LED_ENABLE_BIT 0x80
+
+// Port 2:
+#define PORT2_IRQ_ENABLE 0x80
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class isa8_areplay_device :
+ public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ isa8_areplay_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ DECLARE_READ8_MEMBER(ar_read); // one read register
+ DECLARE_WRITE8_MEMBER(ar_write); // two write registers.
+
+ TIMER_DEVICE_CALLBACK_MEMBER(heartbeat_timer);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // optional information overrides
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual ioport_constructor device_input_ports() const override;
+
+ virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+private:
+ uint8_t m_board_ram[ (0x1F + 1) * SIZE_RAM_BANK]; // maximum scratch RAM just to be safe (32 pages)
+
+ // 16 x 8 = 128K flash ROM. Extra bank (+1) was added to map write attempts (when flashing)
+ uint8_t m_banked_flash[ (16 + 1) * SIZE_ROM_WINDOW];
+
+ uint8_t m_post_mortem_ram[ SIZE_RAM_BANK];
+
+ uint8_t m_write_port1;
+
+ int m_current_rom_start;
+ int m_current_rom_page;
+ int m_current_RAM_PAGE;
+
+ int m_current_irq_selected;
+
+ bool m_timer_fired;
+ emu_timer *one_shot_timer;
+
+ bool m_is_heartbeat_present;
+
+ void raise_processor_interrupt(int ref, bool state);
+ void force_irq_to(bool flag);
+};
+
+// device type definition
+DECLARE_DEVICE_TYPE(ISA8_AREPLAY, isa8_areplay_device)
+
+#endif // MAME_BUS_ISA_AREPLAY_H
diff --git a/src/devices/bus/isa/isa.cpp b/src/devices/bus/isa/isa.cpp
index 91907e4a9f8..1fe08ded87b 100644
--- a/src/devices/bus/isa/isa.cpp
+++ b/src/devices/bus/isa/isa.cpp
@@ -288,6 +288,11 @@ void isa8_device::unmap_bank(offs_t start, offs_t end)
m_memspace->unmap_readwrite(start, end);
}
+void isa8_device::writeprotect_bank(offs_t start, offs_t end)
+{
+ m_memspace->unmap_write(start, end);
+}
+
void isa8_device::install_rom(device_t *dev, offs_t start, offs_t end, const char *tag, const char *region)
{
if (machine().root_device().memregion("isa")) {
diff --git a/src/devices/bus/isa/isa.h b/src/devices/bus/isa/isa.h
index a8046423e61..1a49f7a65b0 100644
--- a/src/devices/bus/isa/isa.h
+++ b/src/devices/bus/isa/isa.h
@@ -224,6 +224,7 @@ public:
void unmap_device(offs_t start, offs_t end) const { m_iospace->unmap_readwrite(start, end); }
void unmap_bank(offs_t start, offs_t end);
+ void writeprotect_bank(offs_t start, offs_t end);
void unmap_rom(offs_t start, offs_t end);
bool is_option_rom_space_available(offs_t start, int size);
diff --git a/src/devices/bus/isa/isa_cards.cpp b/src/devices/bus/isa/isa_cards.cpp
index 5701350db46..bd514cc6a87 100644
--- a/src/devices/bus/isa/isa_cards.cpp
+++ b/src/devices/bus/isa/isa_cards.cpp
@@ -61,7 +61,7 @@
// other
#include "finalchs.h"
-
+#include "areplay.h"
SLOT_INTERFACE_START( pc_isa8_cards )
SLOT_INTERFACE("mda", ISA8_MDA)
@@ -106,6 +106,7 @@ SLOT_INTERFACE_START( pc_isa8_cards )
SLOT_INTERFACE("wd1002a_wx1", ISA8_WD1002A_WX1)
SLOT_INTERFACE("dectalk", ISA8_DECTALK)
SLOT_INTERFACE("pds", ISA8_PDS)
+ SLOT_INTERFACE("areplay", ISA8_AREPLAY)
SLOT_INTERFACE_END
SLOT_INTERFACE_START( pc_isa16_cards )
@@ -141,6 +142,7 @@ SLOT_INTERFACE_START( pc_isa16_cards )
SLOT_INTERFACE("fdcsmc", ISA8_FDC_SMC)
SLOT_INTERFACE("dectalk", ISA8_DECTALK)
SLOT_INTERFACE("pds", ISA8_PDS)
+ SLOT_INTERFACE("areplay", ISA8_AREPLAY)
// 16-bit
SLOT_INTERFACE("ide", ISA16_IDE)
SLOT_INTERFACE("ne2000", NE2000)
diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp
index 8eb6b5802ef..ba7429eae13 100644
--- a/src/devices/cpu/mcs51/mcs51.cpp
+++ b/src/devices/cpu/mcs51/mcs51.cpp
@@ -1858,7 +1858,6 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
{
//External Interrupt 0
case MCS51_INT0_LINE:
- SET_P3((P3 &~ 4) | (state << 2));
//Line Asserted?
if (state != CLEAR_LINE) {
//Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT0 active lo!
@@ -1881,7 +1880,6 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
//External Interrupt 1
case MCS51_INT1_LINE:
- SET_P3((P3 &~ 8) | (state << 3));
//Line Asserted?
if (state != CLEAR_LINE) {
//Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT1 active lo!
@@ -2071,7 +2069,9 @@ uint8_t mcs51_cpu_device::sfr_read(size_t offset)
case ADDR_P0: return RWM ? P0 : (P0 | m_forced_inputs[0]) & m_port_in_cb[0]();
case ADDR_P1: return RWM ? P1 : (P1 | m_forced_inputs[1]) & m_port_in_cb[1]();
case ADDR_P2: return RWM ? P2 : (P2 | m_forced_inputs[2]) & m_port_in_cb[2]();
- case ADDR_P3: return RWM ? P3 : (P3 | m_forced_inputs[3]) & m_port_in_cb[3]();
+ case ADDR_P3: return RWM ? P3 : (P3 | m_forced_inputs[3]) & m_port_in_cb[3]()
+ & ~(GET_BIT(m_last_line_state, MCS51_INT0_LINE) ? 4 : 0)
+ & ~(GET_BIT(m_last_line_state, MCS51_INT1_LINE) ? 8 : 0);
case ADDR_PSW:
case ADDR_ACC:
diff --git a/src/mame/drivers/dec8.cpp b/src/mame/drivers/dec8.cpp
index 178e5e7b849..6cd1c1dca0a 100644
--- a/src/mame/drivers/dec8.cpp
+++ b/src/mame/drivers/dec8.cpp
@@ -17,17 +17,17 @@ Various Data East 8 bit games:
Meikyuu Hunter G (c) 1987 Data East Corporation (6809 + I8751)
Captain Silver (World) (c) 1987 Data East Corporation (2*6809 + I8751)
Captain Silver (Japan) (c) 1987 Data East Corporation (2*6809 + I8751)
- Psycho-Nics Oscar (World) (c) 1987 Data East Corporation (2*6809 + I8751)
- Psycho-Nics Oscar (US) (c) 1988 Data East USA (2*6809 + I8751)
- Psycho-Nics Oscar (Japan) (c) 1987 Data East Corporation (2*6809 + I8751)
+ Psycho-Nics Oscar (World) (c) 1987 Data East Corporation (2*6809)
+ Psycho-Nics Oscar (US) (c) 1988 Data East USA (2*6809)
+ Psycho-Nics Oscar (Japan) (c) 1987 Data East Corporation (2*6809)
Super Real Darwin (World) (c) 1987 Data East Corporation (6809 + I8751)
Super Real Darwin (Japan) (c) 1987 Data East Corporation (6809 + I8751)
Cobra Command (World) (c) 1988 Data East Corporation (6809)
Cobra Command (Japan) (c) 1988 Data East Corporation (6809)
All games use a 6502 for sound (some are encrypted), all games except Cobracom
- use an Intel 8751 for protection & coinage. For the games without (fake) MCU,
- the coinage dip switch (sometimes based on the manual) is simulated.
+ and Oscar use an Intel 8751 for protection & coinage. For the games without
+ (fake) MCU, the coinage dip switch (sometimes based on the manual) is simulated.
Meikyuu Hunter G was formerly known as Mazehunter.
@@ -190,7 +190,7 @@ WRITE8_MEMBER(dec8_state::lastmisn_i8751_w)
{
case 0: /* High byte */
m_i8751_value = (m_i8751_value & 0xff) | (data << 8);
- m_maincpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
+ m_maincpu->set_input_line(M6809_FIRQ_LINE, ASSERT_LINE); /* Signal main cpu */
break;
case 1: /* Low byte */
m_i8751_value = (m_i8751_value & 0xff00) | data;
@@ -245,37 +245,6 @@ WRITE8_MEMBER(dec8_state::lastmisn_i8751_w)
}
}
-WRITE8_MEMBER(dec8_state::shackled_i8751_w)
-{
- m_i8751_return = 0;
-
- switch (offset)
- {
- case 0: /* High byte */
- m_i8751_value = (m_i8751_value & 0xff) | (data << 8);
- m_subcpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE); /* Signal sub cpu */
- break;
- case 1: /* Low byte */
- m_i8751_value = (m_i8751_value & 0xff00) | data;
- break;
- }
-
- /* Coins are controlled by the i8751 */
- if (/*(ioport("IN2")->read() & 3) == 3*/!m_latch) { m_latch = 1; m_coin1 = m_coin2 = 0; }
- if ((ioport("IN2")->read() & 1) != 1 && m_latch) { m_coin1 = 1; m_latch = 0; }
- if ((ioport("IN2")->read() & 2) != 2 && m_latch) { m_coin2 = 1; m_latch = 0; }
-
- if (m_i8751_value == 0x0102) m_i8751_return = 0; /* ??? */
- if (m_i8751_value == 0x0101) m_i8751_return = 0; /* ??? */
- if (m_i8751_value == 0x0400) m_i8751_return = 0; /* ??? */
-
- if (m_i8751_value == 0x0050) m_i8751_return = 0; /* Japanese version (Breywood) ID */
- if (m_i8751_value == 0x0051) m_i8751_return = 0; /* US version (Shackled) ID */
-
- if (m_i8751_value == 0x8101) m_i8751_return = ((((m_coin2 / 10) << 4) | (m_coin2 % 10)) << 0) |
- ((((m_coin1 / 10) << 4) | (m_coin1 % 10)) << 8); /* Coins */
-}
-
WRITE8_MEMBER(dec8_state::csilver_i8751_w)
{
/* Japan coinage first, then World coinage - US coinage shall be the same as the Japan one */
@@ -290,7 +259,7 @@ WRITE8_MEMBER(dec8_state::csilver_i8751_w)
{
case 0: /* High byte */
m_i8751_value = (m_i8751_value & 0xff) | (data << 8);
- m_maincpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
+ m_maincpu->set_input_line(M6809_FIRQ_LINE, ASSERT_LINE); /* Signal main cpu */
break;
case 1: /* Low byte */
m_i8751_value = (m_i8751_value & 0xff00) | data;
@@ -401,7 +370,7 @@ WRITE8_MEMBER(dec8_state::csilver_control_w)
WRITE8_MEMBER(dec8_state::dec8_sound_w)
{
m_soundlatch->write(space, 0, data);
- m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
+ m_audiocpu->set_input_line(m6502_device::NMI_LINE, ASSERT_LINE);
m_m6502_timer->adjust(m_audiocpu->cycles_to_attotime(3));
}
@@ -409,7 +378,7 @@ WRITE_LINE_MEMBER(dec8_state::csilver_adpcm_int)
{
m_toggle ^= 1;
if (m_toggle)
- m_audiocpu->set_input_line(M6502_IRQ_LINE, HOLD_LINE);
+ m_audiocpu->set_input_line(m6502_device::IRQ_LINE, HOLD_LINE);
m_msm->data_w(m_msm5205next >> 4);
m_msm5205next <<= 4;
@@ -433,46 +402,34 @@ WRITE8_MEMBER(dec8_state::csilver_sound_bank_w)
/******************************************************************************/
-WRITE8_MEMBER(dec8_state::oscar_int_w)
+WRITE8_MEMBER(dec8_state::main_irq_on_w)
{
- /* Deal with interrupts, coins also generate NMI to CPU 0 */
- switch (offset)
- {
- case 0: /* IRQ2 */
- m_subcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
- return;
- case 1: /* IRC 1 */
- m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
- return;
- case 2: /* IRQ 1 */
- m_maincpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
- return;
- case 3: /* IRC 2 */
- m_subcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
- return;
- }
+ m_maincpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
}
-/* Used by Shackled, Last Mission, Captain Silver */
-WRITE8_MEMBER(dec8_state::shackled_int_w)
+WRITE8_MEMBER(dec8_state::main_irq_off_w)
{
- switch (offset)
- {
- case 0: /* CPU 2 - IRQ acknowledge */
- m_subcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
- return;
- case 1: /* CPU 1 - IRQ acknowledge */
- m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
- return;
- case 2: /* i8751 - FIRQ acknowledge */
- return;
- case 3: /* IRQ 1 */
- m_maincpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
- return;
- case 4: /* IRQ 2 */
- m_subcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
- return;
- }
+ m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
+}
+
+WRITE8_MEMBER(dec8_state::main_firq_off_w)
+{
+ m_maincpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE);
+}
+
+WRITE8_MEMBER(dec8_state::sub_irq_on_w)
+{
+ m_subcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
+}
+
+WRITE8_MEMBER(dec8_state::sub_irq_off_w)
+{
+ m_subcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
+}
+
+WRITE8_MEMBER(dec8_state::sub_firq_off_w)
+{
+ m_subcpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE);
}
/******************************************************************************/
@@ -486,12 +443,11 @@ void dec8_state::lastmisn_map(address_map &map)
map(0x0000, 0x0fff).ram().share("share1");
map(0x1000, 0x13ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8)).share("palette");
map(0x1400, 0x17ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8_ext)).share("palette_ext");
- map(0x1800, 0x1800).portr("IN0");
- map(0x1801, 0x1801).portr("IN1");
- map(0x1802, 0x1802).portr("IN2");
- map(0x1803, 0x1803).portr("DSW0"); /* Dip 1 */
- map(0x1804, 0x1804).portr("DSW1"); /* Dip 2 */
- map(0x1800, 0x1804).w(this, FUNC(dec8_state::shackled_int_w));
+ map(0x1800, 0x1800).portr("IN0").w(this, FUNC(dec8_state::sub_irq_off_w));
+ map(0x1801, 0x1801).portr("IN1").w(this, FUNC(dec8_state::main_irq_off_w));
+ map(0x1802, 0x1802).portr("IN2").w(this, FUNC(dec8_state::main_firq_off_w));
+ map(0x1803, 0x1803).portr("DSW0").w(this, FUNC(dec8_state::main_irq_on_w));
+ map(0x1804, 0x1804).portr("DSW1").w(this, FUNC(dec8_state::sub_irq_on_w));
map(0x1805, 0x1805).w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* DMA */
map(0x1806, 0x1806).r(this, FUNC(dec8_state::i8751_h_r));
map(0x1807, 0x1807).rw(this, FUNC(dec8_state::i8751_l_r), FUNC(dec8_state::flip_screen_w));
@@ -513,12 +469,11 @@ void dec8_state::lastmisn_sub_map(address_map &map)
map(0x0000, 0x0fff).ram().share("share1");
map(0x1000, 0x13ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8)).share("palette");
map(0x1400, 0x17ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8_ext)).share("palette_ext");
- map(0x1800, 0x1800).portr("IN0");
- map(0x1801, 0x1801).portr("IN1");
- map(0x1802, 0x1802).portr("IN2");
- map(0x1803, 0x1803).portr("DSW0"); /* Dip 1 */
- map(0x1804, 0x1804).portr("DSW1"); /* Dip 2 */
- map(0x1800, 0x1804).w(this, FUNC(dec8_state::shackled_int_w));
+ map(0x1800, 0x1800).portr("IN0").w(this, FUNC(dec8_state::sub_irq_off_w));
+ map(0x1801, 0x1801).portr("IN1").w(this, FUNC(dec8_state::main_irq_off_w));
+ map(0x1802, 0x1802).portr("IN2").w(this, FUNC(dec8_state::main_firq_off_w));
+ map(0x1803, 0x1803).portr("DSW0").w(this, FUNC(dec8_state::main_irq_on_w));
+ map(0x1804, 0x1804).portr("DSW1").w(this, FUNC(dec8_state::sub_irq_on_w));
map(0x1805, 0x1805).w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* DMA */
map(0x1807, 0x1807).w(this, FUNC(dec8_state::flip_screen_w));
map(0x180c, 0x180c).w(this, FUNC(dec8_state::dec8_sound_w));
@@ -534,12 +489,11 @@ void dec8_state::shackled_map(address_map &map)
map(0x0000, 0x0fff).ram().share("share1");
map(0x1000, 0x13ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8)).share("palette");
map(0x1400, 0x17ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8_ext)).share("palette_ext");
- map(0x1800, 0x1800).portr("IN0");
- map(0x1801, 0x1801).portr("IN1");
- map(0x1802, 0x1802).portr("IN2");
- map(0x1803, 0x1803).portr("DSW0");
- map(0x1804, 0x1804).portr("DSW1");
- map(0x1800, 0x1804).w(this, FUNC(dec8_state::shackled_int_w));
+ map(0x1800, 0x1800).portr("IN0").w(this, FUNC(dec8_state::sub_irq_off_w));
+ map(0x1801, 0x1801).portr("IN1").w(this, FUNC(dec8_state::main_irq_off_w));
+ map(0x1802, 0x1802).portr("IN2").w(this, FUNC(dec8_state::sub_firq_off_w));
+ map(0x1803, 0x1803).portr("DSW0").w(this, FUNC(dec8_state::main_irq_on_w));
+ map(0x1804, 0x1804).portr("DSW1").w(this, FUNC(dec8_state::sub_irq_on_w));
map(0x1805, 0x1805).w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* DMA */
map(0x1807, 0x1807).w(this, FUNC(dec8_state::flip_screen_w));
map(0x1809, 0x1809).w(this, FUNC(dec8_state::lastmisn_scrollx_w)); /* Scroll LSB */
@@ -559,12 +513,11 @@ void dec8_state::shackled_sub_map(address_map &map)
map(0x0000, 0x0fff).ram().share("share1");
map(0x1000, 0x13ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8)).share("palette");
map(0x1400, 0x17ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8_ext)).share("palette_ext");
- map(0x1800, 0x1800).portr("IN0");
- map(0x1801, 0x1801).portr("IN1");
- map(0x1802, 0x1802).portr("IN2");
- map(0x1803, 0x1803).portr("DSW0");
- map(0x1804, 0x1804).portr("DSW1");
- map(0x1800, 0x1804).w(this, FUNC(dec8_state::shackled_int_w));
+ map(0x1800, 0x1800).portr("IN0").w(this, FUNC(dec8_state::sub_irq_off_w));
+ map(0x1801, 0x1801).portr("IN1").w(this, FUNC(dec8_state::main_irq_off_w));
+ map(0x1802, 0x1802).portr("IN2").w(this, FUNC(dec8_state::sub_firq_off_w));
+ map(0x1803, 0x1803).portr("DSW0").w(this, FUNC(dec8_state::main_irq_on_w));
+ map(0x1804, 0x1804).portr("DSW1").w(this, FUNC(dec8_state::sub_irq_on_w));
map(0x1805, 0x1805).w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* DMA */
map(0x1806, 0x1806).r(this, FUNC(dec8_state::i8751_h_r));
map(0x1807, 0x1807).rw(this, FUNC(dec8_state::i8751_l_r), FUNC(dec8_state::flip_screen_w));
@@ -572,7 +525,7 @@ void dec8_state::shackled_sub_map(address_map &map)
map(0x180b, 0x180b).w(this, FUNC(dec8_state::lastmisn_scrolly_w)); /* Scroll LSB */
map(0x180c, 0x180c).w(this, FUNC(dec8_state::dec8_sound_w));
map(0x180d, 0x180d).w(this, FUNC(dec8_state::shackled_control_w)); /* Bank switch + Scroll MSB */
- map(0x180e, 0x180f).w(this, FUNC(dec8_state::shackled_i8751_w));
+ map(0x180e, 0x180f).w(this, FUNC(dec8_state::dec8_i8751_w));
map(0x2000, 0x27ff).ram().w(this, FUNC(dec8_state::dec8_videoram_w)).share("videoram");
map(0x2800, 0x2fff).ram().share("spriteram");
map(0x3000, 0x37ff).ram().share("share2");
@@ -657,11 +610,11 @@ void dec8_state::csilver_map(address_map &map)
map(0x0000, 0x0fff).ram().share("share1");
map(0x1000, 0x13ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8)).share("palette");
map(0x1400, 0x17ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8_ext)).share("palette_ext");
- map(0x1800, 0x1800).portr("IN1");
- map(0x1801, 0x1801).portr("IN0");
- map(0x1803, 0x1803).portr("IN2");
- map(0x1804, 0x1804).portr("DSW1"); /* Dip 2 */
- map(0x1800, 0x1804).w(this, FUNC(dec8_state::shackled_int_w));
+ map(0x1800, 0x1800).portr("IN1").w(this, FUNC(dec8_state::sub_irq_off_w));
+ map(0x1801, 0x1801).portr("IN0").w(this, FUNC(dec8_state::main_irq_off_w));
+ map(0x1802, 0x1802).w(this, FUNC(dec8_state::main_firq_off_w));
+ map(0x1803, 0x1803).portr("IN2").w(this, FUNC(dec8_state::main_irq_on_w));
+ map(0x1804, 0x1804).portr("DSW1").w(this, FUNC(dec8_state::sub_irq_on_w));
map(0x1805, 0x1805).portr("DSW0").w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* Dip 1, DMA */
map(0x1807, 0x1807).w(this, FUNC(dec8_state::flip_screen_w));
map(0x1808, 0x180b).w(this, FUNC(dec8_state::dec8_scroll2_w));
@@ -683,9 +636,11 @@ void dec8_state::csilver_sub_map(address_map &map)
map(0x0000, 0x0fff).ram().share("share1");
map(0x1000, 0x13ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8)).share("palette");
map(0x1400, 0x17ff).ram().w(m_palette, FUNC(deco_rmc3_device::write8_ext)).share("palette_ext");
- map(0x1803, 0x1803).portr("IN2");
- map(0x1804, 0x1804).portr("DSW1");
- map(0x1800, 0x1804).w(this, FUNC(dec8_state::shackled_int_w));
+ map(0x1800, 0x1800).w(this, FUNC(dec8_state::sub_irq_off_w));
+ map(0x1801, 0x1801).w(this, FUNC(dec8_state::main_irq_off_w));
+ map(0x1802, 0x1802).w(this, FUNC(dec8_state::main_firq_off_w));
+ map(0x1803, 0x1803).portr("IN2").w(this, FUNC(dec8_state::main_irq_on_w));
+ map(0x1804, 0x1804).portr("DSW1").w(this, FUNC(dec8_state::sub_irq_on_w));
map(0x1805, 0x1805).portr("DSW0").w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* DMA */
map(0x180c, 0x180c).w(this, FUNC(dec8_state::dec8_sound_w));
map(0x2000, 0x27ff).ram().w(this, FUNC(dec8_state::dec8_videoram_w)).share("videoram");
@@ -713,9 +668,12 @@ void dec8_state::oscar_map(address_map &map)
map(0x3c10, 0x3c1f).w("tilegen1", FUNC(deco_bac06_device::pf_control1_8bit_w));
map(0x3c80, 0x3c80).w(this, FUNC(dec8_state::dec8_mxc06_karn_buffer_spriteram_w)); /* DMA */
map(0x3d00, 0x3d00).w(this, FUNC(dec8_state::dec8_bank_w)); /* BNKS */
- map(0x3d80, 0x3d80).w(this, FUNC(dec8_state::dec8_sound_w)); /* SOUN */
- map(0x3e00, 0x3e00).nopw(); /* COINCL */
- map(0x3e80, 0x3e83).w(this, FUNC(dec8_state::oscar_int_w));
+ map(0x3d80, 0x3d80).w(m_soundlatch, FUNC(generic_latch_8_device::write)); /* SOUN */
+ map(0x3e00, 0x3e00).w(this, FUNC(dec8_state::oscar_coin_clear_w)); /* COINCL */
+ map(0x3e80, 0x3e80).w(this, FUNC(dec8_state::sub_irq_on_w)); /* IRQ 2 */
+ map(0x3e81, 0x3e81).w(this, FUNC(dec8_state::main_irq_off_w)); /* IRC 1 */
+ map(0x3e82, 0x3e82).w(this, FUNC(dec8_state::main_irq_on_w)); /* IRQ 1 */
+ map(0x3e83, 0x3e83).w(this, FUNC(dec8_state::sub_irq_off_w)); /* IRC 2 */
map(0x4000, 0x7fff).bankr("mainbank");
map(0x8000, 0xffff).rom();
}
@@ -725,7 +683,10 @@ void dec8_state::oscar_sub_map(address_map &map)
map(0x0000, 0x0eff).ram().share("share1");
map(0x0f00, 0x0fff).ram();
map(0x1000, 0x1fff).ram().share("share2");
- map(0x3e80, 0x3e83).w(this, FUNC(dec8_state::oscar_int_w));
+ map(0x3e80, 0x3e80).w(this, FUNC(dec8_state::sub_irq_on_w)); /* IRQ 2 */
+ map(0x3e81, 0x3e81).w(this, FUNC(dec8_state::main_irq_off_w)); /* IRC 1 */
+ map(0x3e82, 0x3e82).w(this, FUNC(dec8_state::main_irq_on_w)); /* IRQ 1 */
+ map(0x3e83, 0x3e83).w(this, FUNC(dec8_state::sub_irq_off_w)); /* IRC 2 */
map(0x4000, 0xffff).rom();
}
@@ -877,6 +838,30 @@ WRITE8_MEMBER(dec8_state::gondo_mcu_to_main_w)
m_i8751_p2 = data;
}
+WRITE8_MEMBER(dec8_state::shackled_mcu_to_main_w)
+{
+ // P2 - controls latches for main CPU communication
+ if ((data&0x10)==0)
+ m_i8751_port0 = m_i8751_value>>8;
+ if ((data&0x20)==0)
+ m_i8751_port1 = m_i8751_value&0xff;
+ if ((data&0x40)==0)
+ m_i8751_return = (m_i8751_return & 0xff) | (m_i8751_port0 << 8);
+ if ((data&0x80)==0)
+ m_i8751_return = (m_i8751_return & 0xff00) | m_i8751_port1;
+
+ // P2 - IRQ to main CPU
+ if (BIT(data, 2) && !BIT(m_i8751_p2, 2))
+ m_subcpu->set_input_line(M6809_FIRQ_LINE, ASSERT_LINE);
+
+ if (!BIT(data, 0))
+ m_mcu->set_input_line(MCS51_INT0_LINE, CLEAR_LINE);
+ if (!BIT(data, 1))
+ m_mcu->set_input_line(MCS51_INT1_LINE, CLEAR_LINE);
+
+ m_i8751_p2 = data;
+}
+
/*
Super Real Darwin is similar but only appears to have a single port
*/
@@ -903,7 +888,7 @@ WRITE8_MEMBER(dec8_state::srdarwin_mcu_to_main_w)
// guess, toggled after above.
if ((data&0x02)==0)
- m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
+ m_maincpu->set_input_line(MCS51_INT1_LINE, CLEAR_LINE);
}
/******************************************************************************/
@@ -1028,15 +1013,21 @@ static INPUT_PORTS_START( shackled )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN2")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) // coins read through MCU
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) // coins read through MCU
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) // tested and discarded by vestigial code at start
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
+ PORT_START("I8751")
+ PORT_BIT( 0x1f, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_WRITE_LINE_DEVICE_MEMBER("coin", input_merger_device, in_w<0>)
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_WRITE_LINE_DEVICE_MEMBER("coin", input_merger_device, in_w<1>)
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_WRITE_LINE_DEVICE_MEMBER("coin", input_merger_device, in_w<2>)
+
PORT_START("DSW0")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
@@ -1493,9 +1484,9 @@ static INPUT_PORTS_START( oscar )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
PORT_START("IN2")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* always adds 1 credit */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_WRITE_LINE_DEVICE_MEMBER("coin", input_merger_device, in_w<0>)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_WRITE_LINE_DEVICE_MEMBER("coin", input_merger_device, in_w<1>)
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_WRITE_LINE_DEVICE_MEMBER("coin", input_merger_device, in_w<2>)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1873,14 +1864,23 @@ GFXDECODE_END
/******************************************************************************/
/* Coins generate NMI's */
-INTERRUPT_GEN_MEMBER(dec8_state::oscar_interrupt)
+WRITE_LINE_MEMBER(dec8_state::oscar_coin_irq)
{
- if ((ioport("IN2")->read() & 0x7) == 0x7) m_latch = 1;
- if (m_latch && (ioport("IN2")->read() & 0x7) != 0x7)
- {
- m_latch = 0;
- device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
- }
+ if (state && !m_coin_state)
+ m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
+ m_coin_state = bool(state);
+}
+
+WRITE8_MEMBER(dec8_state::oscar_coin_clear_w)
+{
+ m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
+}
+
+WRITE_LINE_MEMBER(dec8_state::shackled_coin_irq)
+{
+ if (state && !m_coin_state)
+ m_mcu->set_input_line(MCS51_INT0_LINE, ASSERT_LINE);
+ m_coin_state = bool(state);
}
/******************************************************************************/
@@ -1895,6 +1895,7 @@ void dec8_state::machine_start()
save_item(NAME(m_secclr));
save_item(NAME(m_i8751_p2));
save_item(NAME(m_latch));
+ save_item(NAME(m_coin_state));
save_item(NAME(m_i8751_port0));
save_item(NAME(m_i8751_port1));
save_item(NAME(m_i8751_return));
@@ -1995,7 +1996,7 @@ MACHINE_CONFIG_START(dec8_state::lastmisn)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3526, 3000000)
- MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2012,9 +2013,20 @@ MACHINE_CONFIG_START(dec8_state::shackled)
MCFG_CPU_PROGRAM_MAP(ym3526_s_map)
/* NMIs are caused by the main CPU */
+ MCFG_CPU_ADD("mcu", I8751, XTAL(8'000'000))
+ MCFG_MCS51_PORT_P0_IN_CB(READ8(dec8_state, i8751_port0_r))
+ MCFG_MCS51_PORT_P0_OUT_CB(WRITE8(dec8_state, i8751_port0_w))
+ MCFG_MCS51_PORT_P1_IN_CB(READ8(dec8_state, i8751_port1_r))
+ MCFG_MCS51_PORT_P1_OUT_CB(WRITE8(dec8_state, i8751_port1_w))
+ MCFG_MCS51_PORT_P2_OUT_CB(WRITE8(dec8_state, shackled_mcu_to_main_w))
+ MCFG_MCS51_PORT_P3_IN_CB(IOPORT("I8751"))
+
// MCFG_QUANTUM_TIME(attotime::from_hz(100000))
MCFG_QUANTUM_PERFECT_CPU("maincpu") // needs heavy sync, otherwise one of the two CPUs will miss an irq and makes the game to hang
+ MCFG_INPUT_MERGER_ANY_LOW("coin")
+ MCFG_INPUT_MERGER_OUTPUT_HANDLER(WRITELINE(dec8_state, shackled_coin_irq))
+
/* video hardware */
MCFG_BUFFERED_SPRITERAM8_ADD("spriteram")
@@ -2049,7 +2061,7 @@ MACHINE_CONFIG_START(dec8_state::shackled)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3526, 3000000)
- MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2110,7 +2122,7 @@ MACHINE_CONFIG_START(dec8_state::gondo)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3526, 3000000)
- MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2171,7 +2183,7 @@ MACHINE_CONFIG_START(dec8_state::garyoret)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3526, 3000000)
- MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2231,7 +2243,7 @@ MACHINE_CONFIG_START(dec8_state::ghostb)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3812, 3000000)
- MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2291,7 +2303,7 @@ MACHINE_CONFIG_START(dec8_state::csilver)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3526, XTAL(12'000'000)/4) /* verified on pcb */
- MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MCFG_SOUND_ADD("msm", MSM5205, XTAL(384'000)) /* verified on pcb */
@@ -2305,16 +2317,17 @@ MACHINE_CONFIG_START(dec8_state::oscar)
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD6309, XTAL(12'000'000)/2) /* PCB seen both HD6309 or MC6809, clock verified on pcb */
MCFG_CPU_PROGRAM_MAP(oscar_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", dec8_state, oscar_interrupt)
MCFG_CPU_ADD("sub", HD6309, XTAL(12'000'000)/2) /* PCB seen both HD6309 or MC6809, clock verified on pcb */
MCFG_CPU_PROGRAM_MAP(oscar_sub_map)
- MCFG_CPU_ADD("audiocpu", DECO_222, XTAL(12'000'000)/8)
+ MCFG_CPU_ADD("audiocpu", DECO_222, XTAL(12'000'000)/8) // IC labeled "C10707-1"
MCFG_CPU_PROGRAM_MAP(oscar_s_map)
/* NMIs are caused by the main CPU */
MCFG_QUANTUM_TIME(attotime::from_hz(2400)) /* 40 CPU slices per frame */
+ MCFG_INPUT_MERGER_ANY_LOW("coin") // 1S1588 x3 (D1-D3) + RCDM-I5
+ MCFG_INPUT_MERGER_OUTPUT_HANDLER(WRITELINE(dec8_state, oscar_coin_irq))
/* video hardware */
MCFG_BUFFERED_SPRITERAM8_ADD("spriteram")
@@ -2346,6 +2359,7 @@ MACHINE_CONFIG_START(dec8_state::oscar)
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
+ MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("audiocpu", m6502_device::NMI_LINE))
MCFG_SOUND_ADD("ym1", YM2203, XTAL(12'000'000)/8) /* verified on pcb */
MCFG_SOUND_ROUTE(0, "mono", 0.23)
@@ -2354,7 +2368,7 @@ MACHINE_CONFIG_START(dec8_state::oscar)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3526, XTAL(12'000'000)/4) /* verified on pcb */
- MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3526_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2407,7 +2421,7 @@ MACHINE_CONFIG_START(dec8_state::srdarwin)
MCFG_SOUND_ROUTE(3, "mono", 0.20)
MCFG_SOUND_ADD("ym2", YM3812, 3000000)
- MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2464,7 +2478,7 @@ MACHINE_CONFIG_START(dec8_state::cobracom)
MCFG_SOUND_ROUTE(3, "mono", 0.50)
MCFG_SOUND_ADD("ym2", YM3812, 3000000)
- MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", M6502_IRQ_LINE))
+ MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", m6502_device::IRQ_LINE))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
MACHINE_CONFIG_END
@@ -2593,8 +2607,8 @@ ROM_START( shackled )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "dk-07.5h", 0x08000, 0x08000, CRC(887e4bcc) SHA1(6427396080e9cd8647adff47c8ed04593a14268c) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
- ROM_LOAD( "dk.18a", 0x0000, 0x1000, NO_DUMP )
+ ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H (fake) MCU (based on 'breywood' with ID byte changed from 00 to 01) */
+ ROM_LOAD( "dk.18a", 0x0000, 0x1000, CRC(1af06149) SHA1(b9cb2a4986dbcfc78b0cbea2c1e2bdac1db479cd) BAD_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "dk-00.2a", 0x00000, 0x08000, CRC(69b975aa) SHA1(38cb96768c79ff1aa1b4b190e08ec9155baf698a) )
@@ -2635,7 +2649,7 @@ ROM_START( breywood )
ROM_LOAD( "dj07-1.5h", 0x8000, 0x8000, CRC(4a471c38) SHA1(963ed7b6afeefdfc2cf0d65b0998f973330e6495) )
ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
- ROM_LOAD( "dj.18a", 0x0000, 0x1000, NO_DUMP )
+ ROM_LOAD( "dj.18a", 0x0000, 0x1000, CRC(4cb20332) SHA1(e0bbba7be22e7bcff82fb0ae441410e559ec4566) )
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "dj-00.2a", 0x00000, 0x08000, CRC(815a891a) SHA1(e557d6a35821a8589d9e3df0f42131b58b08c8ca) )
@@ -3341,9 +3355,6 @@ ROM_START( oscar )
ROM_REGION( 2*0x10000, "audiocpu", 0 ) /* 64K for sound CPU + 64k for decrypted opcodes */
ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
- ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
-
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "ed08", 0x00000, 0x04000, CRC(308ac264) SHA1(fd1c4ec4e4f99c33e93cd15e178c4714251a9b7e) )
@@ -3371,9 +3382,6 @@ ROM_START( oscaru )
ROM_REGION( 2*0x10000, "audiocpu", 0 ) /* 64K for sound CPU + 64k for decrypted opcodes */
ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
- ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
-
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "ed08", 0x00000, 0x04000, CRC(308ac264) SHA1(fd1c4ec4e4f99c33e93cd15e178c4714251a9b7e) )
@@ -3404,9 +3412,6 @@ ROM_START( oscarj1 )
ROM_REGION( 2*0x10000, "audiocpu", 0 ) /* 64K for sound CPU + 64k for decrypted opcodes */
ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
- ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
-
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "ed08", 0x00000, 0x04000, CRC(308ac264) SHA1(fd1c4ec4e4f99c33e93cd15e178c4714251a9b7e) )
@@ -3437,9 +3442,6 @@ ROM_START( oscarj2 )
ROM_REGION( 2*0x10000, "audiocpu", 0 ) /* 64K for sound CPU + 64k for decrypted opcodes */
ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* ID8751H MCU */
- ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
-
ROM_REGION( 0x08000, "gfx1", 0 ) /* characters */
ROM_LOAD( "ed08", 0x00000, 0x04000, CRC(308ac264) SHA1(fd1c4ec4e4f99c33e93cd15e178c4714251a9b7e) )
diff --git a/src/mame/drivers/docastle.cpp b/src/mame/drivers/docastle.cpp
index e7ecfb0e410..927eaa7fbe2 100644
--- a/src/mame/drivers/docastle.cpp
+++ b/src/mame/drivers/docastle.cpp
@@ -178,6 +178,24 @@ WRITE_LINE_MEMBER(docastle_state::docastle_tint)
}
}
+WRITE_LINE_MEMBER(docastle_state::stx_on_w)
+{
+ if (state)
+ {
+ m_maincpu->set_input_line(0, ASSERT_LINE);
+ m_cpu3->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
+ }
+}
+
+WRITE_LINE_MEMBER(docastle_state::stx_off_w)
+{
+ if (!state)
+ {
+ m_maincpu->set_input_line(0, CLEAR_LINE);
+ m_cpu3->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
+ }
+}
+
WRITE_LINE_MEMBER(docastle_state::idsoccer_adpcm_int)
{
if (m_adpcm_pos >= memregion("adpcm")->bytes())
@@ -584,14 +602,12 @@ MACHINE_CONFIG_START(docastle_state::docastle)
MCFG_CPU_ADD("maincpu", Z80, XTAL(4'000'000))
MCFG_CPU_PROGRAM_MAP(docastle_map)
MCFG_CPU_IO_MAP(docastle_io_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", docastle_state, irq0_line_hold)
MCFG_CPU_ADD("slave", Z80, XTAL(4'000'000))
MCFG_CPU_PROGRAM_MAP(docastle_map2)
MCFG_CPU_ADD("cpu3", Z80, XTAL(4'000'000))
MCFG_CPU_PROGRAM_MAP(docastle_map3)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", docastle_state, nmi_line_pulse)
MCFG_DEVICE_ADD("inp1", TMS1025, 0)
MCFG_TMS1025_READ_PORT_CB(PORT1, IOPORT("DSW2"))
@@ -621,6 +637,8 @@ MACHINE_CONFIG_START(docastle_state::docastle)
MCFG_MC6845_VISAREA_ADJUST(8,-8,0,0)
MCFG_MC6845_CHAR_WIDTH(8)
MCFG_MC6845_OUT_HSYNC_CB(WRITELINE(docastle_state, docastle_tint))
+ MCFG_MC6845_OUT_CUR_CB(WRITELINE(docastle_state, stx_on_w))
+ MCFG_MC6845_OUT_DE_CB(WRITELINE(docastle_state, stx_off_w))
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL(9'828'000)/2, 0x138, 8, 0x100-8, 0x108, 0, 0xc0) // from crtc
diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp
index 9dbbf59aac6..d6124e9072a 100644
--- a/src/mame/drivers/goldstar.cpp
+++ b/src/mame/drivers/goldstar.cpp
@@ -10782,20 +10782,34 @@ ROM_START( jkrmast )
ROM_LOAD( "pid-515.u5", 0x0000, 0x10000, CRC(73caf824) SHA1(b7a7bb6190465f7c3b40f2ef97f4f6beeb89ec41) )
ROM_REGION( 0x20000, "gfx1", 0 )
+ ROM_LOAD( "2000b.u48", 0x00000, 0x20000, CRC(e7b406ec) SHA1(c0a10cf8bf5467ecfe3c90e6897db3ab9aae0127) )
+
+ ROM_REGION( 0x20000, "gfx2", 0 )
ROM_LOAD( "2000a.u41", 0x00000, 0x20000, CRC(cb8b1563) SHA1(c8c3ae646a9f3a7482d83566e4b3e18441c5d67f) )
- ROM_REGION( 0x20000, "gfx2", 0 )
- ROM_LOAD( "2000b.u48", 0x00000, 0x20000, CRC(e7b406ec) SHA1(c0a10cf8bf5467ecfe3c90e6897db3ab9aae0127) )
+ ROM_REGION( 0x200, "proms", 0 )
+ ROM_LOAD( "n82s147a.u13", 0x0000, 0x0200, CRC(da92f0ae) SHA1(1269a2029e689a5f111c57e80825b3756b50521e) )
- ROM_REGION( 0x10000, "user1", ROMREGION_ERASE00 )
+ ROM_REGION( 0x100, "proms2", 0 )
ROM_LOAD( "n82s129.u28", 0x0000, 0x0100, CRC(cfb152cf) SHA1(3166b9b21be4ce1d3b6fc8974c149b4ead03abac) )
- ROM_LOAD( "n82s147a.u13", 0x0100, 0x0200, CRC(da92f0ae) SHA1(1269a2029e689a5f111c57e80825b3756b50521e) )
+ROM_END
- ROM_REGION( 0x200, "proms", ROMREGION_ERASE00 )
+ROM_START( jkrmasta )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pid-513.u5", 0x0000, 0x10000, CRC(12fa7ea0) SHA1(71ee141fe01ae2ce9913620b52c54cf445fd0b00) )
- ROM_REGION( 0x100, "proms2", ROMREGION_ERASE00 )
-ROM_END
+ ROM_REGION( 0x20000, "gfx1", 0 )
+ ROM_LOAD( "2000b.u48", 0x00000, 0x20000, CRC(e7b406ec) SHA1(c0a10cf8bf5467ecfe3c90e6897db3ab9aae0127) )
+
+ ROM_REGION( 0x20000, "gfx2", 0 )
+ ROM_LOAD( "2000a.u41", 0x00000, 0x20000, CRC(cb8b1563) SHA1(c8c3ae646a9f3a7482d83566e4b3e18441c5d67f) )
+ ROM_REGION( 0x200, "proms", 0 )
+ ROM_LOAD( "n82s147a.u13", 0x0000, 0x0200, CRC(da92f0ae) SHA1(1269a2029e689a5f111c57e80825b3756b50521e) )
+
+ ROM_REGION( 0x100, "proms2", 0 )
+ ROM_LOAD( "n82s129.u28", 0x0000, 0x0100, CRC(cfb152cf) SHA1(3166b9b21be4ce1d3b6fc8974c149b4ead03abac) )
+ROM_END
ROM_START( pkrmast )
ROM_REGION( 0x10000, "maincpu", 0 )
@@ -16336,7 +16350,8 @@ GAMEL( 1991, cmasterh, cmaster, cm, cmasterb, cmaster_state, cmv4,
GAMEL( 199?, super7, cmaster, cm, cmaster, cmaster_state, super7, ROT0, "bootleg", "Super Seven", MACHINE_NOT_WORKING, layout_cmasterb )
GAMEL( 1991, tonypok, 0, cm, tonypok, cmaster_state, tonypok, ROT0, "Corsica", "Poker Master (Tony-Poker V3.A, hack?)", 0 , layout_tonypok )
-GAME( 199?, jkrmast, 0, pkrmast, pkrmast, goldstar_state, 0, ROT0, "<unknown>", "Joker Master", MACHINE_NOT_WORKING ) // encrypted?
+GAME( 199?, jkrmast, 0, pkrmast, pkrmast, goldstar_state, 0, ROT0, "<unknown>", "Joker Master (V515)", MACHINE_NOT_WORKING ) // encrypted
+GAME( 199?, jkrmasta, jkrmast, pkrmast, pkrmast, goldstar_state, 0, ROT0, "<unknown>", "Joker Master (V512)", MACHINE_NOT_WORKING ) // encrypted
GAME( 199?, pkrmast, jkrmast, pkrmast, pkrmast, goldstar_state, 0, ROT0, "<unknown>", "Poker Master (ED-1993 set 1)", MACHINE_NOT_WORKING ) // incomplete dump + encrypted?
GAME( 1993, pkrmasta, jkrmast, pkrmast, pkrmast, goldstar_state, 0, ROT0, "<unknown>", "Poker Master (ED-1993 set 2)", MACHINE_NOT_WORKING ) // incomplete dump + encrypted?
diff --git a/src/mame/drivers/hp9k_3xx.cpp b/src/mame/drivers/hp9k_3xx.cpp
index 9af80b9fff4..ac1265e3a44 100644
--- a/src/mame/drivers/hp9k_3xx.cpp
+++ b/src/mame/drivers/hp9k_3xx.cpp
@@ -63,7 +63,8 @@
#include "bus/hp_dio/hp98544.h"
#include "bus/hp_hil/hp_hil.h"
#include "bus/hp_hil/hil_devices.h"
-#include "bus/hp_dio/hp98603.h"
+#include "bus/hp_dio/hp98603a.h"
+#include "bus/hp_dio/hp98603b.h"
#include "bus/hp_dio/hp98644.h"
#include "screen.h"
#include "speaker.h"
@@ -153,10 +154,10 @@ public:
void hp9k3xx_common(address_map &map);
void iocpu_map(address_map &map);
private:
- bool m_in_buserr;
bool m_hil_read;
uint8_t m_hil_data;
uint8_t m_latch_data;
+ uint32_t m_lastpc;
};
uint32_t hp9k3xx_state::hp_medres_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@@ -293,53 +294,43 @@ INPUT_PORTS_END
void hp9k3xx_state::machine_reset()
{
- m_in_buserr = false;
}
READ16_MEMBER(hp9k3xx_state::buserror16_r)
{
- if (!m_in_buserr)
- {
- m_in_buserr = true;
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
- m_in_buserr = false;
- }
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
+ m_lastpc = machine().device<cpu_device>("maincpu")->pc();
return 0;
}
WRITE16_MEMBER(hp9k3xx_state::buserror16_w)
{
- if (!m_in_buserr)
- {
- m_in_buserr = true;
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
- m_in_buserr = false;
+ if (m_lastpc == machine().device<cpu_device>("maincpu")->pc()) {
+ logerror("%s: ignoring r-m-w double bus error\n", __FUNCTION__);
+ return;
}
+
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
}
READ32_MEMBER(hp9k3xx_state::buserror_r)
{
- if (!m_in_buserr)
- {
- m_in_buserr = true;
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
- m_in_buserr = false;
- }
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
+ m_lastpc = machine().device<cpu_device>("maincpu")->pc();
return 0;
}
WRITE32_MEMBER(hp9k3xx_state::buserror_w)
{
- if (!m_in_buserr)
- {
- m_in_buserr = true;
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
- m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
- m_in_buserr = false;
+ if (m_lastpc == machine().device<cpu_device>("maincpu")->pc()) {
+ logerror("%s: ignoring r-m-w double bus error\n", __FUNCTION__);
+ return;
}
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
}
WRITE8_MEMBER(hp9k3xx_state::iocpu_port1_w)
@@ -383,7 +374,8 @@ READ8_MEMBER(hp9k3xx_state::iocpu_test0_r)
static SLOT_INTERFACE_START(dio16_cards)
SLOT_INTERFACE("98544", HPDIO_98544) /* 98544 High Resolution Monochrome Card */
- SLOT_INTERFACE("98603", HPDIO_98603) /* 98603 ROM BASIC */
+ SLOT_INTERFACE("98603a", HPDIO_98603A) /* 98603A ROM BASIC (4.0) */
+ SLOT_INTERFACE("98603b", HPDIO_98603B) /* 98603B ROM BASIC (5.1) */
SLOT_INTERFACE("98644", HPDIO_98644) /* 98644 Async serial interface */
SLOT_INTERFACE_END
@@ -412,7 +404,7 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k310)
MCFG_DEVICE_ADD("diobus", DIO16, 0)
MCFG_DIO16_CPU(":maincpu")
MCFG_DIO16_SLOT_ADD("diobus", "sl1", dio16_cards, "98544", true)
- MCFG_DIO16_SLOT_ADD("diobus", "sl2", dio16_cards, "98603", true)
+ MCFG_DIO16_SLOT_ADD("diobus", "sl2", dio16_cards, "98603b", true)
MCFG_DIO16_SLOT_ADD("diobus", "sl3", dio16_cards, "98644", true)
MCFG_DIO16_SLOT_ADD("diobus", "sl4", dio16_cards, nullptr, false)
MACHINE_CONFIG_END
@@ -442,7 +434,7 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k320)
MCFG_DEVICE_ADD("diobus", DIO32, 0)
MCFG_DIO32_CPU(":maincpu")
MCFG_DIO32_SLOT_ADD("diobus", "sl1", dio16_cards, "98544", true)
- MCFG_DIO16_SLOT_ADD("diobus", "sl2", dio16_cards, "98603", true)
+ MCFG_DIO16_SLOT_ADD("diobus", "sl2", dio16_cards, "98603b", true)
MCFG_DIO16_SLOT_ADD("diobus", "sl3", dio16_cards, "98644", true)
MCFG_DIO32_SLOT_ADD("diobus", "sl4", dio16_cards, nullptr, false)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp
index 1a53fd6f1de..82c2e91d22e 100644
--- a/src/mame/drivers/vegas.cpp
+++ b/src/mame/drivers/vegas.cpp
@@ -329,6 +329,7 @@ public:
m_uart1(*this, "uart1"),
m_uart2(*this, "uart2"),
m_io_analog(*this, "AN.%u", 0),
+ m_lamps(*this, "lamp%u", 0U),
m_a2d_shift(0)
{ }
static constexpr unsigned SYSTEM_CLOCK = 100000000;
@@ -343,6 +344,8 @@ public:
optional_device<ns16550_device> m_uart1;
optional_device<ns16550_device> m_uart2;
optional_ioport_array<8> m_io_analog;
+ output_finder<16> m_lamps;
+
int m_a2d_shift;
int8_t m_wheel_force;
int m_wheel_offset;
@@ -366,6 +369,7 @@ public:
DECLARE_DRIVER_INIT(cartfury);
DECLARE_DRIVER_INIT(tenthdeg);
DECLARE_DRIVER_INIT(nbashowt);
+ DECLARE_DRIVER_INIT(nbagold);
DECLARE_DRIVER_INIT(warfa);
DECLARE_DRIVER_INIT(roadburn);
DECLARE_DRIVER_INIT(sf2049te);
@@ -469,6 +473,8 @@ void vegas_state::machine_start()
/* set the fastest DRC options, but strict verification */
m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY + MIPS3DRC_FLUSH_PC);
+ m_lamps.resolve();
+
/* register for save states */
save_item(NAME(m_vblank_state));
save_item(NAME(m_cpuio_data));
@@ -758,6 +764,7 @@ WRITE8_MEMBER(vegas_state::sio_w)
m_dcs->reset_w(data & 0x01);
}
if ((data & (1 << 2)) && !(m_sio_reset_ctrl & (1 << 2))) {
+ logerror("sio_w: Ethernet reset\n");
m_ethernet->reset();
}
/* toggle bit 3 low to reset the VBLANK */
@@ -1094,10 +1101,10 @@ WRITE32_MEMBER(vegas_state::wheel_board_w)
case 0x1:
for (uint8_t bit = 0; bit < 8; bit++)
- machine().output().set_lamp_value(bit, (arg >> bit) & 0x1);
+ m_lamps[bit] = BIT(arg, bit);
/* leader lamp bit is included in every write, for some reason. */
- machine().output().set_lamp_value(8, (data >> 12) & 0x1);
+ m_lamps[8] = BIT(arg, 12);
break;
case 0x2:
@@ -1706,7 +1713,6 @@ ADDRESS_MAP_END
*************************************/
MACHINE_CONFIG_START(vegas_state::vegascore)
-
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", R5000LE, vegas_state::SYSTEM_CLOCK*2)
MCFG_MIPS3_ICACHE_SIZE(16384)
@@ -2382,6 +2388,10 @@ DRIVER_INIT_MEMBER(vegas_state,nbashowt)
{
}
+DRIVER_INIT_MEMBER(vegas_state,nbagold)
+{
+}
+
DRIVER_INIT_MEMBER(vegas_state,nbanfl)
{
@@ -2447,7 +2457,7 @@ GAME( 1999, roadburn1, roadburn, roadburn, roadburn, vegas_state, roadburn, ROT
/* Durango + DSIO? + Voodoo banshee */
GAME( 1998, nbashowt, 0, nbashowt, nbashowt, vegas_state, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC (ver 2.0)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
GAME( 1999, nbanfl, 0, nbanfl, nbashowt, vegas_state, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000 (ver 2.1)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
-GAME( 2000, nbagold , 0, nbagold, nbashowt, vegas_state, nbanfl, ROT0, "Midway Games", "NBA Showtime Gold / NFL Blitz 2000 (ver 3.0) (Sports Station?)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
+GAME( 2000, nbagold , 0, nbagold, nbashowt, vegas_state, nbagold, ROT0, "Midway Games", "NBA Showtime Gold / NFL Blitz 2000 (ver 3.0) (Sports Station?)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
/* Durango + Denver SIO + Voodoo 3 */
diff --git a/src/mame/drivers/x68k.cpp b/src/mame/drivers/x68k.cpp
index ed70043d831..80be6ab2c90 100644
--- a/src/mame/drivers/x68k.cpp
+++ b/src/mame/drivers/x68k.cpp
@@ -1420,7 +1420,7 @@ INPUT_PORTS_END
void x68k_state::floppy_load_unload(bool load, floppy_image_device *dev)
{
- dev->mon_w(m_fdc.motor && !load);
+ dev->mon_w(!(m_fdc.motor && load));
if(m_ioc.irqstatus & 0x02)
{
m_current_vector[1] = 0x61;
diff --git a/src/mame/includes/dec8.h b/src/mame/includes/dec8.h
index 46f05cc473e..40cc6ef178b 100644
--- a/src/mame/includes/dec8.h
+++ b/src/mame/includes/dec8.h
@@ -93,6 +93,7 @@ public:
int m_cred2;
int m_credits;
int m_latch;
+ bool m_coin_state;
int m_snd;
int m_msm5205next;
int m_toggle;
@@ -108,7 +109,6 @@ public:
DECLARE_READ8_MEMBER(gondo_player_2_r);
DECLARE_WRITE8_MEMBER(dec8_i8751_w);
DECLARE_WRITE8_MEMBER(lastmisn_i8751_w);
- DECLARE_WRITE8_MEMBER(shackled_i8751_w);
DECLARE_WRITE8_MEMBER(csilver_i8751_w);
DECLARE_WRITE8_MEMBER(dec8_bank_w);
DECLARE_WRITE8_MEMBER(ghostb_bank_w);
@@ -117,14 +117,19 @@ public:
DECLARE_WRITE8_MEMBER(dec8_sound_w);
DECLARE_WRITE8_MEMBER(csilver_adpcm_data_w);
DECLARE_WRITE8_MEMBER(csilver_sound_bank_w);
- DECLARE_WRITE8_MEMBER(oscar_int_w);
- DECLARE_WRITE8_MEMBER(shackled_int_w);
+ DECLARE_WRITE8_MEMBER(main_irq_on_w);
+ DECLARE_WRITE8_MEMBER(main_irq_off_w);
+ DECLARE_WRITE8_MEMBER(main_firq_off_w);
+ DECLARE_WRITE8_MEMBER(sub_irq_on_w);
+ DECLARE_WRITE8_MEMBER(sub_irq_off_w);
+ DECLARE_WRITE8_MEMBER(sub_firq_off_w);
DECLARE_WRITE8_MEMBER(flip_screen_w);
DECLARE_READ8_MEMBER(i8751_port0_r);
DECLARE_WRITE8_MEMBER(i8751_port0_w);
DECLARE_READ8_MEMBER(i8751_port1_r);
DECLARE_WRITE8_MEMBER(i8751_port1_w);
DECLARE_WRITE8_MEMBER(gondo_mcu_to_main_w);
+ DECLARE_WRITE8_MEMBER(shackled_mcu_to_main_w);
DECLARE_WRITE8_MEMBER(srdarwin_mcu_to_main_w);
DECLARE_WRITE8_MEMBER(dec8_bg_data_w);
DECLARE_READ8_MEMBER(dec8_bg_data_r);
@@ -170,7 +175,9 @@ public:
uint32_t screen_update_srdarwin(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
uint32_t screen_update_cobracom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(screen_vblank_dec8);
- INTERRUPT_GEN_MEMBER(oscar_interrupt);
+ DECLARE_WRITE_LINE_MEMBER(oscar_coin_irq);
+ DECLARE_WRITE8_MEMBER(oscar_coin_clear_w);
+ DECLARE_WRITE_LINE_MEMBER(shackled_coin_irq);
void srdarwin_draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect, int pri );
DECLARE_WRITE_LINE_MEMBER(csilver_adpcm_int);
diff --git a/src/mame/includes/docastle.h b/src/mame/includes/docastle.h
index 49ea20cf671..34ea0e27bdb 100644
--- a/src/mame/includes/docastle.h
+++ b/src/mame/includes/docastle.h
@@ -77,6 +77,8 @@ public:
void video_start_common( uint32_t tile_transmask );
void draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect );
DECLARE_WRITE_LINE_MEMBER(docastle_tint);
+ DECLARE_WRITE_LINE_MEMBER(stx_on_w);
+ DECLARE_WRITE_LINE_MEMBER(stx_off_w);
DECLARE_WRITE_LINE_MEMBER(idsoccer_adpcm_int);
void dorunrun(machine_config &config);
void idsoccer(machine_config &config);
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index b6fc19f009d..c48f2b57d77 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -14138,6 +14138,7 @@ goldfrui // bootleg
goldstar // (c) 198? IGS
goldstbl // (c) 198? IGS
jkrmast // (c) 199? unknown
+jkrmasta // (c) 199? unknown
kkotnoli // 198? south korean hack
ladylinr // (c) 198? TAB Austria
lucky8 // (c) 1989 Wing Co. Ltd