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-rw-r--r--src/emu/cpu/scudsp/scudsp.c183
-rw-r--r--src/emu/cpu/scudsp/scudsp.h18
-rw-r--r--src/emu/cpu/scudsp/scudspdasm.c321
-rw-r--r--src/emu/machine/saturn.c26
-rw-r--r--src/mame/drivers/stv.c8
-rw-r--r--src/mess/drivers/pc9801.c4
-rw-r--r--src/mess/drivers/saturn.c2
7 files changed, 536 insertions, 26 deletions
diff --git a/src/emu/cpu/scudsp/scudsp.c b/src/emu/cpu/scudsp/scudsp.c
index b4ca54104ec..ccd331c3cf4 100644
--- a/src/emu/cpu/scudsp/scudsp.c
+++ b/src/emu/cpu/scudsp/scudsp.c
@@ -13,7 +13,6 @@
const device_type SCUDSP = &device_creator<scudsp_cpu_device>;
-
/* FLAGS */
#define PRF m_flags & 0x04000000
#define EPF m_flags & 0x02000000
@@ -27,14 +26,117 @@ const device_type SCUDSP = &device_creator<scudsp_cpu_device>;
#define EXF m_flags & 0x00010000 // execute flag (basically tied to RESET pin)
#define LEF m_flags & 0x00008000 // change PC value
+#define FLAGS_MASK 0x06ff8000
+
+#define scudsp_readop(A) m_program->read_dword(A << 2)
+#define scudsp_writeop(A, B) m_program->write_dword(A << 2, B)
+#define scudsp_readmem(A,MD) m_data->read_dword((A | MD << 6) << 2)
+#define scudsp_writemem(A,MD,B) m_data->write_dword((A | MD << 6) << 2, B)
+
+UINT32 scudsp_cpu_device::scudsp_get_source_mem_value(UINT8 mode)
+{
+ UINT32 value = 0;
+
+ switch( mode )
+ {
+ case 0x0: /* M0 */
+ value = scudsp_readmem(m_ct0,0);
+ break;
+ case 0x1: /* M1 */
+ value = scudsp_readmem(m_ct1,1);
+ break;
+ case 0x2: /* M2 */
+ value = scudsp_readmem(m_ct2,2);
+ break;
+ case 0x3: /* M3 */
+ value = scudsp_readmem(m_ct3,3);
+ break;
+ case 0x4: /* MC0 */
+ value = scudsp_readmem(m_ct0++,0);
+ m_ct0 &= 0x3f;
+ break;
+ case 0x5: /* MC1 */
+ value = scudsp_readmem(m_ct1++,1);
+ m_ct1 &= 0x3f;
+ break;
+ case 0x6: /* MC2 */
+ value = scudsp_readmem(m_ct2++,2);
+ m_ct2 &= 0x3f;
+ break;
+ case 0x7: /* MC3 */
+ value = scudsp_readmem(m_ct3++,3);
+ m_ct3 &= 0x3f;
+ break;
+ }
+
+ return value;
+}
+
+void scudsp_cpu_device::scudsp_set_dest_mem_reg( UINT32 mode, UINT32 value )
+{
+ switch( mode )
+ {
+ case 0x0: /* MC0 */
+ scudsp_writemem(m_ct0++,0,value);
+ m_ct0 &= 0x3f;
+ break;
+ case 0x1: /* MC1 */
+ scudsp_writemem(m_ct1++,1,value);
+ m_ct1 &= 0x3f;
+ break;
+ case 0x2: /* MC2 */
+ scudsp_writemem(m_ct2++,2,value);
+ m_ct2 &= 0x3f;
+ break;
+ case 0x3: /* MC3 */
+ scudsp_writemem(m_ct3++,3,value);
+ m_ct3 &= 0x3f;
+ break;
+#if 0
+ case 0x4: /* RX */
+ dsp_reg.rx.ui = value;
+ update_mul = 1;
+ break;
+ case 0x5: /* PL */
+ dsp_reg.pl.ui = value;
+ dsp_reg.ph.si = (dsp_reg.pl.si < 0) ? -1 : 0;
+ break;
+ case 0x6: /* RA0 */
+ dsp_reg.ra0 = value;
+ break;
+ case 0x7: /* WA0 */
+ dsp_reg.wa0 = value;
+ break;
+ case 0x8:
+ case 0x9:
+ /* ??? */
+ break;
+ case 0xa: /* LOP */
+ dsp_reg.lop = value;
+ break;
+ case 0xb: /* TOP */
+ dsp_reg.top = value;
+ break;
+ case 0xc: /* CT0 */
+ dsp_reg.ct0 = value & 0x3f;
+ break;
+ case 0xd: /* CT1 */
+ dsp_reg.ct1 = value & 0x3f;
+ break;
+ case 0xe: /* CT2 */
+ dsp_reg.ct2 = value & 0x3f;
+ break;
+ case 0xf: /* CT3 */
+ dsp_reg.ct3 = value & 0x3f;
+ break;
+#endif
+ }
+}
-#define scudsp_readop(A) m_program->read_dword(A)
-#define scudsp_readmem16(A) m_data->read_dword(A)
-#define scudsp_writemem16(A,B) m_data->write_dword((A),B)
READ32_MEMBER( scudsp_cpu_device::program_control_r )
{
- return (m_pc & 0xff) | (m_flags & 0xffffff00);
+ return (m_pc & 0xff) | (m_flags & FLAGS_MASK);
}
WRITE32_MEMBER( scudsp_cpu_device::program_control_w )
@@ -45,14 +147,49 @@ WRITE32_MEMBER( scudsp_cpu_device::program_control_w )
newval = oldval;
COMBINE_DATA(&newval);
- m_flags = newval & 0xffffff00;
+ m_flags = newval & FLAGS_MASK;
if(LEF)
m_pc = newval & 0xff;
+ //printf("%08x PRG CTRL\n",data);
set_input_line(INPUT_LINE_RESET, (EXF) ? CLEAR_LINE : ASSERT_LINE);
}
+WRITE32_MEMBER( scudsp_cpu_device::program_w )
+{
+ //printf("%02x %08x PRG\n",m_pc,data);
+ scudsp_writeop(m_pc++, data);
+}
+
+WRITE32_MEMBER( scudsp_cpu_device::ram_address_control_w )
+{
+ //printf("%02x %08x PRG\n",m_pc,data);
+ m_ra = data & 0xff;
+
+ switch((m_ra & 0xc0) >> 6)
+ {
+ case 0: m_ct0 = (m_ra & 0x3f); break;
+ case 1: m_ct1 = (m_ra & 0x3f); break;
+ case 2: m_ct2 = (m_ra & 0x3f); break;
+ case 3: m_ct3 = (m_ra & 0x3f); break;
+ }
+}
+
+READ32_MEMBER( scudsp_cpu_device::ram_address_r )
+{
+ UINT32 data;
+
+ data = scudsp_get_source_mem_value( ((m_ra & 0xc0) >> 6) + 4 );
+
+ return data;
+}
+
+WRITE32_MEMBER( scudsp_cpu_device::ram_address_w )
+{
+ scudsp_set_dest_mem_reg( (m_ra & 0xc0) >> 6, data );
+}
+
/***********************************
* illegal opcodes
***********************************/
@@ -91,22 +228,31 @@ void scudsp_cpu_device::device_start()
m_data = &space(AS_DATA);
save_item(NAME(m_pc));
+ save_item(NAME(m_ra));
+ save_item(NAME(m_ct0));
+ save_item(NAME(m_ct1));
+ save_item(NAME(m_ct2));
+ save_item(NAME(m_ct3));
save_item(NAME(m_flags));
save_item(NAME(m_reset_state));
// Register state for debugger
state_add( SCUDSP_PC, "PC", m_pc ).formatstr("%02X");
state_add( SCUDSP_FLAGS, "SR", m_flags ).formatstr("%08X");
+ state_add( SCUDSP_RA, "RA", m_ra ).formatstr("%02X");
+ state_add( SCUDSP_CT0, "CT0", m_ct0 ).formatstr("%02X");
+ state_add( SCUDSP_CT1, "CT1", m_ct1 ).formatstr("%02X");
+ state_add( SCUDSP_CT2, "CT2", m_ct2 ).formatstr("%02X");
+ state_add( SCUDSP_CT3, "CT3", m_ct3 ).formatstr("%02X");
state_add( STATE_GENPC, "curpc", m_pc ).noshow();
- state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow();
+ state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).formatstr("%17s").noshow();
m_icountptr = &m_icount;
}
void scudsp_cpu_device::device_reset()
{
- /* This is how we set the reset vector */
- //set_input_line(CP1610_RESET, PULSE_LINE);
+
}
void scudsp_cpu_device::execute_set_input(int irqline, int state)
@@ -122,7 +268,7 @@ void scudsp_cpu_device::execute_set_input(int irqline, int state)
scudsp_cpu_device::scudsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, SCUDSP, "SCUDSP", tag, owner, clock, "scudsp", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 8, -2)
- , m_data_config("data", ENDIANNESS_BIG, 32, 8, 0)
+ , m_data_config("data", ENDIANNESS_BIG, 32, 8, -2)
{
}
@@ -132,11 +278,18 @@ void scudsp_cpu_device::state_string_export(const device_state_entry &entry, ast
switch (entry.index())
{
case STATE_GENFLAGS:
- string.printf("%c%c%c%c",
- m_flags & 0x80 ? 'S':'.',
- m_flags & 0x40 ? 'Z':'.',
- m_flags & 0x20 ? 'V':'.',
- m_flags & 0x10 ? 'C':'.');
+ string.printf("%s%s%s%c%c%c%c%c%s%s%s",
+ m_flags & 0x4000000 ? "PR":"..",
+ m_flags & 0x2000000 ? "EP":"..",
+ m_flags & 0x800000 ? "T0":"..",
+ m_flags & 0x400000 ? 'S':'.',
+ m_flags & 0x200000 ? 'Z':'.',
+ m_flags & 0x100000 ? 'C':'.',
+ m_flags & 0x80000 ? 'V':'.',
+ m_flags & 0x40000 ? 'E':'.',
+ m_flags & 0x20000 ? "ES":"..",
+ m_flags & 0x10000 ? "EX":"..",
+ m_flags & 0x8000 ? "LE":"..");
break;
}
}
diff --git a/src/emu/cpu/scudsp/scudsp.h b/src/emu/cpu/scudsp/scudsp.h
index 67b8a0dfa9e..c0aecc27950 100644
--- a/src/emu/cpu/scudsp/scudsp.h
+++ b/src/emu/cpu/scudsp/scudsp.h
@@ -13,7 +13,9 @@
enum
{
- SCUDSP_PC=1, SCUDSP_FLAGS
+ SCUDSP_RA=1,
+ SCUDSP_CT0, SCUDSP_CT1, SCUDSP_CT2, SCUDSP_CT3,
+ SCUDSP_PC, SCUDSP_FLAGS
};
#define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */
@@ -25,9 +27,16 @@ public:
// construction/destruction
scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ /* port 0 */
DECLARE_READ32_MEMBER( program_control_r );
DECLARE_WRITE32_MEMBER( program_control_w );
-
+ /* port 1 */
+ DECLARE_WRITE32_MEMBER( program_w );
+ /* port 2 */
+ DECLARE_WRITE32_MEMBER( ram_address_control_w );
+ /* port 3 */
+ DECLARE_READ32_MEMBER( ram_address_r );
+ DECLARE_WRITE32_MEMBER( ram_address_w );
// virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
protected:
@@ -59,13 +68,16 @@ private:
UINT8 m_pc; /* registers */
UINT32 m_flags; /* flags */
+ UINT8 m_ra;
+ UINT8 m_ct0,m_ct1,m_ct2,m_ct3; /*Index for RAM*/ /*6-bits */
int m_reset_state;
address_space *m_program;
address_space *m_data;
int m_icount;
+ UINT32 scudsp_get_source_mem_value(UINT8 mode);
+ void scudsp_set_dest_mem_reg( UINT32 mode, UINT32 value );
void scudsp_illegal();
-
};
diff --git a/src/emu/cpu/scudsp/scudspdasm.c b/src/emu/cpu/scudsp/scudspdasm.c
index 7a42edc9915..46b13181a9a 100644
--- a/src/emu/cpu/scudsp/scudspdasm.c
+++ b/src/emu/cpu/scudsp/scudspdasm.c
@@ -2,19 +2,324 @@
#include "debugger.h"
#include "scudsp.h"
+static const char *const ALU_Commands[] =
+{
+ "", /* 0000 */
+ "AND", /* 0001 */
+ "OR", /* 0010 */
+ "XOR", /* 0011 */
+ "ADD", /* 0100 */
+ "SUB", /* 0101 */
+ "AD2", /* 0110 */
+ "???", /* 0111 */
+ "SR", /* 1000 */
+ "RR", /* 1001 */
+ "SL", /* 1010 */
+ "RL", /* 1011 */
+ "???", /* 1100 */
+ "???", /* 1101 */
+ "???", /* 1110 */
+ "RL8", /* 1111 */
+};
+
+static const char *const X_Commands[] =
+{
+ "", /* 000 */
+ "", /* 001 */ /* NOP? check instruction @ 0x0B */
+ "MOV MUL,P", /* 010 */
+ "MOV %s,P", /* 011 */
+ "MOV %s,X", /* 100 */
+};
+
+static const char *const Y_Commands[] =
+{
+ "", /* 000 */
+ "CLR A", /* 001 */
+ "MOV ALU,A", /* 010 */
+ "MOV %s,A", /* 011 */
+ "MOV %s,Y", /* 100 */
+};
+
+static const char *const D1_Commands[] =
+{
+ "", /* 00 */
+ "MOV %I8,%d", /* 01 */
+ "???", /* 10 */
+ "MOV %S,%d", /* 11 */
+};
+
+static const char *const SourceMemory[] =
+{
+ "M0", /* 000 */
+ "M1", /* 001 */
+ "M2", /* 010 */
+ "M3", /* 011 */
+ "MC0", /* 100 */
+ "MC1", /* 101 */
+ "MC2", /* 110 */
+ "MC3", /* 111 */
+};
+
+static const char *const SourceMemory2[] =
+{
+ "M0", /* 0000 */
+ "M1", /* 0001 */
+ "M2", /* 0010 */
+ "M3", /* 0011 */
+ "MC0", /* 0100 */
+ "MC1", /* 0101 */
+ "MC2", /* 0110 */
+ "MC3", /* 0111 */
+ "???", /* 1000 */
+ "ALL", /* 1001 */
+ "ALH", /* 1010 */
+ "???", /* 1011 */
+ "???", /* 1100 */
+ "???", /* 1101 */
+ "???", /* 1110 */
+ "???", /* 1111 */
+};
+
+static const char *const DestMemory[] =
+{
+ "MC0", /* 0000 */
+ "MC1", /* 0001 */
+ "MC2", /* 0010 */
+ "MC3", /* 0011 */
+ "RX", /* 0100 */
+ "PL", /* 0101 */
+ "RA0", /* 0110 */
+ "WA0", /* 0111 */
+ "???", /* 1000 */
+ "???", /* 1001 */
+ "LOP", /* 1010 */
+ "TOP", /* 1011 */
+ "CT0", /* 1100 */
+ "CT1", /* 1101 */
+ "CT2", /* 1110 */
+ "CT3", /* 1111 */
+};
+
+static const char *const DestDMAMemory[] =
+{
+ "M0", /* 000 */
+ "M1", /* 001 */
+ "M2", /* 010 */
+ "M3", /* 011 */
+ "PRG", /* 100 */
+ "???", /* 101 */
+ "???", /* 110 */
+ "???", /* 111 */
+};
+
+static const char *const MVI_Command[] =
+{
+ "MVI %I,%d", /* 0 */
+ "MVI %I,%d,%f", /* 1 */
+};
+
+static const char *const JMP_Command[] =
+{
+ "JMP %IA",
+ "JMP %f,%IA",
+};
+
+static const char *const DMA_Command[] =
+{
+ "DMA%H%A D0,%M,%I",
+ "DMA%H%A %s,D0,%I",
+ "DMA%H%A D0,%M,%s",
+ "DMA%H%A %s,D0,%s",
+};
+
+
+static void scudsp_dasm_prefix( const char* format, char* buffer, UINT32 *data )
+{
+ for ( ; *format; format++ )
+ {
+ if ( *format == '%' )
+ {
+ switch( *++format )
+ {
+ case 'H':
+ if ( *data )
+ {
+ strcpy( buffer, "H" );
+ }
+ else
+ {
+ *buffer = 0;
+ }
+ break;
+ case 'A':
+ if ( *data == 0 )
+ {
+ strcpy( buffer, "0" );
+ }
+ else if ( *data == 1 )
+ {
+ *buffer = 0;
+ }
+ else
+ {
+ sprintf( buffer, "%d", 1 << (*data - 1) );
+ }
+ break;
+ case 's':
+ strcpy( buffer, SourceMemory[ *data & 0x7 ] );
+ break;
+ case 'd':
+ strcpy( buffer, DestMemory[ *data & 0xf ] );
+ break;
+ case 'S':
+ strcpy( buffer, SourceMemory2[ *data & 0xf ] );
+ break;
+ case 'I':
+ ++format;
+ if ( *format == '8' )
+ {
+ sprintf( buffer, "#$%x", *data );
+ }
+ else if ( *format == 'A' )
+ {
+ sprintf( buffer, "$%X", *data );
+ }
+ else
+ {
+ --format;
+ sprintf( buffer, "#$%X", *data );
+ }
+ break;
+ case 'f':
+ if ( !(*data & 0x20) )
+ {
+ strcpy( buffer, "N" );
+ buffer++;
+ }
+ switch( *data & 0xf )
+ {
+ case 0x3:
+ strcpy( buffer, "ZS" );
+ break;
+ case 0x2:
+ strcpy( buffer, "S" );
+ break;
+ case 0x4:
+ strcpy( buffer, "C" );
+ break;
+ case 0x8:
+ strcpy( buffer, "T0" );
+ break;
+ case 0x1:
+ strcpy( buffer, "Z" );
+ break;
+ default:
+ strcpy( buffer, "?" );
+ break;
+ }
+ break;
+ case 'M':
+ strcpy( buffer, DestDMAMemory[ *data ] );
+ break;
+
+ }
+ data++;
+ buffer += strlen( buffer );
+ }
+ else
+ {
+ *buffer++ = *format;
+ }
+ }
+ *buffer = 0;
+}
+
+
CPU_DISASSEMBLE( scudsp )
{
UINT32 op = oprom[0]<<24|oprom[1]<<16|oprom[2]<<8|oprom[3]<<0;
unsigned size = 1;
// const char *sym, *sym2;
+ char *my_buffer = buffer;
+ char temp_buffer[64];
+ UINT32 data[2];
switch( op >> 30 )
{
case 0:
- sprintf(buffer, "ALU OP");
+ if ( (op & 0x3F8E3000) == 0 )
+ {
+ sprintf( buffer, "%-10s", "NOP" );
+ break;
+ }
+
+ /* ALU */
+ sprintf(my_buffer, "%-10s", ALU_Commands[ (op & 0x3c000000) >> 26] );
+ my_buffer += strlen( my_buffer );
+
+ /* X-Bus */
+ data[0] = (op & 0x700000) >> 20;
+ if ( op & 0x2000000 )
+ {
+ scudsp_dasm_prefix( X_Commands[ 4 ], temp_buffer, data );
+ }
+ else
+ {
+ *temp_buffer = 0;
+ }
+ sprintf( my_buffer, "%-10s", temp_buffer );
+ my_buffer += strlen( my_buffer );
+
+ scudsp_dasm_prefix( X_Commands[ (op & 0x1800000) >> 23 ], temp_buffer, data );
+ sprintf( my_buffer, "%-10s", temp_buffer );
+ my_buffer += strlen( my_buffer );
+
+ data[0] = (op & 0x1C000 ) >> 14 ;
+ if ( op & 0x80000 )
+ {
+ scudsp_dasm_prefix( Y_Commands[4], temp_buffer, data );
+ }
+ else
+ {
+ *temp_buffer = 0;
+ }
+ sprintf( my_buffer, "%-8s", temp_buffer );
+ my_buffer += strlen( my_buffer );
+
+ scudsp_dasm_prefix( Y_Commands[ (op & 0x60000) >> 17 ], temp_buffer, data );
+ sprintf( my_buffer, "%-8s", temp_buffer );
+ my_buffer += strlen( my_buffer );
+
+ /* D1-Bus */
+ switch( (op & 0x3000) >> 12 )
+ {
+ case 0x1:
+ data[0] = (op & 0xFF);
+ data[1] = ((op & 0xF00) >> 8);
+ break;
+ case 0x3:
+ data[0] = (op & 0xF);
+ data[1] = ((op & 0xF00) >> 8);
+ break;
+ }
+
+ scudsp_dasm_prefix( D1_Commands[ (op & 0x3000) >> 12 ], temp_buffer, data );
+ sprintf( my_buffer, "%-8s", temp_buffer );
break;
case 2:
- sprintf(buffer, "MVI");
+ if ( (op & 0x2000000) )
+ {
+ data[0] = op & 0x7FFFF;
+ data[1] = (op & 0x3C000000) >> 26;
+ data[2] = (op & 0x3F80000 ) >> 19;
+ scudsp_dasm_prefix( MVI_Command[1], buffer, data ); /* TODO: bad mem*/
+ }
+ else
+ {
+ data[0] = op & 0x1FFFFFF;
+ data[1] = (op & 0x3C000000) >> 26;
+ scudsp_dasm_prefix( MVI_Command[0], buffer, data ); /* TODO: bad mem*/
+ }
break;
case 3:
switch((op >> 28) & 3)
@@ -23,7 +328,17 @@ CPU_DISASSEMBLE( scudsp )
sprintf(buffer, "DMA");
break;
case 1:
- sprintf(buffer, "JMP");
+ if ( op & 0x3F80000 )
+ {
+ data[0] = (op & 0x3F80000) >> 19;
+ data[1] = op & 0xff;
+ scudsp_dasm_prefix( JMP_Command[1], buffer, data );
+ }
+ else
+ {
+ data[0] = op & 0xff;
+ scudsp_dasm_prefix( JMP_Command[0], buffer, data );
+ }
break;
case 2:
sprintf(buffer, op & 0x8000000 ? "LPS" : "BTM");
diff --git a/src/emu/machine/saturn.c b/src/emu/machine/saturn.c
index 40972459cd4..650350281d0 100644
--- a/src/emu/machine/saturn.c
+++ b/src/emu/machine/saturn.c
@@ -221,6 +221,8 @@ void saturn_state::scu_test_pending_irq()
}
}
+#define USE_NEW_SCUDSP 1
+
READ32_MEMBER(saturn_state::saturn_scu_r)
{
UINT32 res;
@@ -238,12 +240,19 @@ READ32_MEMBER(saturn_state::saturn_scu_r)
res = m_scu.status;
break;
case 0x80/4:
+ #if USE_NEW_SCUDSP
res = m_scudsp->program_control_r(space, 0, mem_mask);
+ #else
res = dsp_prg_ctrl_r(space);
+ #endif
break;
case 0x8c/4:
if(LOG_SCU && !space.debugger_access()) logerror( "DSP mem read at %08X\n", m_scu_regs[34]);
+ #if USE_NEW_SCUDSP
+ res = m_scudsp->ram_address_r(space, 0, mem_mask);
+ #else
res = dsp_ram_addr_r();
+ #endif
break;
case 0xa0/4:
if(LOG_SCU && !space.debugger_access()) logerror("(PC=%08x) IRQ mask reg read %08x MASK=%08x\n",space.device().safe_pc(),mem_mask,m_scu_regs[0xa0/4]);
@@ -313,20 +322,35 @@ WRITE32_MEMBER(saturn_state::saturn_scu_w)
/*DSP section*/
case 0x80/4:
/* TODO: you can't overwrite some flags with this */
+ #if USE_NEW_SCUDSP
+ m_scudsp->program_control_w(space, 0, m_scu_regs[offset], mem_mask);
+ #else
dsp_prg_ctrl_w(space, m_scu_regs[offset]);
- m_scudsp->program_control_w(space, 0, mem_mask,data);
+ #endif
if(LOG_SCU) logerror("SCU DSP: Program Control Port Access %08x\n",data);
break;
case 0x84/4:
+ #if USE_NEW_SCUDSP
+ m_scudsp->program_w(space, 0, m_scu_regs[offset], mem_mask);
+ #else
dsp_prg_data(m_scu_regs[offset]);
+ #endif
if(LOG_SCU) logerror("SCU DSP: Program RAM Data Port Access %08x\n",data);
break;
case 0x88/4:
+ #if USE_NEW_SCUDSP
+ m_scudsp->ram_address_control_w(space, 0,m_scu_regs[offset], mem_mask);
+ #else
dsp_ram_addr_ctrl(m_scu_regs[offset]);
+ #endif
if(LOG_SCU) logerror("SCU DSP: Data RAM Address Port Access %08x\n",data);
break;
case 0x8c/4:
+ #if USE_NEW_SCUDSP
+ m_scudsp->ram_address_w(space, 0, m_scu_regs[offset], mem_mask);
+ #else
dsp_ram_addr_w(m_scu_regs[offset]);
+ #endif
if(LOG_SCU) logerror("SCU DSP: Data RAM Data Port Access %08x\n",data);
break;
case 0x90/4: /*if(LOG_SCU) logerror("timer 0 compare data = %03x\n",m_scu_regs[36]);*/ break;
diff --git a/src/mame/drivers/stv.c b/src/mame/drivers/stv.c
index 3a825294595..04698860925 100644
--- a/src/mame/drivers/stv.c
+++ b/src/mame/drivers/stv.c
@@ -961,6 +961,14 @@ static ADDRESS_MAP_START( sound_mem, AS_PROGRAM, 16, stv_state )
AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp", scsp_r, scsp_w)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( scudsp_mem, AS_PROGRAM, 32, sat_console_state )
+ AM_RANGE(0x00, 0xff) AM_RAM
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( scudsp_data, AS_DATA, 32, sat_console_state )
+ AM_RANGE(0x00, 0xff) AM_RAM
+ADDRESS_MAP_END
+
static MACHINE_CONFIG_START( stv, stv_state )
/* basic machine hardware */
diff --git a/src/mess/drivers/pc9801.c b/src/mess/drivers/pc9801.c
index 59a4694782f..9265de7d90d 100644
--- a/src/mess/drivers/pc9801.c
+++ b/src/mess/drivers/pc9801.c
@@ -2316,7 +2316,7 @@ READ16_MEMBER(pc9801_state::pc9801rs_ide_io_1_r)
WRITE16_MEMBER(pc9801_state::pc9801rs_ide_io_1_w)
{
- m_ide->write_cs0(space, offset, mem_mask);
+ m_ide->write_cs0(space, offset, data, mem_mask);
}
READ16_MEMBER(pc9801_state::pc9801rs_ide_io_2_r)
@@ -2326,7 +2326,7 @@ READ16_MEMBER(pc9801_state::pc9801rs_ide_io_2_r)
WRITE16_MEMBER(pc9801_state::pc9801rs_ide_io_2_w)
{
- m_ide->write_cs1(space, offset + 6, mem_mask);
+ m_ide->write_cs1(space, offset + 6, data, mem_mask);
}
static ADDRESS_MAP_START( pc9801rs_map, AS_PROGRAM, 32, pc9801_state )
diff --git a/src/mess/drivers/saturn.c b/src/mess/drivers/saturn.c
index 58f1ecef5c8..7616701adde 100644
--- a/src/mess/drivers/saturn.c
+++ b/src/mess/drivers/saturn.c
@@ -184,7 +184,6 @@ static ADDRESS_MAP_START( sound_mem, AS_PROGRAM, 16, sat_console_state )
AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp", scsp_r, scsp_w)
ADDRESS_MAP_END
-#if 1
static ADDRESS_MAP_START( scudsp_mem, AS_PROGRAM, 32, sat_console_state )
AM_RANGE(0x00, 0xff) AM_RAM
ADDRESS_MAP_END
@@ -192,7 +191,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( scudsp_data, AS_DATA, 32, sat_console_state )
AM_RANGE(0x00, 0xff) AM_RAM
ADDRESS_MAP_END
-#endif
/* keyboard code */