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-rw-r--r--src/emu/cpu/z180/z180.c28
-rw-r--r--src/emu/cpu/z180/z180tbl.h4
-rw-r--r--src/emu/sound/tms5110.h6
-rw-r--r--src/emu/sound/tms5220.c2
-rw-r--r--src/mame/drivers/aladbl.c4
-rw-r--r--src/mame/drivers/astrocorp.c2
-rw-r--r--src/mame/drivers/itgambl2.c54
-rw-r--r--src/mame/drivers/itgambl3.c16
-rw-r--r--src/mame/drivers/itgamble.c42
-rw-r--r--src/mame/drivers/jrpacman.c2
-rw-r--r--src/mame/drivers/m72.c4
-rw-r--r--src/mame/drivers/mpu4.c2
-rw-r--r--src/mame/drivers/mpu4drvr.c18
-rw-r--r--src/mame/drivers/multigam.c30
-rw-r--r--src/mame/drivers/naughtyb.c18
-rw-r--r--src/mame/drivers/nss.c46
-rw-r--r--src/mame/drivers/sfcbox.c10
-rw-r--r--src/mame/drivers/sigmab98.c22
-rw-r--r--src/mame/drivers/spool99.c4
-rw-r--r--src/mame/drivers/supdrapo.c28
-rw-r--r--src/mame/drivers/warpwarp.c2
-rw-r--r--src/mame/machine/snes.c2
-rw-r--r--src/mame/machine/snes7110.c12
-rw-r--r--src/mame/machine/snesbsx.c132
-rw-r--r--src/mame/video/20pacgal.c18
-rw-r--r--src/mame/video/avgdvg.c2
-rw-r--r--src/mame/video/namcos2.c52
-rw-r--r--src/mame/video/stvvdp2.c4
-rw-r--r--src/mame/video/toaplan2.c34
-rw-r--r--src/version.c2
30 files changed, 301 insertions, 301 deletions
diff --git a/src/emu/cpu/z180/z180.c b/src/emu/cpu/z180/z180.c
index 63f898ad050..32cc55d47b9 100644
--- a/src/emu/cpu/z180/z180.c
+++ b/src/emu/cpu/z180/z180.c
@@ -45,12 +45,12 @@
/*****************************************************************************
- TODO:
- - HALT processing is not yet perfect. The manual states that
- during HALT, all dma and internal i/o incl. timers continue to
- work. Currently, only timers are implemented. Ideally, the
- burn_cycles routine would go away and halt processing be
- implemented in cpu_execute.
+ TODO:
+ - HALT processing is not yet perfect. The manual states that
+ during HALT, all dma and internal i/o incl. timers continue to
+ work. Currently, only timers are implemented. Ideally, the
+ burn_cycles routine would go away and halt processing be
+ implemented in cpu_execute.
*****************************************************************************/
/*****************************************************************************
@@ -123,7 +123,7 @@ struct _z180_state
UINT8 tmdr_latch; /* flag latched TMDR0H, TMDR1H values */
UINT8 read_tcr_tmdr[2]; /* flag to indicate that TCR or TMDR was read */
UINT32 iol; /* I/O line status bits */
- UINT8 io[64]; /* 64 internal 8 bit registers */
+ UINT8 io[64]; /* 64 internal 8 bit registers */
offs_t mmu[16]; /* MMU address translation */
UINT8 tmdrh[2]; /* latched TMDR0H and TMDR1H values */
UINT16 tmdr_value[2]; /* TMDR values used byt PRT0 and PRT1 as down counter */
@@ -2477,13 +2477,13 @@ again:
handle_io_timers(cpustate, curcycles);
/* FIXME:
- * For simultaneous DREQ0 and DREQ1 requests, channel 0 has priority
- * over channel 1. When channel 0 is performing a memory to/from memory
- * transfer, channel 1 cannot operate until the channel 0 operation has
- * terminated. If channel 1 is operating, channel 0 cannot operate until
- * channel 1 releases control of the bus.
- *
- */
+ * For simultaneous DREQ0 and DREQ1 requests, channel 0 has priority
+ * over channel 1. When channel 0 is performing a memory to/from memory
+ * transfer, channel 1 cannot operate until the channel 0 operation has
+ * terminated. If channel 1 is operating, channel 0 cannot operate until
+ * channel 1 releases control of the bus.
+ *
+ */
curcycles = z180_dma0(cpustate, 6);
cpustate->icount -= curcycles;
handle_io_timers(cpustate, curcycles);
diff --git a/src/emu/cpu/z180/z180tbl.h b/src/emu/cpu/z180/z180tbl.h
index 259e2ee1fc7..01864a68d36 100644
--- a/src/emu/cpu/z180/z180tbl.h
+++ b/src/emu/cpu/z180/z180tbl.h
@@ -289,10 +289,10 @@ static void (*const Z180ops[Z180_PREFIX_COUNT][0x100])(z180_state *cpustate) =
***************************************************************/
#define EXEC_PROTOTYPE(prefix) \
-INLINE int exec##_##prefix(z180_state *cpustate, const UINT8 opcode) \
+INLINE int exec##_##prefix(z180_state *cpustate, const UINT8 opcode) \
{ \
(*Z180ops[Z180_PREFIX_##prefix][opcode])(cpustate); \
- return cpustate->cc[Z180_TABLE_##prefix][opcode]; \
+ return cpustate->cc[Z180_TABLE_##prefix][opcode]; \
}
EXEC_PROTOTYPE(op)
diff --git a/src/emu/sound/tms5110.h b/src/emu/sound/tms5110.h
index a6a3e095e6b..0de810baf40 100644
--- a/src/emu/sound/tms5110.h
+++ b/src/emu/sound/tms5110.h
@@ -31,9 +31,9 @@ struct _tms5110_interface
devcb_write8 address_func; /* Write to ADD1,2,4,8 - 4 address bits */
devcb_read_line data_func; /* Read one bit from ADD8/Data - voice data */
/* on a real chip rom_clk is running all the time
- * Here, we only use it to properly emulate the protocol.
- * Do not rely on it to be a timed signal.
- */
+ * Here, we only use it to properly emulate the protocol.
+ * Do not rely on it to be a timed signal.
+ */
devcb_write_line rom_clk_func; /* rom_clk - Only used to drive the data lines */
};
diff --git a/src/emu/sound/tms5220.c b/src/emu/sound/tms5220.c
index 034e7a0f893..43431f460d3 100644
--- a/src/emu/sound/tms5220.c
+++ b/src/emu/sound/tms5220.c
@@ -293,7 +293,7 @@ struct _tms5220_state
UINT16 previous_energy; /* needed for lattice filter to match patent */
- //UINT8 interp_period; /* TODO: the current interpolation period, counts 1,2,3,4,5,6,7,0 for divide by 8,8,8,4,4,4,2,1 */
+ //UINT8 interp_period; /* TODO: the current interpolation period, counts 1,2,3,4,5,6,7,0 for divide by 8,8,8,4,4,4,2,1 */
UINT8 interp_count; /* number of samples within each sub-interpolation period, ranges from 0-24; TODO: rename this variable to PC/merge into PC function */
UINT8 inhibit; /* If 1, interpolation is inhibited until the DIV1 period */
//UINT8 spkslow_delay; /* delay counter for interp count, only used on tms51xx */
diff --git a/src/mame/drivers/aladbl.c b/src/mame/drivers/aladbl.c
index c1385ec8db2..8885c4e8613 100644
--- a/src/mame/drivers/aladbl.c
+++ b/src/mame/drivers/aladbl.c
@@ -201,8 +201,8 @@ static READ16_HANDLER( mk3ghw_dsw_r )
static DRIVER_INIT( aladbl )
{
/*
- * Game does a check @ 1afc00 with work ram fff57c that makes it play like the original console version (i.e. 8 energy hits instead of 2)
- */
+ * Game does a check @ 1afc00 with work ram fff57c that makes it play like the original console version (i.e. 8 energy hits instead of 2)
+ */
#if ENERGY_CONSOLE_MODE
UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
rom[0x1afc08/2] = 0x6600;
diff --git a/src/mame/drivers/astrocorp.c b/src/mame/drivers/astrocorp.c
index 350fb319446..81776139983 100644
--- a/src/mame/drivers/astrocorp.c
+++ b/src/mame/drivers/astrocorp.c
@@ -16,7 +16,7 @@ Year + Game PCB ID CPU Video Chips
-------------------------------------------------------------------------------------------------------------------
00 Show Hand CHE-B50-4002A 68000 ASTRO V01 ASTRO 0001B (28 pins), pLSI1016-60LJ
00 Wang Pai Dui J. CHE-B50-4002A 68000 ASTRO V01 MDT2020AP MCU (28 pins), pLSI1016
-02 Skill Drop GA None JX-1689F1028N ASTRO V02 pLSI1016-60LJ
+02 Skill Drop GA None JX-1689F1028N ASTRO V02 pLSI1016-60LJ
05? Zoo M1.1 ASTRO V102PX-005? ASTRO V06 ASTRO F02 2005-02-18 Encrypted
05? Win Win Bingo M1.2 ASTRO V102PX-006? ASTRO V06 ASTRO F02 2005-09-17 Encrypted
-------------------------------------------------------------------------------------------------------------------
diff --git a/src/mame/drivers/itgambl2.c b/src/mame/drivers/itgambl2.c
index 098501cc414..389f49680c7 100644
--- a/src/mame/drivers/itgambl2.c
+++ b/src/mame/drivers/itgambl2.c
@@ -785,18 +785,18 @@ ROM_END
Magic Number
CPUs
-1x H8/3337 32-bit Single-Chip Microcomputer - main (internal ROM not dumped)
-1x D7759 ADPCM Speech Synthesizer LSIs - sound
-1x TDA2003 Audio Amplifier - sound
-1x oscillator 14.31818MHz
-1x oscillator 16.000
+1x H8/3337 32-bit Single-Chip Microcomputer - main (internal ROM not dumped)
+1x D7759 ADPCM Speech Synthesizer LSIs - sound
+1x TDA2003 Audio Amplifier - sound
+1x oscillator 14.31818MHz
+1x oscillator 16.000
ROMs
-3x M27C4001 1,2,3 dumped
-1x M27C1001 MSG dumped
+3x M27C4001 1,2,3 dumped
+1x M27C1001 MSG dumped
RAMs
-3x CXK581000BM-70LL
+3x CXK581000BM-70LL
PLDs
-2x ispLSI1032E-70Lj not dumped
+2x ispLSI1032E-70Lj not dumped
Others
1x 28x2 edge connector
@@ -825,18 +825,18 @@ ROM_END
/*
CPUs
-1x H8/3337 32-bit Single-Chip Microcomputer - main (internal ROM not dumped)
-1x D7759 ADPCM Speech Synthesizer LSIs - sound
-1x TDA2003 Audio Amplifier - sound
-1x oscillator 14.31818MHz
-1x oscillator 16.000
+1x H8/3337 32-bit Single-Chip Microcomputer - main (internal ROM not dumped)
+1x D7759 ADPCM Speech Synthesizer LSIs - sound
+1x TDA2003 Audio Amplifier - sound
+1x oscillator 14.31818MHz
+1x oscillator 16.000
ROMs
-3x M27C4001 1,2,3 dumped
-1x M27C1001 SND dumped
+3x M27C4001 1,2,3 dumped
+1x M27C1001 SND dumped
RAMs
-3x MX66C1024MC-70
+3x MX66C1024MC-70
PLDs
-2x ispLSI1032E-70Lj not dumped
+2x ispLSI1032E-70Lj not dumped
Others
1x 28x2 edge connector
@@ -868,18 +868,18 @@ ROM_END
/*
CPUs
-1x H8/3337 32-bit Single-Chip Microcomputer - main (internal ROM not dumped)
-1x D7759 ADPCM Speech Synthesizer LSIs - sound
-1x TDA2003 Audio Amplifier - sound
-1x oscillator 14.31818MHz
-1x oscillator 16.000
+1x H8/3337 32-bit Single-Chip Microcomputer - main (internal ROM not dumped)
+1x D7759 ADPCM Speech Synthesizer LSIs - sound
+1x TDA2003 Audio Amplifier - sound
+1x oscillator 14.31818MHz
+1x oscillator 16.000
ROMs
-3x M27C4001 1,2,3 dumped
-1x M27C1001 SND dumped
+3x M27C4001 1,2,3 dumped
+1x M27C1001 SND dumped
RAMs
-3x V62C5181024L-35W
+3x V62C5181024L-35W
PLDs
-2x ispLSI1032E-70Lj not dumped
+2x ispLSI1032E-70Lj not dumped
Others
1x 28x2 edge connector
diff --git a/src/mame/drivers/itgambl3.c b/src/mame/drivers/itgambl3.c
index b9a8aa91ba5..d7f9df655d7 100644
--- a/src/mame/drivers/itgambl3.c
+++ b/src/mame/drivers/itgambl3.c
@@ -429,17 +429,17 @@ ROM_END
X Five Jokers
CPUs
-1x M30624FGAFP u11 16-bit Single-Chip Microcomputer - main (internal ROM not dumped)
-1x MSM6295 u28 4-Channel Mixing ADCPM Voice Synthesis LSI - sound
-1x LM358N u33 Dual Operational Amplifier - sound
-1x TDA2003 u32 Audio Amplifier - sound
-1x oscillator 16.000MHz u27
+1x M30624FGAFP u11 16-bit Single-Chip Microcomputer - main (internal ROM not dumped)
+1x MSM6295 u28 4-Channel Mixing ADCPM Voice Synthesis LSI - sound
+1x LM358N u33 Dual Operational Amplifier - sound
+1x TDA2003 u32 Audio Amplifier - sound
+1x oscillator 16.000MHz u27
ROMs
-4x M27C4001 1,2,3,S dumped
+4x M27C4001 1,2,3,S dumped
RAMs
-3x D431000AGW-70LL u20,u21,u22
+3x D431000AGW-70LL u20,u21,u22
PLDs
-2x ispLSI1032E-70LJ u12,u13 not dumped
+2x ispLSI1032E-70LJ u12,u13 not dumped
Others
1x 28x2 edge connector
diff --git a/src/mame/drivers/itgamble.c b/src/mame/drivers/itgamble.c
index 8cdbdadb22b..7970c99d63c 100644
--- a/src/mame/drivers/itgamble.c
+++ b/src/mame/drivers/itgamble.c
@@ -556,20 +556,20 @@ ROM_END
/*
CPUs
-1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped)
-1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound
-1x LM358N ic27 Dual Operational Amplifier - sound
-1x TDA2003 ic26 Audio Amplifier - sound
-1x oscillator 30.000MHz osc1
-1x blu resonator 1000J x1
-1x oscillator KDS0D x2
+1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped)
+1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound
+1x LM358N ic27 Dual Operational Amplifier - sound
+1x TDA2003 ic26 Audio Amplifier - sound
+1x oscillator 30.000MHz osc1
+1x blu resonator 1000J x1
+1x oscillator KDS0D x2
ROMs
-1x W27C020 1 dumped
-2x M27C4001 2,3 dumped
+1x W27C020 1 dumped
+2x M27C4001 2,3 dumped
RAMs
-2x LST62832I-70LL-10L ic13,ic14
+2x LST62832I-70LL-10L ic13,ic14
PLDs
-1x ispLSI2064-80LJ ic12 not dumped
+1x ispLSI2064-80LJ ic12 not dumped
Others
1x 28x2 edge connector
@@ -596,19 +596,19 @@ ROM_END
/*
CPUs
-1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped)
-1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound
-1x LM358N ic27 Dual Operational Amplifier - sound
-1x TDA2003 ic26 Audio Amplifier - sound
-1x oscillator 30.000MHz osc1
-1x red resonator ZTB1000J x1
+1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped)
+1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound
+1x LM358N ic27 Dual Operational Amplifier - sound
+1x TDA2003 ic26 Audio Amplifier - sound
+1x oscillator 30.000MHz osc1
+1x red resonator ZTB1000J x1
ROMs
-1x W27C020 1 dumped
-2x M27C4001 2,3 dumped
+1x W27C020 1 dumped
+2x M27C4001 2,3 dumped
RAMs
-2x MB8464C-10L ic13,ic14
+2x MB8464C-10L ic13,ic14
PLDs
-1x ispLSI2064-80LJ ic12 not dumped
+1x ispLSI2064-80LJ ic12 not dumped
Others
1x 28x2 edge connector
diff --git a/src/mame/drivers/jrpacman.c b/src/mame/drivers/jrpacman.c
index b75df11aefe..1ce0d37299f 100644
--- a/src/mame/drivers/jrpacman.c
+++ b/src/mame/drivers/jrpacman.c
@@ -191,7 +191,7 @@ static INPUT_PORTS_START( jrpacman )
PORT_DIPSETTING( 0x04, "2" )
PORT_DIPSETTING( 0x08, "3" )
PORT_DIPSETTING( 0x0c, "5" )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x00, "10000" )
PORT_DIPSETTING( 0x10, "15000" )
PORT_DIPSETTING( 0x20, "20000" )
diff --git a/src/mame/drivers/m72.c b/src/mame/drivers/m72.c
index 8bcb5ac0d4f..e19292317b2 100644
--- a/src/mame/drivers/m72.c
+++ b/src/mame/drivers/m72.c
@@ -1021,7 +1021,7 @@ static ADDRESS_MAP_START( kengo_portmap, ADDRESS_SPACE_IO, 16 )
AM_RANGE(0x82, 0x83) AM_WRITE(m72_scrollx1_w)
AM_RANGE(0x84, 0x85) AM_WRITE(m72_scrolly2_w)
AM_RANGE(0x86, 0x87) AM_WRITE(m72_scrollx2_w)
-// AM_RANGE(0x8c, 0x8f) AM_WRITENOP /* ??? */
+// AM_RANGE(0x8c, 0x8f) AM_WRITENOP /* ??? */
ADDRESS_MAP_END
@@ -1059,7 +1059,7 @@ static ADDRESS_MAP_START( rtype2_sound_portmap, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w)
AM_RANGE(0x83, 0x83) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r)
-// AM_RANGE(0x87, 0x87) AM_WRITENOP /* ??? */
+// AM_RANGE(0x87, 0x87) AM_WRITENOP /* ??? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( poundfor_sound_portmap, ADDRESS_SPACE_IO, 8 )
diff --git a/src/mame/drivers/mpu4.c b/src/mame/drivers/mpu4.c
index 3d263feed74..02a11afc041 100644
--- a/src/mame/drivers/mpu4.c
+++ b/src/mame/drivers/mpu4.c
@@ -1642,7 +1642,7 @@ static WRITE8_HANDLER( characteriser_w )
if (offset == 0)
{
- // for (x = prot_col; x < 64; x++)
+ // for (x = prot_col; x < 64; x++)
{
if (call == 0)
{
diff --git a/src/mame/drivers/mpu4drvr.c b/src/mame/drivers/mpu4drvr.c
index fa3211f44da..1883d0ced07 100644
--- a/src/mame/drivers/mpu4drvr.c
+++ b/src/mame/drivers/mpu4drvr.c
@@ -166,7 +166,7 @@ IRQ line connected to CPU
TODO:
- Correctly implement characteriser protection for each game.
- Hook up trackball control for The Crystal Maze and The Mating Game - done, but game response is v. slow
- - Fix meter sense error when coining up in Team Challenge - different cabinet
+ - Fix meter sense error when coining up in Team Challenge - different cabinet
- Improve AVDC implementation, adding split-screen interrupts (needed for mid-screen palette changes)
- Hook up OKIM6376 sound in The Mating Game
- Get the BwB games running
@@ -1125,12 +1125,12 @@ static READ16_HANDLER( ef9369_r )
static READ8_DEVICE_HANDLER( pia_ic5_porta_track_r )
{
/* The SWP trackball interface connects a standard trackball to the AUX1 port on the MPU4
- mainboard. As per usual, they've taken the cheap route here, reading and processing the
- raw quadrature signal from the encoder wheels for a 4 bit interface, rather than use any
- additional hardware to simplify matters. For our purposes, two fake ports give the X and Y positions,
- which are then worked back into the signal levels.
- We invert the X and Y data at source due to the use of Schmitt triggers in the interface, which
- clean up the pulses and flip the active phase.*/
+ mainboard. As per usual, they've taken the cheap route here, reading and processing the
+ raw quadrature signal from the encoder wheels for a 4 bit interface, rather than use any
+ additional hardware to simplify matters. For our purposes, two fake ports give the X and Y positions,
+ which are then worked back into the signal levels.
+ We invert the X and Y data at source due to the use of Schmitt triggers in the interface, which
+ clean up the pulses and flip the active phase.*/
LOG(("%s: IC5 PIA Read of Port A (AUX1)\n",cpuexec_describe_context(device->machine)));
@@ -1564,7 +1564,7 @@ static INPUT_PORTS_START( skiltrek )
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("C")
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("B")
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON4) PORT_NAME("A")
- PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Test Button") PORT_CODE(KEYCODE_W)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
@@ -2493,7 +2493,7 @@ static DRIVER_INIT (crmaze3)
{
mpu4_current_chr_table = crmaze3_data;
}
-
+
static DRIVER_INIT (crmaze3a)
{
mpu4_current_chr_table = crmaze3a_data;
diff --git a/src/mame/drivers/multigam.c b/src/mame/drivers/multigam.c
index 2039bc71b06..0cdf538d063 100644
--- a/src/mame/drivers/multigam.c
+++ b/src/mame/drivers/multigam.c
@@ -40,7 +40,7 @@
Multi Game (Tung Sheng Electronics): 10 games included, selectable by dip switches.
- Super Game III:
+ Super Game III:
PCB Layout
----------
@@ -61,8 +61,8 @@ PCB Layout
|------------------------------------|
* - chip surface scratched
- Super Game III features 15 games, updated hardware with several NES mappers allowing newer NES
- games to run.
+ Super Game III features 15 games, updated hardware with several NES mappers allowing newer NES
+ games to run.
*/
#include "emu.h"
@@ -778,14 +778,14 @@ static void multigam_init_mmc1(running_machine *machine, UINT8 *prg_base, int pr
76543210
5001: x select rom at 0x8000: 0 - control program, 1 - game
x mapper for game: 0 - mapper 02, 1 - MMC1/MMC3
- x game rom size: 0 - 256KB, 1 - 128KB
+ x game rom size: 0 - 256KB, 1 - 128KB
xxxxx rom bank, each bank has 0x20000 bytes (128KB)
- 76543210
+ 76543210
5002: x unknown, always 0
x CHR rom size: 0 - 256KB, 1 - 128KB
- x CHR rom flag: 0 - no CHR rom, 1 - CHR rom present
- x mapper for game: 0 - MMC1, 1 - MMC3
+ x CHR rom flag: 0 - no CHR rom, 1 - CHR rom present
+ x mapper for game: 0 - MMC1, 1 - MMC3
xxxx CHR rom bank, each bank has 0x8000 bytes (32KB)
*/
@@ -835,24 +835,24 @@ static void supergm3_set_bank(running_machine *machine)
else if ((supergm3_prg_bank & 0x40) == 0)
{
// mapper 02
- multigam_init_mapper02(machine,
- memory_region(machine, "user1") + (supergm3_prg_bank & 0x1f)*0x20000,
+ multigam_init_mapper02(machine,
+ memory_region(machine, "user1") + (supergm3_prg_bank & 0x1f)*0x20000,
0x20000);
}
else if (supergm3_chr_bank & 0x10)
{
// MMC3
- multigam_init_mmc3(machine,
- memory_region(machine, "user1") + (supergm3_prg_bank & 0x1f)*0x20000,
- (supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
+ multigam_init_mmc3(machine,
+ memory_region(machine, "user1") + (supergm3_prg_bank & 0x1f)*0x20000,
+ (supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
(supergm3_chr_bank & 0x0f)*0x80);
}
else
{
//MMC1
- multigam_init_mmc1(machine,
- memory_region(machine, "user1") + (supergm3_prg_bank & 0x1f)*0x20000,
- 0x20000,
+ multigam_init_mmc1(machine,
+ memory_region(machine, "user1") + (supergm3_prg_bank & 0x1f)*0x20000,
+ 0x20000,
(supergm3_chr_bank & 0x0f)*0x80/4 );
}
}
diff --git a/src/mame/drivers/naughtyb.c b/src/mame/drivers/naughtyb.c
index 30e7b0b04f3..34dbdc861d5 100644
--- a/src/mame/drivers/naughtyb.c
+++ b/src/mame/drivers/naughtyb.c
@@ -186,7 +186,7 @@ static READ8_HANDLER( popflame_protection_r ) /* Not used by bootleg/hack */
static WRITE8_HANDLER( popflame_protection_w )
{
/*
- Alternative protection check is executed at the end of stage 3, it seems some kind of pseudo "EEPROM" device:
+ Alternative protection check is executed at the end of stage 3, it seems some kind of pseudo "EEPROM" device:
2720: 21 98 B0 ld hl,$B098
2723: 36 01 ld (hl),$01
2725: 0E 40 ld c,$40
@@ -226,15 +226,15 @@ static WRITE8_HANDLER( popflame_protection_w )
0CF8: 36 00 ld (hl),$00 ; ... reset the game
0CFA: C9 ret
- For now, we use a kludge to feed what the game needs, there could be many possible combinations of this so a PCB tracing / trojan is needed
- to determine the behaviour of this.
+ For now, we use a kludge to feed what the game needs, there could be many possible combinations of this so a PCB tracing / trojan is needed
+ to determine the behaviour of this.
- ---x ---- enables alternative protection seed
- ---- x--- increments read index buffer
- ---- -x-- reset read index buffer
- ---- --x- puts a bit into the write buffer
- ---- ---x reset write index buffer
- */
+ ---x ---- enables alternative protection seed
+ ---- x--- increments read index buffer
+ ---- -x-- reset read index buffer
+ ---- --x- puts a bit into the write buffer
+ ---- ---x reset write index buffer
+ */
if(data & 1 && ((popflame_prot_seed & 1) == 0)) //Note: we use the write buffer index
r_index = 0;
if(data & 8 && ((popflame_prot_seed & 8) == 0))
diff --git a/src/mame/drivers/nss.c b/src/mame/drivers/nss.c
index aea807121e0..b301ed436d1 100644
--- a/src/mame/drivers/nss.c
+++ b/src/mame/drivers/nss.c
@@ -358,13 +358,13 @@ static READ8_HANDLER( nss_eeprom_r )
static WRITE8_HANDLER( nss_eeprom_w )
{
/*
- x--- ---- EEPROM CS bit?
- ---x ---- EEPROM clock bit?
- ---- x--- EEPROM write bit
- ---- ---x EEPROM reset bit? (active low)
- */
+ x--- ---- EEPROM CS bit?
+ ---x ---- EEPROM clock bit?
+ ---- x--- EEPROM write bit
+ ---- ---x EEPROM reset bit? (active low)
+ */
-// printf("EEPROM write %02x\n",data);
+// printf("EEPROM write %02x\n",data);
}
static UINT8 m50458_rom_bank;
@@ -413,8 +413,8 @@ ADDRESS_MAP_END
static READ8_HANDLER( port00_r )
{
/*
- -x-- ---- almost certainly tied to the vblank signal
- */
+ -x-- ---- almost certainly tied to the vblank signal
+ */
static UINT8 vblank_bit;
@@ -432,9 +432,9 @@ static READ8_HANDLER( port01_r )
static READ8_HANDLER( port02_r )
{
/*
- ---- -x-- (makes the BIOS to jump at 0x4258, sets 0x80 bit 1 and then jumps to unmapped area of the BIOS (bankswitch?))
- ---- ---x
- */
+ ---- -x-- (makes the BIOS to jump at 0x4258, sets 0x80 bit 1 and then jumps to unmapped area of the BIOS (bankswitch?))
+ ---- ---x
+ */
return 0xfb;
}
@@ -442,10 +442,10 @@ static READ8_HANDLER( port02_r )
static READ8_HANDLER( port03_r )
{
/*
- x--- ---- EEPROM2 read bit
- ---- ---x tested at 7006, some status bit
+ x--- ---- EEPROM2 read bit
+ ---- ---x tested at 7006, some status bit
- */
+ */
return 0xfe;
}
@@ -453,10 +453,10 @@ static READ8_HANDLER( port03_r )
static WRITE8_HANDLER( port80_w )
{
/*
- ---- x--- written when 0x9000-0x9fff is read, probably a bankswitch
- ---- --x- see port 0x02 note
- ---- ---x BIOS bankswitch
- */
+ ---- x--- written when 0x9000-0x9fff is read, probably a bankswitch
+ ---- --x- see port 0x02 note
+ ---- ---x BIOS bankswitch
+ */
memory_set_bank(space->machine, "bank1", data & 1);
m50458_rom_bank = data & 8;
@@ -465,10 +465,10 @@ static WRITE8_HANDLER( port80_w )
static WRITE8_HANDLER( port82_w ) // EEPROM2?
{
/*
- ---- x--- EEPROM2 clock bit?
- ---- -x-- EEPROM2 write bit
- ---- --x- EEPROM2 CS bit?
- */
+ ---- x--- EEPROM2 clock bit?
+ ---- -x-- EEPROM2 write bit
+ ---- --x- EEPROM2 CS bit?
+ */
}
static ADDRESS_MAP_START( bios_io_map, ADDRESS_SPACE_IO, 8 )
@@ -651,7 +651,7 @@ static MACHINE_DRIVER_START( nss )
MDRV_CPU_PROGRAM_MAP(bios_map)
MDRV_CPU_IO_MAP(bios_io_map)
MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
-// MDRV_CPU_FLAGS(CPU_DISABLE)
+// MDRV_CPU_FLAGS(CPU_DISABLE)
MDRV_MACHINE_START( nss )
MACHINE_DRIVER_END
diff --git a/src/mame/drivers/sfcbox.c b/src/mame/drivers/sfcbox.c
index 8f3ddf40e15..d3e4c7fbf5a 100644
--- a/src/mame/drivers/sfcbox.c
+++ b/src/mame/drivers/sfcbox.c
@@ -258,15 +258,15 @@ ROM_START( sfcbox )
ROM_LOAD( "grom1-1.bin", 0x0000, 0x8000, CRC(333bf9a7) SHA1(5d0cd9ca29e5580c3eebe9f136839987c879f979) )
ROM_LOAD( "grom1-3.bin", 0x8000, 0x8000, CRC(ebec4c1c) SHA1(d638ef1486b4c0b3d4d5b666929ca7947e16efad) )
-// ROM_REGION( 0x80000, "atrom", 0 )
+// ROM_REGION( 0x80000, "atrom", 0 )
ROM_REGION( 0x100000, "user3", 0 )
ROM_LOAD( "atrom-4s-0.smc", 0x00000, 0x80000, CRC(ad3ec05c) SHA1(a3d336db585fe02a37c323422d9db6a33fd489a6) )
ROM_REGION( 0x100, "user5", 0 ) /* IPL ROM */
ROM_LOAD( "spc700.rom", 0x00, 0x40, CRC(44bb3a40) SHA1(97e352553e94242ae823547cd853eecda55c20f0) ) /* boot rom */
-// ROM_REGION( 0x1000, "addons", ROMREGION_ERASE00 ) /* add-on chip ROMs (DSP, SFX, etc) */
-// ROM_REGION( MAX_SNES_CART_SIZE, "cart", ROMREGION_ERASE00 )
+// ROM_REGION( 0x1000, "addons", ROMREGION_ERASE00 ) /* add-on chip ROMs (DSP, SFX, etc) */
+// ROM_REGION( MAX_SNES_CART_SIZE, "cart", ROMREGION_ERASE00 )
ROM_END
ROM_START( pss62 )
@@ -282,8 +282,8 @@ ROM_START( pss62 )
ROM_REGION( 0x100, "user5", 0 ) /* IPL ROM */
ROM_LOAD( "spc700.rom", 0x00, 0x40, CRC(44bb3a40) SHA1(97e352553e94242ae823547cd853eecda55c20f0) ) /* boot rom */
-// ROM_REGION( 0x1000, "addons", ROMREGION_ERASE00 ) /* add-on chip ROMs (DSP, SFX, etc) */
-// ROM_REGION( MAX_SNES_CART_SIZE, "cart", ROMREGION_ERASE00 )
+// ROM_REGION( 0x1000, "addons", ROMREGION_ERASE00 ) /* add-on chip ROMs (DSP, SFX, etc) */
+// ROM_REGION( MAX_SNES_CART_SIZE, "cart", ROMREGION_ERASE00 )
ROM_END
GAME( 199?, sfcbox, 0, sfcbox, snes, snes, ROT0, "Nintendo", "Super Famicom Box BIOS", GAME_IS_BIOS_ROOT )
diff --git a/src/mame/drivers/sigmab98.c b/src/mame/drivers/sigmab98.c
index cb6177e28f3..1344ac26945 100644
--- a/src/mame/drivers/sigmab98.c
+++ b/src/mame/drivers/sigmab98.c
@@ -41,15 +41,15 @@ To Do:
Offset: Bits: Value:
- 0 7654 ----
+ 0 7654 ----
---- 3210 Color
- 1 7--- ----
+ 1 7--- ----
-6-- ---- 256 Color Sprite
- --5- ----
+ --5- ----
---4 ---- ?
- ---- 3---
+ ---- 3---
---- -2-- Draw Sprite
- ---- --10
+ ---- --10
2 Tile Code (High)
3 Tile Code (Low)
4 7654 3--- Number of X Tiles - 1
@@ -60,8 +60,8 @@ To Do:
7 Y (Low)
8 Zoom Factor (<< 8, High)
9 Zoom Factor (<< 8, Low)
- a
- b
+ a
+ b
c 7654 3---
---- -210 Delta X (High)
d Delta X (Low)
@@ -268,7 +268,7 @@ static WRITE8_DEVICE_HANDLER( eeprom_w )
eeprom_write_bit(device, data & 0x40);
// reset line asserted: reset.
-// if ((c0 ^ data) & 0x20)
+// if ((c0 ^ data) & 0x20)
eeprom_set_cs_line(device, (data & 0x20) ? CLEAR_LINE : ASSERT_LINE);
// clock line asserted: write latch or select next bit to read
@@ -302,7 +302,7 @@ static WRITE8_HANDLER( c6_w )
set_led_status(space->machine, 1, data & 0x08);
set_led_status(space->machine, 2, data & 0x10);
- set_led_status(space->machine, 3, data & 0x20); //
+ set_led_status(space->machine, 3, data & 0x20); //
c6 = data;
show_outputs();
@@ -329,7 +329,7 @@ static ADDRESS_MAP_START( gegege_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE( 0xc800, 0xc87f ) AM_RAM
-// AM_RANGE( 0xd001, 0xd021 ) AM_RAM
+// AM_RANGE( 0xd001, 0xd021 ) AM_RAM
AM_RANGE( 0xd800, 0xdfff ) AM_RAMBANK("rambank")
AM_RANGE( 0xe000, 0xefff ) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // battery
@@ -343,7 +343,7 @@ static ADDRESS_MAP_START( gegege_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x00, 0x01 ) AM_DEVWRITE( "ymz", ymz280b_w )
AM_RANGE( 0xa0, 0xa1 ) AM_READWRITE( regs_r, regs_w )
-// AM_RANGE( 0xa2, 0xa3 )
+// AM_RANGE( 0xa2, 0xa3 )
AM_RANGE( 0xa4, 0xa5 ) AM_READWRITE( regs2_r, regs2_w )
AM_RANGE( 0xc0, 0xc0 ) AM_READ_PORT( "EEPROM" )
diff --git a/src/mame/drivers/spool99.c b/src/mame/drivers/spool99.c
index d10c731f6ed..06c65bf1bb5 100644
--- a/src/mame/drivers/spool99.c
+++ b/src/mame/drivers/spool99.c
@@ -245,7 +245,7 @@ static READ8_HANDLER( vcarn_io_r )
}
}
-// printf("%04x\n",offset+0xa700);
+// printf("%04x\n",offset+0xa700);
return ROM[0xa700+offset];
}
@@ -262,7 +262,7 @@ static ADDRESS_MAP_START( vcarn_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xa800, 0xabff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xb000, 0xdfff) AM_RAM
-// AM_RANGE(0xdf00, 0xdfff) AM_READWRITE(vcarn_io_r,vcarn_io_w) AM_BASE(&vcarn_io)
+// AM_RANGE(0xdf00, 0xdfff) AM_READWRITE(vcarn_io_r,vcarn_io_w) AM_BASE(&vcarn_io)
AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(spool99_vram_w) AM_BASE_MEMBER(spool99_state,vram)
AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(spool99_cram_w) AM_BASE_MEMBER(spool99_state,cram)
ADDRESS_MAP_END
diff --git a/src/mame/drivers/supdrapo.c b/src/mame/drivers/supdrapo.c
index a9f2611b82c..5befd941a61 100644
--- a/src/mame/drivers/supdrapo.c
+++ b/src/mame/drivers/supdrapo.c
@@ -534,27 +534,27 @@ ROM_END
/*
Poker Relance Gamble
-EMU Infos dumper f205v
-manufacturer Valadon Automation
+EMU Infos dumper f205v
+manufacturer Valadon Automation
Technical references
CPUs
-QTY Type clock position function
-1x NEC D780C 2c 8-bit Microprocessor - main
-1x AY-3-8910 2a Programmable Sound Generator - sound
-1x LM380N 10b Audio Amplifier - sound
-1x oscillator 12.000MHz 5b
+QTY Type clock position function
+1x NEC D780C 2c 8-bit Microprocessor - main
+1x AY-3-8910 2a Programmable Sound Generator - sound
+1x LM380N 10b Audio Amplifier - sound
+1x oscillator 12.000MHz 5b
ROMs
-QTY Type position status
-9x ET2732Q 0-8 dumped
-1x DM74S287N 9n,9p dumped
+QTY Type position status
+9x ET2732Q 0-8 dumped
+1x DM74S287N 9n,9p dumped
RAMs
-QTY Type position
-8x MM2114N-3 1k,1l,1m,1n,2f,3f,3h,3j
-1x MWS5101AEL2 2p
+QTY Type position
+8x MM2114N-3 1k,1l,1m,1n,2f,3f,3h,3j
+1x MWS5101AEL2 2p
Others
@@ -566,7 +566,7 @@ Others
Notes
At 2l there is an empty space with "batt." handwritten on the PCB
-At 1p there is an unmarked DIP20 mil.300 chip.
+At 1p there is an unmarked DIP20 mil.300 chip.
*/
diff --git a/src/mame/drivers/warpwarp.c b/src/mame/drivers/warpwarp.c
index 61c1e182058..08d38a0fae2 100644
--- a/src/mame/drivers/warpwarp.c
+++ b/src/mame/drivers/warpwarp.c
@@ -102,7 +102,7 @@ Notes:
Kaitei (and SOS) is developed by Kazuharu Yoshioka of K.K.Tokki (Universal Tokki).
Namco acquired license for these games.
-
+
- The coin counter doesn't work in kaitei. This might be the expected behaviour.
- sos does a "coffee break" every 2000 points, showing a girl. The first times,
diff --git a/src/mame/machine/snes.c b/src/mame/machine/snes.c
index 69ee7fb9e17..cfcbe7696a4 100644
--- a/src/mame/machine/snes.c
+++ b/src/mame/machine/snes.c
@@ -1726,7 +1726,7 @@ MACHINE_START( snes )
if (state->cart[0].mode == SNES_MODE_BSX)
bsx_init(machine);
-
+
snes_init_timers(machine);
for (i = 0; i < 6; i++)
diff --git a/src/mame/machine/snes7110.c b/src/mame/machine/snes7110.c
index 204cc5d3140..03f63253442 100644
--- a/src/mame/machine/snes7110.c
+++ b/src/mame/machine/snes7110.c
@@ -121,7 +121,7 @@ static const UINT8 spc7110_mode2_context_table[32][2] =
typedef struct
{
running_machine *machine;
-
+
UINT32 decomp_mode;
UINT32 decomp_offset;
@@ -138,7 +138,7 @@ typedef struct
UINT32 morton16[2][256];
UINT32 morton32[4][256];
-
+
UINT32 rom_size;
} SPC7110Decomp;
@@ -867,7 +867,7 @@ typedef struct
UINT64 rtc_offset;
UINT8 rtc_ram[16]; // 0-12 secs, min, hrs, etc.; 13-14-15 control registers
-
+
UINT32 size;
} _snes_spc7110_t;
@@ -929,9 +929,9 @@ static void spc7110_init(running_machine* machine)
snes_spc7110.r4840 = 0x00;
snes_spc7110.r4841 = 0x00;
snes_spc7110.r4842 = 0x00;
-
- snes_spc7110.size = state->cart_size;
-
+
+ snes_spc7110.size = state->cart_size;
+
snes_spc7110.decomp = SPC7110Decomp_ctor(machine, snes_spc7110.size);
}
diff --git a/src/mame/machine/snesbsx.c b/src/mame/machine/snesbsx.c
index fc40b40b6f6..d5280158360 100644
--- a/src/mame/machine/snesbsx.c
+++ b/src/mame/machine/snesbsx.c
@@ -5,7 +5,7 @@
File to handle emulation of the SNES "BS-X Satellaview".
Based on byuu's research.
-
+
TODO: basically everything. The hardware can dynamically remap where
the memory handlers read/write (this will probably require some more
rethinking of the way we use snes_ram), see bsx_update_memory_map
@@ -33,11 +33,11 @@ struct _snes_bsx_state
UINT32 command;
UINT8 write_old;
UINT8 write_new;
-
+
int flash_enable;
int read_enable;
int write_enable;
-
+
UINT8 *pram;
int ram_source;
};
@@ -45,19 +45,19 @@ struct _snes_bsx_state
static struct _snes_bsx_state bsx_state;
-static void bsx_update_memory_map(void)
+static void bsx_update_memory_map(void)
{
bsx_state.ram_source = BIT(bsx_state.cart_regs[0x01], 7) ? SNES_BSX_PRAM : SNES_BSX_FLASH;
-// UINT8 *RAM = (bsx_state.cart_regs[0x01] & 0x80) == 0x00 ? memory_region(space->machine, "flash") : bsx_state.pram;
-
+// UINT8 *RAM = (bsx_state.cart_regs[0x01] & 0x80) == 0x00 ? memory_region(space->machine, "flash") : bsx_state.pram;
+
logerror("BSX: updated memory map, current RAM: %d", bsx_state.ram_source);
- if (!BIT(bsx_state.cart_regs[0x02], 7))
+ if (!BIT(bsx_state.cart_regs[0x02], 7))
{
//LoROM mapping
// 0x00-0x7d:0x8000-0xfff -> RAM (either flash or pram)
// 0x80-0xff:0x8000-0xfff -> RAM
- }
- else
+ }
+ else
{
//HiROM mapping
// 0x00-0x3f:0x8000-0xfff -> RAM - 'shadowed'
@@ -65,68 +65,68 @@ static void bsx_update_memory_map(void)
// 0x80-0xbf:0x8000-0xfff -> RAM - 'shadowed'
// 0xc0-0xff:0x0000-0xfff -> RAM
}
-
- if (BIT(bsx_state.cart_regs[0x03], 7))
+
+ if (BIT(bsx_state.cart_regs[0x03], 7))
{
// 0x60-0x6f:0x0000-0xffff -> PRAM
}
- if (!BIT(bsx_state.cart_regs[0x05], 7))
+ if (!BIT(bsx_state.cart_regs[0x05], 7))
{
// 0x40-0x4f:0x0000-0xffff -> PRAM
}
-
- if (!BIT(bsx_state.cart_regs[0x06], 7))
+
+ if (!BIT(bsx_state.cart_regs[0x06], 7))
{
// 0x50-0x5f:0x0000-0xffff -> PRAM
}
-
- if (BIT(bsx_state.cart_regs[0x07], 7))
+
+ if (BIT(bsx_state.cart_regs[0x07], 7))
{
// 0x00-0x1f:0x8000-0xffff -> CART
}
-
- if (BIT(bsx_state.cart_regs[0x08], 7))
+
+ if (BIT(bsx_state.cart_regs[0x08], 7))
{
// 0x80-0x9f:0x8000-0xffff -> CART
}
-
+
// 0x20-0x3f:0x6000-0x7fff -> PRAM
// 0x70-0x77:0x0000-0xffff -> PRAM
}
static READ8_HANDLER( bsx_read )
{
- if ((offset & 0xf0ffff) == 0x005000)
- {
+ if ((offset & 0xf0ffff) == 0x005000)
+ {
//$[00-0f]:5000 MMIO
UINT8 n = (offset >> 16) & 0x0f;
return bsx_state.cart_regs[n];
}
-
- if ((offset & 0xf8f000) == 0x105000)
- {
+
+ if ((offset & 0xf8f000) == 0x105000)
+ {
//$[10-17]:[5000-5fff] SRAM
return bsx_state.pram[((offset >> 16) & 7) * 0x1000 + (offset & 0xfff)];
}
-
+
return 0x00;
}
static WRITE8_HANDLER( bsx_write )
{
- if ((offset & 0xf0ffff) == 0x005000)
- {
+ if ((offset & 0xf0ffff) == 0x005000)
+ {
//$[00-0f]:5000 MMIO
UINT8 n = (offset >> 16) & 0x0f;
bsx_state.cart_regs[n] = data;
- if ((n == 0x0e) && (data & 0x80))
+ if ((n == 0x0e) && (data & 0x80))
bsx_update_memory_map();
}
-
- if ((offset & 0xf8f000) == 0x105000)
- {
+
+ if ((offset & 0xf8f000) == 0x105000)
+ {
//$[10-17]:[5000-5fff] SRAM
bsx_state.pram[((offset >> 16) & 7) * 0x1000 + (offset & 0xfff)] = data;
}
@@ -134,14 +134,14 @@ static WRITE8_HANDLER( bsx_write )
static void bsx_init( running_machine *machine )
{
-
+
memset(bsx_state.cart_regs, 0, ARRAY_LENGTH(bsx_state.cart_regs));
-
+
bsx_state.cart_regs[0x07] = 0x80;
bsx_state.cart_regs[0x08] = 0x80;
-
+
bsx_state.pram = auto_alloc_array(machine, UINT8, 0x80000);
-
+
bsx_update_memory_map();
// saves
}
@@ -151,22 +151,22 @@ static READ8_HANDLER( bsx_flash_read )
{
UINT8 *FLASH = memory_region(space->machine, "flash");
- if (offset == 0x0002)
+ if (offset == 0x0002)
{
- if (bsx_state.flash_enable)
+ if (bsx_state.flash_enable)
return 0x80;
}
-
- if (offset == 0x5555)
+
+ if (offset == 0x5555)
{
- if (bsx_state.flash_enable)
+ if (bsx_state.flash_enable)
return 0x80;
}
-
- if (bsx_state.read_enable && offset >= 0xff00 && offset <= 0xff13)
+
+ if (bsx_state.read_enable && offset >= 0xff00 && offset <= 0xff13)
{
//read flash cartridge vendor information
- switch(offset - 0xff00)
+ switch(offset - 0xff00)
{
case 0x00: return 0x4d;
case 0x01: return 0x00;
@@ -179,67 +179,67 @@ static READ8_HANDLER( bsx_flash_read )
default: return 0x00;
}
}
-
+
return FLASH[offset];
}
static WRITE8_HANDLER( bsx_flash_write )
{
- if ((offset & 0xff0000) == 0)
+ if ((offset & 0xff0000) == 0)
{
bsx_state.write_old = bsx_state.write_new;
bsx_state.write_new = data;
-
- if (bsx_state.write_enable && bsx_state.write_old == bsx_state.write_new)
+
+ if (bsx_state.write_enable && bsx_state.write_old == bsx_state.write_new)
{
-// currently we have the flashcart loaded in a rom_region -> we cannot write yet
+// currently we have the flashcart loaded in a rom_region -> we cannot write yet
}
- }
- else
+ }
+ else
{
- if (bsx_state.write_enable)
+ if (bsx_state.write_enable)
{
- // currently we have the flashcart loaded in a rom_region -> we cannot write yet
+ // currently we have the flashcart loaded in a rom_region -> we cannot write yet
}
}
-
- if (offset == 0x0000)
+
+ if (offset == 0x0000)
{
bsx_state.command <<= 8;
bsx_state.command |= data;
-
- if ((bsx_state.command & 0xffff) == 0x38d0)
+
+ if ((bsx_state.command & 0xffff) == 0x38d0)
{
bsx_state.flash_enable = 1;
bsx_state.read_enable = 1;
}
}
-
- if (offset == 0x2aaa)
+
+ if (offset == 0x2aaa)
{
bsx_state.command <<= 8;
bsx_state.command |= data;
}
-
- if (offset == 0x5555)
+
+ if (offset == 0x5555)
{
bsx_state.command <<= 8;
bsx_state.command |= data;
-
- if ((bsx_state.command & 0xffffff) == 0xaa5570)
+
+ if ((bsx_state.command & 0xffffff) == 0xaa5570)
{
bsx_state.write_enable = 0;
}
-
- if ((bsx_state.command & 0xffffff) == 0xaa55a0)
+
+ if ((bsx_state.command & 0xffffff) == 0xaa55a0)
{
bsx_state.write_old = 0x00;
bsx_state.write_new = 0x00;
bsx_state.flash_enable = 1;
bsx_state.write_enable = 1;
}
-
- if ((bsx_state.command & 0xffffff) == 0xaa55f0)
+
+ if ((bsx_state.command & 0xffffff) == 0xaa55f0)
{
bsx_state.flash_enable = 0;
bsx_state.read_enable = 0;
diff --git a/src/mame/video/20pacgal.c b/src/mame/video/20pacgal.c
index ab50f43b0f9..5b746c7b102 100644
--- a/src/mame/video/20pacgal.c
+++ b/src/mame/video/20pacgal.c
@@ -373,15 +373,15 @@ static void draw_stars(_20pacgal_state *state, bitmap_t *bitmap, const rectangle
y = clock / 288;
/* code at d616 translates into:
- * carryout = lfsr & 1;
- * lfsr = lfsr>>1;
- * lfsr = (feedback << 15) | lfsr;
- * feedback = (((lfsr>>4) & 1) ^ (carryout & 1)) ^ 1;
- *
- * and needs a Hack:
- * x = 288 - x;
- *
- */
+ * carryout = lfsr & 1;
+ * lfsr = lfsr>>1;
+ * lfsr = (feedback << 15) | lfsr;
+ * feedback = (((lfsr>>4) & 1) ^ (carryout & 1)) ^ 1;
+ *
+ * and needs a Hack:
+ * x = 288 - x;
+ *
+ */
/* code at d648 */
carryout = ((lfsr >> 4) ^ feedback ^ 1) & 1;
diff --git a/src/mame/video/avgdvg.c b/src/mame/video/avgdvg.c
index 11c5325d6f9..c02cf18f2f8 100644
--- a/src/mame/video/avgdvg.c
+++ b/src/mame/video/avgdvg.c
@@ -835,7 +835,7 @@ static int tempest_strobe2(vgdata *vg)
if ((OP2 == 0) && (vg->dvy12 == 0))
{
/* Contrary to previous documentation in MAME,
- Tempest does not have the vg->enspkl bit. */
+ Tempest does not have the vg->enspkl bit. */
if (vg->dvy & 0x800)
vg->color = vg->dvy & 0xf;
else
diff --git a/src/mame/video/namcos2.c b/src/mame/video/namcos2.c
index 07455bf8604..7a22f5f82ac 100644
--- a/src/mame/video/namcos2.c
+++ b/src/mame/video/namcos2.c
@@ -133,38 +133,38 @@ DrawRozHelper(
if( bitmap->bpp == 16 )
{
/* On many processors, the simple approach of an outer loop over the
- rows of the destination bitmap with an inner loop over the columns
- of the destination bitmap has poor performance due to the order
- that memory in the source bitmap is referenced when rotation
- approaches 90 or 270 degrees. The reason is that the inner loop
- ends up reading pixels not sequentially in the source bitmap, but
- instead at rozInfo->incxx increments, which is at its maximum at 90
- degrees of rotation. This means that only a few (or as few as
- one) source pixels are in each cache line at a time.
-
- Instead of the above, this code iterates in NxN blocks through the
- destination bitmap. This has more overhead when there is little or
- no rotation, but much better performance when there is closer to 90
- degrees of rotation (as long as the chunk of the source bitmap that
- corresponds to an NxN destination block fits in cache!).
-
- N is defined by ROZ_BLOCK_SIZE below; the best N is one that is as
- big as possible but at the same time not too big to prevent all of
- the source bitmap pixels from fitting into cache at the same time.
- Keep in mind that the block of source pixels used can be somewhat
- scattered in memory. 8x8 works well on the few processors that
- were tested; 16x16 seems to work even better for more modern
- processors with larger caches, but since 8x8 works well enough and
- is less likely to result in cache misses on processors with smaller
- caches, it is used.
- */
+ rows of the destination bitmap with an inner loop over the columns
+ of the destination bitmap has poor performance due to the order
+ that memory in the source bitmap is referenced when rotation
+ approaches 90 or 270 degrees. The reason is that the inner loop
+ ends up reading pixels not sequentially in the source bitmap, but
+ instead at rozInfo->incxx increments, which is at its maximum at 90
+ degrees of rotation. This means that only a few (or as few as
+ one) source pixels are in each cache line at a time.
+
+ Instead of the above, this code iterates in NxN blocks through the
+ destination bitmap. This has more overhead when there is little or
+ no rotation, but much better performance when there is closer to 90
+ degrees of rotation (as long as the chunk of the source bitmap that
+ corresponds to an NxN destination block fits in cache!).
+
+ N is defined by ROZ_BLOCK_SIZE below; the best N is one that is as
+ big as possible but at the same time not too big to prevent all of
+ the source bitmap pixels from fitting into cache at the same time.
+ Keep in mind that the block of source pixels used can be somewhat
+ scattered in memory. 8x8 works well on the few processors that
+ were tested; 16x16 seems to work even better for more modern
+ processors with larger caches, but since 8x8 works well enough and
+ is less likely to result in cache misses on processors with smaller
+ caches, it is used.
+ */
#define ROZ_BLOCK_SIZE 8
UINT32 size_mask = rozInfo->size - 1;
bitmap_t *srcbitmap = tilemap_get_pixmap(tmap);
bitmap_t *flagsbitmap = tilemap_get_flagsmap(tmap);
- UINT32 srcx = (rozInfo->startx + (clip->min_x * rozInfo->incxx) +
+ UINT32 srcx = (rozInfo->startx + (clip->min_x * rozInfo->incxx) +
(clip->min_y * rozInfo->incyx));
UINT32 srcy = (rozInfo->starty + (clip->min_x * rozInfo->incxy) +
(clip->min_y * rozInfo->incyy));
diff --git a/src/mame/video/stvvdp2.c b/src/mame/video/stvvdp2.c
index 7dcc0edafb5..04c53207a61 100644
--- a/src/mame/video/stvvdp2.c
+++ b/src/mame/video/stvvdp2.c
@@ -5521,8 +5521,8 @@ static void stv_vdp2_dynamic_res_change(running_machine *machine)
vblank_period = get_vblank_duration(machine);
hblank_period = get_hblank_duration(machine);
-// popmessage("%d",vblank_period);
-// hblank_period = get_hblank_duration(machine->primary_screen);
+// popmessage("%d",vblank_period);
+// hblank_period = get_hblank_duration(machine->primary_screen);
video_screen_configure(machine->primary_screen, (horz_res+hblank_period), (vert_res+vblank_period), &visarea, video_screen_get_frame_period(machine->primary_screen).attoseconds );
old_vres = vert_res;
diff --git a/src/mame/video/toaplan2.c b/src/mame/video/toaplan2.c
index 5d2be6699de..3887f6b90d5 100644
--- a/src/mame/video/toaplan2.c
+++ b/src/mame/video/toaplan2.c
@@ -907,14 +907,14 @@ static void toaplan2_scroll_reg_select_w(offs_t offset, UINT16 data, UINT16 mem_
WRITE16_HANDLER( toaplan2_0_scroll_reg_select_w )
{
-// printf("toaplan2_scroll_reg_select_w %04x %04x\n",offset,data);
+// printf("toaplan2_scroll_reg_select_w %04x %04x\n",offset,data);
toaplan2_scroll_reg_select_w(offset, data, mem_mask, 0);
}
WRITE16_HANDLER( toaplan2_1_scroll_reg_select_w )
{
-// printf("toaplan2_scroll_1_reg_select_w %04x %04x\n",offset,data);
+// printf("toaplan2_scroll_1_reg_select_w %04x %04x\n",offset,data);
toaplan2_scroll_reg_select_w(offset, data, mem_mask, 1);
}
@@ -1440,20 +1440,20 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect
{
if (flipx) sx = sx_base - dim_x;
else sx = sx_base + dim_x;
-
+
/*
- drawgfx_transpen(bitmap,cliprect,gfx,sprite,
- color,
- flipx,flipy,
- sx,sy,0);
- */
+ drawgfx_transpen(bitmap,cliprect,gfx,sprite,
+ color,
+ flipx,flipy,
+ sx,sy,0);
+ */
sprite %= gfx->total_elements;
color %= gfx->total_colors;
-
+
{
int yy, xx;
const pen_t *paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
- const UINT8* srcdata = gfx_element_get_data(gfx, sprite);
+ const UINT8* srcdata = gfx_element_get_data(gfx, sprite);
int count = 0;
int ystart, yend, yinc;
int xstart, xend, xinc;
@@ -1487,7 +1487,7 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect
for (yy=ystart;yy!=yend;yy+=yinc)
{
int drawyy = yy+sy;
-
+
for (xx=xstart;xx!=xend;xx+=xinc)
{
@@ -1498,7 +1498,7 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect
UINT8 pix = srcdata[count];
UINT16* dstptr = BITMAP_ADDR16(bitmap,drawyy,drawxx);
UINT8* dstpri = BITMAP_ADDR8(toaplan2_custom_priority_bitmap, drawyy, drawxx);
-
+
if (priority >= dstpri[0])
{
if (pix&0xf)
@@ -1517,7 +1517,7 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect
}
-
+
sprite++ ;
@@ -1556,10 +1556,10 @@ void toaplan2_draw_custom_tilemap(running_machine* machine, bitmap_t* bitmap, ti
for (x=0;x<width;x++)
{
int realx = (x+scrollx)&0x1ff;
-
+
UINT16 pixdat = srcptr[realx];
UINT8 pixpri = ((pixdat & 0xf000)>>12);
-
+
if (pri_enable[pixpri])
{
pixpri = priremap[pixpri]+1; // priority of 0 isn't desireable
@@ -1629,7 +1629,7 @@ VIDEO_UPDATE( batsugun_1 )
{
toaplan2_log_vram(screen->machine);
-
+
bitmap_fill(bitmap,cliprect,0);
bitmap_fill(toaplan2_custom_priority_bitmap, cliprect, 0);
@@ -1693,7 +1693,7 @@ VIDEO_UPDATE( batrider_0 )
VIDEO_UPDATE( mahoudai_0 )
{
toaplan2_log_vram(screen->machine);
-
+
VIDEO_UPDATE_CALL( toaplan2_0 );
tilemap_draw(bitmap,cliprect,tx_tilemap,0,0);
diff --git a/src/version.c b/src/version.c
index 22acdd58673..268310daecf 100644
--- a/src/version.c
+++ b/src/version.c
@@ -10,4 +10,4 @@
***************************************************************************/
extern const char build_version[];
-const char build_version[] = "0.138 ("__DATE__")";
+const char build_version[] = "0.138u1 ("__DATE__")";