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author Sandro Ronco <sronco@users.noreply.github.com>2012-09-10 19:14:33 +0000
committer Sandro Ronco <sronco@users.noreply.github.com>2012-09-10 19:14:33 +0000
commiteac302620f9f2006bd93881bdaa38810cbd4166a (patch)
tree0d4739b5d8c3c3706bbaeb8ebe7270338684dd5b /src
parent3faba956099ae0900685df838de8844ac5f899e2 (diff)
fixed RORA/RORB opcodes in HC11 core. (nw)
Diffstat (limited to 'src')
-rw-r--r--src/emu/cpu/mc68hc11/hc11ops.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/emu/cpu/mc68hc11/hc11ops.c b/src/emu/cpu/mc68hc11/hc11ops.c
index cc19d247f57..4ae017e7533 100644
--- a/src/emu/cpu/mc68hc11/hc11ops.c
+++ b/src/emu/cpu/mc68hc11/hc11ops.c
@@ -2679,7 +2679,7 @@ static void HC11OP(rol_indy)(hc11_state *cpustate)
/* RORA 0x46 */
static void HC11OP(rora)(hc11_state *cpustate)
{
- UINT16 r = ((REG_A & 0x7f) >> 1) | ((cpustate->ccr & CC_C) ? 0x80 : 0);
+ UINT16 r = ((REG_A & 0xfe) >> 1) | ((cpustate->ccr & CC_C) ? 0x80 : 0);
CLEAR_NZVC(cpustate);
cpustate->ccr |= (REG_A & 1) ? CC_C : 0;
REG_A = (UINT8)(r);
@@ -2698,7 +2698,7 @@ static void HC11OP(rora)(hc11_state *cpustate)
/* RORB 0x56 */
static void HC11OP(rorb)(hc11_state *cpustate)
{
- UINT16 r = ((REG_B & 0x7f) >> 1) | ((cpustate->ccr & CC_C) ? 0x80 : 0);
+ UINT16 r = ((REG_B & 0xfe) >> 1) | ((cpustate->ccr & CC_C) ? 0x80 : 0);
CLEAR_NZVC(cpustate);
cpustate->ccr |= (REG_B & 1) ? CC_C : 0;
REG_B = (UINT8)(r);