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author Angelo Salese <angelosa@users.noreply.github.com>2014-04-16 00:42:59 +0000
committer Angelo Salese <angelosa@users.noreply.github.com>2014-04-16 00:42:59 +0000
commitcd65549f38dc98857cf33e2ab48bdf61b2d820c4 (patch)
tree3bf631d8a4bd05837dfdcbaf06581441bc71c797 /src
parent4b3da60e079e1b4223181dd3880e836c1206db2a (diff)
Simplified Last Bronx fix, however it's confirmed to set dst address to 0, Ville?
Diffstat (limited to 'src')
-rw-r--r--src/emu/cpu/arm/arm.c4
-rw-r--r--src/emu/cpu/sharc/sharc.c11
-rw-r--r--src/mame/drivers/model2.c11
-rw-r--r--src/mame/machine/archimds.c9
4 files changed, 25 insertions, 10 deletions
diff --git a/src/emu/cpu/arm/arm.c b/src/emu/cpu/arm/arm.c
index cb667fd65a1..1725994ecbf 100644
--- a/src/emu/cpu/arm/arm.c
+++ b/src/emu/cpu/arm/arm.c
@@ -1401,7 +1401,7 @@ void arm_cpu_device::HandleCoProVL86C020( UINT32 insn )
0x00<<0 <- Revision number, 0
*/
SetRegister(rn, 0x41560300);
- debugger_break(machine());
+ //debugger_break(machine());
}
else
SetRegister(rn, m_coproRegister[crn]);
@@ -1413,7 +1413,7 @@ void arm_cpu_device::HandleCoProVL86C020( UINT32 insn )
if(crn != 0)
m_coproRegister[crn]=GetRegister(rn);
- printf("%08x: VL86C020 copro instruction write %08x %d %d\n", R15 & 0x3ffffff, insn,rn,crn);
+ //printf("%08x: VL86C020 copro instruction write %08x %d %d\n", R15 & 0x3ffffff, insn,rn,crn);
}
else
{
diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c
index 8735841b65c..cfd28c76d65 100644
--- a/src/emu/cpu/sharc/sharc.c
+++ b/src/emu/cpu/sharc/sharc.c
@@ -49,7 +49,7 @@ const device_type ADSP21062 = &device_creator<adsp21062_device>;
// This is just used to stop the debugger from complaining about executing from I/O space
static ADDRESS_MAP_START( internal_pgm, AS_PROGRAM, 64, adsp21062_device )
- AM_RANGE(0x20000, 0x7ffff) AM_RAM
+ AM_RANGE(0x20000, 0x7ffff) AM_RAM AM_SHARE("x")
ADDRESS_MAP_END
@@ -145,8 +145,14 @@ void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data)
case 0x00: break; // System configuration
case 0x02: break; // External Memory Wait State Configuration
case 0x04: // External port DMA buffer 0
- /* TODO: Last Bronx uses this to init program, shift and in */
+ /* TODO: Last Bronx uses this to init the program, int_index however is 0? */
{
+ external_dma_write(m_extdma_shift,data);
+ m_extdma_shift++;
+ if(m_extdma_shift == 3)
+ m_extdma_shift = 0;
+
+ #if 0
UINT64 r = pm_read48(m_dma[6].int_index);
r &= ~((UINT64)(0xffff) << (m_extdma_shift*16));
@@ -160,6 +166,7 @@ void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data)
m_extdma_shift = 0;
m_dma[6].int_index ++;
}
+ #endif
}
break;
diff --git a/src/mame/drivers/model2.c b/src/mame/drivers/model2.c
index 58133d4dd3a..c10baf62469 100644
--- a/src/mame/drivers/model2.c
+++ b/src/mame/drivers/model2.c
@@ -756,15 +756,18 @@ WRITE32_MEMBER(model2_state::copro_sharc_iop_w)
(strcmp(machine().system().name, "gunblade" ) == 0) ||
(strcmp(machine().system().name, "von" ) == 0) ||
(strcmp(machine().system().name, "vonj" ) == 0) ||
- (strcmp(machine().system().name, "rchase2" ) == 0) ||
- (strcmp(machine().system().name, "lastbrnx" ) == 0) ||
- (strcmp(machine().system().name, "lastbrnxu" ) == 0) ||
- (strcmp(machine().system().name, "lastbrnxj" ) == 0))
+ (strcmp(machine().system().name, "rchase2" ) == 0))
{
machine().device<adsp21062_device>("dsp")->external_iop_write(offset, data);
}
else
{
+ if(offset == 0x10/4)
+ {
+ machine().device<adsp21062_device>("dsp")->external_iop_write(offset, data);
+ return;
+ }
+
if ((m_iop_write_num & 1) == 0)
{
m_iop_data = data & 0xffff;
diff --git a/src/mame/machine/archimds.c b/src/mame/machine/archimds.c
index 061c3d00a9c..90c61616735 100644
--- a/src/mame/machine/archimds.c
+++ b/src/mame/machine/archimds.c
@@ -58,7 +58,9 @@ void archimedes_state::archimedes_request_irq_b(int mask)
if (m_ioc_regs[IRQ_STATUS_B] & m_ioc_regs[IRQ_MASK_B])
{
- m_maincpu->set_input_line(ARM_IRQ_LINE, HOLD_LINE);
+ generic_pulse_irq_line(m_maincpu, ARM_IRQ_LINE, 1);
+ //m_maincpu->set_input_line(ARM_IRQ_LINE, CLEAR_LINE);
+ //m_maincpu->set_input_line(ARM_IRQ_LINE, ASSERT_LINE);
}
}
@@ -70,7 +72,10 @@ void archimedes_state::archimedes_request_fiq(int mask)
if (m_ioc_regs[FIQ_STATUS] & m_ioc_regs[FIQ_MASK])
{
- m_maincpu->set_input_line(ARM_FIRQ_LINE, HOLD_LINE);
+ generic_pulse_irq_line(m_maincpu, ARM_FIRQ_LINE, 1);
+
+ //m_maincpu->set_input_line(ARM_FIRQ_LINE, CLEAR_LINE);
+ //m_maincpu->set_input_line(ARM_FIRQ_LINE, ASSERT_LINE);
}
}