diff options
| author | 2008-11-06 18:42:37 +0000 | |
|---|---|---|
| committer | 2008-11-06 18:42:37 +0000 | |
| commit | b44da3b748d0ef6fa95e1c39f556e5e3cff5169b (patch) | |
| tree | 2a7acc4cfab418620bfc99ec6f460f32475bb934 /src | |
| parent | 1228d0ad9ea3fa2fb7a3b88357ba286247fc8826 (diff) | |
WARNING: This is a significant change. If you are risk-averse and
working on something, hold off syncing.
Defined macros for core CPU functions: CPU_INIT, CPU_RESET, CPU_EXIT,
CPU_EXECUTE, along with macros for the name and for calling, in the
spirit of the devintrf.h macros. More will come later.
Changed init, reset, exit, and execute interfaces to be passed a
const device_config * object. This is a fake object for the moment,
but encapsulates the machine pointer and token. Eventually this will
be a real device.
Changed the CPU IRQ callbacks to a proper type, and added a device
parameter to them.
Updated all CPU cores to the new macros and parameters.
Note that this changes the way we "pointer"-ify cores. I'll send an
update shortly.
Diffstat (limited to 'src')
126 files changed, 2450 insertions, 2252 deletions
diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c index 672a217a93d..11412137f68 100644 --- a/src/emu/cpu/adsp2100/adsp2100.c +++ b/src/emu/cpu/adsp2100/adsp2100.c @@ -241,7 +241,8 @@ typedef struct UINT16 ifc; UINT8 irq_state[9]; UINT8 irq_latch[9]; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; /* other internal states */ int icount; @@ -551,9 +552,6 @@ static void set_irq_line(adsp2100_state *adsp, int irqline, int state) static void adsp21xx_get_context(void *dst) { - /* copy the context */ - if (dst) - *(void **)dst = token; } @@ -563,7 +561,7 @@ static void adsp21xx_set_context(void *src) if (src) { adsp2100_state *adsp; - token = *(void **)src; + token = src; adsp = token; CHANGEPC(adsp); check_irqs(adsp); @@ -576,13 +574,11 @@ static void adsp21xx_set_context(void *src) INITIALIZATION AND SHUTDOWN ***************************************************************************/ -static adsp2100_state *adsp21xx_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static adsp2100_state *adsp21xx_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback) { - adsp2100_state *adsp; + adsp2100_state *adsp = device->token; - /* allocate state */ - token = adsp = auto_malloc(sizeof(adsp2100_state)); - memset(adsp, 0, sizeof(adsp2100_state)); + token = device->token; // temporary /* create the tables */ if (!create_tables()) @@ -590,6 +586,7 @@ static adsp2100_state *adsp21xx_init(int index, int clock, const void *config, i /* set the IRQ callback */ adsp->irq_callback = irqcallback; + adsp->device = device; /* set up ALU register pointers */ adsp->alu_xregs[0] = &adsp->core.ax0; @@ -714,9 +711,9 @@ static adsp2100_state *adsp21xx_init(int index, int clock, const void *config, i } -static void adsp21xx_reset(void) +static CPU_RESET( adsp21xx ) { - adsp2100_state *adsp = token; + adsp2100_state *adsp = device->token; int irq; /* ensure that zero is zero */ @@ -874,7 +871,7 @@ static int create_tables(void) } -static void adsp21xx_exit(void) +static CPU_EXIT( adsp21xx ) { if (reverse_table != NULL) free(reverse_table); @@ -915,10 +912,10 @@ static void adsp21xx_exit(void) ***************************************************************************/ /* execute instructions on this CPU until icount expires */ -static int adsp21xx_execute(int cycles) +static CPU_EXECUTE( adsp21xx ) { int check_debugger = ((Machine->debug_flags & DEBUG_FLAG_ENABLED) != 0); - adsp2100_state *adsp = token; + adsp2100_state *adsp = device->token; /* reset the core */ set_mstat(adsp, adsp->mstat); @@ -1799,7 +1796,7 @@ static void adsp21xx_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(void *); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(adsp2100_state); break; case CPUINFO_INT_INPUT_LINES: /* set per CPU */ break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -1925,9 +1922,9 @@ static void adsp21xx_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_CONTEXT: info->setcontext = adsp21xx_set_context;break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = adsp21xx_get_context;break; case CPUINFO_PTR_INIT: /* set per CPU */ break; - case CPUINFO_PTR_RESET: info->reset = adsp21xx_reset; break; - case CPUINFO_PTR_EXIT: info->exit = adsp21xx_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = adsp21xx_execute; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(adsp21xx); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(adsp21xx); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(adsp21xx); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = adsp21xx_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &adsp->icount; break; @@ -2069,9 +2066,9 @@ static void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata) * ADSP2100 section **************************************************************************/ -static void adsp2100_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( adsp2100 ) { - adsp2100_state *adsp = adsp21xx_init(index, clock, config, irqcallback); + adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback); adsp->chip_type = CHIP_TYPE_ADSP2100; adsp->mstat_mask = 0x0f; adsp->imask_mask = 0x0f; @@ -2107,7 +2104,7 @@ void adsp2100_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ3: info->i = adsp->irq_state[ADSP2100_IRQ3]; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = adsp2100_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2100); break; case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2100_set_info; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = adsp21xx_set_context; break; @@ -2127,9 +2124,9 @@ void adsp2100_get_info(UINT32 state, cpuinfo *info) * ADSP2101 section **************************************************************************/ -static void adsp2101_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( adsp2101 ) { - adsp2100_state *adsp = adsp21xx_init(index, clock, config, irqcallback); + adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback); adsp->chip_type = CHIP_TYPE_ADSP2101; adsp->mstat_mask = 0x7f; adsp->imask_mask = 0x3f; @@ -2174,7 +2171,7 @@ void adsp2101_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_INPUT_STATE + ADSP2101_TIMER: info->i = adsp->irq_state[ADSP2101_TIMER]; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = adsp2101_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2101); break; case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2101_set_info; break; case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break; @@ -2197,9 +2194,9 @@ void adsp2101_get_info(UINT32 state, cpuinfo *info) * ADSP2104 section **************************************************************************/ -static void adsp2104_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( adsp2104 ) { - adsp2100_state *adsp = adsp21xx_init(index, clock, config, irqcallback); + adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback); adsp->chip_type = CHIP_TYPE_ADSP2104; adsp->mstat_mask = 0x7f; adsp->imask_mask = 0x3f; @@ -2249,7 +2246,7 @@ void adsp2104_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_INPUT_STATE + ADSP2104_TIMER: info->i = adsp->irq_state[ADSP2104_TIMER]; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = adsp2104_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2104); break; case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2104_set_info; break; case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break; @@ -2272,9 +2269,9 @@ void adsp2104_get_info(UINT32 state, cpuinfo *info) * ADSP2105 section **************************************************************************/ -static void adsp2105_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( adsp2105 ) { - adsp2100_state *adsp = adsp21xx_init(index, clock, config, irqcallback); + adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback); adsp->chip_type = CHIP_TYPE_ADSP2105; adsp->mstat_mask = 0x7f; adsp->imask_mask = 0x3f; @@ -2318,7 +2315,7 @@ void adsp2105_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ2: info->i = adsp->irq_state[ADSP2105_IRQ2]; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = adsp2105_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2105); break; case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2105_set_info; break; case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break; @@ -2341,9 +2338,9 @@ void adsp2105_get_info(UINT32 state, cpuinfo *info) * ADSP2115 section **************************************************************************/ -static void adsp2115_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( adsp2115 ) { - adsp2100_state *adsp = adsp21xx_init(index, clock, config, irqcallback); + adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback); adsp->chip_type = CHIP_TYPE_ADSP2115; adsp->mstat_mask = 0x7f; adsp->imask_mask = 0x3f; @@ -2393,7 +2390,7 @@ void adsp2115_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_INPUT_STATE + ADSP2115_TIMER: info->i = adsp->irq_state[ADSP2115_TIMER]; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = adsp2115_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2115); break; case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2115_set_info; break; case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break; @@ -2416,9 +2413,9 @@ void adsp2115_get_info(UINT32 state, cpuinfo *info) * ADSP2181 section **************************************************************************/ -static void adsp2181_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( adsp2181 ) { - adsp2100_state *adsp = adsp21xx_init(index, clock, config, irqcallback); + adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback); adsp->chip_type = CHIP_TYPE_ADSP2181; adsp->mstat_mask = 0x7f; adsp->imask_mask = 0x3ff; @@ -2478,7 +2475,7 @@ void adsp2181_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = -1; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = adsp2181_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2181); break; case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2181_set_info; break; case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break; diff --git a/src/emu/cpu/alph8201/alph8201.c b/src/emu/cpu/alph8201/alph8201.c index 4360a10a8a8..b2751aa2d8c 100644 --- a/src/emu/cpu/alph8201/alph8201.c +++ b/src/emu/cpu/alph8201/alph8201.c @@ -662,7 +662,7 @@ static const s_opcode opcode_8301[256]= /**************************************************************************** * Initialize emulation ****************************************************************************/ -static void ALPHA8201_init (int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ALPHA8201 ) { state_save_register_item_array("ALPHA8201", index, R.RAM); state_save_register_item("ALPHA8201", index, R.PREVPC); @@ -689,7 +689,7 @@ static void ALPHA8201_init (int index, int clock, const void *config, int (*irqc /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void ALPHA8201_reset (void) +static CPU_RESET( ALPHA8201 ) { PC = 0; regPTR = 0; @@ -712,7 +712,7 @@ static void ALPHA8201_reset (void) /**************************************************************************** * Shut down CPU emulation ****************************************************************************/ -static void ALPHA8201_exit (void) +static CPU_EXIT( ALPHA8201 ) { /* nothing to do ? */ } @@ -802,11 +802,11 @@ mame_printf_debug("ALPHA8201: PC = %03x, opcode = %02x\n", PC, opcode); } #if (HAS_ALPHA8201) -static int ALPHA8201_execute(int cycles) { return alpha8xxx_execute(opcode_8201,cycles); } +static CPU_EXECUTE( ALPHA8201 ) { return alpha8xxx_execute(opcode_8201,cycles); } #endif #if (HAS_ALPHA8301) -static int ALPHA8301_execute(int cycles) { return alpha8xxx_execute(opcode_8301,cycles); } +static CPU_EXECUTE( ALPHA8301 ) { return alpha8xxx_execute(opcode_8301,cycles); } #endif /**************************************************************************** @@ -947,9 +947,9 @@ static void alpha8xxx_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = ALPHA8201_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ALPHA8201_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ALPHA8201_set_context; break; - case CPUINFO_PTR_INIT: info->init = ALPHA8201_init; break; - case CPUINFO_PTR_RESET: info->reset = ALPHA8201_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ALPHA8201_exit; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ALPHA8201); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ALPHA8201); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ALPHA8201); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ALPHA8201_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ALPHA8201_ICount; break; @@ -992,7 +992,7 @@ void alpha8201_get_info(UINT32 state, cpuinfo *info) switch (state) { case CPUINFO_STR_NAME: strcpy(info->s, "ALPHA-8201"); break; - case CPUINFO_PTR_EXECUTE: info->execute = ALPHA8201_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ALPHA8201); break; default: /* 8201 / 8301 */ alpha8xxx_get_info(state,info); @@ -1006,7 +1006,7 @@ void alpha8301_get_info(UINT32 state, cpuinfo *info) switch (state) { case CPUINFO_STR_NAME: strcpy(info->s, "ALPHA-8301"); break; - case CPUINFO_PTR_EXECUTE: info->execute = ALPHA8301_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ALPHA8301); break; default: /* 8201 / 8301 */ alpha8xxx_get_info(state,info); diff --git a/src/emu/cpu/apexc/apexc.c b/src/emu/cpu/apexc/apexc.c index 8eab48f992f..feb02f8c84a 100644 --- a/src/emu/cpu/apexc/apexc.c +++ b/src/emu/cpu/apexc/apexc.c @@ -768,11 +768,11 @@ special_fetch: } -static void apexc_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( apexc ) { } -static void apexc_reset(void) +static CPU_RESET( apexc ) { /* mmmh... I don't know what happens on reset with an actual APEXC. */ @@ -797,7 +797,7 @@ static void apexc_set_context(void *src) apexc = * ((apexc_regs*)src); } -static int apexc_execute(int cycles) +static CPU_EXECUTE( apexc ) { apexc_ICount = cycles; @@ -895,9 +895,9 @@ void apexc_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = apexc_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = apexc_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = apexc_set_context; break; - case CPUINFO_PTR_INIT: info->init = apexc_init; break; - case CPUINFO_PTR_RESET: info->reset = apexc_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = apexc_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(apexc); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(apexc); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(apexc); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = apexc_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &apexc_ICount; break; diff --git a/src/emu/cpu/arm/arm.c b/src/emu/cpu/arm/arm.c index b219a3c59ea..edf1060c578 100644 --- a/src/emu/cpu/arm/arm.c +++ b/src/emu/cpu/arm/arm.c @@ -230,7 +230,8 @@ typedef struct UINT32 coproRegister[16]; UINT8 pendingIrq; UINT8 pendingFiq; - int (*irq_callback)(int); + cpu_irq_callback irq_callback; + const device_config *device; } ARM_REGS; static ARM_REGS arm; @@ -300,23 +301,25 @@ INLINE void SetRegister( int rIndex, UINT32 value ) /***************************************************************************/ -static void arm_reset(void) +static CPU_RESET( arm ) { - int (*save_irqcallback)(int) = arm.irq_callback; + cpu_irq_callback save_irqcallback = arm.irq_callback; + const device_config *save_device = arm.device; memset(&arm, 0, sizeof(arm)); arm.irq_callback = save_irqcallback; + arm.device = save_device; /* start up in SVC mode with interrupts disabled. */ R15 = eARM_MODE_SVC|I_MASK|F_MASK; change_pc(R15 & ADDRESS_MASK); } -static void arm_exit(void) +static CPU_EXIT( arm ) { /* nothing to do here */ } -static int arm_execute( int cycles ) +static CPU_EXECUTE( arm ) { UINT32 pc; UINT32 insn; @@ -509,9 +512,10 @@ static offs_t arm_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 return 4 | arm_disasm(buffer, pc, opcode); } -static void arm_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( arm ) { arm.irq_callback = irqcallback; + arm.device = device; state_save_register_item_array("arm", index, arm.sArmRegister); state_save_register_item_array("arm", index, arm.coproRegister); @@ -1525,10 +1529,10 @@ void arm_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = arm_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = arm_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = arm_set_context; break; - case CPUINFO_PTR_INIT: info->init = arm_init; break; - case CPUINFO_PTR_RESET: info->reset = arm_reset; break; - case CPUINFO_PTR_EXIT: info->exit = arm_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = arm_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(arm); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(arm); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(arm); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = arm_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &arm_icount; break; diff --git a/src/emu/cpu/arm7/arm7.c b/src/emu/cpu/arm7/arm7.c index b54b70b9608..ab27a245b8f 100644 --- a/src/emu/cpu/arm7/arm7.c +++ b/src/emu/cpu/arm7/arm7.c @@ -82,12 +82,13 @@ static int ARM7_ICOUNT; /*************************************************************************** * CPU SPECIFIC IMPLEMENTATIONS **************************************************************************/ -static void arm7_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( arm7 ) { // must call core arm7_core_init("arm7", index); ARM7.irq_callback = irqcallback; + ARM7.device = device; #if TEST_COPROC_FUNCS // setup co-proc callbacks example @@ -99,18 +100,18 @@ static void arm7_init(int index, int clock, const void *config, int (*irqcallbac #endif } -static void arm7_reset(void) +static CPU_RESET( arm7 ) { // must call core reset arm7_core_reset(); } -static void arm7_exit(void) +static CPU_EXIT( arm7 ) { /* nothing to do here */ } -static int arm7_execute(int cycles) +static CPU_EXECUTE( arm7 ) { /* include the arm7 core execute code */ #include "arm7exec.c" @@ -322,10 +323,10 @@ void arm7_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = arm7_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = arm7_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = arm7_set_context; break; - case CPUINFO_PTR_INIT: info->init = arm7_init; break; - case CPUINFO_PTR_RESET: info->reset = arm7_reset; break; - case CPUINFO_PTR_EXIT: info->exit = arm7_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = arm7_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(arm7); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(arm7); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(arm7); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm7); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = arm7_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ARM7_ICOUNT; break; diff --git a/src/emu/cpu/arm7/arm7core.c b/src/emu/cpu/arm7/arm7core.c index 9610ac8699a..febfa6aff99 100644 --- a/src/emu/cpu/arm7/arm7core.c +++ b/src/emu/cpu/arm7/arm7core.c @@ -522,10 +522,12 @@ static void arm7_core_init(const char *cpuname, int index) // CPU RESET static void arm7_core_reset(void) { - int (*save_irqcallback)(int) = ARM7.irq_callback; + cpu_irq_callback save_irqcallback = ARM7.irq_callback; + const device_config *save_device = ARM7.device; memset(&ARM7, 0, sizeof(ARM7)); ARM7.irq_callback = save_irqcallback; + ARM7.device = save_device; /* start up in SVC mode with interrupts disabled. */ SwitchMode(eARM7_MODE_SVC); diff --git a/src/emu/cpu/arm7/arm7core.h b/src/emu/cpu/arm7/arm7core.h index 29fa38e7666..872f2585271 100644 --- a/src/emu/cpu/arm7/arm7core.h +++ b/src/emu/cpu/arm7/arm7core.h @@ -67,7 +67,8 @@ enum UINT8 pendingAbtP; \ UINT8 pendingUnd; \ UINT8 pendingSwi; \ - int (*irq_callback)(int); + cpu_irq_callback irq_callback; \ + const device_config *device; /**************************************************************************************************** diff --git a/src/emu/cpu/arm7/arm7exec.c b/src/emu/cpu/arm7/arm7exec.c index 4cf9a3e1efc..9e5af22cd00 100644 --- a/src/emu/cpu/arm7/arm7exec.c +++ b/src/emu/cpu/arm7/arm7exec.c @@ -31,7 +31,7 @@ * * It should be included as follows in your cpu core: * - * int arm7_execute(int cycles) + * CPU_EXECUTE( arm7 ) * { * #include "arm7exec.c" * } diff --git a/src/emu/cpu/asap/asap.c b/src/emu/cpu/asap/asap.c index a6ba2c99604..0925fa76cfa 100644 --- a/src/emu/cpu/asap/asap.c +++ b/src/emu/cpu/asap/asap.c @@ -85,7 +85,8 @@ typedef struct UINT32 nextpc; UINT8 irq_state; int interrupt_cycles; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } asap_regs; @@ -378,8 +379,8 @@ INLINE void check_irqs(void) if (asap.irq_state && asap.iflag) { generate_exception(EXCEPTION_INTERRUPT); - if (asap.irq_callback) - (*asap.irq_callback)(ASAP_IRQ0); + if (asap.irq_callback != NULL) + (*asap.irq_callback)(asap.device, ASAP_IRQ0); } } @@ -470,13 +471,14 @@ static void init_tables(void) } } -static void asap_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( asap ) { init_tables(); asap.irq_callback = irqcallback; + asap.device = device; } -static void asap_reset(void) +static CPU_RESET( asap ) { /* initialize the state */ src2val[REGBASE + 0] = 0; @@ -493,7 +495,7 @@ static void asap_reset(void) } -static void asap_exit(void) +static CPU_EXIT( asap ) { opcode = NULL; src2val = NULL; @@ -532,7 +534,7 @@ INLINE void execute_instruction(void) (*opcode[asap.op.d >> 21])(); } -static int asap_execute(int cycles) +static CPU_EXECUTE( asap ) { /* count cycles and interrupt cycles */ asap_icount = cycles; @@ -1837,10 +1839,10 @@ void asap_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = asap_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = asap_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = asap_set_context; break; - case CPUINFO_PTR_INIT: info->init = asap_init; break; - case CPUINFO_PTR_RESET: info->reset = asap_reset; break; - case CPUINFO_PTR_EXIT: info->exit = asap_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = asap_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(asap); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(asap); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(asap); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(asap); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = asap_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &asap_icount; break; diff --git a/src/emu/cpu/ccpu/ccpu.c b/src/emu/cpu/ccpu/ccpu.c index bba11dd5918..a72828545b5 100644 --- a/src/emu/cpu/ccpu/ccpu.c +++ b/src/emu/cpu/ccpu/ccpu.c @@ -134,13 +134,13 @@ void ccpu_wdt_timer_trigger(void) } -static void ccpu_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ccpu ) { - const ccpu_config *config = _config; + const ccpu_config *configdata = config; /* copy input params */ - ccpu.external_input = config->external_input ? config->external_input : read_jmi; - ccpu.vector_callback = config->vector_callback; + ccpu.external_input = configdata->external_input ? configdata->external_input : read_jmi; + ccpu.vector_callback = configdata->vector_callback; state_save_register_item("ccpu", clock, ccpu.PC); state_save_register_item("ccpu", clock, ccpu.A); @@ -164,7 +164,7 @@ static void ccpu_init(int index, int clock, const void *_config, int (*irqcallba } -static void ccpu_reset(void) +static CPU_RESET( ccpu ) { /* zero registers */ ccpu.PC = 0; @@ -196,7 +196,7 @@ static void ccpu_reset(void) CORE EXECUTION LOOP ***************************************************************************/ -static int ccpu_execute(int cycles) +static CPU_EXECUTE( ccpu ) { if (ccpu.waiting) return cycles; @@ -782,10 +782,10 @@ void ccpu_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = ccpu_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ccpu_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ccpu_set_context; break; - case CPUINFO_PTR_INIT: info->init = ccpu_init; break; - case CPUINFO_PTR_RESET: info->reset = ccpu_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ccpu); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ccpu); break; case CPUINFO_PTR_EXIT: info->exit = NULL; break; - case CPUINFO_PTR_EXECUTE: info->execute = ccpu_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ccpu); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ccpu_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ccpu_icount; break; diff --git a/src/emu/cpu/cdp1802/cdp1802.c b/src/emu/cpu/cdp1802/cdp1802.c index c6f94bf1285..dff9ac4ce21 100644 --- a/src/emu/cpu/cdp1802/cdp1802.c +++ b/src/emu/cpu/cdp1802/cdp1802.c @@ -65,7 +65,7 @@ static void cdp1802_set_context (void *src) cdp1802 = *(CDP1802_Regs *)src; } -static void cdp1802_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cdp1802 ) { cdp1802.intf = (cdp1802_interface *) config; @@ -829,7 +829,7 @@ static void cdp1802_run(running_machine *machine) } } -static int cdp1802_execute(int cycles) +static CPU_EXECUTE( cdp1802 ) { running_machine *machine = Machine; @@ -905,7 +905,7 @@ static void cdp1802_set_dmaout_line(int state) cdp1802.dmaout = state; } -static void cdp1802_reset(void) +static CPU_RESET( cdp1802 ) { cdp1802.mode = CDP1802_MODE_RESET; } @@ -1022,9 +1022,9 @@ void cdp1802_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cdp1802_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cdp1802_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cdp1802_set_context; break; - case CPUINFO_PTR_INIT: info->init = cdp1802_init; break; - case CPUINFO_PTR_RESET: info->reset = cdp1802_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = cdp1802_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cdp1802); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cdp1802); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cdp1802); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cdp1802_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cdp1802_ICount; break; diff --git a/src/emu/cpu/cop400/cop410.c b/src/emu/cpu/cop400/cop410.c index 34cf8deb6f1..fb3928e51f1 100644 --- a/src/emu/cpu/cop400/cop410.c +++ b/src/emu/cpu/cop400/cop410.c @@ -216,7 +216,7 @@ ADDRESS_MAP_END /**************************************************************************** * Initialize emulation ****************************************************************************/ -static void cop410_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop410 ) { int i; @@ -277,9 +277,9 @@ static void cop410_init(int index, int clock, const void *config, int (*irqcallb state_save_register_item("cop410", index, R.halt); } -static void cop411_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop411 ) { - cop410_init(index, clock, config, irqcallback); + CPU_INIT_CALL(cop410); /* the COP411 is like the COP410, just with less output ports */ R.G_mask = 0x07; @@ -289,7 +289,7 @@ static void cop411_init(int index, int clock, const void *config, int (*irqcallb /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void cop410_reset(void) +static CPU_RESET( cop410 ) { PC = 0; A = 0; @@ -305,7 +305,7 @@ static void cop410_reset(void) /**************************************************************************** * Execute cycles CPU cycles. Return number of cycles really executed ****************************************************************************/ -static int cop410_execute(int cycles) +static CPU_EXECUTE( cop410 ) { UINT8 opcode; @@ -484,9 +484,9 @@ void cop410_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cop410_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cop410_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cop410_set_context; break; - case CPUINFO_PTR_INIT: info->init = cop410_init; break; - case CPUINFO_PTR_RESET: info->reset = cop410_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = cop410_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop410); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cop410); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cop410); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cop410_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop410_ICount; break; @@ -529,7 +529,7 @@ void cop411_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = cop411_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop411); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "COP411"); break; diff --git a/src/emu/cpu/cop400/cop420.c b/src/emu/cpu/cop400/cop420.c index a618db11ed0..bbad6c68bf8 100644 --- a/src/emu/cpu/cop400/cop420.c +++ b/src/emu/cpu/cop400/cop420.c @@ -304,7 +304,7 @@ static TIMER_CALLBACK(cop420_microbus_tick) /**************************************************************************** * Initialize emulation ****************************************************************************/ -static void cop420_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop420 ) { int i; @@ -395,9 +395,9 @@ static void cop420_init(int index, int clock, const void *config, int (*irqcallb state_save_register_item("cop420", index, R.halt); } -static void cop421_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop421 ) { - cop420_init(index, clock, config, irqcallback); + CPU_INIT_CALL(cop420); /* microbus option is not available */ @@ -408,9 +408,9 @@ static void cop421_init(int index, int clock, const void *config, int (*irqcallb R.IN_mask = 0; // IN lines not available } -static void cop422_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop422 ) { - cop420_init(index, clock, config, irqcallback); + CPU_INIT_CALL(cop420); /* microbus option is not available */ @@ -426,7 +426,7 @@ static void cop422_init(int index, int clock, const void *config, int (*irqcallb /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void cop420_reset(void) +static CPU_RESET( cop420 ) { PC = 0; A = 0; @@ -443,7 +443,7 @@ static void cop420_reset(void) /**************************************************************************** * Execute cycles CPU cycles. Return number of cycles really executed ****************************************************************************/ -static int cop420_execute(int cycles) +static CPU_EXECUTE( cop420 ) { UINT8 opcode; @@ -639,9 +639,9 @@ void cop420_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cop420_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cop420_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cop420_set_context; break; - case CPUINFO_PTR_INIT: info->init = cop420_init; break; - case CPUINFO_PTR_RESET: info->reset = cop420_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = cop420_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop420); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cop420); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cop420); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cop420_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop420_ICount; break; @@ -684,7 +684,7 @@ void cop421_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = cop421_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop421); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "COP421"); break; @@ -701,7 +701,7 @@ void cop422_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = cop422_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop422); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "COP422"); break; @@ -731,17 +731,17 @@ void cop402_get_info(UINT32 state, cpuinfo *info) /* COP44x */ -static void cop426_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop426 ) { - cop420_init(index, clock, config, irqcallback); + CPU_INIT_CALL(cop420); R.G_mask = 0x0e; // only G2, G3 available R.D_mask = 0x0e; // only D2, D3 available } -static void cop445_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cop445 ) { - cop420_init(index, clock, config, irqcallback); + CPU_INIT_CALL(cop420); R.G_mask = 0x07; R.D_mask = 0x03; @@ -788,7 +788,7 @@ void cop445_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = cop445_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop445); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "COP445"); break; @@ -839,7 +839,7 @@ void cop426_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = cop426_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop426); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "COP426"); break; diff --git a/src/emu/cpu/cp1610/cp1610.c b/src/emu/cpu/cp1610/cp1610.c index 442f63c97e7..2e9ee62c125 100644 --- a/src/emu/cpu/cp1610/cp1610.c +++ b/src/emu/cpu/cp1610/cp1610.c @@ -36,7 +36,8 @@ typedef struct { UINT8 flags; /* flags */ int intr_enabled; //int (*reset_callback)(void); - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT16 intr_vector; int reset_state; int intr_state; @@ -1547,7 +1548,7 @@ static void cp1610_xori(int d) cp1610_icount -= 8; } -static void cp1610_reset(void) +static CPU_RESET( cp1610 ) { /* This is how we set the reset vector */ cpunum_set_input_line(Machine, cpu_getactivecpu(), CP1610_RESET, PULSE_LINE); @@ -2159,7 +2160,7 @@ static void cp1610_do_jumps(void) } /* Execute cycles - returns number of cycles actually run */ -static int cp1610_execute(int cycles) +static CPU_EXECUTE( cp1610 ) { UINT16 opcode; @@ -3349,7 +3350,7 @@ static int cp1610_execute(int cycles) cp1610.r[6]++; cp1610_icount -= 9; cp1610.intr_pending = 0; - cp1610.r[7] = cp1610.irq_callback(CP1610_INT_INTR); + cp1610.r[7] = cp1610.irq_callback(cp1610.device, CP1610_INT_INTR); } if ((cp1610.intrm_pending == 1) && (cp1610.intr_enabled)) { @@ -3358,12 +3359,12 @@ static int cp1610_execute(int cycles) cp1610.r[6]++; cp1610_icount -= 9; cp1610.intrm_pending = 0; - cp1610.r[7] = cp1610.irq_callback(CP1610_INT_INTRM); + cp1610.r[7] = cp1610.irq_callback(cp1610.device, CP1610_INT_INTRM); } if (cp1610.reset_pending == 1) { cp1610.reset_pending = 0; - cp1610.r[7] = cp1610.irq_callback(CP1610_RESET); + cp1610.r[7] = cp1610.irq_callback(cp1610.device, CP1610_RESET); } } @@ -3384,13 +3385,14 @@ static void cp1610_set_context (void *src) cp1610 = *(cp1610_Regs *) src; } -static void cp1610_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cp1610 ) { cp1610.intr_enabled = 0; cp1610.reset_pending = 0; cp1610.intr_pending = 0; cp1610.intrm_pending = 0; cp1610.irq_callback = irqcallback; + cp1610.device = device; } static void cp1610_set_irq_line(UINT32 irqline, int state) @@ -3487,9 +3489,9 @@ void cp1610_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cp1610_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cp1610_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cp1610_set_context; break; - case CPUINFO_PTR_INIT: info->init = cp1610_init; break; - case CPUINFO_PTR_RESET: info->reset = cp1610_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = cp1610_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cp1610); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cp1610); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cp1610); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cp1610_dasm; break; diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.c b/src/emu/cpu/cubeqcpu/cubeqcpu.c index dc05f34d476..cb187fa38ca 100644 --- a/src/emu/cpu/cubeqcpu/cubeqcpu.c +++ b/src/emu/cpu/cubeqcpu/cubeqcpu.c @@ -335,7 +335,7 @@ static void cquestsnd_state_register(int index, const char *type) state_save_register_postload(Machine, cquestsnd_postload, NULL); } -static void cquestsnd_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( cquestsnd ) { cubeqst_snd_config* _config = (cubeqst_snd_config*)config; @@ -351,13 +351,13 @@ static void cquestsnd_init(int index, int clock, const void *config, int (*irqca } -static void cquestsnd_reset(void) +static CPU_RESET( cquestsnd ) { cquestsnd.pc = 0; } -static void cquestsnd_exit(void) +static CPU_EXIT( cquestsnd ) { free(cquestsnd.sram); } @@ -403,7 +403,7 @@ static void cquestrot_state_register(int index, const char *type) state_save_register_postload(Machine, cquestrot_postload, NULL); } -static void cquestrot_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( cquestrot ) { memset(&cquestrot, 0, sizeof(cquestrot)); @@ -415,7 +415,7 @@ static void cquestrot_init(int index, int clock, const void *_config, int (*irqc } -static void cquestrot_reset(void) +static CPU_RESET( cquestrot ) { cquestrot.pc = 0; cquestrot.wc = 0; @@ -424,7 +424,7 @@ static void cquestrot_reset(void) } -static void cquestrot_exit(void) +static CPU_EXIT( cquestrot ) { free(cquestrot.dram); free(cquestrot.sram); @@ -479,7 +479,7 @@ static void cquestlin_state_register(int index, const char *type) state_save_register_postload(Machine, cquestlin_postload, NULL); } -static void cquestlin_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( cquestlin ) { memset(&cquestlin, 0, sizeof(cquestlin)); @@ -493,7 +493,7 @@ static void cquestlin_init(int index, int clock, const void *_config, int (*irqc } -static void cquestlin_reset(void) +static CPU_RESET( cquestlin ) { cquestlin.clkcnt = 0; cquestlin.pc[FOREGROUND] = 0; @@ -501,7 +501,7 @@ static void cquestlin_reset(void) } -static void cquestlin_exit(void) +static CPU_EXIT( cquestlin ) { free(cquestlin.sram); free(cquestlin.e_stack); @@ -539,7 +539,7 @@ static int do_sndjmp(int jmp) return 0; } -static int cquestsnd_execute(int cycles) +static CPU_EXECUTE( cquestsnd ) { int calldebugger = ((Machine->debug_flags & DEBUG_FLAG_ENABLED) != 0); @@ -873,7 +873,7 @@ INLINE int do_rotjmp(int jmp) #define ROT_SRAM_ADDRESS ((cquestrot.dsrclatch & 2) ? cquestrot.yrlatch : (cquestrot.rsrclatch | 0x700)) -static int cquestrot_execute(int cycles) +static CPU_EXECUTE( cquestrot ) { int calldebugger = ((Machine->debug_flags & DEBUG_FLAG_ENABLED) != 0); @@ -1377,7 +1377,7 @@ UINT32* get_stack_ram(void) } -static int cquestlin_execute(int cycles) +static CPU_EXECUTE( cquestlin ) { #define LINE_PC ((cquestlin.pc[prog] & 0x7f) | ((prog == BACKGROUND) ? 0x80 : 0)) @@ -1911,10 +1911,10 @@ void cquestsnd_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cquestsnd_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cquestsnd_get_context;break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cquestsnd_set_context;break; - case CPUINFO_PTR_INIT: info->init = cquestsnd_init; break; - case CPUINFO_PTR_RESET: info->reset = cquestsnd_reset; break; - case CPUINFO_PTR_EXIT: info->exit = cquestsnd_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = cquestsnd_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cquestsnd); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cquestsnd); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(cquestsnd); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestsnd); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cquestsnd_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cquestsnd_icount; break; @@ -2027,10 +2027,10 @@ void cquestrot_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cquestrot_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cquestrot_get_context;break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cquestrot_set_context;break; - case CPUINFO_PTR_INIT: info->init = cquestrot_init; break; - case CPUINFO_PTR_RESET: info->reset = cquestrot_reset; break; - case CPUINFO_PTR_EXIT: info->exit = cquestrot_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = cquestrot_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cquestrot); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cquestrot); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(cquestrot); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestrot); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cquestrot_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cquestrot_icount; break; @@ -2145,10 +2145,10 @@ void cquestlin_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = cquestlin_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cquestlin_get_context;break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cquestlin_set_context;break; - case CPUINFO_PTR_INIT: info->init = cquestlin_init; break; - case CPUINFO_PTR_RESET: info->reset = cquestlin_reset; break; - case CPUINFO_PTR_EXIT: info->exit = cquestlin_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = cquestlin_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cquestlin); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cquestlin); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(cquestlin); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestlin); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cquestlin_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cquestlin_icount; break; diff --git a/src/emu/cpu/ds5002fp/ds5002fp.c b/src/emu/cpu/ds5002fp/ds5002fp.c index 0bc37003517..b43c3f59c99 100644 --- a/src/emu/cpu/ds5002fp/ds5002fp.c +++ b/src/emu/cpu/ds5002fp/ds5002fp.c @@ -196,7 +196,8 @@ typedef struct _DS5002FP { UINT8 IntRam[0xff+1]; //Max 256 Bytes of Internal RAM (8031/51 have 128, 8032/52 have 256) //Interrupt Callback - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; //Serial Port TX/RX Call backs void (*serial_tx_callback)(int data); //Call back funciton when sending data out of serial port @@ -534,11 +535,12 @@ static const UINT32 ds5002fp_partitions[16] = { /* Include Opcode functions */ #include "ds5002fpops.c" -void ds5002fp_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ds5002fp ) { - const ds5002fp_config *config = _config ? _config : &default_config; + const ds5002fp_config *configdata = config ? config : &default_config; - ds5002fp.config = config; + ds5002fp.config = configdata; + ds5002fp.device = device; ds5002fp_set_irq_callback(irqcallback); //Internal stuff @@ -591,16 +593,19 @@ void ds5002fp_init(int index, int clock, const void *_config, int (*irqcallback) } /* Reset registers to the initial values */ -void ds5002fp_reset(void) +CPU_RESET( ds5002fp ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; const ds5002fp_config *save_config; + const device_config *save_device; save_irqcallback = ds5002fp.irq_callback; save_config = ds5002fp.config; + save_device = ds5002fp.device; memset(&ds5002fp, 0, sizeof(DS5002FP)); ds5002fp.irq_callback = save_irqcallback; ds5002fp.config = save_config; + ds5002fp.device = save_device; memset(&uart, 0, sizeof(DS5002FP_UART)); ds5002fp.subtype = 8051; @@ -666,13 +671,13 @@ void ds5002fp_reset(void) } /* Shut down CPU core */ -void ds5002fp_exit(void) +CPU_EXIT( ds5002fp ) { /* nothing to do */ } /* Execute cycles - returns number of cycles actually run */ -int ds5002fp_execute(int cycles) +CPU_EXECUTE( ds5002fp ) { //In stop mode, no op takes place if (R_PCON & 0x02) { @@ -1722,9 +1727,9 @@ INLINE UINT8 check_interrupts(void) } -void ds5002fp_set_irq_callback(int (*callback)(int irqline)) +void ds5002fp_set_irq_callback(cpu_irq_callback irq_callback) { - ds5002fp.irq_callback = callback; + ds5002fp.irq_callback = irq_callback; } void ds5002fp_set_serial_tx_callback(void (*callback)(int data)) @@ -2535,10 +2540,10 @@ void ds5002fp_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = ds5002fp_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ds5002fp_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ds5002fp_set_context; break; - case CPUINFO_PTR_INIT: info->init = ds5002fp_init; break; - case CPUINFO_PTR_RESET: info->reset = ds5002fp_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ds5002fp_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ds5002fp_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ds5002fp); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ds5002fp); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ds5002fp); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ds5002fp); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ds5002fp_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ds5002fp_icount; break; diff --git a/src/emu/cpu/ds5002fp/ds5002fp.h b/src/emu/cpu/ds5002fp/ds5002fp.h index 975f571d8c8..9cb3ca2dab6 100644 --- a/src/emu/cpu/ds5002fp/ds5002fp.h +++ b/src/emu/cpu/ds5002fp/ds5002fp.h @@ -114,17 +114,17 @@ struct _ds5002fp_config UINT8 crc; /* bootstrap loader CRC register */ }; -extern void ds5002fp_init (int index, int clock, const void *config, int (*irqcallback)(int)); /* Initialize save states */ -extern void ds5002fp_reset (void); /* Reset registers to the initial values */ -extern void ds5002fp_exit (void); /* Shut down CPU core */ -extern int ds5002fp_execute(int cycles); /* Execute cycles - returns number of cycles actually run */ +extern CPU_INIT( ds5002fp ); /* Initialize save states */ +extern CPU_RESET( ds5002fp ); /* Reset registers to the initial values */ +extern CPU_EXIT( ds5002fp ); /* Shut down CPU core */ +extern CPU_EXECUTE( ds5002fp ); /* Execute cycles - returns number of cycles actually run */ extern void ds5002fp_get_context (void *dst); /* Get registers, return context size */ extern void ds5002fp_set_context (void *src); /* Set registers */ extern unsigned ds5002fp_get_intram (int offset); extern unsigned ds5002fp_get_reg (int regnum); extern void ds5002fp_set_reg (int regnum, unsigned val); extern void ds5002fp_set_irq_line(int irqline, int state); -extern void ds5002fp_set_irq_callback(int (*callback)(int irqline)); +extern void ds5002fp_set_irq_callback(cpu_irq_callback callback); extern void ds5002fp_state_save(void *file); extern void ds5002fp_state_load(void *file); diff --git a/src/emu/cpu/dsp32/dsp32.c b/src/emu/cpu/dsp32/dsp32.c index e26815276a3..585aff5425f 100644 --- a/src/emu/cpu/dsp32/dsp32.c +++ b/src/emu/cpu/dsp32/dsp32.c @@ -185,6 +185,7 @@ typedef struct UINT32 op; int interrupt_cycles; void (*output_pins_changed)(UINT32 pins); + const device_config *device; } dsp32_regs; @@ -193,7 +194,7 @@ typedef struct FUNCTION PROTOTYPES ***************************************************************************/ -static void dsp32c_reset(void); +static CPU_RESET( dsp32c ); @@ -301,7 +302,7 @@ static void update_pcr(UINT16 newval) /* reset the chip if we get a reset */ if ((oldval & PCR_RESET) == 0 && (newval & PCR_RESET) != 0) - dsp32c_reset(); + CPU_RESET_NAME(dsp32c)(dsp32.device); /* track the state of the output pins */ if (dsp32.output_pins_changed) @@ -346,17 +347,19 @@ static void dsp32c_set_context(void *src) INITIALIZATION AND SHUTDOWN ***************************************************************************/ -static void dsp32c_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( dsp32c ) { - const dsp32_config *config = _config; + const dsp32_config *configdata = config; /* copy in config data */ - if (config) - dsp32.output_pins_changed = config->output_pins_changed; + if (configdata) + dsp32.output_pins_changed = configdata->output_pins_changed; + + dsp32.device = device; } -static void dsp32c_reset(void) +static CPU_RESET( dsp32c ) { /* reset goes to 0 */ dsp32.PC = 0; @@ -381,7 +384,7 @@ static void dsp32c_reset(void) } -static void dsp32c_exit(void) +static CPU_EXIT( dsp32c ) { } @@ -399,7 +402,7 @@ static void dsp32c_exit(void) CORE EXECUTION LOOP ***************************************************************************/ -static int dsp32c_execute(int cycles) +static CPU_EXECUTE( dsp32c ) { /* skip if halted */ if ((dsp32.pcr & PCR_RESET) == 0) @@ -870,10 +873,10 @@ void dsp32c_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = dsp32c_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = dsp32c_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = dsp32c_set_context; break; - case CPUINFO_PTR_INIT: info->init = dsp32c_init; break; - case CPUINFO_PTR_RESET: info->reset = dsp32c_reset; break; - case CPUINFO_PTR_EXIT: info->exit = dsp32c_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = dsp32c_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(dsp32c); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(dsp32c); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(dsp32c); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(dsp32c); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = dsp32c_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &dsp32_icount; break; diff --git a/src/emu/cpu/dsp56k/dsp56def.h b/src/emu/cpu/dsp56k/dsp56def.h index 6ec50d6fc63..3cb6ac5bf77 100644 --- a/src/emu/cpu/dsp56k/dsp56def.h +++ b/src/emu/cpu/dsp56k/dsp56def.h @@ -46,7 +46,7 @@ /*************************************************************************** PCU ***************************************************************************/ -static void pcu_reset(void); +static CPU_RESET( pcu ); #define PC (core.PCU.pc) #define LA (core.PCU.la) #define LC (core.PCU.lc) diff --git a/src/emu/cpu/dsp56k/dsp56k.c b/src/emu/cpu/dsp56k/dsp56k.c index 0ed44f98a7e..8c3bf2255e9 100644 --- a/src/emu/cpu/dsp56k/dsp56k.c +++ b/src/emu/cpu/dsp56k/dsp56k.c @@ -38,9 +38,9 @@ /*************************************************************************** LOCAL DECLARATIONS ***************************************************************************/ -static void dsp56k_init(int index, int clock, const void *_config, int (*irqcallback)(int)); -static void dsp56k_reset(void); -static void dsp56k_exit(void); +static CPU_INIT( dsp56k ); +static CPU_RESET( dsp56k ); +static CPU_EXIT( dsp56k ); /*************************************************************************** MACROS @@ -208,6 +208,7 @@ typedef struct UINT32 op; int interrupt_cycles; void (*output_pins_changed)(UINT32 pins); + const device_config *device; } dsp56k_core; @@ -333,7 +334,7 @@ static void set_irq_line(int irqline, int state) { /* If it changes state from asserted to cleared. Call the reset function. */ if (core.reset_state == TRUE) - dsp56k_reset(); + cpu_reset_dsp56k(core.device); core.reset_state = FALSE; } @@ -377,7 +378,7 @@ static void dsp56k_set_context(void *src) /*************************************************************************** INITIALIZATION AND SHUTDOWN ***************************************************************************/ -static void dsp56k_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( dsp56k ) { // Call specific module inits pcu_init(index); @@ -399,6 +400,7 @@ static void dsp56k_init(int index, int clock, const void *_config, int (*irqcall //core.config = _config; //core.irq_callback = irqcallback; + core.device = device; } static void agu_reset(void) @@ -431,7 +433,7 @@ static void alu_reset(void) } -static void dsp56k_reset(void) +static CPU_RESET( dsp56k ) { logerror("Dsp56k reset\n"); @@ -451,7 +453,7 @@ static void dsp56k_reset(void) } -static void dsp56k_exit(void) +static CPU_EXIT( dsp56k ) { } @@ -468,7 +470,7 @@ static void dsp56k_exit(void) CORE EXECUTION LOOP ***************************************************************************/ -static int dsp56k_execute(int cycles) +static CPU_EXECUTE( dsp56k ) { /* If reset line is asserted, do nothing */ if (core.reset_state) @@ -675,10 +677,10 @@ void dsp56k_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = dsp56k_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = dsp56k_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = dsp56k_set_context; break; - case CPUINFO_PTR_INIT: info->init = dsp56k_init; break; - case CPUINFO_PTR_RESET: info->reset = dsp56k_reset; break; - case CPUINFO_PTR_EXIT: info->exit = dsp56k_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = dsp56k_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(dsp56k); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(dsp56k); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(dsp56k); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(dsp56k); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = dsp56k_dasm; break; case CPUINFO_PTR_DEBUG_SETUP_COMMANDS: info->setup_commands = NULL; break; diff --git a/src/emu/cpu/e132xs/e132xs.c b/src/emu/cpu/e132xs/e132xs.c index 6fd4d5b9918..2e284b88ef4 100644 --- a/src/emu/cpu/e132xs/e132xs.c +++ b/src/emu/cpu/e132xs/e132xs.c @@ -331,7 +331,8 @@ typedef struct struct _delay delay; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; INT32 instruction_length; INT32 intblock; @@ -1471,7 +1472,7 @@ static void check_interrupts(void) if (IO3_LINE_STATE && (FCR & 0x00000500) == 0x00000400) { execute_int(get_trap_addr(TRAPNO_IO3)); - (*hyperstone.irq_callback)(IRQ_IO3); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_IO3); return; } @@ -1487,7 +1488,7 @@ static void check_interrupts(void) if (INT1_LINE_STATE && (FCR & 0x10000000) == 0x00000000) { execute_int(get_trap_addr(TRAPNO_INT1)); - (*hyperstone.irq_callback)(IRQ_INT1); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_INT1); return; } @@ -1503,7 +1504,7 @@ static void check_interrupts(void) if (INT2_LINE_STATE && (FCR & 0x20000000) == 0x00000000) { execute_int(get_trap_addr(TRAPNO_INT2)); - (*hyperstone.irq_callback)(IRQ_INT2); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_INT2); return; } @@ -1519,7 +1520,7 @@ static void check_interrupts(void) if (INT3_LINE_STATE && (FCR & 0x40000000) == 0x00000000) { execute_int(get_trap_addr(TRAPNO_INT3)); - (*hyperstone.irq_callback)(IRQ_INT3); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_INT3); return; } @@ -1535,7 +1536,7 @@ static void check_interrupts(void) if (INT4_LINE_STATE && (FCR & 0x80000000) == 0x00000000) { execute_int(get_trap_addr(TRAPNO_INT4)); - (*hyperstone.irq_callback)(IRQ_INT4); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_INT4); return; } @@ -1543,7 +1544,7 @@ static void check_interrupts(void) if (IO1_LINE_STATE && (FCR & 0x00000005) == 0x00000004) { execute_int(get_trap_addr(TRAPNO_IO1)); - (*hyperstone.irq_callback)(IRQ_IO1); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_IO1); return; } @@ -1551,7 +1552,7 @@ static void check_interrupts(void) if (IO2_LINE_STATE && (FCR & 0x00000050) == 0x00000040) { execute_int(get_trap_addr(TRAPNO_IO2)); - (*hyperstone.irq_callback)(IRQ_IO2); + (*hyperstone.irq_callback)(hyperstone.device, IRQ_IO2); return; } } @@ -1564,7 +1565,7 @@ static void set_irq_line(int irqline, int state) ISR &= ~(1 << irqline); } -static void hyperstone_init(int index, int clock, const void *config, int (*irqcallback)(int), int scale_mask) +static void hyperstone_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int scale_mask) { state_save_register_item_array("E132XS", index, hyperstone.global_regs); state_save_register_item_array("E132XS", index, hyperstone.local_regs); @@ -1577,12 +1578,13 @@ static void hyperstone_init(int index, int clock, const void *config, int (*irqc state_save_register_item("E132XS", index, hyperstone.tr_clocks_per_tick); hyperstone.irq_callback = irqcallback; + hyperstone.device = device; hyperstone.timer = timer_alloc(e132xs_timer_callback, NULL); hyperstone.clock_scale_mask = scale_mask; } #if (HAS_E116T || HAS_E116XT || HAS_E116XS || HAS_E116XSR || HAS_GMS30C2116 || HAS_GMS30C2216) -static void e116_init(int index, int clock, const void *config, int (*irqcallback)(int), int scale_mask) +static void e116_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int scale_mask) { hyp_cpu_read_byte = program_read_byte_16be; hyp_cpu_read_half_word = program_read_word_16be; @@ -1596,54 +1598,54 @@ static void e116_init(int index, int clock, const void *config, int (*irqcallbac hyp_type_16bit = 1; - hyperstone_init(index, clock, config, irqcallback, scale_mask); + hyperstone_init(device, index, clock, config, irqcallback, scale_mask); } #endif #if (HAS_E116T) -static void e116t_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e116t ) { - e116_init(index, clock, config, irqcallback, 0); + e116_init(device, index, clock, config, irqcallback, 0); } #endif #if (HAS_E116XT) -static void e116xt_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e116xt ) { - e116_init(index, clock, config, irqcallback, 3); + e116_init(device, index, clock, config, irqcallback, 3); } #endif #if (HAS_E116XS) -static void e116xs_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e116xs ) { - e116_init(index, clock, config, irqcallback, 7); + e116_init(device, index, clock, config, irqcallback, 7); } #endif #if (HAS_E116XSR) -static void e116xsr_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e116xsr ) { - e116_init(index, clock, config, irqcallback, 7); + e116_init(device, index, clock, config, irqcallback, 7); } #endif #if (HAS_GMS30C2116) -static void gms30c2116_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( gms30c2116 ) { - e116_init(index, clock, config, irqcallback, 0); + e116_init(device, index, clock, config, irqcallback, 0); } #endif #if (HAS_GMS30C2216) -static void gms30c2216_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( gms30c2216 ) { - e116_init(index, clock, config, irqcallback, 0); + e116_init(device, index, clock, config, irqcallback, 0); } #endif #if (HAS_E132N || HAS_E132T || HAS_E132XN || HAS_E132XT || HAS_E132XS || HAS_E132XSR || HAS_GMS30C2132 || HAS_GMS30C2232) -static void e132_init(int index, int clock, const void *config, int (*irqcallback)(int), int scale_mask) +static void e132_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int scale_mask) { hyp_cpu_read_byte = program_read_byte_32be; hyp_cpu_read_half_word = program_read_word_32be; @@ -1657,77 +1659,80 @@ static void e132_init(int index, int clock, const void *config, int (*irqcallbac hyp_type_16bit = 0; - hyperstone_init(index, clock, config, irqcallback, scale_mask); + hyperstone_init(device, index, clock, config, irqcallback, scale_mask); } #endif #if (HAS_E132N) -static void e132n_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e132n ) { - e132_init(index, clock, config, irqcallback, 0); + e132_init(device, index, clock, config, irqcallback, 0); } #endif #if (HAS_E132T) -static void e132t_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e132t ) { - e132_init(index, clock, config, irqcallback, 0); + e132_init(device, index, clock, config, irqcallback, 0); } #endif #if (HAS_E132XN) -static void e132xn_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e132xn ) { - e132_init(index, clock, config, irqcallback, 3); + e132_init(device, index, clock, config, irqcallback, 3); } #endif #if (HAS_E132XT) -static void e132xt_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e132xt ) { - e132_init(index, clock, config, irqcallback, 3); + e132_init(device, index, clock, config, irqcallback, 3); } #endif #if (HAS_E132XS) -static void e132xs_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e132xs ) { - e132_init(index, clock, config, irqcallback, 7); + e132_init(device, index, clock, config, irqcallback, 7); } #endif #if (HAS_E132XSR) -static void e132xsr_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( e132xsr ) { - e132_init(index, clock, config, irqcallback, 7); + e132_init(device, index, clock, config, irqcallback, 7); } #endif #if (HAS_GMS30C2132) -static void gms30c2132_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( gms30c2132 ) { - e132_init(index, clock, config, irqcallback, 0); + e132_init(device, index, clock, config, irqcallback, 0); } #endif #if (HAS_GMS30C2232) -static void gms30c2232_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( gms30c2232 ) { - e132_init(index, clock, config, irqcallback, 0); + e132_init(device, index, clock, config, irqcallback, 0); } #endif -static void hyperstone_reset(void) +static CPU_RESET( hyperstone ) { //TODO: Add different reset initializations for BCR, MCR, FCR, TPR emu_timer *save_timer; - int (*save_irqcallback)(int); + const device_config *save_device; + cpu_irq_callback save_irqcallback; save_timer = hyperstone.timer; save_irqcallback = hyperstone.irq_callback; + save_device = hyperstone.device; memset(&hyperstone, 0, sizeof(hyperstone_regs)); hyperstone.irq_callback = save_irqcallback; + hyperstone.device = save_device; hyperstone.timer = save_timer; hyperstone.tr_clocks_per_tick = 2; @@ -1756,7 +1761,7 @@ static void hyperstone_reset(void) hyperstone_ICount -= hyperstone.clock_cycles_2; } -static void hyperstone_exit(void) +static CPU_EXIT( hyperstone ) { // nothing to do } @@ -4747,7 +4752,7 @@ INLINE void hyperstone_trap(struct regs_decode *decode) #include "e132xsop.c" -static int hyperstone_execute(int cycles) +static CPU_EXECUTE( hyperstone ) { hyperstone_ICount = cycles; @@ -5079,9 +5084,9 @@ static void hyperstone_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_GET_CONTEXT: info->getcontext = hyperstone_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = hyperstone_set_context; break; case CPUINFO_PTR_INIT: info->init = NULL; break; - case CPUINFO_PTR_RESET: info->reset = hyperstone_reset; break; - case CPUINFO_PTR_EXIT: info->exit = hyperstone_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = hyperstone_execute; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hyperstone); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(hyperstone); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hyperstone); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hyperstone_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &hyperstone_ICount; break; @@ -5244,7 +5249,7 @@ void e116t_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_e116_4k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e116t_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e116t); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-16T"); break; @@ -5267,7 +5272,7 @@ void e116xt_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_e116_8k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e116xt_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e116xt); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-16XT"); break; @@ -5290,7 +5295,7 @@ void e116xs_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_e116_16k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e116xs_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e116xs); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-16XS"); break; @@ -5313,7 +5318,7 @@ void e116xsr_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_e116_16k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e116xsr_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e116xsr); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-16XSR"); break; @@ -5336,7 +5341,7 @@ void e132n_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_4k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e132n_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e132n); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-32N"); break; @@ -5359,7 +5364,7 @@ void e132t_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_4k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e132t_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e132t); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-32T"); break; @@ -5382,7 +5387,7 @@ void e132xn_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_8k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e132xn_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e132xn); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XN"); break; @@ -5405,7 +5410,7 @@ void e132xt_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_8k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e132xt_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e132xt); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XT"); break; @@ -5428,7 +5433,7 @@ void e132xs_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_16k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e132xs_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e132xs); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XS"); break; @@ -5451,7 +5456,7 @@ void e132xsr_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_16k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = e132xsr_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(e132xsr); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XSR"); break; @@ -5474,7 +5479,7 @@ void gms30c2116_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_e116_4k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = gms30c2116_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(gms30c2116); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2116"); break; @@ -5497,7 +5502,7 @@ void gms30c2132_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_4k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = gms30c2132_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(gms30c2132); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2132"); break; @@ -5520,7 +5525,7 @@ void gms30c2216_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_e116_8k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = gms30c2216_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(gms30c2216); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2216"); break; @@ -5543,7 +5548,7 @@ void gms30c2232_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_e132_8k_iram_map; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = gms30c2232_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(gms30c2232); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2232"); break; diff --git a/src/emu/cpu/f8/f3853.c b/src/emu/cpu/f8/f3853.c index 959eb1013f9..d59cfc68332 100644 --- a/src/emu/cpu/f8/f3853.c +++ b/src/emu/cpu/f8/f3853.c @@ -93,7 +93,7 @@ void f3853_init(const f3853_config *config) f3853.timer = timer_alloc(f3853_timer_callback, NULL); } -void f3853_reset(void) +CPU_RESET( f3853 ) { // registers indeterminate } diff --git a/src/emu/cpu/f8/f3853.h b/src/emu/cpu/f8/f3853.h index 2b756769008..37f80543176 100644 --- a/src/emu/cpu/f8/f3853.h +++ b/src/emu/cpu/f8/f3853.h @@ -21,7 +21,7 @@ struct _f3853_config }; void f3853_init(const f3853_config *config); -void f3853_reset(void); +CPU_RESET( f3853 ); // ports 0x0c - 0x0f READ8_HANDLER(f3853_r); diff --git a/src/emu/cpu/f8/f8.c b/src/emu/cpu/f8/f8.c index f2a0c858fe3..e369128154d 100644 --- a/src/emu/cpu/f8/f8.c +++ b/src/emu/cpu/f8/f8.c @@ -50,7 +50,8 @@ typedef struct { UINT8 dbus; /* data bus value */ UINT16 io; /* last I/O address */ UINT16 irq_vector; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 r[64]; /* scratchpad RAM */ int irq_request; } f8_Regs; @@ -278,7 +279,7 @@ static void ROMC_0F(void) * must move the contents of the data bus into the low order * byte of PC0. */ - f8.irq_vector = (*f8.irq_callback)(0); + f8.irq_vector = (*f8.irq_callback)(f8.device, 0); f8.dbus = f8.irq_vector & 0x00ff; f8.pc1 = f8.pc0; f8.pc0 = (f8.pc0 & 0xff00) | f8.dbus; @@ -1530,15 +1531,18 @@ static void f8_ns_isar_d(void) f8.is = (f8.is & 0x38) | ((f8.is - 1) & 0x07); } -static void f8_reset(void) +static CPU_RESET( f8 ) { UINT8 data; int i; - int (*old_callback)(int); + cpu_irq_callback save_callback; + const device_config *save_device; - old_callback = f8.irq_callback; + save_callback = f8.irq_callback; + save_device = f8.device; memset(&f8, 0, sizeof(f8_Regs)); - f8.irq_callback = old_callback; + f8.irq_callback = save_callback; + f8.device = save_device; f8.w&=~I; /* save PC0 to PC1 and reset PC0 */ @@ -1569,7 +1573,7 @@ static void f8_reset(void) } /* Execute cycles - returns number of cycles actually run */ -static int f8_execute(int cycles) +static CPU_EXECUTE( f8 ) { f8_icount = cycles; @@ -1893,9 +1897,10 @@ static void f8_set_context (void *src) unsigned f8_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram); -static void f8_init (int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( f8 ) { f8.irq_callback = irqcallback; + f8.device = device; } static void f8_set_info(UINT32 state, cpuinfo *info) @@ -2109,9 +2114,9 @@ void f8_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = f8_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = f8_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = f8_set_context; break; - case CPUINFO_PTR_INIT: info->init = f8_init; break; - case CPUINFO_PTR_RESET: info->reset = f8_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = f8_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(f8); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(f8); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(f8); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = f8_dasm; break; diff --git a/src/emu/cpu/g65816/g65816.c b/src/emu/cpu/g65816/g65816.c index 651c8ceefa6..062ca43220b 100644 --- a/src/emu/cpu/g65816/g65816.c +++ b/src/emu/cpu/g65816/g65816.c @@ -182,7 +182,7 @@ int (*const g65816i_execute[5])(int cycles) = /* ======================================================================== */ -static void g65816_reset(void) +static CPU_RESET( g65816 ) { /* Start the CPU */ CPU_STOPPED = 0; @@ -225,13 +225,13 @@ static void g65816_reset(void) } /* Exit and clean up */ -static void g65816_exit(void) +static CPU_EXIT( g65816 ) { /* nothing to do yet */ } /* Execute some instructions */ -static int g65816_execute(int cycles) +static CPU_EXECUTE( g65816 ) { return FTABLE_EXECUTE(cycles); } @@ -303,7 +303,7 @@ static void g65816_set_irq_line(int line, int state) } /* Set the callback that is called when servicing an interrupt */ -static void g65816_set_irq_callback(int (*callback)(int)) +static void g65816_set_irq_callback(cpu_irq_callback callback) { INT_ACK = callback; } @@ -326,9 +326,10 @@ static STATE_POSTLOAD( g65816_restore_state ) g65816i_jumping(REGISTER_PB | REGISTER_PC); } -static void g65816_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( g65816 ) { g65816_set_irq_callback(irqcallback); + g65816i_cpu.device = device; state_save_register_item("G65816", index, g65816i_cpu.a); state_save_register_item("G65816", index, g65816i_cpu.b); @@ -456,10 +457,10 @@ void g65816_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = g65816_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = g65816_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = g65816_set_context; break; - case CPUINFO_PTR_INIT: info->init = g65816_init; break; - case CPUINFO_PTR_RESET: info->reset = g65816_reset; break; - case CPUINFO_PTR_EXIT: info->exit = g65816_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = g65816_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(g65816); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(g65816); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(g65816); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(g65816); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = g65816_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &g65816_ICount; break; diff --git a/src/emu/cpu/g65816/g65816cm.h b/src/emu/cpu/g65816/g65816cm.h index 3fbe8eb50d4..ee8441d21c2 100644 --- a/src/emu/cpu/g65816/g65816cm.h +++ b/src/emu/cpu/g65816/g65816cm.h @@ -88,7 +88,8 @@ struct _g65816i_cpu_struct uint line_nmi; /* Status of the NMI line */ uint ir; /* Instruction Register */ uint irq_delay; /* delay 1 instruction before checking irq */ - int (*int_ack)(int); /* Interrupt Acknowledge */ + cpu_irq_callback int_ack; /* Interrupt Acknowledge */ + const device_config *device; read8_machine_func read_vector; /* Read vector override */ uint stopped; /* Sets how the CPU is stopped */ void (*const *opcodes)(void); diff --git a/src/emu/cpu/g65816/g65816op.h b/src/emu/cpu/g65816/g65816op.h index cc5dd8778c8..859f9b251e1 100644 --- a/src/emu/cpu/g65816/g65816op.h +++ b/src/emu/cpu/g65816/g65816op.h @@ -384,7 +384,7 @@ INLINE void g65816i_interrupt_hardware(uint vector) g65816i_set_flag_i(IFLAG_SET); REGISTER_PB = 0; g65816i_jump_16(g65816i_read_16_vector(vector)); - if(INT_ACK) INT_ACK(0); + if(INT_ACK) INT_ACK(g65816i_cpu.device, 0); #else CLK(8); g65816i_push_8(REGISTER_PB>>16); @@ -394,7 +394,7 @@ INLINE void g65816i_interrupt_hardware(uint vector) g65816i_set_flag_i(IFLAG_SET); REGISTER_PB = 0; g65816i_jump_16(g65816i_read_16_vector(vector)); - if(INT_ACK) INT_ACK(0); + if(INT_ACK) INT_ACK(g65816i_cpu.device, 0); #endif } diff --git a/src/emu/cpu/h6280/h6280.c b/src/emu/cpu/h6280/h6280.c index 8335548aca8..77c757b3628 100644 --- a/src/emu/cpu/h6280/h6280.c +++ b/src/emu/cpu/h6280/h6280.c @@ -137,7 +137,8 @@ typedef struct UINT8 nmi_state; UINT8 irq_state[3]; UINT8 irq_pending; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; #if LAZY_FLAGS INT32 NZ; /* last value (lazy N and Z flag) */ @@ -156,7 +157,7 @@ static void set_irq_line(int irqline, int state); #include "tblh6280.c" /*****************************************************************************/ -static void h6280_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( h6280 ) { state_save_register_item("h6280", index, h6280.ppc.w.l); state_save_register_item("h6280", index, h6280.pc.w.l); @@ -186,17 +187,21 @@ static void h6280_init(int index, int clock, const void *config, int (*irqcallba state_save_register_item("h6280", index, h6280.io_buffer); h6280.irq_callback = irqcallback; + h6280.device = device; } -static void h6280_reset(void) +static CPU_RESET( h6280 ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; int i; /* wipe out the h6280 structure */ save_irqcallback = h6280.irq_callback; + save_device = h6280.device; memset(&h6280, 0, sizeof(h6280_Regs)); h6280.irq_callback = save_irqcallback; + h6280.device = save_device; /* set I and B flags */ P = _fI | _fB; @@ -224,12 +229,12 @@ static void h6280_reset(void) h6280.irq_pending = 0; } -static void h6280_exit(void) +static CPU_EXIT( h6280 ) { /* nothing */ } -static int h6280_execute(int cycles) +static CPU_EXECUTE( h6280 ) { int in; h6280_ICount = cycles; @@ -505,10 +510,10 @@ void h6280_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = h6280_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = h6280_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = h6280_set_context; break; - case CPUINFO_PTR_INIT: info->init = h6280_init; break; - case CPUINFO_PTR_RESET: info->reset = h6280_reset; break; - case CPUINFO_PTR_EXIT: info->exit = h6280_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = h6280_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h6280); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(h6280); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(h6280); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(h6280); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = h6280_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h6280_ICount; break; diff --git a/src/emu/cpu/h6280/h6280ops.h b/src/emu/cpu/h6280/h6280ops.h index 4237b86447e..3e3e338f43b 100644 --- a/src/emu/cpu/h6280/h6280ops.h +++ b/src/emu/cpu/h6280/h6280ops.h @@ -98,13 +98,13 @@ !(h6280.irq_mask & 0x2) ) \ { \ DO_INTERRUPT(H6280_IRQ1_VEC); \ - (*h6280.irq_callback)(0); \ + (*h6280.irq_callback)(h6280.device, 0); \ } else \ if ( h6280.irq_state[1] != CLEAR_LINE && \ !(h6280.irq_mask & 0x1) ) \ { \ DO_INTERRUPT(H6280_IRQ2_VEC); \ - (*h6280.irq_callback)(1); \ + (*h6280.irq_callback)(h6280.device, 1); \ } \ } diff --git a/src/emu/cpu/h83002/h83002.c b/src/emu/cpu/h83002/h83002.c index c625b170018..120b7fa5fd6 100644 --- a/src/emu/cpu/h83002/h83002.c +++ b/src/emu/cpu/h83002/h83002.c @@ -319,12 +319,13 @@ static STATE_POSTLOAD( h8_onstateload ) h8_set_ccr(h8.ccr); } -static void h8_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( h8 ) { memset(&h8, 0, sizeof(h8)); h8.h8iflag = 1; h8.irq_cb = irqcallback; + h8.device = device; state_save_register_item("H8/3002", index, h8.h8err); state_save_register_item_array("H8/3002", index, h8.regs); @@ -343,13 +344,13 @@ static void h8_init(int index, int clock, const void *config, int (*irqcallback) h8_itu_init(); } -static void h8_3007_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( h8_3007 ) { - h8_init(index, clock, config, irqcallback); + CPU_INIT_CALL(h8); h8_3007_itu_init(); } -static void h8_reset(void) +static CPU_RESET( h8 ) { h8.h8err = 0; h8.pc = h8_mem_read32(0) & 0xffffff; @@ -453,7 +454,7 @@ static void h8_check_irqs(void) // external IRQs if (source >= 12 && source <= 17) { - (*h8.irq_cb)(source - 12 + H8_IRQ0); + (*h8.irq_cb)(h8.device, source - 12 + H8_IRQ0); } if (source != 0xff) @@ -461,7 +462,7 @@ static void h8_check_irqs(void) } } -static int h8_execute(int cycles) +static CPU_EXECUTE( h8 ) { UINT16 opcode=0; @@ -4070,10 +4071,10 @@ void h8_3002_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = h8_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = h8_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext= h8_set_context; break; - case CPUINFO_PTR_INIT: info->init = h8_init; break; - case CPUINFO_PTR_RESET: info->reset = h8_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h8); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(h8); break; case CPUINFO_PTR_EXIT: info->exit = 0; break; - case CPUINFO_PTR_EXECUTE: info->execute = h8_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break; case CPUINFO_PTR_BURN: info->burn = 0; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = h8_disasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h8_cyccnt; break; @@ -4154,7 +4155,7 @@ void h8_3007_get_info(UINT32 state, cpuinfo *info) switch (state) { case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_h8_3007_internal_map; break; - case CPUINFO_PTR_INIT: info->init = h8_3007_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h8_3007); break; case CPUINFO_STR_NAME: strcpy(info->s, "H8/3007"); break; default: h8_3002_get_info(state,info); diff --git a/src/emu/cpu/h83002/h8priv.h b/src/emu/cpu/h83002/h8priv.h index d5a6ac8b724..266c8c7d90a 100644 --- a/src/emu/cpu/h83002/h8priv.h +++ b/src/emu/cpu/h83002/h8priv.h @@ -22,7 +22,8 @@ struct _h83002_state UINT8 h8nflag, h8vflag, h8cflag, h8zflag, h8iflag, h8hflag; UINT8 h8uflag, h8uiflag; - int (*irq_cb)(int); + cpu_irq_callback irq_cb; + const device_config *device; // H8/3002 onboard peripherals stuff diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c index fc2812f8e8f..8d801f6cd53 100644 --- a/src/emu/cpu/hd6309/hd6309.c +++ b/src/emu/cpu/hd6309/hd6309.c @@ -143,7 +143,8 @@ typedef struct UINT8 ireg; /* First opcode */ UINT8 irq_state[2]; int extra_cycles; /* cycles used up by interrupts */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 int_state; /* SYNC and CWAI flags */ UINT8 nmi_state; } hd6309_Regs; @@ -452,7 +453,7 @@ static void CHECK_IRQ_LINES( void ) CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */ PCD=RM16(0xfff6); CHANGE_PC; - (void)(*hd6309.irq_callback)(HD6309_FIRQ_LINE); + (void)(*hd6309.irq_callback)(hd6309.device, HD6309_FIRQ_LINE); } else if( hd6309.irq_state[HD6309_IRQ_LINE]!=CLEAR_LINE && !(CC & CC_II) ) @@ -486,7 +487,7 @@ static void CHECK_IRQ_LINES( void ) CC |= CC_II; /* inhibit IRQ */ PCD=RM16(0xfff8); CHANGE_PC; - (void)(*hd6309.irq_callback)(HD6309_IRQ_LINE); + (void)(*hd6309.irq_callback)(hd6309.device, HD6309_IRQ_LINE); } } @@ -517,9 +518,10 @@ static STATE_POSTLOAD( hd6309_postload ) UpdateState(); } -static void hd6309_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( hd6309 ) { hd6309.irq_callback = irqcallback; + hd6309.device = device; state_save_register_item("hd6309", index, PC); state_save_register_item("hd6309", index, U); @@ -540,7 +542,7 @@ static void hd6309_init(int index, int clock, const void *config, int (*irqcallb /****************************************************************************/ /* Reset registers to their initial values */ /****************************************************************************/ -static void hd6309_reset(void) +static CPU_RESET( hd6309 ) { hd6309.int_state = 0; hd6309.nmi_state = CLEAR_LINE; @@ -558,7 +560,7 @@ static void hd6309_reset(void) UpdateState(); } -static void hd6309_exit(void) +static CPU_EXIT( hd6309 ) { /* nothing to do ? */ } @@ -623,7 +625,7 @@ static void set_irq_line(int irqline, int state) #include "6309ops.c" /* execute instructions on this CPU until icount expires */ -static int hd6309_execute(int cycles) /* NS 970908 */ +static CPU_EXECUTE( hd6309 ) /* NS 970908 */ { hd6309_ICount = cycles - hd6309.extra_cycles; hd6309.extra_cycles = 0; @@ -1292,10 +1294,10 @@ void hd6309_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = hd6309_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = hd6309_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = hd6309_set_context; break; - case CPUINFO_PTR_INIT: info->init = hd6309_init; break; - case CPUINFO_PTR_RESET: info->reset = hd6309_reset; break; - case CPUINFO_PTR_EXIT: info->exit = hd6309_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = hd6309_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hd6309); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hd6309); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(hd6309); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hd6309); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hd6309_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &hd6309_ICount; break; diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c index dff6e503d68..6143b1536a2 100644 --- a/src/emu/cpu/i386/i386.c +++ b/src/emu/cpu/i386/i386.c @@ -340,7 +340,7 @@ static void i386_check_irq_line(void) if ( (I.irq_state) && I.IF ) { I.cycles -= 2; - i386_trap(I.irq_callback(0), 1); + i386_trap(I.irq_callback(I.device, 0), 1); } } @@ -491,7 +491,7 @@ static STATE_POSTLOAD( i386_postload ) CHANGE_PC(I.eip); } -static void i386_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i386 ) { int i, j; static const int regs8[8] = {AL,CL,DL,BL,AH,CH,DH,BH}; @@ -521,6 +521,7 @@ static void i386_init(int index, int clock, const void *config, int (*irqcallbac } I.irq_callback = irqcallback; + I.device = device; state_save_register_item_array(state_type, index, I.reg.d); state_save_register_item(state_type, index, I.sreg[ES].selector); @@ -609,13 +610,16 @@ static void build_opcode_table(UINT32 features) } } -static void i386_reset(void) +static CPU_RESET( i386 ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; save_irqcallback = I.irq_callback; + save_device = I.device; memset( &I, 0, sizeof(I386_REGS) ); I.irq_callback = save_irqcallback; + I.device = save_device; I.sreg[CS].selector = 0xf000; I.sreg[CS].base = 0xffff0000; @@ -691,16 +695,16 @@ static void i386_set_a20_line(int state) } } -static int i386_execute(int num_cycles) +static CPU_EXECUTE( i386 ) { - I.cycles = num_cycles; - I.base_cycles = num_cycles; + I.cycles = cycles; + I.base_cycles = cycles; CHANGE_PC(I.eip); if (I.halted) { - I.tsc += num_cycles; - return num_cycles; + I.tsc += cycles; + return cycles; } while( I.cycles > 0 ) @@ -716,9 +720,9 @@ static int i386_execute(int num_cycles) i386_check_irq_line(); I386OP(decode_opcode)(); } - I.tsc += (num_cycles - I.cycles); + I.tsc += (cycles - I.cycles); - return num_cycles - I.cycles; + return cycles - I.cycles; } /*************************************************************************/ @@ -955,9 +959,9 @@ void i386_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = i386_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i386_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i386_set_context; break; - case CPUINFO_PTR_INIT: info->init = i386_init; break; - case CPUINFO_PTR_RESET: info->reset = i386_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = i386_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i386); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i386); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i386); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &I.cycles; break; case CPUINFO_PTR_TRANSLATE: info->translate = translate_address_cb; break; @@ -1059,18 +1063,22 @@ void i386_get_info(UINT32 state, cpuinfo *info) #if (HAS_I486) -static void i486_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i486 ) { - i386_init(index, clock, config, irqcallback); + CPU_INIT_CALL(i386); } -static void i486_reset(void) +static CPU_RESET( i486 ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; save_irqcallback = I.irq_callback; + save_device = I.device; memset( &I, 0, sizeof(I386_REGS) ); I.irq_callback = save_irqcallback; + I.device = save_device; + I.sreg[CS].selector = 0xf000; I.sreg[CS].base = 0xffff0000; I.sreg[CS].limit = 0xffff; @@ -1099,7 +1107,7 @@ static void i486_reset(void) CHANGE_PC(I.eip); } -static void i486_exit(void) +static CPU_EXIT( i486 ) { } @@ -1127,9 +1135,9 @@ void i486_get_info(UINT32 state, cpuinfo *info) switch (state) { case CPUINFO_PTR_SET_INFO: info->setinfo = i486_set_info; break; - case CPUINFO_PTR_INIT: info->init = i486_init; break; - case CPUINFO_PTR_RESET: info->reset = i486_reset; break; - case CPUINFO_PTR_EXIT: info->exit = i486_exit; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i486); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i486); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i486); break; case CPUINFO_INT_REGISTER + X87_CTRL: info->i = I.fpu_control_word; break; case CPUINFO_INT_REGISTER + X87_STATUS: info->i = I.fpu_status_word; break; @@ -1165,18 +1173,22 @@ void i486_get_info(UINT32 state, cpuinfo *info) #if (HAS_PENTIUM) -static void pentium_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( pentium ) { - i386_init(index, clock, config, irqcallback); + CPU_INIT_CALL(i386); } -static void pentium_reset(void) +static CPU_RESET( pentium ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; save_irqcallback = I.irq_callback; + save_device = I.device; memset( &I, 0, sizeof(I386_REGS) ); I.irq_callback = save_irqcallback; + I.device = save_device; + I.sreg[CS].selector = 0xf000; I.sreg[CS].base = 0xffff0000; I.sreg[CS].limit = 0xffff; @@ -1225,7 +1237,7 @@ static void pentium_reset(void) CHANGE_PC(I.eip); } -static void pentium_exit(void) +static CPU_EXIT( pentium ) { } @@ -1253,9 +1265,9 @@ void pentium_get_info(UINT32 state, cpuinfo *info) switch (state) { case CPUINFO_PTR_SET_INFO: info->setinfo = pentium_set_info; break; - case CPUINFO_PTR_INIT: info->init = pentium_init; break; - case CPUINFO_PTR_RESET: info->reset = pentium_reset; break; - case CPUINFO_PTR_EXIT: info->exit = pentium_exit; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pentium); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pentium); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(pentium); break; case CPUINFO_INT_REGISTER + X87_CTRL: info->i = I.fpu_control_word; break; case CPUINFO_INT_REGISTER + X87_STATUS: info->i = I.fpu_status_word; break; @@ -1291,18 +1303,22 @@ void pentium_get_info(UINT32 state, cpuinfo *info) #if (HAS_MEDIAGX) -static void mediagx_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( mediagx ) { - i386_init(index, clock, config, irqcallback); + CPU_INIT_CALL(i386); } -static void mediagx_reset(void) +static CPU_RESET( mediagx ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; save_irqcallback = I.irq_callback; + save_device = I.device; memset( &I, 0, sizeof(I386_REGS) ); I.irq_callback = save_irqcallback; + I.device = save_device; + I.sreg[CS].selector = 0xf000; I.sreg[CS].base = 0xffff0000; I.sreg[CS].limit = 0xffff; @@ -1351,7 +1367,7 @@ static void mediagx_reset(void) CHANGE_PC(I.eip); } -static void mediagx_exit(void) +static CPU_EXIT( mediagx ) { } @@ -1379,9 +1395,9 @@ void mediagx_get_info(UINT32 state, cpuinfo *info) switch (state) { case CPUINFO_PTR_SET_INFO: info->setinfo = mediagx_set_info; break; - case CPUINFO_PTR_INIT: info->init = mediagx_init; break; - case CPUINFO_PTR_RESET: info->reset = mediagx_reset; break; - case CPUINFO_PTR_EXIT: info->exit = mediagx_exit; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mediagx); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mediagx); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break; case CPUINFO_INT_REGISTER + X87_CTRL: info->i = I.fpu_control_word; break; case CPUINFO_INT_REGISTER + X87_STATUS: info->i = I.fpu_status_word; break; diff --git a/src/emu/cpu/i386/i386.h b/src/emu/cpu/i386/i386.h index d7d80e8f7a4..bbddc4b2024 100644 --- a/src/emu/cpu/i386/i386.h +++ b/src/emu/cpu/i386/i386.h @@ -249,7 +249,8 @@ typedef struct { UINT8 opcode; UINT8 irq_state; - int (*irq_callback)(int); + cpu_irq_callback irq_callback; + const device_config *device; UINT32 a20_mask; int cpuid_max_input_value_eax; diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c index 56135c1ce7a..33ca1780320 100644 --- a/src/emu/cpu/i8085/i8085.c +++ b/src/emu/cpu/i8085/i8085.c @@ -148,7 +148,8 @@ typedef struct { UINT32 IRQ1; /* executed interrupt address */ UINT8 STATUS; /* status word */ INT8 irq_state[4]; - int (*irq_callback)(int); + cpu_irq_callback irq_callback; + const device_config *device; void (*sod_callback)(int state); int (*sid_callback)(void); } i8085_Regs; @@ -1243,7 +1244,7 @@ static void Interrupt(void) if( I.ISRV == IM_INTR ) { LOG(("Interrupt get INTR vector\n")); - I.IRQ1 = (I.irq_callback)(0); + I.IRQ1 = (I.irq_callback)(I.device, 0); } if( I.cputype ) @@ -1251,21 +1252,21 @@ static void Interrupt(void) if( I.ISRV == IM_RST55 ) { LOG(("Interrupt get RST5.5 vector\n")); - //I.IRQ1 = (I.irq_callback)(1); + //I.IRQ1 = (I.irq_callback)(I.device, 1); I.irq_state[I8085_RST55_LINE] = CLEAR_LINE; //AT: processing RST5.5, reset interrupt line } if( I.ISRV == IM_RST65 ) { LOG(("Interrupt get RST6.5 vector\n")); - //I.IRQ1 = (I.irq_callback)(2); + //I.IRQ1 = (I.irq_callback)(I.device, 2); I.irq_state[I8085_RST65_LINE] = CLEAR_LINE; //AT: processing RST6.5, reset interrupt line } if( I.ISRV == IM_RST75 ) { LOG(("Interrupt get RST7.5 vector\n")); - //I.IRQ1 = (I.irq_callback)(3); + //I.IRQ1 = (I.irq_callback)(I.device, 3); I.irq_state[I8085_RST75_LINE] = CLEAR_LINE; //AT: processing RST7.5, reset interrupt line } } @@ -1301,7 +1302,7 @@ static void Interrupt(void) } } -static int i8085_execute(int cycles) +static CPU_EXECUTE( i8085 ) { i8085_ICount = cycles; @@ -1356,11 +1357,12 @@ static void init_tables (void) /**************************************************************************** * Init the 8085 emulation ****************************************************************************/ -static void i8085_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8085 ) { init_tables(); I.cputype = 1; I.irq_callback = irqcallback; + I.device = device; state_save_register_item("i8085", index, I.AF.w.l); state_save_register_item("i8085", index, I.BC.w.l); @@ -1382,18 +1384,21 @@ static void i8085_init(int index, int clock, const void *config, int (*irqcallba /**************************************************************************** * Reset the 8085 emulation ****************************************************************************/ -static void i8085_reset(void) +static CPU_RESET( i8085 ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; void (*save_sodcallback)(int); int (*save_sidcallback)(void); int cputype_bak = I.cputype; init_tables(); + save_device = I.device; save_irqcallback = I.irq_callback; save_sodcallback = I.sod_callback; save_sidcallback = I.sid_callback; memset(&I, 0, sizeof(i8085_Regs)); + I.device = save_device; I.irq_callback = save_irqcallback; I.sod_callback = save_sodcallback; I.sid_callback = save_sidcallback; @@ -1405,7 +1410,7 @@ static void i8085_reset(void) /**************************************************************************** * Shut down the CPU emulation ****************************************************************************/ -static void i8085_exit(void) +static CPU_EXIT( i8085 ) { /* nothing to do */ } @@ -1591,11 +1596,12 @@ static void i8085_set_irq_line(int irqline, int state) **************************************************************************/ #if (HAS_8080) -static void i8080_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8080 ) { init_tables(); I.cputype = 0; I.irq_callback = irqcallback; + I.device = device; state_save_register_item("i8080", index, I.AF.w.l); state_save_register_item("i8080", index, I.BC.w.l); @@ -1736,10 +1742,10 @@ void i8085_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = i8085_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i8085_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i8085_set_context; break; - case CPUINFO_PTR_INIT: info->init = i8085_init; break; - case CPUINFO_PTR_RESET: info->reset = i8085_reset; break; - case CPUINFO_PTR_EXIT: info->exit = i8085_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = i8085_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8085); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i8085); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i8085); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8085); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8085_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i8085_ICount; break; @@ -1808,7 +1814,7 @@ void i8080_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = i8080_set_info; break; - case CPUINFO_PTR_INIT: info->init = i8080_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8080); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "8080"); break; diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c index b0e1b71fb84..ec4b728cac3 100644 --- a/src/emu/cpu/i86/i286.c +++ b/src/emu/cpu/i86/i286.c @@ -58,7 +58,8 @@ typedef struct UINT16 limit; UINT8 rights; } ldtr, tr; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */ UINT8 ParityVal; UINT8 TF, IF; /* 0 or 1 valued flags */ @@ -82,7 +83,7 @@ static char seg_prefix; /* prefix segment indicator */ static UINT8 parity_table[256]; -static struct i80x86_timing cycles; +static struct i80x86_timing timing; /***************************************************************************/ @@ -134,7 +135,7 @@ static void i80286_set_a20_line(int state) I.amask = state ? 0x00ffffff : 0x000fffff; } -static void i80286_reset (void) +static CPU_RESET( i80286 ) { static int urinit=1; @@ -211,14 +212,14 @@ static void set_irq_line(int irqline, int state) } } -static int i80286_execute(int num_cycles) +static CPU_EXECUTE( i80286 ) { /* copy over the cycle counts if they're not correct */ - if (cycles.id != 80286) - cycles = i80286_cycles; + if (timing.id != 80286) + timing = i80286_cycles; /* adjust for any interrupts that came in */ - i80286_ICount = num_cycles; + i80286_ICount = cycles; i80286_ICount -= I.extra_cycles; I.extra_cycles = 0; @@ -238,7 +239,7 @@ static int i80286_execute(int num_cycles) i80286_ICount -= I.extra_cycles; I.extra_cycles = 0; - return num_cycles - i80286_ICount; + return cycles - i80286_ICount; } extern int i386_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, int mode); @@ -248,7 +249,7 @@ static offs_t i80286_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN return i386_dasm_one(buffer, pc, oprom, 16); } -static void i80286_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i80286 ) { static const char type[] = "80286"; state_save_register_item_array(type, index, I.regs.w); @@ -287,6 +288,7 @@ static void i80286_init(int index, int clock, const void *config, int (*irqcallb state_save_register_item(type, index, I.extra_cycles); I.irq_callback = irqcallback; + I.device = device; /* If a reset parameter is given, take it as pointer to an address mask */ if( config ) @@ -439,10 +441,10 @@ void i80286_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = i80286_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i80286_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i80286_set_context; break; - case CPUINFO_PTR_INIT: info->init = i80286_init; break; - case CPUINFO_PTR_RESET: info->reset = i80286_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80286); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i80286); break; case CPUINFO_PTR_EXIT: info->exit = NULL; break; - case CPUINFO_PTR_EXECUTE: info->execute = i80286_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80286); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80286_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i80286_ICount; break; diff --git a/src/emu/cpu/i86/i86.c b/src/emu/cpu/i86/i86.c index c99c86a67aa..b44080f9a1b 100644 --- a/src/emu/cpu/i86/i86.c +++ b/src/emu/cpu/i86/i86.c @@ -40,7 +40,8 @@ typedef struct UINT32 base[4]; UINT16 sregs[4]; UINT16 flags; - int (*irq_callback) (int irqline); + cpu_irq_callback irq_callback; + const device_config *device; INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */ UINT8 ParityVal; UINT8 TF, IF; /* 0 or 1 valued flags */ @@ -70,7 +71,7 @@ static char seg_prefix; /* prefix segment indicator */ static UINT8 parity_table[256]; -static struct i80x86_timing cycles; +static struct i80x86_timing timing; /* The interrupt number of a pending external interrupt pending NMI is 2. */ /* For INTR interrupts, the level is caught on the bus during an INTA cycle */ @@ -116,7 +117,7 @@ static void i8086_state_register(int index) state_save_register_item(type, index, I.test_state); /* PJB 03/05 */ } -static void i8086_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8086 ) { unsigned int i, j, c; static const BREGS reg_name[8] = {AL, CL, DL, BL, AH, CH, DH, BH}; @@ -142,27 +143,31 @@ static void i8086_init(int index, int clock, const void *config, int (*irqcallba } I.irq_callback = irqcallback; + I.device = device; i8086_state_register(index); configure_memory_16bit(); } #if (HAS_I8088||HAS_I80188) -static void i8088_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8088 ) { - i8086_init(index, clock, config, irqcallback); + CPU_INIT_CALL(i8086); configure_memory_8bit(); } #endif -static void i8086_reset(void) +static CPU_RESET( i8086 ) { - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; memory_interface save_mem; save_irqcallback = I.irq_callback; + save_device = I.device; save_mem = I.mem; memset(&I, 0, sizeof (I)); + I.device = save_device; I.irq_callback = save_irqcallback; I.mem = save_mem; @@ -174,7 +179,7 @@ static void i8086_reset(void) change_pc(I.pc); } -static void i8086_exit(void) +static CPU_EXIT( i8086 ) { /* nothing to do ? */ } @@ -228,14 +233,14 @@ static void set_test_line(int state) I.test_state = !state; } -static int i8086_execute(int num_cycles) +static CPU_EXECUTE( i8086 ) { /* copy over the cycle counts if they're not correct */ - if (cycles.id != 8086) - cycles = i8086_cycles; + if (timing.id != 8086) + timing = i8086_cycles; /* adjust for any interrupts that came in */ - i8086_ICount = num_cycles; + i8086_ICount = cycles; i8086_ICount -= I.extra_cycles; I.extra_cycles = 0; @@ -256,7 +261,7 @@ static int i8086_execute(int num_cycles) i8086_ICount -= I.extra_cycles; I.extra_cycles = 0; - return num_cycles - i8086_ICount; + return cycles - i8086_ICount; } @@ -282,14 +287,14 @@ static offs_t i8086_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT #include "instr186.c" #undef I80186 -static int i80186_execute(int num_cycles) +static CPU_EXECUTE( i80186 ) { /* copy over the cycle counts if they're not correct */ - if (cycles.id != 80186) - cycles = i80186_cycles; + if (timing.id != 80186) + timing = i80186_cycles; /* adjust for any interrupts that came in */ - i8086_ICount = num_cycles; + i8086_ICount = cycles; i8086_ICount -= I.extra_cycles; I.extra_cycles = 0; @@ -309,7 +314,7 @@ static int i80186_execute(int num_cycles) i8086_ICount -= I.extra_cycles; I.extra_cycles = 0; - return num_cycles - i8086_ICount; + return cycles - i8086_ICount; } #endif @@ -430,10 +435,10 @@ void i8086_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = i8086_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i8086_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i8086_set_context; break; - case CPUINFO_PTR_INIT: info->init = i8086_init; break; - case CPUINFO_PTR_RESET: info->reset = i8086_reset; break; - case CPUINFO_PTR_EXIT: info->exit = i8086_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = i8086_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8086); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i8086); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i8086); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8086); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8086_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i8086_ICount; break; @@ -500,7 +505,7 @@ void i8088_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = i8088_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8088); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "8088"); break; @@ -525,7 +530,7 @@ void i80186_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_EXECUTE: info->execute = i80186_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "80186"); break; @@ -550,8 +555,8 @@ void i80188_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = i8088_init; break; - case CPUINFO_PTR_EXECUTE: info->execute = i80186_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8088); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "80188"); break; diff --git a/src/emu/cpu/i86/instr186.c b/src/emu/cpu/i86/instr186.c index 11c313a3eb2..a3d4794b9f2 100644 --- a/src/emu/cpu/i86/instr186.c +++ b/src/emu/cpu/i86/instr186.c @@ -16,7 +16,7 @@ static void PREFIX186(_pusha)(void) /* Opcode 0x60 */ { unsigned tmp=I.regs.w[SP]; - ICOUNT -= cycles.pusha; + ICOUNT -= timing.pusha; PUSH(I.regs.w[AX]); PUSH(I.regs.w[CX]); PUSH(I.regs.w[DX]); @@ -31,7 +31,7 @@ static void PREFIX186(_popa)(void) /* Opcode 0x61 */ { unsigned tmp; - ICOUNT -= cycles.popa; + ICOUNT -= timing.popa; POP(I.regs.w[DI]); POP(I.regs.w[SI]); POP(I.regs.w[BP]); @@ -52,14 +52,14 @@ static void PREFIX186(_bound)(void) /* Opcode 0x62 */ I.pc-=2; PREFIX86(_interrupt)(5); } - ICOUNT -= cycles.bound; + ICOUNT -= timing.bound; } static void PREFIX186(_push_d16)(void) /* Opcode 0x68 */ { unsigned tmp = FETCH; - ICOUNT -= cycles.push_imm; + ICOUNT -= timing.push_imm; tmp += FETCH << 8; PUSH(tmp); } @@ -70,7 +70,7 @@ static void PREFIX186(_imul_d16)(void) /* Opcode 0x69 */ unsigned src2=FETCH; src+=(FETCH<<8); - ICOUNT -= (ModRM >= 0xc0) ? cycles.imul_rri16 : cycles.imul_rmi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.imul_rri16 : timing.imul_rmi16; dst = (INT32)((INT16)src)*(INT32)((INT16)src2); I.CarryVal = I.OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); @@ -82,7 +82,7 @@ static void PREFIX186(_push_d8)(void) /* Opcode 0x6a */ { unsigned tmp = (WORD)((INT16)((INT8)FETCH)); - ICOUNT -= cycles.push_imm; + ICOUNT -= timing.push_imm; PUSH(tmp); } @@ -91,7 +91,7 @@ static void PREFIX186(_imul_d8)(void) /* Opcode 0x6b */ DEF_r16w(dst,src); unsigned src2= (WORD)((INT16)((INT8)FETCH)); - ICOUNT -= (ModRM >= 0xc0) ? cycles.imul_rri8 : cycles.imul_rmi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.imul_rri8 : timing.imul_rmi8; dst = (INT32)((INT16)src)*(INT32)((INT16)src2); I.CarryVal = I.OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); @@ -100,28 +100,28 @@ static void PREFIX186(_imul_d8)(void) /* Opcode 0x6b */ static void PREFIX186(_insb)(void) /* Opcode 0x6c */ { - ICOUNT -= cycles.ins8; + ICOUNT -= timing.ins8; PutMemB(ES,I.regs.w[DI],read_port_byte(I.regs.w[DX])); I.regs.w[DI] += I.DirVal; } static void PREFIX186(_insw)(void) /* Opcode 0x6d */ { - ICOUNT -= cycles.ins16; + ICOUNT -= timing.ins16; PutMemW(ES,I.regs.w[DI],read_port_word(I.regs.w[DX])); I.regs.w[DI] += 2 * I.DirVal; } static void PREFIX186(_outsb)(void) /* Opcode 0x6e */ { - ICOUNT -= cycles.outs8; + ICOUNT -= timing.outs8; write_port_byte(I.regs.w[DX],GetMemB(DS,I.regs.w[SI])); I.regs.w[SI] += I.DirVal; /* GOL 11/27/01 */ } static void PREFIX186(_outsw)(void) /* Opcode 0x6f */ { - ICOUNT -= cycles.outs16; + ICOUNT -= timing.outs16; write_port_word(I.regs.w[DX],GetMemW(DS,I.regs.w[SI])); I.regs.w[SI] += 2 * I.DirVal; /* GOL 11/27/01 */ } @@ -148,7 +148,7 @@ static void PREFIX186(_enter)(void) /* Opcode 0xc8 */ nb += FETCH << 8; level = FETCH; - ICOUNT -= (level == 0) ? cycles.enter0 : (level == 1) ? cycles.enter1 : cycles.enter_base + level * cycles.enter_count; + ICOUNT -= (level == 0) ? timing.enter0 : (level == 1) ? timing.enter1 : timing.enter_base + level * timing.enter_count; PUSH(I.regs.w[BP]); I.regs.w[BP]=I.regs.w[SP]; I.regs.w[SP] -= nb; @@ -159,7 +159,7 @@ static void PREFIX186(_enter)(void) /* Opcode 0xc8 */ static void PREFIX186(_leave)(void) /* Opcode 0xc9 */ { - ICOUNT -= cycles.leave; + ICOUNT -= timing.leave; I.regs.w[SP]=I.regs.w[BP]; POP(I.regs.w[BP]); } diff --git a/src/emu/cpu/i86/instr86.c b/src/emu/cpu/i86/instr86.c index dfb1c1e2b34..2da447af900 100644 --- a/src/emu/cpu/i86/instr86.c +++ b/src/emu/cpu/i86/instr86.c @@ -22,7 +22,7 @@ static void PREFIX86(_interrupt)(unsigned int_num) WORD ip = I.pc - I.base[CS]; if (int_num == -1) - int_num = (*I.irq_callback)(0); + int_num = (*I.irq_callback)(I.device, 0); #ifdef I80286 if (PM) { @@ -44,7 +44,7 @@ static void PREFIX86(_interrupt)(unsigned int_num) #endif CHANGE_PC(I.pc); - I.extra_cycles += cycles.exception; + I.extra_cycles += timing.exception; } static void PREFIX86(_trap)(void) @@ -62,11 +62,11 @@ static void PREFIX86(_rotate_shift_Byte)(unsigned ModRM, unsigned count) if (count==0) { - ICOUNT -= (ModRM >= 0xc0) ? cycles.rot_reg_base : cycles.rot_m8_base; + ICOUNT -= (ModRM >= 0xc0) ? timing.rot_reg_base : timing.rot_m8_base; } else if (count==1) { - ICOUNT -= (ModRM >= 0xc0) ? cycles.rot_reg_1 : cycles.rot_m8_1; + ICOUNT -= (ModRM >= 0xc0) ? timing.rot_reg_1 : timing.rot_m8_1; switch (ModRM & 0x38) { @@ -123,7 +123,7 @@ static void PREFIX86(_rotate_shift_Byte)(unsigned ModRM, unsigned count) } else { - ICOUNT -= (ModRM >= 0xc0) ? cycles.rot_reg_base + cycles.rot_reg_bit : cycles.rot_m8_base + cycles.rot_m8_bit; + ICOUNT -= (ModRM >= 0xc0) ? timing.rot_reg_base + timing.rot_reg_bit : timing.rot_m8_base + timing.rot_m8_bit; switch (ModRM & 0x38) { @@ -195,11 +195,11 @@ static void PREFIX86(_rotate_shift_Word)(unsigned ModRM, unsigned count) if (count==0) { - ICOUNT -= (ModRM >= 0xc0) ? cycles.rot_reg_base : cycles.rot_m16_base; + ICOUNT -= (ModRM >= 0xc0) ? timing.rot_reg_base : timing.rot_m16_base; } else if (count==1) { - ICOUNT -= (ModRM >= 0xc0) ? cycles.rot_reg_1 : cycles.rot_m16_1; + ICOUNT -= (ModRM >= 0xc0) ? timing.rot_reg_1 : timing.rot_m16_1; switch (ModRM & 0x38) { @@ -314,7 +314,7 @@ static void PREFIX86(_rotate_shift_Word)(unsigned ModRM, unsigned count) } else { - ICOUNT -= (ModRM >= 0xc0) ? cycles.rot_reg_base + cycles.rot_reg_bit : cycles.rot_m8_base + cycles.rot_m16_bit; + ICOUNT -= (ModRM >= 0xc0) ? timing.rot_reg_base + timing.rot_reg_bit : timing.rot_m8_base + timing.rot_m16_bit; switch (ModRM & 0x38) { @@ -393,75 +393,75 @@ static void PREFIX(rep)(int flagval) case 0x26: /* ES: */ seg_prefix=TRUE; prefix_base=I.base[ES]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(rep)(flagval); break; case 0x2e: /* CS: */ seg_prefix=TRUE; prefix_base=I.base[CS]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(rep)(flagval); break; case 0x36: /* SS: */ seg_prefix=TRUE; prefix_base=I.base[SS]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(rep)(flagval); break; case 0x3e: /* DS: */ seg_prefix=TRUE; prefix_base=I.base[DS]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(rep)(flagval); break; #ifndef I8086 case 0x6c: /* REP INSB */ - ICOUNT -= cycles.rep_ins8_base; + ICOUNT -= timing.rep_ins8_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } PutMemB(ES,I.regs.w[DI],read_port_byte(I.regs.w[DX])); I.regs.w[DI] += I.DirVal; - ICOUNT -= cycles.rep_ins8_count; + ICOUNT -= timing.rep_ins8_count; } I.regs.w[CX]=count; break; case 0x6d: /* REP INSW */ - ICOUNT -= cycles.rep_ins16_base; + ICOUNT -= timing.rep_ins16_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } PutMemW(ES,I.regs.w[DI],read_port_word(I.regs.w[DX])); I.regs.w[DI] += 2 * I.DirVal; - ICOUNT -= cycles.rep_ins16_count; + ICOUNT -= timing.rep_ins16_count; } I.regs.w[CX]=count; break; case 0x6e: /* REP OUTSB */ - ICOUNT -= cycles.rep_outs8_base; + ICOUNT -= timing.rep_outs8_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } write_port_byte(I.regs.w[DX],GetMemB(DS,I.regs.w[SI])); I.regs.w[SI] += I.DirVal; /* GOL 11/27/01 */ - ICOUNT -= cycles.rep_outs8_count; + ICOUNT -= timing.rep_outs8_count; } I.regs.w[CX]=count; break; case 0x6f: /* REP OUTSW */ - ICOUNT -= cycles.rep_outs16_base; + ICOUNT -= timing.rep_outs16_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } write_port_word(I.regs.w[DX],GetMemW(DS,I.regs.w[SI])); I.regs.w[SI] += 2 * I.DirVal; /* GOL 11/27/01 */ - ICOUNT -= cycles.rep_outs16_count; + ICOUNT -= timing.rep_outs16_count; } I.regs.w[CX]=count; break; #endif case 0xa4: /* REP MOVSB */ - ICOUNT -= cycles.rep_movs8_base; + ICOUNT -= timing.rep_movs8_base; for (; count > 0; count--) { BYTE tmp; @@ -471,12 +471,12 @@ static void PREFIX(rep)(int flagval) PutMemB(ES,I.regs.w[DI], tmp); I.regs.w[DI] += I.DirVal; I.regs.w[SI] += I.DirVal; - ICOUNT -= cycles.rep_movs8_count; + ICOUNT -= timing.rep_movs8_count; } I.regs.w[CX]=count; break; case 0xa5: /* REP MOVSW */ - ICOUNT -= cycles.rep_movs16_base; + ICOUNT -= timing.rep_movs16_base; for (; count > 0; count--) { WORD tmp; @@ -486,12 +486,12 @@ static void PREFIX(rep)(int flagval) PutMemW(ES,I.regs.w[DI], tmp); I.regs.w[DI] += 2 * I.DirVal; I.regs.w[SI] += 2 * I.DirVal; - ICOUNT -= cycles.rep_movs16_count; + ICOUNT -= timing.rep_movs16_count; } I.regs.w[CX]=count; break; case 0xa6: /* REP(N)E CMPSB */ - ICOUNT -= cycles.rep_cmps8_base; + ICOUNT -= timing.rep_cmps8_base; for (I.ZeroVal = !flagval; (ZF == flagval) && (count > 0); count--) { unsigned dst, src; @@ -502,12 +502,12 @@ static void PREFIX(rep)(int flagval) SUBB(src,dst); /* opposite of the usual convention */ I.regs.w[DI] += I.DirVal; I.regs.w[SI] += I.DirVal; - ICOUNT -= cycles.rep_cmps8_count; + ICOUNT -= timing.rep_cmps8_count; } I.regs.w[CX]=count; break; case 0xa7: /* REP(N)E CMPSW */ - ICOUNT -= cycles.rep_cmps16_base; + ICOUNT -= timing.rep_cmps16_base; for (I.ZeroVal = !flagval; (ZF == flagval) && (count > 0); count--) { unsigned dst, src; @@ -518,56 +518,56 @@ static void PREFIX(rep)(int flagval) SUBW(src,dst); /* opposite of the usual convention */ I.regs.w[DI] += 2 * I.DirVal; I.regs.w[SI] += 2 * I.DirVal; - ICOUNT -= cycles.rep_cmps16_count; + ICOUNT -= timing.rep_cmps16_count; } I.regs.w[CX]=count; break; case 0xaa: /* REP STOSB */ - ICOUNT -= cycles.rep_stos8_base; + ICOUNT -= timing.rep_stos8_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } PutMemB(ES,I.regs.w[DI],I.regs.b[AL]); I.regs.w[DI] += I.DirVal; - ICOUNT -= cycles.rep_stos8_count; + ICOUNT -= timing.rep_stos8_count; } I.regs.w[CX]=count; break; case 0xab: /* REP STOSW */ - ICOUNT -= cycles.rep_stos16_base; + ICOUNT -= timing.rep_stos16_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } PutMemW(ES,I.regs.w[DI],I.regs.w[AX]); I.regs.w[DI] += 2 * I.DirVal; - ICOUNT -= cycles.rep_stos16_count; + ICOUNT -= timing.rep_stos16_count; } I.regs.w[CX]=count; break; case 0xac: /* REP LODSB */ - ICOUNT -= cycles.rep_lods8_base; + ICOUNT -= timing.rep_lods8_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } I.regs.b[AL] = GetMemB(DS,I.regs.w[SI]); I.regs.w[SI] += I.DirVal; - ICOUNT -= cycles.rep_lods8_count; + ICOUNT -= timing.rep_lods8_count; } I.regs.w[CX]=count; break; case 0xad: /* REP LODSW */ - ICOUNT -= cycles.rep_lods16_base; + ICOUNT -= timing.rep_lods16_base; for (; count > 0; count--) { if (ICOUNT <= 0) { I.pc = I.prevpc; break; } I.regs.w[AX] = GetMemW(DS,I.regs.w[SI]); I.regs.w[SI] += 2 * I.DirVal; - ICOUNT -= cycles.rep_lods16_count; + ICOUNT -= timing.rep_lods16_count; } I.regs.w[CX]=count; break; case 0xae: /* REP(N)E SCASB */ - ICOUNT -= cycles.rep_scas8_base; + ICOUNT -= timing.rep_scas8_base; for (I.ZeroVal = !flagval; (ZF == flagval) && (count > 0); count--) { unsigned src, dst; @@ -577,12 +577,12 @@ static void PREFIX(rep)(int flagval) dst = I.regs.b[AL]; SUBB(dst,src); I.regs.w[DI] += I.DirVal; - ICOUNT -= cycles.rep_scas8_count; + ICOUNT -= timing.rep_scas8_count; } I.regs.w[CX]=count; break; case 0xaf: /* REP(N)E SCASW */ - ICOUNT -= cycles.rep_scas16_base; + ICOUNT -= timing.rep_scas16_base; for (I.ZeroVal = !flagval; (ZF == flagval) && (count > 0); count--) { unsigned src, dst; @@ -592,7 +592,7 @@ static void PREFIX(rep)(int flagval) dst = I.regs.w[AX]; SUBW(dst,src); I.regs.w[DI] += 2 * I.DirVal; - ICOUNT -= cycles.rep_scas16_count; + ICOUNT -= timing.rep_scas16_count; } I.regs.w[CX]=count; break; @@ -605,7 +605,7 @@ static void PREFIX(rep)(int flagval) static void PREFIX86(_add_br8)(void) /* Opcode 0x00 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; ADDB(dst,src); PutbackRMByte(ModRM,dst); } @@ -613,7 +613,7 @@ static void PREFIX86(_add_br8)(void) /* Opcode 0x00 */ static void PREFIX86(_add_wr16)(void) /* Opcode 0x01 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; ADDW(dst,src); PutbackRMWord(ModRM,dst); } @@ -621,7 +621,7 @@ static void PREFIX86(_add_wr16)(void) /* Opcode 0x01 */ static void PREFIX86(_add_r8b)(void) /* Opcode 0x02 */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; ADDB(dst,src); RegByte(ModRM)=dst; } @@ -629,7 +629,7 @@ static void PREFIX86(_add_r8b)(void) /* Opcode 0x02 */ static void PREFIX86(_add_r16w)(void) /* Opcode 0x03 */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; ADDW(dst,src); RegWord(ModRM)=dst; } @@ -638,7 +638,7 @@ static void PREFIX86(_add_r16w)(void) /* Opcode 0x03 */ static void PREFIX86(_add_ald8)(void) /* Opcode 0x04 */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; ADDB(dst,src); I.regs.b[AL]=dst; } @@ -647,7 +647,7 @@ static void PREFIX86(_add_ald8)(void) /* Opcode 0x04 */ static void PREFIX86(_add_axd16)(void) /* Opcode 0x05 */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; ADDW(dst,src); I.regs.w[AX]=dst; } @@ -655,7 +655,7 @@ static void PREFIX86(_add_axd16)(void) /* Opcode 0x05 */ static void PREFIX86(_push_es)(void) /* Opcode 0x06 */ { - ICOUNT -= cycles.push_seg; + ICOUNT -= timing.push_seg; PUSH(I.sregs[ES]); } @@ -670,13 +670,13 @@ static void PREFIX86(_pop_es)(void) /* Opcode 0x07 */ POP(I.sregs[ES]); I.base[ES] = SegBase(ES); #endif - ICOUNT -= cycles.pop_seg; + ICOUNT -= timing.pop_seg; } static void PREFIX86(_or_br8)(void) /* Opcode 0x08 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; ORB(dst,src); PutbackRMByte(ModRM,dst); } @@ -684,7 +684,7 @@ static void PREFIX86(_or_br8)(void) /* Opcode 0x08 */ static void PREFIX86(_or_wr16)(void) /* Opcode 0x09 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; ORW(dst,src); PutbackRMWord(ModRM,dst); } @@ -692,7 +692,7 @@ static void PREFIX86(_or_wr16)(void) /* Opcode 0x09 */ static void PREFIX86(_or_r8b)(void) /* Opcode 0x0a */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; ORB(dst,src); RegByte(ModRM)=dst; } @@ -700,7 +700,7 @@ static void PREFIX86(_or_r8b)(void) /* Opcode 0x0a */ static void PREFIX86(_or_r16w)(void) /* Opcode 0x0b */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; ORW(dst,src); RegWord(ModRM)=dst; } @@ -708,7 +708,7 @@ static void PREFIX86(_or_r16w)(void) /* Opcode 0x0b */ static void PREFIX86(_or_ald8)(void) /* Opcode 0x0c */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; ORB(dst,src); I.regs.b[AL]=dst; } @@ -716,14 +716,14 @@ static void PREFIX86(_or_ald8)(void) /* Opcode 0x0c */ static void PREFIX86(_or_axd16)(void) /* Opcode 0x0d */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; ORW(dst,src); I.regs.w[AX]=dst; } static void PREFIX86(_push_cs)(void) /* Opcode 0x0e */ { - ICOUNT -= cycles.push_seg; + ICOUNT -= timing.push_seg; PUSH(I.sregs[CS]); } @@ -732,7 +732,7 @@ static void PREFIX86(_push_cs)(void) /* Opcode 0x0e */ static void PREFIX86(_adc_br8)(void) /* Opcode 0x10 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; src+=CF; ADDB(dst,src); PutbackRMByte(ModRM,dst); @@ -741,7 +741,7 @@ static void PREFIX86(_adc_br8)(void) /* Opcode 0x10 */ static void PREFIX86(_adc_wr16)(void) /* Opcode 0x11 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; src+=CF; ADDW(dst,src); PutbackRMWord(ModRM,dst); @@ -750,7 +750,7 @@ static void PREFIX86(_adc_wr16)(void) /* Opcode 0x11 */ static void PREFIX86(_adc_r8b)(void) /* Opcode 0x12 */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; src+=CF; ADDB(dst,src); RegByte(ModRM)=dst; @@ -759,7 +759,7 @@ static void PREFIX86(_adc_r8b)(void) /* Opcode 0x12 */ static void PREFIX86(_adc_r16w)(void) /* Opcode 0x13 */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; src+=CF; ADDW(dst,src); RegWord(ModRM)=dst; @@ -768,7 +768,7 @@ static void PREFIX86(_adc_r16w)(void) /* Opcode 0x13 */ static void PREFIX86(_adc_ald8)(void) /* Opcode 0x14 */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; src+=CF; ADDB(dst,src); I.regs.b[AL] = dst; @@ -777,7 +777,7 @@ static void PREFIX86(_adc_ald8)(void) /* Opcode 0x14 */ static void PREFIX86(_adc_axd16)(void) /* Opcode 0x15 */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; src+=CF; ADDW(dst,src); I.regs.w[AX]=dst; @@ -786,7 +786,7 @@ static void PREFIX86(_adc_axd16)(void) /* Opcode 0x15 */ static void PREFIX86(_push_ss)(void) /* Opcode 0x16 */ { PUSH(I.sregs[SS]); - ICOUNT -= cycles.push_seg; + ICOUNT -= timing.push_seg; } static void PREFIX86(_pop_ss)(void) /* Opcode 0x17 */ @@ -799,14 +799,14 @@ static void PREFIX86(_pop_ss)(void) /* Opcode 0x17 */ POP(I.sregs[SS]); I.base[SS] = SegBase(SS); #endif - ICOUNT -= cycles.pop_seg; + ICOUNT -= timing.pop_seg; PREFIX(_instruction)[FETCHOP](); /* no interrupt before next instruction */ } static void PREFIX86(_sbb_br8)(void) /* Opcode 0x18 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; src+=CF; SUBB(dst,src); PutbackRMByte(ModRM,dst); @@ -815,7 +815,7 @@ static void PREFIX86(_sbb_br8)(void) /* Opcode 0x18 */ static void PREFIX86(_sbb_wr16)(void) /* Opcode 0x19 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; src+=CF; SUBW(dst,src); PutbackRMWord(ModRM,dst); @@ -824,7 +824,7 @@ static void PREFIX86(_sbb_wr16)(void) /* Opcode 0x19 */ static void PREFIX86(_sbb_r8b)(void) /* Opcode 0x1a */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; src+=CF; SUBB(dst,src); RegByte(ModRM)=dst; @@ -833,7 +833,7 @@ static void PREFIX86(_sbb_r8b)(void) /* Opcode 0x1a */ static void PREFIX86(_sbb_r16w)(void) /* Opcode 0x1b */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; src+=CF; SUBW(dst,src); RegWord(ModRM)= dst; @@ -842,7 +842,7 @@ static void PREFIX86(_sbb_r16w)(void) /* Opcode 0x1b */ static void PREFIX86(_sbb_ald8)(void) /* Opcode 0x1c */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; src+=CF; SUBB(dst,src); I.regs.b[AL] = dst; @@ -851,7 +851,7 @@ static void PREFIX86(_sbb_ald8)(void) /* Opcode 0x1c */ static void PREFIX86(_sbb_axd16)(void) /* Opcode 0x1d */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; src+=CF; SUBW(dst,src); I.regs.w[AX]=dst; @@ -860,7 +860,7 @@ static void PREFIX86(_sbb_axd16)(void) /* Opcode 0x1d */ static void PREFIX86(_push_ds)(void) /* Opcode 0x1e */ { PUSH(I.sregs[DS]); - ICOUNT -= cycles.push_seg; + ICOUNT -= timing.push_seg; } static void PREFIX86(_pop_ds)(void) /* Opcode 0x1f */ @@ -873,13 +873,13 @@ static void PREFIX86(_pop_ds)(void) /* Opcode 0x1f */ POP(I.sregs[DS]); I.base[DS] = SegBase(DS); #endif - ICOUNT -= cycles.push_seg; + ICOUNT -= timing.push_seg; } static void PREFIX86(_and_br8)(void) /* Opcode 0x20 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; ANDB(dst,src); PutbackRMByte(ModRM,dst); } @@ -887,7 +887,7 @@ static void PREFIX86(_and_br8)(void) /* Opcode 0x20 */ static void PREFIX86(_and_wr16)(void) /* Opcode 0x21 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; ANDW(dst,src); PutbackRMWord(ModRM,dst); } @@ -895,7 +895,7 @@ static void PREFIX86(_and_wr16)(void) /* Opcode 0x21 */ static void PREFIX86(_and_r8b)(void) /* Opcode 0x22 */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; ANDB(dst,src); RegByte(ModRM)=dst; } @@ -903,7 +903,7 @@ static void PREFIX86(_and_r8b)(void) /* Opcode 0x22 */ static void PREFIX86(_and_r16w)(void) /* Opcode 0x23 */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; ANDW(dst,src); RegWord(ModRM)=dst; } @@ -911,7 +911,7 @@ static void PREFIX86(_and_r16w)(void) /* Opcode 0x23 */ static void PREFIX86(_and_ald8)(void) /* Opcode 0x24 */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; ANDB(dst,src); I.regs.b[AL] = dst; } @@ -919,7 +919,7 @@ static void PREFIX86(_and_ald8)(void) /* Opcode 0x24 */ static void PREFIX86(_and_axd16)(void) /* Opcode 0x25 */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; ANDW(dst,src); I.regs.w[AX]=dst; } @@ -928,7 +928,7 @@ static void PREFIX86(_es)(void) /* Opcode 0x26 */ { seg_prefix=TRUE; prefix_base=I.base[ES]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(_instruction)[FETCHOP](); } @@ -949,13 +949,13 @@ static void PREFIX86(_daa)(void) /* Opcode 0x27 */ } SetSZPF_Byte(I.regs.b[AL]); - ICOUNT -= cycles.daa; + ICOUNT -= timing.daa; } static void PREFIX86(_sub_br8)(void) /* Opcode 0x28 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; SUBB(dst,src); PutbackRMByte(ModRM,dst); } @@ -963,7 +963,7 @@ static void PREFIX86(_sub_br8)(void) /* Opcode 0x28 */ static void PREFIX86(_sub_wr16)(void) /* Opcode 0x29 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; SUBW(dst,src); PutbackRMWord(ModRM,dst); } @@ -971,7 +971,7 @@ static void PREFIX86(_sub_wr16)(void) /* Opcode 0x29 */ static void PREFIX86(_sub_r8b)(void) /* Opcode 0x2a */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; SUBB(dst,src); RegByte(ModRM)=dst; } @@ -979,7 +979,7 @@ static void PREFIX86(_sub_r8b)(void) /* Opcode 0x2a */ static void PREFIX86(_sub_r16w)(void) /* Opcode 0x2b */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; SUBW(dst,src); RegWord(ModRM)=dst; } @@ -987,7 +987,7 @@ static void PREFIX86(_sub_r16w)(void) /* Opcode 0x2b */ static void PREFIX86(_sub_ald8)(void) /* Opcode 0x2c */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; SUBB(dst,src); I.regs.b[AL] = dst; } @@ -995,7 +995,7 @@ static void PREFIX86(_sub_ald8)(void) /* Opcode 0x2c */ static void PREFIX86(_sub_axd16)(void) /* Opcode 0x2d */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; SUBW(dst,src); I.regs.w[AX]=dst; } @@ -1004,7 +1004,7 @@ static void PREFIX86(_cs)(void) /* Opcode 0x2e */ { seg_prefix=TRUE; prefix_base=I.base[CS]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(_instruction)[FETCHOP](); } @@ -1026,13 +1026,13 @@ static void PREFIX86(_das)(void) /* Opcode 0x2f */ } SetSZPF_Byte(I.regs.b[AL]); - ICOUNT -= cycles.das; + ICOUNT -= timing.das; } static void PREFIX86(_xor_br8)(void) /* Opcode 0x30 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8; XORB(dst,src); PutbackRMByte(ModRM,dst); } @@ -1040,7 +1040,7 @@ static void PREFIX86(_xor_br8)(void) /* Opcode 0x30 */ static void PREFIX86(_xor_wr16)(void) /* Opcode 0x31 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16; XORW(dst,src); PutbackRMWord(ModRM,dst); } @@ -1048,7 +1048,7 @@ static void PREFIX86(_xor_wr16)(void) /* Opcode 0x31 */ static void PREFIX86(_xor_r8b)(void) /* Opcode 0x32 */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; XORB(dst,src); RegByte(ModRM)=dst; } @@ -1056,7 +1056,7 @@ static void PREFIX86(_xor_r8b)(void) /* Opcode 0x32 */ static void PREFIX86(_xor_r16w)(void) /* Opcode 0x33 */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; XORW(dst,src); RegWord(ModRM)=dst; } @@ -1064,7 +1064,7 @@ static void PREFIX86(_xor_r16w)(void) /* Opcode 0x33 */ static void PREFIX86(_xor_ald8)(void) /* Opcode 0x34 */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; XORB(dst,src); I.regs.b[AL] = dst; } @@ -1072,7 +1072,7 @@ static void PREFIX86(_xor_ald8)(void) /* Opcode 0x34 */ static void PREFIX86(_xor_axd16)(void) /* Opcode 0x35 */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; XORW(dst,src); I.regs.w[AX]=dst; } @@ -1081,7 +1081,7 @@ static void PREFIX86(_ss)(void) /* Opcode 0x36 */ { seg_prefix=TRUE; prefix_base=I.base[SS]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(_instruction)[FETCHOP](); } @@ -1103,48 +1103,48 @@ static void PREFIX86(_aaa)(void) /* Opcode 0x37 */ I.CarryVal = 0; } I.regs.b[AL] &= 0x0F; - ICOUNT -= cycles.aaa; + ICOUNT -= timing.aaa; } static void PREFIX86(_cmp_br8)(void) /* Opcode 0x38 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; SUBB(dst,src); } static void PREFIX86(_cmp_wr16)(void) /* Opcode 0x39 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; SUBW(dst,src); } static void PREFIX86(_cmp_r8b)(void) /* Opcode 0x3a */ { DEF_r8b(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; SUBB(dst,src); } static void PREFIX86(_cmp_r16w)(void) /* Opcode 0x3b */ { DEF_r16w(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; SUBW(dst,src); } static void PREFIX86(_cmp_ald8)(void) /* Opcode 0x3c */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; SUBB(dst,src); } static void PREFIX86(_cmp_axd16)(void) /* Opcode 0x3d */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; SUBW(dst,src); } @@ -1152,7 +1152,7 @@ static void PREFIX86(_ds)(void) /* Opcode 0x3e */ { seg_prefix=TRUE; prefix_base=I.base[DS]; - ICOUNT -= cycles.override; + ICOUNT -= timing.override; PREFIX(_instruction)[FETCHOP](); } @@ -1174,7 +1174,7 @@ static void PREFIX86(_aas)(void) /* Opcode 0x3f */ I.CarryVal = 0; } I.regs.b[AL] &= 0x0F; - ICOUNT -= cycles.aas; + ICOUNT -= timing.aas; } #define IncWordReg(Reg) \ @@ -1185,7 +1185,7 @@ static void PREFIX86(_aas)(void) /* Opcode 0x3f */ SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ I.regs.w[Reg]=tmp1; \ - ICOUNT -= cycles.incdec_r16; \ + ICOUNT -= timing.incdec_r16; \ } static void PREFIX86(_inc_ax)(void) /* Opcode 0x40 */ @@ -1236,7 +1236,7 @@ static void PREFIX86(_inc_di)(void) /* Opcode 0x47 */ SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ I.regs.w[Reg]=tmp1; \ - ICOUNT -= cycles.incdec_r16; \ + ICOUNT -= timing.incdec_r16; \ } static void PREFIX86(_dec_ax)(void) /* Opcode 0x48 */ @@ -1281,98 +1281,98 @@ static void PREFIX86(_dec_di)(void) /* Opcode 0x4f */ static void PREFIX86(_push_ax)(void) /* Opcode 0x50 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[AX]); } static void PREFIX86(_push_cx)(void) /* Opcode 0x51 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[CX]); } static void PREFIX86(_push_dx)(void) /* Opcode 0x52 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[DX]); } static void PREFIX86(_push_bx)(void) /* Opcode 0x53 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[BX]); } static void PREFIX86(_push_sp)(void) /* Opcode 0x54 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[SP]); } static void PREFIX86(_push_bp)(void) /* Opcode 0x55 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[BP]); } static void PREFIX86(_push_si)(void) /* Opcode 0x56 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[SI]); } static void PREFIX86(_push_di)(void) /* Opcode 0x57 */ { - ICOUNT -= cycles.push_r16; + ICOUNT -= timing.push_r16; PUSH(I.regs.w[DI]); } static void PREFIX86(_pop_ax)(void) /* Opcode 0x58 */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[AX]); } static void PREFIX86(_pop_cx)(void) /* Opcode 0x59 */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[CX]); } static void PREFIX86(_pop_dx)(void) /* Opcode 0x5a */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[DX]); } static void PREFIX86(_pop_bx)(void) /* Opcode 0x5b */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[BX]); } static void PREFIX86(_pop_sp)(void) /* Opcode 0x5c */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[SP]); } static void PREFIX86(_pop_bp)(void) /* Opcode 0x5d */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[BP]); } static void PREFIX86(_pop_si)(void) /* Opcode 0x5e */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[SI]); } static void PREFIX86(_pop_di)(void) /* Opcode 0x5f */ { - ICOUNT -= cycles.pop_r16; + ICOUNT -= timing.pop_r16; POP(I.regs.w[DI]); } @@ -1382,10 +1382,10 @@ static void PREFIX86(_jo)(void) /* Opcode 0x70 */ if (OF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jno)(void) /* Opcode 0x71 */ @@ -1393,10 +1393,10 @@ static void PREFIX86(_jno)(void) /* Opcode 0x71 */ int tmp = (int)((INT8)FETCH); if (!OF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jb)(void) /* Opcode 0x72 */ @@ -1404,10 +1404,10 @@ static void PREFIX86(_jb)(void) /* Opcode 0x72 */ int tmp = (int)((INT8)FETCH); if (CF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jnb)(void) /* Opcode 0x73 */ @@ -1415,10 +1415,10 @@ static void PREFIX86(_jnb)(void) /* Opcode 0x73 */ int tmp = (int)((INT8)FETCH); if (!CF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jz)(void) /* Opcode 0x74 */ @@ -1426,10 +1426,10 @@ static void PREFIX86(_jz)(void) /* Opcode 0x74 */ int tmp = (int)((INT8)FETCH); if (ZF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jnz)(void) /* Opcode 0x75 */ @@ -1437,10 +1437,10 @@ static void PREFIX86(_jnz)(void) /* Opcode 0x75 */ int tmp = (int)((INT8)FETCH); if (!ZF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jbe)(void) /* Opcode 0x76 */ @@ -1448,10 +1448,10 @@ static void PREFIX86(_jbe)(void) /* Opcode 0x76 */ int tmp = (int)((INT8)FETCH); if (CF || ZF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jnbe)(void) /* Opcode 0x77 */ @@ -1459,10 +1459,10 @@ static void PREFIX86(_jnbe)(void) /* Opcode 0x77 */ int tmp = (int)((INT8)FETCH); if (!(CF || ZF)) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_js)(void) /* Opcode 0x78 */ @@ -1470,10 +1470,10 @@ static void PREFIX86(_js)(void) /* Opcode 0x78 */ int tmp = (int)((INT8)FETCH); if (SF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jns)(void) /* Opcode 0x79 */ @@ -1481,10 +1481,10 @@ static void PREFIX86(_jns)(void) /* Opcode 0x79 */ int tmp = (int)((INT8)FETCH); if (!SF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jp)(void) /* Opcode 0x7a */ @@ -1492,10 +1492,10 @@ static void PREFIX86(_jp)(void) /* Opcode 0x7a */ int tmp = (int)((INT8)FETCH); if (PF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jnp)(void) /* Opcode 0x7b */ @@ -1503,10 +1503,10 @@ static void PREFIX86(_jnp)(void) /* Opcode 0x7b */ int tmp = (int)((INT8)FETCH); if (!PF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jl)(void) /* Opcode 0x7c */ @@ -1514,10 +1514,10 @@ static void PREFIX86(_jl)(void) /* Opcode 0x7c */ int tmp = (int)((INT8)FETCH); if ((SF!=OF)&&!ZF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jnl)(void) /* Opcode 0x7d */ @@ -1525,10 +1525,10 @@ static void PREFIX86(_jnl)(void) /* Opcode 0x7d */ int tmp = (int)((INT8)FETCH); if (ZF||(SF==OF)) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jle)(void) /* Opcode 0x7e */ @@ -1536,10 +1536,10 @@ static void PREFIX86(_jle)(void) /* Opcode 0x7e */ int tmp = (int)((INT8)FETCH); if (ZF||(SF!=OF)) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_jnle)(void) /* Opcode 0x7f */ @@ -1547,10 +1547,10 @@ static void PREFIX86(_jnle)(void) /* Opcode 0x7f */ int tmp = (int)((INT8)FETCH); if ((SF==OF)&&!ZF) { I.pc += tmp; - ICOUNT -= cycles.jcc_t; + ICOUNT -= timing.jcc_t; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.jcc_nt; + } else ICOUNT -= timing.jcc_nt; } static void PREFIX86(_80pre)(void) /* Opcode 0x80 */ @@ -1564,43 +1564,43 @@ static void PREFIX86(_80pre)(void) /* Opcode 0x80 */ case 0x00: /* ADD eb,d8 */ ADDB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x08: /* OR eb,d8 */ ORB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x10: /* ADC eb,d8 */ src+=CF; ADDB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x18: /* SBB eb,b8 */ src+=CF; SUBB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x20: /* AND eb,d8 */ ANDB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x28: /* SUB eb,d8 */ SUBB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x30: /* XOR eb,d8 */ XORB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x38: /* CMP eb,d8 */ SUBB(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8_ro; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro; break; } } @@ -1618,43 +1618,43 @@ static void PREFIX86(_81pre)(void) /* Opcode 0x81 */ case 0x00: /* ADD ew,d16 */ ADDW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x08: /* OR ew,d16 */ ORW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x10: /* ADC ew,d16 */ src+=CF; ADDW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x18: /* SBB ew,d16 */ src+=CF; SUBW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x20: /* AND ew,d16 */ ANDW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x28: /* SUB ew,d16 */ SUBW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x30: /* XOR ew,d16 */ XORW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16; break; case 0x38: /* CMP ew,d16 */ SUBW(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16_ro; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16_ro; break; } } @@ -1670,43 +1670,43 @@ static void PREFIX86(_82pre)(void) /* Opcode 0x82 */ case 0x00: /* ADD eb,d8 */ ADDB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x08: /* OR eb,d8 */ ORB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x10: /* ADC eb,d8 */ src+=CF; ADDB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x18: /* SBB eb,d8 */ src+=CF; SUBB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x20: /* AND eb,d8 */ ANDB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x28: /* SUB eb,d8 */ SUBB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x30: /* XOR eb,d8 */ XORB(dst,src); PutbackRMByte(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8; break; case 0x38: /* CMP eb,d8 */ SUBB(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8_ro; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro; break; } } @@ -1722,43 +1722,43 @@ static void PREFIX86(_83pre)(void) /* Opcode 0x83 */ case 0x00: /* ADD ew,d16 */ ADDW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x08: /* OR ew,d16 */ ORW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x10: /* ADC ew,d16 */ src+=CF; ADDW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x18: /* SBB ew,d16 */ src+=CF; SUBW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x20: /* AND ew,d16 */ ANDW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x28: /* SUB ew,d16 */ SUBW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x30: /* XOR ew,d16 */ XORW(dst,src); PutbackRMWord(ModRM,dst); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8; break; case 0x38: /* CMP ew,d16 */ SUBW(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_r16i8 : cycles.alu_m16i8_ro; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8_ro; break; } } @@ -1766,21 +1766,21 @@ static void PREFIX86(_83pre)(void) /* Opcode 0x83 */ static void PREFIX86(_test_br8)(void) /* Opcode 0x84 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr8 : cycles.alu_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8; ANDB(dst,src); } static void PREFIX86(_test_wr16)(void) /* Opcode 0x85 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_rr16 : cycles.alu_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16; ANDW(dst,src); } static void PREFIX86(_xchg_br8)(void) /* Opcode 0x86 */ { DEF_br8(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.xchg_rr8 : cycles.xchg_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.xchg_rr8 : timing.xchg_rm8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); } @@ -1788,7 +1788,7 @@ static void PREFIX86(_xchg_br8)(void) /* Opcode 0x86 */ static void PREFIX86(_xchg_wr16)(void) /* Opcode 0x87 */ { DEF_wr16(dst,src); - ICOUNT -= (ModRM >= 0xc0) ? cycles.xchg_rr16 : cycles.xchg_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.xchg_rr16 : timing.xchg_rm16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); } @@ -1797,7 +1797,7 @@ static void PREFIX86(_mov_br8)(void) /* Opcode 0x88 */ { unsigned ModRM = FETCH; BYTE src = RegByte(ModRM); - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_rr8 : cycles.mov_mr8; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_mr8; PutRMByte(ModRM,src); } @@ -1805,7 +1805,7 @@ static void PREFIX86(_mov_wr16)(void) /* Opcode 0x89 */ { unsigned ModRM = FETCH; WORD src = RegWord(ModRM); - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_rr16 : cycles.mov_mr16; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr16 : timing.mov_mr16; PutRMWord(ModRM,src); } @@ -1813,7 +1813,7 @@ static void PREFIX86(_mov_r8b)(void) /* Opcode 0x8a */ { unsigned ModRM = FETCH; BYTE src = GetRMByte(ModRM); - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_rr8 : cycles.mov_rm8; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_rm8; RegByte(ModRM)=src; } @@ -1821,14 +1821,14 @@ static void PREFIX86(_mov_r16w)(void) /* Opcode 0x8b */ { unsigned ModRM = FETCH; WORD src = GetRMWord(ModRM); - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_rr8 : cycles.mov_rm16; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_rm16; RegWord(ModRM)=src; } static void PREFIX86(_mov_wsreg)(void) /* Opcode 0x8c */ { unsigned ModRM = FETCH; - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_rs : cycles.mov_ms; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rs : timing.mov_ms; #ifdef I80286 if (ModRM & 0x20) { /* HJB 12/13/98 1xx is invalid */ i80286_trap2(ILLEGAL_INSTRUCTION); @@ -1843,7 +1843,7 @@ static void PREFIX86(_mov_wsreg)(void) /* Opcode 0x8c */ static void PREFIX86(_lea)(void) /* Opcode 0x8d */ { unsigned ModRM = FETCH; - ICOUNT -= cycles.lea; + ICOUNT -= timing.lea; (void)(*GetEA[ModRM])(); RegWord(ModRM)=EO; /* HJB 12/13/98 effective offset (no segment part) */ } @@ -1853,7 +1853,7 @@ static void PREFIX86(_mov_sregw)(void) /* Opcode 0x8e */ unsigned ModRM = FETCH; WORD src = GetRMWord(ModRM); - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_sr : cycles.mov_sm; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_sr : timing.mov_sm; #ifdef I80286 switch (ModRM & 0x38) { @@ -1897,7 +1897,7 @@ static void PREFIX86(_popw)(void) /* Opcode 0x8f */ unsigned ModRM = FETCH; WORD tmp; POP(tmp); - ICOUNT -= (ModRM >= 0xc0) ? cycles.pop_r16 : cycles.pop_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.pop_r16 : timing.pop_m16; PutRMWord(ModRM,tmp); } @@ -1908,14 +1908,14 @@ static void PREFIX86(_popw)(void) /* Opcode 0x8f */ tmp = I.regs.w[Reg]; \ I.regs.w[Reg] = I.regs.w[AX]; \ I.regs.w[AX] = tmp; \ - ICOUNT -= cycles.xchg_ar16; \ + ICOUNT -= timing.xchg_ar16; \ } static void PREFIX86(_nop)(void) /* Opcode 0x90 */ { /* this is XchgAXReg(AX); */ - ICOUNT -= cycles.nop; + ICOUNT -= timing.nop; } static void PREFIX86(_xchg_axcx)(void) /* Opcode 0x91 */ @@ -1955,13 +1955,13 @@ static void PREFIX86(_xchg_axdi)(void) /* Opcode 0x97 */ static void PREFIX86(_cbw)(void) /* Opcode 0x98 */ { - ICOUNT -= cycles.cbw; + ICOUNT -= timing.cbw; I.regs.b[AH] = (I.regs.b[AL] & 0x80) ? 0xff : 0; } static void PREFIX86(_cwd)(void) /* Opcode 0x99 */ { - ICOUNT -= cycles.cwd; + ICOUNT -= timing.cwd; I.regs.w[DX] = (I.regs.b[AH] & 0x80) ? 0xffff : 0; } @@ -1987,7 +1987,7 @@ static void PREFIX86(_call_far)(void) I.base[CS] = SegBase(CS); I.pc = (I.base[CS] + (WORD)tmp) & AMASK; #endif - ICOUNT -= cycles.call_far; + ICOUNT -= timing.call_far; CHANGE_PC(I.pc); } @@ -1999,13 +1999,13 @@ static void PREFIX86(_wait)(void) /* Opcode 0x9b */ I.pc--; } else - ICOUNT -= cycles.wait; + ICOUNT -= timing.wait; } static void PREFIX86(_pushf)(void) /* Opcode 0x9c */ { unsigned tmp; - ICOUNT -= cycles.pushf; + ICOUNT -= timing.pushf; tmp = CompressFlags(); #ifdef I80286 @@ -2019,7 +2019,7 @@ static void PREFIX86(_popf)(void) /* Opcode 0x9d */ { unsigned tmp; POP(tmp); - ICOUNT -= cycles.popf; + ICOUNT -= timing.popf; ExpandFlags(tmp); if (I.TF) PREFIX(_trap)(); @@ -2032,14 +2032,14 @@ static void PREFIX86(_popf)(void) /* Opcode 0x9d */ static void PREFIX86(_sahf)(void) /* Opcode 0x9e */ { unsigned tmp = (CompressFlags() & 0xff00) | (I.regs.b[AH] & 0xd5); - ICOUNT -= cycles.sahf; + ICOUNT -= timing.sahf; ExpandFlags(tmp); } static void PREFIX86(_lahf)(void) /* Opcode 0x9f */ { I.regs.b[AH] = CompressFlags() & 0xff; - ICOUNT -= cycles.lahf; + ICOUNT -= timing.lahf; } @@ -2050,7 +2050,7 @@ static void PREFIX86(_mov_aldisp)(void) /* Opcode 0xa0 */ addr = FETCH; addr += FETCH << 8; - ICOUNT -= cycles.mov_am8; + ICOUNT -= timing.mov_am8; I.regs.b[AL] = GetMemB(DS, addr); } @@ -2061,7 +2061,7 @@ static void PREFIX86(_mov_axdisp)(void) /* Opcode 0xa1 */ addr = FETCH; addr += FETCH << 8; - ICOUNT -= cycles.mov_am16; + ICOUNT -= timing.mov_am16; I.regs.w[AX] = GetMemW(DS, addr); } @@ -2072,7 +2072,7 @@ static void PREFIX86(_mov_dispal)(void) /* Opcode 0xa2 */ addr = FETCH; addr += FETCH << 8; - ICOUNT -= cycles.mov_ma8; + ICOUNT -= timing.mov_ma8; PutMemB(DS, addr, I.regs.b[AL]); } @@ -2083,7 +2083,7 @@ static void PREFIX86(_mov_dispax)(void) /* Opcode 0xa3 */ addr = FETCH; addr += FETCH << 8; - ICOUNT -= cycles.mov_ma16; + ICOUNT -= timing.mov_ma16; PutMemW(DS, addr, I.regs.w[AX]); } @@ -2093,7 +2093,7 @@ static void PREFIX86(_movsb)(void) /* Opcode 0xa4 */ PutMemB(ES,I.regs.w[DI], tmp); I.regs.w[DI] += I.DirVal; I.regs.w[SI] += I.DirVal; - ICOUNT -= cycles.movs8; + ICOUNT -= timing.movs8; } static void PREFIX86(_movsw)(void) /* Opcode 0xa5 */ @@ -2102,7 +2102,7 @@ static void PREFIX86(_movsw)(void) /* Opcode 0xa5 */ PutMemW(ES,I.regs.w[DI], tmp); I.regs.w[DI] += 2 * I.DirVal; I.regs.w[SI] += 2 * I.DirVal; - ICOUNT -= cycles.movs16; + ICOUNT -= timing.movs16; } static void PREFIX86(_cmpsb)(void) /* Opcode 0xa6 */ @@ -2112,7 +2112,7 @@ static void PREFIX86(_cmpsb)(void) /* Opcode 0xa6 */ SUBB(src,dst); /* opposite of the usual convention */ I.regs.w[DI] += I.DirVal; I.regs.w[SI] += I.DirVal; - ICOUNT -= cycles.cmps8; + ICOUNT -= timing.cmps8; } static void PREFIX86(_cmpsw)(void) /* Opcode 0xa7 */ @@ -2122,20 +2122,20 @@ static void PREFIX86(_cmpsw)(void) /* Opcode 0xa7 */ SUBW(src,dst); /* opposite of the usual convention */ I.regs.w[DI] += 2 * I.DirVal; I.regs.w[SI] += 2 * I.DirVal; - ICOUNT -= cycles.cmps16; + ICOUNT -= timing.cmps16; } static void PREFIX86(_test_ald8)(void) /* Opcode 0xa8 */ { DEF_ald8(dst,src); - ICOUNT -= cycles.alu_ri8; + ICOUNT -= timing.alu_ri8; ANDB(dst,src); } static void PREFIX86(_test_axd16)(void) /* Opcode 0xa9 */ { DEF_axd16(dst,src); - ICOUNT -= cycles.alu_ri16; + ICOUNT -= timing.alu_ri16; ANDW(dst,src); } @@ -2143,28 +2143,28 @@ static void PREFIX86(_stosb)(void) /* Opcode 0xaa */ { PutMemB(ES,I.regs.w[DI],I.regs.b[AL]); I.regs.w[DI] += I.DirVal; - ICOUNT -= cycles.stos8; + ICOUNT -= timing.stos8; } static void PREFIX86(_stosw)(void) /* Opcode 0xab */ { PutMemW(ES,I.regs.w[DI],I.regs.w[AX]); I.regs.w[DI] += 2 * I.DirVal; - ICOUNT -= cycles.stos16; + ICOUNT -= timing.stos16; } static void PREFIX86(_lodsb)(void) /* Opcode 0xac */ { I.regs.b[AL] = GetMemB(DS,I.regs.w[SI]); I.regs.w[SI] += I.DirVal; - ICOUNT -= cycles.lods8; + ICOUNT -= timing.lods8; } static void PREFIX86(_lodsw)(void) /* Opcode 0xad */ { I.regs.w[AX] = GetMemW(DS,I.regs.w[SI]); I.regs.w[SI] += 2 * I.DirVal; - ICOUNT -= cycles.lods16; + ICOUNT -= timing.lods16; } static void PREFIX86(_scasb)(void) /* Opcode 0xae */ @@ -2173,7 +2173,7 @@ static void PREFIX86(_scasb)(void) /* Opcode 0xae */ unsigned dst = I.regs.b[AL]; SUBB(dst,src); I.regs.w[DI] += I.DirVal; - ICOUNT -= cycles.scas8; + ICOUNT -= timing.scas8; } static void PREFIX86(_scasw)(void) /* Opcode 0xaf */ @@ -2182,111 +2182,111 @@ static void PREFIX86(_scasw)(void) /* Opcode 0xaf */ unsigned dst = I.regs.w[AX]; SUBW(dst,src); I.regs.w[DI] += 2 * I.DirVal; - ICOUNT -= cycles.scas16; + ICOUNT -= timing.scas16; } static void PREFIX86(_mov_ald8)(void) /* Opcode 0xb0 */ { I.regs.b[AL] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_cld8)(void) /* Opcode 0xb1 */ { I.regs.b[CL] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_dld8)(void) /* Opcode 0xb2 */ { I.regs.b[DL] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_bld8)(void) /* Opcode 0xb3 */ { I.regs.b[BL] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_ahd8)(void) /* Opcode 0xb4 */ { I.regs.b[AH] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_chd8)(void) /* Opcode 0xb5 */ { I.regs.b[CH] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_dhd8)(void) /* Opcode 0xb6 */ { I.regs.b[DH] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_bhd8)(void) /* Opcode 0xb7 */ { I.regs.b[BH] = FETCH; - ICOUNT -= cycles.mov_ri8; + ICOUNT -= timing.mov_ri8; } static void PREFIX86(_mov_axd16)(void) /* Opcode 0xb8 */ { I.regs.b[AL] = FETCH; I.regs.b[AH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_cxd16)(void) /* Opcode 0xb9 */ { I.regs.b[CL] = FETCH; I.regs.b[CH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_dxd16)(void) /* Opcode 0xba */ { I.regs.b[DL] = FETCH; I.regs.b[DH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_bxd16)(void) /* Opcode 0xbb */ { I.regs.b[BL] = FETCH; I.regs.b[BH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_spd16)(void) /* Opcode 0xbc */ { I.regs.b[SPL] = FETCH; I.regs.b[SPH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_bpd16)(void) /* Opcode 0xbd */ { I.regs.b[BPL] = FETCH; I.regs.b[BPH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_sid16)(void) /* Opcode 0xbe */ { I.regs.b[SIL] = FETCH; I.regs.b[SIH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_mov_did16)(void) /* Opcode 0xbf */ { I.regs.b[DIL] = FETCH; I.regs.b[DIH] = FETCH; - ICOUNT -= cycles.mov_ri16; + ICOUNT -= timing.mov_ri16; } static void PREFIX86(_ret_d16)(void) /* Opcode 0xc2 */ @@ -2296,7 +2296,7 @@ static void PREFIX86(_ret_d16)(void) /* Opcode 0xc2 */ POP(I.pc); I.pc = (I.pc + I.base[CS]) & AMASK; I.regs.w[SP]+=count; - ICOUNT -= cycles.ret_near_imm; + ICOUNT -= timing.ret_near_imm; CHANGE_PC(I.pc); } @@ -2304,7 +2304,7 @@ static void PREFIX86(_ret)(void) /* Opcode 0xc3 */ { POP(I.pc); I.pc = (I.pc + I.base[CS]) & AMASK; - ICOUNT -= cycles.ret_near; + ICOUNT -= timing.ret_near; CHANGE_PC(I.pc); } @@ -2320,7 +2320,7 @@ static void PREFIX86(_les_dw)(void) /* Opcode 0xc4 */ I.sregs[ES] = GetnextRMWord; I.base[ES] = SegBase(ES); #endif - ICOUNT -= cycles.load_ptr; + ICOUNT -= timing.load_ptr; } static void PREFIX86(_lds_dw)(void) /* Opcode 0xc5 */ @@ -2335,20 +2335,20 @@ static void PREFIX86(_lds_dw)(void) /* Opcode 0xc5 */ I.sregs[DS] = GetnextRMWord; I.base[DS] = SegBase(DS); #endif - ICOUNT -= cycles.load_ptr; + ICOUNT -= timing.load_ptr; } static void PREFIX86(_mov_bd8)(void) /* Opcode 0xc6 */ { unsigned ModRM = FETCH; - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_ri8 : cycles.mov_mi8; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_ri8 : timing.mov_mi8; PutImmRMByte(ModRM); } static void PREFIX86(_mov_wd16)(void) /* Opcode 0xc7 */ { unsigned ModRM = FETCH; - ICOUNT -= (ModRM >= 0xc0) ? cycles.mov_ri16 : cycles.mov_mi16; + ICOUNT -= (ModRM >= 0xc0) ? timing.mov_ri16 : timing.mov_mi16; PutImmRMWord(ModRM); } @@ -2371,7 +2371,7 @@ static void PREFIX86(_retf_d16)(void) /* Opcode 0xca */ I.pc = (I.pc + I.base[CS]) & AMASK; #endif I.regs.w[SP]+=count; - ICOUNT -= cycles.ret_far_imm; + ICOUNT -= timing.ret_far_imm; CHANGE_PC(I.pc); } @@ -2390,34 +2390,34 @@ static void PREFIX86(_retf)(void) /* Opcode 0xcb */ I.base[CS] = SegBase(CS); I.pc = (I.pc + I.base[CS]) & AMASK; #endif - ICOUNT -= cycles.ret_far; + ICOUNT -= timing.ret_far; CHANGE_PC(I.pc); } static void PREFIX86(_int3)(void) /* Opcode 0xcc */ { - ICOUNT -= cycles.int3; + ICOUNT -= timing.int3; PREFIX(_interrupt)(3); } static void PREFIX86(_int)(void) /* Opcode 0xcd */ { unsigned int_num = FETCH; - ICOUNT -= cycles.int_imm; + ICOUNT -= timing.int_imm; PREFIX(_interrupt)(int_num); } static void PREFIX86(_into)(void) /* Opcode 0xce */ { if (OF) { - ICOUNT -= cycles.into_t; + ICOUNT -= timing.into_t; PREFIX(_interrupt)(4); - } else ICOUNT -= cycles.into_nt; + } else ICOUNT -= timing.into_nt; } static void PREFIX86(_iret)(void) /* Opcode 0xcf */ { - ICOUNT -= cycles.iret; + ICOUNT -= timing.iret; #ifdef I80286 { int tmp, tmp2; @@ -2468,7 +2468,7 @@ static void PREFIX86(_aam)(void) /* Opcode 0xd4 */ { unsigned mult = FETCH; - ICOUNT -= cycles.aam; + ICOUNT -= timing.aam; if (mult == 0) PREFIX(_interrupt)(0); else @@ -2484,7 +2484,7 @@ static void PREFIX86(_aad)(void) /* Opcode 0xd5 */ { unsigned mult = FETCH; - ICOUNT -= cycles.aad; + ICOUNT -= timing.aad; I.regs.b[AL] = I.regs.b[AH] * mult + I.regs.b[AL]; I.regs.b[AH] = 0; @@ -2499,14 +2499,14 @@ static void PREFIX86(_xlat)(void) /* Opcode 0xd7 */ { unsigned dest = I.regs.w[BX]+I.regs.b[AL]; - ICOUNT -= cycles.xlat; + ICOUNT -= timing.xlat; I.regs.b[AL] = GetMemB(DS, dest); } static void PREFIX86(_escape)(void) /* Opcodes 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde and 0xdf */ { unsigned ModRM = FETCH; - ICOUNT -= cycles.nop; + ICOUNT -= timing.nop; GetRMByte(ModRM); } @@ -2518,11 +2518,11 @@ static void PREFIX86(_loopne)(void) /* Opcode 0xe0 */ I.regs.w[CX]=tmp; if (!ZF && tmp) { - ICOUNT -= cycles.loop_t; + ICOUNT -= timing.loop_t; I.pc += disp; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.loop_nt; + } else ICOUNT -= timing.loop_nt; } static void PREFIX86(_loope)(void) /* Opcode 0xe1 */ @@ -2533,11 +2533,11 @@ static void PREFIX86(_loope)(void) /* Opcode 0xe1 */ I.regs.w[CX]=tmp; if (ZF && tmp) { - ICOUNT -= cycles.loope_t; + ICOUNT -= timing.loope_t; I.pc += disp; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.loope_nt; + } else ICOUNT -= timing.loope_nt; } static void PREFIX86(_loop)(void) /* Opcode 0xe2 */ @@ -2548,11 +2548,11 @@ static void PREFIX86(_loop)(void) /* Opcode 0xe2 */ I.regs.w[CX]=tmp; if (tmp) { - ICOUNT -= cycles.loop_t; + ICOUNT -= timing.loop_t; I.pc += disp; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - } else ICOUNT -= cycles.loop_nt; + } else ICOUNT -= timing.loop_nt; } static void PREFIX86(_jcxz)(void) /* Opcode 0xe3 */ @@ -2560,19 +2560,19 @@ static void PREFIX86(_jcxz)(void) /* Opcode 0xe3 */ int disp = (int)((INT8)FETCH); if (I.regs.w[CX] == 0) { - ICOUNT -= cycles.jcxz_t; + ICOUNT -= timing.jcxz_t; I.pc += disp; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ } else - ICOUNT -= cycles.jcxz_nt; + ICOUNT -= timing.jcxz_nt; } static void PREFIX86(_inal)(void) /* Opcode 0xe4 */ { unsigned port = FETCH; - ICOUNT -= cycles.in_imm8; + ICOUNT -= timing.in_imm8; I.regs.b[AL] = read_port_byte(port); } @@ -2580,7 +2580,7 @@ static void PREFIX86(_inax)(void) /* Opcode 0xe5 */ { unsigned port = FETCH; - ICOUNT -= cycles.in_imm16; + ICOUNT -= timing.in_imm16; I.regs.w[AX] = read_port_word(port); } @@ -2588,7 +2588,7 @@ static void PREFIX86(_outal)(void) /* Opcode 0xe6 */ { unsigned port = FETCH; - ICOUNT -= cycles.out_imm8; + ICOUNT -= timing.out_imm8; write_port_byte(port, I.regs.b[AL]); } @@ -2596,7 +2596,7 @@ static void PREFIX86(_outax)(void) /* Opcode 0xe7 */ { unsigned port = FETCH; - ICOUNT -= cycles.out_imm16; + ICOUNT -= timing.out_imm16; write_port_word(port, I.regs.w[AX]); } @@ -2609,7 +2609,7 @@ static void PREFIX86(_call_d16)(void) /* Opcode 0xe8 */ PUSH(ip); ip += tmp; I.pc = (ip + I.base[CS]) & AMASK; - ICOUNT -= cycles.call_near; + ICOUNT -= timing.call_near; CHANGE_PC(I.pc); } @@ -2620,7 +2620,7 @@ static void PREFIX86(_jmp_d16)(void) /* Opcode 0xe9 */ FETCHWORD(tmp); ip = I.pc - I.base[CS] + tmp; I.pc = (ip + I.base[CS]) & AMASK; - ICOUNT -= cycles.jmp_near; + ICOUNT -= timing.jmp_near; CHANGE_PC(I.pc); } @@ -2641,7 +2641,7 @@ static void PREFIX86(_jmp_far)(void) /* Opcode 0xea */ I.base[CS] = SegBase(CS); I.pc = (I.base[CS] + tmp) & AMASK; #endif - ICOUNT -= cycles.jmp_far; + ICOUNT -= timing.jmp_far; CHANGE_PC(I.pc); } @@ -2651,12 +2651,12 @@ static void PREFIX86(_jmp_d8)(void) /* Opcode 0xeb */ I.pc += tmp; /* ASG - can probably assume this is safe CHANGE_PC(I.pc);*/ - ICOUNT -= cycles.jmp_short; + ICOUNT -= timing.jmp_short; } static void PREFIX86(_inaldx)(void) /* Opcode 0xec */ { - ICOUNT -= cycles.in_dx8; + ICOUNT -= timing.in_dx8; I.regs.b[AL] = read_port_byte(I.regs.w[DX]); } @@ -2664,13 +2664,13 @@ static void PREFIX86(_inaxdx)(void) /* Opcode 0xed */ { unsigned port = I.regs.w[DX]; - ICOUNT -= cycles.in_dx16; + ICOUNT -= timing.in_dx16; I.regs.w[AX] = read_port_word(port); } static void PREFIX86(_outdxal)(void) /* Opcode 0xee */ { - ICOUNT -= cycles.out_dx8; + ICOUNT -= timing.out_dx8; write_port_byte(I.regs.w[DX], I.regs.b[AL]); } @@ -2678,14 +2678,14 @@ static void PREFIX86(_outdxax)(void) /* Opcode 0xef */ { unsigned port = I.regs.w[DX]; - ICOUNT -= cycles.out_dx16; + ICOUNT -= timing.out_dx16; write_port_word(port, I.regs.w[AX]); } /* I think thats not a V20 instruction...*/ static void PREFIX86(_lock)(void) /* Opcode 0xf0 */ { - ICOUNT -= cycles.nop; + ICOUNT -= timing.nop; PREFIX(_instruction)[FETCHOP](); /* un-interruptible */ } #endif @@ -2709,7 +2709,7 @@ static void PREFIX86(_hlt)(void) /* Opcode 0xf4 */ static void PREFIX86(_cmc)(void) /* Opcode 0xf5 */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; I.CarryVal = !CF; } @@ -2725,7 +2725,7 @@ static void PREFIX86(_f6pre)(void) { case 0x00: /* TEST Eb, data8 */ case 0x08: /* ??? */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri8 : cycles.alu_mi8_ro; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro; tmp &= FETCH; I.CarryVal = I.OverVal = I.AuxVal = 0; @@ -2733,18 +2733,18 @@ static void PREFIX86(_f6pre)(void) break; case 0x10: /* NOT Eb */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.negnot_r8 : cycles.negnot_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r8 : timing.negnot_m8; PutbackRMByte(ModRM,~tmp); break; case 0x18: /* NEG Eb */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.negnot_r8 : cycles.negnot_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r8 : timing.negnot_m8; tmp2=0; SUBB(tmp2,tmp); PutbackRMByte(ModRM,tmp2); break; case 0x20: /* MUL AL, Eb */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.mul_r8 : cycles.mul_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.mul_r8 : timing.mul_m8; { UINT16 result; tmp2 = I.regs.b[AL]; @@ -2760,7 +2760,7 @@ static void PREFIX86(_f6pre)(void) } break; case 0x28: /* IMUL AL, Eb */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.imul_r8 : cycles.imul_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.imul_r8 : timing.imul_m8; { INT16 result; @@ -2778,7 +2778,7 @@ static void PREFIX86(_f6pre)(void) } break; case 0x30: /* DIV AL, Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.div_r8 : cycles.div_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.div_r8 : timing.div_m8; { UINT16 result; @@ -2805,7 +2805,7 @@ static void PREFIX86(_f6pre)(void) } break; case 0x38: /* IDIV AL, Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.idiv_r8 : cycles.idiv_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.idiv_r8 : timing.idiv_m8; { INT16 result; @@ -2850,7 +2850,7 @@ static void PREFIX86(_f7pre)(void) { case 0x00: /* TEST Ew, data16 */ case 0x08: /* ??? */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.alu_ri16 : cycles.alu_mi16_ro; + ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16_ro; tmp2 = FETCH; tmp2 += FETCH << 8; @@ -2861,19 +2861,19 @@ static void PREFIX86(_f7pre)(void) break; case 0x10: /* NOT Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.negnot_r16 : cycles.negnot_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r16 : timing.negnot_m16; tmp = ~tmp; PutbackRMWord(ModRM,tmp); break; case 0x18: /* NEG Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.negnot_r16 : cycles.negnot_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r16 : timing.negnot_m16; tmp2 = 0; SUBW(tmp2,tmp); PutbackRMWord(ModRM,tmp2); break; case 0x20: /* MUL AX, Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.mul_r16 : cycles.mul_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.mul_r16 : timing.mul_m16; { UINT32 result; tmp2 = I.regs.w[AX]; @@ -2892,7 +2892,7 @@ static void PREFIX86(_f7pre)(void) break; case 0x28: /* IMUL AX, Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.imul_r16 : cycles.imul_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.imul_r16 : timing.imul_m16; { INT32 result; @@ -2912,7 +2912,7 @@ static void PREFIX86(_f7pre)(void) } break; case 0x30: /* DIV AX, Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.div_r16 : cycles.div_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.div_r16 : timing.div_m16; { UINT32 result; @@ -2941,7 +2941,7 @@ static void PREFIX86(_f7pre)(void) } break; case 0x38: /* IDIV AX, Ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.idiv_r16 : cycles.idiv_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.idiv_r16 : timing.idiv_m16; { INT32 result; @@ -2974,25 +2974,25 @@ static void PREFIX86(_f7pre)(void) static void PREFIX86(_clc)(void) /* Opcode 0xf8 */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; I.CarryVal = 0; } static void PREFIX86(_stc)(void) /* Opcode 0xf9 */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; I.CarryVal = 1; } static void PREFIX86(_cli)(void) /* Opcode 0xfa */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; SetIF(0); } static void PREFIX86(_sti)(void) /* Opcode 0xfb */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; SetIF(1); PREFIX(_instruction)[FETCHOP](); /* no interrupt before next instruction */ @@ -3003,13 +3003,13 @@ static void PREFIX86(_sti)(void) /* Opcode 0xfb */ static void PREFIX86(_cld)(void) /* Opcode 0xfc */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; SetDF(0); } static void PREFIX86(_std)(void) /* Opcode 0xfd */ { - ICOUNT -= cycles.flag_ops; + ICOUNT -= timing.flag_ops; SetDF(1); } @@ -3019,7 +3019,7 @@ static void PREFIX86(_fepre)(void) /* Opcode 0xfe */ unsigned tmp = GetRMByte(ModRM); unsigned tmp1; - ICOUNT -= (ModRM >= 0xc0) ? cycles.incdec_r8 : cycles.incdec_m8; + ICOUNT -= (ModRM >= 0xc0) ? timing.incdec_r8 : timing.incdec_m8; if ((ModRM & 0x38) == 0) /* INC eb */ { tmp1 = tmp+1; @@ -3048,7 +3048,7 @@ static void PREFIX86(_ffpre)(void) /* Opcode 0xff */ switch(ModRM & 0x38) { case 0x00: /* INC ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.incdec_r16 : cycles.incdec_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.incdec_r16 : timing.incdec_m16; tmp = GetRMWord(ModRM); tmp1 = tmp+1; @@ -3060,7 +3060,7 @@ static void PREFIX86(_ffpre)(void) /* Opcode 0xff */ break; case 0x08: /* DEC ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.incdec_r16 : cycles.incdec_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.incdec_r16 : timing.incdec_m16; tmp = GetRMWord(ModRM); tmp1 = tmp-1; @@ -3072,7 +3072,7 @@ static void PREFIX86(_ffpre)(void) /* Opcode 0xff */ break; case 0x10: /* CALL ew */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.call_r16 : cycles.call_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.call_r16 : timing.call_m16; tmp = GetRMWord(ModRM); ip = I.pc - I.base[CS]; PUSH(ip); @@ -3081,7 +3081,7 @@ static void PREFIX86(_ffpre)(void) /* Opcode 0xff */ break; case 0x18: /* CALL FAR ea */ - ICOUNT -= cycles.call_m32; + ICOUNT -= timing.call_m32; tmp = I.sregs[CS]; /* HJB 12/13/98 need to skip displacements of EA */ tmp1 = GetRMWord(ModRM); ip = I.pc - I.base[CS]; @@ -3098,14 +3098,14 @@ static void PREFIX86(_ffpre)(void) /* Opcode 0xff */ break; case 0x20: /* JMP ea */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.jmp_r16 : cycles.jmp_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.jmp_r16 : timing.jmp_m16; ip = GetRMWord(ModRM); I.pc = (I.base[CS] + ip) & AMASK; CHANGE_PC(I.pc); break; case 0x28: /* JMP FAR ea */ - ICOUNT -= cycles.jmp_m32; + ICOUNT -= timing.jmp_m32; #ifdef I80286 tmp = GetRMWord(ModRM); @@ -3120,7 +3120,7 @@ static void PREFIX86(_ffpre)(void) /* Opcode 0xff */ break; case 0x30: /* PUSH ea */ - ICOUNT -= (ModRM >= 0xc0) ? cycles.push_r16 : cycles.push_m16; + ICOUNT -= (ModRM >= 0xc0) ? timing.push_r16 : timing.push_m16; tmp = GetRMWord(ModRM); PUSH(tmp); break; diff --git a/src/emu/cpu/i8x41/i8x41.c b/src/emu/cpu/i8x41/i8x41.c index c49fcfe9e8f..6334b262bc5 100644 --- a/src/emu/cpu/i8x41/i8x41.c +++ b/src/emu/cpu/i8x41/i8x41.c @@ -123,7 +123,8 @@ typedef struct { UINT8 p2; UINT8 p2_hs; UINT8 ram_mask; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; i8x41_config *config; } I8X41; @@ -581,7 +582,7 @@ INLINE void en_tcnti(void) INLINE void in_a_dbb(void) { if( i8x41.irq_callback ) - (*i8x41.irq_callback)(I8X41_INT_IBF); + (*i8x41.irq_callback)(i8x41.device, I8X41_INT_IBF); STATE &= ~IBF; /* clear input buffer full flag */ if( ENABLE & FLAGS ) @@ -1323,9 +1324,10 @@ static const UINT8 i8x41_cycles[] = { * Inits CPU emulation ****************************************************************************/ -static void i8x41_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8x41 ) { i8x41.irq_callback = irqcallback; + i8x41.device = device; i8x41.config = (i8x41_config *)config; state_save_register_item("i8x41", index, i8x41.ppc); @@ -1350,12 +1352,14 @@ static void i8x41_init(int index, int clock, const void *config, int (*irqcallba * Reset registers to their initial values ****************************************************************************/ -static void i8x41_reset(void) +static CPU_RESET( i8x41 ) { - int (*save_irqcallback)(int) = i8x41.irq_callback; + cpu_irq_callback save_irqcallback = i8x41.irq_callback; + const device_config *save_device = i8x41.device; i8x41_config *save_config = i8x41.config; memset(&i8x41, 0, sizeof(I8X41)); i8x41.irq_callback = save_irqcallback; + i8x41.device = save_device; i8x41.config = save_config; /* default to 8041 behaviour for DBBI/DBBO and extended commands */ @@ -1381,7 +1385,7 @@ static void i8x41_reset(void) * Shut down CPU emulation ****************************************************************************/ -static void i8x41_exit(void) +static CPU_EXIT( i8x41 ) { /* nothing to do */ } @@ -1391,7 +1395,7 @@ static void i8x41_exit(void) * Execute cycles - returns number of cycles actually run ****************************************************************************/ -static int i8x41_execute(int cycles) +static CPU_EXECUTE( i8x41 ) { int inst_cycles, T1_level; @@ -2279,10 +2283,10 @@ void i8x41_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = i8x41_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i8x41_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i8x41_set_context; break; - case CPUINFO_PTR_INIT: info->init = i8x41_init; break; - case CPUINFO_PTR_RESET: info->reset = i8x41_reset; break; - case CPUINFO_PTR_EXIT: info->exit = i8x41_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = i8x41_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8x41); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i8x41); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i8x41); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8x41); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8x41_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i8x41_ICount; break; diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c index ae9e64793bd..3fd80b11606 100644 --- a/src/emu/cpu/i960/i960.c +++ b/src/emu/cpu/i960/i960.c @@ -32,7 +32,8 @@ typedef struct { int immediate_irq, immediate_vector, immediate_pri; - int (*irq_cb)(int); + cpu_irq_callback irq_cb; + const device_config *device; } i960_state; static int i960_icount; @@ -607,7 +608,7 @@ static void do_ret(void) } } -static int i960_execute(int cycles) +static CPU_EXECUTE( i960 ) { UINT32 opcode; UINT32 t1, t2; @@ -2037,7 +2038,7 @@ static void set_irq_line(int irqline, int state) } // and ack it to the core now that it's queued - (*i960.irq_cb)(irqline); + (*i960.irq_cb)(i960.device, irqline); } } @@ -2061,10 +2062,11 @@ static void i960_set_info(UINT32 state, cpuinfo *info) } } -static void i960_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i960 ) { memset(&i960, 0, sizeof(i960)); i960.irq_cb = irqcallback; + i960.device = device; state_save_register_item("i960", index, i960.PIP); state_save_register_item("i960", index, i960.SAT); @@ -2091,7 +2093,7 @@ static offs_t i960_disasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN return dis.IPinc | dis.disflags | DASMFLAG_SUPPORTED; } -static void i960_reset(void) +static CPU_RESET( i960 ) { i960.SAT = program_read_dword_32le(0); i960.PRCB = program_read_dword_32le(4); @@ -2122,10 +2124,10 @@ void i960_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = i960_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i960_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i960_set_context; break; - case CPUINFO_PTR_INIT: info->init = i960_init; break; - case CPUINFO_PTR_RESET: info->reset = i960_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i960); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i960); break; case CPUINFO_PTR_EXIT: info->exit = 0; break; - case CPUINFO_PTR_EXECUTE: info->execute = i960_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break; case CPUINFO_PTR_BURN: info->burn = 0; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i960_disasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i960_icount; break; diff --git a/src/emu/cpu/jaguar/jaguar.c b/src/emu/cpu/jaguar/jaguar.c index f6b58e17fe7..30bd2a547cb 100644 --- a/src/emu/cpu/jaguar/jaguar.c +++ b/src/emu/cpu/jaguar/jaguar.c @@ -94,7 +94,8 @@ typedef struct int op; int interrupt_cycles; void (*const *table)(void); - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; void (*cpu_interrupt)(void); } jaguar_regs; @@ -430,33 +431,35 @@ static void jaguar_state_register(int index, const char *type) state_save_register_postload(Machine, jaguar_postload, NULL); } -static void jaguargpu_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( jaguargpu ) { - const jaguar_cpu_core *config = _config; + const jaguar_cpu_core *configdata = config; memset(&jaguar, 0, sizeof(jaguar)); jaguar_state_register(index, "jaguargpu"); jaguar.irq_callback = irqcallback; - if (config) - jaguar.cpu_interrupt = config->cpu_int_callback; + jaguar.device = device; + if (configdata) + jaguar.cpu_interrupt = configdata->cpu_int_callback; } -static void jaguardsp_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( jaguardsp ) { - const jaguar_cpu_core *config = _config; + const jaguar_cpu_core *configdata = config; memset(&jaguar, 0, sizeof(jaguar)); jaguar_state_register(index, "jaguardsp"); jaguar.irq_callback = irqcallback; - if (config) - jaguar.cpu_interrupt = config->cpu_int_callback; + jaguar.device = device; + if (configdata) + jaguar.cpu_interrupt = configdata->cpu_int_callback; } -INLINE void common_reset(void) +INLINE CPU_RESET( common ) { init_tables(); @@ -467,21 +470,21 @@ INLINE void common_reset(void) change_pc(jaguar.PC); } -static void jaguargpu_reset(void) +static CPU_RESET( jaguargpu ) { - common_reset(); + CPU_RESET_CALL(common); jaguar.table = gpu_op_table; jaguar.isdsp = 0; } -static void jaguardsp_reset(void) +static CPU_RESET( jaguardsp ) { - common_reset(); + CPU_RESET_CALL(common); jaguar.table = dsp_op_table; jaguar.isdsp = 1; } -static void jaguar_exit(void) +static CPU_EXIT( jaguar ) { if (mirror_table) free(mirror_table); @@ -498,7 +501,7 @@ static void jaguar_exit(void) CORE EXECUTION LOOP ***************************************************************************/ -static int jaguargpu_execute(int cycles) +static CPU_EXECUTE( jaguargpu ) { /* if we're halted, we shouldn't be here */ if (!(jaguar.ctrl[G_CTRL] & 1)) @@ -544,7 +547,7 @@ static int jaguargpu_execute(int cycles) return cycles - jaguar_icount; } -static int jaguardsp_execute(int cycles) +static CPU_EXECUTE( jaguardsp ) { /* if we're halted, we shouldn't be here */ if (!(jaguar.ctrl[G_CTRL] & 1)) @@ -1645,10 +1648,10 @@ void jaguargpu_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = jaguargpu_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = jaguar_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = jaguar_set_context; break; - case CPUINFO_PTR_INIT: info->init = jaguargpu_init; break; - case CPUINFO_PTR_RESET: info->reset = jaguargpu_reset; break; - case CPUINFO_PTR_EXIT: info->exit = jaguar_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = jaguargpu_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(jaguargpu); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(jaguargpu); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(jaguar); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguargpu); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = jaguargpu_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &jaguar_icount; break; @@ -1740,9 +1743,9 @@ void jaguardsp_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = jaguardsp_set_info; break; - case CPUINFO_PTR_INIT: info->init = jaguardsp_init; break; - case CPUINFO_PTR_RESET: info->reset = jaguardsp_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = jaguardsp_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(jaguardsp); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(jaguardsp); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguardsp); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = jaguardsp_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/konami/konami.c b/src/emu/cpu/konami/konami.c index a9107848c7d..0cfc44946cc 100644 --- a/src/emu/cpu/konami/konami.c +++ b/src/emu/cpu/konami/konami.c @@ -55,7 +55,8 @@ typedef struct UINT8 ireg; /* first opcode */ UINT8 irq_state[2]; int extra_cycles; /* cycles used up by interrupts */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 int_state; /* SYNC and CWAI flags */ UINT8 nmi_state; void (*setlines_callback)( int lines ); /* callback called when A16-A23 are set */ @@ -131,7 +132,7 @@ static PAIR ea; /* effective address */ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */ \ PCD = RM16(0xfff6); \ change_pc(PC); /* TS 971002 */ \ - (void)(*konami.irq_callback)(KONAMI_FIRQ_LINE); \ + (void)(*konami.irq_callback)(konami.device, KONAMI_FIRQ_LINE); \ } \ else \ if( konami.irq_state[KONAMI_IRQ_LINE]!=CLEAR_LINE && !(CC & CC_II) )\ @@ -159,7 +160,7 @@ static PAIR ea; /* effective address */ CC |= CC_II; /* inhibit IRQ */ \ PCD = RM16(0xfff8); \ change_pc(PC); /* TS 971002 */ \ - (void)(*konami.irq_callback)(KONAMI_IRQ_LINE); \ + (void)(*konami.irq_callback)(konami.device, KONAMI_IRQ_LINE); \ } /* public globals */ @@ -388,9 +389,10 @@ static void konami_set_context(void *src) /****************************************************************************/ /* Reset registers to their initial values */ /****************************************************************************/ -static void konami_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( konami ) { konami.irq_callback = irqcallback; + konami.device = device; state_save_register_item("KONAMI", index, PC); state_save_register_item("KONAMI", index, U); @@ -406,7 +408,7 @@ static void konami_init(int index, int clock, const void *config, int (*irqcallb state_save_register_item("KONAMI", index, konami.irq_state[1]); } -static void konami_reset(void) +static CPU_RESET( konami ) { konami.int_state = 0; konami.nmi_state = CLEAR_LINE; @@ -422,7 +424,7 @@ static void konami_reset(void) change_pc(PC); /* TS 971002 */ } -static void konami_exit(void) +static CPU_EXIT( konami ) { } @@ -482,7 +484,7 @@ static void set_irq_line(int irqline, int state) #include "konamops.c" /* execute instructions on this CPU until icount expires */ -static int konami_execute(int cycles) +static CPU_EXECUTE( konami ) { konami_ICount = cycles - konami.extra_cycles; konami.extra_cycles = 0; @@ -600,10 +602,10 @@ void konami_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = konami_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = konami_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = konami_set_context; break; - case CPUINFO_PTR_INIT: info->init = konami_init; break; - case CPUINFO_PTR_RESET: info->reset = konami_reset; break; - case CPUINFO_PTR_EXIT: info->exit = konami_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = konami_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(konami); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(konami); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(konami); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(konami); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = konami_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &konami_ICount; break; diff --git a/src/emu/cpu/lh5801/lh5801.c b/src/emu/cpu/lh5801/lh5801.c index dd000780c1e..a5c355dbd63 100644 --- a/src/emu/cpu/lh5801/lh5801.c +++ b/src/emu/cpu/lh5801/lh5801.c @@ -90,13 +90,13 @@ static LH5801_Regs lh5801= { 0 }; ***************************************************************/ #include "5801tbl.c" -static void lh5801_init(int cpu, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( lh5801 ) { memset(&lh5801, 0, sizeof(lh5801)); lh5801.config = (const lh5801_cpu_core *) config; } -static void lh5801_reset(void) +static CPU_RESET( lh5801 ) { P = (program_read_byte(0xfffe)<<8) | program_read_byte(0xffff); @@ -120,7 +120,7 @@ static void lh5801_set_context (void *src) } } -static int lh5801_execute(int cycles) +static CPU_EXECUTE( lh5801 ) { lh5801_icount = cycles; @@ -231,10 +231,10 @@ void lh5801_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = lh5801_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = lh5801_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = lh5801_set_context; break; - case CPUINFO_PTR_INIT: info->init = lh5801_init; break; - case CPUINFO_PTR_RESET: info->reset = lh5801_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(lh5801); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(lh5801); break; case CPUINFO_PTR_EXIT: info->exit = NULL; break; - case CPUINFO_PTR_EXECUTE: info->execute = lh5801_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(lh5801); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = lh5801_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &lh5801_icount; break; diff --git a/src/emu/cpu/lr35902/lr35902.c b/src/emu/cpu/lr35902/lr35902.c index 4f189361e9c..6b4ef9cbaca 100644 --- a/src/emu/cpu/lr35902/lr35902.c +++ b/src/emu/cpu/lr35902/lr35902.c @@ -63,7 +63,8 @@ typedef struct { UINT8 IF; int irq_state; int ei_delay; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; /* Timer stuff */ void (*timer_fired_func)(int cycles); /* Fetch & execute related */ @@ -178,10 +179,11 @@ static const int CyclesCB[256] = 8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8 }; -static void lr35902_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( lr35902 ) { Regs.w.config = (const lr35902_cpu_core *) config; Regs.w.irq_callback = irqcallback; + Regs.w.device = device; } /*** Reset lr353902 registers: ******************************/ @@ -189,7 +191,7 @@ static void lr35902_init(int index, int clock, const void *config, int (*irqcall /*** file before starting execution with lr35902_execute()***/ /*** It sets the registers to their initial values. ***/ /************************************************************/ -static void lr35902_reset(void) +static CPU_RESET( lr35902 ) { Regs.w.AF = 0x0000; Regs.w.BC = 0x0000; @@ -273,7 +275,7 @@ INLINE void lr35902_ProcessInterrupts (void) } if ( Regs.w.enable & IME ) { if ( Regs.w.irq_callback ) - (*Regs.w.irq_callback)(irqline); + (*Regs.w.irq_callback)(Regs.w.device, irqline); Regs.w.enable &= ~IME; Regs.w.IF &= ~(1 << irqline); CYCLES_PASSED( 20 ); @@ -292,7 +294,7 @@ INLINE void lr35902_ProcessInterrupts (void) /*** Execute lr35902 code for cycles cycles, return nr of ***/ /*** cycles actually executed. ***/ /************************************************************/ -static int lr35902_execute (int cycles) +static CPU_EXECUTE( lr35902 ) { lr35902_ICount = cycles; @@ -463,9 +465,9 @@ void lr35902_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = lr35902_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = lr35902_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = lr35902_set_context; break; - case CPUINFO_PTR_INIT: info->init = lr35902_init; break; - case CPUINFO_PTR_RESET: info->reset = lr35902_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = lr35902_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(lr35902); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(lr35902); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(lr35902); break; case CPUINFO_PTR_BURN: info->burn = lr35902_burn; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = lr35902_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &lr35902_ICount; break; diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c index 8778ac205eb..89eda3a23dc 100644 --- a/src/emu/cpu/m37710/m37710.c +++ b/src/emu/cpu/m37710/m37710.c @@ -768,7 +768,7 @@ void m37710i_update_irqs(void) if (wantedIRQ != -1) { - if (INT_ACK) INT_ACK(wantedIRQ); + if (INT_ACK) INT_ACK(m37710i_cpu.device, wantedIRQ); // make sure we're running to service the interrupt CPU_STOPPED &= ~STOP_LEVEL_WAI; @@ -808,7 +808,7 @@ void m37710i_update_irqs(void) /* external functions */ -static void m37710_reset(void) +static CPU_RESET( m37710 ) { /* Start the CPU */ CPU_STOPPED = 0; @@ -848,7 +848,7 @@ static void m37710_reset(void) } /* Exit and clean up */ -void m37710_exit(void) +CPU_EXIT( m37710 ) { /* nothing to do yet */ } @@ -870,7 +870,7 @@ void m37710_yield(void) #endif /* Execute some instructions */ -static int m37710_execute(int cycles) +static CPU_EXECUTE( m37710 ) { m37710_fullCount = cycles; @@ -950,7 +950,7 @@ static void m37710_set_irq_line(int line, int state) /* Set the callback that is called when servicing an interrupt */ #ifdef UNUSED_FUNCTION -void m37710_set_irq_callback(int (*callback)(int)) +void m37710_set_irq_callback(cpu_irq_callback callback) { INT_ACK = callback; } @@ -973,13 +973,14 @@ static STATE_POSTLOAD( m37710_restore_state ) m37710i_jumping(REG_PB | REG_PC); } -static void m37710_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m37710 ) { int i; memset(&m37710i_cpu, 0, sizeof(m37710i_cpu)); INT_ACK = irqcallback; + m37710i_cpu.device = device; m37710_ICount = 0; m37710_fullCount = 0; @@ -1146,10 +1147,10 @@ void m37710_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m37710_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m37710_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m37710_set_context; break; - case CPUINFO_PTR_INIT: info->init = m37710_init; break; - case CPUINFO_PTR_RESET: info->reset = m37710_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m37710_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m37710_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m37710); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m37710); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m37710); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m37710); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m37710_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m37710_ICount; break; diff --git a/src/emu/cpu/m37710/m37710.h b/src/emu/cpu/m37710/m37710.h index 0f645e93b53..cf8c39f512d 100644 --- a/src/emu/cpu/m37710/m37710.h +++ b/src/emu/cpu/m37710/m37710.h @@ -96,7 +96,7 @@ extern int m37710_ICount; /* cycle count */ /* ======================================================================== */ /* Clean up after the emulation core - Not used in this core - */ -void m37710_exit(void); +CPU_EXIT( m37710 ); /* Save the current CPU state to disk */ void m37710_state_save(void *file); diff --git a/src/emu/cpu/m37710/m37710cm.h b/src/emu/cpu/m37710/m37710cm.h index 1ee1dda84e8..a99dd995cd6 100644 --- a/src/emu/cpu/m37710/m37710cm.h +++ b/src/emu/cpu/m37710/m37710cm.h @@ -96,7 +96,8 @@ struct _m37710i_cpu_struct uint im4; /* Immediate load target */ uint irq_delay; /* delay 1 instruction before checking irq */ uint irq_level; /* irq level */ - int (*int_ack)(int); /* Interrupt Acknowledge */ + cpu_irq_callback int_ack; + const device_config *device; uint stopped; /* Sets how the CPU is stopped */ void (*const *opcodes)(void); /* opcodes with no prefix */ void (*const *opcodes42)(void); /* opcodes with 0x42 prefix */ diff --git a/src/emu/cpu/m37710/m37710op.h b/src/emu/cpu/m37710/m37710op.h index 3ab778825fc..b117e7fdd1f 100644 --- a/src/emu/cpu/m37710/m37710op.h +++ b/src/emu/cpu/m37710/m37710op.h @@ -301,7 +301,7 @@ INLINE void m37710i_interrupt_hardware(uint vector) m37710i_set_flag_i(IFLAG_SET); REG_PB = 0; m37710i_jump_16(m37710i_read_16_normal(vector)); - if(INT_ACK) INT_ACK(0); + if(INT_ACK) INT_ACK(m37710i_cpu.device, 0); } INLINE void m37710i_interrupt_software(uint vector) diff --git a/src/emu/cpu/m6502/m4510.c b/src/emu/cpu/m6502/m4510.c index 29db50565a2..765777f4721 100644 --- a/src/emu/cpu/m6502/m4510.c +++ b/src/emu/cpu/m6502/m4510.c @@ -141,7 +141,8 @@ typedef struct { UINT8 irq_state; UINT16 low, high; UINT32 mem[8]; - int (*irq_callback)(int irqline); /* IRQ callback */ + cpu_irq_callback irq_callback; + const device_config *device; read8_machine_func rdmem_id; /* readmem callback for indexed instructions */ write8_machine_func wrmem_id; /* writemem callback for indexed instructions */ @@ -177,15 +178,16 @@ INLINE int m4510_cpu_readop_arg(void) static READ8_HANDLER( default_rdmem_id ) { return program_read_byte_8le(M4510_MEM(offset)); } static WRITE8_HANDLER( default_wrmem_id ) { program_write_byte_8le(M4510_MEM(offset), data); } -static void m4510_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m4510 ) { m4510.interrupt_inhibit = 0; m4510.rdmem_id = default_rdmem_id; m4510.wrmem_id = default_wrmem_id; m4510.irq_callback = irqcallback; + m4510.device = device; } -static void m4510_reset (void) +static CPU_RESET( m4510 ) { m4510.insn = insn4510; @@ -215,7 +217,7 @@ static void m4510_reset (void) m4510.ddr = 0x00; } -static void m4510_exit(void) +static CPU_EXIT( m4510 ) { /* nothing to do yet */ } @@ -250,13 +252,13 @@ INLINE void m4510_take_irq(void) PCH = RDMEM(EAD+1); LOG(("M4510#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), PCD)); /* call back the cpuintrf to let it clear the line */ - if (m4510.irq_callback) (*m4510.irq_callback)(0); + if (m4510.irq_callback) (*m4510.irq_callback)(m4510.device, 0); CHANGE_PC; } m4510.pending_irq = 0; } -static int m4510_execute(int cycles) +static CPU_EXECUTE( m4510 ) { m4510_ICount = cycles; @@ -492,10 +494,10 @@ void m4510_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m4510_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m4510_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m4510_set_context; break; - case CPUINFO_PTR_INIT: info->init = m4510_init; break; - case CPUINFO_PTR_RESET: info->reset = m4510_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m4510_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m4510_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m4510); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m4510); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m4510); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m4510); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m4510_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m4510_ICount; break; diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c index 2f346c42a32..51d9850734b 100644 --- a/src/emu/cpu/m6502/m6502.c +++ b/src/emu/cpu/m6502/m6502.c @@ -71,7 +71,8 @@ typedef struct UINT8 nmi_state; UINT8 irq_state; UINT8 so_state; - int (*irq_callback)(int irqline); /* IRQ callback */ + cpu_irq_callback irq_callback; + const device_config *device; read8_machine_func rdmem_id; /* readmem callback for indexed instructions */ write8_machine_func wrmem_id; /* writemem callback for indexed instructions */ @@ -127,10 +128,11 @@ static WRITE8_HANDLER( default_wdmem_id ) { program_write_byte_8le(offset, data) * *****************************************************************************/ -static void m6502_common_init(int index, int clock, const void *config, int (*irqcallback)(int), UINT8 subtype, void (*const *insn)(void), const char *type) +static void m6502_common_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, UINT8 subtype, void (*const *insn)(void), const char *type) { memset(&m6502, 0, sizeof(m6502)); m6502.irq_callback = irqcallback; + m6502.device = device; m6502.subtype = subtype; m6502.insn = insn; m6502.rdmem_id = default_rdmem_id; @@ -157,12 +159,12 @@ static void m6502_common_init(int index, int clock, const void *config, int (*ir #endif } -static void m6502_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6502 ) { - m6502_common_init(index, clock, config, irqcallback, SUBTYPE_6502, insn6502, "m6502"); + m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_6502, insn6502, "m6502"); } -static void m6502_reset(void) +static CPU_RESET( m6502 ) { /* wipe out the rest of the m6502 structure */ /* read the reset vector into PC */ @@ -179,7 +181,7 @@ static void m6502_reset(void) change_pc(PCD); } -static void m6502_exit(void) +static CPU_EXIT( m6502 ) { /* nothing to do yet */ } @@ -213,13 +215,13 @@ INLINE void m6502_take_irq(void) PCH = RDMEM(EAD+1); LOG(("M6502#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502.irq_callback) (*m6502.irq_callback)(0); + if (m6502.irq_callback) (*m6502.irq_callback)(m6502.device, 0); change_pc(PCD); } m6502.pending_irq = 0; } -static int m6502_execute(int cycles) +static CPU_EXECUTE( m6502 ) { m6502_ICount = cycles; @@ -323,9 +325,9 @@ static void m6502_set_irq_line(int irqline, int state) ****************************************************************************/ #if (HAS_N2A03) -static void n2a03_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( n2a03 ) { - m6502_common_init(index, clock, config, irqcallback, SUBTYPE_2A03, insn2a03, "n2a03"); + m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_2A03, insn2a03, "n2a03"); } /* The N2A03 is integrally tied to its PSG (they're on the same die). @@ -344,14 +346,14 @@ void n2a03_irq(void) ****************************************************************************/ #if (HAS_M6510) -static void m6510_init (int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6510 ) { - m6502_common_init(index, clock, config, irqcallback, SUBTYPE_6510, insn6510, "m6510"); + m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_6510, insn6510, "m6510"); } -static void m6510_reset (void) +static CPU_RESET( m6510 ) { - m6502_reset(); + CPU_RESET_CALL(m6502); m6502.port = 0xff; m6502.ddr = 0x00; } @@ -407,14 +409,14 @@ ADDRESS_MAP_END ****************************************************************************/ #if (HAS_M65C02) -static void m65c02_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m65c02 ) { - m6502_common_init(index, clock, config, irqcallback, SUBTYPE_65C02, insn65c02, "m65c02"); + m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_65C02, insn65c02, "m65c02"); } -static void m65c02_reset (void) +static CPU_RESET( m65c02 ) { - m6502_reset(); + CPU_RESET_CALL(m6502); P &=~F_D; } @@ -432,13 +434,13 @@ INLINE void m65c02_take_irq(void) PCH = RDMEM(EAD+1); LOG(("M65c02#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502.irq_callback) (*m6502.irq_callback)(0); + if (m6502.irq_callback) (*m6502.irq_callback)(m6502.device, 0); change_pc(PCD); } m6502.pending_irq = 0; } -static int m65c02_execute(int cycles) +static CPU_EXECUTE( m65c02 ) { m6502_ICount = cycles; @@ -513,9 +515,9 @@ static void m65c02_set_irq_line(int irqline, int state) * 65SC02 section ****************************************************************************/ #if (HAS_M65SC02) -static void m65sc02_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m65sc02 ) { - m6502_common_init(index, clock, config, irqcallback, SUBTYPE_65SC02, insn65sc02, "m65sc02"); + m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_65SC02, insn65sc02, "m65sc02"); } #endif @@ -524,15 +526,15 @@ static void m65sc02_init(int index, int clock, const void *config, int (*irqcall ****************************************************************************/ #if (HAS_DECO16) -static void deco16_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( deco16 ) { - m6502_common_init(index, clock, config, irqcallback, SUBTYPE_DECO16, insndeco16, "deco16"); + m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_DECO16, insndeco16, "deco16"); } -static void deco16_reset (void) +static CPU_RESET( deco16 ) { - m6502_reset(); + CPU_RESET_CALL(m6502); m6502.subtype = SUBTYPE_DECO16; m6502.insn = insndeco16; @@ -561,7 +563,7 @@ INLINE void deco16_take_irq(void) PCH = RDMEM(EAD); LOG(("M6502#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502.irq_callback) (*m6502.irq_callback)(0); + if (m6502.irq_callback) (*m6502.irq_callback)(m6502.device, 0); change_pc(PCD); } m6502.pending_irq = 0; @@ -609,7 +611,7 @@ static void deco16_set_irq_line(int irqline, int state) } } -static int deco16_execute(int cycles) +static CPU_EXECUTE( deco16 ) { m6502_ICount = cycles; @@ -742,10 +744,10 @@ void m6502_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m6502_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6502_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6502_set_context; break; - case CPUINFO_PTR_INIT: info->init = m6502_init; break; - case CPUINFO_PTR_RESET: info->reset = m6502_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m6502_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6502_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6502); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6502); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6502); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6502); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6502_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6502_ICount; break; @@ -793,7 +795,7 @@ void n2a03_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = n2a03_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(n2a03); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "N2A03"); break; @@ -827,8 +829,8 @@ void m6510_get_info(UINT32 state, cpuinfo *info) { /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = m6510_set_info; break; - case CPUINFO_PTR_INIT: info->init = m6510_init; break; - case CPUINFO_PTR_RESET: info->reset = m6510_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6510); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6510); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6510_dasm; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = address_map_m6510_mem; break; case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) m6502.port_read; break; @@ -922,9 +924,9 @@ void m65c02_get_info(UINT32 state, cpuinfo *info) { /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = m65c02_set_info; break; - case CPUINFO_PTR_INIT: info->init = m65c02_init; break; - case CPUINFO_PTR_RESET: info->reset = m65c02_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = m65c02_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m65c02); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m65c02); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m65c02); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65c02_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -946,7 +948,7 @@ void m65sc02_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = m65sc02_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m65sc02); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65sc02_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -990,9 +992,9 @@ void deco16_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = deco16_set_info; break; - case CPUINFO_PTR_INIT: info->init = deco16_init; break; - case CPUINFO_PTR_RESET: info->reset = deco16_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = deco16_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(deco16); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(deco16); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(deco16); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = deco16_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/m6502/m6509.c b/src/emu/cpu/m6502/m6509.c index 6f3a2af9f65..66faedf18c9 100644 --- a/src/emu/cpu/m6502/m6509.c +++ b/src/emu/cpu/m6502/m6509.c @@ -77,7 +77,8 @@ typedef struct { UINT8 nmi_state; UINT8 irq_state; UINT8 so_state; - int (*irq_callback)(int irqline); /* IRQ callback */ + cpu_irq_callback irq_callback; + const device_config *device; read8_machine_func rdmem_id; /* readmem callback for indexed instructions */ write8_machine_func wrmem_id; /* readmem callback for indexed instructions */ } m6509_Regs; @@ -122,14 +123,15 @@ ADDRESS_MAP_END static READ8_HANDLER( default_rdmem_id ) { return program_read_byte_8le(offset); } static WRITE8_HANDLER( default_wdmem_id ) { program_write_byte_8le(offset, data); } -static void m6509_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6509 ) { m6509.rdmem_id = default_rdmem_id; m6509.wrmem_id = default_wdmem_id; m6509.irq_callback = irqcallback; + m6509.device = device; } -static void m6509_reset (void) +static CPU_RESET( m6509 ) { m6509.insn = insn6509; @@ -150,7 +152,7 @@ static void m6509_reset (void) change_pc(PCD); } -static void m6509_exit(void) +static CPU_EXIT( m6509 ) { /* nothing to do yet */ } @@ -187,13 +189,13 @@ INLINE void m6509_take_irq(void) PCH = RDMEM(EAD+1); LOG(("M6509#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6509.irq_callback) (*m6509.irq_callback)(0); + if (m6509.irq_callback) (*m6509.irq_callback)(m6509.device, 0); change_pc(PCD); } m6509.pending_irq = 0; } -static int m6509_execute(int cycles) +static CPU_EXECUTE( m6509 ) { m6502_ICount = cycles; @@ -367,10 +369,10 @@ void m6509_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m6509_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6509_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6509_set_context; break; - case CPUINFO_PTR_INIT: info->init = m6509_init; break; - case CPUINFO_PTR_RESET: info->reset = m6509_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m6509_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6509_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6509); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6509); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6509); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6509); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6502_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6502_ICount; break; diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c index 821719399ac..aca360d6b57 100644 --- a/src/emu/cpu/m6502/m65ce02.c +++ b/src/emu/cpu/m6502/m65ce02.c @@ -73,7 +73,8 @@ typedef struct { UINT8 after_cli; /* pending IRQ and last insn cleared I */ UINT8 nmi_state; UINT8 irq_state; - int (*irq_callback)(int irqline); /* IRQ callback */ + cpu_irq_callback irq_callback; + const device_config *device; read8_machine_func rdmem_id; /* readmem callback for indexed instructions */ write8_machine_func wrmem_id; /* writemem callback for indexed instructions */ } m65ce02_Regs; @@ -92,14 +93,15 @@ static m65ce02_Regs m65ce02; static READ8_HANDLER( default_rdmem_id ) { return program_read_byte_8le(offset); } static WRITE8_HANDLER( default_wdmem_id ) { program_write_byte_8le(offset, data); } -static void m65ce02_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m65ce02 ) { m65ce02.rdmem_id = default_rdmem_id; m65ce02.wrmem_id = default_wdmem_id; m65ce02.irq_callback = irqcallback; + m65ce02.device = device; } -static void m65ce02_reset(void) +static CPU_RESET( m65ce02 ) { m65ce02.insn = insn65ce02; @@ -121,7 +123,7 @@ static void m65ce02_reset(void) change_pc(PCD); } -static void m65ce02_exit(void) +static CPU_EXIT( m65ce02 ) { /* nothing to do yet */ } @@ -155,13 +157,13 @@ INLINE void m65ce02_take_irq(void) PCH = RDMEM(EAD+1); LOG(("M65ce02#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), PCD)); /* call back the cpuintrf to let it clear the line */ - if (m65ce02.irq_callback) (*m65ce02.irq_callback)(0); + if (m65ce02.irq_callback) (*m65ce02.irq_callback)(m65ce02.device, 0); change_pc(PCD); } m65ce02.pending_irq = 0; } -static int m65ce02_execute(int cycles) +static CPU_EXECUTE( m65ce02 ) { m65ce02_ICount = cycles; @@ -322,10 +324,10 @@ void m65ce02_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m65ce02_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m65ce02_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m65ce02_set_context; break; - case CPUINFO_PTR_INIT: info->init = m65ce02_init; break; - case CPUINFO_PTR_RESET: info->reset = m65ce02_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m65ce02_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m65ce02_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m65ce02); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m65ce02); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m65ce02); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m65ce02); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65ce02_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m65ce02_ICount; break; diff --git a/src/emu/cpu/m6800/6800ops.c b/src/emu/cpu/m6800/6800ops.c index b964547c010..a974b550745 100644 --- a/src/emu/cpu/m6800/6800ops.c +++ b/src/emu/cpu/m6800/6800ops.c @@ -16,7 +16,7 @@ HNZVC //INLINE void illegal( void ) static void illegal( void ) { - logerror("M6808: illegal opcode: address %04X, op %02X\n",PC,(int) M_RDOP_ARG(PC)&0xFF); + logerror("m6800: illegal opcode: address %04X, op %02X\n",PC,(int) M_RDOP_ARG(PC)&0xFF); } /* HD63701 only */ @@ -24,7 +24,7 @@ static void illegal( void ) //INLINE void trap( void ) static void trap( void ) { - logerror("M6808: illegal opcode: address %04X, op %02X\n",PC,(int) M_RDOP_ARG(PC)&0xFF); + logerror("m6800: illegal opcode: address %04X, op %02X\n",PC,(int) M_RDOP_ARG(PC)&0xFF); TAKE_TRAP; } #endif @@ -204,7 +204,7 @@ INLINE void daa( void ) INLINE void slp (void) { /* wait for next IRQ (same as waiting of wai) */ - m6808.wai_state |= HD63701_SLP; + m68xx.wai_state |= HD63701_SLP; EAT_CYCLES; } #endif @@ -355,13 +355,13 @@ INLINE void ins (void) /* $32 PULA inherent ----- */ INLINE void pula (void) { - PULLBYTE(m6808.d.b.h); + PULLBYTE(m68xx.d.b.h); } /* $33 PULB inherent ----- */ INLINE void pulb (void) { - PULLBYTE(m6808.d.b.l); + PULLBYTE(m68xx.d.b.l); } /* $34 DES inherent ----- */ @@ -379,13 +379,13 @@ INLINE void txs (void) /* $36 PSHA inherent ----- */ INLINE void psha (void) { - PUSHBYTE(m6808.d.b.h); + PUSHBYTE(m68xx.d.b.h); } /* $37 PSHB inherent ----- */ INLINE void pshb (void) { - PUSHBYTE(m6808.d.b.l); + PUSHBYTE(m68xx.d.b.l); } /* $38 PULX inherent ----- */ @@ -441,14 +441,14 @@ INLINE void wai( void ) * WAI stacks the entire machine state on the * hardware stack, then waits for an interrupt. */ - m6808.wai_state |= M6800_WAI; + m68xx.wai_state |= M6800_WAI; PUSHWORD(pPC); PUSHWORD(pX); PUSHBYTE(A); PUSHBYTE(B); PUSHBYTE(CC); CHECK_IRQ_LINES(); - if (m6808.wai_state & M6800_WAI) EAT_CYCLES; + if (m68xx.wai_state & M6800_WAI) EAT_CYCLES; } /* $3f SWI absolute indirect ----- */ @@ -1092,7 +1092,7 @@ INLINE void bsr( void ) /* $8e LDS immediate -**0- */ INLINE void lds_im( void ) { - IMMWORD(m6808.s); + IMMWORD(m68xx.s); CLR_NZV; SET_NZ16(S); } @@ -1103,7 +1103,7 @@ INLINE void sts_im( void ) CLR_NZV; SET_NZ16(S); IMM16; - WM16(EAD,&m6808.s); + WM16(EAD,&m68xx.s); } /* $90 SUBA direct ?**** */ @@ -1244,7 +1244,7 @@ INLINE void jsr_di( void ) /* $9e LDS direct -**0- */ INLINE void lds_di( void ) { - DIRWORD(m6808.s); + DIRWORD(m68xx.s); CLR_NZV; SET_NZ16(S); } @@ -1255,7 +1255,7 @@ INLINE void sts_di( void ) CLR_NZV; SET_NZ16(S); DIRECT; - WM16(EAD,&m6808.s); + WM16(EAD,&m68xx.s); } /* $a0 SUBA indexed ?**** */ @@ -1396,7 +1396,7 @@ INLINE void jsr_ix( void ) /* $ae LDS indexed -**0- */ INLINE void lds_ix( void ) { - IDXWORD(m6808.s); + IDXWORD(m68xx.s); CLR_NZV; SET_NZ16(S); } @@ -1407,7 +1407,7 @@ INLINE void sts_ix( void ) CLR_NZV; SET_NZ16(S); INDEXED; - WM16(EAD,&m6808.s); + WM16(EAD,&m68xx.s); } /* $b0 SUBA extended ?**** */ @@ -1548,7 +1548,7 @@ INLINE void jsr_ex( void ) /* $be LDS extended -**0- */ INLINE void lds_ex( void ) { - EXTWORD(m6808.s); + EXTWORD(m68xx.s); CLR_NZV; SET_NZ16(S); } @@ -1559,7 +1559,7 @@ INLINE void sts_ex( void ) CLR_NZV; SET_NZ16(S); EXTENDED; - WM16(EAD,&m6808.s); + WM16(EAD,&m68xx.s); } /* $c0 SUBB immediate ?**** */ @@ -1669,7 +1669,7 @@ INLINE void addb_im( void ) /* $CC LDD immediate -**0- */ INLINE void ldd_im( void ) { - IMMWORD(m6808.d); + IMMWORD(m68xx.d); CLR_NZV; SET_NZ16(D); } @@ -1681,13 +1681,13 @@ INLINE void std_im( void ) IMM16; CLR_NZV; SET_NZ16(D); - WM16(EAD,&m6808.d); + WM16(EAD,&m68xx.d); } /* $ce LDX immediate -**0- */ INLINE void ldx_im( void ) { - IMMWORD(m6808.x); + IMMWORD(m68xx.x); CLR_NZV; SET_NZ16(X); } @@ -1698,7 +1698,7 @@ INLINE void stx_im( void ) CLR_NZV; SET_NZ16(X); IMM16; - WM16(EAD,&m6808.x); + WM16(EAD,&m68xx.x); } /* $d0 SUBB direct ?**** */ @@ -1807,7 +1807,7 @@ INLINE void addb_di( void ) /* $dc LDD direct -**0- */ INLINE void ldd_di( void ) { - DIRWORD(m6808.d); + DIRWORD(m68xx.d); CLR_NZV; SET_NZ16(D); } @@ -1818,13 +1818,13 @@ INLINE void std_di( void ) DIRECT; CLR_NZV; SET_NZ16(D); - WM16(EAD,&m6808.d); + WM16(EAD,&m68xx.d); } /* $de LDX direct -**0- */ INLINE void ldx_di( void ) { - DIRWORD(m6808.x); + DIRWORD(m68xx.x); CLR_NZV; SET_NZ16(X); } @@ -1835,7 +1835,7 @@ INLINE void stx_di( void ) CLR_NZV; SET_NZ16(X); DIRECT; - WM16(EAD,&m6808.x); + WM16(EAD,&m68xx.x); } /* $e0 SUBB indexed ?**** */ @@ -1944,7 +1944,7 @@ INLINE void addb_ix( void ) /* $ec LDD indexed -**0- */ INLINE void ldd_ix( void ) { - IDXWORD(m6808.d); + IDXWORD(m68xx.d); CLR_NZV; SET_NZ16(D); } @@ -1964,13 +1964,13 @@ INLINE void std_ix( void ) INDEXED; CLR_NZV; SET_NZ16(D); - WM16(EAD,&m6808.d); + WM16(EAD,&m68xx.d); } /* $ee LDX indexed -**0- */ INLINE void ldx_ix( void ) { - IDXWORD(m6808.x); + IDXWORD(m68xx.x); CLR_NZV; SET_NZ16(X); } @@ -1981,7 +1981,7 @@ INLINE void stx_ix( void ) CLR_NZV; SET_NZ16(X); INDEXED; - WM16(EAD,&m6808.x); + WM16(EAD,&m68xx.x); } /* $f0 SUBB extended ?**** */ @@ -2095,7 +2095,7 @@ INLINE void addb_ex( void ) /* $fc LDD extended -**0- */ INLINE void ldd_ex( void ) { - EXTWORD(m6808.d); + EXTWORD(m68xx.d); CLR_NZV; SET_NZ16(D); } @@ -2119,13 +2119,13 @@ INLINE void std_ex( void ) EXTENDED; CLR_NZV; SET_NZ16(D); - WM16(EAD,&m6808.d); + WM16(EAD,&m68xx.d); } /* $fe LDX extended -**0- */ INLINE void ldx_ex( void ) { - EXTWORD(m6808.x); + EXTWORD(m68xx.x); CLR_NZV; SET_NZ16(X); } @@ -2136,5 +2136,5 @@ INLINE void stx_ex( void ) CLR_NZV; SET_NZ16(X); EXTENDED; - WM16(EAD,&m6808.x); + WM16(EAD,&m68xx.x); } diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c index 0c7a4d3931c..10bb59b6362 100644 --- a/src/emu/cpu/m6800/m6800.c +++ b/src/emu/cpu/m6800/m6800.c @@ -1,6 +1,6 @@ /*** m6800: Portable 6800 class emulator ************************************* - m6800.c + m68xx.c References: @@ -28,7 +28,7 @@ History 990316 HJB Renamed to 6800, since that's the basic CPU. - Added different cycle count tables for M6800/2/8, M6801/3 and HD63701. + Added different cycle count tables for M6800/2/8, M6801/3 and m68xx. 990314 HJB Also added the M6800 subtype. @@ -110,7 +110,8 @@ typedef struct UINT8 irq_state[2]; /* IRQ line state [IRQ1,TIN] */ UINT8 ic_eddge; /* InputCapture eddge , b.0=fall,b.1=raise */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; int extra_cycles; /* cycles used for interrupts */ void (* const * insn)(void); /* instruction table */ const UINT8 *cycles; /* clock cycle of instruction table */ @@ -139,42 +140,35 @@ typedef struct } m6800_Regs; /* 680x registers */ -static m6800_Regs m6800; +static m6800_Regs m68xx; static emu_timer *m6800_rx_timer; static emu_timer *m6800_tx_timer; -#define m6801 m6800 -#define m6802 m6800 -#define m6803 m6800 -#define m6808 m6800 -#define hd63701 m6800 -#define nsc8105 m6800 - -#define pPPC m6800.ppc -#define pPC m6800.pc -#define pS m6800.s -#define pX m6800.x -#define pD m6800.d - -#define PC m6800.pc.w.l -#define PCD m6800.pc.d -#define S m6800.s.w.l -#define SD m6800.s.d -#define X m6800.x.w.l -#define D m6800.d.w.l -#define A m6800.d.b.h -#define B m6800.d.b.l -#define CC m6800.cc - -#define CT m6800.counter.w.l -#define CTH m6800.counter.w.h -#define CTD m6800.counter.d -#define OC m6800.output_compare.w.l -#define OCH m6800.output_compare.w.h -#define OCD m6800.output_compare.d -#define TOH m6800.timer_over.w.l -#define TOD m6800.timer_over.d +#define pPPC m68xx.ppc +#define pPC m68xx.pc +#define pS m68xx.s +#define pX m68xx.x +#define pD m68xx.d + +#define PC m68xx.pc.w.l +#define PCD m68xx.pc.d +#define S m68xx.s.w.l +#define SD m68xx.s.d +#define X m68xx.x.w.l +#define D m68xx.d.w.l +#define A m68xx.d.b.h +#define B m68xx.d.b.l +#define CC m68xx.cc + +#define CT m68xx.counter.w.l +#define CTH m68xx.counter.w.h +#define CTD m68xx.counter.d +#define OC m68xx.output_compare.w.l +#define OCH m68xx.output_compare.w.h +#define OCD m68xx.output_compare.d +#define TOH m68xx.timer_over.w.l +#define TOD m68xx.timer_over.d static PAIR ea; /* effective address */ #define EAD ea.d @@ -186,7 +180,7 @@ static int m6800_ICount; /* point of next timer event */ static UINT32 timer_next; -/* DS -- THESE ARE RE-DEFINED IN m6800.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */ +/* DS -- THESE ARE RE-DEFINED IN m68xx.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */ #define RM M6800_RDMEM #define WM M6800_WRMEM #define M_RDOP M6800_RDOP @@ -202,7 +196,7 @@ static UINT32 timer_next; #define PULLWORD(w) S++; w.d = RM(SD)<<8; S++; w.d |= RM(SD) #define MODIFIED_tcsr { \ - m6800.irq2 = (m6800.tcsr&(m6800.tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF); \ + m68xx.irq2 = (m68xx.tcsr&(m68xx.tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF); \ } #define SET_TIMER_EVENT { \ @@ -269,19 +263,19 @@ enum debugger_instruction_hook(Machine, PCD); \ ireg=M_RDOP(PCD); \ PC++; \ - (*m6800.insn[ireg])(); \ - INCREMENT_COUNTER(m6800.cycles[ireg]); \ + (*m68xx.insn[ireg])(); \ + INCREMENT_COUNTER(m68xx.cycles[ireg]); \ } /* check the IRQ lines for pending interrupts */ #define CHECK_IRQ_LINES() { \ if( !(CC & 0x10) ) \ { \ - if( m6800.irq_state[M6800_IRQ_LINE] != CLEAR_LINE ) \ + if( m68xx.irq_state[M6800_IRQ_LINE] != CLEAR_LINE ) \ { /* standard IRQ */ \ ENTER_INTERRUPT("M6800#%d take IRQ1\n",0xfff8); \ - if( m6800.irq_callback ) \ - (void)(*m6800.irq_callback)(M6800_IRQ_LINE); \ + if( m68xx.irq_callback ) \ + (void)(*m68xx.irq_callback)(m68xx.device, M6800_IRQ_LINE); \ } \ else \ m6800_check_irq2(); \ @@ -531,11 +525,11 @@ INLINE void WM16( UINT32 Addr, PAIR *p ) static void ENTER_INTERRUPT(const char *message,UINT16 irq_vector) { LOG((message, cpu_getactivecpu())); - if( m6800.wai_state & (M6800_WAI|M6800_SLP) ) + if( m68xx.wai_state & (M6800_WAI|M6800_SLP) ) { - if( m6800.wai_state & M6800_WAI ) - m6800.extra_cycles += 4; - m6800.wai_state &= ~(M6800_WAI|M6800_SLP); + if( m68xx.wai_state & M6800_WAI ) + m68xx.extra_cycles += 4; + m68xx.wai_state &= ~(M6800_WAI|M6800_SLP); } else { @@ -544,7 +538,7 @@ static void ENTER_INTERRUPT(const char *message,UINT16 irq_vector) PUSHBYTE(A); PUSHBYTE(B); PUSHBYTE(CC); - m6800.extra_cycles += 12; + m68xx.extra_cycles += 12; } SEI; PCD = RM16( irq_vector ); @@ -553,23 +547,23 @@ static void ENTER_INTERRUPT(const char *message,UINT16 irq_vector) static void m6800_check_irq2(void) { - if ((m6800.tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF)) + if ((m68xx.tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF)) { TAKE_ICI; - if( m6800.irq_callback ) - (void)(*m6800.irq_callback)(M6800_TIN_LINE); + if( m68xx.irq_callback ) + (void)(*m68xx.irq_callback)(m68xx.device, M6800_TIN_LINE); } - else if ((m6800.tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF)) + else if ((m68xx.tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF)) { TAKE_OCI; } - else if ((m6800.tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF)) + else if ((m68xx.tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF)) { TAKE_TOI; } - else if (((m6800.trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) == (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) || - ((m6800.trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) == (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) || - ((m6800.trcsr & (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)) == (M6800_TRCSR_TIE|M6800_TRCSR_TDRE))) + else if (((m68xx.trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) == (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) || + ((m68xx.trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) == (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) || + ((m68xx.trcsr & (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)) == (M6800_TRCSR_TIE|M6800_TRCSR_TDRE))) { TAKE_SCI; } @@ -582,10 +576,10 @@ static void check_timer_event(void) if( CTD >= OCD) { OCH++; // next IRQ point - m6800.tcsr |= TCSR_OCF; - m6800.pending_tcsr |= TCSR_OCF; + m68xx.tcsr |= TCSR_OCF; + m68xx.pending_tcsr |= TCSR_OCF; MODIFIED_tcsr; - if ( !(CC & 0x10) && (m6800.tcsr & TCSR_EOCI)) + if ( !(CC & 0x10) && (m68xx.tcsr & TCSR_EOCI)) TAKE_OCI; } /* TOI */ @@ -595,10 +589,10 @@ static void check_timer_event(void) #if 0 CLEANUP_conters; #endif - m6800.tcsr |= TCSR_TOF; - m6800.pending_tcsr |= TCSR_TOF; + m68xx.tcsr |= TCSR_TOF; + m68xx.pending_tcsr |= TCSR_TOF; MODIFIED_tcsr; - if ( !(CC & 0x10) && (m6800.tcsr & TCSR_ETOI)) + if ( !(CC & 0x10) && (m68xx.tcsr & TCSR_ETOI)) TAKE_TOI; } /* set next event */ @@ -614,13 +608,13 @@ static void check_timer_event(void) #if (HAS_M6801||HAS_M6803||HAS_HD63701) static void m6800_tx(int value) { - m6800.port2_data = (m6800.port2_data & 0xef) | (value << 4); + m68xx.port2_data = (m68xx.port2_data & 0xef) | (value << 4); - if(m6800.port2_ddr == 0xff) - io_write_byte_8be(M6803_PORT2,m6800.port2_data); + if(m68xx.port2_ddr == 0xff) + io_write_byte_8be(M6803_PORT2,m68xx.port2_data); else - io_write_byte_8be(M6803_PORT2,(m6800.port2_data & m6800.port2_ddr) - | (io_read_byte_8be(M6803_PORT2) & (m6800.port2_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT2,(m68xx.port2_data & m68xx.port2_ddr) + | (io_read_byte_8be(M6803_PORT2) & (m68xx.port2_ddr ^ 0xff))); } static int m6800_rx(void) @@ -632,125 +626,125 @@ static TIMER_CALLBACK(m6800_tx_tick) { int cpunum = param; - if (m6800.trcsr & M6800_TRCSR_TE) + if (m68xx.trcsr & M6800_TRCSR_TE) { // force Port 2 bit 4 as output - m6800.port2_ddr |= M6800_PORT2_IO4; + m68xx.port2_ddr |= M6800_PORT2_IO4; - switch (m6800.txstate) + switch (m68xx.txstate) { case M6800_TX_STATE_INIT: - m6800.tx = 1; - m6800.txbits++; + m68xx.tx = 1; + m68xx.txbits++; - if (m6800.txbits == 10) + if (m68xx.txbits == 10) { - m6800.txstate = M6800_TX_STATE_READY; - m6800.txbits = M6800_SERIAL_START; + m68xx.txstate = M6800_TX_STATE_READY; + m68xx.txbits = M6800_SERIAL_START; } break; case M6800_TX_STATE_READY: - switch (m6800.txbits) + switch (m68xx.txbits) { case M6800_SERIAL_START: - if (m6800.trcsr & M6800_TRCSR_TDRE) + if (m68xx.trcsr & M6800_TRCSR_TDRE) { // transmit buffer is empty, send consecutive '1's - m6800.tx = 1; + m68xx.tx = 1; } else { // transmit buffer is full, send data // load TDR to shift register - m6800.tsr = m6800.tdr; + m68xx.tsr = m68xx.tdr; // transmit buffer is empty, set TDRE flag - m6800.trcsr |= M6800_TRCSR_TDRE; + m68xx.trcsr |= M6800_TRCSR_TDRE; // send start bit '0' - m6800.tx = 0; + m68xx.tx = 0; - m6800.txbits++; + m68xx.txbits++; } break; case M6800_SERIAL_STOP: // send stop bit '1' - m6800.tx = 1; + m68xx.tx = 1; cpuintrf_push_context(cpunum); CHECK_IRQ_LINES(); cpuintrf_pop_context(); - m6800.txbits = M6800_SERIAL_START; + m68xx.txbits = M6800_SERIAL_START; break; default: // send data bit '0' or '1' - m6800.tx = m6800.tsr & 0x01; + m68xx.tx = m68xx.tsr & 0x01; // shift transmit register - m6800.tsr >>= 1; + m68xx.tsr >>= 1; - m6800.txbits++; + m68xx.txbits++; break; } break; } } - m6800_tx(m6800.tx); + m6800_tx(m68xx.tx); } static TIMER_CALLBACK(m6800_rx_tick) { int cpunum = param; - if (m6800.trcsr & M6800_TRCSR_RE) + if (m68xx.trcsr & M6800_TRCSR_RE) { - if (m6800.trcsr & M6800_TRCSR_WU) + if (m68xx.trcsr & M6800_TRCSR_WU) { // wait for 10 bits of '1' if (m6800_rx() == 1) { - m6800.rxbits++; + m68xx.rxbits++; - if (m6800.rxbits == 10) + if (m68xx.rxbits == 10) { - m6800.trcsr &= ~M6800_TRCSR_WU; - m6800.rxbits = M6800_SERIAL_START; + m68xx.trcsr &= ~M6800_TRCSR_WU; + m68xx.rxbits = M6800_SERIAL_START; } } else { - m6800.rxbits = M6800_SERIAL_START; + m68xx.rxbits = M6800_SERIAL_START; } } else { // receive data - switch (m6800.rxbits) + switch (m68xx.rxbits) { case M6800_SERIAL_START: if (m6800_rx() == 0) { // start bit found - m6800.rxbits++; + m68xx.rxbits++; } break; case M6800_SERIAL_STOP: if (m6800_rx() == 1) { - if (m6800.trcsr & M6800_TRCSR_RDRF) + if (m68xx.trcsr & M6800_TRCSR_RDRF) { // overrun error - m6800.trcsr |= M6800_TRCSR_ORFE; + m68xx.trcsr |= M6800_TRCSR_ORFE; cpuintrf_push_context(cpunum); CHECK_IRQ_LINES(); @@ -758,13 +752,13 @@ static TIMER_CALLBACK(m6800_rx_tick) } else { - if (!(m6800.trcsr & M6800_TRCSR_ORFE)) + if (!(m68xx.trcsr & M6800_TRCSR_ORFE)) { // transfer data into receive register - m6800.rdr = m6800.rsr; + m68xx.rdr = m68xx.rsr; // set RDRF flag - m6800.trcsr |= M6800_TRCSR_RDRF; + m68xx.trcsr |= M6800_TRCSR_RDRF; cpuintrf_push_context(cpunum); CHECK_IRQ_LINES(); @@ -776,31 +770,31 @@ static TIMER_CALLBACK(m6800_rx_tick) { // framing error - if (!(m6800.trcsr & M6800_TRCSR_ORFE)) + if (!(m68xx.trcsr & M6800_TRCSR_ORFE)) { // transfer unframed data into receive register - m6800.rdr = m6800.rsr; + m68xx.rdr = m68xx.rsr; } - m6800.trcsr |= M6800_TRCSR_ORFE; - m6800.trcsr &= ~M6800_TRCSR_RDRF; + m68xx.trcsr |= M6800_TRCSR_ORFE; + m68xx.trcsr &= ~M6800_TRCSR_RDRF; cpuintrf_push_context(cpunum); CHECK_IRQ_LINES(); cpuintrf_pop_context(); } - m6800.rxbits = M6800_SERIAL_START; + m68xx.rxbits = M6800_SERIAL_START; break; default: // shift receive register - m6800.rsr >>= 1; + m68xx.rsr >>= 1; // receive bit into register - m6800.rsr |= (m6800_rx() << 7); + m68xx.rsr |= (m6800_rx() << 7); - m6800.rxbits++; + m68xx.rxbits++; break; } } @@ -813,94 +807,95 @@ static TIMER_CALLBACK(m6800_rx_tick) ****************************************************************************/ static void state_register(const char *type, int index) { - state_save_register_item(type, index, m6800.ppc.w.l); - state_save_register_item(type, index, m6800.pc.w.l); - state_save_register_item(type, index, m6800.s.w.l); - state_save_register_item(type, index, m6800.x.w.l); - state_save_register_item(type, index, m6800.d.w.l); - state_save_register_item(type, index, m6800.cc); - state_save_register_item(type, index, m6800.wai_state); - state_save_register_item(type, index, m6800.nmi_state); - state_save_register_item_array(type, index, m6800.irq_state); - state_save_register_item(type, index, m6800.ic_eddge); - - state_save_register_item(type, index, m6800.port1_ddr); - state_save_register_item(type, index, m6800.port2_ddr); - state_save_register_item(type, index, m6800.port3_ddr); - state_save_register_item(type, index, m6800.port4_ddr); - state_save_register_item(type, index, m6800.port1_data); - state_save_register_item(type, index, m6800.port2_data); - state_save_register_item(type, index, m6800.port3_data); - state_save_register_item(type, index, m6800.port4_data); - state_save_register_item(type, index, m6800.tcsr); - state_save_register_item(type, index, m6800.pending_tcsr); - state_save_register_item(type, index, m6800.irq2); - state_save_register_item(type, index, m6800.ram_ctrl); - - state_save_register_item(type, index, m6800.counter.d); - state_save_register_item(type, index, m6800.output_compare.d); - state_save_register_item(type, index, m6800.input_capture); - state_save_register_item(type, index, m6800.timer_over.d); - - state_save_register_item(type, index, m6800.clock); - state_save_register_item(type, index, m6800.trcsr); - state_save_register_item(type, index, m6800.rmcr); - state_save_register_item(type, index, m6800.rdr); - state_save_register_item(type, index, m6800.tdr); - state_save_register_item(type, index, m6800.rsr); - state_save_register_item(type, index, m6800.tsr); - state_save_register_item(type, index, m6800.rxbits); - state_save_register_item(type, index, m6800.txbits); - state_save_register_item(type, index, m6800.txstate); - state_save_register_item(type, index, m6800.trcsr_read); - state_save_register_item(type, index, m6800.tx); + state_save_register_item(type, index, m68xx.ppc.w.l); + state_save_register_item(type, index, m68xx.pc.w.l); + state_save_register_item(type, index, m68xx.s.w.l); + state_save_register_item(type, index, m68xx.x.w.l); + state_save_register_item(type, index, m68xx.d.w.l); + state_save_register_item(type, index, m68xx.cc); + state_save_register_item(type, index, m68xx.wai_state); + state_save_register_item(type, index, m68xx.nmi_state); + state_save_register_item_array(type, index, m68xx.irq_state); + state_save_register_item(type, index, m68xx.ic_eddge); + + state_save_register_item(type, index, m68xx.port1_ddr); + state_save_register_item(type, index, m68xx.port2_ddr); + state_save_register_item(type, index, m68xx.port3_ddr); + state_save_register_item(type, index, m68xx.port4_ddr); + state_save_register_item(type, index, m68xx.port1_data); + state_save_register_item(type, index, m68xx.port2_data); + state_save_register_item(type, index, m68xx.port3_data); + state_save_register_item(type, index, m68xx.port4_data); + state_save_register_item(type, index, m68xx.tcsr); + state_save_register_item(type, index, m68xx.pending_tcsr); + state_save_register_item(type, index, m68xx.irq2); + state_save_register_item(type, index, m68xx.ram_ctrl); + + state_save_register_item(type, index, m68xx.counter.d); + state_save_register_item(type, index, m68xx.output_compare.d); + state_save_register_item(type, index, m68xx.input_capture); + state_save_register_item(type, index, m68xx.timer_over.d); + + state_save_register_item(type, index, m68xx.clock); + state_save_register_item(type, index, m68xx.trcsr); + state_save_register_item(type, index, m68xx.rmcr); + state_save_register_item(type, index, m68xx.rdr); + state_save_register_item(type, index, m68xx.tdr); + state_save_register_item(type, index, m68xx.rsr); + state_save_register_item(type, index, m68xx.tsr); + state_save_register_item(type, index, m68xx.rxbits); + state_save_register_item(type, index, m68xx.txbits); + state_save_register_item(type, index, m68xx.txstate); + state_save_register_item(type, index, m68xx.trcsr_read); + state_save_register_item(type, index, m68xx.tx); } -static void m6800_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6800 ) { -// m6800.subtype = SUBTYPE_M6800; - m6800.insn = m6800_insn; - m6800.cycles = cycles_6800; - m6800.irq_callback = irqcallback; +// m68xx.subtype = SUBTYPE_M6800; + m68xx.insn = m6800_insn; + m68xx.cycles = cycles_6800; + m68xx.irq_callback = irqcallback; + m68xx.device = device; state_register("m6800", index); } -static void m6800_reset(void) +static CPU_RESET( m6800 ) { SEI; /* IRQ disabled */ PCD = RM16( 0xfffe ); CHANGE_PC(); - m6800.wai_state = 0; - m6800.nmi_state = 0; - m6800.irq_state[M6800_IRQ_LINE] = 0; - m6800.irq_state[M6800_TIN_LINE] = 0; - m6800.ic_eddge = 0; + m68xx.wai_state = 0; + m68xx.nmi_state = 0; + m68xx.irq_state[M6800_IRQ_LINE] = 0; + m68xx.irq_state[M6800_TIN_LINE] = 0; + m68xx.ic_eddge = 0; - m6800.port1_ddr = 0x00; - m6800.port2_ddr = 0x00; + m68xx.port1_ddr = 0x00; + m68xx.port2_ddr = 0x00; /* TODO: on reset port 2 should be read to determine the operating mode (bits 0-2) */ - m6800.tcsr = 0x00; - m6800.pending_tcsr = 0x00; - m6800.irq2 = 0; + m68xx.tcsr = 0x00; + m68xx.pending_tcsr = 0x00; + m68xx.irq2 = 0; CTD = 0x0000; OCD = 0xffff; TOD = 0xffff; - m6800.ram_ctrl |= 0x40; + m68xx.ram_ctrl |= 0x40; - m6800.trcsr = M6800_TRCSR_TDRE; - m6800.rmcr = 0; + m68xx.trcsr = M6800_TRCSR_TDRE; + m68xx.rmcr = 0; if (m6800_rx_timer) timer_enable(m6800_rx_timer, 0); if (m6800_tx_timer) timer_enable(m6800_tx_timer, 0); - m6800.txstate = M6800_TX_STATE_INIT; - m6800.txbits = m6800.rxbits = 0; - m6800.trcsr_read = 0; + m68xx.txstate = M6800_TX_STATE_INIT; + m68xx.txbits = m68xx.rxbits = 0; + m68xx.trcsr_read = 0; } /**************************************************************************** * Shut down CPU emulation ****************************************************************************/ -static void m6800_exit(void) +static CPU_EXIT( m6800 ) { /* nothing to do */ } @@ -911,7 +906,7 @@ static void m6800_exit(void) static void m6800_get_context(void *dst) { if( dst ) - *(m6800_Regs*)dst = m6800; + *(m6800_Regs*)dst = m68xx; } @@ -921,7 +916,7 @@ static void m6800_get_context(void *dst) static void m6800_set_context(void *src) { if( src ) - m6800 = *(m6800_Regs*)src; + m68xx = *(m6800_Regs*)src; CHANGE_PC(); CHECK_IRQ_LINES(); /* HJB 990417 */ } @@ -931,9 +926,9 @@ static void set_irq_line(int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m6800.nmi_state == state) return; + if (m68xx.nmi_state == state) return; LOG(("M6800#%d set_nmi_line %d \n", cpu_getactivecpu(), state)); - m6800.nmi_state = state; + m68xx.nmi_state = state; if (state == CLEAR_LINE) return; /* NMI */ @@ -943,9 +938,9 @@ static void set_irq_line(int irqline, int state) { int eddge; - if (m6800.irq_state[irqline] == state) return; + if (m68xx.irq_state[irqline] == state) return; LOG(("M6800#%d set_irq_line %d,%d\n", cpu_getactivecpu(), irqline, state)); - m6800.irq_state[irqline] = state; + m68xx.irq_state[irqline] = state; switch(irqline) { @@ -954,12 +949,12 @@ static void set_irq_line(int irqline, int state) break; case M6800_TIN_LINE: eddge = (state == CLEAR_LINE ) ? 2 : 0; - if( ((m6800.tcsr&TCSR_IEDG) ^ (state==CLEAR_LINE ? TCSR_IEDG : 0))==0 ) + if( ((m68xx.tcsr&TCSR_IEDG) ^ (state==CLEAR_LINE ? TCSR_IEDG : 0))==0 ) return; /* active edge in */ - m6800.tcsr |= TCSR_ICF; - m6800.pending_tcsr |= TCSR_ICF; - m6800.input_capture = CT; + m68xx.tcsr |= TCSR_ICF; + m68xx.pending_tcsr |= TCSR_ICF; + m68xx.input_capture = CT; MODIFIED_tcsr; if( !(CC & 0x10) ) m6800_check_irq2(); @@ -974,18 +969,18 @@ static void set_irq_line(int irqline, int state) /**************************************************************************** * Execute cycles CPU cycles. Return number of cycles really executed ****************************************************************************/ -static int m6800_execute(int cycles) +static CPU_EXECUTE( m6800 ) { UINT8 ireg; m6800_ICount = cycles; CLEANUP_conters; - INCREMENT_COUNTER(m6800.extra_cycles); - m6800.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; do { - if( m6800.wai_state & M6800_WAI ) + if( m68xx.wai_state & M6800_WAI ) { EAT_CYCLES; } @@ -1259,8 +1254,8 @@ static int m6800_execute(int cycles) } } while( m6800_ICount>0 ); - INCREMENT_COUNTER(m6800.extra_cycles); - m6800.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; return cycles - m6800_ICount; } @@ -1269,14 +1264,15 @@ static int m6800_execute(int cycles) * M6801 almost (fully?) equal to the M6803 ****************************************************************************/ #if (HAS_M6801) -static void m6801_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6801 ) { -// m6800.subtype = SUBTYPE_M6801; - m6800.insn = m6803_insn; - m6800.cycles = cycles_6803; - m6800.irq_callback = irqcallback; +// m68xx.subtype = SUBTYPE_M6801; + m68xx.insn = m6803_insn; + m68xx.cycles = cycles_6803; + m68xx.irq_callback = irqcallback; + m68xx.device = device; - m6800.clock = clock; + m68xx.clock = clock; m6800_rx_timer = timer_alloc(m6800_rx_tick, NULL); m6800_tx_timer = timer_alloc(m6800_tx_tick, NULL); @@ -1288,12 +1284,13 @@ static void m6801_init(int index, int clock, const void *config, int (*irqcallba * M6802 almost (fully?) equal to the M6800 ****************************************************************************/ #if (HAS_M6802) -static void m6802_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6802 ) { -// m6800.subtype = SUBTYPE_M6802; - m6800.insn = m6800_insn; - m6800.cycles = cycles_6800; - m6800.irq_callback = irqcallback; +// m68xx.subtype = SUBTYPE_M6802; + m68xx.insn = m6800_insn; + m68xx.cycles = cycles_6800; + m68xx.irq_callback = irqcallback; + m68xx.device = device; state_register("m6802", index); } #endif @@ -1302,14 +1299,15 @@ static void m6802_init(int index, int clock, const void *config, int (*irqcallba * M6803 almost (fully?) equal to the M6801 ****************************************************************************/ #if (HAS_M6803) -static void m6803_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6803 ) { -// m6800.subtype = SUBTYPE_M6803; - m6800.insn = m6803_insn; - m6800.cycles = cycles_6803; - m6800.irq_callback = irqcallback; +// m68xx.subtype = SUBTYPE_M6803; + m68xx.insn = m6803_insn; + m68xx.cycles = cycles_6803; + m68xx.irq_callback = irqcallback; + m68xx.device = device; - m6800.clock = clock; + m68xx.clock = clock; m6800_rx_timer = timer_alloc(m6800_rx_tick, NULL); m6800_tx_timer = timer_alloc(m6800_tx_tick, NULL); @@ -1321,18 +1319,18 @@ static void m6803_init(int index, int clock, const void *config, int (*irqcallba * Execute cycles CPU cycles. Return number of cycles really executed ****************************************************************************/ #if (HAS_M6803||HAS_M6801) -static int m6803_execute(int cycles) +static CPU_EXECUTE( m6803 ) { UINT8 ireg; m6800_ICount = cycles; CLEANUP_conters; - INCREMENT_COUNTER(m6803.extra_cycles); - m6803.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; do { - if( m6803.wai_state & M6800_WAI ) + if( m68xx.wai_state & M6800_WAI ) { EAT_CYCLES; } @@ -1606,8 +1604,8 @@ static int m6803_execute(int cycles) } } while( m6800_ICount>0 ); - INCREMENT_COUNTER(m6803.extra_cycles); - m6803.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; return cycles - m6800_ICount; } @@ -1630,12 +1628,13 @@ ADDRESS_MAP_END * M6808 almost (fully?) equal to the M6800 ****************************************************************************/ #if (HAS_M6808) -static void m6808_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6808 ) { -// m6800.subtype = SUBTYPE_M6808; - m6800.insn = m6800_insn; - m6800.cycles = cycles_6800; - m6800.irq_callback = irqcallback; +// m68xx.subtype = SUBTYPE_M6808; + m68xx.insn = m6800_insn; + m68xx.cycles = cycles_6800; + m68xx.irq_callback = irqcallback; + m68xx.device = device; state_register("m6808", index); } #endif @@ -1645,14 +1644,15 @@ static void m6808_init(int index, int clock, const void *config, int (*irqcallba ****************************************************************************/ #if (HAS_HD63701) -static void hd63701_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( hd63701 ) { -// m6800.subtype = SUBTYPE_HD63701; - m6800.insn = hd63701_insn; - m6800.cycles = cycles_63701; - m6800.irq_callback = irqcallback; +// m68xx.subtype = SUBTYPE_HD63701; + m68xx.insn = hd63701_insn; + m68xx.cycles = cycles_63701; + m68xx.irq_callback = irqcallback; + m68xx.device = device; - m6800.clock = clock; + m68xx.clock = clock; m6800_rx_timer = timer_alloc(m6800_rx_tick, NULL); m6800_tx_timer = timer_alloc(m6800_tx_tick, NULL); @@ -1661,18 +1661,18 @@ static void hd63701_init(int index, int clock, const void *config, int (*irqcall /**************************************************************************** * Execute cycles CPU cycles. Return number of cycles really executed ****************************************************************************/ -static int hd63701_execute(int cycles) +static CPU_EXECUTE( hd63701 ) { UINT8 ireg; m6800_ICount = cycles; CLEANUP_conters; - INCREMENT_COUNTER(hd63701.extra_cycles); - hd63701.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; do { - if( hd63701.wai_state & (HD63701_WAI|HD63701_SLP) ) + if( m68xx.wai_state & (HD63701_WAI|HD63701_SLP) ) { EAT_CYCLES; } @@ -1946,8 +1946,8 @@ static int hd63701_execute(int cycles) } } while( m6800_ICount>0 ); - INCREMENT_COUNTER(hd63701.extra_cycles); - hd63701.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; return cycles - m6800_ICount; } @@ -1983,28 +1983,28 @@ WRITE8_HANDLER( hd63701_internal_registers_w ) * is at least one new opcode ($fc) ****************************************************************************/ #if (HAS_NSC8105) -static void nsc8105_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( nsc8105 ) { -// m6800.subtype = SUBTYPE_NSC8105; - m6800.insn = nsc8105_insn; - m6800.cycles = cycles_nsc8105; +// m68xx.subtype = SUBTYPE_NSC8105; + m68xx.insn = nsc8105_insn; + m68xx.cycles = cycles_nsc8105; state_register("nsc8105", index); } /**************************************************************************** * Execute cycles CPU cycles. Return number of cycles really executed ****************************************************************************/ -static int nsc8105_execute(int cycles) +static CPU_EXECUTE( nsc8105 ) { UINT8 ireg; m6800_ICount = cycles; CLEANUP_conters; - INCREMENT_COUNTER(nsc8105.extra_cycles); - nsc8105.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; do { - if( nsc8105.wai_state & NSC8105_WAI ) + if( m68xx.wai_state & NSC8105_WAI ) { EAT_CYCLES; } @@ -2278,8 +2278,8 @@ static int nsc8105_execute(int cycles) } } while( m6800_ICount>0 ); - INCREMENT_COUNTER(nsc8105.extra_cycles); - nsc8105.extra_cycles = 0; + INCREMENT_COUNTER(m68xx.extra_cycles); + m68xx.extra_cycles = 0; return cycles - m6800_ICount; } @@ -2293,80 +2293,80 @@ static READ8_HANDLER( m6803_internal_registers_r ) switch (offset) { case 0x00: - return m6800.port1_ddr; + return m68xx.port1_ddr; case 0x01: - return m6800.port2_ddr; + return m68xx.port2_ddr; case 0x02: - return (io_read_byte_8be(M6803_PORT1) & (m6800.port1_ddr ^ 0xff)) - | (m6800.port1_data & m6800.port1_ddr); + return (io_read_byte_8be(M6803_PORT1) & (m68xx.port1_ddr ^ 0xff)) + | (m68xx.port1_data & m68xx.port1_ddr); case 0x03: - return (io_read_byte_8be(M6803_PORT2) & (m6800.port2_ddr ^ 0xff)) - | (m6800.port2_data & m6800.port2_ddr); + return (io_read_byte_8be(M6803_PORT2) & (m68xx.port2_ddr ^ 0xff)) + | (m68xx.port2_data & m68xx.port2_ddr); case 0x04: - return m6800.port3_ddr; + return m68xx.port3_ddr; case 0x05: - return m6800.port4_ddr; + return m68xx.port4_ddr; case 0x06: - return (io_read_byte_8be(M6803_PORT3) & (m6800.port3_ddr ^ 0xff)) - | (m6800.port3_data & m6800.port3_ddr); + return (io_read_byte_8be(M6803_PORT3) & (m68xx.port3_ddr ^ 0xff)) + | (m68xx.port3_data & m68xx.port3_ddr); case 0x07: - return (io_read_byte_8be(M6803_PORT4) & (m6800.port4_ddr ^ 0xff)) - | (m6800.port4_data & m6800.port4_ddr); + return (io_read_byte_8be(M6803_PORT4) & (m68xx.port4_ddr ^ 0xff)) + | (m68xx.port4_data & m68xx.port4_ddr); case 0x08: - m6800.pending_tcsr = 0; - return m6800.tcsr; + m68xx.pending_tcsr = 0; + return m68xx.tcsr; case 0x09: - if(!(m6800.pending_tcsr&TCSR_TOF)) + if(!(m68xx.pending_tcsr&TCSR_TOF)) { - m6800.tcsr &= ~TCSR_TOF; + m68xx.tcsr &= ~TCSR_TOF; MODIFIED_tcsr; } - return m6800.counter.b.h; + return m68xx.counter.b.h; case 0x0a: - return m6800.counter.b.l; + return m68xx.counter.b.l; case 0x0b: - if(!(m6800.pending_tcsr&TCSR_OCF)) + if(!(m68xx.pending_tcsr&TCSR_OCF)) { - m6800.tcsr &= ~TCSR_OCF; + m68xx.tcsr &= ~TCSR_OCF; MODIFIED_tcsr; } - return m6800.output_compare.b.h; + return m68xx.output_compare.b.h; case 0x0c: - if(!(m6800.pending_tcsr&TCSR_OCF)) + if(!(m68xx.pending_tcsr&TCSR_OCF)) { - m6800.tcsr &= ~TCSR_OCF; + m68xx.tcsr &= ~TCSR_OCF; MODIFIED_tcsr; } - return m6800.output_compare.b.l; + return m68xx.output_compare.b.l; case 0x0d: - if(!(m6800.pending_tcsr&TCSR_ICF)) + if(!(m68xx.pending_tcsr&TCSR_ICF)) { - m6800.tcsr &= ~TCSR_ICF; + m68xx.tcsr &= ~TCSR_ICF; MODIFIED_tcsr; } - return (m6800.input_capture >> 0) & 0xff; + return (m68xx.input_capture >> 0) & 0xff; case 0x0e: - return (m6800.input_capture >> 8) & 0xff; + return (m68xx.input_capture >> 8) & 0xff; case 0x0f: logerror("CPU #%d PC %04x: warning - read from unsupported register %02x\n",cpu_getactivecpu(),activecpu_get_pc(),offset); return 0; case 0x10: - return m6800.rmcr; + return m68xx.rmcr; case 0x11: - m6800.trcsr_read = 1; - return m6800.trcsr; + m68xx.trcsr_read = 1; + return m68xx.trcsr; case 0x12: - if (m6800.trcsr_read) + if (m68xx.trcsr_read) { - m6800.trcsr_read = 0; - m6800.trcsr = m6800.trcsr & 0x3f; + m68xx.trcsr_read = 0; + m68xx.trcsr = m68xx.trcsr & 0x3f; } - return m6800.rdr; + return m68xx.rdr; case 0x13: - return m6800.tdr; + return m68xx.tdr; case 0x14: logerror("CPU #%d PC %04x: read RAM control register\n",cpu_getactivecpu(),activecpu_get_pc()); - return m6800.ram_ctrl; + return m68xx.ram_ctrl; case 0x15: case 0x16: case 0x17: @@ -2391,94 +2391,94 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) switch (offset) { case 0x00: - if (m6800.port1_ddr != data) + if (m68xx.port1_ddr != data) { - m6800.port1_ddr = data; - if(m6800.port1_ddr == 0xff) - io_write_byte_8be(M6803_PORT1,m6800.port1_data); + m68xx.port1_ddr = data; + if(m68xx.port1_ddr == 0xff) + io_write_byte_8be(M6803_PORT1,m68xx.port1_data); else - io_write_byte_8be(M6803_PORT1,(m6800.port1_data & m6800.port1_ddr) - | (io_read_byte_8be(M6803_PORT1) & (m6800.port1_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT1,(m68xx.port1_data & m68xx.port1_ddr) + | (io_read_byte_8be(M6803_PORT1) & (m68xx.port1_ddr ^ 0xff))); } break; case 0x01: - if (m6800.port2_ddr != data) + if (m68xx.port2_ddr != data) { - m6800.port2_ddr = data; - if(m6800.port2_ddr == 0xff) - io_write_byte_8be(M6803_PORT2,m6800.port2_data); + m68xx.port2_ddr = data; + if(m68xx.port2_ddr == 0xff) + io_write_byte_8be(M6803_PORT2,m68xx.port2_data); else - io_write_byte_8be(M6803_PORT2,(m6800.port2_data & m6800.port2_ddr) - | (io_read_byte_8be(M6803_PORT2) & (m6800.port2_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT2,(m68xx.port2_data & m68xx.port2_ddr) + | (io_read_byte_8be(M6803_PORT2) & (m68xx.port2_ddr ^ 0xff))); - if (m6800.port2_ddr & 2) + if (m68xx.port2_ddr & 2) logerror("CPU #%d PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",cpu_getactivecpu(),activecpu_get_pc()); } break; case 0x02: - m6800.port1_data = data; - if(m6800.port1_ddr == 0xff) - io_write_byte_8be(M6803_PORT1,m6800.port1_data); + m68xx.port1_data = data; + if(m68xx.port1_ddr == 0xff) + io_write_byte_8be(M6803_PORT1,m68xx.port1_data); else - io_write_byte_8be(M6803_PORT1,(m6800.port1_data & m6800.port1_ddr) - | (io_read_byte_8be(M6803_PORT1) & (m6800.port1_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT1,(m68xx.port1_data & m68xx.port1_ddr) + | (io_read_byte_8be(M6803_PORT1) & (m68xx.port1_ddr ^ 0xff))); break; case 0x03: - if (m6800.trcsr & M6800_TRCSR_TE) + if (m68xx.trcsr & M6800_TRCSR_TE) { - m6800.port2_data = (data & 0xef) | (m6800.tx << 4); + m68xx.port2_data = (data & 0xef) | (m68xx.tx << 4); } else { - m6800.port2_data = data; + m68xx.port2_data = data; } - if(m6800.port2_ddr == 0xff) - io_write_byte_8be(M6803_PORT2,m6800.port2_data); + if(m68xx.port2_ddr == 0xff) + io_write_byte_8be(M6803_PORT2,m68xx.port2_data); else - io_write_byte_8be(M6803_PORT2,(m6800.port2_data & m6800.port2_ddr) - | (io_read_byte_8be(M6803_PORT2) & (m6800.port2_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT2,(m68xx.port2_data & m68xx.port2_ddr) + | (io_read_byte_8be(M6803_PORT2) & (m68xx.port2_ddr ^ 0xff))); break; case 0x04: - if (m6800.port3_ddr != data) + if (m68xx.port3_ddr != data) { - m6800.port3_ddr = data; - if(m6800.port3_ddr == 0xff) - io_write_byte_8be(M6803_PORT3,m6800.port3_data); + m68xx.port3_ddr = data; + if(m68xx.port3_ddr == 0xff) + io_write_byte_8be(M6803_PORT3,m68xx.port3_data); else - io_write_byte_8be(M6803_PORT3,(m6800.port3_data & m6800.port3_ddr) - | (io_read_byte_8be(M6803_PORT3) & (m6800.port3_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT3,(m68xx.port3_data & m68xx.port3_ddr) + | (io_read_byte_8be(M6803_PORT3) & (m68xx.port3_ddr ^ 0xff))); } break; case 0x05: - if (m6800.port4_ddr != data) + if (m68xx.port4_ddr != data) { - m6800.port4_ddr = data; - if(m6800.port4_ddr == 0xff) - io_write_byte_8be(M6803_PORT4,m6800.port4_data); + m68xx.port4_ddr = data; + if(m68xx.port4_ddr == 0xff) + io_write_byte_8be(M6803_PORT4,m68xx.port4_data); else - io_write_byte_8be(M6803_PORT4,(m6800.port4_data & m6800.port4_ddr) - | (io_read_byte_8be(M6803_PORT4) & (m6800.port4_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT4,(m68xx.port4_data & m68xx.port4_ddr) + | (io_read_byte_8be(M6803_PORT4) & (m68xx.port4_ddr ^ 0xff))); } break; case 0x06: - m6800.port3_data = data; - if(m6800.port3_ddr == 0xff) - io_write_byte_8be(M6803_PORT3,m6800.port3_data); + m68xx.port3_data = data; + if(m68xx.port3_ddr == 0xff) + io_write_byte_8be(M6803_PORT3,m68xx.port3_data); else - io_write_byte_8be(M6803_PORT3,(m6800.port3_data & m6800.port3_ddr) - | (io_read_byte_8be(M6803_PORT3) & (m6800.port3_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT3,(m68xx.port3_data & m68xx.port3_ddr) + | (io_read_byte_8be(M6803_PORT3) & (m68xx.port3_ddr ^ 0xff))); break; case 0x07: - m6800.port4_data = data; - if(m6800.port4_ddr == 0xff) - io_write_byte_8be(M6803_PORT4,m6800.port4_data); + m68xx.port4_data = data; + if(m68xx.port4_ddr == 0xff) + io_write_byte_8be(M6803_PORT4,m68xx.port4_data); else - io_write_byte_8be(M6803_PORT4,(m6800.port4_data & m6800.port4_ddr) - | (io_read_byte_8be(M6803_PORT4) & (m6800.port4_ddr ^ 0xff))); + io_write_byte_8be(M6803_PORT4,(m68xx.port4_data & m68xx.port4_ddr) + | (io_read_byte_8be(M6803_PORT4) & (m68xx.port4_ddr ^ 0xff))); break; case 0x08: - m6800.tcsr = data; - m6800.pending_tcsr &= m6800.tcsr; + m68xx.tcsr = data; + m68xx.pending_tcsr &= m68xx.tcsr; MODIFIED_tcsr; if( !(CC & 0x10) ) m6800_check_irq2(); @@ -2495,16 +2495,16 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) MODIFIED_counters; break; case 0x0b: - if( m6800.output_compare.b.h != data) + if( m68xx.output_compare.b.h != data) { - m6800.output_compare.b.h = data; + m68xx.output_compare.b.h = data; MODIFIED_counters; } break; case 0x0c: - if( m6800.output_compare.b.l != data) + if( m68xx.output_compare.b.l != data) { - m6800.output_compare.b.l = data; + m68xx.output_compare.b.l = data; MODIFIED_counters; } break; @@ -2517,9 +2517,9 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) logerror("CPU #%d PC %04x: warning - write %02x to unsupported internal register %02x\n",cpu_getactivecpu(),activecpu_get_pc(),data,offset); break; case 0x10: - m6800.rmcr = data & 0x0f; + m68xx.rmcr = data & 0x0f; - switch ((m6800.rmcr & M6800_RMCR_CC_MASK) >> 2) + switch ((m68xx.rmcr & M6800_RMCR_CC_MASK) >> 2) { case 0: case 3: // not implemented @@ -2530,32 +2530,32 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) case 1: case 2: { - int divisor = M6800_RMCR_SS[m6800.rmcr & M6800_RMCR_SS_MASK]; + int divisor = M6800_RMCR_SS[m68xx.rmcr & M6800_RMCR_SS_MASK]; - timer_adjust_periodic(m6800_rx_timer, attotime_zero, cpu_getactivecpu(), ATTOTIME_IN_HZ(m6800.clock / divisor)); - timer_adjust_periodic(m6800_tx_timer, attotime_zero, cpu_getactivecpu(), ATTOTIME_IN_HZ(m6800.clock / divisor)); + timer_adjust_periodic(m6800_rx_timer, attotime_zero, cpu_getactivecpu(), ATTOTIME_IN_HZ(m68xx.clock / divisor)); + timer_adjust_periodic(m6800_tx_timer, attotime_zero, cpu_getactivecpu(), ATTOTIME_IN_HZ(m68xx.clock / divisor)); } break; } break; case 0x11: - if ((data & M6800_TRCSR_TE) && !(m6800.trcsr & M6800_TRCSR_TE)) + if ((data & M6800_TRCSR_TE) && !(m68xx.trcsr & M6800_TRCSR_TE)) { - m6800.txstate = M6800_TX_STATE_INIT; + m68xx.txstate = M6800_TX_STATE_INIT; } - m6800.trcsr = (m6800.trcsr & 0xe0) | (data & 0x1f); + m68xx.trcsr = (m68xx.trcsr & 0xe0) | (data & 0x1f); break; case 0x13: - if (m6800.trcsr_read) + if (m68xx.trcsr_read) { - m6800.trcsr_read = 0; - m6800.trcsr &= ~M6800_TRCSR_TDRE; + m68xx.trcsr_read = 0; + m68xx.trcsr &= ~M6800_TRCSR_TDRE; } - m6800.tdr = data; + m68xx.tdr = data; break; case 0x14: logerror("CPU #%d PC %04x: write %02x to RAM control register\n",cpu_getactivecpu(),activecpu_get_pc(),data); - m6800.ram_ctrl = data; + m68xx.ram_ctrl = data; break; case 0x15: case 0x16: @@ -2590,13 +2590,13 @@ static void m6800_set_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: PC = info->i; CHANGE_PC(); break; - case CPUINFO_INT_REGISTER + M6800_PC: m6800.pc.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_PC: m68xx.pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; - case CPUINFO_INT_REGISTER + M6800_S: m6800.s.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M6800_CC: m6800.cc = info->i; break; - case CPUINFO_INT_REGISTER + M6800_A: m6800.d.b.h = info->i; break; - case CPUINFO_INT_REGISTER + M6800_B: m6800.d.b.l = info->i; break; - case CPUINFO_INT_REGISTER + M6800_X: m6800.x.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_S: m68xx.s.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_CC: m68xx.cc = info->i; break; + case CPUINFO_INT_REGISTER + M6800_A: m68xx.d.b.h = info->i; break; + case CPUINFO_INT_REGISTER + M6800_B: m68xx.d.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_X: m68xx.x.w.l = info->i; break; } } @@ -2611,7 +2611,7 @@ void m6800_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6800); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68xx); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; @@ -2632,30 +2632,30 @@ void m6800_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = m6800.irq_state[M6800_IRQ_LINE]; break; - case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: info->i = m6800.irq_state[M6800_TIN_LINE]; break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m6800.nmi_state; break; + case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = m68xx.irq_state[M6800_IRQ_LINE]; break; + case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: info->i = m68xx.irq_state[M6800_TIN_LINE]; break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m68xx.nmi_state; break; - case CPUINFO_INT_PREVIOUSPC: info->i = m6800.ppc.w.l; break; + case CPUINFO_INT_PREVIOUSPC: info->i = m68xx.ppc.w.l; break; case CPUINFO_INT_PC: info->i = PC; break; - case CPUINFO_INT_REGISTER + M6800_PC: info->i = m6800.pc.w.l; break; + case CPUINFO_INT_REGISTER + M6800_PC: info->i = m68xx.pc.w.l; break; case CPUINFO_INT_SP: info->i = S; break; - case CPUINFO_INT_REGISTER + M6800_S: info->i = m6800.s.w.l; break; - case CPUINFO_INT_REGISTER + M6800_CC: info->i = m6800.cc; break; - case CPUINFO_INT_REGISTER + M6800_A: info->i = m6800.d.b.h; break; - case CPUINFO_INT_REGISTER + M6800_B: info->i = m6800.d.b.l; break; - case CPUINFO_INT_REGISTER + M6800_X: info->i = m6800.x.w.l; break; - case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = m6800.wai_state; break; + case CPUINFO_INT_REGISTER + M6800_S: info->i = m68xx.s.w.l; break; + case CPUINFO_INT_REGISTER + M6800_CC: info->i = m68xx.cc; break; + case CPUINFO_INT_REGISTER + M6800_A: info->i = m68xx.d.b.h; break; + case CPUINFO_INT_REGISTER + M6800_B: info->i = m68xx.d.b.l; break; + case CPUINFO_INT_REGISTER + M6800_X: info->i = m68xx.x.w.l; break; + case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = m68xx.wai_state; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = m6800_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6800_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6800_set_context; break; - case CPUINFO_PTR_INIT: info->init = m6800_init; break; - case CPUINFO_PTR_RESET: info->reset = m6800_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m6800_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6800_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6800); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6800); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6800); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6800); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6800_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6800_ICount; break; @@ -2669,23 +2669,23 @@ void m6800_get_info(UINT32 state, cpuinfo *info) case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", - m6800.cc & 0x80 ? '?':'.', - m6800.cc & 0x40 ? '?':'.', - m6800.cc & 0x20 ? 'H':'.', - m6800.cc & 0x10 ? 'I':'.', - m6800.cc & 0x08 ? 'N':'.', - m6800.cc & 0x04 ? 'Z':'.', - m6800.cc & 0x02 ? 'V':'.', - m6800.cc & 0x01 ? 'C':'.'); + m68xx.cc & 0x80 ? '?':'.', + m68xx.cc & 0x40 ? '?':'.', + m68xx.cc & 0x20 ? 'H':'.', + m68xx.cc & 0x10 ? 'I':'.', + m68xx.cc & 0x08 ? 'N':'.', + m68xx.cc & 0x04 ? 'Z':'.', + m68xx.cc & 0x02 ? 'V':'.', + m68xx.cc & 0x01 ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + M6800_A: sprintf(info->s, "A:%02X", m6800.d.b.h); break; - case CPUINFO_STR_REGISTER + M6800_B: sprintf(info->s, "B:%02X", m6800.d.b.l); break; - case CPUINFO_STR_REGISTER + M6800_PC: sprintf(info->s, "PC:%04X", m6800.pc.w.l); break; - case CPUINFO_STR_REGISTER + M6800_S: sprintf(info->s, "S:%04X", m6800.s.w.l); break; - case CPUINFO_STR_REGISTER + M6800_X: sprintf(info->s, "X:%04X", m6800.x.w.l); break; - case CPUINFO_STR_REGISTER + M6800_CC: sprintf(info->s, "CC:%02X", m6800.cc); break; - case CPUINFO_STR_REGISTER + M6800_WAI_STATE: sprintf(info->s, "WAI:%X", m6800.wai_state); break; + case CPUINFO_STR_REGISTER + M6800_A: sprintf(info->s, "A:%02X", m68xx.d.b.h); break; + case CPUINFO_STR_REGISTER + M6800_B: sprintf(info->s, "B:%02X", m68xx.d.b.l); break; + case CPUINFO_STR_REGISTER + M6800_PC: sprintf(info->s, "PC:%04X", m68xx.pc.w.l); break; + case CPUINFO_STR_REGISTER + M6800_S: sprintf(info->s, "S:%04X", m68xx.s.w.l); break; + case CPUINFO_STR_REGISTER + M6800_X: sprintf(info->s, "X:%04X", m68xx.x.w.l); break; + case CPUINFO_STR_REGISTER + M6800_CC: sprintf(info->s, "CC:%02X", m68xx.cc); break; + case CPUINFO_STR_REGISTER + M6800_WAI_STATE: sprintf(info->s, "WAI:%X", m68xx.wai_state); break; } } @@ -2705,8 +2705,8 @@ void m6801_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = m6801_init; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6803_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6801); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6803); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6801_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -2731,7 +2731,7 @@ void m6802_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = m6802_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6802); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6802_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -2758,8 +2758,8 @@ void m6803_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = m6803_init; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6803_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6803); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6803); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6803_dasm; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_m6803_mem; break; @@ -2786,7 +2786,7 @@ void m6808_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = m6808_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6808); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6808_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -2813,8 +2813,8 @@ void hd63701_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = hd63701_init; break; - case CPUINFO_PTR_EXECUTE: info->execute = hd63701_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hd63701); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hd63701); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hd63701_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -2839,8 +2839,8 @@ void nsc8105_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = nsc8105_init; break; - case CPUINFO_PTR_EXECUTE: info->execute = nsc8105_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(nsc8105); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(nsc8105); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = nsc8105_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/m68000/m68k.h b/src/emu/cpu/m68000/m68k.h index 1f8666d0aeb..91e1294c360 100644 --- a/src/emu/cpu/m68000/m68k.h +++ b/src/emu/cpu/m68000/m68k.h @@ -270,7 +270,7 @@ void m68k_set_cpu_type(m68ki_cpu_core *m68k, unsigned int cpu_type); /* Do whatever initialisations the core requires. Should be called * at least once at init time. */ -m68ki_cpu_core *m68k_init(void); +void m68k_init(m68ki_cpu_core *m68k); /* Pulse the RESET pin on the CPU. * You *MUST* reset the CPU at least once to initialize the emulation diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c index 7a27ce02673..7e7ea1848ab 100644 --- a/src/emu/cpu/m68000/m68kcpu.c +++ b/src/emu/cpu/m68000/m68kcpu.c @@ -870,13 +870,10 @@ unsigned int m68k_get_virq(m68ki_cpu_core *m68k, unsigned int level) return (m68k->virq_state & (1 << level)) ? 1 : 0; } -m68ki_cpu_core *m68k_init(void) +void m68k_init(m68ki_cpu_core *m68k) { static UINT32 emulation_initialized = 0; - m68ki_cpu_core *m68k; - m68k = auto_malloc(sizeof(m68ki_cpu_core)); - /* The first call to this function initializes the opcode handler jump table */ if(!emulation_initialized) { @@ -893,8 +890,6 @@ m68ki_cpu_core *m68k_init(void) m68k_set_pc_changed_callback(m68k, NULL); m68k_set_fc_callback(m68k, NULL); m68k_set_instr_hook_callback(m68k, NULL); - - return m68k; } /* Pulse the RESET line on the CPU */ diff --git a/src/emu/cpu/m68000/m68kmame.c b/src/emu/cpu/m68000/m68kmame.c index f129b7ecac8..3ffb60a05d0 100644 --- a/src/emu/cpu/m68000/m68kmame.c +++ b/src/emu/cpu/m68000/m68kmame.c @@ -153,46 +153,41 @@ static void set_irq_line(m68ki_cpu_core *m68k, int irqline, int state) * 68000 section ****************************************************************************/ -static int irq_callback_frontend(void *param, int vector) +static CPU_INIT( m68000 ) { - return (*(int (*)(int))param)(vector); -} - -static void m68000_init(int index, int clock, const void *config, int (*irqcallback)(int)) -{ - m68ki_cpu_core *m68k = token = m68k_init(); + m68ki_cpu_core *m68k = device->token; + token = device->token; // temporary + m68k_init(m68k); m68k_set_cpu_type(m68k, M68K_CPU_TYPE_68000); m68k_memory_intf = interface_d16; m68k_state_register(m68k, "m68000", index); - m68k_set_int_ack_callback(m68k, irqcallback, irq_callback_frontend); + m68k_set_int_ack_callback(m68k, (void *)device, irqcallback); } -static void m68000_reset(void) +static CPU_RESET( m68000 ) { - m68k_pulse_reset(token); + m68k_pulse_reset(device->token); } -static void m68000_exit(void) +static CPU_EXIT( m68000 ) { /* nothing to do */ } -static int m68000_execute(int cycles) +static CPU_EXECUTE( m68000 ) { - return m68k_execute(token, cycles); + return m68k_execute(device->token, cycles); } static void m68000_get_context(void *dst) { - if (dst) - *(void **)dst = token; } static void m68000_set_context(void *src) { if (m68k_memory_intf.read8 != program_read_byte_16be) m68k_memory_intf = interface_d16; - token = *(void **)src; + token = src; } static offs_t m68000_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram) @@ -205,41 +200,41 @@ static offs_t m68000_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN ****************************************************************************/ #if HAS_M68008 -static void m68008_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m68008 ) { - m68ki_cpu_core *m68k = token = m68k_init(); + m68ki_cpu_core *m68k = device->token; + token = device->token; // temporary + m68k_init(m68k); m68k_set_cpu_type(m68k, M68K_CPU_TYPE_68008); m68k_memory_intf = interface_d8; m68k_state_register(m68k, "m68008", index); - m68k_set_int_ack_callback(m68k, irqcallback, irq_callback_frontend); + m68k_set_int_ack_callback(m68k, (void *)device, irqcallback); } -static void m68008_reset(void) +static CPU_RESET( m68008 ) { - m68k_pulse_reset(token); + m68k_pulse_reset(device->token); } -static void m68008_exit(void) +static CPU_EXIT( m68008 ) { /* nothing to do */ } -static int m68008_execute(int cycles) +static CPU_EXECUTE( m68008 ) { - return m68k_execute(token, cycles); + return m68k_execute(device->token, cycles); } static void m68008_get_context(void *dst) { - if (dst) - *(void **)dst = token; } static void m68008_set_context(void *src) { if (m68k_memory_intf.read8 != program_read_byte_8be) m68k_memory_intf = interface_d8; - token = *(void **)src; + token = src; } static offs_t m68008_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram) @@ -254,13 +249,15 @@ static offs_t m68008_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN ****************************************************************************/ #if HAS_M68010 -static void m68010_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m68010 ) { - m68ki_cpu_core *m68k = token = m68k_init(); + m68ki_cpu_core *m68k = device->token; + token = device->token; // temporary + m68k_init(m68k); m68k_set_cpu_type(m68k, M68K_CPU_TYPE_68010); m68k_memory_intf = interface_d16; m68k_state_register(m68k, "m68010", index); - m68k_set_int_ack_callback(m68k, irqcallback, irq_callback_frontend); + m68k_set_int_ack_callback(m68k, (void *)device, irqcallback); } static offs_t m68010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram) @@ -274,41 +271,41 @@ static offs_t m68010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN * M68020 section ****************************************************************************/ -static void m68020_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m68020 ) { - m68ki_cpu_core *m68k = token = m68k_init(); + m68ki_cpu_core *m68k = device->token; + token = device->token; // temporary + m68k_init(m68k); m68k_set_cpu_type(m68k, M68K_CPU_TYPE_68020); m68k_memory_intf = interface_d32; m68k_state_register(m68k, "m68020", index); - m68k_set_int_ack_callback(m68k, irqcallback, irq_callback_frontend); + m68k_set_int_ack_callback(m68k, (void *)device, irqcallback); } -static void m68020_reset(void) +static CPU_RESET( m68020 ) { - m68k_pulse_reset(token); + m68k_pulse_reset(device->token); } -static void m68020_exit(void) +static CPU_EXIT( m68020 ) { /* nothing to do */ } -static int m68020_execute(int cycles) +static CPU_EXECUTE( m68020 ) { - return m68k_execute(token, cycles); + return m68k_execute(device->token, cycles); } static void m68020_get_context(void *dst) { - if (dst) - *(void **)dst = token; } static void m68020_set_context(void *src) { if (m68k_memory_intf.read8 != program_read_byte_32be) m68k_memory_intf = interface_d32; - token = *(void **)src; + token = src; } static offs_t m68020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram) @@ -322,13 +319,15 @@ static offs_t m68020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN ****************************************************************************/ #if HAS_M68EC020 -static void m68ec020_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m68ec020 ) { - m68ki_cpu_core *m68k = token = m68k_init(); + m68ki_cpu_core *m68k = device->token; + token = device->token; // temporary + m68k_init(m68k); m68k_set_cpu_type(m68k, M68K_CPU_TYPE_68EC020); m68k_memory_intf = interface_d32; m68k_state_register(m68k, "m68ec020", index); - m68k_set_int_ack_callback(m68k, irqcallback, irq_callback_frontend); + m68k_set_int_ack_callback(m68k, (void *)device, irqcallback); } static offs_t m68ec020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram) @@ -343,41 +342,41 @@ static offs_t m68ec020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const U ****************************************************************************/ #if HAS_M68040 -static void m68040_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m68040 ) { - m68ki_cpu_core *m68k = token = m68k_init(); + m68ki_cpu_core *m68k = device->token; + token = device->token; // temporary + m68k_init(m68k); m68k_set_cpu_type(m68k, M68K_CPU_TYPE_68040); m68k_memory_intf = interface_d32; m68k_state_register(m68k, "m68040", index); - m68k_set_int_ack_callback(m68k, irqcallback, irq_callback_frontend); + m68k_set_int_ack_callback(m68k, (void *)device, irqcallback); } -static void m68040_reset(void) +static CPU_RESET( m68040 ) { - m68k_pulse_reset(token); + m68k_pulse_reset(device->token); } -static void m68040_exit(void) +static CPU_EXIT( m68040 ) { /* nothing to do */ } -static int m68040_execute(int cycles) +static CPU_EXECUTE( m68040 ) { - return m68k_execute(token, cycles); + return m68k_execute(device->token, cycles); } static void m68040_get_context(void *dst) { - if (dst) - *(void **)dst = token; } static void m68040_set_context(void *src) { if (m68k_memory_intf.read8 != program_read_byte_32be) m68k_memory_intf = interface_d32; - token = *(void **)src; + token = src; } static offs_t m68040_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram) @@ -451,7 +450,7 @@ void m68000_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(void *); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68ki_cpu_core); break; case CPUINFO_INT_INPUT_LINES: info->i = 8; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; @@ -513,10 +512,10 @@ void m68000_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m68000_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68000_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68000_set_context; break; - case CPUINFO_PTR_INIT: info->init = m68000_init; break; - case CPUINFO_PTR_RESET: info->reset = m68000_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m68000_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m68000_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68000); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68000); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68000); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68000); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68000_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break; @@ -693,10 +692,10 @@ void m68008_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m68008_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68008_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68008_set_context; break; - case CPUINFO_PTR_INIT: info->init = m68008_init; break; - case CPUINFO_PTR_RESET: info->reset = m68008_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m68008_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m68008_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68008); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68008); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68008); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68008); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68008_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break; @@ -788,7 +787,7 @@ void m68010_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = m68010_set_info; break; - case CPUINFO_PTR_INIT: info->init = m68010_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68010); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68010_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -935,10 +934,10 @@ void m68020_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m68020_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68020_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68020_set_context; break; - case CPUINFO_PTR_INIT: info->init = m68020_init; break; - case CPUINFO_PTR_RESET: info->reset = m68020_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m68020_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m68020_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68020); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68020); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68020); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68020); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68020_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break; @@ -1032,7 +1031,7 @@ void m68ec020_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = m68ec020_set_info; break; - case CPUINFO_PTR_INIT: info->init = m68ec020_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68ec020); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68ec020_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -1177,10 +1176,10 @@ void m68040_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m68040_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68040_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68040_set_context; break; - case CPUINFO_PTR_INIT: info->init = m68040_init; break; - case CPUINFO_PTR_RESET: info->reset = m68040_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m68040_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m68040_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68040); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68040); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68040); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68040); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68040_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break; diff --git a/src/emu/cpu/m6805/m6805.c b/src/emu/cpu/m6805/m6805.c index eed7e3c976d..f0068f7fbcd 100644 --- a/src/emu/cpu/m6805/m6805.c +++ b/src/emu/cpu/m6805/m6805.c @@ -57,7 +57,8 @@ typedef struct UINT8 cc; /* Condition codes */ UINT16 pending_interrupts; /* MB */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; int irq_state[9]; /* KW Additional lines for HD63705 */ int nmi_state; } m6805_Regs; @@ -292,7 +293,7 @@ static void m68705_Interrupt(void) PUSHBYTE(m6805.cc); SEI; if (m6805.irq_callback) - (*m6805.irq_callback)(0); + (*m6805.irq_callback)(m6805.device, 0); if ((m6805.pending_interrupts & (1<<M68705_IRQ_LINE)) != 0 ) { @@ -329,7 +330,7 @@ static void Interrupt(void) SEI; /* no vectors supported, just do the callback to clear irq_state if needed */ if (m6805.irq_callback) - (*m6805.irq_callback)(0); + (*m6805.irq_callback)(m6805.device, 0); RM16( 0x1ffc, &pPC); change_pc(PC); @@ -357,7 +358,7 @@ static void Interrupt(void) SEI; /* no vectors supported, just do the callback to clear irq_state if needed */ if (m6805.irq_callback) - (*m6805.irq_callback)(0); + (*m6805.irq_callback)(m6805.device, 0); #if (HAS_HD63705) @@ -440,17 +441,20 @@ static void state_register(const char *type, int index) state_save_register_item_array(type, index, m6805.irq_state); } -static void m6805_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6805 ) { state_register("m6805", index); m6805.irq_callback = irqcallback; + m6805.device = device; } -static void m6805_reset(void) +static CPU_RESET( m6805 ) { - int (*save_irqcallback)(int) = m6805.irq_callback; + cpu_irq_callback save_irqcallback = m6805.irq_callback; + const device_config *save_device = m6805.device; memset(&m6805, 0, sizeof(m6805)); m6805.irq_callback = save_irqcallback; + m6805.device = save_device; /* Force CPU sub-type and relevant masks */ m6805.subtype = SUBTYPE_M6805; SP_MASK = 0x07f; @@ -463,7 +467,7 @@ static void m6805_reset(void) change_pc(PC); } -static void m6805_exit(void) +static CPU_EXIT( m6805 ) { /* nothing to do */ } @@ -506,7 +510,7 @@ static void set_irq_line(int irqline, int state) /* execute instructions on this CPU until icount expires */ -static int m6805_execute(int cycles) +static CPU_EXECUTE( m6805 ) { UINT8 ireg; m6805_ICount = cycles; @@ -804,15 +808,16 @@ static int m6805_execute(int cycles) * M68705 section ****************************************************************************/ #if (HAS_M68705) -static void m68705_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m68705 ) { state_register("m68705", index); m6805.irq_callback = irqcallback; + m6805.device = device; } -static void m68705_reset(void) +static CPU_RESET( m68705 ) { - m6805_reset(); + CPU_RESET_CALL(m6805); /* Overide default 6805 type */ m6805.subtype = SUBTYPE_M68705; RM16( 0xfffe, &m6805.pc ); @@ -831,15 +836,16 @@ static void m68705_set_irq_line(int irqline, int state) * HD63705 section ****************************************************************************/ #if (HAS_HD63705) -static void hd63705_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( hd63705 ) { state_register("hd63705", index); m6805.irq_callback = irqcallback; + m6805.device = device; } -static void hd63705_reset(void) +static CPU_RESET( hd63705 ) { - m6805_reset(); + CPU_RESET_CALL(m6805); /* Overide default 6805 types */ m6805.subtype = SUBTYPE_HD63705; @@ -939,10 +945,10 @@ void m6805_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m6805_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6805_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6805_set_context; break; - case CPUINFO_PTR_INIT: info->init = m6805_init; break; - case CPUINFO_PTR_RESET: info->reset = m6805_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m6805_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6805_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6805); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6805); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6805); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6805); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6805_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6805_ICount; break; @@ -999,8 +1005,8 @@ void m68705_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = m68705_set_info; break; - case CPUINFO_PTR_INIT: info->init = m68705_init; break; - case CPUINFO_PTR_RESET: info->reset = m68705_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68705); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68705); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M68705"); break; @@ -1054,8 +1060,8 @@ void hd63705_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = hd63705_set_info; break; - case CPUINFO_PTR_INIT: info->init = hd63705_init; break; - case CPUINFO_PTR_RESET: info->reset = hd63705_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hd63705); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hd63705); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "HD63705"); break; diff --git a/src/emu/cpu/m6809/m6809.c b/src/emu/cpu/m6809/m6809.c index 33616c1f4d9..7cf0bd3ef65 100644 --- a/src/emu/cpu/m6809/m6809.c +++ b/src/emu/cpu/m6809/m6809.c @@ -101,7 +101,8 @@ typedef struct UINT8 ireg; /* First opcode */ UINT8 irq_state[2]; int extra_cycles; /* cycles used up by interrupts */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 int_state; /* SYNC and CWAI flags */ UINT8 nmi_state; } m6809_Regs; @@ -178,7 +179,7 @@ static PAIR ea; /* effective address */ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */ \ PCD=RM16(0xfff6); \ CHANGE_PC; \ - (void)(*m6809.irq_callback)(M6809_FIRQ_LINE); \ + (void)(*m6809.irq_callback)(m6809.device, M6809_FIRQ_LINE); \ } \ else \ if( m6809.irq_state[M6809_IRQ_LINE]!=CLEAR_LINE && !(CC & CC_II) ) \ @@ -206,7 +207,7 @@ static PAIR ea; /* effective address */ CC |= CC_II; /* inhibit IRQ */ \ PCD=RM16(0xfff8); \ CHANGE_PC; \ - (void)(*m6809.irq_callback)(M6809_IRQ_LINE); \ + (void)(*m6809.irq_callback)(m6809.device, M6809_IRQ_LINE); \ } /* public globals */ @@ -417,7 +418,7 @@ static void m6809_set_context(void *src) /****************************************************************************/ /* Reset registers to their initial values */ /****************************************************************************/ -static void m6809_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( m6809 ) { state_save_register_item("m6809", index, PC); state_save_register_item("m6809", index, PPC); @@ -433,9 +434,10 @@ static void m6809_init(int index, int clock, const void *config, int (*irqcallba state_save_register_item("m6809", index, m6809.nmi_state); m6809.irq_callback = irqcallback; + m6809.device = device; } -static void m6809_reset(void) +static CPU_RESET( m6809 ) { m6809.int_state = 0; m6809.nmi_state = CLEAR_LINE; @@ -451,7 +453,7 @@ static void m6809_reset(void) CHANGE_PC; } -static void m6809_exit(void) +static CPU_EXIT( m6809 ) { /* nothing to do ? */ } @@ -512,7 +514,7 @@ static void set_irq_line(int irqline, int state) #include "6809ops.c" /* execute instructions on this CPU until icount expires */ -static int m6809_execute(int cycles) /* NS 970908 */ +static CPU_EXECUTE( m6809 ) /* NS 970908 */ { m6809_ICount = cycles - m6809.extra_cycles; m6809.extra_cycles = 0; @@ -1170,10 +1172,10 @@ void m6809_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = m6809_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6809_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6809_set_context; break; - case CPUINFO_PTR_INIT: info->init = m6809_init; break; - case CPUINFO_PTR_RESET: info->reset = m6809_reset; break; - case CPUINFO_PTR_EXIT: info->exit = m6809_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = m6809_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6809); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6809); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6809); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6809); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6809_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6809_ICount; break; diff --git a/src/emu/cpu/mb86233/mb86233.c b/src/emu/cpu/mb86233/mb86233.c index 64f88609a4f..3ff24dea6c9 100644 --- a/src/emu/cpu/mb86233/mb86233.c +++ b/src/emu/cpu/mb86233/mb86233.c @@ -115,7 +115,7 @@ static void mb86233_set_context(void *src) Initialization and Shutdown ***************************************************************************/ -static void mb86233_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( mb86233 ) { mb86233_cpu_core * _config = (mb86233_cpu_core *)config; (void)index; @@ -139,7 +139,7 @@ static void mb86233_init(int index, int clock, const void *config, int (*irqcall state_save_register_global_pointer(mb86233.RAM,2 * 0x200 * sizeof(UINT32)); } -static void mb86233_reset(void) +static CPU_RESET( mb86233 ) { /* zero registers and flags */ mb86233.pc = 0; @@ -964,7 +964,7 @@ static UINT32 INDIRECT( UINT32 reg, int source ) Core Execution Loop ***************************************************************************/ -static int mb86233_execute(int cycles) +static CPU_EXECUTE( mb86233 ) { mb86233_icount = cycles; @@ -1712,10 +1712,10 @@ void mb86233_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = mb86233_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mb86233_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mb86233_set_context; break; - case CPUINFO_PTR_INIT: info->init = mb86233_init; break; - case CPUINFO_PTR_RESET: info->reset = mb86233_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mb86233); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mb86233); break; case CPUINFO_PTR_EXIT: info->exit = NULL; break; - case CPUINFO_PTR_EXECUTE: info->execute = mb86233_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb86233); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mb86233_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mb86233_icount; break; diff --git a/src/emu/cpu/mb88xx/mb88xx.c b/src/emu/cpu/mb88xx/mb88xx.c index a74e911174f..de659242301 100644 --- a/src/emu/cpu/mb88xx/mb88xx.c +++ b/src/emu/cpu/mb88xx/mb88xx.c @@ -52,7 +52,8 @@ typedef struct /* IRQ handling */ int pending_interrupt; - int (*irqcallback)(int); + cpu_irq_callback irqcallback; + const device_config *device; } mb88Regs; /*************************************************************************** @@ -118,7 +119,7 @@ static void mb88_set_context(void *src) INITIALIZATION AND SHUTDOWN ***************************************************************************/ -static void mb88_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( mb88 ) { if ( config ) { @@ -127,6 +128,7 @@ static void mb88_init(int index, int clock, const void *config, int (*irqcallbac } mb88.irqcallback = irqcallback; + mb88.device = device; state_save_register_item("mb88", clock, mb88.PC); state_save_register_item("mb88", clock, mb88.PA); @@ -151,7 +153,7 @@ static void mb88_init(int index, int clock, const void *config, int (*irqcallbac state_save_register_item("mb88", clock, mb88.pending_interrupt); } -static void mb88_reset(void) +static CPU_RESET( mb88 ) { /* zero registers and flags */ mb88.PC = 0; @@ -208,7 +210,7 @@ static void update_pio( void ) { /* no vectors supported, just do the callback to clear irq_state if needed */ if (mb88.irqcallback) - (*mb88.irqcallback)(0); + (*mb88.irqcallback)(mb88.device, 0); mb88.SP[mb88.SI] = GETPC(); mb88.SP[mb88.SI] |= TEST_CF() << 15; @@ -228,7 +230,7 @@ static void update_pio( void ) /* TODO: add support for serial and timer */ } -static int mb88_execute(int cycles) +static CPU_EXECUTE( mb88 ) { mb88_icount = cycles; @@ -846,10 +848,10 @@ void mb88_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = mb88_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mb88_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mb88_set_context; break; - case CPUINFO_PTR_INIT: info->init = mb88_init; break; - case CPUINFO_PTR_RESET: info->reset = mb88_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mb88); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mb88); break; case CPUINFO_PTR_EXIT: info->exit = NULL; break; - case CPUINFO_PTR_EXECUTE: info->execute = mb88_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb88); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mb88_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mb88_icount; break; diff --git a/src/emu/cpu/mc68hc11/mc68hc11.c b/src/emu/cpu/mc68hc11/mc68hc11.c index 66f1f61a9ea..6376b651a9f 100644 --- a/src/emu/cpu/mc68hc11/mc68hc11.c +++ b/src/emu/cpu/mc68hc11/mc68hc11.c @@ -52,7 +52,8 @@ typedef struct UINT8 adctl; int ad_channel; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; int icount; int ram_position; int reg_position; @@ -313,7 +314,7 @@ static void (*hc11_optable_page4[256])(void); #include "hc11ops.c" #include "hc11ops.h" -static void hc11_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( hc11 ) { int i; @@ -350,14 +351,15 @@ static void hc11_init(int index, int clock, const void *config, int (*irqcallbac hc11.reg_position = 0; hc11.ram_position = 0x100; hc11.irq_callback = irqcallback; + hc11.device = device; } -static void hc11_reset(void) +static CPU_RESET( hc11 ) { hc11.pc = READ16(0xfffe); } -static void hc11_exit(void) +static CPU_EXIT( hc11 ) { } @@ -377,7 +379,7 @@ static void hc11_set_context(void *src) change_pc(hc11.pc); } -static int hc11_execute(int cycles) +static CPU_EXECUTE( hc11 ) { hc11.icount = cycles; @@ -454,10 +456,10 @@ void mc68hc11_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = mc68hc11_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = hc11_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = hc11_set_context; break; - case CPUINFO_PTR_INIT: info->init = hc11_init; break; - case CPUINFO_PTR_RESET: info->reset = hc11_reset; break; - case CPUINFO_PTR_EXIT: info->exit = hc11_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = hc11_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hc11); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hc11); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(hc11); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hc11); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hc11_disasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &hc11.icount; break; diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c index 9c342f6c27c..18176caae2c 100644 --- a/src/emu/cpu/mcs48/mcs48.c +++ b/src/emu/cpu/mcs48/mcs48.c @@ -94,7 +94,8 @@ struct _mcs48_state UINT16 a11; /* A11 value, either 0x000 or 0x800 */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; int icount; int inst_cycles; /* cycles for the current instruction */ @@ -700,14 +701,11 @@ static const mcs48_opcode opcode_table[256]= mcs48_init - generic MCS-48 initialization -------------------------------------------------*/ -static void mcs48_init(int index, int clock, const void *config, int (*irqcallback)(int), UINT16 romsize) +static void mcs48_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, UINT16 romsize) { - mcs48_state *mcs48; - - token = auto_malloc(sizeof(*mcs48)); - mcs48 = token; - - memset(mcs48, 0, sizeof(*mcs48)); + mcs48_state *mcs48 = device->token; + + token = device->token; // temporary /* External access line * EA=1 : read from external rom @@ -718,6 +716,7 @@ static void mcs48_init(int index, int clock, const void *config, int (*irqcallba mcs48->ea = (romsize ? 0 : 1); mcs48->irq_callback = irqcallback; + mcs48->device = device; mcs48->int_rom_size = romsize; state_save_register_item("mcs48", index, mcs48->prevpc.w.l); @@ -749,9 +748,9 @@ static void mcs48_init(int index, int clock, const void *config, int (*irqcallba -------------------------------------------------*/ #if (HAS_I8035 || HAS_MB8884) -static void i8035_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8035 ) { - mcs48_init(index, clock, config, irqcallback, 0x0); + mcs48_init(device, index, clock, config, irqcallback, 0x0); } #endif @@ -763,9 +762,9 @@ static void i8035_init(int index, int clock, const void *config, int (*irqcallba -------------------------------------------------*/ #if (HAS_I8041 || HAS_I8048 || HAS_I8648 || HAS_I8748 || HAS_N7751) -static void i8041_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8041 ) { - mcs48_init(index, clock, config, irqcallback, 0x400); + mcs48_init(device, index, clock, config, irqcallback, 0x400); } #endif @@ -777,9 +776,9 @@ static void i8041_init(int index, int clock, const void *config, int (*irqcallba -------------------------------------------------*/ #if (HAS_I8039) -static void i8039_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8039 ) { - mcs48_init(index, clock, config, irqcallback, 0x0); + mcs48_init(device, index, clock, config, irqcallback, 0x0); } #endif @@ -791,9 +790,9 @@ static void i8039_init(int index, int clock, const void *config, int (*irqcallba -------------------------------------------------*/ #if (HAS_I8049 || HAS_I8749 || HAS_M58715) -static void i8049_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8049 ) { - mcs48_init(index, clock, config, irqcallback, 0x800); + mcs48_init(device, index, clock, config, irqcallback, 0x800); } #endif @@ -802,9 +801,9 @@ static void i8049_init(int index, int clock, const void *config, int (*irqcallba mcs48_reset - general reset routine -------------------------------------------------*/ -static void mcs48_reset(void) +static CPU_RESET( mcs48 ) { - mcs48_state *mcs48 = token; + mcs48_state *mcs48 = device->token; /* confirmed from reset description */ PC = 0; @@ -855,7 +854,7 @@ static void check_irqs(mcs48_state *mcs48) /* indicate we took the external IRQ */ if (mcs48->irq_callback != NULL) - (*mcs48->irq_callback)(0); + (*mcs48->irq_callback)(mcs48->device, 0); } /* timer overflow interrupts follow */ @@ -923,9 +922,9 @@ static void burn_cycles(mcs48_state *mcs48, int count) of cycles -------------------------------------------------*/ -static int mcs48_execute(int cycles) +static CPU_EXECUTE( mcs48 ) { - mcs48_state *mcs48 = token; + mcs48_state *mcs48 = device->token; unsigned opcode; mcs48->icount = cycles; @@ -995,8 +994,6 @@ ADDRESS_MAP_END static void mcs48_get_context(void *dst) { - if( dst ) - *(void **)dst = token; } @@ -1009,7 +1006,7 @@ static void mcs48_set_context(void *src) { mcs48_state *mcs48; if( src ) - token = *(void **)src; + token = src; mcs48 = token; update_regptr(mcs48); change_pc(PC); @@ -1063,7 +1060,7 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs48); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs48_state); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = MCS48_INPUT_IRQ; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -1110,9 +1107,9 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = mcs48_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mcs48_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mcs48_set_context; break; - case CPUINFO_PTR_INIT: /*info->init = i8039_init;*/ break; - case CPUINFO_PTR_RESET: info->reset = mcs48_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = mcs48_execute; break; + case CPUINFO_PTR_INIT: /*info->init = CPU_INIT_NAME(i8039);*/ break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mcs48); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs48); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mcs48_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs48->icount; break; @@ -1172,7 +1169,7 @@ void i8035_get_info(UINT32 state, cpuinfo *info) { case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8035_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8035); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8035"); break; default: mcs48_get_info(state, info); break; } @@ -1187,7 +1184,7 @@ void i8041_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_10bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8041_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8041"); break; default: mcs48_get_info(state, info); break; } @@ -1202,7 +1199,7 @@ void i8048_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_10bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8041_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8048"); break; default: mcs48_get_info(state, info); break; } @@ -1217,7 +1214,7 @@ void i8648_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_10bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8041_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8648"); break; default: mcs48_get_info(state, info); break; } @@ -1232,7 +1229,7 @@ void i8748_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_10bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8041_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8748"); break; default: mcs48_get_info(state, info); break; } @@ -1246,7 +1243,7 @@ void mb8884_get_info(UINT32 state, cpuinfo *info) { case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8035_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8035); break; case CPUINFO_STR_NAME: strcpy(info->s, "MB8884"); break; default: mcs48_get_info(state, info); break; } @@ -1261,7 +1258,7 @@ void n7751_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_10bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break; - case CPUINFO_PTR_INIT: info->init = i8041_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break; case CPUINFO_STR_NAME: strcpy(info->s, "N7751"); break; default: mcs48_get_info(state, info); break; } @@ -1277,7 +1274,7 @@ void i8039_get_info(UINT32 state, cpuinfo *info) { case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break; - case CPUINFO_PTR_INIT: info->init = i8039_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8039); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8039"); break; default: mcs48_get_info(state, info); break; } @@ -1292,7 +1289,7 @@ void i8049_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_11bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break; - case CPUINFO_PTR_INIT: info->init = i8049_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8049); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8049"); break; default: mcs48_get_info(state, info); break; } @@ -1307,7 +1304,7 @@ void i8749_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_11bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break; - case CPUINFO_PTR_INIT: info->init = i8049_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8049); break; case CPUINFO_STR_NAME: strcpy(info->s, "I8749"); break; default: mcs48_get_info(state, info); break; } @@ -1322,7 +1319,7 @@ void m58715_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_11bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break; - case CPUINFO_PTR_INIT: info->init = i8049_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8049); break; case CPUINFO_STR_NAME: strcpy(info->s, "M58715"); break; default: mcs48_get_info(state, info); break; } diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c index f304fb02b9b..7dbce15814b 100644 --- a/src/emu/cpu/mcs51/mcs51.c +++ b/src/emu/cpu/mcs51/mcs51.c @@ -244,7 +244,8 @@ struct _mcs51_regs UINT8 (*sfr_read)(mcs51_regs *mcs51, size_t offset); /* Interrupt Callback */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; /* Serial Port TX/RX Callbacks */ // TODO: Move to special port r/w @@ -1721,7 +1722,7 @@ static void check_irqs(mcs51_regs *mcs51) /* indicate we took the external IRQ */ if (mcs51->irq_callback != NULL) - (*mcs51->irq_callback)(0); + (*mcs51->irq_callback)(mcs51->device, 0); break; case V_TF0: @@ -1734,7 +1735,7 @@ static void check_irqs(mcs51_regs *mcs51) SET_IE1(0); /* indicate we took the external IRQ */ if (mcs51->irq_callback != NULL) - (*mcs51->irq_callback)(1); + (*mcs51->irq_callback)(mcs51->device, 1); break; case V_TF1: @@ -1885,9 +1886,9 @@ static void mcs51_set_irq_line(mcs51_regs *mcs51, int irqline, int state) } /* Execute cycles - returns number of cycles actually run */ -static int mcs51_execute(int cycles) +static CPU_EXECUTE( mcs51 ) { - mcs51_regs *mcs51 = token; + mcs51_regs *mcs51 = device->token; UINT8 op; mcs51->icount = cycles; @@ -2035,14 +2036,14 @@ static UINT8 mcs51_sfr_read(mcs51_regs *mcs51, size_t offset) } -static void mcs51_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( mcs51 ) { - mcs51_regs *mcs51; - - token = auto_malloc(sizeof(*mcs51)); - mcs51 = token; + mcs51_regs *mcs51 = device->token; + + token = device->token; // temporary mcs51->irq_callback = irqcallback; + mcs51->device = device; mcs51->features = FEATURE_NONE; mcs51->ram_mask = 0x7F; /* 128 bytes of ram */ @@ -2065,19 +2066,17 @@ static void mcs51_init(int index, int clock, const void *config, int (*irqcallba state_save_register_item("mcs51", index, mcs51->irq_active ); } -static void i80c51_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i80c51 ) { - mcs51_regs *mcs51; - mcs51_init(index, clock, config, irqcallback); - - mcs51 = token; + mcs51_regs *mcs51 = device->token; + CPU_INIT_CALL(mcs51); mcs51->features |= FEATURE_CMOS; } /* Reset registers to the initial values */ -static void mcs51_reset(void) +static CPU_RESET( mcs51 ) { - mcs51_regs *mcs51 = token; + mcs51_regs *mcs51 = device->token; update_ptrs(mcs51); //Set up serial call back handlers @@ -2162,7 +2161,7 @@ static void mcs51_reset(void) } /* Shut down CPU core */ -static void mcs51_exit(void) +static CPU_EXIT( mcs51 ) { /* nothing to do */ } @@ -2205,11 +2204,10 @@ static UINT8 i8052_sfr_read(mcs51_regs *mcs51, size_t offset) } } -static void i8052_init (int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i8052 ) { - mcs51_regs *mcs51; - mcs51_init(index, clock, config, irqcallback); - mcs51 = token; + mcs51_regs *mcs51 = device->token; + CPU_INIT_CALL(mcs51); mcs51->ram_mask = 0xFF; /* 256 bytes of ram */ mcs51->num_interrupts = 6; /* 6 interrupts */ @@ -2259,22 +2257,20 @@ static UINT8 i80c52_sfr_read(mcs51_regs *mcs51, size_t offset) } } -static void i80c52_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i80c52 ) { - mcs51_regs *mcs51; - i8052_init(index, clock, config, irqcallback); - mcs51 = token; + mcs51_regs *mcs51 = device->token; + CPU_INIT_CALL(i8052); mcs51->features |= (FEATURE_I80C52 | FEATURE_CMOS); mcs51->sfr_read = i80c52_sfr_read; mcs51->sfr_write = i80c52_sfr_write; } -static void i80c31_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( i80c31 ) { - mcs51_regs *mcs51; - i80c52_init(index, clock, config, irqcallback); - mcs51 = token; + mcs51_regs *mcs51 = device->token; + CPU_INIT_CALL(i8052); mcs51->ram_mask = 0x7F; /* 128 bytes of ram */ } @@ -2352,15 +2348,14 @@ static UINT8 ds5002fp_sfr_read(mcs51_regs *mcs51, size_t offset) return data_read_byte_8le((size_t) offset | 0x100); } -static void ds5002fp_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ds5002fp ) { /* default configuration */ static const ds5002fp_config default_config = { 0x00, 0x00, 0x00 }; const ds5002fp_config *sconfig = config ? config : &default_config; - mcs51_regs *mcs51; + mcs51_regs *mcs51 = device->token; mcs51_init(index, clock, config, irqcallback); - mcs51 = token; mcs51->ds5002fp.config = sconfig; mcs51->features |= (FEATURE_DS5002FP | FEATURE_CMOS); @@ -2405,8 +2400,6 @@ ADDRESS_MAP_END static void mcs51_get_context(void *dst) { - if( dst ) - *(void **)dst = token; } static void mcs51_set_context(void *src) @@ -2414,7 +2407,7 @@ static void mcs51_set_context(void *src) mcs51_regs *mcs51; if( src ) - token = *(void **)src; + token = src; mcs51 = token; change_pc(PC); @@ -2474,7 +2467,7 @@ static void mcs51_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs51); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs51_regs); break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; @@ -2521,10 +2514,10 @@ static void mcs51_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = mcs51_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mcs51_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mcs51_set_context; break; - case CPUINFO_PTR_INIT: info->init = mcs51_init; break; - case CPUINFO_PTR_RESET: info->reset = mcs51_reset; break; - case CPUINFO_PTR_EXIT: info->exit = mcs51_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = mcs51_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mcs51); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mcs51); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mcs51); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs51); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8051_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs51->icount; break; @@ -2604,7 +2597,7 @@ void i8032_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i8052_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8052); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_8bit; break; @@ -2618,7 +2611,7 @@ void i8052_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i8052_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8052); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_13bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_8bit; break; @@ -2646,7 +2639,7 @@ void i8752_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i8052_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8052); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_13bit; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_8bit; break; @@ -2667,7 +2660,7 @@ void i80c31_get_info(UINT32 state, cpuinfo *info) * of i80c52 with 128 bytes internal ram */ switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c31_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c31); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = NULL; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break; @@ -2681,7 +2674,7 @@ void i80c51_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c51_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c51); break; case CPUINFO_STR_NAME: strcpy(info->s, "I80C51"); break; default: i8051_get_info(state, info); break; } @@ -2691,7 +2684,7 @@ void i80c32_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c52_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c52); break; case CPUINFO_STR_NAME: strcpy(info->s, "I80C32"); break; default: i8032_get_info(state, info); break; } @@ -2701,7 +2694,7 @@ void i80c52_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c52_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c52); break; case CPUINFO_STR_NAME: strcpy(info->s, "I80C52"); break; default: i8052_get_info(state, info); break; } @@ -2711,7 +2704,7 @@ void i87c51_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c51_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c51); break; case CPUINFO_STR_NAME: strcpy(info->s, "I87C51"); break; default: i8751_get_info(state, info); break; } @@ -2721,7 +2714,7 @@ void i87c52_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c52_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c52); break; case CPUINFO_STR_NAME: strcpy(info->s, "I87C52"); break; default: i8752_get_info(state, info); break; } @@ -2735,7 +2728,7 @@ void at89c4051_get_info(UINT32 state, cpuinfo *info) { switch (state) { - case CPUINFO_PTR_INIT: info->init = i80c51_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c51); break; case CPUINFO_STR_NAME: strcpy(info->s, "AT89C4051"); break; default: i8051_get_info(state, info); break; } diff --git a/src/emu/cpu/minx/minx.c b/src/emu/cpu/minx/minx.c index 9e2aeae4323..017c3f20f88 100644 --- a/src/emu/cpu/minx/minx.c +++ b/src/emu/cpu/minx/minx.c @@ -83,7 +83,8 @@ typedef struct { UINT8 YI; UINT8 halted; UINT8 interrupt_pending; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } minx_regs; static minx_regs regs; @@ -107,9 +108,10 @@ INLINE void wr16( UINT32 offset, UINT16 data ) } -static void minx_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( minx ) { regs.irq_callback = irqcallback; + regs.device = device; if ( config != NULL ) { } @@ -182,7 +184,7 @@ static int minx_execute( int cycles ) /* Set Interrupt Branch flag */ regs.F |= 0x80; regs.V = 0; - regs.PC = rd16( regs.irq_callback( 0 ) << 1 ); + regs.PC = rd16( regs.irq_callback( regs.device, 0 ) << 1 ); minx_icount -= 28; /* This cycle count is a guess */ } } @@ -350,10 +352,10 @@ void minx_get_info( UINT32 state, cpuinfo *info ) case CPUINFO_PTR_SET_INFO: info->setinfo = minx_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = minx_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = minx_set_context; break; - case CPUINFO_PTR_INIT: info->init = minx_init; break; - case CPUINFO_PTR_RESET: info->reset = minx_reset; break; - case CPUINFO_PTR_EXIT: info->exit = minx_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = minx_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(minx); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(minx); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(minx); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(minx); break; case CPUINFO_PTR_BURN: info->burn = minx_burn; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = minx_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &minx_icount; break; diff --git a/src/emu/cpu/mips/mips3.c b/src/emu/cpu/mips/mips3.c index 5b1cc411a8e..9041f4950dc 100644 --- a/src/emu/cpu/mips/mips3.c +++ b/src/emu/cpu/mips/mips3.c @@ -258,7 +258,7 @@ static void mips3_set_context(void *src) } -static void mips3_reset(void) +static CPU_RESET( mips3 ) { /* common reset */ mips3com_reset(&mips3.core); @@ -1650,7 +1650,7 @@ INLINE void handle_cop2(UINT32 op) CORE EXECUTION LOOP ***************************************************************************/ -int mips3_execute(int cycles) +CPU_EXECUTE( mips3 ) { /* count cycles and interrupt cycles */ mips3.core.icount = cycles; @@ -2132,8 +2132,8 @@ void mips3_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mips3_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mips3_set_context; break; case CPUINFO_PTR_INIT: /* provided per-CPU */ break; - case CPUINFO_PTR_RESET: info->reset = mips3_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = mips3_execute; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mips3); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mips3_dasm; break; case CPUINFO_PTR_TRANSLATE: info->translate = mips3_translate; break; @@ -2152,16 +2152,16 @@ void mips3_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R4600) -static void r4600be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4600be ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, index, clock, config, irqcallback, memory); } -static void r4600le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4600le ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, index, clock, config, irqcallback, memory); } @@ -2174,7 +2174,7 @@ void r4600be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4600be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4600be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break; @@ -2192,7 +2192,7 @@ void r4600le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4600le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4600le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break; @@ -2210,16 +2210,16 @@ void r4600le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R4650) -static void r4650be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4650be ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, index, clock, config, irqcallback, memory); } -static void r4650le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4650le ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, index, clock, config, irqcallback, memory); } @@ -2232,7 +2232,7 @@ void r4650be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4650be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4650be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break; @@ -2250,7 +2250,7 @@ void r4650le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4650le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4650le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break; @@ -2268,16 +2268,16 @@ void r4650le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R4700) -static void r4700be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4700be ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, index, clock, config, irqcallback, memory); } -static void r4700le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4700le ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, index, clock, config, irqcallback, memory); } @@ -2290,7 +2290,7 @@ void r4700be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4700be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4700be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break; @@ -2309,7 +2309,7 @@ void r4700le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4700le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4700le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break; @@ -2327,16 +2327,16 @@ void r4700le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R5000) -static void r5000be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r5000be ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, index, clock, config, irqcallback, memory); } -static void r5000le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r5000le ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, index, clock, config, irqcallback, memory); } @@ -2349,7 +2349,7 @@ void r5000be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r5000be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r5000be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break; @@ -2367,7 +2367,7 @@ void r5000le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r5000le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r5000le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break; @@ -2385,16 +2385,16 @@ void r5000le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_QED5271) -static void qed5271be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( qed5271be ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, index, clock, config, irqcallback, memory); } -static void qed5271le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( qed5271le ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, index, clock, config, irqcallback, memory); } @@ -2407,7 +2407,7 @@ void qed5271be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = qed5271be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(qed5271be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break; @@ -2425,7 +2425,7 @@ void qed5271le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = qed5271le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(qed5271le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break; @@ -2443,16 +2443,16 @@ void qed5271le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_RM7000) -static void rm7000be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( rm7000be ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, index, clock, config, irqcallback, memory); } -static void rm7000le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( rm7000le ) { - size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, index, clock, config, irqcallback, NULL); + size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, device, index, clock, config, irqcallback, NULL); void *memory = auto_malloc(memsize); mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, index, clock, config, irqcallback, memory); } @@ -2465,7 +2465,7 @@ void rm7000be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = rm7000be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(rm7000be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break; @@ -2483,7 +2483,7 @@ void rm7000le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = rm7000le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(rm7000le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break; diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c index df3caf015e6..4760118e0fe 100644 --- a/src/emu/cpu/mips/mips3com.c +++ b/src/emu/cpu/mips/mips3com.c @@ -69,7 +69,7 @@ INLINE int tlb_entry_is_global(const mips3_tlb_entry *entry) structure based on the configured type -------------------------------------------------*/ -void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int index, int clock, const mips3_config *config, int (*irqcallback)(int)) +void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, const mips3_config *config, cpu_irq_callback irqcallback) { int tlbindex; @@ -79,6 +79,7 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int in mips->bigendian = bigendian; mips->cpu_clock = clock; mips->irq_callback = irqcallback; + mips->device = device; mips->icache_size = config->icache; mips->dcache_size = config->dcache; mips->system_clock = config->system_clock; diff --git a/src/emu/cpu/mips/mips3com.h b/src/emu/cpu/mips/mips3com.h index e03857b3ccc..27696941253 100644 --- a/src/emu/cpu/mips/mips3com.h +++ b/src/emu/cpu/mips/mips3com.h @@ -193,7 +193,8 @@ struct _mips3_state /* internal stuff */ mips3_flavor flavor; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT32 system_clock; UINT32 cpu_clock; UINT64 count_zero_time; @@ -222,7 +223,7 @@ struct _mips3_state FUNCTION PROTOTYPES ***************************************************************************/ -void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int index, int clock, const mips3_config *config, int (*irqcallback)(int)); +void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, const mips3_config *config, cpu_irq_callback irqcallback); void mips3com_exit(mips3_state *mips); void mips3com_reset(mips3_state *mips); diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c index 5282f28392e..8293da00a62 100644 --- a/src/emu/cpu/mips/mips3drc.c +++ b/src/emu/cpu/mips/mips3drc.c @@ -342,7 +342,7 @@ INLINE void save_fast_iregs(drcuml_block *block) mips3_init - initialize the processor -------------------------------------------------*/ -static void mips3_init(mips3_flavor flavor, int bigendian, int index, int clock, const mips3_config *config, int (*irqcallback)(int)) +static void mips3_init(mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, const mips3_config *config, cpu_irq_callback irqcallback) { drcfe_config feconfig = { @@ -366,7 +366,7 @@ static void mips3_init(mips3_flavor flavor, int bigendian, int index, int clock, memset(mips3, 0, sizeof(*mips3)); /* initialize the core */ - mips3com_init(mips3, flavor, bigendian, index, clock, config, irqcallback); + mips3com_init(mips3, flavor, bigendian, device, index, clock, config, irqcallback); /* allocate the implementation-specific state from the full cache */ mips3->impstate = drccache_memory_alloc_near(cache, sizeof(*mips3->impstate)); @@ -474,7 +474,7 @@ static void mips3_init(mips3_flavor flavor, int bigendian, int index, int clock, mips3_reset - reset the processor -------------------------------------------------*/ -static void mips3_reset(void) +static CPU_RESET( mips3 ) { /* reset the common code and mark the cache dirty */ mips3com_reset(mips3); @@ -488,7 +488,7 @@ static void mips3_reset(void) specified number of cycles -------------------------------------------------*/ -static int mips3_execute(int cycles) +static CPU_EXECUTE( mips3 ) { drcuml_state *drcuml = mips3->impstate->drcuml; int execute_result; @@ -524,7 +524,7 @@ static int mips3_execute(int cycles) mips3_exit - cleanup from execution -------------------------------------------------*/ -static void mips3_exit(void) +static CPU_EXIT( mips3 ) { mips3com_exit(mips3); @@ -629,9 +629,9 @@ static void mips3_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mips3_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mips3_set_context; break; case CPUINFO_PTR_INIT: /* provided per-CPU */ break; - case CPUINFO_PTR_RESET: info->reset = mips3_reset; break; - case CPUINFO_PTR_EXIT: info->exit = mips3_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = mips3_execute; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mips3); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mips3); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mips3_dasm; break; case CPUINFO_PTR_TRANSLATE: info->translate = mips3_translate; break; @@ -3619,14 +3619,14 @@ static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, i ***************************************************************************/ #if (HAS_R4600) -static void r4600be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4600be ) { - mips3_init(MIPS3_TYPE_R4600, TRUE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R4600, TRUE, device, index, clock, config, irqcallback); } -static void r4600le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4600le ) { - mips3_init(MIPS3_TYPE_R4600, FALSE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R4600, FALSE, device, index, clock, config, irqcallback); } void r4600be_get_info(UINT32 state, cpuinfo *info) @@ -3637,7 +3637,7 @@ void r4600be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4600be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4600be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break; @@ -3655,7 +3655,7 @@ void r4600le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4600le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4600le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break; @@ -3673,14 +3673,14 @@ void r4600le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R4650) -static void r4650be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4650be ) { - mips3_init(MIPS3_TYPE_R4650, TRUE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R4650, TRUE, device, index, clock, config, irqcallback); } -static void r4650le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4650le ) { - mips3_init(MIPS3_TYPE_R4650, FALSE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R4650, FALSE, device, index, clock, config, irqcallback); } void r4650be_get_info(UINT32 state, cpuinfo *info) @@ -3691,7 +3691,7 @@ void r4650be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4650be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4650be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break; @@ -3709,7 +3709,7 @@ void r4650le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4650le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4650le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break; @@ -3727,14 +3727,14 @@ void r4650le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R4700) -static void r4700be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4700be ) { - mips3_init(MIPS3_TYPE_R4700, TRUE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R4700, TRUE, device, index, clock, config, irqcallback); } -static void r4700le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r4700le ) { - mips3_init(MIPS3_TYPE_R4700, FALSE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R4700, FALSE, device, index, clock, config, irqcallback); } void r4700be_get_info(UINT32 state, cpuinfo *info) @@ -3745,7 +3745,7 @@ void r4700be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4700be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4700be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break; @@ -3763,7 +3763,7 @@ void r4700le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r4700le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r4700le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break; @@ -3781,14 +3781,14 @@ void r4700le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_R5000) -static void r5000be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r5000be ) { - mips3_init(MIPS3_TYPE_R5000, TRUE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R5000, TRUE, device, index, clock, config, irqcallback); } -static void r5000le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( r5000le ) { - mips3_init(MIPS3_TYPE_R5000, FALSE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_R5000, FALSE, device, index, clock, config, irqcallback); } void r5000be_get_info(UINT32 state, cpuinfo *info) @@ -3799,7 +3799,7 @@ void r5000be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r5000be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r5000be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break; @@ -3817,7 +3817,7 @@ void r5000le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = r5000le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r5000le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break; @@ -3835,14 +3835,14 @@ void r5000le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_QED5271) -static void qed5271be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( qed5271be ) { - mips3_init(MIPS3_TYPE_QED5271, TRUE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_QED5271, TRUE, device, index, clock, config, irqcallback); } -static void qed5271le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( qed5271le ) { - mips3_init(MIPS3_TYPE_QED5271, FALSE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_QED5271, FALSE, device, index, clock, config, irqcallback); } void qed5271be_get_info(UINT32 state, cpuinfo *info) @@ -3853,7 +3853,7 @@ void qed5271be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = qed5271be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(qed5271be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break; @@ -3871,7 +3871,7 @@ void qed5271le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = qed5271le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(qed5271le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break; @@ -3889,14 +3889,14 @@ void qed5271le_get_info(UINT32 state, cpuinfo *info) ***************************************************************************/ #if (HAS_RM7000) -static void rm7000be_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( rm7000be ) { - mips3_init(MIPS3_TYPE_RM7000, TRUE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_RM7000, TRUE, device, index, clock, config, irqcallback); } -static void rm7000le_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( rm7000le ) { - mips3_init(MIPS3_TYPE_RM7000, FALSE, index, clock, config, irqcallback); + mips3_init(MIPS3_TYPE_RM7000, FALSE, device, index, clock, config, irqcallback); } void rm7000be_get_info(UINT32 state, cpuinfo *info) @@ -3907,7 +3907,7 @@ void rm7000be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = rm7000be_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(rm7000be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break; @@ -3925,7 +3925,7 @@ void rm7000le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = rm7000le_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(rm7000le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break; diff --git a/src/emu/cpu/mips/psx.c b/src/emu/cpu/mips/psx.c index 8250d7f2074..74cfcbb68cb 100644 --- a/src/emu/cpu/mips/psx.c +++ b/src/emu/cpu/mips/psx.c @@ -180,7 +180,8 @@ typedef struct int multiplier_operation; UINT32 multiplier_operand1; UINT32 multiplier_operand2; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 (*readbyte)( UINT32 ); UINT16 (*readhalf)( UINT32 ); UINT32 (*readword)( UINT32 ); @@ -1580,14 +1581,15 @@ static void mips_state_register( const char *type, int index ) state_save_register_postload( Machine, mips_postload, NULL ); } -static void mips_init( int index, int clock, const void *config, int (*irqcallback)(int) ) +static CPU_INIT( mips ) { mipscpu.irq_callback = irqcallback; + mipscpu.device = device; mips_state_register( "psxcpu", index ); } -static void mips_reset( void ) +static CPU_RESET( mips ) { mipscpu.delayr = 0; mipscpu.delayv = 0; @@ -1607,7 +1609,7 @@ static void mips_reset( void ) mips_set_pc( 0xbfc00000 ); } -static void mips_exit( void ) +static CPU_EXIT( mips ) { } @@ -1788,7 +1790,7 @@ static void mips_bc( int cop, int sr_cu, int condition ) } } -static int mips_execute( int cycles ) +static CPU_EXECUTE( mips ) { mips_ICount = cycles; do @@ -2854,7 +2856,7 @@ static void set_irq_line( int irqline, int state ) There is also a problem with PULSE_LINE interrupts as the interrupt pending bits aren't latched the emulated code won't know what caused the interrupt. */ - (*mipscpu.irq_callback)( irqline ); + (*mipscpu.irq_callback)( mipscpu.device, irqline ); } break; } @@ -4160,10 +4162,10 @@ static void mips_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = mips_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mips_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mips_set_context; break; - case CPUINFO_PTR_INIT: info->init = mips_init; break; - case CPUINFO_PTR_RESET: info->reset = mips_reset; break; - case CPUINFO_PTR_EXIT: info->exit = mips_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = mips_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mips); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mips); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mips); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mips_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mips_ICount; break; diff --git a/src/emu/cpu/mips/r3000.c b/src/emu/cpu/mips/r3000.c index 0221e0aaf17..2ede60b3786 100644 --- a/src/emu/cpu/mips/r3000.c +++ b/src/emu/cpu/mips/r3000.c @@ -148,7 +148,8 @@ struct _r3000_state int icount; int interrupt_cycles; int hasfpu; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; /* endian-dependent load/store */ void (*lwl)(r3000_state *r3000, UINT32 op); @@ -315,9 +316,6 @@ static void set_irq_line(r3000_state *r3000, int irqline, int state) static void r3000_get_context(void *dst) { - /* copy the context */ - if (dst) - *(void **)dst = token; } @@ -327,7 +325,7 @@ static void r3000_set_context(void *src) /* copy the context */ if (src) - token = *(void **)src; + token = src; r3000 = token; change_pc(r3000->pc); @@ -342,23 +340,23 @@ static void r3000_set_context(void *src) INITIALIZATION AND SHUTDOWN ***************************************************************************/ -static void r3000_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( r3000 ) { - const r3000_cpu_core *config = _config; - r3000_state *r3000; + const r3000_cpu_core *configdata = config; + r3000_state *r3000 = device->token; - token = auto_malloc(sizeof(r3000_state)); - r3000 = token; + token = device->token; // temporary /* allocate memory */ - r3000->icache = auto_malloc(config->icache); - r3000->dcache = auto_malloc(config->dcache); + r3000->icache = auto_malloc(configdata->icache); + r3000->dcache = auto_malloc(configdata->dcache); - r3000->icache_size = config->icache; - r3000->dcache_size = config->dcache; - r3000->hasfpu = config->hasfpu; + r3000->icache_size = configdata->icache; + r3000->dcache_size = configdata->dcache; + r3000->hasfpu = configdata->hasfpu; r3000->irq_callback = irqcallback; + r3000->device = device; } @@ -398,18 +396,18 @@ static void r3000_reset(r3000_state *r3000, int bigendian) change_pc(r3000->pc); } -static void r3000be_reset(void) +static CPU_RESET( r3000be ) { - r3000_reset(token, 1); + r3000_reset(device->token, 1); } -static void r3000le_reset(void) +static CPU_RESET( r3000le ) { - r3000_reset(token, 0); + r3000_reset(device->token, 0); } -static void r3000_exit(void) +static CPU_EXIT( r3000 ) { } @@ -735,9 +733,9 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op) CORE EXECUTION LOOP ***************************************************************************/ -static int r3000_execute(int cycles) +static CPU_EXECUTE( r3000 ) { - r3000_state *r3000 = token; + r3000_state *r3000 = device->token; /* count cycles and interrupt cycles */ r3000->icount = cycles; @@ -1227,7 +1225,7 @@ static void r3000_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(r3000); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(r3000_state); break; case CPUINFO_INT_INPUT_LINES: info->i = 6; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -1299,10 +1297,10 @@ static void r3000_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = r3000_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = r3000_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = r3000_set_context; break; - case CPUINFO_PTR_INIT: info->init = r3000_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r3000); break; case CPUINFO_PTR_RESET: /* provided per-CPU */ break; - case CPUINFO_PTR_EXIT: info->exit = r3000_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = r3000_execute; break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(r3000); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(r3000); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = r3000_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &r3000->icount; break; @@ -1367,7 +1365,7 @@ void r3000be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = r3000be_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(r3000be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (big)"); break; @@ -1385,7 +1383,7 @@ void r3000le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = r3000le_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(r3000le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (little)"); break; @@ -1403,7 +1401,7 @@ void r3041be_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_BE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = r3000be_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(r3000be); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (big)"); break; @@ -1421,7 +1419,7 @@ void r3041le_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = r3000le_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(r3000le); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (little)"); break; diff --git a/src/emu/cpu/nec/nec.c b/src/emu/cpu/nec/nec.c index 956fe737ebb..b120ab8efb1 100644 --- a/src/emu/cpu/nec/nec.c +++ b/src/emu/cpu/nec/nec.c @@ -161,7 +161,8 @@ typedef struct UINT32 poll_state; UINT8 no_interrupt; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; memory_interface mem; @@ -273,7 +274,7 @@ static UINT8 fetchop(void) /***************************************************************************/ -static void nec_reset (void) +static CPU_RESET( nec ) { unsigned int i,j,c; static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH }; @@ -331,7 +332,7 @@ static void nec_reset (void) I.poll_state = 1; } -static void nec_exit (void) +static CPU_EXIT( nec ) { } @@ -346,7 +347,7 @@ static void nec_interrupt(unsigned int_num,BOOLEAN md_flag) if (int_num == -1) { - int_num = (*I.irq_callback)(0); + int_num = (*I.irq_callback)(I.device, 0); I.irq_state = CLEAR_LINE; I.pending_irq &= ~INT_IRQ; @@ -1107,7 +1108,7 @@ static offs_t nec_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 return necv_dasm_one(buffer, pc, oprom, I.config); } -static void nec_init(int index, int clock, const void *_config, int (*irqcallback)(int), int type) +static void nec_init(const device_config *device, int index, int clock, const void *_config, cpu_irq_callback irqcallback, int type) { const nec_config *config = _config ? _config : &default_config; @@ -1138,6 +1139,7 @@ static void nec_init(int index, int clock, const void *_config, int (*irqcallbac state_save_register_item(names[type], index, I.ParityVal); I.irq_callback = irqcallback; + I.device = device; } @@ -1228,7 +1230,7 @@ static void configure_memory_16bit(void) } #endif -static int necv_execute(int cycles) +static CPU_EXECUTE( necv ) { int prev_ICount; @@ -1258,9 +1260,9 @@ static int necv_execute(int cycles) /* Wrappers for the different CPU types */ #if (HAS_V20||HAS_V25) -static void v20_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( v20 ) { - nec_init(index, clock, config, irqcallback, 0); + nec_init(device, index, clock, config, irqcallback, 0); configure_memory_8bit(); I.chip_type=V20; I.prefetch_size = 4; /* 3 words */ @@ -1269,9 +1271,9 @@ static void v20_init(int index, int clock, const void *config, int (*irqcallback #endif #if (HAS_V30||HAS_V35) -static void v30_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( v30 ) { - nec_init(index, clock, config, irqcallback, 1); + nec_init(device, index, clock, config, irqcallback, 1); configure_memory_16bit(); I.chip_type=V30; I.prefetch_size = 6; /* 3 words */ @@ -1281,9 +1283,9 @@ static void v30_init(int index, int clock, const void *config, int (*irqcallback #endif #if (HAS_V33) -static void v33_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( v33 ) { - nec_init(index, clock, config, irqcallback, 2); + nec_init(device, index, clock, config, irqcallback, 2); I.chip_type=V33; I.prefetch_size = 6; /* ???? */ I.prefetch_cycles = 2; /* two cycles per byte / four per word */ @@ -1413,9 +1415,9 @@ static void nec_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_GET_CONTEXT: info->getcontext = nec_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = nec_set_context; break; case CPUINFO_PTR_INIT: /* set per-CPU */ break; - case CPUINFO_PTR_RESET: info->reset = nec_reset; break; - case CPUINFO_PTR_EXIT: info->exit = nec_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = necv_execute; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(nec); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(nec); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(necv); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = nec_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_ICount; break; @@ -1482,7 +1484,7 @@ void v20_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v20_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v20); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "V20"); break; @@ -1507,7 +1509,7 @@ void v25_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v20_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v20); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "V25"); break; @@ -1528,7 +1530,7 @@ void v30_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v30_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v30); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "V30"); break; @@ -1549,7 +1551,7 @@ void v33_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v33_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v33); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "V33"); break; @@ -1570,7 +1572,7 @@ void v35_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v30_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v30); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "V35"); break; diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c index fe67d478859..555b757f1f2 100644 --- a/src/emu/cpu/pdp1/pdp1.c +++ b/src/emu/cpu/pdp1/pdp1.c @@ -526,7 +526,7 @@ static void pdp1_set_irq_line (int irqline, int state) } -static void pdp1_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( pdp1 ) { const pdp1_reset_param_t *param = config; int i; @@ -580,7 +580,7 @@ static void pdp1_init(int index, int clock, const void *config, int (*irqcallbac pulse_start_clear(); } -static void pdp1_reset (void) +static CPU_RESET( pdp1 ) { /* nothing to do */ } @@ -618,7 +618,7 @@ static const char instruction_kind[32] = /* execute instructions on this CPU until icount expires */ -static int pdp1_execute(int cycles) +static CPU_EXECUTE( pdp1 ) { pdp1_ICount = cycles; @@ -1018,9 +1018,9 @@ void pdp1_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = pdp1_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = pdp1_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = pdp1_set_context; break; - case CPUINFO_PTR_INIT: info->init = pdp1_init; break; - case CPUINFO_PTR_RESET: info->reset = pdp1_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = pdp1_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pdp1); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pdp1); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(pdp1); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = pdp1_dasm; break; diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c index d6b162eb970..1774c743d0d 100644 --- a/src/emu/cpu/pdp1/tx0.c +++ b/src/emu/cpu/pdp1/tx0.c @@ -127,7 +127,7 @@ static void tx0_write(offs_t address, int data) ; } -static void tx0_init_common(int is_64kw, int index, int clock, const void *config, int (*irqcallback)(int)) +static void tx0_init_common(int is_64kw, const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback) { int i; tx0_reset_param_t *param = (tx0_reset_param_t *) config; @@ -145,17 +145,17 @@ static void tx0_init_common(int is_64kw, int index, int clock, const void *confi tx0.ir_mask = is_64kw ? 03 : 037; } -static void tx0_init_64kw(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( tx0_64kw ) { - tx0_init_common(1, index, clock, config, irqcallback); + tx0_init_common(1, device, index, clock, config, irqcallback); } -static void tx0_init_8kw(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( tx0_8kw) { - tx0_init_common(0, index, clock, config, irqcallback); + tx0_init_common(0, device, index, clock, config, irqcallback); } -static void tx0_reset(void) +static CPU_RESET( tx0 ) { /* reset CPU flip-flops */ pulse_reset(); @@ -177,7 +177,7 @@ static void tx0_set_context(void *src) /* execute instructions on this CPU until icount expires */ -static int tx0_execute_64kw(int cycles) +static CPU_EXECUTE( tx0_64kw ) { tx0_ICount = cycles; @@ -285,7 +285,7 @@ static int tx0_execute_64kw(int cycles) } /* execute instructions on this CPU until icount expires */ -static int tx0_execute_8kw(int cycles) +static CPU_EXECUTE( tx0_8kw ) { tx0_ICount = cycles; @@ -513,9 +513,9 @@ void tx0_64kw_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tx0_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tx0_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tx0_set_context; break; - case CPUINFO_PTR_INIT: info->init = tx0_init_64kw; break; - case CPUINFO_PTR_RESET: info->reset = tx0_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = tx0_execute_64kw; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tx0_64kw); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tx0); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_64kw); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tx0_dasm_64kw; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break; @@ -639,11 +639,11 @@ void tx0_8kw_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tx0_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tx0_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tx0_set_context; break; - case CPUINFO_PTR_INIT: info->init = tx0_init_8kw; break; - case CPUINFO_PTR_RESET: info->reset = tx0_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = tx0_execute_8kw; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tx0_8kw); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tx0); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_8kw); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; - case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tx0_dasm_8kw; break; + case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tx0_dasm_8kw; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/pic16c5x/pic16c5x.c b/src/emu/cpu/pic16c5x/pic16c5x.c index 89b026804e6..6a3990ae49e 100644 --- a/src/emu/cpu/pic16c5x/pic16c5x.c +++ b/src/emu/cpu/pic16c5x/pic16c5x.c @@ -690,7 +690,7 @@ static const opcode_fn opcode_000_other[16]= * Inits CPU emulation ****************************************************************************/ -static void pic16C5x_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( pic16C5x ) { state_save_register_item("pic16C5x", index, old_data); state_save_register_item("pic16C5x", index, R.W); @@ -760,7 +760,7 @@ void pic16c5x_config(int data) * Shut down CPU emulation ****************************************************************************/ -static void pic16C5x_exit (void) +static CPU_EXIT( pic16C5x ) { /* nothing to do */ } @@ -831,7 +831,7 @@ static void pic16C5x_update_timer(int counts) * Execute IPeriod. Return 0 if emulation should be stopped ****************************************************************************/ -static int pic16C5x_execute(int cycles) +static CPU_EXECUTE( pic16C5x ) { int T0_in; pic16C5x_icount = cycles; @@ -1008,10 +1008,10 @@ static void pic16C5x_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = pic16C5x_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = pic16C5x_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = pic16C5x_set_context; break; - case CPUINFO_PTR_INIT: info->init = pic16C5x_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pic16C5x); break; case CPUINFO_PTR_RESET: /* set per-CPU */ break; - case CPUINFO_PTR_EXIT: info->exit = pic16C5x_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = pic16C5x_execute; break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(pic16C5x); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(pic16C5x); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = pic16C5x_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &pic16C5x_icount; break; @@ -1078,7 +1078,7 @@ ADDRESS_MAP_END * PIC16C54 Reset ****************************************************************************/ -static void pic16C54_reset(void) +static CPU_RESET( pic16C54 ) { picmodel = 0x16C54; picRAMmask = 0x1f; @@ -1099,7 +1099,7 @@ void pic16C54_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = pic16C54_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pic16C54); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_pic16c54_rom; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_pic16c54_ram; break; @@ -1130,7 +1130,7 @@ ADDRESS_MAP_END * PIC16C55 Reset ****************************************************************************/ -static void pic16C55_reset(void) +static CPU_RESET( pic16C55 ) { picmodel = 0x16C55; picRAMmask = 0x1f; @@ -1151,7 +1151,7 @@ void pic16C55_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = pic16C55_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pic16C55); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_pic16c55_rom; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_pic16c55_ram; break; @@ -1182,7 +1182,7 @@ ADDRESS_MAP_END * PIC16C56 Reset ****************************************************************************/ -static void pic16C56_reset(void) +static CPU_RESET( pic16C56 ) { picmodel = 0x16C56; picRAMmask = 0x1f; @@ -1203,7 +1203,7 @@ void pic16C56_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = pic16C56_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pic16C56); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_pic16c56_rom; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_pic16c56_ram; break; @@ -1239,7 +1239,7 @@ ADDRESS_MAP_END * PIC16C57 Reset ****************************************************************************/ -static void pic16C57_reset(void) +static CPU_RESET( pic16C57 ) { picmodel = 0x16C57; picRAMmask = 0x7f; @@ -1260,7 +1260,7 @@ void pic16C57_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = pic16C57_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pic16C57); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_pic16c57_rom; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_pic16c57_ram; break; @@ -1297,7 +1297,7 @@ ADDRESS_MAP_END * PIC16C58 Reset ****************************************************************************/ -static void pic16C58_reset(void) +static CPU_RESET( pic16C58 ) { picmodel = 0x16C58; picRAMmask = 0x7f; @@ -1318,7 +1318,7 @@ void pic16C58_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = pic16C58_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pic16C58); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_pic16c58_rom; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_pic16c58_ram; break; diff --git a/src/emu/cpu/powerpc/drc_ops.c b/src/emu/cpu/powerpc/drc_ops.c index 0458bd57b75..481bfde74b6 100644 --- a/src/emu/cpu/powerpc/drc_ops.c +++ b/src/emu/cpu/powerpc/drc_ops.c @@ -51,7 +51,7 @@ static void ppcdrc_init(void) drconfig.pcptr = (UINT32 *)&ppc.pc; drconfig.icountptr = (UINT32 *)&ppc_icount; drconfig.esiptr = NULL; - drconfig.cb_reset = ppcdrc_reset; + drconfig.cb_reset = CPU_RESET_NAME(ppcdrc); drconfig.cb_recompile = ppcdrc_recompile; drconfig.cb_entrygen = ppcdrc_entrygen; @@ -110,7 +110,7 @@ static void ppcdrc_reset(drc_core *drc) } } -static void ppcdrc_exit(void) +static CPU_EXIT( ppcdrc ) { drc_exit(ppc.drc); } diff --git a/src/emu/cpu/powerpc/ppc.c b/src/emu/cpu/powerpc/ppc.c index 66d2cceae9c..d2c52ab0af8 100644 --- a/src/emu/cpu/powerpc/ppc.c +++ b/src/emu/cpu/powerpc/ppc.c @@ -312,8 +312,8 @@ typedef struct { UINT64 tb; /* 56-bit timebase register */ - int (*irq_callback)(int irqline); - + cpu_irq_callback irq_callback; + const device_config *device; // STUFF added for the 6xx series UINT32 dec, dec_frac; @@ -974,9 +974,9 @@ static void ppc_init(void) // !!! probably should move this stuff elsewhere !!! #if HAS_PPC403 -static void ppc403_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ppc403 ) { - const ppc_config *config = _config; + const ppc_config *configdata = config; ppc_init(); @@ -1009,11 +1009,12 @@ static void ppc403_init(int index, int clock, const void *_config, int (*irqcall ppc.write32_unaligned = ppc403_write32_unaligned; ppc.irq_callback = irqcallback; + ppc.device = device; - ppc.pvr = config->pvr; + ppc.pvr = configdata->pvr; } -static void ppc403_exit(void) +static CPU_EXIT( ppc403 ) { } @@ -1021,9 +1022,9 @@ static void ppc403_exit(void) #if (HAS_PPC603) -static void ppc603_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ppc603 ) { - const ppc_config *config = _config; + const ppc_config *configdata = config; int pll_config = 0; float multiplier; int i ; @@ -1135,18 +1136,19 @@ static void ppc603_init(int index, int clock, const void *_config, int (*irqcall ppc.write64_unaligned = ppc_write64_unaligned; ppc.irq_callback = irqcallback; + ppc.device = device; - ppc.pvr = config->pvr; + ppc.pvr = configdata->pvr; - multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) + - (float)(config->bus_frequency_multiplier & 0xf) / 10.0f; + multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) + + (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f; bus_freq_multiplier = (int)(multiplier * 2); switch(config->pvr) { - case PPC_MODEL_603E: pll_config = mpc603e_pll_config[bus_freq_multiplier-1][config->bus_frequency]; break; - case PPC_MODEL_603EV: pll_config = mpc603ev_pll_config[bus_freq_multiplier-1][config->bus_frequency]; break; - case PPC_MODEL_603R: pll_config = mpc603r_pll_config[bus_freq_multiplier-1][config->bus_frequency]; break; + case PPC_MODEL_603E: pll_config = mpc603e_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break; + case PPC_MODEL_603EV: pll_config = mpc603ev_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break; + case PPC_MODEL_603R: pll_config = mpc603r_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break; default: break; } @@ -1158,17 +1160,17 @@ static void ppc603_init(int index, int clock, const void *_config, int (*irqcall ppc.hid1 = pll_config << 28; } -static void ppc603_exit(void) +static CPU_EXIT( ppc603 ) { } #endif #if (HAS_PPC602) -static void ppc602_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ppc602 ) { float multiplier; - const ppc_config *config = _config; + const ppc_config *configdata = config; int i ; @@ -1283,15 +1285,16 @@ static void ppc602_init(int index, int clock, const void *_config, int (*irqcall ppc.write64_unaligned = ppc_write64_unaligned; ppc.irq_callback = irqcallback; + ppc.device = device; - ppc.pvr = config->pvr; + ppc.pvr = configdata->pvr; - multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) + - (float)(config->bus_frequency_multiplier & 0xf) / 10.0f; + multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) + + (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f; bus_freq_multiplier = (int)(multiplier * 2); } -static void ppc602_exit(void) +static CPU_EXIT( ppc602 ) { } @@ -1309,10 +1312,10 @@ static void mpc8240_tlbld(UINT32 op) } -static void mpc8240_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( mpc8240 ) { float multiplier; - const ppc_config *config = _config; + const ppc_config *configdata = config; int i ; @@ -1425,15 +1428,16 @@ static void mpc8240_init(int index, int clock, const void *_config, int (*irqcal ppc.write64_unaligned = ppc_write64_unaligned; ppc.irq_callback = irqcallback; + ppc.device = device; - ppc.pvr = config->pvr; + ppc.pvr = configdata->pvr; - multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) + - (float)(config->bus_frequency_multiplier & 0xf) / 10.0f; + multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) + + (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f; bus_freq_multiplier = (int)(multiplier * 2); } -static void mpc8240_exit(void) +static CPU_EXIT( mpc8240 ) { } @@ -1441,9 +1445,9 @@ static void mpc8240_exit(void) #if (HAS_PPC601) -static void ppc601_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ppc601 ) { - const ppc_config *config = _config; + const ppc_config *configdata = config; float multiplier; int i ; @@ -1552,26 +1556,27 @@ static void ppc601_init(int index, int clock, const void *_config, int (*irqcall ppc.write64_unaligned = ppc_write64_unaligned; ppc.irq_callback = irqcallback; + ppc.device = device; - ppc.pvr = config->pvr; + ppc.pvr = configdata->pvr; - multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) + - (float)(config->bus_frequency_multiplier & 0xf) / 10.0f; + multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) + + (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f; bus_freq_multiplier = (int)(multiplier * 2); ppc.hid1 = 0; } -static void ppc601_exit(void) +static CPU_EXIT( ppc601 ) { } #endif #if (HAS_PPC604) -static void ppc604_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( ppc604 ) { - const ppc_config *config = _config; + const ppc_config *configdata = config; float multiplier; int i ; @@ -1682,17 +1687,18 @@ static void ppc604_init(int index, int clock, const void *_config, int (*irqcall ppc.write64_unaligned = ppc_write64_unaligned; ppc.irq_callback = irqcallback; + ppc.device = device; - ppc.pvr = config->pvr; + ppc.pvr = configdata->pvr; - multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) + - (float)(config->bus_frequency_multiplier & 0xf) / 10.0f; + multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) + + (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f; bus_freq_multiplier = (int)(multiplier * 2); ppc.hid1 = 0; } -static void ppc604_exit(void) +static CPU_EXIT( ppc604 ) { } @@ -1952,10 +1958,10 @@ void ppc403_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = ppc403_set_info; break; - case CPUINFO_PTR_INIT: info->init = ppc403_init; break; - case CPUINFO_PTR_RESET: info->reset = ppc403_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ppc403_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppc403_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc403); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc403); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc403); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc403); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PPC403"); break; @@ -1984,10 +1990,10 @@ void ppc603_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = ppc603_set_info; break; - case CPUINFO_PTR_INIT: info->init = ppc603_init; break; - case CPUINFO_PTR_RESET: info->reset = ppc603_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ppc603_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppc603_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc603); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc603); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break; case CPUINFO_PTR_READ: info->read = ppc_read; break; case CPUINFO_PTR_WRITE: info->write = ppc_write; break; case CPUINFO_PTR_READOP: info->readop = ppc_readop; break; @@ -2033,10 +2039,10 @@ void ppc602_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = ppc602_set_info; break; - case CPUINFO_PTR_INIT: info->init = ppc602_init; break; - case CPUINFO_PTR_RESET: info->reset = ppc602_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ppc602_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppc602_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc602); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc602); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc602); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc602); break; case CPUINFO_PTR_READ: info->read = ppc_read; break; case CPUINFO_PTR_WRITE: info->write = ppc_write; break; case CPUINFO_PTR_READOP: info->readop = ppc_readop; break; @@ -2080,10 +2086,10 @@ void mpc8240_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = mpc8240_set_info; break; - case CPUINFO_PTR_INIT: info->init = mpc8240_init; break; - case CPUINFO_PTR_RESET: info->reset = ppc603_reset; break; - case CPUINFO_PTR_EXIT: info->exit = mpc8240_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppc603_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mpc8240); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mpc8240); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break; case CPUINFO_PTR_READ: info->read = ppc_read; break; case CPUINFO_PTR_WRITE: info->write = ppc_write; break; case CPUINFO_PTR_READOP: info->readop = ppc_readop; break; @@ -2125,10 +2131,10 @@ void ppc601_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = ppc601_set_info; break; - case CPUINFO_PTR_INIT: info->init = ppc601_init; break; - case CPUINFO_PTR_RESET: info->reset = ppc603_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ppc601_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppc603_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc601); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc601); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break; case CPUINFO_PTR_READ: info->read = ppc_read; break; case CPUINFO_PTR_WRITE: info->write = ppc_write; break; case CPUINFO_PTR_READOP: info->readop = ppc_readop; break; @@ -2170,10 +2176,10 @@ void ppc604_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = ppc604_set_info; break; - case CPUINFO_PTR_INIT: info->init = ppc604_init; break; - case CPUINFO_PTR_RESET: info->reset = ppc603_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ppc604_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppc603_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc604); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc604); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break; case CPUINFO_PTR_READ: info->read = ppc_read; break; case CPUINFO_PTR_WRITE: info->write = ppc_write; break; case CPUINFO_PTR_READOP: info->readop = ppc_readop; break; diff --git a/src/emu/cpu/powerpc/ppc403.c b/src/emu/cpu/powerpc/ppc403.c index 620a62f3c11..499a1e233b3 100644 --- a/src/emu/cpu/powerpc/ppc403.c +++ b/src/emu/cpu/powerpc/ppc403.c @@ -140,7 +140,7 @@ INLINE void ppc403_check_interrupts(void) } } -static void ppc403_reset(void) +static CPU_RESET( ppc403 ) { ppc.pc = ppc.npc = 0xfffffffc; @@ -148,7 +148,7 @@ static void ppc403_reset(void) change_pc(ppc.pc); } -static int ppc403_execute(int cycles) +static CPU_EXECUTE( ppc403 ) { UINT32 fit_trigger_cycle; ppc_icount = cycles; @@ -424,7 +424,7 @@ static void ppc403_set_irq_line(int irqline, int state) if (ppc.irq_callback) { - ppc.irq_callback(irqline); + ppc.irq_callback(ppc.device, irqline); } } } diff --git a/src/emu/cpu/powerpc/ppc602.c b/src/emu/cpu/powerpc/ppc602.c index 5e623b0f88f..f0f71c0e832 100644 --- a/src/emu/cpu/powerpc/ppc602.c +++ b/src/emu/cpu/powerpc/ppc602.c @@ -173,7 +173,7 @@ static void ppc602_set_irq_line(int irqline, int state) ppc.interrupt_pending |= 0x1; if (ppc.irq_callback) { - ppc.irq_callback(irqline); + ppc.irq_callback(ppc.device, irqline); } } } @@ -207,7 +207,7 @@ INLINE void ppc602_check_interrupts(void) } } -static void ppc602_reset(void) +static CPU_RESET( ppc602 ) { ppc.pc = ppc.npc = 0xfff00100; @@ -219,7 +219,7 @@ static void ppc602_reset(void) ppc.interrupt_pending = 0; } -static int ppc602_execute(int cycles) +static CPU_EXECUTE( ppc602 ) { int exception_type; UINT32 opcode; diff --git a/src/emu/cpu/powerpc/ppc603.c b/src/emu/cpu/powerpc/ppc603.c index 5985ce934ea..3f1b6ee6885 100644 --- a/src/emu/cpu/powerpc/ppc603.c +++ b/src/emu/cpu/powerpc/ppc603.c @@ -178,7 +178,7 @@ static void ppc603_set_irq_line(int irqline, int state) ppc.interrupt_pending |= 0x1; if (ppc.irq_callback) { - ppc.irq_callback(irqline); + ppc.irq_callback(ppc.device, irqline); } } } @@ -214,7 +214,7 @@ INLINE void ppc603_check_interrupts(void) } } -static void ppc603_reset(void) +static CPU_RESET( ppc603 ) { ppc.pc = ppc.npc = 0xfff00100; @@ -227,7 +227,7 @@ static void ppc603_reset(void) } -static int ppc603_execute(int cycles) +static CPU_EXECUTE( ppc603 ) { int exception_type; UINT32 opcode; diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c index 8e25ccc654b..04f9cc4c1d1 100644 --- a/src/emu/cpu/powerpc/ppccom.c +++ b/src/emu/cpu/powerpc/ppccom.c @@ -183,7 +183,7 @@ INLINE void set_decrementer(powerpc_state *ppc, UINT32 newdec) structure based on the configured type -------------------------------------------------*/ -void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, int index, int clock, const powerpc_config *config, int (*irqcallback)(int)) +void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, const powerpc_config *config, cpu_irq_callback irqcallback) { /* initialize based on the config */ memset(ppc, 0, sizeof(*ppc)); @@ -194,6 +194,7 @@ void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_di ppc->tb_divisor = tb_divisor; ppc->cpu_clock = clock; ppc->irq_callback = irqcallback; + ppc->device = device; ppc->system_clock = (config != NULL) ? config->bus_frequency : clock; ppc->tb_divisor = (ppc->tb_divisor * clock + ppc->system_clock / 2 - 1) / ppc->system_clock; diff --git a/src/emu/cpu/powerpc/ppccom.h b/src/emu/cpu/powerpc/ppccom.h index 9ace71aa23f..9024e430b47 100644 --- a/src/emu/cpu/powerpc/ppccom.h +++ b/src/emu/cpu/powerpc/ppccom.h @@ -552,7 +552,8 @@ struct _powerpc_state /* internal stuff */ int cpunum; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT32 irq_pending; UINT32 system_clock; UINT32 cpu_clock; @@ -570,7 +571,7 @@ struct _powerpc_state FUNCTION PROTOTYPES ***************************************************************************/ -void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, int index, int clock, const powerpc_config *config, int (*irqcallback)(int)); +void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, const powerpc_config *config, cpu_irq_callback irqcallback); void ppccom_exit(powerpc_state *ppc); void ppccom_reset(powerpc_state *ppc); diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c index 34156b669f3..c8abec59af4 100644 --- a/src/emu/cpu/powerpc/ppcdrc.c +++ b/src/emu/cpu/powerpc/ppcdrc.c @@ -534,7 +534,7 @@ INLINE UINT32 compute_spr(UINT32 spr) ppcdrc_init - initialize the processor -------------------------------------------------*/ -static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int index, int clock, const powerpc_config *config, int (*irqcallback)(int)) +static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, const powerpc_config *config, cpu_irq_callback irqcallback) { drcfe_config feconfig = { @@ -558,7 +558,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int in memset(ppc, 0, sizeof(*ppc)); /* initialize the core */ - ppccom_init(ppc, flavor, cap, tb_divisor, index, clock, config, irqcallback); + ppccom_init(ppc, flavor, cap, tb_divisor, device, index, clock, config, irqcallback); /* allocate the implementation-specific state from the full cache */ ppc->impstate = drccache_memory_alloc_near(cache, sizeof(*ppc->impstate)); @@ -670,7 +670,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int in ppcdrc_reset - reset the processor -------------------------------------------------*/ -static void ppcdrc_reset(void) +static CPU_RESET( ppcdrc ) { /* reset the common code and mark the cache dirty */ ppccom_reset(ppc); @@ -684,7 +684,7 @@ static void ppcdrc_reset(void) specified number of cycles -------------------------------------------------*/ -static int ppcdrc_execute(int cycles) +static CPU_EXECUTE( ppcdrc ) { drcuml_state *drcuml = ppc->impstate->drcuml; int execute_result; @@ -720,7 +720,7 @@ static int ppcdrc_execute(int cycles) ppcdrc_exit - cleanup from execution -------------------------------------------------*/ -static void ppcdrc_exit(void) +static CPU_EXIT( ppcdrc ) { ppccom_exit(ppc); @@ -825,9 +825,9 @@ static void ppcdrc_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ppcdrc_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ppcdrc_set_context; break; case CPUINFO_PTR_INIT: /* provided per-CPU */ break; - case CPUINFO_PTR_RESET: info->reset = ppcdrc_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ppcdrc_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ppcdrc_execute; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppcdrc); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppcdrc); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppcdrc); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ppcdrc_dasm; break; case CPUINFO_PTR_TRANSLATE: info->translate = ppcdrc_translate; break; case CPUINFO_PTR_CONTEXT: info->p = ppc; break; @@ -4218,9 +4218,9 @@ static void ppcdrc4xx_set_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc403ga_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc403ga ) { - ppcdrc_init(PPC_MODEL_403GA, PPCCAP_4XX, 1, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_403GA, PPCCAP_4XX, 1, device, index, clock, config, irqcallback); } @@ -4236,7 +4236,7 @@ void ppc403ga_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc403ga_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc403ga); break; case CPUINFO_PTR_SET_INFO: info->setinfo = ppcdrc4xx_set_info; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -4257,9 +4257,9 @@ void ppc403ga_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc403gcx_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc403gcx ) { - ppcdrc_init(PPC_MODEL_403GCX, PPCCAP_4XX, 1, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_403GCX, PPCCAP_4XX, 1, device, index, clock, config, irqcallback); } @@ -4275,7 +4275,7 @@ void ppc403gcx_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc403gcx_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc403gcx); break; case CPUINFO_PTR_SET_INFO: info->setinfo = ppcdrc4xx_set_info; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -4301,9 +4301,9 @@ void ppc403gcx_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc601_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc601 ) { - ppcdrc_init(PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 0/* no TB */, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 0/* no TB */, device, index, clock, config, irqcallback); } @@ -4319,7 +4319,7 @@ void ppc601_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc601_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc601); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 601"); break; @@ -4339,9 +4339,9 @@ void ppc601_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc602_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc602 ) { - ppcdrc_init(PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback); } @@ -4357,7 +4357,7 @@ void ppc602_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc602_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc602); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 602"); break; @@ -4377,9 +4377,9 @@ void ppc602_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc603_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc603 ) { - ppcdrc_init(PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback); } @@ -4395,7 +4395,7 @@ void ppc603_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc603_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc603); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603"); break; @@ -4415,9 +4415,9 @@ void ppc603_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc603e_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc603e ) { - ppcdrc_init(PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback); } @@ -4433,7 +4433,7 @@ void ppc603e_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc603e_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc603e); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603e"); break; @@ -4453,9 +4453,9 @@ void ppc603e_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc603r_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc603r ) { - ppcdrc_init(PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback); } @@ -4471,7 +4471,7 @@ void ppc603r_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc603r_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc603r); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603R"); break; @@ -4491,9 +4491,9 @@ void ppc603r_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void ppc604_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ppc604 ) { - ppcdrc_init(PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4, device, index, clock, config, irqcallback); } @@ -4509,7 +4509,7 @@ void ppc604_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = ppc604_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc604); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 604"); break; @@ -4534,9 +4534,9 @@ void ppc604_get_info(UINT32 state, cpuinfo *info) initialization -------------------------------------------------*/ -static void mpc8240_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( mpc8240 ) { - ppcdrc_init(PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4/* unknown */, index, clock, config, irqcallback); + ppcdrc_init(PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4/* unknown */, device, index, clock, config, irqcallback); } @@ -4552,7 +4552,7 @@ void mpc8240_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as 64-bit signed integers --- */ /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = mpc8240_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mpc8240); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC MPC8240"); break; diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c index 68b8655ebd9..00e5eb1e01a 100644 --- a/src/emu/cpu/rsp/rsp.c +++ b/src/emu/cpu/rsp/rsp.c @@ -29,7 +29,7 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op); static FILE *exec_output; -static rsp_config *config; +static rsp_config *configdata; typedef struct @@ -58,7 +58,8 @@ typedef struct UINT32 ppc; UINT32 nextpc; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } RSP_REGS; @@ -230,11 +231,11 @@ static UINT32 get_cop0_reg(int reg) { if (reg >= 0 && reg < 8) { - return (config->sp_reg_r)(Machine, reg, 0x00000000); + return (configdata->sp_reg_r)(Machine, reg, 0x00000000); } else if (reg >= 8 && reg < 16) { - return (config->dp_reg_r)(Machine, reg - 8, 0x00000000); + return (configdata->dp_reg_r)(Machine, reg - 8, 0x00000000); } else { @@ -246,11 +247,11 @@ static void set_cop0_reg(int reg, UINT32 data) { if (reg >= 0 && reg < 8) { - (config->sp_reg_w)(Machine, reg, data, 0x00000000); + (configdata->sp_reg_w)(Machine, reg, data, 0x00000000); } else if (reg >= 8 && reg < 16) { - (config->dp_reg_w)(Machine, reg - 8, data, 0x00000000); + (configdata->dp_reg_w)(Machine, reg - 8, data, 0x00000000); } else { @@ -342,16 +343,17 @@ static const int vector_elements_2[16][8] = { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7 }; -static void rsp_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( rsp ) { int regIdx; int accumIdx; - config = (rsp_config *)_config; + configdata = (rsp_config *)config; if (LOG_INSTRUCTION_EXECUTION) exec_output = fopen("rsp_execute.txt", "wt"); rsp.irq_callback = irqcallback; + rsp.device = device; #if 1 // Inaccurate. RSP registers power on to a random state... @@ -383,7 +385,7 @@ static void rsp_init(int index, int clock, const void *_config, int (*irqcallbac rsp.step_count = 0; } -static void rsp_exit(void) +static CPU_EXIT( rsp ) { #if SAVE_DISASM { @@ -429,7 +431,7 @@ static void rsp_exit(void) exec_output = NULL; } -static void rsp_reset(void) +static CPU_RESET( rsp ) { rsp.nextpc = ~0; } @@ -2578,7 +2580,7 @@ static void handle_vector_ops(UINT32 op) } } -static int rsp_execute(int cycles) +static CPU_EXECUTE( rsp ) { UINT32 op; @@ -2623,7 +2625,7 @@ static int rsp_execute(int cycles) case 0x09: /* JALR */ JUMP_PC_L(RSVAL, RDREG); break; case 0x0d: /* BREAK */ { - (config->sp_set_status)(0x3); + (configdata->sp_set_status)(0x3); rsp_icount = MIN(rsp_icount, 1); if (LOG_INSTRUCTION_EXECUTION) fprintf(exec_output, "\n---------- break ----------\n\n"); @@ -2999,10 +3001,10 @@ void rsp_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_GET_CONTEXT: info->getcontext = rsp_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = rsp_set_context; break; case CPUINFO_PTR_SET_INFO: info->setinfo = rsp_set_info; break; - case CPUINFO_PTR_INIT: info->init = rsp_init; break; - case CPUINFO_PTR_RESET: info->reset = rsp_reset; break; - case CPUINFO_PTR_EXIT: info->exit = rsp_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = rsp_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(rsp); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(rsp); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(rsp); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = rsp_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp_icount; break; diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c index 7b0a2dbc4c2..b3c2c58d487 100644 --- a/src/emu/cpu/s2650/s2650.c +++ b/src/emu/cpu/s2650/s2650.c @@ -40,7 +40,8 @@ typedef struct { UINT8 ir; /* instruction register */ UINT16 ras[8]; /* 8 return address stack entries */ UINT8 irq_state; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } s2650_Regs; static s2650_Regs S; @@ -127,7 +128,7 @@ static void s2650_set_sense(int state); S.halt = 0; \ S.iar = (S.iar + 1) & PMSK; \ } \ - vector = (*S.irq_callback)(0) & 0xff; \ + vector = (*S.irq_callback)(S.device, 0) & 0xff; \ /* build effective address within first 8K page */ \ S.ea = S2650_relative[vector] & PMSK; \ if (vector & 0x80) /* indirect bit set ? */ \ @@ -766,9 +767,10 @@ static void ABS_EA(void) _ABS_EA() static void BRA_EA(void) _BRA_EA() #endif -static void s2650_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( s2650 ) { S.irq_callback = irqcallback; + S.device = device; state_save_register_item("s2650", index, S.ppc); state_save_register_item("s2650", index, S.page); @@ -784,16 +786,18 @@ static void s2650_init(int index, int clock, const void *config, int (*irqcallba state_save_register_item("s2650", index, S.irq_state); } -static void s2650_reset(void) +static CPU_RESET( s2650 ) { - int (*save_irqcallback)(int) = S.irq_callback; + cpu_irq_callback save_irqcallback = S.irq_callback; + const device_config *save_device = S.device; memset(&S, 0, sizeof(S)); S.irq_callback = save_irqcallback; + S.device = save_device; S.psl = COM | WC; S.psu = 0; } -static void s2650_exit(void) +static CPU_EXIT( s2650 ) { /* nothing to do */ } @@ -858,7 +862,7 @@ static int s2650_get_sense(void) return (((S.psu & SI) ? 1 : 0) | ((io_read_byte_8le(S2650_SENSE_PORT) & SI) ? 1 : 0)); } -static int s2650_execute(int cycles) +static CPU_EXECUTE( s2650 ) { s2650_ICount = cycles; do @@ -1564,10 +1568,10 @@ void s2650_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = s2650_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = s2650_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = s2650_set_context; break; - case CPUINFO_PTR_INIT: info->init = s2650_init; break; - case CPUINFO_PTR_RESET: info->reset = s2650_reset; break; - case CPUINFO_PTR_EXIT: info->exit = s2650_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = s2650_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(s2650); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(s2650); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(s2650); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(s2650); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = s2650_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &s2650_ICount; break; diff --git a/src/emu/cpu/saturn/saturn.c b/src/emu/cpu/saturn/saturn.c index 62886b82ed4..3d78a4eff82 100644 --- a/src/emu/cpu/saturn/saturn.c +++ b/src/emu/cpu/saturn/saturn.c @@ -77,7 +77,8 @@ typedef struct UINT8 in_irq; /* already servicing IRQ */ UINT8 pending_irq; /* IRQ is pending */ UINT8 sleeping; /* low-consumption state */ - int (*irq_callback)(int irqline); /* IRQ callback */ + cpu_irq_callback irq_callback; + const device_config *device; } Saturn_Regs; static int saturn_ICount = 0; @@ -97,10 +98,11 @@ static Saturn_Regs saturn; * *****************************************************************************/ -static void saturn_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( saturn ) { saturn.config = (saturn_cpu_core *) config; saturn.irq_callback = irqcallback; + saturn.device = device; state_save_register_item_array("saturn",index,saturn.reg[R0]); state_save_register_item_array("saturn",index,saturn.reg[R1]); @@ -127,7 +129,7 @@ static void saturn_init(int index, int clock, const void *config, int (*irqcallb state_save_register_item("saturn",index,saturn.sleeping); } -static void saturn_reset(void) +static CPU_RESET( saturn ) { saturn.pc=0; saturn.sleeping = 0; @@ -163,11 +165,11 @@ INLINE void saturn_take_irq(void) LOG(("Saturn#%d takes IRQ ($%04x)\n", cpu_getactivecpu(), saturn.pc)); - if (saturn.irq_callback) (*saturn.irq_callback)(SATURN_IRQ_LINE); + if (saturn.irq_callback) (*saturn.irq_callback)(saturn.device, SATURN_IRQ_LINE); change_pc(saturn.pc); } -static int saturn_execute(int cycles) +static CPU_EXECUTE( saturn ) { saturn_ICount = cycles; @@ -227,7 +229,7 @@ static void saturn_set_wakeup_line(int state) if (saturn.sleeping && state==1) { LOG(( "SATURN#%d set_wakeup_line(ASSERT)\n", cpu_getactivecpu())); - if (saturn.irq_callback) (*saturn.irq_callback)(SATURN_WAKEUP_LINE); + if (saturn.irq_callback) (*saturn.irq_callback)(saturn.device, SATURN_WAKEUP_LINE); saturn.sleeping = 0; } } @@ -366,9 +368,9 @@ void saturn_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = saturn_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = saturn_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = saturn_set_context; break; - case CPUINFO_PTR_INIT: info->init = saturn_init; break; - case CPUINFO_PTR_RESET: info->reset = saturn_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = saturn_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(saturn); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(saturn); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(saturn); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = saturn_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &saturn_ICount; break; diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c index 9733e5e7d7e..4a9e88fc59f 100644 --- a/src/emu/cpu/sc61860/sc61860.c +++ b/src/emu/cpu/sc61860/sc61860.c @@ -77,7 +77,7 @@ static TIMER_CALLBACK(sc61860_2ms_tick) #include "scops.c" #include "sctable.c" -static void sc61860_reset(void) +static CPU_RESET( sc61860 ) { sc61860.timer.t2ms=0; sc61860.timer.t512ms=0; @@ -86,7 +86,7 @@ static void sc61860_reset(void) change_pc(sc61860.pc); } -static void sc61860_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( sc61860 ) { sc61860.config = (sc61860_cpu_core *) config; timer_pulse(ATTOTIME_IN_HZ(500), NULL, 0, sc61860_2ms_tick); @@ -107,7 +107,7 @@ static void sc61860_set_context (void *src) } } -static int sc61860_execute(int cycles) +static CPU_EXECUTE( sc61860 ) { sc61860_ICount = cycles; @@ -210,9 +210,9 @@ void sc61860_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = sc61860_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sc61860_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sc61860_set_context; break; - case CPUINFO_PTR_INIT: info->init = sc61860_init; break; - case CPUINFO_PTR_RESET: info->reset = sc61860_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = sc61860_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sc61860); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sc61860); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sc61860); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sc61860_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sc61860_ICount; break; diff --git a/src/emu/cpu/se3208/se3208.c b/src/emu/cpu/se3208/se3208.c index af93b1ae70d..2a4d6bdbb9a 100644 --- a/src/emu/cpu/se3208/se3208.c +++ b/src/emu/cpu/se3208/se3208.c @@ -21,7 +21,8 @@ typedef struct UINT32 ER; UINT32 PPC; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 IRQ; UINT8 NMI; } _SE3208Context; @@ -1721,11 +1722,13 @@ static void BuildTable(void) OpTable[i]=DecodeOp(i); } -static void SE3208_Reset(void) +static CPU_RESET( SE3208 ) { - int (*save_irqcallback)(int) = Context.irq_callback; + cpu_irq_callback save_irqcallback = Context.irq_callback; + const device_config *save_device = Context.device; memset(&Context,0,sizeof(_SE3208Context)); Context.irq_callback = save_irqcallback; + Context.device = device; Context.PC=SE3208_Read32(0); Context.SR=0; Context.IRQ=CLEAR_LINE; @@ -1758,12 +1761,12 @@ static void SE3208_Interrupt(void) if(!(TESTFLAG(FLAG_AUT))) Context.PC=SE3208_Read32(8); else - Context.PC=SE3208_Read32(4*Context.irq_callback(0)); + Context.PC=SE3208_Read32(4*Context.irq_callback(Context.device, 0)); change_pc(Context.PC+2); } -static int SE3208_Run(int cycles) +static CPU_EXECUTE( SE3208 ) { SE3208_ICount=cycles; do @@ -1791,14 +1794,15 @@ static int SE3208_Run(int cycles) return cycles-SE3208_ICount; } -static void SE3208_Init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( SE3208 ) { BuildTable(); Context.irq_callback = irqcallback; + Context.device = device; } -static void SE3208_Exit(void) +static CPU_EXIT( SE3208 ) { if(OpTable) free(OpTable); @@ -1902,10 +1906,10 @@ void SE3208_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = SE3208_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = SE3208_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = SE3208_set_context; break; - case CPUINFO_PTR_INIT: info->init = SE3208_Init; break; - case CPUINFO_PTR_RESET: info->reset = SE3208_Reset; break; - case CPUINFO_PTR_EXIT: info->exit = SE3208_Exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = SE3208_Run; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(SE3208); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(SE3208); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(SE3208); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(SE3208);break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = SE3208_Dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &SE3208_ICount; break; diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c index 98e20f2ebee..15c3ef19e77 100644 --- a/src/emu/cpu/sh2/sh2.c +++ b/src/emu/cpu/sh2/sh2.c @@ -2137,7 +2137,7 @@ INLINE void op1111(UINT16 opcode) * MAME CPU INTERFACE *****************************************************************************/ -static void sh2_reset(void) +static CPU_RESET( sh2 ) { void *tsave, *tsaved0, *tsaved1; UINT32 *m; @@ -2145,7 +2145,8 @@ static void sh2_reset(void) int save_is_slave; void (*f)(UINT32 data); - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; cpunum = sh2->cpu_number; m = sh2->m; @@ -2155,6 +2156,7 @@ static void sh2_reset(void) f = sh2->ftcsr_read_callback; save_irqcallback = sh2->irq_callback; + save_device = sh2->device; save_is_slave = sh2->is_slave; dma_callback_kludge = sh2->dma_callback_kludge; @@ -2164,6 +2166,7 @@ static void sh2_reset(void) sh2->is_slave = save_is_slave; sh2->ftcsr_read_callback = f; sh2->irq_callback = save_irqcallback; + sh2->device = save_device; sh2->timer = tsave; sh2->dma_timer[0] = tsaved0; @@ -2184,14 +2187,14 @@ static void sh2_reset(void) sh1_reset - reset the processor -------------------------------------------------*/ -static void sh1_reset(void) +static CPU_RESET( sh1 ) { sh2_reset(); sh2->cpu_type = CPU_TYPE_SH1; } /* Execute cycles - returns number of cycles actually run */ -static int sh2_execute(int cycles) +static CPU_EXECUTE( sh2 ) { sh2_icount = cycles; @@ -2267,14 +2270,14 @@ static offs_t sh2_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 return DasmSH2( buffer, pc, (oprom[0] << 8) | oprom[1] ); } -static void sh2_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( sh2 ) { /* allocate the core memory */ sh2 = auto_malloc(sizeof(SH2)); memset(sh2, 0, sizeof(SH2)); /* initialize the common core parts */ - sh2_common_init(0, index, clock, config, irqcallback); + sh2_common_init(0, device, index, clock, config, irqcallback); } /************************************************************************** @@ -2423,9 +2426,9 @@ void sh2_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = sh2_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sh2_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sh2_set_context; break; - case CPUINFO_PTR_INIT: info->init = sh2_init; break; - case CPUINFO_PTR_RESET: info->reset = sh2_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = sh2_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sh2); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh2); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sh2_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2_icount; break; @@ -2481,7 +2484,7 @@ void sh1_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = sh1_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh1); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break; diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c index ce846d65539..d40efb4d78c 100644 --- a/src/emu/cpu/sh2/sh2comn.c +++ b/src/emu/cpu/sh2/sh2comn.c @@ -651,12 +651,12 @@ void sh2_exception(const char *message, int irqline) { if(sh2->m[0x38] & 0x00010000) { - vector = sh2->irq_callback(irqline); + vector = sh2->irq_callback(sh2->device, irqline); LOG(("SH-2 #%d exception #%d (external vector: $%x) after [%s]\n", cpu_getactivecpu(), irqline, vector, message)); } else { - sh2->irq_callback(irqline); + sh2->irq_callback(sh2->device, irqline); vector = 64 + irqline/2; LOG(("SH-2 #%d exception #%d (autovector: $%x) after [%s]\n", cpu_getactivecpu(), irqline, vector, message)); } @@ -698,7 +698,7 @@ void sh2_exception(const char *message, int irqline) #endif } -void sh2_common_init(int alloc, int index, int clock, const void *config, int (*irqcallback)(int)) +void sh2_common_init(int alloc, const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback) { const sh2_cpu_core *conf = config; @@ -732,6 +732,7 @@ void sh2_common_init(int alloc, int index, int clock, const void *config, int (* } sh2->cpu_number = index; sh2->irq_callback = irqcallback; + sh2->device = device; state_save_register_item("sh2", index, sh2->pc); state_save_register_item("sh2", index, sh2->r[15]); diff --git a/src/emu/cpu/sh2/sh2comn.h b/src/emu/cpu/sh2/sh2comn.h index d77b084c28f..45838e8311c 100644 --- a/src/emu/cpu/sh2/sh2comn.h +++ b/src/emu/cpu/sh2/sh2comn.h @@ -111,7 +111,8 @@ typedef struct UINT32 pcflushes[16]; // pcflush entries INT8 irq_line_state[17]; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT32 *m; INT8 nmi_line_state; @@ -169,7 +170,7 @@ typedef struct TIMER_CALLBACK( sh2_timer_callback ); TIMER_CALLBACK( sh2_dmac_callback ); -void sh2_common_init(int alloc, int index, int clock, const void *config, int (*irqcallback)(int)); +void sh2_common_init(int alloc, const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback); void sh2_recalc_irq(void); void sh2_set_irq_line(int irqline, int state); void sh2_set_frt_input(int cpunum, int state); diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c index da988b1d2ce..ad53b40d9ce 100644 --- a/src/emu/cpu/sh2/sh2drc.c +++ b/src/emu/cpu/sh2/sh2drc.c @@ -663,7 +663,7 @@ static void cfunc_SUBV(void *param) sh2_init - initialize the processor -------------------------------------------------*/ -static void sh2_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( sh2 ) { drcfe_config feconfig = { @@ -687,7 +687,7 @@ static void sh2_init(int index, int clock, const void *config, int (*irqcallback memset(sh2, 0, sizeof(SH2)); /* initialize the common core parts */ - sh2_common_init(0, index, clock, config, irqcallback); + sh2_common_init(0, device, index, clock, config, irqcallback); /* allocate the implementation-specific state from the full cache */ sh2->cache = cache; @@ -764,7 +764,7 @@ static void sh2_init(int index, int clock, const void *config, int (*irqcallback sh2_exit - cleanup from execution -------------------------------------------------*/ -static void sh2_exit(void) +static CPU_EXIT( sh2 ) { /* clean up the DRC */ drcfe_exit(sh2->drcfe); @@ -777,14 +777,15 @@ static void sh2_exit(void) sh2_reset - reset the processor -------------------------------------------------*/ -static void sh2_reset(void) +static CPU_RESET( sh2 ) { void *tsave, *tsaved0, *tsaved1; UINT32 *m; int cpunum; void (*f)(UINT32 data); - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; cpunum = sh2->cpu_number; m = sh2->m; @@ -794,6 +795,7 @@ static void sh2_reset(void) f = sh2->ftcsr_read_callback; save_irqcallback = sh2->irq_callback; + save_device = sh2->device; sh2->ppc = sh2->pc = sh2->pr = sh2->sr = sh2->gbr = sh2->vbr = sh2->mach = sh2->macl = 0; sh2->evec = sh2->irqsr = 0; @@ -809,6 +811,7 @@ static void sh2_reset(void) sh2->ftcsr_read_callback = f; sh2->irq_callback = save_irqcallback; + sh2->device = save_device; sh2->timer = tsave; sh2->dma_timer[0] = tsaved0; @@ -833,9 +836,9 @@ static void sh2_reset(void) sh1_reset - reset the processor -------------------------------------------------*/ -static void sh1_reset(void) +static CPU_RESET( sh1 ) { - sh2_reset(); + CPU_RESET_CALL(sh2); sh2->cpu_type = CPU_TYPE_SH1; } @@ -866,7 +869,7 @@ static void code_flush_cache(drcuml_state *drcuml) } /* Execute cycles - returns number of cycles actually run */ -static int sh2_execute(int cycles) +static CPU_EXECUTE( sh2 ) { drcuml_state *drcuml = sh2->drcuml; int execute_result; @@ -3487,10 +3490,10 @@ void sh2_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = sh2_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sh2_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sh2_set_context; break; - case CPUINFO_PTR_INIT: info->init = sh2_init; break; - case CPUINFO_PTR_RESET: info->reset = sh2_reset; break; - case CPUINFO_PTR_EXIT: info->exit = sh2_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = sh2_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sh2); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh2); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sh2); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sh2_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break; @@ -3551,7 +3554,7 @@ void sh1_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = sh1_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh1); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break; diff --git a/src/emu/cpu/sh4/sh4.c b/src/emu/cpu/sh4/sh4.c index cda9e8b2a86..fd9c4afa106 100644 --- a/src/emu/cpu/sh4/sh4.c +++ b/src/emu/cpu/sh4/sh4.c @@ -3237,7 +3237,7 @@ INLINE void op1111(UINT16 opcode) * MAME CPU INTERFACE *****************************************************************************/ -static void sh4_reset(void) +static CPU_RESET( sh4 ) { void *tsaved[4]; emu_timer *tsave[5]; @@ -3247,7 +3247,8 @@ static void sh4_reset(void) int savecpu_clock, savebus_clock, savepm_clock; void (*f)(UINT32 data); - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; cpunum = sh4.cpu_number; m = sh4.m; @@ -3263,6 +3264,7 @@ static void sh4_reset(void) f = sh4.ftcsr_read_callback; save_irqcallback = sh4.irq_callback; + save_device = sh4.device; save_is_slave = sh4.is_slave; savecpu_clock = sh4.cpu_clock; savebus_clock = sh4.bus_clock; @@ -3274,6 +3276,7 @@ static void sh4_reset(void) sh4.pm_clock = savepm_clock; sh4.ftcsr_read_callback = f; sh4.irq_callback = save_irqcallback; + sh4.device = save_device; sh4.dma_timer[0] = tsaved[0]; sh4.dma_timer[1] = tsaved[1]; @@ -3314,7 +3317,7 @@ static void sh4_reset(void) } /* Execute cycles - returns number of cycles actually run */ -static int sh4_execute(int cycles) +static CPU_EXECUTE( sh4 ) { sh4.sh4_icount = cycles; @@ -3389,7 +3392,7 @@ static offs_t sh4_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 return DasmSH4( buffer, pc, (oprom[1] << 8) | oprom[0] ); } -static void sh4_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( sh4 ) { const struct sh4_config *conf = config; @@ -3399,6 +3402,7 @@ static void sh4_init(int index, int clock, const void *config, int (*irqcallback sh4.cpu_number = index; sh4.irq_callback = irqcallback; + sh4.device = device; sh4_default_exception_priorities(); sh4.irln = 15; sh4.test_irq = 0; @@ -3704,9 +3708,9 @@ void sh4_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = sh4_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sh4_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sh4_set_context; break; - case CPUINFO_PTR_INIT: info->init = sh4_init; break; - case CPUINFO_PTR_RESET: info->reset = sh4_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = sh4_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sh4); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh4); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sh4_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh4.sh4_icount; break; diff --git a/src/emu/cpu/sh4/sh4comn.c b/src/emu/cpu/sh4/sh4comn.c index 1fca0152af0..6d03bbdd5f2 100644 --- a/src/emu/cpu/sh4/sh4comn.c +++ b/src/emu/cpu/sh4/sh4comn.c @@ -171,7 +171,7 @@ void sh4_exception(const char *message, int exception) // handle exception sh4.m[ICR] &= ~0x200; sh4.m[INTEVT] = 0x1c0; vector = 0x600; - sh4.irq_callback(INPUT_LINE_NMI); + sh4.irq_callback(sh4.device, INPUT_LINE_NMI); LOG(("SH-4 #%d nmi exception after [%s]\n", cpu_getactivecpu(), message)); } else { // if ((sh4.m[ICR] & 0x4000) && (sh4.nmi_line_state == ASSERT_LINE)) @@ -183,9 +183,9 @@ void sh4_exception(const char *message, int exception) // handle exception sh4.m[INTEVT] = exception_codes[exception]; vector = 0x600; if ((exception >= SH4_INTC_IRL0) && (exception <= SH4_INTC_IRL3)) - sh4.irq_callback(SH4_INTC_IRL0-exception+SH4_IRL0); + sh4.irq_callback(sh4.device, SH4_INTC_IRL0-exception+SH4_IRL0); else - sh4.irq_callback(SH4_IRL3+1); + sh4.irq_callback(sh4.device, SH4_IRL3+1); LOG(("SH-4 #%d interrupt exception #%d after [%s]\n", cpu_getactivecpu(), exception, message)); } sh4_exception_checkunrequest(exception); diff --git a/src/emu/cpu/sh4/sh4comn.h b/src/emu/cpu/sh4/sh4comn.h index 80950c894d6..b486907d1f3 100644 --- a/src/emu/cpu/sh4/sh4comn.h +++ b/src/emu/cpu/sh4/sh4comn.h @@ -60,7 +60,8 @@ typedef struct int exception_requesting[128]; INT8 irq_line_state[17]; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT32 *m; INT8 nmi_line_state; diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c index 65f900bcd34..b1e33cd50d7 100644 --- a/src/emu/cpu/sharc/sharc.c +++ b/src/emu/cpu/sharc/sharc.c @@ -126,7 +126,8 @@ typedef struct UINT16 *internal_ram; UINT16 *internal_ram_block0, *internal_ram_block1; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; void (*opcode_handler)(void); UINT64 opcode; UINT64 fetch_opcode; @@ -418,7 +419,7 @@ static offs_t sharc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT } -static void sharc_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( sharc ) { const sharc_config *cfg = config; int saveindex; @@ -426,6 +427,7 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba sharc.boot_mode = cfg->boot_mode; sharc.irq_callback = irqcallback; + sharc.device = device; build_opcode_table(); @@ -549,7 +551,7 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba state_save_register_item("sharc", index, sharc.astat_old_old_old); } -static void sharc_reset(void) +static CPU_RESET( sharc ) { memset(sharc.internal_ram, 0, 2 * 0x10000 * sizeof(UINT16)); @@ -591,7 +593,7 @@ static void sharc_reset(void) sharc.interrupt_active = 0; } -static void sharc_exit(void) +static CPU_EXIT( sharc ) { /* TODO */ } @@ -683,7 +685,7 @@ static void check_interrupts(void) } } -static int sharc_execute(int cycles) +static CPU_EXECUTE( sharc ) { sharc_icount = cycles; @@ -1203,10 +1205,10 @@ static void sharc_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sharc_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sharc_set_context; break; - case CPUINFO_PTR_INIT: info->init = sharc_init; break; - case CPUINFO_PTR_RESET: info->reset = sharc_reset; break; - case CPUINFO_PTR_EXIT: info->exit = sharc_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = sharc_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sharc); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sharc); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sharc); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sharc); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sharc_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sharc_icount; break; diff --git a/src/emu/cpu/sm8500/sm8500.c b/src/emu/cpu/sm8500/sm8500.c index eea3c7061d4..df09630bc63 100644 --- a/src/emu/cpu/sm8500/sm8500.c +++ b/src/emu/cpu/sm8500/sm8500.c @@ -47,7 +47,8 @@ typedef struct { UINT8 IFLAGS; UINT8 CheckInterrupts; int halted; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 internal_ram[0x500]; } sm8500_regs; @@ -77,8 +78,9 @@ UINT8* sm8500_internal_ram( void ) return regs.internal_ram; } -static void sm8500_init(int index, int clock, const void *config, int (*irqcallback)(int)) { +static CPU_INIT( sm8500 ) { regs.irq_callback = irqcallback; + regs.device = device; if ( config != NULL ) { regs.config.handle_dma = ((SM8500_CONFIG *)config)->handle_dma; regs.config.handle_timers = ((SM8500_CONFIG *)config)->handle_timers; @@ -89,7 +91,7 @@ static void sm8500_init(int index, int clock, const void *config, int (*irqcallb regs.register_base = regs.internal_ram; } -static void sm8500_reset( void ) +static CPU_RESET( sm8500 ) { regs.PC = 0x1020; regs.IE0 = 0; @@ -107,7 +109,7 @@ static void sm8500_reset( void ) regs.halted = 0; } -static void sm8500_exit( void ) +static CPU_EXIT( sm8500 ) { } @@ -201,7 +203,7 @@ INLINE void sm8500_process_interrupts(void) { } } -static int sm8500_execute( int cycles ) +static CPU_EXECUTE( sm8500 ) { UINT8 op; UINT16 oldpc; @@ -492,10 +494,10 @@ void sm8500_get_info( UINT32 state, cpuinfo *info ) case CPUINFO_PTR_SET_INFO: info->setinfo = sm8500_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sm8500_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sm8500_set_context; break; - case CPUINFO_PTR_INIT: info->init = sm8500_init; break; - case CPUINFO_PTR_RESET: info->reset = sm8500_reset; break; - case CPUINFO_PTR_EXIT: info->exit = sm8500_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = sm8500_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sm8500); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sm8500); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sm8500); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sm8500); break; case CPUINFO_PTR_BURN: info->burn = sm8500_burn; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sm8500_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sm8500_icount; break; diff --git a/src/emu/cpu/spc700/spc700.c b/src/emu/cpu/spc700/spc700.c index 2aa97708665..4c6aaeede08 100644 --- a/src/emu/cpu/spc700/spc700.c +++ b/src/emu/cpu/spc700/spc700.c @@ -122,7 +122,8 @@ typedef struct uint line_nmi; /* Status of the NMI line */ uint line_rst; /* Status of the RESET line */ uint ir; /* Instruction Register */ - int (*int_ack)(int); /* Interrupt Acknowledge */ + cpu_irq_callback int_ack; + const device_config *device; uint stopped; /* stopped status */ } spc700i_cpu_struct; @@ -547,7 +548,7 @@ INLINE void SERVICE_IRQ(void) PUSH_8(GET_REG_P_INT()); FLAG_I = IFLAG_SET; if(INT_ACK) - INT_ACK(0); + INT_ACK(spc700i_cpu.device, 0); JUMP(read_16_VEC(VECTOR_IRQ)); } #endif @@ -1256,13 +1257,14 @@ INLINE void SET_FLAG_I(uint value) /* ================================= API ================================== */ /* ======================================================================== */ -void spc700_init(int index, int clock, const void *config, int (*irqcallback)(int)) +CPU_INIT( spc700 ) { INT_ACK = irqcallback; + spc700i_cpu.device = device; } -void spc700_reset(void) +CPU_RESET( spc700 ) { CPU_STOPPED = 0; #if !SPC700_OPTIMIZE_SNES @@ -1281,7 +1283,7 @@ void spc700_reset(void) } /* Exit and clean up */ -void spc700_exit(void) +CPU_EXIT( spc700 ) { /* nothing to do yet */ } @@ -1361,7 +1363,7 @@ void spc700_set_irq_line(int line, int state) } /* Set the callback that is called when servicing an interrupt */ -void spc700_set_irq_callback(int (*callback)(int)) +void spc700_set_irq_callback(cpu_irq_callback callback) { INT_ACK = callback; } @@ -1409,9 +1411,9 @@ void spc700_state_load(void *file) //int dump_flag = 0; /* Execute instructions for <clocks> cycles */ -int spc700_execute(int clocks) +CPU_EXECUTE( spc700 ) { - CLOCKS = CPU_STOPPED ? 0 : clocks; + CLOCKS = CPU_STOPPED ? 0 : cycles; while(CLOCKS > 0) { REG_PPC = REG_PC; @@ -1705,7 +1707,7 @@ int spc700_execute(int clocks) case 0xff: OP_STOP ( 3 ); break; /* STOP */ } } - return clocks - CLOCKS; + return cycles - CLOCKS; } @@ -1790,10 +1792,10 @@ void spc700_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = spc700_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = spc700_get_context_mame; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = spc700_set_context; break; - case CPUINFO_PTR_INIT: info->init = spc700_init; break; - case CPUINFO_PTR_RESET: info->reset = spc700_reset; break; - case CPUINFO_PTR_EXIT: info->exit = spc700_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = spc700_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(spc700); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(spc700); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(spc700); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(spc700); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = spc700_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &spc700_ICount; break; diff --git a/src/emu/cpu/spc700/spc700.h b/src/emu/cpu/spc700/spc700.h index 867916b906e..78f6da2caf1 100644 --- a/src/emu/cpu/spc700/spc700.h +++ b/src/emu/cpu/spc700/spc700.h @@ -38,16 +38,16 @@ enum /* implementation APIs below. */ -void spc700_init(int index, int clock, const void *config, int (*irqcallback)(int)); +CPU_INIT( spc700 ); /* Pulse the RESET pin on the CPU */ -void spc700_reset(void); +CPU_RESET( spc700 ); /* Set the RESET line on the CPU */ void spc700_set_reset_line(int state, void* param); /* Clean up after the emulation core - Not used in this core - */ -void spc700_exit(void); +CPU_EXIT( spc700 ); /* Get the current CPU context */ unsigned spc700_get_context(void *dst); @@ -83,7 +83,7 @@ void spc700_set_nmi_line(int state); void spc700_set_irq_line(int line, int state); /* Set the callback that will be called when an interrupt is serviced */ -void spc700_set_irq_callback(int (*callback)(int)); +void spc700_set_irq_callback(cpu_irq_callback callback); /* Save the current CPU state to disk */ void spc700_state_save(void *file); diff --git a/src/emu/cpu/ssp1601/ssp1601.c b/src/emu/cpu/ssp1601/ssp1601.c index 05d2df3ed20..315fdfa8907 100644 --- a/src/emu/cpu/ssp1601/ssp1601.c +++ b/src/emu/cpu/ssp1601/ssp1601.c @@ -497,7 +497,7 @@ static UINT32 ptr2_read(int op) // ----------------------------------------------------- -static void ssp1601_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( ssp1601 ) { state_save_register_item(CHIP_NAME, index, rX); state_save_register_item(CHIP_NAME, index, rY); @@ -516,12 +516,12 @@ static void ssp1601_init(int index, int clock, const void *config, int (*irqcall ssp1601.gr[0].w.h = 0xffff; // constant reg } -static void ssp1601_exit(void) +static CPU_EXIT( ssp1601 ) { /* nothing to do */ } -static void ssp1601_reset(void) +static CPU_RESET( ssp1601 ) { rPC = 0x400; rSTACK = 0; // ? using ascending stack @@ -529,7 +529,7 @@ static void ssp1601_reset(void) } -static int ssp1601_execute(int cycles) +static CPU_EXECUTE( ssp1601 ) { g_cycles = cycles; @@ -861,10 +861,10 @@ void ssp1601_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = ssp1601_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ssp1601_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ssp1601_set_context; break; - case CPUINFO_PTR_INIT: info->init = ssp1601_init; break; - case CPUINFO_PTR_RESET: info->reset = ssp1601_reset; break; - case CPUINFO_PTR_EXIT: info->exit = ssp1601_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = ssp1601_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ssp1601); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ssp1601); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ssp1601); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ssp1601); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ssp1601_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &g_cycles; break; diff --git a/src/emu/cpu/t11/t11.c b/src/emu/cpu/t11/t11.c index 7d29924af1a..47aee0531e2 100644 --- a/src/emu/cpu/t11/t11.c +++ b/src/emu/cpu/t11/t11.c @@ -32,7 +32,8 @@ typedef struct UINT8 wait_state; UINT8 irq_state; INT32 interrupt_cycles; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } t11_Regs; static t11_Regs t11; @@ -208,7 +209,7 @@ static void t11_check_irqs(void) /* call the callback; if we don't get -1 back, use the return value as our vector */ if (t11.irq_callback != NULL) { - int new_vector = (*t11.irq_callback)(t11.irq_state & 15); + int new_vector = (*t11.irq_callback)(t11.device, t11.irq_state & 15); if (new_vector != -1) vector = new_vector; } @@ -284,7 +285,7 @@ static void t11_set_context(void *src) * *************************************/ -static void t11_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( t11 ) { static const UINT16 initial_pc[] = { @@ -295,6 +296,7 @@ static void t11_init(int index, int clock, const void *config, int (*irqcallback t11.initial_pc = initial_pc[setup->mode >> 13]; t11.irq_callback = irqcallback; + t11.device = device; state_save_register_item("t11", index, t11.ppc.w.l); state_save_register_item("t11", index, t11.reg[0].w.l); @@ -314,7 +316,7 @@ static void t11_init(int index, int clock, const void *config, int (*irqcallback } -static void t11_exit(void) +static CPU_EXIT( t11 ) { /* nothing to do */ } @@ -327,7 +329,7 @@ static void t11_exit(void) * *************************************/ -static void t11_reset(void) +static CPU_RESET( t11 ) { /* initial SP is 376 octal, or 0xfe */ SP = 0x00fe; @@ -382,7 +384,7 @@ static void set_irq_line(int irqline, int state) * *************************************/ -static int t11_execute(int cycles) +static CPU_EXECUTE( t11 ) { t11_ICount = cycles; t11_ICount -= t11.interrupt_cycles; @@ -498,10 +500,10 @@ void t11_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = t11_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = t11_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = t11_set_context; break; - case CPUINFO_PTR_INIT: info->init = t11_init; break; - case CPUINFO_PTR_RESET: info->reset = t11_reset; break; - case CPUINFO_PTR_EXIT: info->exit = t11_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = t11_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(t11); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(t11); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(t11); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(t11); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = t11_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &t11_ICount; break; diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c index efa2f620d72..4c5cc5deff2 100644 --- a/src/emu/cpu/tlcs90/tlcs90.c +++ b/src/emu/cpu/tlcs90/tlcs90.c @@ -16,7 +16,8 @@ typedef struct PAIR af2,bc2,de2,hl2; UINT8 halt, after_EI; UINT16 irq_state, irq_mask; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; int extra_cycles; // extra cycles for interrupts UINT8 internal_registers[48]; UINT32 ixbase,iybase; @@ -1317,7 +1318,7 @@ static void set_irq_line(int irq, int state) INLINE void Cyc(void) { t90_ICount -= cyc_t; } INLINE void Cyc_f(void) { t90_ICount -= cyc_f; } -static int t90_execute(int cycles) +static CPU_EXECUTE( t90 ) { UINT8 a8,b8; UINT16 a16,b16; @@ -1965,7 +1966,7 @@ static int t90_execute(int cycles) return cycles - t90_ICount; } -static void t90_reset(void) +static CPU_RESET( t90 ) { T90.irq_state = 0; T90.irq_mask = 0; @@ -1980,7 +1981,7 @@ static void t90_reset(void) */ } -static void t90_exit(void) +static CPU_EXIT( t90 ) { } @@ -2620,7 +2621,7 @@ static WRITE8_HANDLER( t90_internal_registers_w ) T90.internal_registers[offset] = data; } -static void t90_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( t90 ) { int i, p; @@ -2652,6 +2653,7 @@ static void t90_init(int index, int clock, const void *config, int (*irqcallback memset(&T90, 0, sizeof(T90)); T90.irq_callback = irqcallback; + T90.device = device; T90.timer_period = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(cpu_getactivecpu())), 8); @@ -2779,10 +2781,10 @@ void tmp90840_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = t90_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = t90_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = t90_set_context; break; - case CPUINFO_PTR_INIT: info->init = t90_init; break; - case CPUINFO_PTR_RESET: info->reset = t90_reset; break; - case CPUINFO_PTR_EXIT: info->exit = t90_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = t90_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(t90); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(t90); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(t90); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(t90); break; case CPUINFO_PTR_BURN: info->burn = t90_burn; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = t90_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &t90_ICount; break; diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c index cb8b776039d..6009f86063a 100644 --- a/src/emu/cpu/tms32010/tms32010.c +++ b/src/emu/cpu/tms32010/tms32010.c @@ -710,7 +710,7 @@ static const opcode_fn opcode_7F_other[32]= /**************************************************************************** * Inits CPU emulation ****************************************************************************/ -static void tms32010_init (int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( tms32010 ) { state_save_register_item("tms32010", index, R.PC); state_save_register_item("tms32010", index, R.PREVPC); @@ -732,7 +732,7 @@ static void tms32010_init (int index, int clock, const void *config, int (*irqca /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void tms32010_reset (void) +static CPU_RESET( tms32010 ) { R.PC = 0; R.STR = 0x7efe; // OV cleared @@ -748,7 +748,7 @@ static void tms32010_reset (void) /**************************************************************************** * Shut down CPU emulation ****************************************************************************/ -static void tms32010_exit (void) +static CPU_EXIT( tms32010 ) { /* nothing to do ? */ } @@ -776,7 +776,7 @@ static int Ext_IRQ(void) /**************************************************************************** * Execute IPeriod. Return 0 if emulation should be stopped ****************************************************************************/ -static int tms32010_execute(int cycles) +static CPU_EXECUTE( tms32010 ) { tms32010_icount = cycles; @@ -925,10 +925,10 @@ void tms32010_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tms32010_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms32010_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms32010_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms32010_init; break; - case CPUINFO_PTR_RESET: info->reset = tms32010_reset; break; - case CPUINFO_PTR_EXIT: info->exit = tms32010_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms32010_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32010); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32010); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32010); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32010); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32010_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms32010_icount; break; diff --git a/src/emu/cpu/tms32025/tms32025.c b/src/emu/cpu/tms32025/tms32025.c index 6a97a919ed7..72b32bbdd72 100644 --- a/src/emu/cpu/tms32025/tms32025.c +++ b/src/emu/cpu/tms32025/tms32025.c @@ -208,7 +208,8 @@ typedef struct /* Page 3-6 (45) shows all registers */ int init_load_addr; /* 0=No, 1=Yes, 2=Once for repeat mode */ int tms32025_irq_cycles; int tms32025_dec_cycles; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT16 *datamap_save[16]; UINT16 *pgmmap_save[12]; } tms32025_Regs; @@ -1728,10 +1729,11 @@ static const opcode_fn opcode_CE_subset[256]= /**************************************************************************** * Inits CPU emulation ****************************************************************************/ -static void tms32025_init (int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( tms32025 ) { R.intRAM = auto_malloc(0x800*2); R.irq_callback = irqcallback; + R.device = device; state_save_register_item("tms32025", index, R.PC); state_save_register_item("tms32025", index, R.STR0); @@ -1770,7 +1772,7 @@ static void tms32025_init (int index, int clock, const void *config, int (*irqca /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void tms32025_reset (void) +static CPU_RESET( tms32025 ) { SET_PC(0); /* Starting address on a reset */ R.STR0 |= 0x0600; /* INTM and unused bit set to 1 */ @@ -1804,9 +1806,9 @@ static void tms32025_reset (void) } #if (HAS_TMS32026) -static void tms32026_reset (void) +static CPU_RESET( tms32026 ) { - tms32025_reset(); + CPU_RESET_CALL(tms32025); /* Reset the Data/Program address banks */ memset(tms32025_pgmmap, 0, sizeof(tms32025_pgmmap)); @@ -1832,7 +1834,7 @@ static void tms32026_reset (void) /**************************************************************************** * Shut down CPU emulation ****************************************************************************/ -static void tms32025_exit (void) +static CPU_EXIT( tms32025 ) { } @@ -1858,7 +1860,7 @@ static int process_IRQs(void) if ((R.IFR & 0x01) && (IMR & 0x01)) { /* IRQ line 0 */ //logerror("TMS32025: Active INT0\n"); SET_PC(0x0002); - (*R.irq_callback)(0); + (*R.irq_callback)(R.device, 0); R.idle = 0; R.IFR &= (~0x01); SET0(INTM_FLAG); @@ -1867,7 +1869,7 @@ static int process_IRQs(void) if ((R.IFR & 0x02) && (IMR & 0x02)) { /* IRQ line 1 */ //logerror("TMS32025: Active INT1\n"); SET_PC(0x0004); - (*R.irq_callback)(1); + (*R.irq_callback)(R.device, 1); R.idle = 0; R.IFR &= (~0x02); SET0(INTM_FLAG); @@ -1876,7 +1878,7 @@ static int process_IRQs(void) if ((R.IFR & 0x04) && (IMR & 0x04)) { /* IRQ line 2 */ //logerror("TMS32025: Active INT2\n"); SET_PC(0x0006); - (*R.irq_callback)(2); + (*R.irq_callback)(R.device, 2); R.idle = 0; R.IFR &= (~0x04); SET0(INTM_FLAG); @@ -1952,7 +1954,7 @@ again: /**************************************************************************** * Execute ICount cycles. Exit when 0 or less ****************************************************************************/ -static int tms32025_execute(int cycles) +static CPU_EXECUTE( tms32025 ) { tms32025_icount = cycles; @@ -2382,10 +2384,10 @@ void tms32025_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tms32025_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms32025_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms32025_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms32025_init; break; - case CPUINFO_PTR_RESET: info->reset = tms32025_reset; break; - case CPUINFO_PTR_EXIT: info->exit = tms32025_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms32025_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32025); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32025); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32025); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32025); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32025_dasm; break; case CPUINFO_PTR_READ: info->read = tms32025_read; break; @@ -2468,7 +2470,7 @@ void tms32026_get_info(UINT32 _state, cpuinfo *info) switch (_state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = tms32026_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32026); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32026"); break; diff --git a/src/emu/cpu/tms32031/tms32031.c b/src/emu/cpu/tms32031/tms32031.c index ddb187c616e..aaf44974d46 100644 --- a/src/emu/cpu/tms32031/tms32031.c +++ b/src/emu/cpu/tms32031/tms32031.c @@ -109,7 +109,8 @@ typedef struct void (*xf0_w)(UINT8 val); void (*xf1_w)(UINT8 val); void (*iack_w)(UINT8 val, offs_t addr); - int (*irq_callback)(int state); + cpu_irq_callback irq_callback; + const device_config *device; } tms32031_regs; @@ -410,21 +411,22 @@ static void tms32031_set_context(void *src) INITIALIZATION AND SHUTDOWN ***************************************************************************/ -static void tms32031_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( tms32031 ) { - const struct tms32031_config *config = _config; + const struct tms32031_config *configdata = config; int i; char namebuf[30]; tms32031.irq_callback = irqcallback; + tms32031.device = device; /* copy in the xf write routines */ - tms32031.bootoffset = config ? config->bootoffset : 0; - if (config) + tms32031.bootoffset = configdata ? configdata->bootoffset : 0; + if (configdata) { - tms32031.xf0_w = config->xf0_w; - tms32031.xf1_w = config->xf1_w; - tms32031.iack_w = config->iack_w; + tms32031.xf0_w = configdata->xf0_w; + tms32031.xf1_w = configdata->xf1_w; + tms32031.iack_w = configdata->iack_w; } state_save_register_item("tms32031", index, tms32031.pc); @@ -444,7 +446,7 @@ static void tms32031_init(int index, int clock, const void *_config, int (*irqca } -static void tms32031_reset(void) +static CPU_RESET( tms32031 ) { /* if we have a config struct, get the boot ROM address */ if (tms32031.bootoffset) @@ -470,9 +472,9 @@ static void tms32031_reset(void) tms32031.is_idling = FALSE; } -static void tms32032_reset(void) +static CPU_RESET( tms32032 ) { - tms32031_reset(); + CPU_RESET_CALL(tms32031); tms32031.is_32032 = TRUE; } @@ -481,7 +483,7 @@ static void tms32032_reset(void) static UINT32 hits[0x200*4]; #endif -static void tms32031_exit(void) +static CPU_EXIT( tms32031 ) { #if (LOG_OPCODE_USAGE) int i; @@ -505,7 +507,7 @@ static void tms32031_exit(void) CORE EXECUTION LOOP ***************************************************************************/ -static int tms32031_execute(int cycles) +static CPU_EXECUTE( tms32031 ) { /* count cycles and interrupt cycles */ tms32031_icount = cycles; @@ -836,10 +838,10 @@ void tms32031_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tms32031_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms32031_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms32031_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms32031_init; break; - case CPUINFO_PTR_RESET: info->reset = tms32031_reset; break; - case CPUINFO_PTR_EXIT: info->exit = tms32031_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms32031_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32031); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32031); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32031); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32031); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32031_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms32031_icount; break; @@ -913,7 +915,7 @@ void tms32032_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = tms32032_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32032); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_internal_32032; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/tms32051/tms32051.c b/src/emu/cpu/tms32051/tms32051.c index 4d0ea01fe33..7a44cbc1079 100644 --- a/src/emu/cpu/tms32051/tms32051.c +++ b/src/emu/cpu/tms32051/tms32051.c @@ -146,7 +146,8 @@ typedef struct { INT32 treg2; } shadow; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } TMS_REGS; static TMS_REGS tms; @@ -209,12 +210,12 @@ static void delay_slot(UINT16 startpc) /*****************************************************************************/ -static void tms_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( tms ) { } -static void tms_reset(void) +static CPU_RESET( tms ) { int i; UINT16 src, dst, length; @@ -314,7 +315,7 @@ static void tms_interrupt(int irq) check_interrupts(); } -static void tms_exit(void) +static CPU_EXIT( tms ) { /* TODO */ } @@ -335,9 +336,9 @@ static void tms_set_context(void *src) CHANGE_PC(tms.pc); } -static int tms_execute(int num_cycles) +static CPU_EXECUTE( tms ) { - tms_icount = num_cycles; + tms_icount = cycles; while(tms_icount > 0) { @@ -395,7 +396,7 @@ static int tms_execute(int num_cycles) } } } - return num_cycles - tms_icount; + return cycles - tms_icount; } @@ -624,10 +625,10 @@ static void tms_get_info(UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms_init; break; - case CPUINFO_PTR_RESET: info->reset = tms_reset; break; - case CPUINFO_PTR_EXIT: info->exit = tms_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32051_dasm; break; case CPUINFO_PTR_READ: info->read = tms_debug_read; break; diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c index 97106653891..9c5ea9bd50a 100644 --- a/src/emu/cpu/tms34010/tms34010.c +++ b/src/emu/cpu/tms34010/tms34010.c @@ -59,7 +59,8 @@ typedef struct tms34010_regs UINT8 is_34020; UINT8 reset_deferred; UINT8 hblank_stable; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; const tms34010_config *config; const device_config *screen; emu_timer *scantimer; @@ -620,7 +621,7 @@ static void check_interrupt(void) /* call the callback for externals */ if (irqline >= 0) - (void)(*state.irq_callback)(irqline); + (void)(*state.irq_callback)(state.device, irqline); } } @@ -630,18 +631,19 @@ static void check_interrupt(void) Reset the CPU emulation ***************************************************************************/ -static void tms34010_init(int index, int clock, const void *_config, int (*irqcallback)(int)) +static CPU_INIT( tms34010 ) { - const tms34010_config *config = _config ? _config : &default_config; + const tms34010_config *configdata = config ? config : &default_config; external_host_access = FALSE; - state.config = config; + state.config = configdata; state.irq_callback = irqcallback; - state.screen = device_list_find_by_tag(Machine->config->devicelist, VIDEO_SCREEN, config->screen_tag); + state.device = device; + state.screen = device_list_find_by_tag(device->machine->config->devicelist, VIDEO_SCREEN, configdata->screen_tag); /* if we have a scanline callback, make us the owner of this screen */ - if (config->scanline_callback != NULL) + if (configdata->scanline_callback != NULL) { int i; @@ -675,13 +677,14 @@ static void tms34010_init(int index, int clock, const void *_config, int (*irqca state_save_register_postload(Machine, tms34010_state_postload, NULL); } -static void tms34010_reset(void) +static CPU_RESET( tms34010 ) { /* zap the state and copy in the config pointer */ const tms34010_config *config = state.config; const device_config *screen = state.screen; UINT16 *shiftreg = state.shiftreg; - int (*save_irqcallback)(int) = state.irq_callback; + cpu_irq_callback save_irqcallback = state.irq_callback; + const device_config *save_device = state.device; emu_timer *save_scantimer = state.scantimer; memset(&state, 0, sizeof(state)); @@ -690,6 +693,7 @@ static void tms34010_reset(void) state.screen = screen; state.shiftreg = shiftreg; state.irq_callback = save_irqcallback; + state.device = save_device; state.scantimer = save_scantimer; /* fetch the initial PC and reset the state */ @@ -705,9 +709,9 @@ static void tms34010_reset(void) } #if (HAS_TMS34020) -static void tms34020_reset(void) +static CPU_RESET( tms34020 ) { - tms34010_reset(); + CPU_RESET_CALL(tms34010); state.is_34020 = 1; } #endif @@ -718,7 +722,7 @@ static void tms34020_reset(void) Shut down the CPU emulation ***************************************************************************/ -static void tms34010_exit(void) +static CPU_EXIT( tms34010 ) { state.shiftreg = NULL; } @@ -821,7 +825,7 @@ static TIMER_CALLBACK( internal_interrupt_callback ) Execute ***************************************************************************/ -static int tms34010_execute(int cycles) +static CPU_EXECUTE( tms34010 ) { /* Get out if CPU is halted. Absolutely no interrupts must be taken!!! */ if (IOREG(REG_HSTCTLH) & 0x8000) @@ -1890,10 +1894,10 @@ void tms34010_get_info(UINT32 _state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tms34010_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms34010_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms34010_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms34010_init; break; - case CPUINFO_PTR_RESET: info->reset = tms34010_reset; break; - case CPUINFO_PTR_EXIT: info->exit = tms34010_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms34010_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms34010); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms34010); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms34010_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms34010_ICount; break; @@ -1981,7 +1985,7 @@ void tms34020_get_info(UINT32 _state, cpuinfo *info) /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms34020_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms34020_set_context; break; - case CPUINFO_PTR_RESET: info->reset = tms34020_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms34020); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms34020_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/tms7000/tms7000.c b/src/emu/cpu/tms7000/tms7000.c index 17633a501d8..8e0dd1ca3a0 100644 --- a/src/emu/cpu/tms7000/tms7000.c +++ b/src/emu/cpu/tms7000/tms7000.c @@ -44,8 +44,8 @@ static void tms7000_get_context(void *dst); static void tms7000_set_context(void *src); static void tms7000_check_IRQ_lines( void ); static void tms7000_do_interrupt( UINT16 address, UINT8 line ); -static int tms7000_execute(int cycles); -static int tms7000_exl_execute(int cycles); +static CPU_EXECUTE( tms7000 ); +static CPU_EXECUTE( tms7000_exl ); static void tms7000_service_timer1( void ); static UINT16 bcd_add( UINT16 a, UINT16 b ); static UINT16 bcd_tencomp( UINT16 a ); @@ -105,7 +105,8 @@ typedef struct UINT8 irq_state[3]; /* State of the three IRQs */ UINT8 rf[0x80]; /* Register file (SJE) */ UINT8 pf[0x100]; /* Perpherial file */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 t1_capture_latch; /* Timer 1 capture latch */ INT8 t1_prescaler; /* Timer 1 prescaler (5 bits) */ INT16 t1_decrementer; /* Timer 1 decrementer (8 bits) */ @@ -183,11 +184,12 @@ static void tms7000_set_context(void *src) tms7000_check_IRQ_lines(); } -static void tms7000_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( tms7000 ) { int cpu = cpu_getactivecpu(); tms7000.irq_callback = irqcallback; + tms7000.device = device; memset(tms7000.pf, 0, 0x100); memset(tms7000.rf, 0, 0x80); @@ -210,11 +212,9 @@ static void tms7000_init(int index, int clock, const void *config, int (*irqcall state_save_register_item("tms7000", cpu, tms7000.t1_decrementer); state_save_register_item("tms7000", cpu, tms7000.idle_state); - - tms7000.irq_callback = irqcallback; } -static void tms7000_reset(void) +static CPU_RESET( tms7000 ) { // tms7000.architecture = (int)param; @@ -329,9 +329,9 @@ void tms7000_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tms7000_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms7000_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms7000_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms7000_init; break; - case CPUINFO_PTR_RESET: info->reset = tms7000_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms7000_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms7000); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms7000); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms7000); break; case CPUINFO_PTR_BURN: info->burn = NULL; /* Not supported */break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms7000_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms7000_icount; break; @@ -372,7 +372,7 @@ void tms7000_exl_get_info(UINT32 state, cpuinfo *info) switch( state ) { case CPUINFO_PTR_EXECUTE: - info->execute = tms7000_exl_execute; + info->execute = CPU_EXECUTE_NAME(tms7000_exl); break; default: tms7000_get_info(state, info); @@ -456,13 +456,13 @@ static void tms7000_do_interrupt( UINT16 address, UINT8 line ) tms7000.idle_state = 0; } - (void)(*tms7000.irq_callback)(line); + (void)(*tms7000.irq_callback)(tms7000.device, line); } #include "tms70op.c" #include "tms70tb.c" -static int tms7000_execute(int cycles) +static CPU_EXECUTE( tms7000 ) { int op; @@ -501,7 +501,7 @@ static int tms7000_execute(int cycles) return cycles - tms7000_icount; } -static int tms7000_exl_execute(int cycles) +static CPU_EXECUTE( tms7000_exl ) { int op; diff --git a/src/emu/cpu/tms9900/99xxcore.h b/src/emu/cpu/tms9900/99xxcore.h index 1854b0e1930..fa830d66022 100644 --- a/src/emu/cpu/tms9900/99xxcore.h +++ b/src/emu/cpu/tms9900/99xxcore.h @@ -431,7 +431,8 @@ typedef struct /* interrupt callback */ /* note that this callback is used by tms9900_set_irq_line() and tms9980a_set_irq_line() to retreive the value on IC0-IC3 (non-standard behaviour) */ - int (*irq_callback)(int irq_line); + cpu_irq_callback irq_callback; + const device_config *device; UINT8 IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing special data on CRU bus */ @@ -1268,7 +1269,7 @@ static void register_for_save_state(int index) } -static void tms99xx_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( tms99xx ) { const TMS99XX_RESET_PARAM *param = (const TMS99XX_RESET_PARAM *) config; @@ -1276,6 +1277,7 @@ static void tms99xx_init(int index, int clock, const void *config, int (*irqcall I.irq_level = 16; I.irq_callback = irqcallback; + I.device = device; #if (TMS99XX_MODEL == TMS9995_ID) I.timer = timer_alloc(decrementer_callback, NULL); @@ -1311,7 +1313,7 @@ static void tms99xx_init(int index, int clock, const void *config, int (*irqcall /* TMS9900 hard reset */ -static void tms99xx_reset(void) +static CPU_RESET( tms99xx ) { I.STATUS = 0; /* TMS9980 and TMS9995 Data Books say so */ getstat(); @@ -1364,7 +1366,7 @@ static void tms99xx_reset(void) CYCLES(6, 26, 14); } -static void tms99xx_exit(void) +static CPU_EXIT( tms99xx ) { /* nothing to do ? */ } @@ -1378,7 +1380,7 @@ INLINE UINT16 fetch(void) } -static int tms99xx_execute(int cycles) +static CPU_EXECUTE( tms99xx ) { TMS99XX_ICOUNT = cycles; @@ -1453,9 +1455,9 @@ static int tms99xx_execute(int cycles) /* unlike tms9900, we can call the callback */ if (level == 1) - (* I.irq_callback)(0); + (* I.irq_callback)(I.device, 0); else if (level == 4) - (* I.irq_callback)(1); + (* I.irq_callback)(I.device, 1); } #endif @@ -1603,7 +1605,7 @@ static void tms99xx_set_irq_line(int irqline, int state) I.irq_level = 16; /* trick : 16 will always be bigger than the IM (0-15), so there will never be interrupts */ else - I.irq_level = (* I.irq_callback)(0); + I.irq_level = (* I.irq_callback)(I.device, 0); field_interrupt(); /* interrupt state is likely to have changed */ } @@ -1699,7 +1701,7 @@ static void tms99xx_set_irq_line(int irqline, int state) I.irq_level = 16; /* trick : 16 will always be bigger than the IM (0-15), so there will never be interrupts */ else - I.irq_level = (* I.irq_callback)(0); + I.irq_level = (* I.irq_callback)(I.device, 0); field_interrupt(); /* interrupt state is likely to have changed */ } @@ -1726,7 +1728,7 @@ static void tms99xx_set_irq_line(int irqline, int state) if (irqline == INPUT_LINE_NMI) level = 2; /* translate MAME's convention to CPU's representation */ else - level = (* I.irq_callback)(0); + level = (* I.irq_callback)(I.device, 0); switch (level) { @@ -1735,7 +1737,7 @@ static void tms99xx_set_irq_line(int irqline, int state) I.load_state = 0; I.irq_state = 0; I.irq_level = 16; - tms99xx_reset(); + CPU_RESET_NAME(tms99xx)(I.device); break; case 2: I.load_state = 1; @@ -4795,10 +4797,10 @@ void TMS99XX_GET_INFO(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = tms99xx_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms99xx_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms99xx_set_context; break; - case CPUINFO_PTR_INIT: info->init = tms99xx_init; break; - case CPUINFO_PTR_RESET: info->reset = tms99xx_reset; break; - case CPUINFO_PTR_EXIT: info->exit = tms99xx_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = tms99xx_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms99xx); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms99xx); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms99xx); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms99xx); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms99xx_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &TMS99XX_ICOUNT; break; diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c index c4b72714b61..592ed74e7d0 100644 --- a/src/emu/cpu/upd7810/upd7810.c +++ b/src/emu/cpu/upd7810/upd7810.c @@ -835,7 +835,7 @@ static void upd7810_take_irq(void) { /* acknowledge external IRQ */ if (irqline) - (*upd7810.irq_callback)(irqline); + (*upd7810.irq_callback)(upd7810.device, irqline); SP--; WM( SP, PSW ); SP--; @@ -1530,10 +1530,11 @@ static void upd78c05_timers(int cycles) } } -static void upd7810_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( upd7810 ) { upd7810.config = *(const UPD7810_CONFIG*) config; upd7810.irq_callback = irqcallback; + upd7810.device = device; state_save_register_item("upd7810", index, upd7810.ppc.w.l); state_save_register_item("upd7810", index, upd7810.pc.w.l); @@ -1602,16 +1603,19 @@ static void upd7810_init(int index, int clock, const void *config, int (*irqcall #include "7810tbl.c" #include "7810ops.c" -static void upd7810_reset (void) +static CPU_RESET( upd7810 ) { UPD7810_CONFIG save_config; - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; save_config = upd7810.config; save_irqcallback = upd7810.irq_callback; + save_device = upd7810.device; memset(&upd7810, 0, sizeof(upd7810)); upd7810.config = save_config; upd7810.irq_callback = save_irqcallback; + upd7810.device = save_device; upd7810.opXX = opXX_7810; upd7810.op48 = op48; @@ -1643,14 +1647,15 @@ static void upd7810_reset (void) upd7810.handle_timers = upd7810_timers; } -static void upd7807_reset (void) +static CPU_RESET( upd7807 ) { - upd7810_reset(); + CPU_RESET_CALL(upd7810); upd7810.opXX = opXX_7807; } -static void upd7801_reset( void ) { - upd7810_reset(); +static CPU_RESET( upd7801 ) +{ + CPU_RESET_CALL(upd7810); upd7810.op48 = op48_7801; upd7810.op4C = op4C_7801; upd7810.op4D = op4D_7801; @@ -1661,8 +1666,9 @@ static void upd7801_reset( void ) { upd7810.opXX = opXX_7801; } -static void upd78c05_reset( void ) { - upd7810_reset(); +static CPU_RESET( upd78c05 ) +{ + CPU_RESET_CALL(upd7810); upd7810.op48 = op48_78c05; upd7810.op4C = op4C_78c05; upd7810.op4D = op4D_78c05; @@ -1679,8 +1685,9 @@ static void upd78c05_reset( void ) { upd7810.ovc0 = ( ( TMM & 0x04 ) ? 16 * 8 : 8 ) * TM0; } -static void upd78c06_reset( void ) { - upd78c05_reset(); +static CPU_RESET( upd78c06 ) +{ + CPU_RESET_CALL(upd7810); upd7810.op48 = op48_78c06; upd7810.op4C = op4C_78c06; upd7810.op4D = op4D_78c06; @@ -1691,11 +1698,11 @@ static void upd78c06_reset( void ) { upd7810.opXX = opXX_78c06; } -static void upd7810_exit (void) +static CPU_EXIT( upd7810 ) { } -static int upd7810_execute (int cycles) +static CPU_EXECUTE( upd7810 ) { upd7810_icount = cycles; @@ -1996,10 +2003,10 @@ void upd7810_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = upd7810_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = upd7810_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = upd7810_set_context; break; - case CPUINFO_PTR_INIT: info->init = upd7810_init; break; - case CPUINFO_PTR_RESET: info->reset = upd7810_reset; break; - case CPUINFO_PTR_EXIT: info->exit = upd7810_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = upd7810_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(upd7810); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd7810); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(upd7810); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(upd7810); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7810_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &upd7810_icount; break; @@ -2086,7 +2093,7 @@ void upd7807_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_RESET: info->reset = upd7807_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd7807); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7807_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ @@ -2098,7 +2105,7 @@ void upd7807_get_info(UINT32 state, cpuinfo *info) void upd7801_get_info(UINT32 state, cpuinfo *info) { switch( state ) { - case CPUINFO_PTR_RESET: info->reset = upd7801_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd7801); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7801_dasm; break; case CPUINFO_STR_NAME: strcpy(info->s, "uPD7801"); break; @@ -2111,7 +2118,7 @@ void upd78c05_get_info(UINT32 state, cpuinfo *info ) { switch ( state ) { case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; - case CPUINFO_PTR_RESET: info->reset = upd78c05_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd78c05); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd78c05_dasm; break; case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C05"); break; @@ -2156,7 +2163,7 @@ void upd78c05_get_info(UINT32 state, cpuinfo *info ) { void upd78c06_get_info(UINT32 state, cpuinfo *info ) { switch ( state ) { - case CPUINFO_PTR_RESET: info->reset = upd78c06_reset; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd78c06); break; case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C06"); break; diff --git a/src/emu/cpu/upd7810/upd7810.h b/src/emu/cpu/upd7810/upd7810.h index f5b0445d162..950162dcf6f 100644 --- a/src/emu/cpu/upd7810/upd7810.h +++ b/src/emu/cpu/upd7810/upd7810.h @@ -163,7 +163,8 @@ typedef struct { const struct opcode_s *op74; void (*handle_timers)(int cycles); UPD7810_CONFIG config; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } UPD7810; offs_t upd7810_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram); diff --git a/src/emu/cpu/v30mz/v30mz.c b/src/emu/cpu/v30mz/v30mz.c index 37016f9e167..6fe7f128444 100644 --- a/src/emu/cpu/v30mz/v30mz.c +++ b/src/emu/cpu/v30mz/v30mz.c @@ -76,7 +76,8 @@ typedef struct UINT32 irq_state; UINT8 no_interrupt; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } nec_Regs; /***************************************************************************/ @@ -106,15 +107,18 @@ static UINT8 parity_table[256]; /***************************************************************************/ -static void nec_reset (void) +static CPU_RESET( nec ) { unsigned int i,j,c; static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH }; - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; save_irqcallback = I.irq_callback; + save_device = I.device; memset( &I, 0, sizeof(I) ); I.irq_callback = save_irqcallback; + I.device = save_device; I.sregs[CS] = 0xffff; @@ -143,7 +147,7 @@ static void nec_reset (void) } } -static void nec_exit (void) +static CPU_EXIT( nec ) { } @@ -158,7 +162,7 @@ static void nec_interrupt(unsigned int_num,BOOLEAN md_flag) if (int_num == -1) { - int_num = (*I.irq_callback)(0); + int_num = (*I.irq_callback)(I.device, 0); I.irq_state = CLEAR_LINE; I.pending_irq &= ~INT_IRQ; @@ -922,7 +926,7 @@ static offs_t nec_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 return necv_dasm_one(buffer, pc, oprom); } -static void nec_init(int index, int clock, const void *config, int (*irqcallback)(int), int type) +static void nec_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int type) { static const char *const names[]={"V20","V30","V33","V30MZ"}; @@ -946,10 +950,11 @@ static void nec_init(int index, int clock, const void *config, int (*irqcallback state_save_register_item(names[type], index, I.ParityVal); I.irq_callback = irqcallback; + I.device = device; } -static void v30mz_init(int index, int clock, const void *config, int (*irqcallback)(int)) { nec_init(index, clock, config, irqcallback, 3); } -static int v30mz_execute(int cycles) +static CPU_INIT( v30mz ) { nec_init(device, index, clock, config, irqcallback, 3); } +static CPU_EXECUTE( v30mz ) { nec_ICount=cycles; chip_type=V30MZ; @@ -1092,8 +1097,8 @@ void v30mz_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = nec_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = nec_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = nec_set_context; break; - case CPUINFO_PTR_RESET: info->reset = nec_reset; break; - case CPUINFO_PTR_EXIT: info->exit = nec_exit; break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(nec); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(nec); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = nec_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_ICount; break; @@ -1143,9 +1148,9 @@ void v30mz_get_info(UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + NEC_VECTOR: sprintf(info->s = cpuintrf_temp_str(), "V:%02X", I.int_vector); break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v30mz_init; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v30mz); break; - case CPUINFO_PTR_EXECUTE: info->execute = v30mz_execute; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(v30mz); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/v60/v60.c b/src/emu/cpu/v60/v60.c index 75f96483ace..e0a07e5141b 100644 --- a/src/emu/cpu/v60/v60.c +++ b/src/emu/cpu/v60/v60.c @@ -74,7 +74,8 @@ static struct v60info { Flags flags; UINT8 irq_line; UINT8 nmi_line; - int (*irq_cb)(int irqline); + cpu_irq_callback irq_cb; + const device_config *device; UINT32 PPC; } v60; @@ -294,16 +295,17 @@ static UINT32 opUNHANDLED(void) #include "optable.c" #ifdef UNUSED_FUNCTION -static int v60_default_irq_cb(int irqline) +static int v60_default_irq_cb(const device_config *device, int irqline) { return 0; } #endif -static void base_init(const char *type, int index, int (*irqcallback)(int)) +static void base_init(const char *type, const device_config *device, int index, cpu_irq_callback irqcallback) { v60_stall_io = 0; v60.irq_cb = irqcallback; + v60.device = device; v60.irq_line = CLEAR_LINE; v60.nmi_line = CLEAR_LINE; @@ -317,25 +319,25 @@ static void base_init(const char *type, int index, int (*irqcallback)(int)) state_save_register_item(type, index, _Z); } -static void v60_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( v60 ) { - base_init("v60", index, irqcallback); + base_init("v60", device, index, irqcallback); // Set PIR (Processor ID) for NEC v60. LSB is reserved to NEC, // so I don't know what it contains. PIR = 0x00006000; v60.info = v60_i; } -static void v70_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( v70 ) { - base_init("v70", index, irqcallback); + base_init("v70", device, index, irqcallback); // Set PIR (Processor ID) for NEC v70. LSB is reserved to NEC, // so I don't know what it contains. PIR = 0x00007000; v60.info = v70_i; } -static void v60_reset(void) +static CPU_RESET( v60 ) { PSW = 0x10000000; PC = v60.info.start_pc; @@ -351,7 +353,7 @@ static void v60_reset(void) _Z = 0; } -static void v60_exit(void) +static CPU_EXIT( v60 ) { } @@ -383,7 +385,7 @@ static void v60_try_irq(void) if(v60.irq_line != ASSERT_LINE) v60.irq_line = CLEAR_LINE; - vector = v60.irq_cb(0); + vector = v60.irq_cb(v60.device, 0); v60_do_irq(vector + 0x40); } else if(v60.irq_line == PULSE_LINE) @@ -417,7 +419,7 @@ static void set_irq_line(int irqline, int state) // Actual cycles/instruction is unknown -static int v60_execute(int cycles) +static CPU_EXECUTE( v60 ) { UINT32 inc; @@ -635,10 +637,10 @@ void v60_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = v60_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = v60_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = v60_set_context; break; - case CPUINFO_PTR_INIT: info->init = v60_init; break; - case CPUINFO_PTR_RESET: info->reset = v60_reset; break; - case CPUINFO_PTR_EXIT: info->exit = v60_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = v60_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v60); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(v60); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(v60); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(v60); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = v60_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &v60_ICount; break; @@ -728,7 +730,7 @@ void v70_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_PTR_INIT: info->init = v70_init; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v70); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = v70_dasm; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c index 510b8a286c5..16051434aea 100644 --- a/src/emu/cpu/v810/v810.c +++ b/src/emu/cpu/v810/v810.c @@ -28,7 +28,8 @@ typedef struct UINT32 reg[65]; UINT8 irq_line; UINT8 nmi_line; - int (*irq_cb)(int irqline); + cpu_irq_callback irq_cb; + const device_config *device; UINT32 PPC; UINT32 op; } v810info; @@ -946,11 +947,12 @@ static UINT32 (*const OpCodeTable[64])(void) = /* 0x3f */ opOUTW // out.w reg2, disp16[reg1] 6b }; -static void v810_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( v810 ) { v810.irq_line = CLEAR_LINE; v810.nmi_line = CLEAR_LINE; v810.irq_cb = irqcallback; + v810.device = device; state_save_register_item_array("v810", index, v810.reg); state_save_register_item("v810", index, v810.irq_line); @@ -959,7 +961,7 @@ static void v810_init(int index, int clock, const void *config, int (*irqcallbac } -static void v810_reset(void) +static CPU_RESET( v810 ) { int i; for(i=0;i<64;i++) v810.reg[i]=0; @@ -968,7 +970,7 @@ static void v810_reset(void) ECR = 0x0000fff0; } -static int v810_execute(int cycles) +static CPU_EXECUTE( v810 ) { v810_ICount = cycles; while(v810_ICount>=0) @@ -1178,10 +1180,10 @@ void v810_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = v810_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = v810_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = v810_set_context; break; - case CPUINFO_PTR_INIT: info->init = v810_init; break; - case CPUINFO_PTR_RESET: info->reset = v810_reset; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v810); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(v810); break; case CPUINFO_PTR_EXIT: info->exit = NULL; break; - case CPUINFO_PTR_EXECUTE: info->execute = v810_execute; break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(v810); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = v810_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &v810_ICount; break; diff --git a/src/emu/cpu/z180/z180.c b/src/emu/cpu/z180/z180.c index 588db55cb1b..5603f82324d 100644 --- a/src/emu/cpu/z180/z180.c +++ b/src/emu/cpu/z180/z180.c @@ -117,7 +117,8 @@ typedef struct { UINT8 irq_state[3]; /* irq line states (INT0,INT1,INT2) */ UINT8 after_EI; /* are we in the EI shadow? */ z80_daisy_state *daisy; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } Z180_Regs; #define CF 0x01 @@ -1897,12 +1898,13 @@ static void z180_write_iolines(UINT32 data) } -static void z180_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( z180 ) { Z180.daisy = NULL; if (config) Z180.daisy = z80daisy_init(Machine, Machine->config->cpu[cpu_getactivecpu()].tag, config); Z180.irq_callback = irqcallback; + Z180.device = device; state_save_register_item("z180", index, Z180.AF.w.l); state_save_register_item("z180", index, Z180.BC.w.l); @@ -1934,10 +1936,11 @@ static void z180_init(int index, int clock, const void *config, int (*irqcallbac /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void z180_reset(void) +static CPU_RESET( z180 ) { z80_daisy_state *save_daisy; - int (*save_irqcallback)(int); + cpu_irq_callback save_irqcallback; + const device_config *save_device; int i, p; #if BIG_FLAGS_ARRAY int oldval, newval, val; @@ -2018,9 +2021,11 @@ static void z180_reset(void) save_daisy = Z180.daisy; save_irqcallback = Z180.irq_callback; + save_device = Z180.device; memset(&Z180, 0, sizeof(Z180)); Z180.daisy = save_daisy; Z180.irq_callback = save_irqcallback; + Z180.device = device; _IX = _IY = 0xffff; /* IX and IY are FFFF after a reset! */ _F = ZF; /* Zero flag is set */ Z180.nmi_state = CLEAR_LINE; @@ -2182,7 +2187,7 @@ static void check_interrupts(void) /**************************************************************************** * Execute 'cycles' T-states. Return number of T-states really executed ****************************************************************************/ -static int z180_execute(int cycles) +static CPU_EXECUTE( z180 ) { int old_icount = cycles; z180_icount = cycles; @@ -2589,9 +2594,9 @@ void z180_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = z180_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = z180_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = z180_set_context; break; - case CPUINFO_PTR_INIT: info->init = z180_init; break; - case CPUINFO_PTR_RESET: info->reset = z180_reset; break; - case CPUINFO_PTR_EXECUTE: info->execute = z180_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(z180); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(z180); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(z180); break; case CPUINFO_PTR_BURN: info->burn = z180_burn; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = z180_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z180_icount; break; diff --git a/src/emu/cpu/z180/z180op.c b/src/emu/cpu/z180/z180op.c index a41fdce641c..68ea48b4bac 100644 --- a/src/emu/cpu/z180/z180op.c +++ b/src/emu/cpu/z180/z180op.c @@ -313,7 +313,7 @@ static void take_interrupt(int irq) /* else call back the cpu interface to retrieve the vector */ else - irq_vector = (*Z180.irq_callback)(0); + irq_vector = (*Z180.irq_callback)(Z180.device, 0); LOG(("Z180 #%d single int. irq_vector $%02x\n", cpu_getactivecpu(), irq_vector)); diff --git a/src/emu/cpu/z80/z80.c b/src/emu/cpu/z80/z80.c index 139c7043b8c..053a2215b8f 100644 --- a/src/emu/cpu/z80/z80.c +++ b/src/emu/cpu/z80/z80.c @@ -135,7 +135,8 @@ struct _z80_state UINT8 irq_state; /* irq line state */ UINT8 after_ei; /* are we in the EI shadow? */ UINT32 ea; - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; int icount; z80_daisy_state *daisy; }; @@ -3366,7 +3367,7 @@ static void take_interrupt(z80_state *z80) /* else call back the cpu interface to retrieve the vector */ else - irq_vector = (*z80->irq_callback)(0); + irq_vector = (*z80->irq_callback)(z80->device, 0); LOG(("Z80 #%d single int. irq_vector $%02x\n", cpu_getactivecpu(), irq_vector)); @@ -3424,14 +3425,13 @@ static void take_interrupt(z80_state *z80) /**************************************************************************** * Processor initialization ****************************************************************************/ -static void z80_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static CPU_INIT( z80 ) { - z80_state *z80; + z80_state *z80 = device->token; int i, p; - token = auto_malloc(sizeof(z80_state)); - z80 = token; - + token = device->token; // temporary + /* setup cycle tables */ cc[Z80_TABLE_op] = cc_op; cc[Z80_TABLE_cb] = cc_cb; @@ -3554,6 +3554,7 @@ static void z80_init(int index, int clock, const void *config, int (*irqcallback if (config != NULL) z80->daisy = z80daisy_init(Machine, Machine->config->cpu[cpu_getactivecpu()].tag, config); z80->irq_callback = irqcallback; + z80->device = device; IX = IY = 0xffff; /* IX and IY are FFFF after a reset! */ F = ZF; /* Zero flag is set */ } @@ -3561,9 +3562,9 @@ static void z80_init(int index, int clock, const void *config, int (*irqcallback /**************************************************************************** * Do a reset ****************************************************************************/ -static void z80_reset(void) +static CPU_RESET( z80 ) { - z80_state *z80 = token; + z80_state *z80 = device->token; PC = 0x0000; I = 0; @@ -3581,7 +3582,7 @@ static void z80_reset(void) MEMPTR=PCD; } -static void z80_exit(void) +static CPU_EXIT( z80 ) { #if BIG_FLAGS_ARRAY if (SZHVC_add) free(SZHVC_add); @@ -3594,9 +3595,9 @@ static void z80_exit(void) /**************************************************************************** * Execute 'cycles' T-states. Return number of T-states really executed ****************************************************************************/ -static int z80_execute(int cycles) +static CPU_EXECUTE( z80 ) { - z80_state *z80 = token; + z80_state *z80 = device->token; z80->icount = cycles; @@ -3655,8 +3656,6 @@ static void z80_burn(int cycles) ****************************************************************************/ static void z80_get_context (void *dst) { - if( dst ) - *(void **)dst = token; } /**************************************************************************** @@ -3666,7 +3665,7 @@ static void z80_set_context (void *src) { z80_state *z80; if( src ) - token = *(void **)src; + token = src; z80 = token; change_pc(PCD); } @@ -3760,7 +3759,7 @@ void z80_get_info(UINT32 state, cpuinfo *info) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(token); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break; case CPUINFO_INT_INPUT_LINES: info->i = 1; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -3819,10 +3818,10 @@ void z80_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = z80_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = z80_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = z80_set_context; break; - case CPUINFO_PTR_INIT: info->init = z80_init; break; - case CPUINFO_PTR_RESET: info->reset = z80_reset; break; - case CPUINFO_PTR_EXIT: info->exit = z80_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = z80_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(z80); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(z80); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(z80); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = z80_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break; diff --git a/src/emu/cpu/z8000/z8000.c b/src/emu/cpu/z8000/z8000.c index d6cdc207819..a721d44691d 100644 --- a/src/emu/cpu/z8000/z8000.c +++ b/src/emu/cpu/z8000/z8000.c @@ -78,7 +78,8 @@ typedef struct { z8000_reg_file regs;/* registers */ int nmi_state; /* NMI line state */ int irq_state[2]; /* IRQ line states (NVI, VI) */ - int (*irq_callback)(int irqline); + cpu_irq_callback irq_callback; + const device_config *device; } z8000_Regs; static int z8000_ICount; @@ -367,13 +368,13 @@ INLINE void Interrupt(void) if (IRQ_REQ & Z8000_NVI) { - int type = (*Z.irq_callback)(0); + int type = (*Z.irq_callback)(Z.device, 0); set_irq(type); } if (IRQ_REQ & Z8000_VI) { - int type = (*Z.irq_callback)(1); + int type = (*Z.irq_callback)(Z.device, 1); set_irq(type); } @@ -459,22 +460,24 @@ INLINE void Interrupt(void) } -static void z8000_reset(void) +static CPU_RESET( z8000 ) { - int (*save_irqcallback)(int) = Z.irq_callback; + cpu_irq_callback save_irqcallback = Z.irq_callback; + const device_config *save_device = Z.device; memset(&Z, 0, sizeof(z8000_Regs)); Z.irq_callback = save_irqcallback; + Z.device = save_device; FCW = RDMEM_W( 2 ); /* get reset FCW */ PC = RDMEM_W( 4 ); /* get reset PC */ change_pc(PC); } -static void z8000_exit(void) +static CPU_EXIT( z8000 ) { z8000_deinit(); } -static int z8000_execute(int cycles) +static CPU_EXECUTE( z8000 ) { z8000_ICount = cycles; @@ -688,10 +691,10 @@ void z8000_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = z8000_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = z8000_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = z8000_set_context; break; - case CPUINFO_PTR_INIT: info->init = z8000_init; break; - case CPUINFO_PTR_RESET: info->reset = z8000_reset; break; - case CPUINFO_PTR_EXIT: info->exit = z8000_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = z8000_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(z8000); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(z8000); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(z8000); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(z8000); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = z8000_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z8000_ICount; break; diff --git a/src/emu/cpu/z8000/z8000cpu.h b/src/emu/cpu/z8000/z8000cpu.h index f25f1a0196d..c4c8951afe4 100644 --- a/src/emu/cpu/z8000/z8000cpu.h +++ b/src/emu/cpu/z8000/z8000cpu.h @@ -191,6 +191,6 @@ typedef struct { /* opcode execution table */ extern Z8000_exec *z8000_exec; -extern void z8000_init(int index, int clock, const void *config, int (*irqcallback)(int)); +extern CPU_INIT( z8000 ); extern void z8000_deinit(void); diff --git a/src/emu/cpu/z8000/z8000tbl.c b/src/emu/cpu/z8000/z8000tbl.c index 607ebbc4c7f..f437584e8e2 100644 --- a/src/emu/cpu/z8000/z8000tbl.c +++ b/src/emu/cpu/z8000/z8000tbl.c @@ -535,7 +535,7 @@ static const Z8000_init table[] = { {0, 0, 0, 0, 0,0, 0}, }; -void z8000_init(int index, int clock, const void *config, int (*irqcallback)(int)) +CPU_INIT( z8000 ) { int i; const Z8000_init *init; @@ -584,6 +584,7 @@ void z8000_init(int index, int clock, const void *config, int (*irqcallback)(int } Z.irq_callback = irqcallback; + Z.device = device; } void z8000_deinit(void) diff --git a/src/emu/cpuexec.c b/src/emu/cpuexec.c index dbef58ac73e..a861f3e02a8 100644 --- a/src/emu/cpuexec.c +++ b/src/emu/cpuexec.c @@ -14,6 +14,8 @@ #include "eminline.h" #include "debugger.h" +extern const cpu_irq_callback cpu_irq_callbacks[]; + diff --git a/src/emu/cpuint.c b/src/emu/cpuint.c index 10bfeab20c3..754e3e305ef 100644 --- a/src/emu/cpuint.c +++ b/src/emu/cpuint.c @@ -54,16 +54,16 @@ static int input_event_index[MAX_CPU][MAX_INPUT_LINES]; * *************************************/ -static int cpu_0_irq_callback(int line); -static int cpu_1_irq_callback(int line); -static int cpu_2_irq_callback(int line); -static int cpu_3_irq_callback(int line); -static int cpu_4_irq_callback(int line); -static int cpu_5_irq_callback(int line); -static int cpu_6_irq_callback(int line); -static int cpu_7_irq_callback(int line); - -int (*const cpu_irq_callbacks[MAX_CPU])(int) = +static int cpu_0_irq_callback(const device_config *device, int line); +static int cpu_1_irq_callback(const device_config *device, int line); +static int cpu_2_irq_callback(const device_config *device, int line); +static int cpu_3_irq_callback(const device_config *device, int line); +static int cpu_4_irq_callback(const device_config *device, int line); +static int cpu_5_irq_callback(const device_config *device, int line); +static int cpu_6_irq_callback(const device_config *device, int line); +static int cpu_7_irq_callback(const device_config *device, int line); + +cpu_irq_callback cpu_irq_callbacks[MAX_CPU] = { cpu_0_irq_callback, cpu_1_irq_callback, @@ -399,7 +399,7 @@ void cpunum_set_irq_callback(int cpunum, int (*callback)(running_machine *, int) * *************************************/ -INLINE int cpu_irq_callback(running_machine *machine, int cpunum, int line) +INLINE int generic_irq_callback(running_machine *machine, int cpunum, int line) { int vector = input_line_vector[cpunum][line]; @@ -424,14 +424,11 @@ INLINE int cpu_irq_callback(running_machine *machine, int cpunum, int line) return vector; } -static int cpu_0_irq_callback(int line) { return cpu_irq_callback(Machine, 0, line); } -static int cpu_1_irq_callback(int line) { return cpu_irq_callback(Machine, 1, line); } -static int cpu_2_irq_callback(int line) { return cpu_irq_callback(Machine, 2, line); } -static int cpu_3_irq_callback(int line) { return cpu_irq_callback(Machine, 3, line); } -static int cpu_4_irq_callback(int line) { return cpu_irq_callback(Machine, 4, line); } -static int cpu_5_irq_callback(int line) { return cpu_irq_callback(Machine, 5, line); } -static int cpu_6_irq_callback(int line) { return cpu_irq_callback(Machine, 6, line); } -static int cpu_7_irq_callback(int line) { return cpu_irq_callback(Machine, 7, line); } - - - +static int cpu_0_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 0, line); } +static int cpu_1_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 1, line); } +static int cpu_2_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 2, line); } +static int cpu_3_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 3, line); } +static int cpu_4_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 4, line); } +static int cpu_5_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 5, line); } +static int cpu_6_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 6, line); } +static int cpu_7_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 7, line); } diff --git a/src/emu/cpuint.h b/src/emu/cpuint.h index 3228de0b36d..c89e9e70b3b 100644 --- a/src/emu/cpuint.h +++ b/src/emu/cpuint.h @@ -31,8 +31,6 @@ void cpuint_init(running_machine *machine); void cpuint_reset(void); -extern int (*const cpu_irq_callbacks[])(int); - /************************************* diff --git a/src/emu/cpuintrf.c b/src/emu/cpuintrf.c index baa66823619..ef690fede0c 100644 --- a/src/emu/cpuintrf.c +++ b/src/emu/cpuintrf.c @@ -281,7 +281,8 @@ struct _cpuintrf_data cpu_interface intf; /* copy of the interface data */ cpu_type cputype; /* type index of this CPU */ int family; /* family index of this CPU */ - void *context; /* dynamically allocated context buffer */ + device_config device; /* dummy device for now */ + int *icount; }; @@ -954,7 +955,7 @@ INLINE void set_cpu_context(running_machine *machine, int cpunum) /* if we need to change contexts, save the one that was there */ if (oldcontext != cpunum && oldcontext != -1) - (*cpu[oldcontext].intf.get_context)(cpu[oldcontext].context); + (*cpu[oldcontext].intf.get_context)(cpu[oldcontext].device.token); /* swap memory spaces */ activecpu = cpunum; @@ -963,7 +964,7 @@ INLINE void set_cpu_context(running_machine *machine, int cpunum) /* if the new CPU's context is not swapped in, do it now */ if (oldcontext != cpunum) { - (*cpu[cpunum].intf.set_context)(cpu[cpunum].context); + (*cpu[cpunum].intf.set_context)(cpu[cpunum].device.token); cpu_active_context[newfamily] = cpunum; } } @@ -1162,24 +1163,26 @@ void cpuintrf_set_dasm_override(int cpunum, offs_t (*dasm_override)(char *buffer * *************************************/ -int cpuintrf_init_cpu(int cpunum, cpu_type cputype, int clock, const void *config, int (*irqcallback)(int)) +int cpuintrf_init_cpu(int cpunum, cpu_type cputype, int clock, const void *config, cpu_irq_callback irqcallback) { cpuinfo info; - /* allocate a context buffer for the CPU */ - cpu[cpunum].context = auto_malloc(cpu[cpunum].intf.context_size); - memset(cpu[cpunum].context, 0, cpu[cpunum].intf.context_size); + /* create a fake device for the CPU */ + memset(&cpu[cpunum].device, 0, sizeof(cpu[cpunum].device)); + cpu[cpunum].device.machine = Machine; + cpu[cpunum].device.token = auto_malloc(cpu[cpunum].intf.context_size); + memset(cpu[cpunum].device.token, 0, cpu[cpunum].intf.context_size); /* initialize the CPU and stash the context */ activecpu = cpunum; - (*cpu[cpunum].intf.init)(cpunum, clock, config, irqcallback); - (*cpu[cpunum].intf.get_context)(cpu[cpunum].context); + (*cpu[cpunum].intf.init)(&cpu[cpunum].device, cpunum, clock, config, irqcallback); + (*cpu[cpunum].intf.get_context)(cpu[cpunum].device.token); activecpu = -1; /* get the instruction count pointer */ info.icount = NULL; (*cpu[cpunum].intf.get_info)(CPUINFO_PTR_INSTRUCTION_COUNTER, &info); - cpu[cpunum].intf.icount = info.icount; + cpu[cpunum].icount = info.icount; /* clear out the registered CPU for this family */ cpu_active_context[cpu[cpunum].family] = -1; @@ -1201,7 +1204,7 @@ void cpuintrf_exit_cpu(int cpunum) { /* switch contexts to the CPU during the exit */ cpuintrf_push_context(cpunum); - (*cpu[cpunum].intf.exit)(); + (*cpu[cpunum].intf.exit)(&cpu[cpunum].device); cpuintrf_pop_context(); } } @@ -1295,14 +1298,14 @@ void activecpu_set_info_fct(UINT32 state, genf *data) void activecpu_adjust_icount(int delta) { VERIFY_ACTIVECPU(activecpu_adjust_icount); - *cpu[activecpu].intf.icount += delta; + *cpu[activecpu].icount += delta; } int activecpu_get_icount(void) { VERIFY_ACTIVECPU(activecpu_get_icount); - return *cpu[activecpu].intf.icount; + return *cpu[activecpu].icount; } @@ -1529,7 +1532,7 @@ int cpunum_execute(int cpunum, int cycles) cpuintrf_push_context(cpunum); executingcpu = cpunum; memory_set_opbase(activecpu_get_physical_pc_byte()); - ran = (*cpu[cpunum].intf.execute)(cycles); + ran = (*cpu[cpunum].intf.execute)(&cpu[cpunum].device, cycles); executingcpu = -1; cpuintrf_pop_context(); return ran; @@ -1545,7 +1548,7 @@ void cpunum_reset(int cpunum) VERIFY_CPUNUM(cpunum_reset); cpuintrf_push_context(cpunum); memory_set_opbase(0); - (*cpu[cpunum].intf.reset)(); + (*cpu[cpunum].intf.reset)(&cpu[cpunum].device); cpuintrf_pop_context(); } @@ -1585,7 +1588,7 @@ void cpunum_write_byte(int cpunum, offs_t address, UINT8 data) void *cpunum_get_context_ptr(int cpunum) { VERIFY_CPUNUM(cpunum_get_context_ptr); - return (cpu_active_context[cpu[cpunum].family] == cpunum) ? NULL : cpu[cpunum].context; + return (cpu_active_context[cpu[cpunum].family] == cpunum) ? NULL : cpu[cpunum].device.token; } @@ -1704,10 +1707,10 @@ struct dummy_context static struct dummy_context dummy_state; static int dummy_icount; -static void dummy_init(int index, int clock, const void *config, int (*irqcallback)(int)) { } -static void dummy_reset(void) { } -static void dummy_exit(void) { } -static int dummy_execute(int cycles) { return cycles; } +static CPU_INIT( dummy ) { } +static CPU_RESET( dummy ) { } +static CPU_EXIT( dummy ) { } +static CPU_EXECUTE( dummy ) { return cycles; } static void dummy_get_context(void *regs) { } static void dummy_set_context(void *regs) { } @@ -1757,10 +1760,10 @@ void dummy_get_info(UINT32 state, cpuinfo *info) case CPUINFO_PTR_SET_INFO: info->setinfo = dummy_set_info; break; case CPUINFO_PTR_GET_CONTEXT: info->getcontext = dummy_get_context; break; case CPUINFO_PTR_SET_CONTEXT: info->setcontext = dummy_set_context; break; - case CPUINFO_PTR_INIT: info->init = dummy_init; break; - case CPUINFO_PTR_RESET: info->reset = dummy_reset; break; - case CPUINFO_PTR_EXIT: info->exit = dummy_exit; break; - case CPUINFO_PTR_EXECUTE: info->execute = dummy_execute; break; + case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(dummy); break; + case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(dummy); break; + case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(dummy); break; + case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(dummy);break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = dummy_dasm; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &dummy_icount; break; diff --git a/src/emu/cpuintrf.h b/src/emu/cpuintrf.h index f31906677c8..b5b5b8ba59c 100644 --- a/src/emu/cpuintrf.h +++ b/src/emu/cpuintrf.h @@ -14,6 +14,7 @@ #ifndef __CPUINTRF_H__ #define __CPUINTRF_H__ +#include "devintrf.h" #include "cpuint.h" #include "cpuexec.h" #include "watchdog.h" @@ -207,6 +208,28 @@ enum /*************************************************************************** + MACROS +***************************************************************************/ + +#define CPU_INIT_NAME(name) cpu_init_##name +#define CPU_INIT(name) void CPU_INIT_NAME(name)(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback) +#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)(device, index, clock, config, irqcallback) + +#define CPU_RESET_NAME(name) cpu_reset_##name +#define CPU_RESET(name) void CPU_RESET_NAME(name)(const device_config *device) +#define CPU_RESET_CALL(name) CPU_RESET_NAME(name)(device) + +#define CPU_EXIT_NAME(name) cpu_exit_##name +#define CPU_EXIT(name) void CPU_EXIT_NAME(name)(const device_config *device) +#define CPU_EXIT_CALL(name) CPU_EXIT_NAME(name)(device) + +#define CPU_EXECUTE_NAME(name) cpu_execute_##name +#define CPU_EXECUTE(name) int CPU_EXECUTE_NAME(name)(const device_config *device, int cycles) +#define CPU_EXECUTE_CALL(name) CPU_EXECUTE_NAME(name)(device, cycles) + + + +/*************************************************************************** TYPE DEFINITIONS ***************************************************************************/ @@ -215,14 +238,16 @@ typedef union _cpuinfo cpuinfo; /* define the various callback functions */ +typedef int (*cpu_irq_callback)(const device_config *device, int irqnum); + typedef void (*cpu_get_info_func)(UINT32 state, cpuinfo *info); typedef void (*cpu_set_info_func)(UINT32 state, cpuinfo *info); typedef void (*cpu_get_context_func)(void *buffer); typedef void (*cpu_set_context_func)(void *buffer); -typedef void (*cpu_init_func)(int index, int clock, const void *config, int (*irqcallback)(int)); -typedef void (*cpu_reset_func)(void); -typedef void (*cpu_exit_func)(void); -typedef int (*cpu_execute_func)(int cycles); +typedef void (*cpu_init_func)(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback); +typedef void (*cpu_reset_func)(const device_config *device); +typedef void (*cpu_exit_func)(const device_config *device); +typedef int (*cpu_execute_func)(const device_config *device, int cycles); typedef void (*cpu_burn_func)(int cycles); typedef offs_t (*cpu_disassemble_func)(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram); typedef int (*cpu_translate_func)(int space, int intention, offs_t *address); @@ -283,7 +308,6 @@ struct _cpu_interface /* other info */ size_t context_size; INT8 address_shift; - int * icount; }; @@ -296,7 +320,7 @@ struct _cpu_interface void cpuintrf_init(running_machine *machine); /* set up the interface for one CPU of a given type */ -int cpuintrf_init_cpu(int cpunum, cpu_type cputype, int clock, const void *config, int (*irqcallback)(int)); +int cpuintrf_init_cpu(int cpunum, cpu_type cputype, int clock, const void *config, cpu_irq_callback irqcallback); /* clean up the interface for one CPU */ void cpuintrf_exit_cpu(int cpunum); |
