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author Couriersud <couriersud@users.noreply.github.com>2008-11-04 23:19:16 +0000
committer Couriersud <couriersud@users.noreply.github.com>2008-11-04 23:19:16 +0000
commit94e16603c506ea58da3d66c3d8db7324b3e9e493 (patch)
tree70d265812fdbe8c6c9de4d8c67b4d568d624cd1b /src
parent62195dc9a030eb10431f5d5cafbd9f0b7ed1874e (diff)
"Pointer-ified" the mcs48 core
Diffstat (limited to 'src')
-rw-r--r--src/emu/cpu/mcs48/mcs48.c816
1 files changed, 414 insertions, 402 deletions
diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index dc34235e512..9c342f6c27c 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -68,8 +68,8 @@ T0 output clock
***************************************************************************/
/* live processor state */
-typedef struct _mcs48_regs mcs48_regs;
-struct _mcs48_regs
+typedef struct _mcs48_state mcs48_state;
+struct _mcs48_state
{
PAIR prevpc; /* 16-bit previous program counter */
PAIR pc; /* 16-bit program counter */
@@ -95,6 +95,8 @@ struct _mcs48_regs
UINT16 a11; /* A11 value, either 0x000 or 0x800 */
int (*irq_callback)(int irqline);
+ int icount;
+
int inst_cycles; /* cycles for the current instruction */
UINT8 cpu_feature; /* processor feature flags */
UINT16 int_rom_size; /* internal rom size */
@@ -106,7 +108,7 @@ typedef struct _mcs48_opcode mcs48_opcode;
struct _mcs48_opcode
{
UINT8 cycles;
- void (*function)(void);
+ void (*function)(mcs48_state *);
};
@@ -148,21 +150,21 @@ struct _mcs48_opcode
/* simplfied access to common bits */
#undef A
-#define A mcs48.a
+#define A mcs48->a
#undef PC
-#define PC mcs48.pc.w.l
+#define PC mcs48->pc.w.l
#undef PSW
-#define PSW mcs48.psw
+#define PSW mcs48->psw
/* r0-r7 map to memory via the regptr */
-#define R0 mcs48.regptr[0]
-#define R1 mcs48.regptr[1]
-#define R2 mcs48.regptr[2]
-#define R3 mcs48.regptr[3]
-#define R4 mcs48.regptr[4]
-#define R5 mcs48.regptr[5]
-#define R6 mcs48.regptr[6]
-#define R7 mcs48.regptr[7]
+#define R0 mcs48->regptr[0]
+#define R1 mcs48->regptr[1]
+#define R2 mcs48->regptr[2]
+#define R3 mcs48->regptr[3]
+#define R4 mcs48->regptr[4]
+#define R5 mcs48->regptr[5]
+#define R6 mcs48->regptr[6]
+#define R7 mcs48->regptr[7]
/* the carry flag as 0 or 1, used for carry-in */
#define CARRYIN ((PSW & C_FLAG) >> 7)
@@ -173,16 +175,13 @@ struct _mcs48_opcode
GLOBAL VARIABLES
***************************************************************************/
-static mcs48_regs mcs48;
-static int mcs48_icount;
-
-
+static void *token;
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
-static void check_irqs(void);
+static void check_irqs( mcs48_state *mcs48);
@@ -216,9 +215,9 @@ INLINE UINT8 argument_fetch(offs_t address)
point to the appropriate register bank
-------------------------------------------------*/
-INLINE void update_regptr(void)
+INLINE void update_regptr(mcs48_state *mcs48)
{
- mcs48.regptr = memory_get_write_ptr(cpu_getactivecpu(), ADDRESS_SPACE_DATA, (PSW & B_FLAG) ? 24 : 0);
+ mcs48->regptr = memory_get_write_ptr(cpu_getactivecpu(), ADDRESS_SPACE_DATA, (PSW & B_FLAG) ? 24 : 0);
}
@@ -227,11 +226,11 @@ INLINE void update_regptr(void)
the stack
-------------------------------------------------*/
-INLINE void push_pc_psw(void)
+INLINE void push_pc_psw(mcs48_state *mcs48)
{
UINT8 sp = PSW & 0x07;
- ram_w(8 + 2*sp, mcs48.pc.b.l);
- ram_w(9 + 2*sp, (mcs48.pc.b.h & 0x0f) | (PSW & 0xf0));
+ ram_w(8 + 2*sp, mcs48->pc.b.l);
+ ram_w(9 + 2*sp, (mcs48->pc.b.h & 0x0f) | (PSW & 0xf0));
PSW = (PSW & 0xf8) | ((sp + 1) & 0x07);
}
@@ -241,14 +240,14 @@ INLINE void push_pc_psw(void)
the stack
-------------------------------------------------*/
-INLINE void pull_pc_psw(void)
+INLINE void pull_pc_psw(mcs48_state *mcs48)
{
UINT8 sp = (PSW - 1) & 0x07;
- mcs48.pc.b.l = ram_r(8 + 2*sp);
- mcs48.pc.b.h = ram_r(9 + 2*sp);
- PSW = (mcs48.pc.b.h & 0xf0) | 0x08 | sp;
- mcs48.pc.b.h &= 0x0f;
- update_regptr();
+ mcs48->pc.b.l = ram_r(8 + 2*sp);
+ mcs48->pc.b.h = ram_r(9 + 2*sp);
+ PSW = (mcs48->pc.b.h & 0xf0) | 0x08 | sp;
+ mcs48->pc.b.h &= 0x0f;
+ update_regptr(mcs48);
change_pc(PC);
}
@@ -258,11 +257,11 @@ INLINE void pull_pc_psw(void)
leaving the upper part of PSW intact
-------------------------------------------------*/
-INLINE void pull_pc(void)
+INLINE void pull_pc(mcs48_state *mcs48)
{
UINT8 sp = (PSW - 1) & 0x07;
- mcs48.pc.b.l = ram_r(8 + 2*sp);
- mcs48.pc.b.h = ram_r(9 + 2*sp) & 0x0f;
+ mcs48->pc.b.l = ram_r(8 + 2*sp);
+ mcs48->pc.b.h = ram_r(9 + 2*sp) & 0x0f;
PSW = (PSW & 0xf0) | 0x08 | sp;
change_pc(PC);
}
@@ -273,7 +272,7 @@ INLINE void pull_pc(void)
instruction
-------------------------------------------------*/
-INLINE void execute_add(UINT8 dat)
+INLINE void execute_add(mcs48_state *mcs48, UINT8 dat)
{
UINT16 temp = A + dat;
UINT16 temp4 = (A & 0x0f) + (dat & 0x0f);
@@ -290,7 +289,7 @@ INLINE void execute_add(UINT8 dat)
instruction
-------------------------------------------------*/
-INLINE void execute_addc(UINT8 dat)
+INLINE void execute_addc(mcs48_state *mcs48, UINT8 dat)
{
UINT16 temp = A + dat + CARRYIN;
UINT16 temp4 = (A & 0x0f) + (dat & 0x0f) + CARRYIN;
@@ -307,9 +306,9 @@ INLINE void execute_addc(UINT8 dat)
instruction
-------------------------------------------------*/
-INLINE void execute_jmp(UINT16 address)
+INLINE void execute_jmp(mcs48_state *mcs48, UINT16 address)
{
- UINT16 a11 = (mcs48.irq_in_progress) ? 0 : mcs48.a11;
+ UINT16 a11 = (mcs48->irq_in_progress) ? 0 : mcs48->a11;
PC = address | a11;
change_pc(PC);
}
@@ -320,10 +319,10 @@ INLINE void execute_jmp(UINT16 address)
instruction
-------------------------------------------------*/
-INLINE void execute_call(UINT16 address)
+INLINE void execute_call(mcs48_state *mcs48, UINT16 address)
{
- push_pc_psw();
- execute_jmp(address);
+ push_pc_psw(mcs48);
+ execute_jmp(mcs48, address);
}
@@ -332,7 +331,7 @@ INLINE void execute_call(UINT16 address)
conditional jump instruction
-------------------------------------------------*/
-INLINE void execute_jcc(UINT8 result)
+INLINE void execute_jcc(mcs48_state *mcs48, UINT8 result)
{
UINT8 offset = argument_fetch(PC++);
if (result != 0)
@@ -350,75 +349,77 @@ INLINE void execute_jcc(UINT8 result)
OPCODE HANDLERS
***************************************************************************/
-static void illegal(void)
+#define OPHANDLER(_name) static void _name (mcs48_state *mcs48)
+
+OPHANDLER( illegal )
{
logerror("I8039: pc = %04x, Illegal opcode = %02x\n", PC-1, program_r(PC-1));
}
-static void add_a_r0(void) { execute_add(R0); }
-static void add_a_r1(void) { execute_add(R1); }
-static void add_a_r2(void) { execute_add(R2); }
-static void add_a_r3(void) { execute_add(R3); }
-static void add_a_r4(void) { execute_add(R4); }
-static void add_a_r5(void) { execute_add(R5); }
-static void add_a_r6(void) { execute_add(R6); }
-static void add_a_r7(void) { execute_add(R7); }
-static void add_a_xr0(void) { execute_add(ram_r(R0)); }
-static void add_a_xr1(void) { execute_add(ram_r(R1)); }
-static void add_a_n(void) { execute_add(argument_fetch(PC++)); }
-
-static void adc_a_r0(void) { execute_addc(R0); }
-static void adc_a_r1(void) { execute_addc(R1); }
-static void adc_a_r2(void) { execute_addc(R2); }
-static void adc_a_r3(void) { execute_addc(R3); }
-static void adc_a_r4(void) { execute_addc(R4); }
-static void adc_a_r5(void) { execute_addc(R5); }
-static void adc_a_r6(void) { execute_addc(R6); }
-static void adc_a_r7(void) { execute_addc(R7); }
-static void adc_a_xr0(void) { execute_addc(ram_r(R0)); }
-static void adc_a_xr1(void) { execute_addc(ram_r(R1)); }
-static void adc_a_n(void) { execute_addc(argument_fetch(PC++)); }
-
-static void anl_a_r0(void) { A &= R0; }
-static void anl_a_r1(void) { A &= R1; }
-static void anl_a_r2(void) { A &= R2; }
-static void anl_a_r3(void) { A &= R3; }
-static void anl_a_r4(void) { A &= R4; }
-static void anl_a_r5(void) { A &= R5; }
-static void anl_a_r6(void) { A &= R6; }
-static void anl_a_r7(void) { A &= R7; }
-static void anl_a_xr0(void) { A &= ram_r(R0); }
-static void anl_a_xr1(void) { A &= ram_r(R1); }
-static void anl_a_n(void) { A &= argument_fetch(PC++); }
-static void anl_bus_n(void) { bus_w(bus_r() & argument_fetch(PC++)); }
-static void anl_p1_n(void) { port_w(1, mcs48.p1 &= argument_fetch(PC++)); }
-static void anl_p2_n(void) { port_w(2, mcs48.p2 &= argument_fetch(PC++)); }
-
-static void anld_p4_a(void) { port_w(4, port_r(4) & A & 0x0f); }
-static void anld_p5_a(void) { port_w(5, port_r(5) & A & 0x0f); }
-static void anld_p6_a(void) { port_w(6, port_r(6) & A & 0x0f); }
-static void anld_p7_a(void) { port_w(7, port_r(7) & A & 0x0f); }
-
-static void call_0(void) { execute_call(argument_fetch(PC++) | 0x000); }
-static void call_1(void) { execute_call(argument_fetch(PC++) | 0x100); }
-static void call_2(void) { execute_call(argument_fetch(PC++) | 0x200); }
-static void call_3(void) { execute_call(argument_fetch(PC++) | 0x300); }
-static void call_4(void) { execute_call(argument_fetch(PC++) | 0x400); }
-static void call_5(void) { execute_call(argument_fetch(PC++) | 0x500); }
-static void call_6(void) { execute_call(argument_fetch(PC++) | 0x600); }
-static void call_7(void) { execute_call(argument_fetch(PC++) | 0x700); }
-
-static void clr_a(void) { A = 0; }
-static void clr_c(void) { PSW &= ~C_FLAG; }
-static void clr_f0(void) { PSW &= ~F_FLAG; }
-static void clr_f1(void) { mcs48.f1 = 0; }
-
-static void cpl_a(void) { A ^= 0xff; }
-static void cpl_c(void) { PSW ^= C_FLAG; }
-static void cpl_f0(void) { PSW ^= F_FLAG; }
-static void cpl_f1(void) { mcs48.f1 ^= 1; }
-
-static void da_a(void)
+OPHANDLER( add_a_r0 ) { execute_add(mcs48, R0); }
+OPHANDLER( add_a_r1 ) { execute_add(mcs48, R1); }
+OPHANDLER( add_a_r2 ) { execute_add(mcs48, R2); }
+OPHANDLER( add_a_r3 ) { execute_add(mcs48, R3); }
+OPHANDLER( add_a_r4 ) { execute_add(mcs48, R4); }
+OPHANDLER( add_a_r5 ) { execute_add(mcs48, R5); }
+OPHANDLER( add_a_r6 ) { execute_add(mcs48, R6); }
+OPHANDLER( add_a_r7 ) { execute_add(mcs48, R7); }
+OPHANDLER( add_a_xr0 ) { execute_add(mcs48, ram_r(R0)); }
+OPHANDLER( add_a_xr1 ) { execute_add(mcs48, ram_r(R1)); }
+OPHANDLER( add_a_n ) { execute_add(mcs48, argument_fetch(PC++)); }
+
+OPHANDLER( adc_a_r0 ) { execute_addc(mcs48, R0); }
+OPHANDLER( adc_a_r1 ) { execute_addc(mcs48, R1); }
+OPHANDLER( adc_a_r2 ) { execute_addc(mcs48, R2); }
+OPHANDLER( adc_a_r3 ) { execute_addc(mcs48, R3); }
+OPHANDLER( adc_a_r4 ) { execute_addc(mcs48, R4); }
+OPHANDLER( adc_a_r5 ) { execute_addc(mcs48, R5); }
+OPHANDLER( adc_a_r6 ) { execute_addc(mcs48, R6); }
+OPHANDLER( adc_a_r7 ) { execute_addc(mcs48, R7); }
+OPHANDLER( adc_a_xr0 ) { execute_addc(mcs48, ram_r(R0)); }
+OPHANDLER( adc_a_xr1 ) { execute_addc(mcs48, ram_r(R1)); }
+OPHANDLER( adc_a_n ) { execute_addc(mcs48, argument_fetch(PC++)); }
+
+OPHANDLER( anl_a_r0 ) { A &= R0; }
+OPHANDLER( anl_a_r1 ) { A &= R1; }
+OPHANDLER( anl_a_r2 ) { A &= R2; }
+OPHANDLER( anl_a_r3 ) { A &= R3; }
+OPHANDLER( anl_a_r4 ) { A &= R4; }
+OPHANDLER( anl_a_r5 ) { A &= R5; }
+OPHANDLER( anl_a_r6 ) { A &= R6; }
+OPHANDLER( anl_a_r7 ) { A &= R7; }
+OPHANDLER( anl_a_xr0 ) { A &= ram_r(R0); }
+OPHANDLER( anl_a_xr1 ) { A &= ram_r(R1); }
+OPHANDLER( anl_a_n ) { A &= argument_fetch(PC++); }
+OPHANDLER( anl_bus_n ) { bus_w(bus_r() & argument_fetch(PC++)); }
+OPHANDLER( anl_p1_n ) { port_w(1, mcs48->p1 &= argument_fetch(PC++)); }
+OPHANDLER( anl_p2_n ) { port_w(2, mcs48->p2 &= argument_fetch(PC++)); }
+
+OPHANDLER( anld_p4_a ) { port_w(4, port_r(4) & A & 0x0f); }
+OPHANDLER( anld_p5_a ) { port_w(5, port_r(5) & A & 0x0f); }
+OPHANDLER( anld_p6_a ) { port_w(6, port_r(6) & A & 0x0f); }
+OPHANDLER( anld_p7_a ) { port_w(7, port_r(7) & A & 0x0f); }
+
+OPHANDLER( call_0 ) { execute_call(mcs48, argument_fetch(PC++) | 0x000); }
+OPHANDLER( call_1 ) { execute_call(mcs48, argument_fetch(PC++) | 0x100); }
+OPHANDLER( call_2 ) { execute_call(mcs48, argument_fetch(PC++) | 0x200); }
+OPHANDLER( call_3 ) { execute_call(mcs48, argument_fetch(PC++) | 0x300); }
+OPHANDLER( call_4 ) { execute_call(mcs48, argument_fetch(PC++) | 0x400); }
+OPHANDLER( call_5 ) { execute_call(mcs48, argument_fetch(PC++) | 0x500); }
+OPHANDLER( call_6 ) { execute_call(mcs48, argument_fetch(PC++) | 0x600); }
+OPHANDLER( call_7 ) { execute_call(mcs48, argument_fetch(PC++) | 0x700); }
+
+OPHANDLER( clr_a ) { A = 0; }
+OPHANDLER( clr_c ) { PSW &= ~C_FLAG; }
+OPHANDLER( clr_f0 ) { PSW &= ~F_FLAG; }
+OPHANDLER( clr_f1 ) { mcs48->f1 = 0; }
+
+OPHANDLER( cpl_a ) { A ^= 0xff; }
+OPHANDLER( cpl_c ) { PSW ^= C_FLAG; }
+OPHANDLER( cpl_f0 ) { PSW ^= F_FLAG; }
+OPHANDLER( cpl_f1 ) { mcs48->f1 ^= 1; }
+
+OPHANDLER( da_a )
{
if ((A & 0x0f) > 0x09 || (PSW & A_FLAG))
{
@@ -435,217 +436,217 @@ static void da_a(void)
PSW &= ~C_FLAG;
}
-static void dec_a(void) { A--; }
-static void dec_r0(void) { R0--; }
-static void dec_r1(void) { R1--; }
-static void dec_r2(void) { R2--; }
-static void dec_r3(void) { R3--; }
-static void dec_r4(void) { R4--; }
-static void dec_r5(void) { R5--; }
-static void dec_r6(void) { R6--; }
-static void dec_r7(void) { R7--; }
-
-static void dis_i(void) { mcs48.xirq_enabled = FALSE; }
-static void dis_tcnti(void) { mcs48.tirq_enabled = FALSE; mcs48.timer_overflow = FALSE; }
-
-static void djnz_r0(void) { execute_jcc(--R0 != 0); }
-static void djnz_r1(void) { execute_jcc(--R1 != 0); }
-static void djnz_r2(void) { execute_jcc(--R2 != 0); }
-static void djnz_r3(void) { execute_jcc(--R3 != 0); }
-static void djnz_r4(void) { execute_jcc(--R4 != 0); }
-static void djnz_r5(void) { execute_jcc(--R5 != 0); }
-static void djnz_r6(void) { execute_jcc(--R6 != 0); }
-static void djnz_r7(void) { execute_jcc(--R7 != 0); }
-
-static void en_i(void) { mcs48.xirq_enabled = TRUE; check_irqs(); }
-static void en_tcnti(void) { mcs48.tirq_enabled = TRUE; check_irqs(); }
-
-static void ento_clk(void)
+OPHANDLER( dec_a ) { A--; }
+OPHANDLER( dec_r0 ) { R0--; }
+OPHANDLER( dec_r1 ) { R1--; }
+OPHANDLER( dec_r2 ) { R2--; }
+OPHANDLER( dec_r3 ) { R3--; }
+OPHANDLER( dec_r4 ) { R4--; }
+OPHANDLER( dec_r5 ) { R5--; }
+OPHANDLER( dec_r6 ) { R6--; }
+OPHANDLER( dec_r7 ) { R7--; }
+
+OPHANDLER( dis_i ) { mcs48->xirq_enabled = FALSE; }
+OPHANDLER( dis_tcnti ) { mcs48->tirq_enabled = FALSE; mcs48->timer_overflow = FALSE; }
+
+OPHANDLER( djnz_r0 ) { execute_jcc(mcs48, --R0 != 0); }
+OPHANDLER( djnz_r1 ) { execute_jcc(mcs48, --R1 != 0); }
+OPHANDLER( djnz_r2 ) { execute_jcc(mcs48, --R2 != 0); }
+OPHANDLER( djnz_r3 ) { execute_jcc(mcs48, --R3 != 0); }
+OPHANDLER( djnz_r4 ) { execute_jcc(mcs48, --R4 != 0); }
+OPHANDLER( djnz_r5 ) { execute_jcc(mcs48, --R5 != 0); }
+OPHANDLER( djnz_r6 ) { execute_jcc(mcs48, --R6 != 0); }
+OPHANDLER( djnz_r7 ) { execute_jcc(mcs48, --R7 != 0); }
+
+OPHANDLER( en_i ) { mcs48->xirq_enabled = TRUE; check_irqs(mcs48); }
+OPHANDLER( en_tcnti ) { mcs48->tirq_enabled = TRUE; check_irqs(mcs48); }
+
+OPHANDLER( ento_clk )
{
logerror("I8039: pc = %04x, Unimplemented opcode = %02x\n", PC-1, program_r(PC-1));
}
-static void in_a_p1(void) { A = port_r(1) & mcs48.p1; }
-static void in_a_p2(void) { A = port_r(2) & mcs48.p2; }
-static void ins_a_bus(void) { A = bus_r(); }
-
-static void inc_a(void) { A++; }
-static void inc_r0(void) { R0++; }
-static void inc_r1(void) { R1++; }
-static void inc_r2(void) { R2++; }
-static void inc_r3(void) { R3++; }
-static void inc_r4(void) { R4++; }
-static void inc_r5(void) { R5++; }
-static void inc_r6(void) { R6++; }
-static void inc_r7(void) { R7++; }
-static void inc_xr0(void) { ram_w(R0, ram_r(R0) + 1); }
-static void inc_xr1(void) { ram_w(R1, ram_r(R1) + 1); }
-
-static void jb_0(void) { execute_jcc((A & 0x01) != 0); }
-static void jb_1(void) { execute_jcc((A & 0x02) != 0); }
-static void jb_2(void) { execute_jcc((A & 0x04) != 0); }
-static void jb_3(void) { execute_jcc((A & 0x08) != 0); }
-static void jb_4(void) { execute_jcc((A & 0x10) != 0); }
-static void jb_5(void) { execute_jcc((A & 0x20) != 0); }
-static void jb_6(void) { execute_jcc((A & 0x40) != 0); }
-static void jb_7(void) { execute_jcc((A & 0x80) != 0); }
-static void jc(void) { execute_jcc((PSW & C_FLAG) != 0); }
-static void jf0(void) { execute_jcc((PSW & F_FLAG) != 0); }
-static void jf1(void) { execute_jcc(mcs48.f1 != 0); }
-
-static void jmp_0(void) { execute_jmp(argument_fetch(PC) | 0x000); }
-static void jmp_1(void) { execute_jmp(argument_fetch(PC) | 0x100); }
-static void jmp_2(void) { execute_jmp(argument_fetch(PC) | 0x200); }
-static void jmp_3(void) { execute_jmp(argument_fetch(PC) | 0x300); }
-static void jmp_4(void) { execute_jmp(argument_fetch(PC) | 0x400); }
-static void jmp_5(void) { execute_jmp(argument_fetch(PC) | 0x500); }
-static void jmp_6(void) { execute_jmp(argument_fetch(PC) | 0x600); }
-static void jmp_7(void) { execute_jmp(argument_fetch(PC) | 0x700); }
-static void jmpp_xa(void) { PC &= 0xf00; PC |= program_r(PC | A); change_pc(PC); }
-
-static void jnc(void) { execute_jcc((PSW & C_FLAG) == 0); }
-static void jni(void) { execute_jcc(mcs48.irq_state != 0); }
-static void jnt_0(void) { execute_jcc(test_r(0) == 0); }
-static void jnt_1(void) { execute_jcc(test_r(1) == 0); }
-static void jnz(void) { execute_jcc(A != 0); }
-static void jtf(void) { execute_jcc(mcs48.timer_flag); mcs48.timer_flag = FALSE; }
-static void jt_0(void) { execute_jcc(test_r(0) != 0); }
-static void jt_1(void) { execute_jcc(test_r(1) != 0); }
-static void jz(void) { execute_jcc(A == 0); }
-
-static void mov_a_n(void) { A = argument_fetch(PC++); }
-static void mov_a_psw(void) { A = PSW; }
-static void mov_a_r0(void) { A = R0; }
-static void mov_a_r1(void) { A = R1; }
-static void mov_a_r2(void) { A = R2; }
-static void mov_a_r3(void) { A = R3; }
-static void mov_a_r4(void) { A = R4; }
-static void mov_a_r5(void) { A = R5; }
-static void mov_a_r6(void) { A = R6; }
-static void mov_a_r7(void) { A = R7; }
-static void mov_a_xr0(void) { A = ram_r(R0); }
-static void mov_a_xr1(void) { A = ram_r(R1); }
-static void mov_a_t(void) { A = mcs48.timer; }
-
-static void mov_psw_a(void) { PSW = A; update_regptr(); }
-static void mov_r0_a(void) { R0 = A; }
-static void mov_r1_a(void) { R1 = A; }
-static void mov_r2_a(void) { R2 = A; }
-static void mov_r3_a(void) { R3 = A; }
-static void mov_r4_a(void) { R4 = A; }
-static void mov_r5_a(void) { R5 = A; }
-static void mov_r6_a(void) { R6 = A; }
-static void mov_r7_a(void) { R7 = A; }
-static void mov_r0_n(void) { R0 = argument_fetch(PC++); }
-static void mov_r1_n(void) { R1 = argument_fetch(PC++); }
-static void mov_r2_n(void) { R2 = argument_fetch(PC++); }
-static void mov_r3_n(void) { R3 = argument_fetch(PC++); }
-static void mov_r4_n(void) { R4 = argument_fetch(PC++); }
-static void mov_r5_n(void) { R5 = argument_fetch(PC++); }
-static void mov_r6_n(void) { R6 = argument_fetch(PC++); }
-static void mov_r7_n(void) { R7 = argument_fetch(PC++); }
-static void mov_t_a(void) { mcs48.timer = A; }
-static void mov_xr0_a(void) { ram_w(R0, A); }
-static void mov_xr1_a(void) { ram_w(R1, A); }
-static void mov_xr0_n(void) { ram_w(R0, argument_fetch(PC++)); }
-static void mov_xr1_n(void) { ram_w(R1, argument_fetch(PC++)); }
-
-static void movd_a_p4(void) { A = port_r(4) & 0x0f; }
-static void movd_a_p5(void) { A = port_r(5) & 0x0f; }
-static void movd_a_p6(void) { A = port_r(6) & 0x0f; }
-static void movd_a_p7(void) { A = port_r(7) & 0x0f; }
-static void movd_p4_a(void) { port_w(4, A & 0x0f); }
-static void movd_p5_a(void) { port_w(5, A & 0x0f); }
-static void movd_p6_a(void) { port_w(6, A & 0x0f); }
-static void movd_p7_a(void) { port_w(7, A & 0x0f); }
-
-static void movp_a_xa(void) { A = program_r((PC & 0xf00) | A); }
-static void movp3_a_xa(void) { A = program_r(0x300 | A); }
-
-static void movx_a_xr0(void) { A = ext_r(R0); }
-static void movx_a_xr1(void) { A = ext_r(R1); }
-static void movx_xr0_a(void) { ext_w(R0, A); }
-static void movx_xr1_a(void) { ext_w(R1, A); }
-
-static void nop(void) { }
-
-static void orl_a_r0(void) { A |= R0; }
-static void orl_a_r1(void) { A |= R1; }
-static void orl_a_r2(void) { A |= R2; }
-static void orl_a_r3(void) { A |= R3; }
-static void orl_a_r4(void) { A |= R4; }
-static void orl_a_r5(void) { A |= R5; }
-static void orl_a_r6(void) { A |= R6; }
-static void orl_a_r7(void) { A |= R7; }
-static void orl_a_xr0(void) { A |= ram_r(R0); }
-static void orl_a_xr1(void) { A |= ram_r(R1); }
-static void orl_a_n(void) { A |= argument_fetch(PC++); }
-static void orl_bus_n(void) { bus_w(bus_r() | argument_fetch(PC++)); }
-static void orl_p1_n(void) { port_w(1, mcs48.p1 |= argument_fetch(PC++)); }
-static void orl_p2_n(void) { port_w(2, mcs48.p2 |= argument_fetch(PC++)); }
-static void orld_p4_a(void) { port_w(4, port_r(4) | A); }
-static void orld_p5_a(void) { port_w(5, port_r(5) | A); }
-static void orld_p6_a(void) { port_w(6, port_r(6) | A); }
-static void orld_p7_a(void) { port_w(7, port_r(7) | A); }
-
-static void outl_bus_a(void) { bus_w(A); }
-static void outl_p1_a(void) { port_w(1, mcs48.p1 = A); }
-static void outl_p2_a(void) { port_w(2, mcs48.p2 = A); }
-static void ret(void) { pull_pc(); }
-
-static void retr(void)
+OPHANDLER( in_a_p1 ) { A = port_r(1) & mcs48->p1; }
+OPHANDLER( in_a_p2 ) { A = port_r(2) & mcs48->p2; }
+OPHANDLER( ins_a_bus ) { A = bus_r(); }
+
+OPHANDLER( inc_a ) { A++; }
+OPHANDLER( inc_r0 ) { R0++; }
+OPHANDLER( inc_r1 ) { R1++; }
+OPHANDLER( inc_r2 ) { R2++; }
+OPHANDLER( inc_r3 ) { R3++; }
+OPHANDLER( inc_r4 ) { R4++; }
+OPHANDLER( inc_r5 ) { R5++; }
+OPHANDLER( inc_r6 ) { R6++; }
+OPHANDLER( inc_r7 ) { R7++; }
+OPHANDLER( inc_xr0 ) { ram_w(R0, ram_r(R0) + 1); }
+OPHANDLER( inc_xr1 ) { ram_w(R1, ram_r(R1) + 1); }
+
+OPHANDLER( jb_0 ) { execute_jcc(mcs48, (A & 0x01) != 0); }
+OPHANDLER( jb_1 ) { execute_jcc(mcs48, (A & 0x02) != 0); }
+OPHANDLER( jb_2 ) { execute_jcc(mcs48, (A & 0x04) != 0); }
+OPHANDLER( jb_3 ) { execute_jcc(mcs48, (A & 0x08) != 0); }
+OPHANDLER( jb_4 ) { execute_jcc(mcs48, (A & 0x10) != 0); }
+OPHANDLER( jb_5 ) { execute_jcc(mcs48, (A & 0x20) != 0); }
+OPHANDLER( jb_6 ) { execute_jcc(mcs48, (A & 0x40) != 0); }
+OPHANDLER( jb_7 ) { execute_jcc(mcs48, (A & 0x80) != 0); }
+OPHANDLER( jc ) { execute_jcc(mcs48, (PSW & C_FLAG) != 0); }
+OPHANDLER( jf0 ) { execute_jcc(mcs48, (PSW & F_FLAG) != 0); }
+OPHANDLER( jf1 ) { execute_jcc(mcs48, mcs48->f1 != 0); }
+
+OPHANDLER( jmp_0 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x000); }
+OPHANDLER( jmp_1 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x100); }
+OPHANDLER( jmp_2 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x200); }
+OPHANDLER( jmp_3 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x300); }
+OPHANDLER( jmp_4 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x400); }
+OPHANDLER( jmp_5 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x500); }
+OPHANDLER( jmp_6 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x600); }
+OPHANDLER( jmp_7 ) { execute_jmp(mcs48, argument_fetch(PC) | 0x700); }
+OPHANDLER( jmpp_xa ) { PC &= 0xf00; PC |= program_r(PC | A); change_pc(PC); }
+
+OPHANDLER( jnc ) { execute_jcc(mcs48, (PSW & C_FLAG) == 0); }
+OPHANDLER( jni ) { execute_jcc(mcs48, mcs48->irq_state != 0); }
+OPHANDLER( jnt_0 ) { execute_jcc(mcs48, test_r(0) == 0); }
+OPHANDLER( jnt_1 ) { execute_jcc(mcs48, test_r(1) == 0); }
+OPHANDLER( jnz ) { execute_jcc(mcs48, A != 0); }
+OPHANDLER( jtf ) { execute_jcc(mcs48, mcs48->timer_flag); mcs48->timer_flag = FALSE; }
+OPHANDLER( jt_0 ) { execute_jcc(mcs48, test_r(0) != 0); }
+OPHANDLER( jt_1 ) { execute_jcc(mcs48, test_r(1) != 0); }
+OPHANDLER( jz ) { execute_jcc(mcs48, A == 0); }
+
+OPHANDLER( mov_a_n ) { A = argument_fetch(PC++); }
+OPHANDLER( mov_a_psw ) { A = PSW; }
+OPHANDLER( mov_a_r0 ) { A = R0; }
+OPHANDLER( mov_a_r1 ) { A = R1; }
+OPHANDLER( mov_a_r2 ) { A = R2; }
+OPHANDLER( mov_a_r3 ) { A = R3; }
+OPHANDLER( mov_a_r4 ) { A = R4; }
+OPHANDLER( mov_a_r5 ) { A = R5; }
+OPHANDLER( mov_a_r6 ) { A = R6; }
+OPHANDLER( mov_a_r7 ) { A = R7; }
+OPHANDLER( mov_a_xr0 ) { A = ram_r(R0); }
+OPHANDLER( mov_a_xr1 ) { A = ram_r(R1); }
+OPHANDLER( mov_a_t ) { A = mcs48->timer; }
+
+OPHANDLER( mov_psw_a ) { PSW = A; update_regptr(mcs48); }
+OPHANDLER( mov_r0_a ) { R0 = A; }
+OPHANDLER( mov_r1_a ) { R1 = A; }
+OPHANDLER( mov_r2_a ) { R2 = A; }
+OPHANDLER( mov_r3_a ) { R3 = A; }
+OPHANDLER( mov_r4_a ) { R4 = A; }
+OPHANDLER( mov_r5_a ) { R5 = A; }
+OPHANDLER( mov_r6_a ) { R6 = A; }
+OPHANDLER( mov_r7_a ) { R7 = A; }
+OPHANDLER( mov_r0_n ) { R0 = argument_fetch(PC++); }
+OPHANDLER( mov_r1_n ) { R1 = argument_fetch(PC++); }
+OPHANDLER( mov_r2_n ) { R2 = argument_fetch(PC++); }
+OPHANDLER( mov_r3_n ) { R3 = argument_fetch(PC++); }
+OPHANDLER( mov_r4_n ) { R4 = argument_fetch(PC++); }
+OPHANDLER( mov_r5_n ) { R5 = argument_fetch(PC++); }
+OPHANDLER( mov_r6_n ) { R6 = argument_fetch(PC++); }
+OPHANDLER( mov_r7_n ) { R7 = argument_fetch(PC++); }
+OPHANDLER( mov_t_a ) { mcs48->timer = A; }
+OPHANDLER( mov_xr0_a ) { ram_w(R0, A); }
+OPHANDLER( mov_xr1_a ) { ram_w(R1, A); }
+OPHANDLER( mov_xr0_n ) { ram_w(R0, argument_fetch(PC++)); }
+OPHANDLER( mov_xr1_n ) { ram_w(R1, argument_fetch(PC++)); }
+
+OPHANDLER( movd_a_p4 ) { A = port_r(4) & 0x0f; }
+OPHANDLER( movd_a_p5 ) { A = port_r(5) & 0x0f; }
+OPHANDLER( movd_a_p6 ) { A = port_r(6) & 0x0f; }
+OPHANDLER( movd_a_p7 ) { A = port_r(7) & 0x0f; }
+OPHANDLER( movd_p4_a ) { port_w(4, A & 0x0f); }
+OPHANDLER( movd_p5_a ) { port_w(5, A & 0x0f); }
+OPHANDLER( movd_p6_a ) { port_w(6, A & 0x0f); }
+OPHANDLER( movd_p7_a ) { port_w(7, A & 0x0f); }
+
+OPHANDLER( movp_a_xa ) { A = program_r((PC & 0xf00) | A); }
+OPHANDLER( movp3_a_xa ) { A = program_r(0x300 | A); }
+
+OPHANDLER( movx_a_xr0 ) { A = ext_r(R0); }
+OPHANDLER( movx_a_xr1 ) { A = ext_r(R1); }
+OPHANDLER( movx_xr0_a ) { ext_w(R0, A); }
+OPHANDLER( movx_xr1_a ) { ext_w(R1, A); }
+
+OPHANDLER( nop ) { }
+
+OPHANDLER( orl_a_r0 ) { A |= R0; }
+OPHANDLER( orl_a_r1 ) { A |= R1; }
+OPHANDLER( orl_a_r2 ) { A |= R2; }
+OPHANDLER( orl_a_r3 ) { A |= R3; }
+OPHANDLER( orl_a_r4 ) { A |= R4; }
+OPHANDLER( orl_a_r5 ) { A |= R5; }
+OPHANDLER( orl_a_r6 ) { A |= R6; }
+OPHANDLER( orl_a_r7 ) { A |= R7; }
+OPHANDLER( orl_a_xr0 ) { A |= ram_r(R0); }
+OPHANDLER( orl_a_xr1 ) { A |= ram_r(R1); }
+OPHANDLER( orl_a_n ) { A |= argument_fetch(PC++); }
+OPHANDLER( orl_bus_n ) { bus_w(bus_r() | argument_fetch(PC++)); }
+OPHANDLER( orl_p1_n ) { port_w(1, mcs48->p1 |= argument_fetch(PC++)); }
+OPHANDLER( orl_p2_n ) { port_w(2, mcs48->p2 |= argument_fetch(PC++)); }
+OPHANDLER( orld_p4_a ) { port_w(4, port_r(4) | A); }
+OPHANDLER( orld_p5_a ) { port_w(5, port_r(5) | A); }
+OPHANDLER( orld_p6_a ) { port_w(6, port_r(6) | A); }
+OPHANDLER( orld_p7_a ) { port_w(7, port_r(7) | A); }
+
+OPHANDLER( outl_bus_a ) { bus_w(A); }
+OPHANDLER( outl_p1_a ) { port_w(1, mcs48->p1 = A); }
+OPHANDLER( outl_p2_a ) { port_w(2, mcs48->p2 = A); }
+OPHANDLER( ret ) { pull_pc(mcs48); }
+
+OPHANDLER( retr )
{
- pull_pc_psw();
+ pull_pc_psw(mcs48);
/* implicitly clear the IRQ in progress flip flop and re-check interrupts */
- mcs48.irq_in_progress = FALSE;
- check_irqs();
+ mcs48->irq_in_progress = FALSE;
+ check_irqs(mcs48);
}
-static void rl_a(void) { A = (A << 1) | (A >> 7); }
-static void rlc_a(void) { UINT8 newc = A & C_FLAG; A = (A << 1) | (PSW >> 7); PSW = (PSW & ~C_FLAG) | newc; }
+OPHANDLER( rl_a ) { A = (A << 1) | (A >> 7); }
+OPHANDLER( rlc_a ) { UINT8 newc = A & C_FLAG; A = (A << 1) | (PSW >> 7); PSW = (PSW & ~C_FLAG) | newc; }
-static void rr_a(void) { A = (A >> 1) | (A << 7); }
-static void rrc_a(void) { UINT8 newc = (A << 7) & C_FLAG; A = (A >> 1) | (PSW & C_FLAG); PSW = (PSW & ~C_FLAG) | newc; }
+OPHANDLER( rr_a ) { A = (A >> 1) | (A << 7); }
+OPHANDLER( rrc_a ) { UINT8 newc = (A << 7) & C_FLAG; A = (A >> 1) | (PSW & C_FLAG); PSW = (PSW & ~C_FLAG) | newc; }
-static void sel_mb0(void) { mcs48.a11 = 0x000; }
-static void sel_mb1(void) { mcs48.a11 = 0x800; }
+OPHANDLER( sel_mb0 ) { mcs48->a11 = 0x000; }
+OPHANDLER( sel_mb1 ) { mcs48->a11 = 0x800; }
-static void sel_rb0(void) { PSW &= ~B_FLAG; update_regptr(); }
-static void sel_rb1(void) { PSW |= B_FLAG; update_regptr(); }
+OPHANDLER( sel_rb0 ) { PSW &= ~B_FLAG; update_regptr(mcs48); }
+OPHANDLER( sel_rb1 ) { PSW |= B_FLAG; update_regptr(mcs48); }
-static void stop_tcnt(void) { mcs48.timecount_enabled = 0; }
+OPHANDLER( stop_tcnt ) { mcs48->timecount_enabled = 0; }
-static void strt_cnt(void) { mcs48.timecount_enabled = COUNTER_ENABLED; mcs48.t1_history = test_r(1); }
-static void strt_t(void) { mcs48.timecount_enabled = TIMER_ENABLED; mcs48.prescaler = 0; }
+OPHANDLER( strt_cnt ) { mcs48->timecount_enabled = COUNTER_ENABLED; mcs48->t1_history = test_r(1); }
+OPHANDLER( strt_t ) { mcs48->timecount_enabled = TIMER_ENABLED; mcs48->prescaler = 0; }
-static void swap_a(void) { A = (A << 4) | (A >> 4); }
+OPHANDLER( swap_a ) { A = (A << 4) | (A >> 4); }
-static void xch_a_r0(void) { UINT8 tmp = A; A = R0; R0 = tmp; }
-static void xch_a_r1(void) { UINT8 tmp = A; A = R1; R1 = tmp; }
-static void xch_a_r2(void) { UINT8 tmp = A; A = R2; R2 = tmp; }
-static void xch_a_r3(void) { UINT8 tmp = A; A = R3; R3 = tmp; }
-static void xch_a_r4(void) { UINT8 tmp = A; A = R4; R4 = tmp; }
-static void xch_a_r5(void) { UINT8 tmp = A; A = R5; R5 = tmp; }
-static void xch_a_r6(void) { UINT8 tmp = A; A = R6; R6 = tmp; }
-static void xch_a_r7(void) { UINT8 tmp = A; A = R7; R7 = tmp; }
-static void xch_a_xr0(void) { UINT8 tmp = A; A = ram_r(R0); ram_w(R0, tmp); }
-static void xch_a_xr1(void) { UINT8 tmp = A; A = ram_r(R1); ram_w(R1, tmp); }
+OPHANDLER( xch_a_r0 ) { UINT8 tmp = A; A = R0; R0 = tmp; }
+OPHANDLER( xch_a_r1 ) { UINT8 tmp = A; A = R1; R1 = tmp; }
+OPHANDLER( xch_a_r2 ) { UINT8 tmp = A; A = R2; R2 = tmp; }
+OPHANDLER( xch_a_r3 ) { UINT8 tmp = A; A = R3; R3 = tmp; }
+OPHANDLER( xch_a_r4 ) { UINT8 tmp = A; A = R4; R4 = tmp; }
+OPHANDLER( xch_a_r5 ) { UINT8 tmp = A; A = R5; R5 = tmp; }
+OPHANDLER( xch_a_r6 ) { UINT8 tmp = A; A = R6; R6 = tmp; }
+OPHANDLER( xch_a_r7 ) { UINT8 tmp = A; A = R7; R7 = tmp; }
+OPHANDLER( xch_a_xr0 ) { UINT8 tmp = A; A = ram_r(R0); ram_w(R0, tmp); }
+OPHANDLER( xch_a_xr1 ) { UINT8 tmp = A; A = ram_r(R1); ram_w(R1, tmp); }
-static void xchd_a_xr0(void) { UINT8 oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (A & 0x0f)); A = (A & 0xf0) | (oldram & 0x0f); }
-static void xchd_a_xr1(void) { UINT8 oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (A & 0x0f)); A = (A & 0xf0) | (oldram & 0x0f); }
+OPHANDLER( xchd_a_xr0 ) { UINT8 oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (A & 0x0f)); A = (A & 0xf0) | (oldram & 0x0f); }
+OPHANDLER( xchd_a_xr1 ) { UINT8 oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (A & 0x0f)); A = (A & 0xf0) | (oldram & 0x0f); }
-static void xrl_a_r0(void) { A ^= R0; }
-static void xrl_a_r1(void) { A ^= R1; }
-static void xrl_a_r2(void) { A ^= R2; }
-static void xrl_a_r3(void) { A ^= R3; }
-static void xrl_a_r4(void) { A ^= R4; }
-static void xrl_a_r5(void) { A ^= R5; }
-static void xrl_a_r6(void) { A ^= R6; }
-static void xrl_a_r7(void) { A ^= R7; }
-static void xrl_a_xr0(void) { A ^= ram_r(R0); }
-static void xrl_a_xr1(void) { A ^= ram_r(R1); }
-static void xrl_a_n(void) { A ^= argument_fetch(PC++); }
+OPHANDLER( xrl_a_r0 ) { A ^= R0; }
+OPHANDLER( xrl_a_r1 ) { A ^= R1; }
+OPHANDLER( xrl_a_r2 ) { A ^= R2; }
+OPHANDLER( xrl_a_r3 ) { A ^= R3; }
+OPHANDLER( xrl_a_r4 ) { A ^= R4; }
+OPHANDLER( xrl_a_r5 ) { A ^= R5; }
+OPHANDLER( xrl_a_r6 ) { A ^= R6; }
+OPHANDLER( xrl_a_r7 ) { A ^= R7; }
+OPHANDLER( xrl_a_xr0 ) { A ^= ram_r(R0); }
+OPHANDLER( xrl_a_xr1 ) { A ^= ram_r(R1); }
+OPHANDLER( xrl_a_n ) { A ^= argument_fetch(PC++); }
@@ -701,7 +702,12 @@ static const mcs48_opcode opcode_table[256]=
static void mcs48_init(int index, int clock, const void *config, int (*irqcallback)(int), UINT16 romsize)
{
- memset(&mcs48, 0, sizeof(mcs48));
+ mcs48_state *mcs48;
+
+ token = auto_malloc(sizeof(*mcs48));
+ mcs48 = token;
+
+ memset(mcs48, 0, sizeof(*mcs48));
/* External access line
* EA=1 : read from external rom
@@ -709,30 +715,30 @@ static void mcs48_init(int index, int clock, const void *config, int (*irqcallba
*/
/* FIXME: Current implementation suboptimal */
- mcs48.ea = (romsize ? 0 : 1);
+ mcs48->ea = (romsize ? 0 : 1);
- mcs48.irq_callback = irqcallback;
- mcs48.int_rom_size = romsize;
+ mcs48->irq_callback = irqcallback;
+ mcs48->int_rom_size = romsize;
- state_save_register_item("mcs48", index, mcs48.prevpc.w.l);
+ state_save_register_item("mcs48", index, mcs48->prevpc.w.l);
state_save_register_item("mcs48", index, PC);
state_save_register_item("mcs48", index, A);
state_save_register_item("mcs48", index, PSW);
- state_save_register_item("mcs48", index, mcs48.p1);
- state_save_register_item("mcs48", index, mcs48.p2);
- state_save_register_item("mcs48", index, mcs48.f1);
- state_save_register_item("mcs48", index, mcs48.ea);
- state_save_register_item("mcs48", index, mcs48.timer);
- state_save_register_item("mcs48", index, mcs48.prescaler);
- state_save_register_item("mcs48", index, mcs48.t1_history);
- state_save_register_item("mcs48", index, mcs48.irq_state);
- state_save_register_item("mcs48", index, mcs48.irq_in_progress);
- state_save_register_item("mcs48", index, mcs48.timer_overflow);
- state_save_register_item("mcs48", index, mcs48.timer_flag);
- state_save_register_item("mcs48", index, mcs48.tirq_enabled);
- state_save_register_item("mcs48", index, mcs48.xirq_enabled);
- state_save_register_item("mcs48", index, mcs48.timecount_enabled);
- state_save_register_item("mcs48", index, mcs48.a11);
+ state_save_register_item("mcs48", index, mcs48->p1);
+ state_save_register_item("mcs48", index, mcs48->p2);
+ state_save_register_item("mcs48", index, mcs48->f1);
+ state_save_register_item("mcs48", index, mcs48->ea);
+ state_save_register_item("mcs48", index, mcs48->timer);
+ state_save_register_item("mcs48", index, mcs48->prescaler);
+ state_save_register_item("mcs48", index, mcs48->t1_history);
+ state_save_register_item("mcs48", index, mcs48->irq_state);
+ state_save_register_item("mcs48", index, mcs48->irq_in_progress);
+ state_save_register_item("mcs48", index, mcs48->timer_overflow);
+ state_save_register_item("mcs48", index, mcs48->timer_flag);
+ state_save_register_item("mcs48", index, mcs48->tirq_enabled);
+ state_save_register_item("mcs48", index, mcs48->xirq_enabled);
+ state_save_register_item("mcs48", index, mcs48->timecount_enabled);
+ state_save_register_item("mcs48", index, mcs48->a11);
}
@@ -798,24 +804,26 @@ static void i8049_init(int index, int clock, const void *config, int (*irqcallba
static void mcs48_reset(void)
{
+ mcs48_state *mcs48 = token;
+
/* confirmed from reset description */
PC = 0;
PSW = (PSW & (C_FLAG | A_FLAG)) | 0x08;
- mcs48.a11 = 0x000;
+ mcs48->a11 = 0x000;
bus_w(0xff);
- mcs48.p1 = 0xff;
- mcs48.p2 = 0xff;
- port_w(1, mcs48.p1);
- port_w(2, mcs48.p2);
- mcs48.tirq_enabled = FALSE;
- mcs48.xirq_enabled = FALSE;
- mcs48.timecount_enabled = 0;
- mcs48.timer_flag = FALSE;
- mcs48.f1 = 0;
+ mcs48->p1 = 0xff;
+ mcs48->p2 = 0xff;
+ port_w(1, mcs48->p1);
+ port_w(2, mcs48->p2);
+ mcs48->tirq_enabled = FALSE;
+ mcs48->xirq_enabled = FALSE;
+ mcs48->timecount_enabled = 0;
+ mcs48->timer_flag = FALSE;
+ mcs48->f1 = 0;
/* confirmed from interrupt logic description */
- mcs48.irq_in_progress = FALSE;
- mcs48.timer_overflow = FALSE;
+ mcs48->irq_in_progress = FALSE;
+ mcs48->timer_overflow = FALSE;
}
@@ -828,41 +836,41 @@ static void mcs48_reset(void)
check_irqs - check for and process IRQs
-------------------------------------------------*/
-static void check_irqs(void)
+static void check_irqs(mcs48_state *mcs48)
{
/* if something is in progress, we do nothing */
- if (mcs48.irq_in_progress)
+ if (mcs48->irq_in_progress)
return;
/* external interrupts take priority */
- if (mcs48.irq_state && mcs48.xirq_enabled)
+ if (mcs48->irq_state && mcs48->xirq_enabled)
{
- mcs48.irq_in_progress = TRUE;
+ mcs48->irq_in_progress = TRUE;
/* transfer to location 0x03 */
- push_pc_psw();
+ push_pc_psw(mcs48);
PC = 0x03;
change_pc(0x03);
- mcs48.inst_cycles += 2;
+ mcs48->inst_cycles += 2;
/* indicate we took the external IRQ */
- if (mcs48.irq_callback != NULL)
- (*mcs48.irq_callback)(0);
+ if (mcs48->irq_callback != NULL)
+ (*mcs48->irq_callback)(0);
}
/* timer overflow interrupts follow */
- if (mcs48.timer_overflow && mcs48.tirq_enabled)
+ if (mcs48->timer_overflow && mcs48->tirq_enabled)
{
- mcs48.irq_in_progress = TRUE;
+ mcs48->irq_in_progress = TRUE;
/* transfer to location 0x07 */
- push_pc_psw();
+ push_pc_psw(mcs48);
PC = 0x07;
change_pc(0x07);
- mcs48.inst_cycles += 2;
+ mcs48->inst_cycles += 2;
/* timer overflow flip-flop is reset once taken */
- mcs48.timer_overflow = FALSE;
+ mcs48->timer_overflow = FALSE;
}
}
@@ -872,39 +880,39 @@ static void check_irqs(void)
and counters
-------------------------------------------------*/
-static void burn_cycles(int count)
+static void burn_cycles(mcs48_state *mcs48, int count)
{
int timerover = FALSE;
/* if the timer is enabled, accumulate prescaler cycles */
- if (mcs48.timecount_enabled & TIMER_ENABLED)
+ if (mcs48->timecount_enabled & TIMER_ENABLED)
{
- UINT8 oldtimer = mcs48.timer;
- mcs48.prescaler += count;
- mcs48.timer += mcs48.prescaler >> 5;
- mcs48.prescaler &= 0x1f;
- timerover = (oldtimer != 0 && mcs48.timer == 0);
+ UINT8 oldtimer = mcs48->timer;
+ mcs48->prescaler += count;
+ mcs48->timer += mcs48->prescaler >> 5;
+ mcs48->prescaler &= 0x1f;
+ timerover = (oldtimer != 0 && mcs48->timer == 0);
}
/* if the counter is enabled, poll the T1 test input once for each cycle */
- else if (mcs48.timecount_enabled & COUNTER_ENABLED)
+ else if (mcs48->timecount_enabled & COUNTER_ENABLED)
for ( ; count > 0; count--)
{
- mcs48.t1_history = (mcs48.t1_history << 1) | (test_r(1) & 1);
- if ((mcs48.t1_history & 3) == 2)
- timerover = (++mcs48.timer == 0);
+ mcs48->t1_history = (mcs48->t1_history << 1) | (test_r(1) & 1);
+ if ((mcs48->t1_history & 3) == 2)
+ timerover = (++mcs48->timer == 0);
}
/* if either source caused a timer overflow, set the flags and check IRQs */
if (timerover)
{
- mcs48.timer_flag = TRUE;
+ mcs48->timer_flag = TRUE;
/* according to the docs, if an overflow occurs with interrupts disabled, the overflow is not stored */
- if (mcs48.tirq_enabled)
+ if (mcs48->tirq_enabled)
{
- mcs48.timer_overflow = TRUE;
- check_irqs();
+ mcs48->timer_overflow = TRUE;
+ check_irqs(mcs48);
}
}
}
@@ -917,37 +925,38 @@ static void burn_cycles(int count)
static int mcs48_execute(int cycles)
{
+ mcs48_state *mcs48 = token;
unsigned opcode;
- mcs48_icount = cycles;
+ mcs48->icount = cycles;
/* external interrupts may have been set since we last checked */
- mcs48.inst_cycles = 0;
- check_irqs();
- mcs48_icount -= mcs48.inst_cycles;
- if (mcs48.timecount_enabled != 0)
- burn_cycles(mcs48.inst_cycles);
+ mcs48->inst_cycles = 0;
+ check_irqs(mcs48);
+ mcs48->icount -= mcs48->inst_cycles;
+ if (mcs48->timecount_enabled != 0)
+ burn_cycles(mcs48, mcs48->inst_cycles);
/* iterate over remaining cycles, guaranteeing at least one instruction */
do
{
/* fetch next opcode */
- mcs48.prevpc = mcs48.pc;
+ mcs48->prevpc = mcs48->pc;
debugger_instruction_hook(Machine, PC);
opcode = opcode_fetch(PC++);
/* process opcode and count cycles */
- mcs48.inst_cycles = opcode_table[opcode].cycles;
- (*opcode_table[opcode].function)();
+ mcs48->inst_cycles = opcode_table[opcode].cycles;
+ (*opcode_table[opcode].function)(mcs48);
/* burn the cycles */
- mcs48_icount -= mcs48.inst_cycles;
- if (mcs48.timecount_enabled != 0)
- burn_cycles(mcs48.inst_cycles);
+ mcs48->icount -= mcs48->inst_cycles;
+ if (mcs48->timecount_enabled != 0)
+ burn_cycles(mcs48, mcs48->inst_cycles);
- } while (mcs48_icount > 0);
+ } while (mcs48->icount > 0);
- return cycles - mcs48_icount;
+ return cycles - mcs48->icount;
}
@@ -986,8 +995,8 @@ ADDRESS_MAP_END
static void mcs48_get_context(void *dst)
{
- if (dst != NULL)
- *(mcs48_regs *)dst = mcs48;
+ if( dst )
+ *(void **)dst = token;
}
@@ -998,15 +1007,14 @@ static void mcs48_get_context(void *dst)
static void mcs48_set_context(void *src)
{
- if (src != NULL)
- {
- mcs48 = *(mcs48_regs *)src;
- update_regptr();
- change_pc(PC);
- }
+ mcs48_state *mcs48;
+ if( src )
+ token = *(void **)src;
+ mcs48 = token;
+ update_regptr(mcs48);
+ change_pc(PC);
}
-
/*-------------------------------------------------
mcs48_set_info - set a piece of information
on the CPU core
@@ -1014,20 +1022,22 @@ static void mcs48_set_context(void *src)
static void mcs48_set_info(UINT32 state, cpuinfo *info)
{
+ mcs48_state *mcs48 = token;
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: mcs48.irq_state = (info->i != CLEAR_LINE); break;
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: mcs48.ea = (info->i != CLEAR_LINE); break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: mcs48->irq_state = (info->i != CLEAR_LINE); break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: mcs48->ea = (info->i != CLEAR_LINE); break;
case CPUINFO_INT_PC:
case CPUINFO_INT_REGISTER + MCS48_PC: PC = info->i; break;
case CPUINFO_INT_SP:
case CPUINFO_INT_REGISTER + MCS48_PSW: PSW = info->i; break;
case CPUINFO_INT_REGISTER + MCS48_A: A = info->i; break;
- case CPUINFO_INT_REGISTER + MCS48_TC: mcs48.timer = info->i; break;
- case CPUINFO_INT_REGISTER + MCS48_P1: mcs48.p1 = info->i; break;
- case CPUINFO_INT_REGISTER + MCS48_P2: mcs48.p2 = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS48_TC: mcs48->timer = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS48_P1: mcs48->p1 = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS48_P2: mcs48->p2 = info->i; break;
case CPUINFO_INT_REGISTER + MCS48_R0: R0 = info->i; break;
case CPUINFO_INT_REGISTER + MCS48_R1: R1 = info->i; break;
case CPUINFO_INT_REGISTER + MCS48_R2: R2 = info->i; break;
@@ -1036,7 +1046,7 @@ static void mcs48_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MCS48_R5: R5 = info->i; break;
case CPUINFO_INT_REGISTER + MCS48_R6: R6 = info->i; break;
case CPUINFO_INT_REGISTER + MCS48_R7: R7 = info->i; break;
- case CPUINFO_INT_REGISTER + MCS48_EA: mcs48.ea = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS48_EA: mcs48->ea = info->i; break;
}
}
@@ -1048,6 +1058,8 @@ static void mcs48_set_info(UINT32 state, cpuinfo *info)
static void mcs48_get_info(UINT32 state, cpuinfo *info)
{
+ mcs48_state *mcs48 = token;
+
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@@ -1072,18 +1084,18 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = mcs48.irq_state ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = mcs48.ea; break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = mcs48->irq_state ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = mcs48->ea; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = mcs48.prevpc.w.l; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = mcs48->prevpc.w.l; break;
case CPUINFO_INT_PC:
case CPUINFO_INT_REGISTER + MCS48_PC: info->i = PC; break;
case CPUINFO_INT_REGISTER + MCS48_PSW: info->i = PSW; break;
case CPUINFO_INT_REGISTER + MCS48_A: info->i = A; break;
- case CPUINFO_INT_REGISTER + MCS48_TC: info->i = mcs48.timer; break;
- case CPUINFO_INT_REGISTER + MCS48_P1: info->i = mcs48.p1; break;
- case CPUINFO_INT_REGISTER + MCS48_P2: info->i = mcs48.p2; break;
+ case CPUINFO_INT_REGISTER + MCS48_TC: info->i = mcs48->timer; break;
+ case CPUINFO_INT_REGISTER + MCS48_P1: info->i = mcs48->p1; break;
+ case CPUINFO_INT_REGISTER + MCS48_P2: info->i = mcs48->p2; break;
case CPUINFO_INT_REGISTER + MCS48_R0: info->i = R0; break;
case CPUINFO_INT_REGISTER + MCS48_R1: info->i = R1; break;
case CPUINFO_INT_REGISTER + MCS48_R2: info->i = R2; break;
@@ -1092,7 +1104,7 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MCS48_R5: info->i = R5; break;
case CPUINFO_INT_REGISTER + MCS48_R6: info->i = R6; break;
case CPUINFO_INT_REGISTER + MCS48_R7: info->i = R7; break;
- case CPUINFO_INT_REGISTER + MCS48_EA: info->i = mcs48.ea; break;
+ case CPUINFO_INT_REGISTER + MCS48_EA: info->i = mcs48->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_SET_INFO: info->setinfo = mcs48_set_info; break;
@@ -1103,7 +1115,7 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_EXECUTE: info->execute = mcs48_execute; break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mcs48_dasm; break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs48_icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs48->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: /*info->internal_map8 = address_map_program_10bit;*/ break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: /*info->internal_map8 = address_map_data_7bit;*/ break;
@@ -1117,8 +1129,8 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c %c%c%c%c%c%c%c%c",
- mcs48.irq_state ? 'I':'.',
- mcs48.a11 ? 'M':'.',
+ mcs48->irq_state ? 'I':'.',
+ mcs48->a11 ? 'M':'.',
PSW & 0x80 ? 'C':'.',
PSW & 0x40 ? 'A':'.',
PSW & 0x20 ? 'F':'.',
@@ -1132,9 +1144,9 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + MCS48_PC: sprintf(info->s, "PC:%04X", PC); break;
case CPUINFO_STR_REGISTER + MCS48_PSW: sprintf(info->s, "PSW:%02X", PSW); break;
case CPUINFO_STR_REGISTER + MCS48_A: sprintf(info->s, "A:%02X", A); break;
- case CPUINFO_STR_REGISTER + MCS48_TC: sprintf(info->s, "TC:%02X", mcs48.timer); break;
- case CPUINFO_STR_REGISTER + MCS48_P1: sprintf(info->s, "P1:%02X", mcs48.p1); break;
- case CPUINFO_STR_REGISTER + MCS48_P2: sprintf(info->s, "P2:%02X", mcs48.p2); break;
+ case CPUINFO_STR_REGISTER + MCS48_TC: sprintf(info->s, "TC:%02X", mcs48->timer); break;
+ case CPUINFO_STR_REGISTER + MCS48_P1: sprintf(info->s, "P1:%02X", mcs48->p1); break;
+ case CPUINFO_STR_REGISTER + MCS48_P2: sprintf(info->s, "P2:%02X", mcs48->p2); break;
case CPUINFO_STR_REGISTER + MCS48_R0: sprintf(info->s, "R0:%02X", R0); break;
case CPUINFO_STR_REGISTER + MCS48_R1: sprintf(info->s, "R1:%02X", R1); break;
case CPUINFO_STR_REGISTER + MCS48_R2: sprintf(info->s, "R2:%02X", R2); break;
@@ -1143,7 +1155,7 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + MCS48_R5: sprintf(info->s, "R5:%02X", R5); break;
case CPUINFO_STR_REGISTER + MCS48_R6: sprintf(info->s, "R6:%02X", R6); break;
case CPUINFO_STR_REGISTER + MCS48_R7: sprintf(info->s, "R7:%02X", R7); break;
- case CPUINFO_STR_REGISTER + MCS48_EA: sprintf(info->s, "EA:%02X", mcs48.ea); break;
+ case CPUINFO_STR_REGISTER + MCS48_EA: sprintf(info->s, "EA:%02X", mcs48->ea); break;
}
}