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author AJR <ajrhacker@users.noreply.github.com>2019-12-03 15:31:02 -0500
committer AJR <ajrhacker@users.noreply.github.com>2019-12-03 15:31:02 -0500
commit88238e2d61a5a454a890fa69765df79b27586b74 (patch)
tree61cea36ba5bae9505b6a818daa1cf7ee2d9ee627 /src
parent02d79dc8829638a6cba7404e3745bfb902aa182f (diff)
dp8344: Disable side effects with certain opcodes; implement halt on reset (nw)
Diffstat (limited to 'src')
-rw-r--r--src/devices/cpu/bcp/dp8344.cpp78
-rw-r--r--src/devices/cpu/bcp/dp8344.h6
-rw-r--r--src/mame/drivers/is48x.cpp1
3 files changed, 47 insertions, 38 deletions
diff --git a/src/devices/cpu/bcp/dp8344.cpp b/src/devices/cpu/bcp/dp8344.cpp
index d890ba603ae..819981a58ec 100644
--- a/src/devices/cpu/bcp/dp8344.cpp
+++ b/src/devices/cpu/bcp/dp8344.cpp
@@ -305,6 +305,8 @@ void dp8344_device::device_reset()
// Reset Remote Interface Configuration Register
m_ric = m_auto_start ? 0x03 : 0x01;
m_hib = false;
+ if (!m_auto_start)
+ suspend(SUSPEND_REASON_HALT, true);
// Reset execution state
m_nmi_pending = false;
@@ -799,13 +801,12 @@ void dp8344_device::data_stack_push(u8 data)
u8 dp8344_device::data_stack_pop()
{
+ // TBD: do test instructions (BIT, CMP, JRMK, etc.) suppress side effects as with RTR and ECR?
m_dsp = (m_dsp - 1) & 0xf;
return m_ds[m_dsp];
}
-
-
//**************************************************************************
// TRANSCEIVER OPERATION
//**************************************************************************
@@ -943,16 +944,20 @@ void dp8344_device::receive_fifo_push(u8 data)
// receive_fifo_pop - read from RTR
//-------------------------------------------------
-u8 dp8344_device::receive_fifo_pop()
+u8 dp8344_device::receive_fifo_pop(bool test)
{
- // Clear Receive FIFO Full, DEME, Auto-Response and Poll/Acknowledge bits in NCF
- m_ncf &= 0xb0;
+ if (!test)
+ {
+ // Clear Receive FIFO Full, DEME, Auto-Response and Poll/Acknowledge bits in NCF
+ m_ncf &= 0xb0;
- // Clear Data Available flag in TSR
- m_tsr &= 0xf7;
- if ((m_icr & 0xc0) == 0xc0)
- set_receiver_interrupt(false);
+ // Clear Data Available flag in TSR
+ m_tsr &= 0xf7;
+ if ((m_icr & 0xc0) == 0xc0)
+ set_receiver_interrupt(false);
+ }
+ // TODO
return 0;
}
@@ -984,29 +989,32 @@ void dp8344_device::set_receiver_error(u8 code)
// get_error_code - read from ECR
//-------------------------------------------------
-u8 dp8344_device::get_error_code()
+u8 dp8344_device::get_error_code(bool test)
{
u8 code = m_ecr;
- // Clear Error Code Register and Receiver Error flag in NCF
- m_ecr = 0x00;
- m_ncf &= 0xdf;
-
- // Update interrupt status if RE interrupt selected
- switch (m_icr & 0xc0)
+ if (!test)
{
- case 0x00:
- // Interrupt on RFF
- set_receiver_interrupt(BIT(m_ncf, 6));
- break;
+ // Clear Error Code Register and Receiver Error flag in NCF
+ m_ecr = 0x00;
+ m_ncf &= 0xdf;
- case 0x40:
- // Interrupt on DAV
- set_receiver_interrupt(BIT(m_tsr, 3));
- break;
+ // Update interrupt status if RE interrupt selected
+ switch (m_icr & 0xc0)
+ {
+ case 0x00:
+ // Interrupt on RFF
+ set_receiver_interrupt(BIT(m_ncf, 6));
+ break;
- default:
- break;
+ case 0x40:
+ // Interrupt on DAV
+ set_receiver_interrupt(BIT(m_tsr, 3));
+ break;
+
+ default:
+ break;
+ }
}
return code;
@@ -1106,7 +1114,7 @@ void dp8344_device::clear_network_command_flag(u8 data)
// read_register - read from source register
//-------------------------------------------------
-u8 dp8344_device::read_register(unsigned reg)
+u8 dp8344_device::read_register(unsigned reg, bool test)
{
switch (reg)
{
@@ -1136,7 +1144,7 @@ u8 dp8344_device::read_register(unsigned reg)
case 4: // GP0 (main) or Receive/Transmit Register and/or Error Code Register (alternate)
if (m_bb)
- return BIT(m_tcr, 6) ? get_error_code() : receive_fifo_pop();
+ return BIT(m_tcr, 6) ? get_error_code(test) : receive_fifo_pop(test);
else
return m_gp_main[0];
@@ -1522,7 +1530,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
{
if (m_latched_instr < 0x8000)
{
- m_source_data = read_register(m_latched_instr & 0x000f);
+ m_source_data = read_register(m_latched_instr & 0x000f, (m_latched_instr & 0x7000) == 0x3000);
if ((m_latched_instr & 0xf000) == 0x1000)
{
// MOVE to indexed data memory
@@ -1538,7 +1546,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
else if ((m_latched_instr & 0xf800) == 0x8000)
{
// JRMK
- m_source_data = read_register(m_latched_instr & 0x001f);
+ m_source_data = read_register(m_latched_instr & 0x001f, true);
return TX1_JRMK;
}
else if ((m_latched_instr & 0xfc00) == 0x8800)
@@ -1551,7 +1559,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
else if ((m_latched_instr & 0xfc00) == 0x8c00)
{
// LJMP or LCALL, conditional
- m_source_data = read_register(m_latched_instr & 0x001f);
+ m_source_data = read_register(m_latched_instr & 0x001f, true);
instruction_wait();
return T2_ABSOLUTE;
}
@@ -1564,7 +1572,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
else if ((m_latched_instr >= 0xa000 && m_latched_instr < 0xae00) || (m_latched_instr & 0xfc00) == 0xc000)
{
if ((m_latched_instr & 0xfe00) != 0xc000)
- m_source_data = read_register(m_latched_instr & 0x001f);
+ m_source_data = read_register(m_latched_instr & 0x001f, false);
switch (m_latched_instr & 0x0180)
{
case 0x0000:
@@ -1619,7 +1627,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
{
// MOVE to or from accumulator-indexed data memory
if (BIT(m_latched_instr, 7))
- m_source_data = read_register(m_latched_instr & 0x001f);
+ m_source_data = read_register(m_latched_instr & 0x001f, false);
m_data_address = m_ir[(m_latched_instr & 0x0060) >> 5] + read_accumulator();
return BIT(m_latched_instr, 7) ? TX_WRITE : TX_READ;
}
@@ -1645,7 +1653,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
else if ((m_latched_instr & 0xff80) == 0xcd80)
{
// JMP, register-based
- m_source_data = read_register(m_latched_instr & 0x001f);
+ m_source_data = read_register(m_latched_instr & 0x001f, true);
return TX1_JMP;
}
else if ((m_latched_instr & 0xff00) == 0xce00)
@@ -1678,7 +1686,7 @@ dp8344_device::inst_state dp8344_device::decode_instruction()
}
else
{
- m_source_data = read_register(m_latched_instr & 0x001f);
+ m_source_data = read_register(m_latched_instr & 0x001f, false);
instruction_wait();
return T2_STORE;
}
diff --git a/src/devices/cpu/bcp/dp8344.h b/src/devices/cpu/bcp/dp8344.h
index b6561c13519..eca4c3e16d4 100644
--- a/src/devices/cpu/bcp/dp8344.h
+++ b/src/devices/cpu/bcp/dp8344.h
@@ -124,13 +124,13 @@ private:
void transmitter_idle();
void receiver_active();
void receive_fifo_push(u8 data);
- u8 receive_fifo_pop();
+ u8 receive_fifo_pop(bool test);
void set_receiver_error(u8 code);
- u8 get_error_code();
+ u8 get_error_code(bool test);
void set_transceiver_command(u8 data);
void set_transceiver_mode(u8 data);
void clear_network_command_flag(u8 data);
- u8 read_register(unsigned reg);
+ u8 read_register(unsigned reg, bool test);
u8 read_accumulator() const;
void write_register(unsigned reg, u8 data);
void prefetch_instruction();
diff --git a/src/mame/drivers/is48x.cpp b/src/mame/drivers/is48x.cpp
index 479517a8f4b..91af903542d 100644
--- a/src/mame/drivers/is48x.cpp
+++ b/src/mame/drivers/is48x.cpp
@@ -82,6 +82,7 @@ void is48x_state::is482(machine_config &config)
m_maincpu->set_addrmap(AS_IO, &is48x_state::io_map);
DP8344B(config, m_bcp, 18.867_MHz_XTAL); // DP8344BV
+ m_bcp->set_auto_start(false);
m_bcp->set_addrmap(AS_PROGRAM, &is48x_state::bcp_inst_map);
m_bcp->set_addrmap(AS_DATA, &is48x_state::bcp_data_map);