diff options
author | Lord-Nightmare <Lord-Nightmare@users.noreply.github.com> | 2016-04-04 20:16:23 -0400 |
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committer | Lord-Nightmare <Lord-Nightmare@users.noreply.github.com> | 2016-04-04 20:16:23 -0400 |
commit | 85e60eebcbdb2f5610ae84f3e7f227ca2bdfea17 (patch) | |
tree | 6c0fd3e1e9930ac4d75e47959c951719059ad537 /src | |
parent | 817f19fcc1d81454c294ac3de8da3e864ec24279 (diff) |
Major Havoc: Updated Gamma CPU address decoding/mirroring from the schematic [Lord Nightmare]
Diffstat (limited to 'src')
-rw-r--r-- | src/mame/drivers/mhavoc.cpp | 83 | ||||
-rw-r--r-- | src/mame/machine/mhavoc.cpp | 3 |
2 files changed, 61 insertions, 25 deletions
diff --git a/src/mame/drivers/mhavoc.cpp b/src/mame/drivers/mhavoc.cpp index 82ce05f008a..231742afebd 100644 --- a/src/mame/drivers/mhavoc.cpp +++ b/src/mame/drivers/mhavoc.cpp @@ -195,13 +195,21 @@ #include "machine/nvram.h" #include "includes/mhavoc.h" - +/* Quad pokey hookup (based on schematics): +Address: 543210 + |||||\- pokey A0 + ||||\-- pokey A1 + |||\--- pokey A2 + ||\---- pokey chip number LSB + |\----- pokey chip number MSB + \------ pokey A3 +*/ READ8_MEMBER(mhavoc_state::quad_pokeyn_r) { static const char *const devname[4] = { "pokey1", "pokey2", "pokey3", "pokey4" }; int pokey_num = (offset >> 3) & ~0x04; int control = (offset & 0x20) >> 2; - int pokey_reg = (offset % 8) | control; + int pokey_reg = (offset & 0x7) | control; pokey_device *pokey = machine().device<pokey_device>(devname[pokey_num]); return pokey->read(pokey_reg); @@ -212,7 +220,7 @@ WRITE8_MEMBER(mhavoc_state::quad_pokeyn_w) static const char *const devname[4] = { "pokey1", "pokey2", "pokey3", "pokey4" }; int pokey_num = (offset >> 3) & ~0x04; int control = (offset & 0x20) >> 2; - int pokey_reg = (offset % 8) | control; + int pokey_reg = (offset & 0x7) | control; pokey_device *pokey = machine().device<pokey_device>(devname[pokey_num]); pokey->write(pokey_reg, data); @@ -224,12 +232,19 @@ WRITE8_MEMBER(mhavoc_state::quad_pokeyn_w) * Alpha One: dual POKEY? * *************************************/ - +/* dual pokey hookup (presumably, based on the prototype code): +Address: 43210 + ||||\- pokey A0 + |||\-- pokey A1 + ||\--- pokey A2 + |\---- pokey chip number + \----- pokey A3 +*/ READ8_MEMBER(mhavoc_state::dual_pokey_r) { int pokey_num = (offset >> 3) & 0x01; int control = (offset & 0x10) >> 1; - int pokey_reg = (offset % 8) | control; + int pokey_reg = (offset & 0x7) | control; if (pokey_num == 0) return machine().device<pokey_device>("pokey1")->read(pokey_reg); @@ -242,7 +257,7 @@ WRITE8_MEMBER(mhavoc_state::dual_pokey_w) { int pokey_num = (offset >> 3) & 0x01; int control = (offset & 0x10) >> 1; - int pokey_reg = (offset % 8) | control; + int pokey_reg = (offset & 0x7) | control; if (pokey_num == 0) machine().device<pokey_device>("pokey1")->write(pokey_reg, data); @@ -287,19 +302,41 @@ ADDRESS_MAP_END * Gamma CPU memory handlers * *************************************/ + +/* +a15 a14 a13 a12 a11 a10 a09 a08 a07 a06 a05 a04 a03 a02 a01 a00 +0 0 0 x x * * * * * * * * * * * RW ZRAM (6116 SRAM@9PQ) +0 0 1 0 0 x x x x x * * * * * * RW INPUTS: QCI/O (Quad Pokey) +0 0 1 0 1 x x x x x x x x x x x R INPUTS: SWITCHES +0 0 1 1 0 x x x x x x x x x x x R INPUTS: PORTRD_gamma +0 0 1 1 1 x x x x x x x x x * * R INPUTS: ROLLER (CCI(LETA?), with A2 grounded so only 4 ports are readable) +0 1 0 x x x x x x x x x x x x x R OUTPUTS: read of dipswitches @8S encompasses the entire OUTPUTS area +0 1 0 0 0 x x x x x x x x x x x W OUTPUTS: IRQACK +0 1 0 0 1 x x x x x x x x x x x W OUTPUTS: STROBES +0 1 0 1 0 x x x x x x x x x x x W OUTPUTS: PORTWR_gamma +0 1 0 1 1 ? ? ? ? ? ? ? ? ? ? ? W OUTPUTS: TISND, unused tms5220 write + ( supposedly, but the /WS hookup is not traced on pcb yet: +0 1 0 1 1 x? x? 0 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: Gamma CPU write to octal latch?? +0 1 0 1 1 x? x? 1 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: octal latch output enable to tms5220 and pulse /WS on 5220?? + Is there a way to activate /RS on the TMS5220 to read the status register? is the TMS5220 /INT line connected to the 6502 somehow? + ) +0 1 1 x x x x * * * * * * * * * RW EEROM: (2804 EEPROM@9QR, pins 22(A9) and 19(A10) are N/C inside the chip) +1 x * * * * * * * * * * * * * * R ROM 27128 @9S +*/ static ADDRESS_MAP_START( gamma_map, AS_PROGRAM, 8, mhavoc_state ) - AM_RANGE(0x0000, 0x07ff) AM_RAM /* Program RAM (2K) */ - AM_RANGE(0x0800, 0x0fff) AM_RAM AM_MIRROR (0x1800) - AM_RANGE(0x2000, 0x203f) AM_READWRITE(quad_pokeyn_r, quad_pokeyn_w) /* Quad Pokey read */ - AM_RANGE(0x2800, 0x2800) AM_READ_PORT("IN1") /* Gamma Input Port */ - AM_RANGE(0x3000, 0x3000) AM_READ(mhavoc_alpha_r) /* Alpha Comm. Read Port*/ - AM_RANGE(0x3800, 0x3803) AM_READ_PORT("DIAL") /* Roller Controller Input*/ - AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW2") AM_WRITE(mhavoc_gamma_irq_ack_w) /* DSW at 8S, IRQ Acknowledge*/ - AM_RANGE(0x4800, 0x4800) AM_WRITE(mhavoc_out_1_w) /* Coin Counters */ - AM_RANGE(0x5000, 0x5000) AM_WRITE(mhavoc_alpha_w) /* Alpha Comm. Write Port */ - AM_RANGE(0x6000, 0x61ff) AM_RAM AM_SHARE("nvram") /* EEROM */ - AM_RANGE(0x8000, 0xffff) AM_ROM /* Program ROM (16K) */ + AM_RANGE(0x0000, 0x07ff) AM_RAM AM_MIRROR(0x1800) /* Program RAM (2K) */ + AM_RANGE(0x2000, 0x203f) AM_READWRITE(quad_pokeyn_r, quad_pokeyn_w) AM_MIRROR(0x07C0) /* Quad Pokey read/write */ + AM_RANGE(0x2800, 0x2800) AM_READ_PORT("IN1") AM_MIRROR(0x07ff) /* Gamma Input Port */ + AM_RANGE(0x3000, 0x3000) AM_READ(mhavoc_alpha_r) AM_MIRROR(0x07ff) /* Alpha Comm. Read Port */ + AM_RANGE(0x3800, 0x3803) AM_READ_PORT("DIAL") AM_MIRROR(0x07fc) /* Roller Controller Input */ + AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW2") AM_WRITE(mhavoc_gamma_irq_ack_w) AM_MIRROR(0x07ff) /* DSW at 8S, IRQ Acknowledge */ + AM_RANGE(0x4800, 0x4800) AM_WRITE(mhavoc_out_1_w) AM_MIRROR(0x07ff) /* Coin Counters */ + AM_RANGE(0x5000, 0x5000) AM_WRITE(mhavoc_alpha_w) AM_MIRROR(0x07ff) /* Alpha Comm. Write Port */ + //AM_RANGE(0x5800, 0x5800) AM_WRITE(mhavocrv_speech_data_w) AM_MIRROR(0x06ff) /* TMS5220 data write */ + //AM_RANGE(0x5900, 0x5900) AM_WRITE(mhavocrv_speech_strobe_w) AM_MIRROR(0x06ff) /* TMS5220 /WS strobe write */ + AM_RANGE(0x6000, 0x61ff) AM_RAM AM_SHARE("nvram") AM_MIRROR(0x1e00) /* EEROM */ + AM_RANGE(0x8000, 0xbfff) AM_ROM AM_MIRROR(0x4000) /* Program ROM (16K) */ ADDRESS_MAP_END @@ -602,8 +639,7 @@ ROM_START( mhavoc ) /* Gamma Processor ROM */ ROM_REGION( 0x10000, "gamma", 0 ) - ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) - ROM_RELOAD( 0x0c000, 0x4000 ) /* reset+interrupt vectors */ + ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */ /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) @@ -633,8 +669,7 @@ ROM_START( mhavoc2 ) /* Gamma Processor ROM */ ROM_REGION( 0x10000, "gamma", 0 ) - ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) - ROM_RELOAD( 0x0c000, 0x4000 ) /* reset+interrupt vectors */ + ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */ /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) @@ -662,8 +697,7 @@ ROM_START( mhavocrv ) /* Gamma Processor ROM */ ROM_REGION( 0x10000, "gamma", 0 ) - ROM_LOAD( "136025.908", 0x08000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) ) - ROM_RELOAD( 0x0c000, 0x4000 ) /* reset+interrupt vectors */ + ROM_LOAD( "136025.908", 0x08000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) ) /* mirrored to c000-ffff for reset+interrupt vectors */ /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) @@ -693,8 +727,7 @@ ROM_START( mhavocp ) /* Gamma Processor ROM */ ROM_REGION( 0x10000, "gamma", 0 ) - ROM_LOAD( "136025.008", 0x8000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) ) - ROM_RELOAD( 0xc000, 0x4000 )/* reset+interrupt vectors */ + ROM_LOAD( "136025.008", 0x8000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) ) /* mirrored to c000-ffff for reset+interrupt vectors */ /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) diff --git a/src/mame/machine/mhavoc.cpp b/src/mame/machine/mhavoc.cpp index 375517022ee..1596717c658 100644 --- a/src/mame/machine/mhavoc.cpp +++ b/src/mame/machine/mhavoc.cpp @@ -265,6 +265,9 @@ WRITE8_MEMBER(mhavoc_state::mhavoc_out_0_w) m_gamma_xmtd = 0; } + /* Bit 2 = Beta reset */ + /* this is the unpopulated processor in the corner of the pcb farthest from the quad pokey, not used on shipping boards */ + /* Bit 0 = Roller light (Blinks on fatal errors) */ output().set_led_value(0, data & 0x01); } |