diff options
author | 2020-06-17 20:42:54 +0200 | |
---|---|---|
committer | 2020-06-17 20:42:54 +0200 | |
commit | 6dff78ed3ab09b83ac0aa8dc08dea227b07562a3 (patch) | |
tree | 92e33e37cb30e2b4f8829eb3dec8e7c8674b6bb4 /src | |
parent | 247d71e1cabe101bd29adee2abc57fb86215a911 (diff) |
devices/machine, sound and video: removed read and write macros (nw)
Diffstat (limited to 'src')
197 files changed, 3413 insertions, 3458 deletions
diff --git a/src/devices/bus/amiga/zorro/a2065.cpp b/src/devices/bus/amiga/zorro/a2065.cpp index ec74d08ffad..6b2348f187d 100644 --- a/src/devices/bus/amiga/zorro/a2065.cpp +++ b/src/devices/bus/amiga/zorro/a2065.cpp @@ -90,9 +90,10 @@ void a2065_device::autoconfig_base_address(offs_t address) write16_delegate(*this, FUNC(amiga_autoconfig::autoconfig_write)), 0xffff); // install access to lance registers - m_slot->space().install_readwrite_handler(address + 0x4000, address + 0x4003, - read16_delegate(*m_lance, FUNC(am7990_device::regs_r)), - write16_delegate(*m_lance, FUNC(am7990_device::regs_w)), 0xffff); + m_slot->space().install_read_handler(address + 0x4000, address + 0x4003, + read16m_delegate(*m_lance, FUNC(am7990_device::regs_r)), 0xffff); + m_slot->space().install_write_handler(address + 0x4000, address + 0x4003, + write16sm_delegate(*m_lance, FUNC(am7990_device::regs_w)), 0xffff); // install access to onboard ram (32k) m_slot->space().install_readwrite_handler(address + 0x8000, address + 0x8000 + 0x7fff, diff --git a/src/devices/bus/hp_dio/hp98543.cpp b/src/devices/bus/hp_dio/hp98543.cpp index 9febc890421..bc9d62a465c 100644 --- a/src/devices/bus/hp_dio/hp98543.cpp +++ b/src/devices/bus/hp_dio/hp98543.cpp @@ -116,8 +116,8 @@ void dio16_98543_device::device_start() dio().install_memory( 0x566000, 0x567fff, - read16_delegate(*m_nereid, FUNC(nereid_device::ctrl_r)), - write16_delegate(*m_nereid, FUNC(nereid_device::ctrl_w))); + read16s_delegate(*m_nereid, FUNC(nereid_device::ctrl_r)), + write16s_delegate(*m_nereid, FUNC(nereid_device::ctrl_w))); } void dio16_98543_device::device_reset() @@ -157,14 +157,14 @@ READ16_MEMBER(dio16_98543_device::vram_r) { uint16_t ret = 0; for (auto &tc: m_topcat) - ret |= tc->vram_r(space, offset, mem_mask); + ret |= tc->vram_r(offset, mem_mask); return ret; } WRITE16_MEMBER(dio16_98543_device::vram_w) { for (auto &tc: m_topcat) - tc->vram_w(space, offset, data, mem_mask); + tc->vram_w(offset, data, mem_mask); } WRITE_LINE_MEMBER(dio16_98543_device::vblank_w) diff --git a/src/devices/bus/hp_dio/hp98544.cpp b/src/devices/bus/hp_dio/hp98544.cpp index 83cd9f25fe7..3ab0c036277 100644 --- a/src/devices/bus/hp_dio/hp98544.cpp +++ b/src/devices/bus/hp_dio/hp98544.cpp @@ -101,8 +101,8 @@ void dio16_98544_device::device_start() save_item(NAME(m_intreg)); dio().install_memory( 0x200000, 0x2fffff, - read16_delegate(*m_topcat, FUNC(topcat_device::vram_r)), - write16_delegate(*m_topcat, FUNC(topcat_device::vram_w))); + read16s_delegate(*m_topcat, FUNC(topcat_device::vram_r)), + write16s_delegate(*m_topcat, FUNC(topcat_device::vram_w))); dio().install_memory( 0x560000, 0x563fff, read16_delegate(*this, FUNC(dio16_98544_device::rom_r)), diff --git a/src/devices/bus/hp_dio/hp98550.cpp b/src/devices/bus/hp_dio/hp98550.cpp index 9044b387385..e67c44e0eea 100644 --- a/src/devices/bus/hp_dio/hp98550.cpp +++ b/src/devices/bus/hp_dio/hp98550.cpp @@ -102,8 +102,8 @@ void dio32_98550_device::device_start() dio().install_memory( 0x566000, 0x5660ff, - read16_delegate(*m_nereid, FUNC(nereid_device::ctrl_r)), - write16_delegate(*m_nereid, FUNC(nereid_device::ctrl_w))); + read16s_delegate(*m_nereid, FUNC(nereid_device::ctrl_r)), + write16s_delegate(*m_nereid, FUNC(nereid_device::ctrl_w))); } void dio32_98550_device::device_reset() @@ -153,7 +153,7 @@ WRITE16_MEMBER(dio32_98550_device::catseye_w) { LOG("%s: %04X = %04X\n", __func__, offset << 1, data); for (auto &ce: m_catseye) - ce->ctrl_w(space, offset, data, mem_mask); + ce->ctrl_w(offset, data, mem_mask); } READ16_MEMBER(dio32_98550_device::vram_r) @@ -161,7 +161,7 @@ READ16_MEMBER(dio32_98550_device::vram_r) uint16_t ret = 0; for (auto &ce: m_catseye) - ret |= ce->vram_r(space, offset, mem_mask); + ret |= ce->vram_r(offset, mem_mask); return ret; } @@ -169,7 +169,7 @@ READ16_MEMBER(dio32_98550_device::vram_r) WRITE16_MEMBER(dio32_98550_device::vram_w) { for (auto &ce: m_catseye) - ce->vram_w(space, offset, data, mem_mask); + ce->vram_w(offset, data, mem_mask); } WRITE_LINE_MEMBER(dio32_98550_device::vblank_w) diff --git a/src/devices/bus/hp_dio/hp98643.cpp b/src/devices/bus/hp_dio/hp98643.cpp index 67101f6006b..65aae14695a 100644 --- a/src/devices/bus/hp_dio/hp98643.cpp +++ b/src/devices/bus/hp_dio/hp98643.cpp @@ -196,13 +196,13 @@ void dio16_98643_device::addrmap(address_map &map) map(0x0000, 0x0001).rw(FUNC(dio16_98643_device::id_r), FUNC(dio16_98643_device::id_w)); map(0x0002, 0x0003).rw(FUNC(dio16_98643_device::sc_r), FUNC(dio16_98643_device::sc_w)); map(0x4000, 0x4003).lrw16( - [this] (address_space &space, offs_t offset, u16 mem_mask) -> u16 { + [this] (address_space &space, offs_t offset) -> u16 { m_sc |= REG_STATUS_ACK; - return m_lance->regs_r(space, offset, mem_mask); + return m_lance->regs_r(space, offset); }, "lance_r", - [this] (address_space &space, offs_t offset, u16 data, u16 mem_mask) { + [this] (offs_t offset, u16 data) { m_sc |= REG_STATUS_ACK; - return m_lance->regs_w(space, offset, data, mem_mask); + return m_lance->regs_w(offset, data); }, "lance_w"); map(0x8000, 0xbfff).lrw16( diff --git a/src/devices/bus/hp_dio/hp_dio.cpp b/src/devices/bus/hp_dio/hp_dio.cpp index d37ebb3a34c..aa2bbcffe8e 100644 --- a/src/devices/bus/hp_dio/hp_dio.cpp +++ b/src/devices/bus/hp_dio/hp_dio.cpp @@ -251,9 +251,7 @@ WRITE_LINE_MEMBER(dio16_device::reset_in) } } -void dio16_device::install_memory(offs_t start, offs_t end, - read16_delegate rhandler, - write16_delegate whandler) { +template<typename R, typename W> void dio16_device::install_memory(offs_t start, offs_t end, R rhandler, W whandler) { switch (m_prgwidth) { case 16: m_prgspace->install_readwrite_handler(start, end, rhandler, @@ -268,6 +266,9 @@ void dio16_device::install_memory(offs_t start, offs_t end, } } +template void dio16_device::install_memory<read16_delegate, write16_delegate >(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler); +template void dio16_device::install_memory<read16s_delegate, write16s_delegate >(offs_t start, offs_t end, read16s_delegate rhandler, write16s_delegate whandler); + void dio16_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data) { m_prgspace->install_readwrite_bank(start, end, 0, tag); diff --git a/src/devices/bus/hp_dio/hp_dio.h b/src/devices/bus/hp_dio/hp_dio.h index 6344f95b3a8..11738a5fc26 100644 --- a/src/devices/bus/hp_dio/hp_dio.h +++ b/src/devices/bus/hp_dio/hp_dio.h @@ -77,7 +77,7 @@ public: auto irq6_out_cb() { return m_irq6_out_cb.bind(); } auto irq7_out_cb() { return m_irq7_out_cb.bind(); } - void install_memory(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler); + template<typename R, typename W> void install_memory(offs_t start, offs_t end, R rhandler, W whandler); // DANGER: these will currently produce different results for a DIO-I card on DIO-I and DIO-II systems // due to the varying bus widths. Using all install_memory() shields you from this problem. diff --git a/src/devices/bus/isa/isa.cpp b/src/devices/bus/isa/isa.cpp index ae5cacad4b0..4a81c9ed779 100644 --- a/src/devices/bus/isa/isa.cpp +++ b/src/devices/bus/isa/isa.cpp @@ -518,7 +518,7 @@ void isa16_device::device_start() m_out_drq7_cb.resolve_safe(); } -void isa16_device::install16_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler) +template<typename R, typename W> void isa16_device::install16_device(offs_t start, offs_t end, R rhandler, W whandler) { int buswidth = m_iowidth; switch(buswidth) @@ -535,7 +535,7 @@ void isa16_device::install16_device(offs_t start, offs_t end, read16_delegate rh m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0xffffffff); } } else { - // we handle just misalligned by 2 + // we handle just misaligned by 2 m_iospace->install_readwrite_handler(start-2, end, rhandler, whandler, 0xffff0000); } @@ -545,32 +545,10 @@ void isa16_device::install16_device(offs_t start, offs_t end, read16_delegate rh } } -void isa16_device::install16_device(offs_t start, offs_t end, read16s_delegate rhandler, write16s_delegate whandler) -{ - int buswidth = m_iowidth; - switch(buswidth) - { - case 16: - m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0); - break; - case 32: - m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0xffffffff); - if ((start % 4) == 0) { - if ((end-start)==1) { - m_iospace->install_readwrite_handler(start, end+2, rhandler, whandler, 0x0000ffff); - } else { - m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0xffffffff); - } - } else { - // we handle just misalligned by 2 - m_iospace->install_readwrite_handler(start-2, end, rhandler, whandler, 0xffff0000); - } - - break; - default: - fatalerror("ISA16: Bus width %d not supported\n", buswidth); - } -} +template void isa16_device::install16_device<read16_delegate, write16_delegate >(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler); +template void isa16_device::install16_device<read16s_delegate, write16s_delegate >(offs_t start, offs_t end, read16s_delegate rhandler, write16s_delegate whandler); +template void isa16_device::install16_device<read16sm_delegate, write16sm_delegate >(offs_t start, offs_t end, read16sm_delegate rhandler, write16sm_delegate whandler); +template void isa16_device::install16_device<read16smo_delegate, write16smo_delegate>(offs_t start, offs_t end, read16smo_delegate rhandler, write16smo_delegate whandler); uint16_t isa16_device::mem16_r(offs_t offset, uint16_t mem_mask) { diff --git a/src/devices/bus/isa/isa.h b/src/devices/bus/isa/isa.h index 4ff4c20b4cc..ac84917dfed 100644 --- a/src/devices/bus/isa/isa.h +++ b/src/devices/bus/isa/isa.h @@ -312,8 +312,7 @@ public: auto drq6_callback() { return m_out_drq6_cb.bind(); } auto drq7_callback() { return m_out_drq7_cb.bind(); } - void install16_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler); - void install16_device(offs_t start, offs_t end, read16s_delegate rhandler, write16s_delegate whandler); + template<typename R, typename W> void install16_device(offs_t start, offs_t end, R rhandler, W whandler); // for ISA16, put the 16-bit configs in the primary slots and the 8-bit configs in the secondary virtual space_config_vector memory_space_config() const override; diff --git a/src/devices/bus/isa/mach32.cpp b/src/devices/bus/isa/mach32.cpp index 2f686745a5d..602147aa060 100644 --- a/src/devices/bus/isa/mach32.cpp +++ b/src/devices/bus/isa/mach32.cpp @@ -75,7 +75,7 @@ void mach32_8514a_device::device_start() // The Graphics Ultra Pro has an ATI68875 // bit 12: Enable internal uC address decode // bit 13-15: Card ID: ID when using multiple controllers -READ16_MEMBER(mach32_8514a_device::mach32_config1_r) +uint16_t mach32_8514a_device::mach32_config1_r() { return 0x0430; // enable VGA, 16-bit ISA, 256Kx16 DRAM, ATI68875 } @@ -95,7 +95,7 @@ READ16_MEMBER(mach32_8514a_device::mach32_config1_r) * bit 15 Draw pixel size to be written * If bits 11 and 15 are both 0, then for compatibility, both will be written */ -WRITE16_MEMBER(mach32_8514a_device::mach32_ge_ext_config_w) +void mach32_8514a_device::mach32_ge_ext_config_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if(offset == 1) { @@ -234,14 +234,14 @@ uint32_t mach32_device::screen_update(screen_device &screen, bitmap_rgb32 &bitma } // mach32 Hardware Pointer -WRITE16_MEMBER(mach32_device::mach32_cursor_l_w) +void mach32_device::mach32_cursor_l_w(offs_t offset, uint16_t data) { if(offset == 1) m_cursor_address = (m_cursor_address & 0xf0000) | data; if(LOG_MACH32) logerror("mach32 HW pointer data address: %05x",m_cursor_address); } -WRITE16_MEMBER(mach32_device::mach32_cursor_h_w) +void mach32_device::mach32_cursor_h_w(offs_t offset, uint16_t data) { if(offset == 1) { @@ -251,19 +251,19 @@ WRITE16_MEMBER(mach32_device::mach32_cursor_h_w) } } -WRITE16_MEMBER(mach32_device::mach32_cursor_pos_h) +void mach32_device::mach32_cursor_pos_h(offs_t offset, uint16_t data) { if(offset == 1) m_cursor_horizontal = data & 0x07ff; } -WRITE16_MEMBER(mach32_device::mach32_cursor_pos_v) +void mach32_device::mach32_cursor_pos_v(offs_t offset, uint16_t data) { if(offset == 1) m_cursor_vertical = data & 0x0fff; } -WRITE16_MEMBER(mach32_device::mach32_cursor_colour_b_w) +void mach32_device::mach32_cursor_colour_b_w(offs_t offset, uint16_t data) { if(offset == 1) { @@ -274,7 +274,7 @@ WRITE16_MEMBER(mach32_device::mach32_cursor_colour_b_w) } } -WRITE16_MEMBER(mach32_device::mach32_cursor_colour_0_w) +void mach32_device::mach32_cursor_colour_0_w(offs_t offset, uint16_t data) { if(offset == 1) { @@ -284,7 +284,7 @@ WRITE16_MEMBER(mach32_device::mach32_cursor_colour_0_w) } } -WRITE16_MEMBER(mach32_device::mach32_cursor_colour_1_w) +void mach32_device::mach32_cursor_colour_1_w(offs_t offset, uint16_t data) { if(offset == 1) { @@ -294,7 +294,7 @@ WRITE16_MEMBER(mach32_device::mach32_cursor_colour_1_w) } } -WRITE16_MEMBER(mach32_device::mach32_cursor_offset_w) +void mach32_device::mach32_cursor_offset_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if(offset == 1) { diff --git a/src/devices/bus/isa/mach32.h b/src/devices/bus/isa/mach32.h index 21478a4a7fd..38b4f673530 100644 --- a/src/devices/bus/isa/mach32.h +++ b/src/devices/bus/isa/mach32.h @@ -23,14 +23,14 @@ public: // construction/destruction mach32_8514a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER(mach32_chipid_r) { return m_chip_ID; } - DECLARE_READ16_MEMBER(mach32_mem_boundary_r) { return m_membounds; } - DECLARE_WRITE16_MEMBER(mach32_mem_boundary_w) { m_membounds = data; if(data & 0x10) logerror("ATI: Unimplemented memory boundary activated."); } - DECLARE_WRITE16_MEMBER(mach32_ge_ext_config_w); + uint16_t mach32_chipid_r() { return m_chip_ID; } + uint16_t mach32_mem_boundary_r() { return m_membounds; } + void mach32_mem_boundary_w(uint16_t data) { m_membounds = data; if(data & 0x10) logerror("ATI: Unimplemented memory boundary activated."); } + void mach32_ge_ext_config_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - DECLARE_READ16_MEMBER(mach32_config1_r); - DECLARE_WRITE16_MEMBER(mach32_horz_overscan_w) {} // TODO - DECLARE_READ16_MEMBER(mach32_ext_ge_r) { return 0x0000; } // TODO + uint16_t mach32_config1_r(); + void mach32_horz_overscan_w(uint16_t data) {} // TODO + uint16_t mach32_ext_ge_r() { return 0x0000; } // TODO bool has_display_mode_changed() { if(display_mode_change) { display_mode_change = false; return true; } else return false; } @@ -57,103 +57,107 @@ public: required_device<mach32_8514a_device> m_8514a; // provides accelerated 2D drawing, derived from the Mach8 device // map 8514/A functions to 8514/A module - DECLARE_READ16_MEMBER(mach8_ec0_r) { return m_8514a->mach8_ec0_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ec0_w) { m_8514a->mach8_ec0_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_ec1_r) { return m_8514a->mach8_ec1_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ec1_w) { m_8514a->mach8_ec1_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_ec2_r) { return m_8514a->mach8_ec2_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ec2_w) { m_8514a->mach8_ec2_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_ec3_r) { return m_8514a->mach8_ec3_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ec3_w) { m_8514a->mach8_ec3_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_ext_fifo_r) { return m_8514a->mach8_ext_fifo_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_linedraw_index_w) { m_8514a->mach8_linedraw_index_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_bresenham_count_r) { return m_8514a->mach8_bresenham_count_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_bresenham_count_w) { m_8514a->mach8_bresenham_count_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_linedraw_w) { m_8514a->mach8_linedraw_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_linedraw_r) { return m_8514a->mach8_linedraw_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(mach8_scratch0_r) { return m_8514a->mach8_scratch0_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_scratch0_w) { m_8514a->mach8_scratch0_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_scratch1_r) { return m_8514a->mach8_scratch1_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_scratch1_w) { m_8514a->mach8_scratch1_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_crt_pitch_w) { m_8514a->mach8_crt_pitch_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_config1_r) { return m_8514a->mach8_config1_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(mach8_config2_r) { return m_8514a->mach8_config2_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(mach8_sourcex_r) { return m_8514a->mach8_sourcex_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(mach8_sourcey_r) { return m_8514a->mach8_sourcey_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ext_leftscissor_w) { m_8514a->mach8_ext_leftscissor_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ext_topscissor_w) { m_8514a->mach8_ext_topscissor_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ge_offset_l_w) { m_8514a->mach8_ge_offset_l_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ge_offset_h_w) { m_8514a->mach8_ge_offset_h_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_scan_x_w) { m_8514a->mach8_scan_x_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_dp_config_w) { m_8514a->mach8_dp_config_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_ge_pitch_w) { m_8514a->mach8_ge_pitch_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(mach8_ge_ext_config_r) { return m_8514a->mach8_ge_ext_config_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_patt_data_w) { m_8514a->mach8_patt_data_w(space,offset,data,mem_mask); } - - DECLARE_READ16_MEMBER(ibm8514_vtotal_r) { return m_8514a->ibm8514_vtotal_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_vtotal_w) { m_8514a->ibm8514_vtotal_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_htotal_r) { return m_8514a->ibm8514_htotal_r(space,offset,mem_mask); } + uint16_t mach8_ec0_r() { return m_8514a->mach8_ec0_r(); } + void mach8_ec0_w(uint16_t data) { m_8514a->mach8_ec0_w(data); } + uint16_t mach8_ec1_r() { return m_8514a->mach8_ec1_r(); } + void mach8_ec1_w(uint16_t data) { m_8514a->mach8_ec1_w(data); } + uint16_t mach8_ec2_r() { return m_8514a->mach8_ec2_r(); } + void mach8_ec2_w(uint16_t data) { m_8514a->mach8_ec2_w(data); } + uint16_t mach8_ec3_r() { return m_8514a->mach8_ec3_r(); } + void mach8_ec3_w(uint16_t data) { m_8514a->mach8_ec3_w(data); } + uint16_t mach8_ext_fifo_r() { return m_8514a->mach8_ext_fifo_r(); } + void mach8_linedraw_index_w(uint16_t data) { m_8514a->mach8_linedraw_index_w(data); } + uint16_t mach8_bresenham_count_r() { return m_8514a->mach8_bresenham_count_r(); } + void mach8_bresenham_count_w(uint16_t data) { m_8514a->mach8_bresenham_count_w(data); } + void mach8_linedraw_w(uint16_t data) { m_8514a->mach8_linedraw_w(data); } + uint16_t mach8_linedraw_r() { return m_8514a->mach8_linedraw_r(); } + uint16_t mach8_scratch0_r() { return m_8514a->mach8_scratch0_r(); } + void mach8_scratch0_w(uint16_t data) { m_8514a->mach8_scratch0_w(data); } + uint16_t mach8_scratch1_r() { return m_8514a->mach8_scratch1_r(); } + void mach8_scratch1_w(uint16_t data) { m_8514a->mach8_scratch1_w(data); } + void mach8_crt_pitch_w(uint16_t data) { m_8514a->mach8_crt_pitch_w(data); } + uint16_t mach8_config1_r() { return m_8514a->mach8_config1_r(); } + uint16_t mach8_config2_smo_r() { return m_8514a->mach8_config2_r(); } + uint16_t mach8_config2_sm_r(offs_t offset) { return m_8514a->mach8_config2_r(); } + uint16_t mach8_sourcex_r() { return m_8514a->mach8_sourcex_r(); } + uint16_t mach8_sourcey_r() { return m_8514a->mach8_sourcey_r(); } + void mach8_ext_leftscissor_w(uint16_t data) { m_8514a->mach8_ext_leftscissor_w(data); } + void mach8_ext_topscissor_w(uint16_t data) { m_8514a->mach8_ext_topscissor_w(data); } + void mach8_ge_offset_l_w(uint16_t data) { m_8514a->mach8_ge_offset_l_w(data); } + void mach8_ge_offset_h_w(uint16_t data) { m_8514a->mach8_ge_offset_h_w(data); } + void mach8_scan_x_w(uint16_t data) { m_8514a->mach8_scan_x_w(data); } + void mach8_dp_config_w(uint16_t data) { m_8514a->mach8_dp_config_w(data); } + void mach8_ge_pitch_w(uint16_t data) { m_8514a->mach8_ge_pitch_w(data); } + uint16_t mach8_ge_ext_config_r() { return m_8514a->mach8_ge_ext_config_r(); } + void mach8_patt_data_w(uint16_t data) { m_8514a->mach8_patt_data_w(data); } + + uint16_t ibm8514_vtotal_r() { return m_8514a->ibm8514_vtotal_r(); } + void ibm8514_vtotal_w(uint16_t data) { m_8514a->ibm8514_vtotal_w(data); } + uint16_t ibm8514_htotal_r() { return m_8514a->ibm8514_htotal_r(); } void ibm8514_htotal_w(offs_t offset, uint8_t data) { m_8514a->ibm8514_htotal_w(offset,data); } - DECLARE_READ16_MEMBER(ibm8514_vdisp_r) { return m_8514a->ibm8514_vdisp_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_vdisp_w) { m_8514a->ibm8514_vdisp_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_vsync_r) { return m_8514a->ibm8514_vsync_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_vsync_w) { m_8514a->ibm8514_vsync_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_substatus_r) { return m_8514a->ibm8514_substatus_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_subcontrol_w) { m_8514a->ibm8514_subcontrol_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_subcontrol_r) { return m_8514a->ibm8514_subcontrol_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_currentx_r) { return m_8514a->ibm8514_currentx_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_currentx_w) { m_8514a->ibm8514_currentx_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_currenty_r) { return m_8514a->ibm8514_currenty_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_currenty_w) { m_8514a->ibm8514_currenty_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_desty_r) { return m_8514a->ibm8514_desty_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_desty_w) { m_8514a->ibm8514_desty_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_destx_r) { return m_8514a->ibm8514_destx_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_destx_w) { m_8514a->ibm8514_destx_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_line_error_r) { return m_8514a->ibm8514_line_error_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_line_error_w) { m_8514a->ibm8514_line_error_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_width_r) { return m_8514a->ibm8514_width_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_width_w) { m_8514a->ibm8514_width_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_gpstatus_r) { return m_8514a->ibm8514_gpstatus_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_cmd_w) { m_8514a->ibm8514_cmd_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_ssv_r) { return m_8514a->ibm8514_ssv_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_ssv_w) { m_8514a->ibm8514_ssv_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_fgcolour_r) { return m_8514a->ibm8514_fgcolour_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_fgcolour_w) { m_8514a->ibm8514_fgcolour_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_bgcolour_r) { return m_8514a->ibm8514_bgcolour_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_bgcolour_w) { m_8514a->ibm8514_bgcolour_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_read_mask_r) { return m_8514a->ibm8514_read_mask_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_read_mask_w) { m_8514a->ibm8514_read_mask_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_write_mask_r) { return m_8514a->ibm8514_write_mask_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_write_mask_w) { m_8514a->ibm8514_write_mask_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_backmix_r) { return m_8514a->ibm8514_backmix_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_backmix_w) { m_8514a->ibm8514_backmix_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_foremix_r) { return m_8514a->ibm8514_foremix_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_foremix_w) { m_8514a->ibm8514_foremix_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_multifunc_r) { return m_8514a->ibm8514_multifunc_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(ibm8514_multifunc_w) { m_8514a->ibm8514_multifunc_w(space,offset,data,mem_mask); } - DECLARE_READ16_MEMBER(ibm8514_pixel_xfer_r) { return m_8514a->ibm8514_pixel_xfer_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_pixel_xfer_w) { m_8514a->mach8_pixel_xfer_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_advfunc_w) { m_8514a->mach8_advfunc_w(space,offset,data,mem_mask); } - - DECLARE_READ16_MEMBER(mach32_chipid_r) { return m_8514a->mach32_chipid_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(mach8_clksel_r) { return m_8514a->mach8_clksel_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach8_clksel_w) { m_8514a->mach8_clksel_w(space,offset,data,mem_mask); } // read only on the mach8 - DECLARE_READ16_MEMBER(mach32_mem_boundary_r) { return m_8514a->mach32_mem_boundary_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach32_mem_boundary_w) { m_8514a->mach32_mem_boundary_w(space,offset,data,mem_mask); } // read only on the mach8 + uint16_t ibm8514_vdisp_r() { return m_8514a->ibm8514_vdisp_r(); } + void ibm8514_vdisp_w(uint16_t data) { m_8514a->ibm8514_vdisp_w(data); } + uint16_t ibm8514_vsync_r() { return m_8514a->ibm8514_vsync_r(); } + void ibm8514_vsync_w(uint16_t data) { m_8514a->ibm8514_vsync_w(data); } + uint16_t ibm8514_substatus_r() { return m_8514a->ibm8514_substatus_r(); } + void ibm8514_subcontrol_w(uint16_t data) { m_8514a->ibm8514_subcontrol_w(data); } + uint16_t ibm8514_subcontrol_r() { return m_8514a->ibm8514_subcontrol_r(); } + uint16_t ibm8514_currentx_r() { return m_8514a->ibm8514_currentx_r(); } + void ibm8514_currentx_w(uint16_t data) { m_8514a->ibm8514_currentx_w(data); } + uint16_t ibm8514_currenty_r() { return m_8514a->ibm8514_currenty_r(); } + void ibm8514_currenty_w(uint16_t data) { m_8514a->ibm8514_currenty_w(data); } + uint16_t ibm8514_desty_r() { return m_8514a->ibm8514_desty_r(); } + void ibm8514_desty_w(uint16_t data) { m_8514a->ibm8514_desty_w(data); } + uint16_t ibm8514_destx_r() { return m_8514a->ibm8514_destx_r(); } + void ibm8514_destx_w(uint16_t data) { m_8514a->ibm8514_destx_w(data); } + uint16_t ibm8514_line_error_r() { return m_8514a->ibm8514_line_error_r(); } + void ibm8514_line_error_w(uint16_t data) { m_8514a->ibm8514_line_error_w(data); } + uint16_t ibm8514_width_r() { return m_8514a->ibm8514_width_r(); } + void ibm8514_width_w(uint16_t data) { m_8514a->ibm8514_width_w(data); } + uint16_t ibm8514_gpstatus_r() { return m_8514a->ibm8514_gpstatus_r(); } + void ibm8514_cmd_w(uint16_t data) { m_8514a->ibm8514_cmd_w(data); } + uint16_t ibm8514_ssv_r() { return m_8514a->ibm8514_ssv_r(); } + void ibm8514_ssv_w(uint16_t data) { m_8514a->ibm8514_ssv_w(data); } + uint16_t ibm8514_fgcolour_r() { return m_8514a->ibm8514_fgcolour_r(); } + void ibm8514_fgcolour_w(uint16_t data) { m_8514a->ibm8514_fgcolour_w(data); } + uint16_t ibm8514_bgcolour_r() { return m_8514a->ibm8514_bgcolour_r(); } + void ibm8514_bgcolour_w(uint16_t data) { m_8514a->ibm8514_bgcolour_w(data); } + uint16_t ibm8514_read_mask_r() { return m_8514a->ibm8514_read_mask_r(); } + void ibm8514_read_mask_w(uint16_t data) { m_8514a->ibm8514_read_mask_w(data); } + uint16_t ibm8514_write_mask_r() { return m_8514a->ibm8514_write_mask_r(); } + void ibm8514_write_mask_w(uint16_t data) { m_8514a->ibm8514_write_mask_w(data); } + uint16_t ibm8514_backmix_r() { return m_8514a->ibm8514_backmix_r(); } + void ibm8514_backmix_w(uint16_t data) { m_8514a->ibm8514_backmix_w(data); } + uint16_t ibm8514_foremix_r() { return m_8514a->ibm8514_foremix_r(); } + void ibm8514_foremix_w(uint16_t data) { m_8514a->ibm8514_foremix_w(data); } + uint16_t ibm8514_multifunc_r() { return m_8514a->ibm8514_multifunc_r(); } + void ibm8514_multifunc_w(uint16_t data) { m_8514a->ibm8514_multifunc_w(data); } + uint16_t ibm8514_pixel_xfer_r(offs_t offset) { return m_8514a->ibm8514_pixel_xfer_r(offset); } + void mach8_pixel_xfer_w(offs_t offset, uint16_t data) { m_8514a->mach8_pixel_xfer_w(offset, data); } + void mach8_advfunc_w(uint16_t data) { m_8514a->mach8_advfunc_w(data); } + + uint16_t mach32_chipid_r() { return m_8514a->mach32_chipid_r(); } + uint16_t mach8_clksel_r() { return m_8514a->mach8_clksel_r(); } + void mach8_clksel_w(uint16_t data) { m_8514a->mach8_clksel_w(data); } // read only on the mach8 + uint16_t mach32_mem_boundary_r() { return m_8514a->mach32_mem_boundary_r(); } + void mach32_mem_boundary_w(uint16_t data) { m_8514a->mach32_mem_boundary_w(data); } // read only on the mach8 uint8_t mach32_status_r(offs_t offset) { return m_8514a->ibm8514_status_r(offset); } - DECLARE_READ16_MEMBER(mach32_config1_r) { return m_8514a->mach32_config1_r(space,offset,mem_mask); } - DECLARE_WRITE16_MEMBER(mach32_horz_overscan_w) { m_8514a->mach32_horz_overscan_w(space,offset,data,mem_mask); } - DECLARE_WRITE16_MEMBER(mach32_ge_ext_config_w) { m_8514a->mach32_ge_ext_config_w(space,offset,data,mem_mask); ati_define_video_mode(); } - DECLARE_READ16_MEMBER(mach32_ext_ge_r) { return m_8514a->mach32_ext_ge_r(space,offset,mem_mask); } - DECLARE_READ16_MEMBER(mach32_readonly_r) { return 0; } - DECLARE_WRITE16_MEMBER(mach32_cursor_pos_h); - DECLARE_WRITE16_MEMBER(mach32_cursor_pos_v); - DECLARE_WRITE16_MEMBER(mach32_cursor_colour_b_w); - DECLARE_WRITE16_MEMBER(mach32_cursor_colour_0_w); - DECLARE_WRITE16_MEMBER(mach32_cursor_colour_1_w); - DECLARE_WRITE16_MEMBER(mach32_cursor_l_w); - DECLARE_WRITE16_MEMBER(mach32_cursor_h_w); - DECLARE_WRITE16_MEMBER(mach32_cursor_offset_w); + uint16_t mach32_config1_smo_r() { return m_8514a->mach32_config1_r(); } + uint16_t mach32_config1_sm_r(offs_t offset) { return m_8514a->mach32_config1_r(); } + void mach32_horz_overscan_w(uint16_t data) { m_8514a->mach32_horz_overscan_w(data); } + void mach32_ge_ext_config_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_8514a->mach32_ge_ext_config_w(offset, data, mem_mask); ati_define_video_mode(); } + uint16_t mach32_ext_ge_r() { return m_8514a->mach32_ext_ge_r(); } + uint16_t mach32_readonly_s_r(offs_t offset, uint16_t mem_mask) { return 0; } + uint16_t mach32_readonly_sm_r(offs_t offset) { return 0; } + uint16_t mach32_readonly_smo_r() { return 0; } + void mach32_cursor_pos_h(offs_t offset, uint16_t data); + void mach32_cursor_pos_v(offs_t offset, uint16_t data); + void mach32_cursor_colour_b_w(offs_t offset, uint16_t data); + void mach32_cursor_colour_0_w(offs_t offset, uint16_t data); + void mach32_cursor_colour_1_w(offs_t offset, uint16_t data); + void mach32_cursor_l_w(offs_t offset, uint16_t data); + void mach32_cursor_h_w(offs_t offset, uint16_t data); + void mach32_cursor_offset_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: mach32_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -206,8 +210,8 @@ public: // construction/destruction mach64_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_WRITE16_MEMBER(mach64_config1_w) { } // why does the mach64 BIOS write to these, they are read only on the mach32 and earlier - DECLARE_WRITE16_MEMBER(mach64_config2_w) { } + void mach64_config1_w(uint16_t data) { } // why does the mach64 BIOS write to these, they are read only on the mach32 and earlier + void mach64_config2_w(uint16_t data) { } protected: mach64_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/isa/svga_s3.cpp b/src/devices/bus/isa/svga_s3.cpp index 66f563e0e14..a50c3a8d0fb 100644 --- a/src/devices/bus/isa/svga_s3.cpp +++ b/src/devices/bus/isa/svga_s3.cpp @@ -87,22 +87,22 @@ void isa16_svga_s3_device::device_start() m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03b0_w))); m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03c0_w))); m_isa->install_device(0x03d0, 0x03df, read8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03d0_r)), write8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03d0_w))); - m_isa->install16_device(0x82e8, 0x82eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currenty_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currenty_w))); - m_isa->install16_device(0x86e8, 0x86eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currentx_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currentx_w))); - m_isa->install16_device(0x8ae8, 0x8aeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_desty_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_desty_w))); - m_isa->install16_device(0x8ee8, 0x8eeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_destx_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_destx_w))); - m_isa->install16_device(0x92e8, 0x92eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_line_error_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_line_error_w))); - m_isa->install16_device(0x96e8, 0x96eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_width_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_width_w))); - m_isa->install16_device(0x9ae8, 0x9aeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_gpstatus_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_cmd_w))); - m_isa->install16_device(0x9ee8, 0x9eeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_ssv_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_ssv_w))); - m_isa->install16_device(0xa2e8, 0xa2eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_bgcolour_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_bgcolour_w))); - m_isa->install16_device(0xa6e8, 0xa6eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_fgcolour_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_fgcolour_w))); - m_isa->install16_device(0xaae8, 0xaaeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_w))); - m_isa->install16_device(0xaee8, 0xaeeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_w))); - m_isa->install16_device(0xb6e8, 0xb6eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_backmix_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_backmix_w))); - m_isa->install16_device(0xbae8, 0xbaeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_foremix_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_foremix_w))); - m_isa->install16_device(0xbee8, 0xbeeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_multifunc_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_multifunc_w))); - m_isa->install16_device(0xe2e8, 0xe2eb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_pixel_xfer_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_pixel_xfer_w))); + m_isa->install16_device(0x82e8, 0x82eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currenty_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currenty_w))); + m_isa->install16_device(0x86e8, 0x86eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currentx_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_currentx_w))); + m_isa->install16_device(0x8ae8, 0x8aeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_desty_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_desty_w))); + m_isa->install16_device(0x8ee8, 0x8eeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_destx_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_destx_w))); + m_isa->install16_device(0x92e8, 0x92eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_line_error_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_line_error_w))); + m_isa->install16_device(0x96e8, 0x96eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_width_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_width_w))); + m_isa->install16_device(0x9ae8, 0x9aeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_gpstatus_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_cmd_w))); + m_isa->install16_device(0x9ee8, 0x9eeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_ssv_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_ssv_w))); + m_isa->install16_device(0xa2e8, 0xa2eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_bgcolour_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_bgcolour_w))); + m_isa->install16_device(0xa6e8, 0xa6eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_fgcolour_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_fgcolour_w))); + m_isa->install16_device(0xaae8, 0xaaeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_w))); + m_isa->install16_device(0xaee8, 0xaeeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_w))); + m_isa->install16_device(0xb6e8, 0xb6eb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_backmix_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_backmix_w))); + m_isa->install16_device(0xbae8, 0xbaeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_foremix_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_foremix_w))); + m_isa->install16_device(0xbee8, 0xbeeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_multifunc_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_multifunc_w))); + m_isa->install16_device(0xe2e8, 0xe2eb, read16sm_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_pixel_xfer_r)), write16sm_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_pixel_xfer_w))); m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(s3_vga_device::mem_r)), write8sm_delegate(*m_vga, FUNC(s3_vga_device::mem_w))); } diff --git a/src/devices/bus/isa/vga_ati.cpp b/src/devices/bus/isa/vga_ati.cpp index 054033ea21f..177e30f14c7 100644 --- a/src/devices/bus/isa/vga_ati.cpp +++ b/src/devices/bus/isa/vga_ati.cpp @@ -170,52 +170,52 @@ void isa16_vga_gfxultra_device::device_start() m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*m_vga, FUNC(ati_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(vga_device::port_03b0_w))); m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*m_vga, FUNC(ati_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(vga_device::port_03c0_w))); m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*m_vga, FUNC(ati_vga_device::port_03d0_r)), write8sm_delegate(*m_vga, FUNC(vga_device::port_03d0_w))); - m_isa->install16_device(0x12e8, 0x12eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_vtotal_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_vtotal_w))); - m_isa->install16_device(0x12ec, 0x12ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_config1_r)), write16_delegate(*this)); - m_isa->install16_device(0x16e8, 0x16eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_vdisp_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_vdisp_w))); - m_isa->install16_device(0x16ec, 0x16ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_config2_r)), write16_delegate(*this)); - m_isa->install16_device(0x1ae8, 0x1aeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_vsync_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_vsync_w))); - m_isa->install16_device(0x22e8, 0x22eb, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_display_ctrl_w))); - m_isa->install16_device(0x26e8, 0x26eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_htotal_r)), write16_delegate(*this)); - m_isa->install16_device(0x26ec, 0x26ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_crt_pitch_w))); - m_isa->install16_device(0x2ee8, 0x2eeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_subcontrol_r)), write16_delegate(*this)); - m_isa->install16_device(0x42e8, 0x42eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_substatus_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_subcontrol_w))); - m_isa->install16_device(0x4ae8, 0x4aeb, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_advfunc_w))); - m_isa->install16_device(0x4aec, 0x4aef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_clksel_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_clksel_w))); - m_isa->install16_device(0x52e8, 0x52eb, read16_delegate(*m_8514, FUNC(mach8_device::mach8_ec0_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ec0_w))); - m_isa->install16_device(0x52ec, 0x52ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_w))); - m_isa->install16_device(0x56e8, 0x56eb, read16_delegate(*m_8514, FUNC(mach8_device::mach8_ec1_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ec1_w))); - m_isa->install16_device(0x56ec, 0x56ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_w))); - m_isa->install16_device(0x5ae8, 0x5aeb, read16_delegate(*m_8514, FUNC(mach8_device::mach8_ec2_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ec2_w))); - m_isa->install16_device(0x5ee8, 0x5eeb, read16_delegate(*m_8514, FUNC(mach8_device::mach8_ec3_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ec3_w))); - m_isa->install16_device(0x6eec, 0x6eef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ge_offset_l_w))); - m_isa->install16_device(0x72ec, 0x72ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ge_offset_h_w))); - m_isa->install16_device(0x76ec, 0x76ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ge_pitch_w))); - m_isa->install16_device(0x7aec, 0x7aef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ge_ext_config_w))); - m_isa->install16_device(0x82e8, 0x82eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_currenty_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_currenty_w))); - m_isa->install16_device(0x86e8, 0x86eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_currentx_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_currentx_w))); - m_isa->install16_device(0x8ae8, 0x8aeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_desty_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_desty_w))); - m_isa->install16_device(0x8ee8, 0x8eeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_destx_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_destx_w))); - m_isa->install16_device(0x8eec, 0x8eef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_ge_ext_config_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_patt_data_w))); - m_isa->install16_device(0x92e8, 0x92eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_line_error_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_line_error_w))); - m_isa->install16_device(0x96e8, 0x96eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_width_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_width_w))); - m_isa->install16_device(0x96ec, 0x96ef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_bresenham_count_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_bresenham_count_w))); - m_isa->install16_device(0x9ae8, 0x9aeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_gpstatus_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_cmd_w))); - m_isa->install16_device(0x9aec, 0x9aef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_ext_fifo_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_linedraw_index_w))); - m_isa->install16_device(0x9ee8, 0x9eeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_ssv_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_ssv_w))); - m_isa->install16_device(0xa2e8, 0xa2eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_bgcolour_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_bgcolour_w))); - m_isa->install16_device(0xa6e8, 0xa6eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_fgcolour_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_fgcolour_w))); - m_isa->install16_device(0xaae8, 0xaaeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_w))); - m_isa->install16_device(0xaee8, 0xaeeb, read16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_r)), write16_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_w))); - m_isa->install16_device(0xb6e8, 0xb6eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_backmix_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_backmix_w))); - m_isa->install16_device(0xbae8, 0xbaeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_foremix_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_foremix_w))); - m_isa->install16_device(0xbee8, 0xbeeb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_multifunc_r)), write16_delegate(*m_8514, FUNC(mach8_device::ibm8514_multifunc_w))); - m_isa->install16_device(0xcaec, 0xcaef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_scan_x_w))); - m_isa->install16_device(0xceec, 0xceef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_dp_config_w))); - m_isa->install16_device(0xe2e8, 0xe2eb, read16_delegate(*m_8514, FUNC(mach8_device::ibm8514_pixel_xfer_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_pixel_xfer_w))); - m_isa->install16_device(0xdaec, 0xdaef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_sourcex_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ext_leftscissor_w))); - m_isa->install16_device(0xdeec, 0xdeef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_sourcey_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_ext_topscissor_w))); - m_isa->install16_device(0xfeec, 0xfeef, read16_delegate(*m_8514, FUNC(mach8_device::mach8_linedraw_r)), write16_delegate(*m_8514, FUNC(mach8_device::mach8_linedraw_w))); + m_isa->install16_device(0x12e8, 0x12eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_vtotal_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_vtotal_w))); + m_isa->install16_device(0x12ec, 0x12ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_config1_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x16e8, 0x16eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_vdisp_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_vdisp_w))); + m_isa->install16_device(0x16ec, 0x16ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_config2_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x1ae8, 0x1aeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_vsync_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_vsync_w))); + m_isa->install16_device(0x22e8, 0x22eb, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_display_ctrl_w))); + m_isa->install16_device(0x26e8, 0x26eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_htotal_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x26ec, 0x26ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_crt_pitch_w))); + m_isa->install16_device(0x2ee8, 0x2eeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_subcontrol_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x42e8, 0x42eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_substatus_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_subcontrol_w))); + m_isa->install16_device(0x4ae8, 0x4aeb, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_advfunc_w))); + m_isa->install16_device(0x4aec, 0x4aef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_clksel_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_clksel_w))); + m_isa->install16_device(0x52e8, 0x52eb, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec0_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec0_w))); + m_isa->install16_device(0x52ec, 0x52ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_w))); + m_isa->install16_device(0x56e8, 0x56eb, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec1_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec1_w))); + m_isa->install16_device(0x56ec, 0x56ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_scratch0_w))); + m_isa->install16_device(0x5ae8, 0x5aeb, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec2_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec2_w))); + m_isa->install16_device(0x5ee8, 0x5eeb, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec3_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ec3_w))); + m_isa->install16_device(0x6eec, 0x6eef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ge_offset_l_w))); + m_isa->install16_device(0x72ec, 0x72ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ge_offset_h_w))); + m_isa->install16_device(0x76ec, 0x76ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ge_pitch_w))); + m_isa->install16_device(0x7aec, 0x7aef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ge_ext_config_w))); + m_isa->install16_device(0x82e8, 0x82eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_currenty_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_currenty_w))); + m_isa->install16_device(0x86e8, 0x86eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_currentx_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_currentx_w))); + m_isa->install16_device(0x8ae8, 0x8aeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_desty_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_desty_w))); + m_isa->install16_device(0x8ee8, 0x8eeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_destx_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_destx_w))); + m_isa->install16_device(0x8eec, 0x8eef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ge_ext_config_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_patt_data_w))); + m_isa->install16_device(0x92e8, 0x92eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_line_error_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_line_error_w))); + m_isa->install16_device(0x96e8, 0x96eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_width_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_width_w))); + m_isa->install16_device(0x96ec, 0x96ef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_bresenham_count_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_bresenham_count_w))); + m_isa->install16_device(0x9ae8, 0x9aeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_gpstatus_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_cmd_w))); + m_isa->install16_device(0x9aec, 0x9aef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ext_fifo_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_linedraw_index_w))); + m_isa->install16_device(0x9ee8, 0x9eeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_ssv_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_ssv_w))); + m_isa->install16_device(0xa2e8, 0xa2eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_bgcolour_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_bgcolour_w))); + m_isa->install16_device(0xa6e8, 0xa6eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_fgcolour_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_fgcolour_w))); + m_isa->install16_device(0xaae8, 0xaaeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_write_mask_w))); + m_isa->install16_device(0xaee8, 0xaeeb, read16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_r)), write16smo_delegate(*m_8514, FUNC(ibm8514a_device::ibm8514_read_mask_w))); + m_isa->install16_device(0xb6e8, 0xb6eb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_backmix_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_backmix_w))); + m_isa->install16_device(0xbae8, 0xbaeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_foremix_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_foremix_w))); + m_isa->install16_device(0xbee8, 0xbeeb, read16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_multifunc_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::ibm8514_multifunc_w))); + m_isa->install16_device(0xcaec, 0xcaef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_scan_x_w))); + m_isa->install16_device(0xceec, 0xceef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_readonly_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_dp_config_w))); + m_isa->install16_device(0xe2e8, 0xe2eb, read16sm_delegate(*m_8514, FUNC(mach8_device::ibm8514_pixel_xfer_r)), write16sm_delegate(*m_8514, FUNC(mach8_device::mach8_pixel_xfer_w))); + m_isa->install16_device(0xdaec, 0xdaef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_sourcex_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ext_leftscissor_w))); + m_isa->install16_device(0xdeec, 0xdeef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_sourcey_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_ext_topscissor_w))); + m_isa->install16_device(0xfeec, 0xfeef, read16smo_delegate(*m_8514, FUNC(mach8_device::mach8_linedraw_r)), write16smo_delegate(*m_8514, FUNC(mach8_device::mach8_linedraw_w))); m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(ati_vga_device::mem_r)), write8sm_delegate(*m_vga, FUNC(ati_vga_device::mem_w))); } @@ -231,60 +231,60 @@ void isa16_vga_gfxultrapro_device::device_start() m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*m_vga, FUNC(mach32_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(mach32_device::port_03b0_w))); m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*m_vga, FUNC(mach32_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(mach32_device::port_03c0_w))); m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*m_vga, FUNC(mach32_device::port_03d0_r)), write8sm_delegate(*m_vga, FUNC(mach32_device::port_03d0_w))); - m_isa->install16_device(0xaec, 0xaef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_l_w))); - m_isa->install16_device(0xeec, 0xeef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_h_w))); - m_isa->install16_device(0x12e8, 0x12eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_vtotal_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_vtotal_w))); - m_isa->install16_device(0x12ec, 0x12ef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_config1_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_pos_h))); - m_isa->install16_device(0x16e8, 0x16eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_vdisp_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_vdisp_w))); - m_isa->install16_device(0x16ec, 0x16ef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_config2_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_pos_v))); - m_isa->install16_device(0x1ae8, 0x1aeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_vsync_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_vsync_w))); - m_isa->install16_device(0x1aec, 0x1aef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_colour_b_w))); - m_isa->install16_device(0x1eec, 0x1eef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_offset_w))); - m_isa->install16_device(0x26e8, 0x26eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_htotal_r)), write16_delegate(*this)); - m_isa->install16_device(0x26ec, 0x26ef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_crt_pitch_w))); - m_isa->install16_device(0x2ee8, 0x2eeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_subcontrol_r)), write16_delegate(*this)); - m_isa->install16_device(0x3aec, 0x3aef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_colour_0_w))); - m_isa->install16_device(0x3eec, 0x3eef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_colour_0_w))); - m_isa->install16_device(0x42e8, 0x42eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_substatus_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_subcontrol_w))); - m_isa->install16_device(0x42ec, 0x42ef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_mem_boundary_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_mem_boundary_w))); - m_isa->install16_device(0x4ae8, 0x4aeb, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_advfunc_w))); - m_isa->install16_device(0x4aec, 0x4aef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_clksel_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_clksel_w))); - m_isa->install16_device(0x52e8, 0x52eb, read16_delegate(*m_vga, FUNC(mach32_device::mach8_ec0_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ec0_w))); - m_isa->install16_device(0x52ec, 0x52ef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_w))); - m_isa->install16_device(0x56e8, 0x56eb, read16_delegate(*m_vga, FUNC(mach32_device::mach8_ec1_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ec1_w))); - m_isa->install16_device(0x56ec, 0x56ef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_w))); - m_isa->install16_device(0x5ae8, 0x5aeb, read16_delegate(*m_vga, FUNC(mach32_device::mach8_ec2_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ec2_w))); - m_isa->install16_device(0x5ee8, 0x5eeb, read16_delegate(*m_vga, FUNC(mach32_device::mach8_ec3_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ec3_w))); - m_isa->install16_device(0x62ec, 0x62ef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_ext_ge_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_horz_overscan_w))); - m_isa->install16_device(0x6eec, 0x6eef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ge_offset_l_w))); - m_isa->install16_device(0x72ec, 0x72ef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ge_offset_h_w))); - m_isa->install16_device(0x76ec, 0x76ef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ge_pitch_w))); - m_isa->install16_device(0x7aec, 0x7aef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach32_ge_ext_config_w))); - m_isa->install16_device(0x82e8, 0x82eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_currenty_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_currenty_w))); - m_isa->install16_device(0x86e8, 0x86eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_currentx_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_currentx_w))); - m_isa->install16_device(0x8ae8, 0x8aeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_desty_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_desty_w))); - m_isa->install16_device(0x8ee8, 0x8eeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_destx_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_destx_w))); - m_isa->install16_device(0x8eec, 0x8eef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_ge_ext_config_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_patt_data_w))); - m_isa->install16_device(0x92e8, 0x92eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_line_error_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_line_error_w))); - m_isa->install16_device(0x96e8, 0x96eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_width_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_width_w))); - m_isa->install16_device(0x96ec, 0x96ef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_bresenham_count_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_bresenham_count_w))); - m_isa->install16_device(0x9ae8, 0x9aeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_gpstatus_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_cmd_w))); - m_isa->install16_device(0x9aec, 0x9aef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_ext_fifo_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_linedraw_index_w))); - m_isa->install16_device(0x9ee8, 0x9eeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_ssv_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_ssv_w))); - m_isa->install16_device(0xa2e8, 0xa2eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_bgcolour_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_bgcolour_w))); - m_isa->install16_device(0xa6e8, 0xa6eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_fgcolour_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_fgcolour_w))); - m_isa->install16_device(0xaae8, 0xaaeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_write_mask_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_write_mask_w))); - m_isa->install16_device(0xaee8, 0xaeeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_read_mask_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_read_mask_w))); - m_isa->install16_device(0xb6e8, 0xb6eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_backmix_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_backmix_w))); - m_isa->install16_device(0xbae8, 0xbaeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_foremix_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_foremix_w))); - m_isa->install16_device(0xbee8, 0xbeeb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_multifunc_r)), write16_delegate(*m_vga, FUNC(mach32_device::ibm8514_multifunc_w))); - m_isa->install16_device(0xcaec, 0xcaef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_scan_x_w))); - m_isa->install16_device(0xceec, 0xceef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_dp_config_w))); - m_isa->install16_device(0xe2e8, 0xe2eb, read16_delegate(*m_vga, FUNC(mach32_device::ibm8514_pixel_xfer_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_pixel_xfer_w))); - m_isa->install16_device(0xdaec, 0xdaef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_sourcex_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ext_leftscissor_w))); - m_isa->install16_device(0xdeec, 0xdeef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_sourcey_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_ext_topscissor_w))); - m_isa->install16_device(0xfaec, 0xfaef, read16_delegate(*m_vga, FUNC(mach32_device::mach32_chipid_r)), write16_delegate(*this)); - m_isa->install16_device(0xfeec, 0xfeef, read16_delegate(*m_vga, FUNC(mach32_device::mach8_linedraw_r)), write16_delegate(*m_vga, FUNC(mach32_device::mach8_linedraw_w))); + m_isa->install16_device(0xaec, 0xaef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_l_w))); + m_isa->install16_device(0xeec, 0xeef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_h_w))); + m_isa->install16_device(0x12e8, 0x12eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_vtotal_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_vtotal_w))); + m_isa->install16_device(0x12ec, 0x12ef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach32_config1_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_pos_h))); + m_isa->install16_device(0x16e8, 0x16eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_vdisp_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_vdisp_w))); + m_isa->install16_device(0x16ec, 0x16ef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach8_config2_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_pos_v))); + m_isa->install16_device(0x1ae8, 0x1aeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_vsync_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_vsync_w))); + m_isa->install16_device(0x1aec, 0x1aef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_colour_b_w))); + m_isa->install16_device(0x1eec, 0x1eef, read16s_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_s_r)), write16s_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_offset_w))); + m_isa->install16_device(0x26e8, 0x26eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_htotal_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x26ec, 0x26ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_crt_pitch_w))); + m_isa->install16_device(0x2ee8, 0x2eeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_subcontrol_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x3aec, 0x3aef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_colour_0_w))); + m_isa->install16_device(0x3eec, 0x3eef, read16sm_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_sm_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach32_cursor_colour_0_w))); + m_isa->install16_device(0x42e8, 0x42eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_substatus_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_subcontrol_w))); + m_isa->install16_device(0x42ec, 0x42ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_mem_boundary_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach32_mem_boundary_w))); + m_isa->install16_device(0x4ae8, 0x4aeb, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_advfunc_w))); + m_isa->install16_device(0x4aec, 0x4aef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_clksel_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_clksel_w))); + m_isa->install16_device(0x52e8, 0x52eb, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec0_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec0_w))); + m_isa->install16_device(0x52ec, 0x52ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_w))); + m_isa->install16_device(0x56e8, 0x56eb, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec1_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec1_w))); + m_isa->install16_device(0x56ec, 0x56ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_scratch0_w))); + m_isa->install16_device(0x5ae8, 0x5aeb, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec2_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec2_w))); + m_isa->install16_device(0x5ee8, 0x5eeb, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec3_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ec3_w))); + m_isa->install16_device(0x62ec, 0x62ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_ext_ge_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach32_horz_overscan_w))); + m_isa->install16_device(0x6eec, 0x6eef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ge_offset_l_w))); + m_isa->install16_device(0x72ec, 0x72ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ge_offset_h_w))); + m_isa->install16_device(0x76ec, 0x76ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ge_pitch_w))); + m_isa->install16_device(0x7aec, 0x7aef, read16s_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_s_r)), write16s_delegate(*m_vga, FUNC(mach32_device::mach32_ge_ext_config_w))); + m_isa->install16_device(0x82e8, 0x82eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_currenty_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_currenty_w))); + m_isa->install16_device(0x86e8, 0x86eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_currentx_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_currentx_w))); + m_isa->install16_device(0x8ae8, 0x8aeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_desty_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_desty_w))); + m_isa->install16_device(0x8ee8, 0x8eeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_destx_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_destx_w))); + m_isa->install16_device(0x8eec, 0x8eef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ge_ext_config_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_patt_data_w))); + m_isa->install16_device(0x92e8, 0x92eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_line_error_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_line_error_w))); + m_isa->install16_device(0x96e8, 0x96eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_width_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_width_w))); + m_isa->install16_device(0x96ec, 0x96ef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_bresenham_count_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_bresenham_count_w))); + m_isa->install16_device(0x9ae8, 0x9aeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_gpstatus_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_cmd_w))); + m_isa->install16_device(0x9aec, 0x9aef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ext_fifo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_linedraw_index_w))); + m_isa->install16_device(0x9ee8, 0x9eeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_ssv_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_ssv_w))); + m_isa->install16_device(0xa2e8, 0xa2eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_bgcolour_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_bgcolour_w))); + m_isa->install16_device(0xa6e8, 0xa6eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_fgcolour_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_fgcolour_w))); + m_isa->install16_device(0xaae8, 0xaaeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_write_mask_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_write_mask_w))); + m_isa->install16_device(0xaee8, 0xaeeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_read_mask_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_read_mask_w))); + m_isa->install16_device(0xb6e8, 0xb6eb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_backmix_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_backmix_w))); + m_isa->install16_device(0xbae8, 0xbaeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_foremix_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_foremix_w))); + m_isa->install16_device(0xbee8, 0xbeeb, read16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_multifunc_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::ibm8514_multifunc_w))); + m_isa->install16_device(0xcaec, 0xcaef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_scan_x_w))); + m_isa->install16_device(0xceec, 0xceef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_dp_config_w))); + m_isa->install16_device(0xe2e8, 0xe2eb, read16sm_delegate(*m_vga, FUNC(mach32_device::ibm8514_pixel_xfer_r)), write16sm_delegate(*m_vga, FUNC(mach32_device::mach8_pixel_xfer_w))); + m_isa->install16_device(0xdaec, 0xdaef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_sourcex_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ext_leftscissor_w))); + m_isa->install16_device(0xdeec, 0xdeef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_sourcey_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_ext_topscissor_w))); + m_isa->install16_device(0xfaec, 0xfaef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach32_chipid_r)), write16smo_delegate(*this)); + m_isa->install16_device(0xfeec, 0xfeef, read16smo_delegate(*m_vga, FUNC(mach32_device::mach8_linedraw_r)), write16smo_delegate(*m_vga, FUNC(mach32_device::mach8_linedraw_w))); m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(mach32_device::mem_r)), write8sm_delegate(*m_vga, FUNC(mach32_device::mem_w))); } @@ -300,53 +300,53 @@ void isa16_vga_mach64_device::device_start() m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*m_vga, FUNC(mach64_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(mach64_device::port_03b0_w))); m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*m_vga, FUNC(mach64_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(mach64_device::port_03c0_w))); m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*m_vga, FUNC(mach64_device::port_03d0_r)), write8sm_delegate(*m_vga, FUNC(mach64_device::port_03d0_w))); - m_isa->install16_device(0x12e8, 0x12eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_vtotal_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_vtotal_w))); - m_isa->install16_device(0x12ec, 0x12ef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_config1_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach64_config1_w))); - m_isa->install16_device(0x16e8, 0x16eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_vdisp_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_vdisp_w))); - m_isa->install16_device(0x16ec, 0x16ef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_config2_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach64_config2_w))); - m_isa->install16_device(0x1ae8, 0x1aeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_vsync_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_vsync_w))); - m_isa->install16_device(0x26e8, 0x26eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_htotal_r)), write16_delegate(*this)); - m_isa->install16_device(0x26ec, 0x26ef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_crt_pitch_w))); - m_isa->install16_device(0x2ee8, 0x2eeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_subcontrol_r)),write16_delegate(*this)); - m_isa->install16_device(0x42e8, 0x42eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_substatus_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_subcontrol_w))); - m_isa->install16_device(0x42ec, 0x42ef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_mem_boundary_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach32_mem_boundary_w))); - m_isa->install16_device(0x4ae8, 0x4aeb, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_advfunc_w))); - m_isa->install16_device(0x4aec, 0x4aef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_clksel_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_clksel_w))); - m_isa->install16_device(0x52e8, 0x52eb, read16_delegate(*m_vga, FUNC(mach64_device::mach8_ec0_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ec0_w))); - m_isa->install16_device(0x52ec, 0x52ef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_w))); - m_isa->install16_device(0x56e8, 0x56eb, read16_delegate(*m_vga, FUNC(mach64_device::mach8_ec1_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ec1_w))); - m_isa->install16_device(0x56ec, 0x56ef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_w))); - m_isa->install16_device(0x5ae8, 0x5aeb, read16_delegate(*m_vga, FUNC(mach64_device::mach8_ec2_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ec2_w))); - m_isa->install16_device(0x5ee8, 0x5eeb, read16_delegate(*m_vga, FUNC(mach64_device::mach8_ec3_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ec3_w))); - m_isa->install16_device(0x6eec, 0x6eef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ge_offset_l_w))); - m_isa->install16_device(0x72ec, 0x72ef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ge_offset_h_w))); - m_isa->install16_device(0x76ec, 0x76ef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ge_pitch_w))); - m_isa->install16_device(0x7aec, 0x7aef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach32_ge_ext_config_w))); - m_isa->install16_device(0x82e8, 0x82eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_currenty_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_currenty_w))); - m_isa->install16_device(0x86e8, 0x86eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_currentx_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_currentx_w))); - m_isa->install16_device(0x8ae8, 0x8aeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_desty_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_desty_w))); - m_isa->install16_device(0x8ee8, 0x8eeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_destx_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_destx_w))); - m_isa->install16_device(0x8eec, 0x8eef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_ge_ext_config_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_patt_data_w))); - m_isa->install16_device(0x92e8, 0x92eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_line_error_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_line_error_w))); - m_isa->install16_device(0x96e8, 0x96eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_width_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_width_w))); - m_isa->install16_device(0x96ec, 0x96ef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_bresenham_count_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_bresenham_count_w))); - m_isa->install16_device(0x9ae8, 0x9aeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_gpstatus_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_cmd_w))); - m_isa->install16_device(0x9aec, 0x9aef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_ext_fifo_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_linedraw_index_w))); - m_isa->install16_device(0x9ee8, 0x9eeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_ssv_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_ssv_w))); - m_isa->install16_device(0xa2e8, 0xa2eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_bgcolour_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_bgcolour_w))); - m_isa->install16_device(0xa6e8, 0xa6eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_fgcolour_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_fgcolour_w))); - m_isa->install16_device(0xaae8, 0xaaeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_write_mask_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_write_mask_w))); - m_isa->install16_device(0xaee8, 0xaeeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_read_mask_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_read_mask_w))); - m_isa->install16_device(0xb6e8, 0xb6eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_backmix_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_backmix_w))); - m_isa->install16_device(0xbae8, 0xbaeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_foremix_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_foremix_w))); - m_isa->install16_device(0xbee8, 0xbeeb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_multifunc_r)), write16_delegate(*m_vga, FUNC(mach64_device::ibm8514_multifunc_w))); - m_isa->install16_device(0xcaec, 0xcaef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_scan_x_w))); - m_isa->install16_device(0xceec, 0xceef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_dp_config_w))); - m_isa->install16_device(0xe2e8, 0xe2eb, read16_delegate(*m_vga, FUNC(mach64_device::ibm8514_pixel_xfer_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_pixel_xfer_w))); - m_isa->install16_device(0xdaec, 0xdaef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_sourcex_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ext_leftscissor_w))); - m_isa->install16_device(0xdeec, 0xdeef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_sourcey_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_ext_topscissor_w))); - m_isa->install16_device(0xfaec, 0xfaef, read16_delegate(*m_vga, FUNC(mach64_device::mach32_chipid_r)), write16_delegate(*this)); - m_isa->install16_device(0xfeec, 0xfeef, read16_delegate(*m_vga, FUNC(mach64_device::mach8_linedraw_r)), write16_delegate(*m_vga, FUNC(mach64_device::mach8_linedraw_w))); + m_isa->install16_device(0x12e8, 0x12eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_vtotal_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_vtotal_w))); + m_isa->install16_device(0x12ec, 0x12ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_config1_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach64_config1_w))); + m_isa->install16_device(0x16e8, 0x16eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_vdisp_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_vdisp_w))); + m_isa->install16_device(0x16ec, 0x16ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_config2_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach64_config2_w))); + m_isa->install16_device(0x1ae8, 0x1aeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_vsync_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_vsync_w))); + m_isa->install16_device(0x26e8, 0x26eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_htotal_r)), write16smo_delegate(*this)); + m_isa->install16_device(0x26ec, 0x26ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_crt_pitch_w))); + m_isa->install16_device(0x2ee8, 0x2eeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_subcontrol_r)),write16smo_delegate(*this)); + m_isa->install16_device(0x42e8, 0x42eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_substatus_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_subcontrol_w))); + m_isa->install16_device(0x42ec, 0x42ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_mem_boundary_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach32_mem_boundary_w))); + m_isa->install16_device(0x4ae8, 0x4aeb, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_advfunc_w))); + m_isa->install16_device(0x4aec, 0x4aef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_clksel_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_clksel_w))); + m_isa->install16_device(0x52e8, 0x52eb, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec0_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec0_w))); + m_isa->install16_device(0x52ec, 0x52ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_w))); + m_isa->install16_device(0x56e8, 0x56eb, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec1_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec1_w))); + m_isa->install16_device(0x56ec, 0x56ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_scratch0_w))); + m_isa->install16_device(0x5ae8, 0x5aeb, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec2_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec2_w))); + m_isa->install16_device(0x5ee8, 0x5eeb, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec3_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ec3_w))); + m_isa->install16_device(0x6eec, 0x6eef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ge_offset_l_w))); + m_isa->install16_device(0x72ec, 0x72ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ge_offset_h_w))); + m_isa->install16_device(0x76ec, 0x76ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ge_pitch_w))); + m_isa->install16_device(0x7aec, 0x7aef, read16s_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_s_r)), write16s_delegate(*m_vga, FUNC(mach64_device::mach32_ge_ext_config_w))); + m_isa->install16_device(0x82e8, 0x82eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_currenty_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_currenty_w))); + m_isa->install16_device(0x86e8, 0x86eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_currentx_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_currentx_w))); + m_isa->install16_device(0x8ae8, 0x8aeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_desty_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_desty_w))); + m_isa->install16_device(0x8ee8, 0x8eeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_destx_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_destx_w))); + m_isa->install16_device(0x8eec, 0x8eef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ge_ext_config_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_patt_data_w))); + m_isa->install16_device(0x92e8, 0x92eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_line_error_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_line_error_w))); + m_isa->install16_device(0x96e8, 0x96eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_width_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_width_w))); + m_isa->install16_device(0x96ec, 0x96ef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_bresenham_count_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_bresenham_count_w))); + m_isa->install16_device(0x9ae8, 0x9aeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_gpstatus_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_cmd_w))); + m_isa->install16_device(0x9aec, 0x9aef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ext_fifo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_linedraw_index_w))); + m_isa->install16_device(0x9ee8, 0x9eeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_ssv_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_ssv_w))); + m_isa->install16_device(0xa2e8, 0xa2eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_bgcolour_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_bgcolour_w))); + m_isa->install16_device(0xa6e8, 0xa6eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_fgcolour_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_fgcolour_w))); + m_isa->install16_device(0xaae8, 0xaaeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_write_mask_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_write_mask_w))); + m_isa->install16_device(0xaee8, 0xaeeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_read_mask_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_read_mask_w))); + m_isa->install16_device(0xb6e8, 0xb6eb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_backmix_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_backmix_w))); + m_isa->install16_device(0xbae8, 0xbaeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_foremix_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_foremix_w))); + m_isa->install16_device(0xbee8, 0xbeeb, read16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_multifunc_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::ibm8514_multifunc_w))); + m_isa->install16_device(0xcaec, 0xcaef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_scan_x_w))); + m_isa->install16_device(0xceec, 0xceef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_readonly_smo_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_dp_config_w))); + m_isa->install16_device(0xe2e8, 0xe2eb, read16sm_delegate(*m_vga, FUNC(mach64_device::ibm8514_pixel_xfer_r)), write16sm_delegate(*m_vga, FUNC(mach64_device::mach8_pixel_xfer_w))); + m_isa->install16_device(0xdaec, 0xdaef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_sourcex_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ext_leftscissor_w))); + m_isa->install16_device(0xdeec, 0xdeef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_sourcey_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_ext_topscissor_w))); + m_isa->install16_device(0xfaec, 0xfaef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach32_chipid_r)), write16smo_delegate(*this)); + m_isa->install16_device(0xfeec, 0xfeef, read16smo_delegate(*m_vga, FUNC(mach64_device::mach8_linedraw_r)), write16smo_delegate(*m_vga, FUNC(mach64_device::mach8_linedraw_w))); m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(mach64_device::mem_r)), write8sm_delegate(*m_vga, FUNC(mach64_device::mem_w))); } diff --git a/src/devices/machine/53c7xx.cpp b/src/devices/machine/53c7xx.cpp index 14f339c30f7..40c481a448f 100644 --- a/src/devices/machine/53c7xx.cpp +++ b/src/devices/machine/53c7xx.cpp @@ -213,7 +213,7 @@ void ncr53c7xx_device::device_reset() // read - Host read handler //------------------------------------------------- -READ32_MEMBER( ncr53c7xx_device::read ) +uint32_t ncr53c7xx_device::read(offs_t offset, uint32_t mem_mask) { LOGMASKED(LOG_HOST, "%s: REG R: [%x] (%08X)\n", machine().describe_context(), offset, mem_mask); @@ -456,7 +456,7 @@ READ32_MEMBER( ncr53c7xx_device::read ) // write - Host write handler //------------------------------------------------- -WRITE32_MEMBER( ncr53c7xx_device::write ) +void ncr53c7xx_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_HOST, "%s: REG W: [%x] (%08X) %x\n", offset, mem_mask, data, machine().describe_context()); diff --git a/src/devices/machine/53c7xx.h b/src/devices/machine/53c7xx.h index e6b846f0945..5adae84d790 100644 --- a/src/devices/machine/53c7xx.h +++ b/src/devices/machine/53c7xx.h @@ -28,8 +28,8 @@ public: auto host_read() { return m_host_read.bind(); } // our API - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/machine/68307.cpp b/src/devices/machine/68307.cpp index 7419b58937c..2a16def71d9 100644 --- a/src/devices/machine/68307.cpp +++ b/src/devices/machine/68307.cpp @@ -21,13 +21,13 @@ DEFINE_DEVICE_TYPE(M68307, m68307_cpu_device, "mc68307", "MC68307") a custom verson here, that may change later if subtle differences exist. */ -READ8_MEMBER( m68307_cpu_device::m68307_internal_serial_r ) +uint8_t m68307_cpu_device::m68307_internal_serial_r(offs_t offset) { if (offset&1) return m_duart->read(offset>>1); return 0x0000; } -WRITE8_MEMBER(m68307_cpu_device::m68307_internal_serial_w) +void m68307_cpu_device::m68307_internal_serial_w(offs_t offset, uint8_t data) { if (offset & 1) m_duart->write(offset >> 1, data); } @@ -279,7 +279,7 @@ void m68307_cpu_device::device_start() -READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) +uint16_t m68307_cpu_device::m68307_internal_base_r(offs_t offset, uint16_t mem_mask) { logerror("%08x m68307_internal_base_r %08x, (%04x)\n", m_ppc, offset*2,mem_mask); @@ -295,7 +295,7 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) return 0x0000; } -WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) +void m68307_cpu_device::m68307_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) { logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", m_ppc, offset*2,data,mem_mask); int base; @@ -320,10 +320,10 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) base = (m_m68307_base & 0x0fff) << 12; //mask = (m_m68307_base & 0xe000) >> 13; //if ( m_m68307_base & 0x1000 ) mask |= 7; - m_internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_sim_r)), write16_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_sim_w))); - m_internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_serial_r)), write8_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_serial_w)), 0xffff); - m_internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_timer_r)), write16_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_timer_w))); - m_internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_mbus_r)), write8_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_mbus_w)), 0xffff); + m_internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_sim_r)), write16_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_sim_w))); + m_internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8sm_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_serial_r)), write8sm_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_serial_w)), 0xffff); + m_internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16s_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_timer_r)), write16s_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_timer_w))); + m_internal->install_readwrite_handler(base + 0x140, base + 0x149, read8sm_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_mbus_r)), write8sm_delegate(*this, FUNC(m68307_cpu_device::m68307_internal_mbus_w)), 0xffff); break; diff --git a/src/devices/machine/68307.h b/src/devices/machine/68307.h index cecdda219d1..cc5638b5efb 100644 --- a/src/devices/machine/68307.h +++ b/src/devices/machine/68307.h @@ -60,16 +60,16 @@ private: int calc_cs(offs_t address) const; - DECLARE_READ16_MEMBER( m68307_internal_base_r ); - DECLARE_WRITE16_MEMBER( m68307_internal_base_w ); - DECLARE_READ16_MEMBER( m68307_internal_timer_r ); - DECLARE_WRITE16_MEMBER( m68307_internal_timer_w ); - DECLARE_READ16_MEMBER( m68307_internal_sim_r ); - DECLARE_WRITE16_MEMBER( m68307_internal_sim_w ); - DECLARE_READ8_MEMBER( m68307_internal_serial_r ); - DECLARE_WRITE8_MEMBER( m68307_internal_serial_w ); - DECLARE_READ8_MEMBER( m68307_internal_mbus_r ); - DECLARE_WRITE8_MEMBER( m68307_internal_mbus_w ); + uint16_t m68307_internal_base_r(offs_t offset, uint16_t mem_mask = ~0); + void m68307_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t m68307_internal_timer_r(offs_t offset, uint16_t mem_mask = ~0); + void m68307_internal_timer_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t m68307_internal_sim_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0); + void m68307_internal_sim_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t m68307_internal_serial_r(offs_t offset); + void m68307_internal_serial_w(offs_t offset, uint8_t data); + uint8_t m68307_internal_mbus_r(offs_t offset); + void m68307_internal_mbus_w(offs_t offset, uint8_t data); void internal_map(address_map &map); void cpu_space_map(address_map &map); diff --git a/src/devices/machine/68307bus.cpp b/src/devices/machine/68307bus.cpp index e6698e588ca..9b6788865e9 100644 --- a/src/devices/machine/68307bus.cpp +++ b/src/devices/machine/68307bus.cpp @@ -13,7 +13,7 @@ #define m68307BUS_MBSR (0x07) #define m68307BUS_MBDR (0x09) -READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) +uint8_t m68307_cpu_device::m68307_internal_mbus_r(offs_t offset) { assert(m_m68307MBUS); m68307_mbus &mbus = *m_m68307MBUS; @@ -55,7 +55,7 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) return 0xff; } -WRITE8_MEMBER( m68307_cpu_device::m68307_internal_mbus_w ) +void m68307_cpu_device::m68307_internal_mbus_w(offs_t offset, uint8_t data) { assert(m_m68307MBUS); m68307_mbus &mbus = *m_m68307MBUS; diff --git a/src/devices/machine/68307sim.cpp b/src/devices/machine/68307sim.cpp index b5363ecf6af..a62a2911ab4 100644 --- a/src/devices/machine/68307sim.cpp +++ b/src/devices/machine/68307sim.cpp @@ -32,7 +32,7 @@ #define m68307SIM_BR3 (0x4c) #define m68307SIM_OR3 (0x4e) -READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) +uint16_t m68307_cpu_device::m68307_internal_sim_r(address_space &space, offs_t offset, uint16_t mem_mask) { assert(m_m68307SIM); m68307_sim &sim = *m_m68307SIM; @@ -62,7 +62,7 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) } -WRITE16_MEMBER( m68307_cpu_device::m68307_internal_sim_w ) +void m68307_cpu_device::m68307_internal_sim_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask) { assert(m_m68307SIM); m68307_sim &sim = *m_m68307SIM; diff --git a/src/devices/machine/68307tmu.cpp b/src/devices/machine/68307tmu.cpp index 2b5e3efd2b2..02e98e78983 100644 --- a/src/devices/machine/68307tmu.cpp +++ b/src/devices/machine/68307tmu.cpp @@ -15,7 +15,7 @@ #define m68307TIMER_WCR (0x6) #define m68307TIMER_XXX (0x7) -READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) +uint16_t m68307_cpu_device::m68307_internal_timer_r(offs_t offset, uint16_t mem_mask) { assert(m_m68307TIMER); m68307_timer &timer = *m_m68307TIMER; @@ -36,7 +36,7 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) return 0x0000; } -WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) +void m68307_cpu_device::m68307_internal_timer_w(offs_t offset, uint16_t data, uint16_t mem_mask) { assert(m_m68307TIMER); m68307_timer &timer = *m_m68307TIMER; diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index c5a9c7637f5..56a4ff007a6 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -127,14 +127,14 @@ uint8_t m68340_cpu_device::int_ack(offs_t offset) /* 68340 specifics - MOVE */ -READ32_MEMBER( m68340_cpu_device::m68340_internal_base_r ) +uint32_t m68340_cpu_device::m68340_internal_base_r(offs_t offset, uint32_t mem_mask) { if (!machine().side_effects_disabled()) LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); return m_m68340_base; } -WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) +void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); @@ -162,26 +162,26 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) int base = m_m68340_base & 0xfffff000; m_internal->install_readwrite_handler(base + 0x000, base + 0x03f, - read16_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_r)), - write16_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_w)),0xffffffff); + read16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_r)), + write16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_w)),0xffffffff); m_internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping - read8_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_r)), - write8_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_w)),0xffffffff); + read8sm_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_r)), + write8sm_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_w)),0xffffffff); m_internal->install_readwrite_handler(base + 0x040, base + 0x05f, - read32_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_r)), - write32_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_w))); + read32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_r)), + write32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_w))); m_internal->install_readwrite_handler(base + 0x600, base + 0x63f, - read16_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::read)), - write16_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::write)),0xffffffff); + read16s_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::read)), + write16s_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::write)),0xffffffff); m_internal->install_readwrite_handler(base + 0x640, base + 0x67f, - read16_delegate(*m_timer[1], FUNC(mc68340_timer_module_device::read)), - write16_delegate(*m_timer[1], FUNC(mc68340_timer_module_device::write)),0xffffffff); + read16s_delegate(*m_timer[1], FUNC(mc68340_timer_module_device::read)), + write16s_delegate(*m_timer[1], FUNC(mc68340_timer_module_device::write)),0xffffffff); m_internal->install_readwrite_handler(base + 0x700, base + 0x723, read8sm_delegate(*m_serial, FUNC(mc68340_serial_module_device::read)), write8sm_delegate(*m_serial, FUNC(mc68340_serial_module_device::write)),0xffffffff); m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf, - read32_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_r)), - write32_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_w))); + read32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_r)), + write32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_w))); } } else diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h index d513320c993..7f9d5c1e706 100644 --- a/src/devices/machine/68340.h +++ b/src/devices/machine/68340.h @@ -83,16 +83,16 @@ private: m_clock_mode |= (m68340_sim::CLOCK_MODCK | m68340_sim::CLOCK_PLL); } - READ32_MEMBER( m68340_internal_base_r ); - WRITE32_MEMBER( m68340_internal_base_w ); - READ32_MEMBER( m68340_internal_dma_r ); - WRITE32_MEMBER( m68340_internal_dma_w ); - READ16_MEMBER( m68340_internal_sim_r ); - READ8_MEMBER( m68340_internal_sim_ports_r ); - READ32_MEMBER( m68340_internal_sim_cs_r ); - WRITE16_MEMBER( m68340_internal_sim_w ); - WRITE8_MEMBER( m68340_internal_sim_ports_w ); - WRITE32_MEMBER( m68340_internal_sim_cs_w ); + uint32_t m68340_internal_base_r(offs_t offset, uint32_t mem_mask = ~0); + void m68340_internal_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t m68340_internal_dma_r(offs_t offset, uint32_t mem_mask = ~0); + void m68340_internal_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t m68340_internal_sim_r(offs_t offset, uint16_t mem_mask = ~0); + uint8_t m68340_internal_sim_ports_r(offs_t offset); + uint32_t m68340_internal_sim_cs_r(offs_t offset, uint32_t mem_mask = ~0); + void m68340_internal_sim_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void m68340_internal_sim_ports_w(offs_t offset, uint8_t data); + void m68340_internal_sim_cs_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); // Clock/VCO setting TODO: support external clock with PLL and Limp mode DECLARE_WRITE_LINE_MEMBER( set_modck ); diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp index 4a79a4504fc..6cff61a9464 100644 --- a/src/devices/machine/68340dma.cpp +++ b/src/devices/machine/68340dma.cpp @@ -6,7 +6,7 @@ #include "68340.h" -READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) +uint32_t m68340_cpu_device::m68340_internal_dma_r(offs_t offset, uint32_t mem_mask) { assert(m_m68340DMA); //m68340_dma &dma = *m_m68340DMA; @@ -16,7 +16,7 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) return 0x00000000; } -WRITE32_MEMBER( m68340_cpu_device::m68340_internal_dma_w ) +void m68340_cpu_device::m68340_internal_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask) { assert(m_m68340DMA); //m68340_dma &dma = *m_m68340DMA; diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index 3dbbfcb0733..9f351cade15 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -42,7 +42,7 @@ #define FUNCNAME __PRETTY_FUNCTION__ #endif -READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r ) +uint16_t m68340_cpu_device::m68340_internal_sim_r(offs_t offset, uint16_t mem_mask) { LOGR("%s\n", FUNCNAME); assert(m_m68340SIM); @@ -98,7 +98,7 @@ READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r ) return val; } -WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w ) +void m68340_cpu_device::m68340_internal_sim_w(offs_t offset, uint16_t data, uint16_t mem_mask) { LOG("\n%s\n", FUNCNAME); LOGSETUP(" * Reg %02x <- %02x - %s\n", offset * 2, data, @@ -194,7 +194,7 @@ WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w ) } } -READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r ) +uint8_t m68340_cpu_device::m68340_internal_sim_ports_r(offs_t offset) { LOGR("%s\n", FUNCNAME); offset += 0x10; @@ -280,7 +280,7 @@ READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r ) return val; } -WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w ) +void m68340_cpu_device::m68340_internal_sim_ports_w(offs_t offset, uint8_t data) { LOG("%s", FUNCNAME); offset += 0x10; @@ -342,7 +342,7 @@ WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w ) } } -READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r ) +uint32_t m68340_cpu_device::m68340_internal_sim_cs_r(offs_t offset, uint32_t mem_mask) { LOGR("%s\n", FUNCNAME); offset += m68340_sim::REG_AM_CS0>>2; @@ -368,7 +368,7 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r ) return 0x00000000; } -WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) +void m68340_cpu_device::m68340_internal_sim_cs_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOG("%s\n", FUNCNAME); offset += m68340_sim::REG_AM_CS0>>2; diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp index f1d0f7f3330..d66f1f2387c 100644 --- a/src/devices/machine/68340tmu.cpp +++ b/src/devices/machine/68340tmu.cpp @@ -38,7 +38,7 @@ #define FUNCNAME __PRETTY_FUNCTION__ #endif -READ16_MEMBER( mc68340_timer_module_device::read ) +uint16_t mc68340_timer_module_device::read(offs_t offset, uint16_t mem_mask) { LOGSETUP("%s\n", FUNCNAME); @@ -100,7 +100,7 @@ READ16_MEMBER( mc68340_timer_module_device::read ) return val; } -WRITE16_MEMBER( mc68340_timer_module_device::write ) +void mc68340_timer_module_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) { LOGSETUP("\n%s\n", FUNCNAME); LOGSETUP(" * Timer%d Reg %02x [%02x] <- %02x - %s\n", m_cpu->get_timer_index(this) + 1, (offset * 2), offset, data, diff --git a/src/devices/machine/68340tmu.h b/src/devices/machine/68340tmu.h index 0f324337405..653226f8887 100644 --- a/src/devices/machine/68340tmu.h +++ b/src/devices/machine/68340tmu.h @@ -14,8 +14,8 @@ class mc68340_timer_module_device : public device_t public: mc68340_timer_module_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); - READ16_MEMBER( read ); - WRITE16_MEMBER( write ); + uint16_t read(offs_t offset, uint16_t mem_mask = ~0); + void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); DECLARE_WRITE_LINE_MEMBER( tin_w ); DECLARE_WRITE_LINE_MEMBER( tgate_w ); diff --git a/src/devices/machine/7200fifo.h b/src/devices/machine/7200fifo.h index 3af0a1bde53..4ed323a98ac 100644 --- a/src/devices/machine/7200fifo.h +++ b/src/devices/machine/7200fifo.h @@ -71,12 +71,12 @@ public: DECLARE_READ_LINE_MEMBER( hf_r ) { return !m_hf; } // _HF // normal configuration - DECLARE_WRITE16_MEMBER( data_word_w ) { fifo_write(data); } - DECLARE_READ16_MEMBER( data_word_r ) { return (uint16_t)fifo_read(); } + void data_word_w(uint16_t data) { fifo_write(data); } + uint16_t data_word_r() { return (uint16_t)fifo_read(); } // use these for simple configurations that don't have d8/q8 connected - DECLARE_WRITE8_MEMBER( data_byte_w ) { fifo_write(data); } - DECLARE_READ8_MEMBER( data_byte_r ) { return (uint8_t)fifo_read(); } + void data_byte_w(uint8_t data) { fifo_write(data); } + uint8_t data_byte_r() { return (uint8_t)fifo_read(); } protected: fifo7200_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, int size); diff --git a/src/devices/machine/8364_paula.cpp b/src/devices/machine/8364_paula.cpp index 8ec3f85cbbe..a340b5a523c 100644 --- a/src/devices/machine/8364_paula.cpp +++ b/src/devices/machine/8364_paula.cpp @@ -75,7 +75,7 @@ void paula_8364_device::update() // IMPLEMENTATION //************************************************************************** -READ16_MEMBER( paula_8364_device::reg_r ) +uint16_t paula_8364_device::reg_r(offs_t offset) { switch (offset) { diff --git a/src/devices/machine/8364_paula.h b/src/devices/machine/8364_paula.h index 5094f77f5f3..0a7016c4496 100644 --- a/src/devices/machine/8364_paula.h +++ b/src/devices/machine/8364_paula.h @@ -58,7 +58,7 @@ public: auto mem_read_cb() { return m_mem_r.bind(); } auto int_cb() { return m_int_w.bind(); } - DECLARE_READ16_MEMBER(reg_r); + uint16_t reg_r(offs_t offset); void reg_w(offs_t offset, uint16_t data); void update(); diff --git a/src/devices/machine/acorn_vidc.cpp b/src/devices/machine/acorn_vidc.cpp index 54317b991e2..65487e2b63a 100644 --- a/src/devices/machine/acorn_vidc.cpp +++ b/src/devices/machine/acorn_vidc.cpp @@ -291,7 +291,7 @@ inline void acorn_vidc10_device::screen_dynamic_res_change() // READ/WRITE HANDLERS //************************************************************************** -WRITE32_MEMBER( acorn_vidc10_device::write ) +void acorn_vidc10_device::write(offs_t offset, u32 data, u32 mem_mask) { // TODO: check against mem_mask not 32-bit wide u8 reg = data >> 24; @@ -314,7 +314,7 @@ inline void acorn_vidc10_device::update_4bpp_palette(u16 index, u32 paldata) screen().update_partial(screen().vpos()); } -WRITE32_MEMBER( acorn_vidc10_device::pal_data_display_w ) +void acorn_vidc10_device::pal_data_display_w(offs_t offset, u32 data) { update_4bpp_palette(offset+0x100, data); //printf("%02x: %01x %01x %01x [%d]\n",offset,r,g,b,screen().vpos()); @@ -330,12 +330,12 @@ WRITE32_MEMBER( acorn_vidc10_device::pal_data_display_w ) } } -WRITE32_MEMBER( acorn_vidc10_device::pal_data_cursor_w ) +void acorn_vidc10_device::pal_data_cursor_w(offs_t offset, u32 data) { update_4bpp_palette(offset+0x110, data); } -WRITE32_MEMBER( acorn_vidc10_device::control_w ) +void acorn_vidc10_device::control_w(u32 data) { // TODO: not sure what the commented out bits do m_pixel_clock = (data & 0x03); @@ -358,7 +358,7 @@ inline u32 acorn_vidc10_device::convert_crtc_hdisplay(u8 index) return (m_crtc_raw_horz[index]*2)+x_step[m_bpp_mode]; } -WRITE32_MEMBER( acorn_vidc10_device::crtc_w ) +void acorn_vidc10_device::crtc_w(offs_t offset, u32 data) { switch(offset) { @@ -420,14 +420,14 @@ inline void acorn_vidc10_device::refresh_stereo_image(u8 channel) } -WRITE32_MEMBER( acorn_vidc10_device::stereo_image_w ) +void acorn_vidc10_device::stereo_image_w(offs_t offset, u32 data) { u8 channel = (offset + 7) & 0x7; m_stereo_image[channel] = data & 0x7; refresh_stereo_image(channel); } -WRITE32_MEMBER( acorn_vidc10_device::sound_frequency_w ) +void acorn_vidc10_device::sound_frequency_w(u32 data) { m_sound_frequency_test_bit = BIT(data, 8); m_sound_frequency_latch = data & 0xff; @@ -643,7 +643,7 @@ inline void arm_vidc20_device::update_8bpp_palette(u16 index, u32 paldata) screen().update_partial(screen().vpos()); } -WRITE32_MEMBER(arm_vidc20_device::vidc20_pal_data_display_w) +void arm_vidc20_device::vidc20_pal_data_display_w(offs_t offset, u32 data) { u8 ext_data = offset & 0xf; update_8bpp_palette(m_pal_data_index, (ext_data<<24) | data); @@ -651,12 +651,12 @@ WRITE32_MEMBER(arm_vidc20_device::vidc20_pal_data_display_w) m_pal_data_index &= 0xff; } -WRITE32_MEMBER( arm_vidc20_device::vidc20_pal_data_index_w ) +void arm_vidc20_device::vidc20_pal_data_index_w(u32 data) { m_pal_data_index = data & 0xff; } -WRITE32_MEMBER( arm_vidc20_device::vidc20_pal_data_cursor_w ) +void arm_vidc20_device::vidc20_pal_data_cursor_w(offs_t offset, u32 data) { u8 ext_data = offset & 0xf; u8 cursor_pal_index = (offset >> 4) & 3; @@ -681,7 +681,7 @@ u32 arm_vidc20_device::get_pixel_clock() throw emu_fatalerror("%s unhandled pixel source %02x selected",this->tag(), m_pixel_source); } -WRITE32_MEMBER(arm_vidc20_device::vidc20_crtc_w) +void arm_vidc20_device::vidc20_crtc_w(offs_t offset, u32 data) { if (offset & 0x8) throw emu_fatalerror("%s accessing CRTC test register %02x, please call the ambulance",this->tag(),offset+0x80); @@ -717,7 +717,7 @@ WRITE32_MEMBER(arm_vidc20_device::vidc20_crtc_w) screen_dynamic_res_change(); } -WRITE32_MEMBER( arm_vidc20_device::fsynreg_w ) +void arm_vidc20_device::fsynreg_w(u32 data) { m_vco_r_modulo = data & 0x3f; m_vco_v_modulo = (data >> 8) & 0x3f; @@ -726,7 +726,7 @@ WRITE32_MEMBER( arm_vidc20_device::fsynreg_w ) screen_dynamic_res_change(); } -WRITE32_MEMBER( arm_vidc20_device::vidc20_control_w ) +void arm_vidc20_device::vidc20_control_w(u32 data) { // ---- --00: VCLK // ---- --01: HCLK @@ -745,13 +745,13 @@ WRITE32_MEMBER( arm_vidc20_device::vidc20_control_w ) screen_dynamic_res_change(); } -WRITE32_MEMBER( arm_vidc20_device::vidc20_sound_control_w ) +void arm_vidc20_device::vidc20_sound_control_w(u32 data) { // TODO: VIDC10 mode, ext clock bit 0 m_dac_serial_mode = BIT(data, 1); } -WRITE32_MEMBER( arm_vidc20_device::vidc20_sound_frequency_w ) +void arm_vidc20_device::vidc20_sound_frequency_w(u32 data) { m_sound_frequency_latch = data & 0xff; if (m_sound_mode == true) diff --git a/src/devices/machine/acorn_vidc.h b/src/devices/machine/acorn_vidc.h index 1931e1ee0d6..c7620ecec65 100644 --- a/src/devices/machine/acorn_vidc.h +++ b/src/devices/machine/acorn_vidc.h @@ -37,7 +37,7 @@ public: acorn_vidc10_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); // I/O operations - DECLARE_WRITE32_MEMBER( write ); + void write(offs_t offset, u32 data, u32 mem_mask = ~0); DECLARE_READ_LINE_MEMBER( flyback_r ); auto vblank() { return m_vblank_cb.bind(); } auto sound_drq() { return m_sound_drq_cb.bind(); } @@ -99,12 +99,12 @@ private: devcb_write_line m_vblank_cb; devcb_write_line m_sound_drq_cb; - DECLARE_WRITE32_MEMBER( pal_data_display_w ); - DECLARE_WRITE32_MEMBER( pal_data_cursor_w ); - DECLARE_WRITE32_MEMBER( stereo_image_w ); - DECLARE_WRITE32_MEMBER( crtc_w ); - DECLARE_WRITE32_MEMBER( sound_frequency_w ); - DECLARE_WRITE32_MEMBER( control_w ); + void pal_data_display_w(offs_t offset, u32 data); + void pal_data_cursor_w(offs_t offset, u32 data); + void stereo_image_w(offs_t offset, u32 data); + void crtc_w(offs_t offset, u32 data); + void sound_frequency_w(u32 data); + void control_w(u32 data); u8 m_pixel_clock; bool m_cursor_enable; @@ -168,14 +168,14 @@ protected: const double m_sound_internal_divider = 1.0; private: - DECLARE_WRITE32_MEMBER( vidc20_pal_data_display_w ); - DECLARE_WRITE32_MEMBER( vidc20_pal_data_index_w ); - DECLARE_WRITE32_MEMBER( vidc20_pal_data_cursor_w ); - DECLARE_WRITE32_MEMBER( vidc20_crtc_w ); - DECLARE_WRITE32_MEMBER( vidc20_control_w ); - DECLARE_WRITE32_MEMBER( vidc20_sound_frequency_w ); - DECLARE_WRITE32_MEMBER( vidc20_sound_control_w ); - DECLARE_WRITE32_MEMBER( fsynreg_w ); + void vidc20_pal_data_display_w(offs_t offset, u32 data); + void vidc20_pal_data_index_w(u32 data); + void vidc20_pal_data_cursor_w(offs_t offset, u32 data); + void vidc20_crtc_w(offs_t offset, u32 data); + void vidc20_control_w(u32 data); + void vidc20_sound_frequency_w(u32 data); + void vidc20_sound_control_w(u32 data); + void fsynreg_w(u32 data); u8 m_pal_data_index; inline void update_8bpp_palette(u16 index, u32 paldata); diff --git a/src/devices/machine/aicartc.cpp b/src/devices/machine/aicartc.cpp index c6d5beb5a45..0f8ad30c283 100644 --- a/src/devices/machine/aicartc.cpp +++ b/src/devices/machine/aicartc.cpp @@ -128,7 +128,7 @@ void aicartc_device::device_timer(emu_timer &timer, device_timer_id id, int para // READ/WRITE HANDLERS //************************************************************************** -READ16_MEMBER( aicartc_device::read ) +uint16_t aicartc_device::read(offs_t offset) { uint16_t res; @@ -144,7 +144,7 @@ READ16_MEMBER( aicartc_device::read ) return res; } -WRITE16_MEMBER( aicartc_device::write ) +void aicartc_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) { switch(offset) { diff --git a/src/devices/machine/aicartc.h b/src/devices/machine/aicartc.h index 71c8cdd55ad..6af901ac363 100644 --- a/src/devices/machine/aicartc.h +++ b/src/devices/machine/aicartc.h @@ -21,8 +21,8 @@ public: aicartc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // I/O operations - DECLARE_WRITE16_MEMBER( write ); - DECLARE_READ16_MEMBER( read ); + void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t read(offs_t offset); uint16_t m_rtc_reg_lo,m_rtc_reg_hi; uint16_t m_rtc_tick; diff --git a/src/devices/machine/akiko.cpp b/src/devices/machine/akiko.cpp index e3e49eb1364..1505eab2a56 100644 --- a/src/devices/machine/akiko.cpp +++ b/src/devices/machine/akiko.cpp @@ -769,7 +769,7 @@ void akiko_device::update_cdrom() } } -READ32_MEMBER( akiko_device::read ) +uint32_t akiko_device::read(offs_t offset) { uint32_t retval; @@ -831,7 +831,7 @@ READ32_MEMBER( akiko_device::read ) return 0; } -WRITE32_MEMBER( akiko_device::write ) +void akiko_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { if ( LOG_AKIKO && offset < (0x30/4) ) { diff --git a/src/devices/machine/akiko.h b/src/devices/machine/akiko.h index 32056917e9b..8a0ffec8e76 100644 --- a/src/devices/machine/akiko.h +++ b/src/devices/machine/akiko.h @@ -41,8 +41,8 @@ public: auto sda_r_callback() { return m_sda_r.bind(); } auto sda_w_callback() { return m_sda_w.bind(); } - DECLARE_READ32_MEMBER( read ); - DECLARE_WRITE32_MEMBER( write ); + uint32_t read(offs_t offset); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/machine/am79c90.cpp b/src/devices/machine/am79c90.cpp index 5ca3515ffc1..c48a8cd8236 100644 --- a/src/devices/machine/am79c90.cpp +++ b/src/devices/machine/am79c90.cpp @@ -525,7 +525,7 @@ void am7990_device_base::send_complete_cb(int result) m_transmit_poll->adjust(attotime::zero, 0, TX_POLL_PERIOD); } -READ16_MEMBER(am7990_device_base::regs_r) +u16 am7990_device_base::regs_r(address_space &space, offs_t offset) { if (!offset) { @@ -540,7 +540,7 @@ READ16_MEMBER(am7990_device_base::regs_r) return m_rap; } -WRITE16_MEMBER(am7990_device_base::regs_w) +void am7990_device_base::regs_w(offs_t offset, u16 data) { if (!offset) { diff --git a/src/devices/machine/am79c90.h b/src/devices/machine/am79c90.h index 258c5f27506..06ec00558b7 100644 --- a/src/devices/machine/am79c90.h +++ b/src/devices/machine/am79c90.h @@ -15,8 +15,8 @@ public: auto dma_in() { return m_dma_in_cb.bind(); } auto dma_out() { return m_dma_out_cb.bind(); } - DECLARE_READ16_MEMBER(regs_r); - DECLARE_WRITE16_MEMBER(regs_w); + u16 regs_r(address_space &space, offs_t offset); + void regs_w(offs_t offset, u16 data); void reset_w(int state) { if (!state) device_reset(); } diff --git a/src/devices/machine/arm_iomd.cpp b/src/devices/machine/arm_iomd.cpp index 4749d93c922..e33863976ba 100644 --- a/src/devices/machine/arm_iomd.cpp +++ b/src/devices/machine/arm_iomd.cpp @@ -339,7 +339,7 @@ void arm_iomd_device::device_timer(emu_timer &timer, device_timer_id id, int par //************************************************************************** // TODO: nINT1 -READ32_MEMBER( arm_iomd_device::iocr_r ) +u32 arm_iomd_device::iocr_r() { u8 res = 0; @@ -350,7 +350,7 @@ READ32_MEMBER( arm_iomd_device::iocr_r ) return (m_vidc->flyback_r() << 7) | 0x34 | (res & m_iocr_ddr); } -WRITE32_MEMBER( arm_iomd_device::iocr_w ) +void arm_iomd_device::iocr_w(u32 data) { m_iocr_ddr = (data & 0x0b); m_iocr_write_id_cb(BIT(m_iocr_ddr,3)); @@ -358,7 +358,7 @@ WRITE32_MEMBER( arm_iomd_device::iocr_w ) m_iocr_write_od_cb[0](BIT(m_iocr_ddr,0)); } -READ32_MEMBER( arm_iomd_device::kbddat_r ) +u32 arm_iomd_device::kbddat_r() { if (m_kbdc.found()) return m_kbdc->data_r(); @@ -367,7 +367,7 @@ READ32_MEMBER( arm_iomd_device::kbddat_r ) return 0xff; } -READ32_MEMBER( arm_iomd_device::kbdcr_r ) +u32 arm_iomd_device::kbdcr_r() { if (m_kbdc.found()) return m_kbdc->status_r(); @@ -376,7 +376,7 @@ READ32_MEMBER( arm_iomd_device::kbdcr_r ) return 0xff; } -WRITE32_MEMBER( arm_iomd_device::kbddat_w ) +void arm_iomd_device::kbddat_w(u32 data) { if (m_kbdc.found()) { @@ -387,7 +387,7 @@ WRITE32_MEMBER( arm_iomd_device::kbddat_w ) logerror("%s attempted to write %02x on kbddat with no controller\n", this->tag(),data & 0xff); } -WRITE32_MEMBER( arm_iomd_device::kbdcr_w ) +void arm_iomd_device::kbdcr_w(u32 data) { if (m_kbdc.found()) { @@ -398,23 +398,23 @@ WRITE32_MEMBER( arm_iomd_device::kbdcr_w ) logerror("%s attempted to write %02x on kbdcr with no controller\n", this->tag(),data & 0xff); } -READ32_MEMBER( arm7500fe_iomd_device::msecr_r ) +u32 arm7500fe_iomd_device::msecr_r() { // a7000p wants a TX empty otherwise it outright refuses to boot. return 0x80; } -WRITE32_MEMBER( arm7500fe_iomd_device::msecr_w ) +void arm7500fe_iomd_device::msecr_w(u32 data) { // ... } -READ32_MEMBER( arm7500fe_iomd_device::iolines_r ) +u32 arm7500fe_iomd_device::iolines_r() { return m_iolines_read_cb() & m_iolines_ddr; } -WRITE32_MEMBER( arm7500fe_iomd_device::iolines_w ) +void arm7500fe_iomd_device::iolines_w(u32 data) { m_iolines_ddr = data; m_iolines_write_cb(m_iolines_ddr); @@ -440,22 +440,22 @@ template <unsigned Which> inline void arm_iomd_device::trigger_irq(u8 irq_type) flush_irq(Which); } -template <unsigned Which> READ32_MEMBER( arm_iomd_device::irqst_r ) +template <unsigned Which> u32 arm_iomd_device::irqst_r() { return m_irq_status[Which]; } -template <unsigned Which> READ32_MEMBER( arm_iomd_device::irqrq_r ) +template <unsigned Which> u32 arm_iomd_device::irqrq_r() { return m_irq_status[Which] & m_irq_mask[Which]; } -template <unsigned Which> READ32_MEMBER( arm_iomd_device::irqmsk_r ) +template <unsigned Which> u32 arm_iomd_device::irqmsk_r() { return m_irq_mask[Which]; } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::irqrq_w ) +template <unsigned Which> void arm_iomd_device::irqrq_w(u32 data) { u8 res = m_irq_status[Which] & ~data; if (Which == IRQA) @@ -464,7 +464,7 @@ template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::irqrq_w ) flush_irq(Which); } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::irqmsk_w ) +template <unsigned Which> void arm_iomd_device::irqmsk_w(u32 data) { m_irq_mask[Which] = data & 0xff; flush_irq(Which); @@ -476,12 +476,12 @@ inline void arm7500fe_iomd_device::refresh_host_cpu_clocks() m_host_cpu->set_unscaled_clock(this->clock() >> (m_cpuclk_divider == false)); } -READ32_MEMBER( arm7500fe_iomd_device::clkctl_r ) +u32 arm7500fe_iomd_device::clkctl_r() { return (m_cpuclk_divider << 2) | (m_memclk_divider << 1) | (m_ioclk_divider); } -WRITE32_MEMBER( arm7500fe_iomd_device::clkctl_w ) +void arm7500fe_iomd_device::clkctl_w(u32 data) { m_cpuclk_divider = BIT(data, 2); m_memclk_divider = BIT(data, 1); @@ -503,33 +503,33 @@ inline void arm_iomd_device::trigger_timer(unsigned Which) } // TODO: live updates aren't really supported here -template <unsigned Which> READ32_MEMBER( arm_iomd_device::tNlow_r ) +template <unsigned Which> u32 arm_iomd_device::tNlow_r() { return m_timer_out[Which] & 0xff; } -template <unsigned Which> READ32_MEMBER( arm_iomd_device::tNhigh_r ) +template <unsigned Which> u32 arm_iomd_device::tNhigh_r() { return (m_timer_out[Which] >> 8) & 0xff; } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::tNlow_w ) +template <unsigned Which> void arm_iomd_device::tNlow_w(u32 data) { m_timer_in[Which] = (m_timer_in[Which] & 0xff00) | (data & 0xff); } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::tNhigh_w ) +template <unsigned Which> void arm_iomd_device::tNhigh_w(u32 data) { m_timer_in[Which] = (m_timer_in[Which] & 0x00ff) | ((data & 0xff) << 8); } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::tNgo_w ) +template <unsigned Which> void arm_iomd_device::tNgo_w(u32 data) { m_timer_counter[Which] = m_timer_in[Which]; trigger_timer(Which); } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::tNlatch_w ) +template <unsigned Which> void arm_iomd_device::tNlatch_w(u32 data) { m_timer_readinc[Which] ^=1; m_timer_out[Which] = m_timer_counter[Which]; @@ -542,28 +542,28 @@ template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::tNlatch_w ) } // device identifiers -template <unsigned Nibble> READ32_MEMBER( arm_iomd_device::id_r ) +template <unsigned Nibble> u32 arm_iomd_device::id_r() { return (m_id >> (Nibble*8)) & 0xff; } -READ32_MEMBER( arm_iomd_device::version_r ) +u32 arm_iomd_device::version_r() { return m_version; } -DECLARE_READ32_MEMBER( version_r ); +u32 version_r(); // sound DMA -template <unsigned Which> READ32_MEMBER( arm_iomd_device::sdcur_r ) { return m_sndcur_reg[Which]; } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::sdcur_w ) { COMBINE_DATA(&m_sndcur_reg[Which]); } -template <unsigned Which> READ32_MEMBER( arm_iomd_device::sdend_r ) +template <unsigned Which> u32 arm_iomd_device::sdcur_r() { return m_sndcur_reg[Which]; } +template <unsigned Which> void arm_iomd_device::sdcur_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_sndcur_reg[Which]); } +template <unsigned Which> u32 arm_iomd_device::sdend_r() { return (m_sndstop_reg[Which] << 31) | (m_sndlast_reg[Which] << 30) | (m_sndend_reg[Which] & 0x00fffff0); } -template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::sdend_w ) +template <unsigned Which> void arm_iomd_device::sdend_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_sndend_reg[Which]); m_sndend_reg[Which] &= 0x00fffff0; @@ -571,12 +571,12 @@ template <unsigned Which> WRITE32_MEMBER( arm_iomd_device::sdend_w ) m_sndlast_reg[Which] = BIT(data, 30); } -READ32_MEMBER( arm_iomd_device::sdcr_r ) +u32 arm_iomd_device::sdcr_r() { return (m_sound_dma_on << 5) | dmaid_size; } -WRITE32_MEMBER( arm_iomd_device::sdcr_w ) +void arm_iomd_device::sdcr_w(u32 data) { m_sound_dma_on = BIT(data, 5); @@ -594,18 +594,18 @@ WRITE32_MEMBER( arm_iomd_device::sdcr_w ) // TODO: bit 7 resets sound DMA } -READ32_MEMBER( arm_iomd_device::sdst_r ) +u32 arm_iomd_device::sdst_r() { return (m_snd_overrun << 2) | (m_snd_int << 1) | m_sndcur_buffer; } // video DMA -READ32_MEMBER( arm_iomd_device::cursinit_r ) +u32 arm_iomd_device::cursinit_r() { return m_cursinit; } -WRITE32_MEMBER( arm_iomd_device::cursinit_w ) +void arm_iomd_device::cursinit_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_cursinit); m_cursinit &= 0x1ffffff0; @@ -613,14 +613,14 @@ WRITE32_MEMBER( arm_iomd_device::cursinit_w ) m_vidc->set_cursor_enable(m_cursor_enable); } -READ32_MEMBER( arm_iomd_device::vidcr_r ) +u32 arm_iomd_device::vidcr_r() { // bit 6: DRAM mode // bits 4-0: qword transfer return 0x40 | (m_video_enable << 5) | dmaid_size; } -WRITE32_MEMBER( arm_iomd_device::vidcr_w ) +void arm_iomd_device::vidcr_w(u32 data) { m_video_enable = BIT(data, 5); if (m_video_enable == false) @@ -633,23 +633,23 @@ WRITE32_MEMBER( arm_iomd_device::vidcr_w ) throw emu_fatalerror("%s VIDCR LCD dual panel mode enabled", this->tag()); } -READ32_MEMBER( arm_iomd_device::vidend_r ) +u32 arm_iomd_device::vidend_r() { return (m_vidend & 0x00fffff0); } -WRITE32_MEMBER( arm_iomd_device::vidend_w ) +void arm_iomd_device::vidend_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_vidend); m_vidend &= 0x00fffff0; } -READ32_MEMBER( arm_iomd_device::vidinita_r ) +u32 arm_iomd_device::vidinita_r() { return (m_vidlast << 30) | (m_videqual << 29) | (m_vidinita & 0x1ffffff0); } -WRITE32_MEMBER( arm_iomd_device::vidinita_w ) +void arm_iomd_device::vidinita_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_vidinita); m_vidinita &= 0x1ffffff0; diff --git a/src/devices/machine/arm_iomd.h b/src/devices/machine/arm_iomd.h index 1e672b2473e..482c06b8cbc 100644 --- a/src/devices/machine/arm_iomd.h +++ b/src/devices/machine/arm_iomd.h @@ -76,11 +76,11 @@ protected: IRQDMA, IRQ_SOURCES_SIZE }; - template <unsigned Which> DECLARE_READ32_MEMBER( irqst_r ); - template <unsigned Which> DECLARE_READ32_MEMBER( irqrq_r ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( irqrq_w ); - template <unsigned Which> DECLARE_READ32_MEMBER( irqmsk_r ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( irqmsk_w ); + template <unsigned Which> u32 irqst_r(); + template <unsigned Which> u32 irqrq_r(); + template <unsigned Which> void irqrq_w(u32 data); + template <unsigned Which> u32 irqmsk_r(); + template <unsigned Which> void irqmsk_w(u32 data); // TODO: convert to ARM7 device instead, enums shouldn't be public required_device<cpu_device> m_host_cpu; @@ -95,27 +95,27 @@ private: devcb_read_line m_iocr_read_id_cb; devcb_write_line m_iocr_write_id_cb; - DECLARE_READ32_MEMBER( iocr_r ); - DECLARE_WRITE32_MEMBER( iocr_w ); + u32 iocr_r(); + void iocr_w(u32 data); - DECLARE_READ32_MEMBER( kbddat_r ); - DECLARE_WRITE32_MEMBER( kbddat_w ); - DECLARE_READ32_MEMBER( kbdcr_r ); - DECLARE_WRITE32_MEMBER( kbdcr_w ); + u32 kbddat_r(); + void kbddat_w(u32 data); + u32 kbdcr_r(); + void kbdcr_w(u32 data); u32 m_vidinita, m_vidend; bool m_vidlast, m_videqual; bool m_video_enable; - DECLARE_READ32_MEMBER( vidcr_r ); - DECLARE_WRITE32_MEMBER( vidcr_w ); - DECLARE_READ32_MEMBER( vidend_r ); - DECLARE_WRITE32_MEMBER( vidend_w ); - DECLARE_READ32_MEMBER( vidinita_r ); - DECLARE_WRITE32_MEMBER( vidinita_w ); + u32 vidcr_r(); + void vidcr_w(u32 data); + u32 vidend_r(); + void vidend_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 vidinita_r(); + void vidinita_w(offs_t offset, u32 data, u32 mem_mask = ~0); u32 m_cursinit; bool m_cursor_enable; - DECLARE_READ32_MEMBER( cursinit_r ); - DECLARE_WRITE32_MEMBER( cursinit_w ); + u32 cursinit_r(); + void cursinit_w(offs_t offset, u32 data, u32 mem_mask = ~0); static constexpr int sounddma_ch_size = 2; u32 m_sndcur, m_sndend; @@ -126,13 +126,13 @@ private: u8 m_sndcur_buffer; bool m_snd_overrun, m_snd_int; inline void sounddma_swap_buffer(); - template <unsigned Which> DECLARE_READ32_MEMBER( sdcur_r ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( sdcur_w ); - template <unsigned Which> DECLARE_READ32_MEMBER( sdend_r ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( sdend_w ); - DECLARE_READ32_MEMBER( sdcr_r ); - DECLARE_WRITE32_MEMBER( sdcr_w ); - DECLARE_READ32_MEMBER( sdst_r ); + template <unsigned Which> u32 sdcur_r(); + template <unsigned Which> void sdcur_w(offs_t offset, u32 data, u32 mem_mask = ~0); + template <unsigned Which> u32 sdend_r(); + template <unsigned Which> void sdend_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 sdcr_r(); + void sdcr_w(u32 data); + u32 sdst_r(); u8 m_irq_status[IRQ_SOURCES_SIZE], m_irq_mask[IRQ_SOURCES_SIZE]; inline u8 update_irqa_type(u8 data); @@ -151,15 +151,15 @@ private: u8 m_timer_readinc[2]; emu_timer *m_timer[2]; - template <unsigned Which> DECLARE_READ32_MEMBER( tNlow_r ); - template <unsigned Which> DECLARE_READ32_MEMBER( tNhigh_r ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( tNlow_w ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( tNhigh_w ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( tNgo_w ); - template <unsigned Which> DECLARE_WRITE32_MEMBER( tNlatch_w ); + template <unsigned Which> u32 tNlow_r(); + template <unsigned Which> u32 tNhigh_r(); + template <unsigned Which> void tNlow_w(u32 data); + template <unsigned Which> void tNhigh_w(u32 data); + template <unsigned Which> void tNgo_w(u32 data); + template <unsigned Which> void tNlatch_w(u32 data); - template <unsigned Nibble> DECLARE_READ32_MEMBER( id_r ); - DECLARE_READ32_MEMBER( version_r ); + template <unsigned Nibble> u32 id_r(); + u32 version_r(); // used in vidcr_r / sndcr_r, documentation hints this is a purged idea during chip development, to be checked out static constexpr u8 dmaid_size = 0x10; // qword transfer @@ -186,15 +186,15 @@ private: bool m_cpuclk_divider, m_memclk_divider, m_ioclk_divider; inline void refresh_host_cpu_clocks(); - DECLARE_READ32_MEMBER( clkctl_r ); - DECLARE_WRITE32_MEMBER( clkctl_w ); + u32 clkctl_r(); + void clkctl_w(u32 data); u8 m_iolines_ddr; - DECLARE_READ32_MEMBER( iolines_r ); - DECLARE_WRITE32_MEMBER( iolines_w ); + u32 iolines_r(); + void iolines_w(u32 data); - DECLARE_READ32_MEMBER( msecr_r ); - DECLARE_WRITE32_MEMBER( msecr_w ); + u32 msecr_r(); + void msecr_w(u32 data); }; // device type definition diff --git a/src/devices/machine/ataflash.cpp b/src/devices/machine/ataflash.cpp index 4ab3099f330..464bd074cdf 100644 --- a/src/devices/machine/ataflash.cpp +++ b/src/devices/machine/ataflash.cpp @@ -33,7 +33,7 @@ void ata_flash_pccard_device::device_reset() m_pin_replacement = 0x002e; } -READ16_MEMBER( ata_flash_pccard_device::read_memory ) +uint16_t ata_flash_pccard_device::read_memory(offs_t offset, uint16_t mem_mask) { if(offset <= 7) { @@ -50,7 +50,7 @@ READ16_MEMBER( ata_flash_pccard_device::read_memory ) } } -WRITE16_MEMBER( ata_flash_pccard_device::write_memory ) +void ata_flash_pccard_device::write_memory(offs_t offset, uint16_t data, uint16_t mem_mask) { if(offset <= 7) { @@ -63,7 +63,7 @@ WRITE16_MEMBER( ata_flash_pccard_device::write_memory ) } } -READ16_MEMBER( ata_flash_pccard_device::read_reg ) +uint16_t ata_flash_pccard_device::read_reg(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -81,10 +81,10 @@ READ16_MEMBER( ata_flash_pccard_device::read_reg ) return m_cis[offset]; } - return device_pccard_interface::read_reg(space, offset, mem_mask); + return device_pccard_interface::read_reg(offset, mem_mask); } -WRITE16_MEMBER( ata_flash_pccard_device::write_reg ) +void ata_flash_pccard_device::write_reg(offs_t offset, uint16_t data, uint16_t mem_mask) { /// TODO: get offsets from CIS switch (offset) @@ -107,7 +107,7 @@ WRITE16_MEMBER( ata_flash_pccard_device::write_reg ) break; default: - device_pccard_interface::write_reg(space, offset, data, mem_mask); + device_pccard_interface::write_reg(offset, data, mem_mask); break; } } @@ -146,7 +146,7 @@ void taito_pccard1_device::device_reset() } } -READ16_MEMBER(taito_pccard1_device::read_reg) +uint16_t taito_pccard1_device::read_reg(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -154,11 +154,11 @@ READ16_MEMBER(taito_pccard1_device::read_reg) return m_locked != 0; default: - return ata_flash_pccard_device::read_reg(space, offset, mem_mask); + return ata_flash_pccard_device::read_reg(offset, mem_mask); } } -WRITE16_MEMBER(taito_pccard1_device::write_reg) +void taito_pccard1_device::write_reg(offs_t offset, uint16_t data, uint16_t mem_mask) { if (offset >= 0x280 && offset <= 0x288) { @@ -180,7 +180,7 @@ WRITE16_MEMBER(taito_pccard1_device::write_reg) } else { - ata_flash_pccard_device::write_reg(space, offset, data, mem_mask); + ata_flash_pccard_device::write_reg(offset, data, mem_mask); } } diff --git a/src/devices/machine/ataflash.h b/src/devices/machine/ataflash.h index 6bf9ce3242b..dad05081ff6 100644 --- a/src/devices/machine/ataflash.h +++ b/src/devices/machine/ataflash.h @@ -15,10 +15,10 @@ class ata_flash_pccard_device : public ide_hdd_device, public device_pccard_inte public: ata_flash_pccard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ16_MEMBER(read_memory) override; - virtual DECLARE_WRITE16_MEMBER(write_memory) override; - virtual DECLARE_READ16_MEMBER(read_reg) override; - virtual DECLARE_WRITE16_MEMBER(write_reg) override; + virtual uint16_t read_memory(offs_t offset, uint16_t mem_mask = ~0) override; + virtual void write_memory(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; + virtual uint16_t read_reg(offs_t offset, uint16_t mem_mask = ~0) override; + virtual void write_reg(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; protected: ata_flash_pccard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -43,8 +43,8 @@ class taito_pccard1_device : public ata_flash_pccard_device public: taito_pccard1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_READ16_MEMBER(read_reg) override; - virtual DECLARE_WRITE16_MEMBER(write_reg) override; + virtual uint16_t read_reg(offs_t offset, uint16_t mem_mask = ~0) override; + virtual void write_reg(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; protected: virtual void device_start() override; diff --git a/src/devices/machine/atmel_arm_aic.cpp b/src/devices/machine/atmel_arm_aic.cpp index 600bd09f832..258bb3ae438 100644 --- a/src/devices/machine/atmel_arm_aic.cpp +++ b/src/devices/machine/atmel_arm_aic.cpp @@ -42,7 +42,7 @@ void arm_aic_device::regs_map(address_map &map) map(0x148, 0x14b).r(FUNC(arm_aic_device::aic_ffsr_r)); // AIC_FFSR Fast Forcing Status Register } -READ32_MEMBER(arm_aic_device::irq_vector_r) +uint32_t arm_aic_device::irq_vector_r() { uint32_t mask = m_irqs_enabled & m_irqs_pending & ~m_fast_irqs; m_current_irq_vector = m_spurious_vector; @@ -78,7 +78,7 @@ READ32_MEMBER(arm_aic_device::irq_vector_r) return m_current_irq_vector; } -READ32_MEMBER(arm_aic_device::firq_vector_r) +uint32_t arm_aic_device::firq_vector_r() { m_current_firq_vector = (m_irqs_enabled & m_irqs_pending & m_fast_irqs) ? m_aic_svr[0] : m_spurious_vector; return m_current_firq_vector; diff --git a/src/devices/machine/atmel_arm_aic.h b/src/devices/machine/atmel_arm_aic.h index 0e9e2fcdd21..cc0388d21f3 100644 --- a/src/devices/machine/atmel_arm_aic.h +++ b/src/devices/machine/atmel_arm_aic.h @@ -52,29 +52,29 @@ private: void pop_level() { if (m_lvlidx) --m_lvlidx; }; int get_level() { return m_level_stack[m_lvlidx]; }; - DECLARE_READ32_MEMBER(irq_vector_r); - DECLARE_READ32_MEMBER(firq_vector_r); - DECLARE_READ32_MEMBER(aic_isr_r) { return m_status; }; - DECLARE_READ32_MEMBER(aic_cisr_r) { return m_core_status; }; - DECLARE_READ32_MEMBER(aic_ipr_r) { return m_irqs_pending; }; - DECLARE_READ32_MEMBER(aic_imr_r) { return m_irqs_enabled; }; - DECLARE_READ32_MEMBER(aic_ffsr_r) { return m_fast_irqs; }; + uint32_t irq_vector_r(); + uint32_t firq_vector_r(); + uint32_t aic_isr_r() { return m_status; }; + uint32_t aic_cisr_r() { return m_core_status; }; + uint32_t aic_ipr_r() { return m_irqs_pending; }; + uint32_t aic_imr_r() { return m_irqs_enabled; }; + uint32_t aic_ffsr_r() { return m_fast_irqs; }; // can't use ram() and share() in device submaps - DECLARE_READ32_MEMBER(aic_smr_r) { return m_aic_smr[offset]; }; - DECLARE_READ32_MEMBER(aic_svr_r) { return m_aic_svr[offset]; }; - DECLARE_WRITE32_MEMBER(aic_smr_w) { COMBINE_DATA(&m_aic_smr[offset]); }; - DECLARE_WRITE32_MEMBER(aic_svr_w) { COMBINE_DATA(&m_aic_svr[offset]); }; - DECLARE_WRITE32_MEMBER(aic_spu_w) { COMBINE_DATA(&m_spurious_vector); }; - DECLARE_WRITE32_MEMBER(aic_dcr_w) { COMBINE_DATA(&m_debug); check_irqs(); }; - DECLARE_WRITE32_MEMBER(aic_ffer_w) { m_fast_irqs |= data & mem_mask; check_irqs(); }; - DECLARE_WRITE32_MEMBER(aic_ffdr_w) { m_fast_irqs &= ~(data & mem_mask) | 1; check_irqs(); }; - - DECLARE_WRITE32_MEMBER(aic_iecr_w) { m_irqs_enabled |= data & mem_mask; check_irqs(); }; - DECLARE_WRITE32_MEMBER(aic_idcr_w) { m_irqs_enabled &= ~(data & mem_mask); check_irqs(); }; - DECLARE_WRITE32_MEMBER(aic_iccr_w) { m_irqs_pending &= ~(data & mem_mask); check_irqs(); }; - DECLARE_WRITE32_MEMBER(aic_iscr_w) { m_irqs_pending |= data & mem_mask; check_irqs(); }; - DECLARE_WRITE32_MEMBER(aic_eoicr_w) { m_status = 0; pop_level(); check_irqs(); }; + uint32_t aic_smr_r(offs_t offset) { return m_aic_smr[offset]; }; + uint32_t aic_svr_r(offs_t offset) { return m_aic_svr[offset]; }; + void aic_smr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { COMBINE_DATA(&m_aic_smr[offset]); }; + void aic_svr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { COMBINE_DATA(&m_aic_svr[offset]); }; + void aic_spu_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { COMBINE_DATA(&m_spurious_vector); }; + void aic_dcr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { COMBINE_DATA(&m_debug); check_irqs(); }; + void aic_ffer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_fast_irqs |= data & mem_mask; check_irqs(); }; + void aic_ffdr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_fast_irqs &= ~(data & mem_mask) | 1; check_irqs(); }; + + void aic_iecr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_irqs_enabled |= data & mem_mask; check_irqs(); }; + void aic_idcr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_irqs_enabled &= ~(data & mem_mask); check_irqs(); }; + void aic_iccr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_irqs_pending &= ~(data & mem_mask); check_irqs(); }; + void aic_iscr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { m_irqs_pending |= data & mem_mask; check_irqs(); }; + void aic_eoicr_w(uint32_t data) { m_status = 0; pop_level(); check_irqs(); }; }; #endif diff --git a/src/devices/machine/autoconfig.cpp b/src/devices/machine/autoconfig.cpp index 9ee2a53d087..36bca48fa4b 100644 --- a/src/devices/machine/autoconfig.cpp +++ b/src/devices/machine/autoconfig.cpp @@ -120,7 +120,7 @@ void amiga_autoconfig::autoconfig_rom_vector(uint16_t data) // MEMORY INTERFACE //************************************************************************** -READ16_MEMBER( amiga_autoconfig::autoconfig_read ) +uint16_t amiga_autoconfig::autoconfig_read(address_space &space, offs_t offset, uint16_t mem_mask) { uint16_t data = m_cfg[offset] | 0x0fff; @@ -130,7 +130,7 @@ READ16_MEMBER( amiga_autoconfig::autoconfig_read ) return data; } -WRITE16_MEMBER( amiga_autoconfig::autoconfig_write ) +void amiga_autoconfig::autoconfig_write(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask) { if (VERBOSE && !dynamic_cast<device_t *>(this)->machine().side_effects_disabled()) space.device().logerror("autoconfig_write %04x @ %02x [mask = %04x]\n", data, offset, mem_mask); diff --git a/src/devices/machine/autoconfig.h b/src/devices/machine/autoconfig.h index 409f21b4eb9..510b282e8bf 100644 --- a/src/devices/machine/autoconfig.h +++ b/src/devices/machine/autoconfig.h @@ -19,10 +19,10 @@ public: virtual ~amiga_autoconfig(); // read from autoconfig space - DECLARE_READ16_MEMBER( autoconfig_read ); + uint16_t autoconfig_read(address_space &space, offs_t offset, uint16_t mem_mask = ~0); // write to autoconfig space - DECLARE_WRITE16_MEMBER( autoconfig_write ); + void autoconfig_write(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: enum board_type diff --git a/src/devices/machine/dmac.cpp b/src/devices/machine/dmac.cpp index 811b660d0a5..0705f28c060 100644 --- a/src/devices/machine/dmac.cpp +++ b/src/devices/machine/dmac.cpp @@ -112,9 +112,10 @@ void amiga_dmac_device::autoconfig_base_address(offs_t address) LOG("-> installing dmac\n"); // internal dmac registers - m_space->install_readwrite_handler(address, address + 0xff, - read16_delegate(*this, FUNC(amiga_dmac_device::register_read)), - write16_delegate(*this, FUNC(amiga_dmac_device::register_write)), 0xffff); + m_space->install_read_handler(address, address + 0xff, + read16_delegate(*this, FUNC(amiga_dmac_device::register_read)), 0xffff); + m_space->install_write_handler(address, address + 0xff, + write16s_delegate(*this, FUNC(amiga_dmac_device::register_write)), 0xffff); // install access to the rom space if (m_rom) @@ -166,7 +167,7 @@ void amiga_dmac_device::start_dma() // IMPLEMENTATION //************************************************************************** -READ16_MEMBER( amiga_dmac_device::register_read ) +uint16_t amiga_dmac_device::register_read(address_space &space, offs_t offset, uint16_t mem_mask) { uint16_t data = 0xffff; @@ -243,7 +244,7 @@ READ16_MEMBER( amiga_dmac_device::register_read ) return data; } -WRITE16_MEMBER( amiga_dmac_device::register_write ) +void amiga_dmac_device::register_write(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/dmac.h b/src/devices/machine/dmac.h index 203317dd742..47c5f9f93d3 100644 --- a/src/devices/machine/dmac.h +++ b/src/devices/machine/dmac.h @@ -47,8 +47,8 @@ public: DECLARE_WRITE_LINE_MEMBER( xdreq_w ); // dmac register access - DECLARE_READ16_MEMBER( register_read ); - DECLARE_WRITE16_MEMBER( register_write ); + uint16_t register_read(address_space &space, offs_t offset, uint16_t mem_mask = ~0); + void register_write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/machine/gayle.cpp b/src/devices/machine/gayle.cpp index 95db4ad9e47..1f048a83e30 100644 --- a/src/devices/machine/gayle.cpp +++ b/src/devices/machine/gayle.cpp @@ -80,7 +80,7 @@ void gayle_device::device_reset() // IMPLEMENTATION //************************************************************************** -READ16_MEMBER( gayle_device::gayle_r ) +uint16_t gayle_device::gayle_r(offs_t offset, uint16_t mem_mask) { uint16_t data = 0xffff; offset <<= 1; @@ -118,7 +118,7 @@ READ16_MEMBER( gayle_device::gayle_r ) return data; } -WRITE16_MEMBER( gayle_device::gayle_w ) +void gayle_device::gayle_w(offs_t offset, uint16_t data, uint16_t mem_mask) { offset <<= 1; @@ -180,7 +180,7 @@ WRITE_LINE_MEMBER( gayle_device::ide_interrupt_w ) m_int2_w(BIT(m_gayle_reg[GAYLE_CS], 7)); } -READ16_MEMBER( gayle_device::gayle_id_r ) +uint16_t gayle_device::gayle_id_r(offs_t offset, uint16_t mem_mask) { uint16_t data; @@ -195,7 +195,7 @@ READ16_MEMBER( gayle_device::gayle_id_r ) return data; } -WRITE16_MEMBER( gayle_device::gayle_id_w ) +void gayle_device::gayle_id_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (VERBOSE) logerror("gayle_id_w(%06x): %04x & %04x (id=%02x)\n", offset, data, mem_mask, m_gayle_id); diff --git a/src/devices/machine/gayle.h b/src/devices/machine/gayle.h index 20c554adf34..c756e6117b7 100644 --- a/src/devices/machine/gayle.h +++ b/src/devices/machine/gayle.h @@ -36,10 +36,10 @@ public: // interface DECLARE_WRITE_LINE_MEMBER( ide_interrupt_w ); - DECLARE_READ16_MEMBER( gayle_r ); - DECLARE_WRITE16_MEMBER( gayle_w ); - DECLARE_READ16_MEMBER( gayle_id_r ); - DECLARE_WRITE16_MEMBER( gayle_id_w ); + uint16_t gayle_r(offs_t offset, uint16_t mem_mask = ~0); + void gayle_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t gayle_id_r(offs_t offset, uint16_t mem_mask = ~0); + void gayle_id_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); // inline configuration void set_id(uint8_t id) { m_gayle_id = id; } diff --git a/src/devices/machine/generalplus_gpl16250soc.cpp b/src/devices/machine/generalplus_gpl16250soc.cpp index 03e1a3baeca..54bed91ff31 100644 --- a/src/devices/machine/generalplus_gpl16250soc.cpp +++ b/src/devices/machine/generalplus_gpl16250soc.cpp @@ -61,7 +61,7 @@ uint16_t sunplus_gcm394_base_device::read_dma_params(int channel, int offset) return retdata; } -void sunplus_gcm394_base_device::write_dma_params(int channel, int offset, uint16_t data, address_space& space) +void sunplus_gcm394_base_device::write_dma_params(int channel, int offset, uint16_t data) { LOGMASKED(LOG_GCM394_SYSDMA, "%s:sunplus_gcm394_base_device::write_dma_params (channel %01x) %01x %04x\n", machine().describe_context(), channel, offset, data); @@ -78,63 +78,63 @@ void sunplus_gcm394_base_device::write_dma_params(int channel, int offset, uint1 m_dma_latched[channel] = true; if (m_dma_params[0][channel] & 1) - trigger_systemm_dma(space, channel); + trigger_systemm_dma(channel); } if (offset == 0 && (data & 1)) { if (m_dma_latched[channel]) - trigger_systemm_dma(space, channel); + trigger_systemm_dma(channel); } } -READ16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel0_r) +uint16_t sunplus_gcm394_base_device::system_dma_params_channel0_r(offs_t offset) { return read_dma_params(0, offset); } -WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel0_w) +void sunplus_gcm394_base_device::system_dma_params_channel0_w(offs_t offset, uint16_t data) { - write_dma_params(0, offset, data, space); + write_dma_params(0, offset, data); } -READ16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel1_r) +uint16_t sunplus_gcm394_base_device::system_dma_params_channel1_r(offs_t offset) { return read_dma_params(1, offset); } -WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel1_w) +void sunplus_gcm394_base_device::system_dma_params_channel1_w(offs_t offset, uint16_t data) { - write_dma_params(1, offset, data, space); + write_dma_params(1, offset, data); } -READ16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel2_r) +uint16_t sunplus_gcm394_base_device::system_dma_params_channel2_r(offs_t offset) { return read_dma_params(2, offset); } -WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel2_w) +void sunplus_gcm394_base_device::system_dma_params_channel2_w(offs_t offset, uint16_t data) { - write_dma_params(2, offset, data, space); + write_dma_params(2, offset, data); } -READ16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel3_r) +uint16_t sunplus_gcm394_base_device::system_dma_params_channel3_r(offs_t offset) { return read_dma_params(3, offset); } -WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_params_channel3_w) +void sunplus_gcm394_base_device::system_dma_params_channel3_w(offs_t offset, uint16_t data) { - write_dma_params(3, offset, data, space); + write_dma_params(3, offset, data); } -READ16_MEMBER(sunplus_gcm394_base_device::system_dma_status_r) +uint16_t sunplus_gcm394_base_device::system_dma_status_r() { LOGMASKED(LOG_GCM394_SYSDMA, "%s:sunplus_gcm394_base_device::system_dma_status_r (7abf)\n", machine().describe_context()); @@ -144,7 +144,7 @@ READ16_MEMBER(sunplus_gcm394_base_device::system_dma_status_r) return 0x00ff; } -void sunplus_gcm394_base_device::trigger_systemm_dma(address_space &space, int channel) +void sunplus_gcm394_base_device::trigger_systemm_dma(int channel) { uint16_t mode = m_dma_params[0][channel]; uint32_t source = m_dma_params[1][channel] | (m_dma_params[4][channel] << 16); @@ -228,20 +228,20 @@ void sunplus_gcm394_base_device::trigger_systemm_dma(address_space &space, int c } -WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_7abf_unk_w) +void sunplus_gcm394_base_device::system_dma_7abf_unk_w(uint16_t data) { // if this isn't trigger, is it enable? (which could maybe used as similar if DMA only starts to happen if unmasked?) LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_dma_7abf_unk_w %04x\n", machine().describe_context(), data); } -READ16_MEMBER(sunplus_gcm394_base_device::system_dma_memtype_r) +uint16_t sunplus_gcm394_base_device::system_dma_memtype_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_dma_memtype_r\n", machine().describe_context()); return m_system_dma_memtype; } -WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_memtype_w) +void sunplus_gcm394_base_device::system_dma_memtype_w(uint16_t data) { static char const* const types[16] = { @@ -272,38 +272,38 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::system_dma_memtype_w) } -READ16_MEMBER(sunplus_gcm394_base_device::system_7a35_r) +uint16_t sunplus_gcm394_base_device::system_7a35_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_7a35_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::system_7a37_r) +uint16_t sunplus_gcm394_base_device::system_7a37_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_7a37_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::system_7a39_r) +uint16_t sunplus_gcm394_base_device::system_7a39_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_7a39_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::system_7a3a_r) +uint16_t sunplus_gcm394_base_device::system_7a3a_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_7a3a_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::system_7a46_r) +uint16_t sunplus_gcm394_base_device::system_7a46_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_7a46_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::system_7a54_r) +uint16_t sunplus_gcm394_base_device::system_7a54_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::system_7a54_r\n", machine().describe_context()); return machine().rand(); @@ -311,13 +311,13 @@ READ16_MEMBER(sunplus_gcm394_base_device::system_7a54_r) // **************************************** 78xx region with some handling ************************************************* -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_780f_status_r) +uint16_t sunplus_gcm394_base_device::unkarea_780f_status_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_780f_status_r\n", machine().describe_context()); return 0x0002; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78fb_status_r) +uint16_t sunplus_gcm394_base_device::unkarea_78fb_status_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78fb_status_r\n", machine().describe_context()); m_78fb ^= 0x0100; // status flag for something? @@ -325,20 +325,20 @@ READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78fb_status_r) } // sets bit 0x0002 then expects it to have cleared -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7819_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7819_r\n", machine().describe_context()); return m_7819 & ~ 0x0002; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7819_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7819_w %04x\n", machine().describe_context(), data); m_7819 = data; } +uint16_t sunplus_gcm394_base_device::unkarea_7819_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7819_r\n", machine().describe_context()); return m_7819 & ~ 0x0002; } +void sunplus_gcm394_base_device::unkarea_7819_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7819_w %04x\n", machine().describe_context(), data); m_7819 = data; } // **************************************** 78xx region stubs ************************************************* -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_782d_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_782d_r\n", machine().describe_context()); return m_782d; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_782d_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_782d_w %04x\n", machine().describe_context(), data); m_782d = data; } +uint16_t sunplus_gcm394_base_device::unkarea_782d_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_782d_r\n", machine().describe_context()); return m_782d; } +void sunplus_gcm394_base_device::unkarea_782d_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_782d_w %04x\n", machine().describe_context(), data); m_782d = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7803_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7803_r\n", machine().describe_context()); return m_7803; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7803_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7803_w %04x\n", machine().describe_context(), data); m_7803 = data; } +uint16_t sunplus_gcm394_base_device::unkarea_7803_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7803_r\n", machine().describe_context()); return m_7803; } +void sunplus_gcm394_base_device::unkarea_7803_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7803_w %04x\n", machine().describe_context(), data); m_7803 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7807_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7807_w %04x\n", machine().describe_context(), data); m_7807 = data; } +void sunplus_gcm394_base_device::unkarea_7807_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7807_w %04x\n", machine().describe_context(), data); m_7807 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::waitmode_enter_780c_w) +void sunplus_gcm394_base_device::waitmode_enter_780c_w(uint16_t data) { // LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::waitmode_enter_780c_w %04x\n", machine().describe_context(), data); // must be followed by 6 nops to ensure wait mode is entered @@ -347,13 +347,13 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::waitmode_enter_780c_w) // this gets stored / modified / restored before certain memory accesses ( // used extensively during SDRAM checks in jak_gtg and jak_car2 -READ16_MEMBER(sunplus_gcm394_base_device::membankswitch_7810_r) +uint16_t sunplus_gcm394_base_device::membankswitch_7810_r() { // LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::membankswitch_7810_r\n", machine().describe_context()); return m_membankswitch_7810; } -WRITE16_MEMBER(sunplus_gcm394_base_device::membankswitch_7810_w) +void sunplus_gcm394_base_device::membankswitch_7810_w(uint16_t data) { // if (m_membankswitch_7810 != data) // LOGMASKED(LOG_GCM394,"%s:sunplus_gcm394_base_device::membankswitch_7810_w %04x\n", machine().describe_context(), data); @@ -365,19 +365,19 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::membankswitch_7810_w) } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7816_w) +void sunplus_gcm394_base_device::unkarea_7816_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7816_w %04x\n", machine().describe_context(), data); m_7816 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7817_w) +void sunplus_gcm394_base_device::unkarea_7817_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7817_w %04x\n", machine().describe_context(), data); m_7817 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::chipselect_csx_memory_device_control_w) +void sunplus_gcm394_base_device::chipselect_csx_memory_device_control_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::chipselect_csx_memory_device_control_w %04x (782x registers offset %d)\n", machine().describe_context(), data, offset); m_782x[offset] = data; @@ -408,55 +408,55 @@ void sunplus_gcm394_base_device::device_post_load() m_cs_callback(m_782x[0], m_782x[1], m_782x[2], m_782x[3], m_782x[4]); } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7835_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7835_w %04x\n", machine().describe_context(), data); m_7835 = data; } +void sunplus_gcm394_base_device::unkarea_7835_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7835_w %04x\n", machine().describe_context(), data); m_7835 = data; } // IO here? // Port A -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7860_porta_r) +uint16_t sunplus_gcm394_base_device::ioarea_7860_porta_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7860_porta_r\n", machine().describe_context()); return m_porta_in(); } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7860_porta_w) +void sunplus_gcm394_base_device::ioarea_7860_porta_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7860_porta_w %04x\n", machine().describe_context(), data); if (m_porta_out) m_porta_out(data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7861_porta_buffer_r) +uint16_t sunplus_gcm394_base_device::ioarea_7861_porta_buffer_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7861_porta_buffer_r\n", machine().describe_context()); return 0x0000;// 0xffff;// m_7861; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7861_porta_buffer_w) +void sunplus_gcm394_base_device::ioarea_7861_porta_buffer_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7861_porta_buffer_w %04x\n", machine().describe_context(), data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7862_porta_direction_r) +uint16_t sunplus_gcm394_base_device::ioarea_7862_porta_direction_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7862_porta_direction_r\n", machine().describe_context()); return m_7862_porta_direction; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7862_porta_direction_w) +void sunplus_gcm394_base_device::ioarea_7862_porta_direction_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7862_porta_direction_w %04x\n", machine().describe_context(), data); m_7862_porta_direction = data; } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7863_porta_attribute_r) +uint16_t sunplus_gcm394_base_device::ioarea_7863_porta_attribute_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7863_porta_attribute_r\n", machine().describe_context()); return m_7863_porta_attribute; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7863_porta_attribute_w) +void sunplus_gcm394_base_device::ioarea_7863_porta_attribute_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7863_porta_attribute_w %04x\n", machine().describe_context(), data); m_7863_porta_attribute = data; @@ -464,49 +464,49 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7863_porta_attribute_w) // Port B -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7868_portb_r) +uint16_t sunplus_gcm394_base_device::ioarea_7868_portb_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7868_portb_r\n", machine().describe_context()); return m_portb_in(); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7869_portb_buffer_r) +uint16_t sunplus_gcm394_base_device::ioarea_7869_portb_buffer_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7869_portb_buffer_r\n", machine().describe_context()); return machine().rand(); } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7869_portb_buffer_w) +void sunplus_gcm394_base_device::ioarea_7869_portb_buffer_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7869_portb_buffer_w %04x\n", machine().describe_context(), data); } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7868_portb_w) +void sunplus_gcm394_base_device::ioarea_7868_portb_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7868_portb_w %04x\n", machine().describe_context(), data); if (m_portb_out) m_portb_out(data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_786a_portb_direction_r) +uint16_t sunplus_gcm394_base_device::ioarea_786a_portb_direction_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_786a_portb_direction_r\n", machine().describe_context()); return m_786a_portb_direction; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_786a_portb_direction_w) +void sunplus_gcm394_base_device::ioarea_786a_portb_direction_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_786a_portb_direction_w %04x\n", machine().describe_context(), data); m_786a_portb_direction = data; } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_786b_portb_attribute_r) +uint16_t sunplus_gcm394_base_device::ioarea_786b_portb_attribute_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_786b_portb_attribute_r\n", machine().describe_context()); return m_786b_portb_attribute; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_786b_portb_attribute_w) +void sunplus_gcm394_base_device::ioarea_786b_portb_attribute_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_786b_portb_attribute_w %04x\n", machine().describe_context(), data); m_786b_portb_attribute = data; @@ -514,13 +514,13 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_786b_portb_attribute_w) // Port C -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7870_portc_r) +uint16_t sunplus_gcm394_base_device::ioarea_7870_portc_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7870_portc_r\n", machine().describe_context()); return m_portc_in(); } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7870_portc_w) +void sunplus_gcm394_base_device::ioarea_7870_portc_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7870_portc_w %04x\n", machine().describe_context(), data); m_7870 = data; @@ -528,37 +528,37 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7870_portc_w) m_portc_out(data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7871_portc_buffer_r) +uint16_t sunplus_gcm394_base_device::ioarea_7871_portc_buffer_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7871_portc_buffer_r\n", machine().describe_context()); return 0xffff;// m_7871; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7871_portc_buffer_w) +void sunplus_gcm394_base_device::ioarea_7871_portc_buffer_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7871_portc_buffer_w %04x\n", machine().describe_context(), data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7872_portc_direction_r) +uint16_t sunplus_gcm394_base_device::ioarea_7872_portc_direction_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7872_portc_direction_r\n", machine().describe_context()); return m_7872_portc_direction; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7872_portc_direction_w) +void sunplus_gcm394_base_device::ioarea_7872_portc_direction_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7872_portc_direction_w %04x\n", machine().describe_context(), data); m_7872_portc_direction = data; } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7873_portc_attribute_r) +uint16_t sunplus_gcm394_base_device::ioarea_7873_portc_attribute_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7873_portc_attribute_r\n", machine().describe_context()); return m_7873_portc_attribute; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7873_portc_attribute_w) +void sunplus_gcm394_base_device::ioarea_7873_portc_attribute_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7873_portc_attribute_w %04x\n", machine().describe_context(), data); m_7873_portc_attribute = data; @@ -566,13 +566,13 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7873_portc_attribute_w) // Port D -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7878_portd_r) +uint16_t sunplus_gcm394_base_device::ioarea_7878_portd_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7878_portd_r\n", machine().describe_context()); return m_portd_in(); } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7878_portd_w) +void sunplus_gcm394_base_device::ioarea_7878_portd_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7878_portd_w %04x\n", machine().describe_context(), data); //m_7878 = data; @@ -581,91 +581,91 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7878_portd_w) m_portd_out(data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_7879_portd_buffer_r) +uint16_t sunplus_gcm394_base_device::ioarea_7879_portd_buffer_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7879_portd_buffer_r\n", machine().describe_context()); return 0xffff;// m_7871; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_7879_portd_buffer_w) +void sunplus_gcm394_base_device::ioarea_7879_portd_buffer_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_7879_portd_buffer_w %04x\n", machine().describe_context(), data); } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_787a_portd_direction_r) +uint16_t sunplus_gcm394_base_device::ioarea_787a_portd_direction_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_787a_portd_direction_r\n", machine().describe_context()); return m_787a_portd_direction; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_787a_portd_direction_w) +void sunplus_gcm394_base_device::ioarea_787a_portd_direction_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_787a_portd_direction_w %04x\n", machine().describe_context(), data); m_787a_portd_direction = data; } -READ16_MEMBER(sunplus_gcm394_base_device::ioarea_787b_portd_attribute_r) +uint16_t sunplus_gcm394_base_device::ioarea_787b_portd_attribute_r() { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_787b_portd_attribute_r\n", machine().describe_context()); return m_787b_portd_attribute; } -WRITE16_MEMBER(sunplus_gcm394_base_device::ioarea_787b_portd_attribute_w) +void sunplus_gcm394_base_device::ioarea_787b_portd_attribute_w(uint16_t data) { LOGMASKED(LOG_GCM394_IO, "%s:sunplus_gcm394_base_device::ioarea_787b_portd_attribute_w %04x\n", machine().describe_context(), data); m_787b_portd_attribute = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7882_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7882_r\n", machine().describe_context()); return 0xffff;// m_7882; +uint16_t sunplus_gcm394_base_device::unkarea_7882_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7882_r\n", machine().describe_context()); return 0xffff;// m_7882; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7882_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7882_w %04x\n", machine().describe_context(), data); m_7882 = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7883_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7883_r\n", machine().describe_context()); return 0xffff;// m_7883; +void sunplus_gcm394_base_device::unkarea_7882_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7882_w %04x\n", machine().describe_context(), data); m_7882 = data; } +uint16_t sunplus_gcm394_base_device::unkarea_7883_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7883_r\n", machine().describe_context()); return 0xffff;// m_7883; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7883_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7883_w %04x\n", machine().describe_context(), data); m_7883 = data; } +void sunplus_gcm394_base_device::unkarea_7883_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7883_w %04x\n", machine().describe_context(), data); m_7883 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78a0_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a0_w %04x\n", machine().describe_context(), data); m_78a0 = data; } +void sunplus_gcm394_base_device::unkarea_78a0_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a0_w %04x\n", machine().describe_context(), data); m_78a0 = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78a0_r) +uint16_t sunplus_gcm394_base_device::unkarea_78a0_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a0_r\n", machine().describe_context()); return 0x0000;// machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78a1_r) +uint16_t sunplus_gcm394_base_device::unkarea_78a1_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a1_r\n", machine().describe_context()); return 0xffff;// machine().rand(); } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78a4_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a4_w %04x\n", machine().describe_context(), data); m_78a4 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78a5_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a5_w %04x\n", machine().describe_context(), data); m_78a5 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78a6_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a6_w %04x\n", machine().describe_context(), data); m_78a6 = data; } +void sunplus_gcm394_base_device::unkarea_78a4_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a4_w %04x\n", machine().describe_context(), data); m_78a4 = data; } +void sunplus_gcm394_base_device::unkarea_78a5_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a5_w %04x\n", machine().describe_context(), data); m_78a5 = data; } +void sunplus_gcm394_base_device::unkarea_78a6_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a6_w %04x\n", machine().describe_context(), data); m_78a6 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78a8_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a8_w %04x\n", machine().describe_context(), data); m_78a8 = data; } +void sunplus_gcm394_base_device::unkarea_78a8_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78a8_w %04x\n", machine().describe_context(), data); m_78a8 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78b0_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b0_w %04x\n", machine().describe_context(), data); m_78b0 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78b1_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b1_w %04x\n", machine().describe_context(), data); m_78b1 = data; } +void sunplus_gcm394_base_device::unkarea_78b0_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b0_w %04x\n", machine().describe_context(), data); m_78b0 = data; } +void sunplus_gcm394_base_device::unkarea_78b1_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b1_w %04x\n", machine().describe_context(), data); m_78b1 = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78b2_r) +uint16_t sunplus_gcm394_base_device::unkarea_78b2_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b2_r\n", machine().describe_context()); return 0xffff;// m_78b2; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78b2_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b2_w %04x\n", machine().describe_context(), data); m_78b2 = data; } +void sunplus_gcm394_base_device::unkarea_78b2_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b2_w %04x\n", machine().describe_context(), data); m_78b2 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78b8_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b8_w %04x\n", machine().describe_context(), data); m_78b8 = data; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_78f0_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78f0_w %04x\n", machine().describe_context(), data); m_78f0 = data; } +void sunplus_gcm394_base_device::unkarea_78b8_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78b8_w %04x\n", machine().describe_context(), data); m_78b8 = data; } +void sunplus_gcm394_base_device::unkarea_78f0_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78f0_w %04x\n", machine().describe_context(), data); m_78f0 = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78d0_r) +uint16_t sunplus_gcm394_base_device::unkarea_78d0_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78d0_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78d8_r) +uint16_t sunplus_gcm394_base_device::unkarea_78d8_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_78d8_r\n", machine().describe_context()); return machine().rand(); @@ -673,74 +673,74 @@ READ16_MEMBER(sunplus_gcm394_base_device::unkarea_78d8_r) // **************************************** 793x uknown region stubs ************************************************* -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7904_r) +uint16_t sunplus_gcm394_base_device::unkarea_7904_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7904_r\n", machine().describe_context()); return machine().rand(); // lazertag waits on a bit, status flag for something? } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7934_r) +uint16_t sunplus_gcm394_base_device::unkarea_7934_r() { // does this return data written, or is it a status flag? LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7934_r\n", machine().describe_context()); return m_7934; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7934_w) +void sunplus_gcm394_base_device::unkarea_7934_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7934_w %04x\n", machine().describe_context(), data); m_7934 = data; } // value of 7935 is read then written in irq6, nothing happens unless bit 0x0100 was set, which could be some kind of irq source being acked? -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7935_r) +uint16_t sunplus_gcm394_base_device::unkarea_7935_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7935_r\n", machine().describe_context()); return m_7935; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7935_w) +void sunplus_gcm394_base_device::unkarea_7935_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7935_w %04x\n", machine().describe_context(), data); m_7935 &= ~data; //checkirq6(); } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7936_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7936_r\n", machine().describe_context()); return 0x0000; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7936_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7936_w %04x\n", machine().describe_context(), data); m_7936 = data; } +uint16_t sunplus_gcm394_base_device::unkarea_7936_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7936_r\n", machine().describe_context()); return 0x0000; } +void sunplus_gcm394_base_device::unkarea_7936_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7936_w %04x\n", machine().describe_context(), data); m_7936 = data; } // **************************************** 794x SPI ************************************************* // these are related to the accelerometer values on jak_g500 (8-bit signed) and also the SPI reads for bkrankp -READ16_MEMBER(sunplus_gcm394_base_device::spi_7944_rxdata_r) +uint16_t sunplus_gcm394_base_device::spi_7944_rxdata_r() { LOGMASKED(LOG_GCM394_SPI, "%s:sunplus_gcm394_base_device::spi_7944_rxdata_r\n", machine().describe_context()); return machine().rand(); } -READ16_MEMBER(sunplus_gcm394_base_device::spi_7945_misc_control_reg_r) +uint16_t sunplus_gcm394_base_device::spi_7945_misc_control_reg_r() { LOGMASKED(LOG_GCM394_SPI, "%s:sunplus_gcm394_base_device::spi_7945_misc_control_reg_r\n", machine().describe_context()); return machine().rand();// &0x0007; } -WRITE16_MEMBER(sunplus_gcm394_base_device::spi_7942_txdata_w) +void sunplus_gcm394_base_device::spi_7942_txdata_w(uint16_t data) { LOGMASKED(LOG_GCM394_SPI, "%s:sunplus_gcm394_base_device::spi_7942_txdata_w %04x\n", machine().describe_context(), data); } // **************************************** 796x unknown ************************************************* -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7960_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7960_w %04x\n", machine().describe_context(), data); m_7960 = data; } +void sunplus_gcm394_base_device::unkarea_7960_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7960_w %04x\n", machine().describe_context(), data); m_7960 = data; } -READ16_MEMBER(sunplus_gcm394_base_device::unkarea_7961_r) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7961_r\n", machine().describe_context()); return m_7961; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unkarea_7961_w) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7961_w %04x\n", machine().describe_context(), data); m_7961 = data; } +uint16_t sunplus_gcm394_base_device::unkarea_7961_r() { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7961_r\n", machine().describe_context()); return m_7961; } +void sunplus_gcm394_base_device::unkarea_7961_w(uint16_t data) { LOGMASKED(LOG_GCM394, "%s:sunplus_gcm394_base_device::unkarea_7961_w %04x\n", machine().describe_context(), data); m_7961 = data; } // **************************************** fallthrough logger etc. ************************************************* -READ16_MEMBER(sunplus_gcm394_base_device::unk_r) +uint16_t sunplus_gcm394_base_device::unk_r(offs_t offset) { switch (offset) { @@ -752,7 +752,7 @@ READ16_MEMBER(sunplus_gcm394_base_device::unk_r) return 0x0000; } -WRITE16_MEMBER(sunplus_gcm394_base_device::unk_w) +void sunplus_gcm394_base_device::unk_w(offs_t offset, uint16_t data) { switch (offset) @@ -1042,16 +1042,16 @@ void sunplus_gcm394_base_device::gcm394_internal_map(address_map& map) map(0x200000, 0x3fffff).rw(FUNC(sunplus_gcm394_base_device::cs_bank_space_r), FUNC(sunplus_gcm394_base_device::cs_bank_space_w)); } -READ16_MEMBER(sunplus_gcm394_base_device::cs_space_r) +uint16_t sunplus_gcm394_base_device::cs_space_r(offs_t offset) { return m_cs_space->read_word(offset); } -WRITE16_MEMBER(sunplus_gcm394_base_device::cs_space_w) +void sunplus_gcm394_base_device::cs_space_w(offs_t offset, uint16_t data) { m_cs_space->write_word(offset, data); } -READ16_MEMBER(sunplus_gcm394_base_device::cs_bank_space_r) +uint16_t sunplus_gcm394_base_device::cs_bank_space_r(offs_t offset) { int bank = m_membankswitch_7810 & 0x3f; int realoffset = offset + (bank * 0x200000) - m_csbase; @@ -1065,7 +1065,7 @@ READ16_MEMBER(sunplus_gcm394_base_device::cs_bank_space_r) return m_cs_space->read_word(realoffset); } -WRITE16_MEMBER(sunplus_gcm394_base_device::cs_bank_space_w) +void sunplus_gcm394_base_device::cs_bank_space_w(offs_t offset, uint16_t data) { int bank = m_membankswitch_7810 & 0x3f; int realoffset = offset + (bank * 0x200000) - m_csbase; @@ -1081,7 +1081,7 @@ WRITE16_MEMBER(sunplus_gcm394_base_device::cs_bank_space_w) -READ16_MEMBER(sunplus_gcm394_base_device::internalrom_lower32_r) +uint16_t sunplus_gcm394_base_device::internalrom_lower32_r(offs_t offset) { if (m_boot_mode == 0) { @@ -1103,7 +1103,7 @@ READ16_MEMBER(sunplus_gcm394_base_device::internalrom_lower32_r) // HY27UF081G2A = AD F1 80 1D // H27U518S2C = AD 76 -READ16_MEMBER(generalplus_gpac800_device::nand_7854_r) +uint16_t generalplus_gpac800_device::nand_7854_r() { // TODO: use actual NAND / Smart Media devices once this is better understood. // The games have extensive checks on startup to determine the flash types, but then it appears that @@ -1183,13 +1183,13 @@ READ16_MEMBER(generalplus_gpac800_device::nand_7854_r) // 7998 -WRITE16_MEMBER(generalplus_gpac800_device::nand_command_w) +void generalplus_gpac800_device::nand_command_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_command_w %04x\n", machine().describe_context(), data); m_nandcommand = data; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_addr_low_w) +void generalplus_gpac800_device::nand_addr_low_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_addr_low_w %04x\n", machine().describe_context(), data); m_nand_addr_low = data; @@ -1223,7 +1223,7 @@ void generalplus_gpac800_device::recalculate_calculate_effective_nand_address() logerror("%s: Requested address is %08x, translating to %08x\n", machine().describe_context(), nandaddress, m_effectiveaddress); } -WRITE16_MEMBER(generalplus_gpac800_device::nand_addr_high_w) +void generalplus_gpac800_device::nand_addr_high_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_addr_high_w %04x\n", machine().describe_context(), data); m_nand_addr_high = data; @@ -1233,25 +1233,25 @@ WRITE16_MEMBER(generalplus_gpac800_device::nand_addr_high_w) m_curblockaddr = 0; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_dma_ctrl_w) +void generalplus_gpac800_device::nand_dma_ctrl_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_dma_ctrl_w(?) %04x\n", machine().describe_context(), data); m_nand_dma_ctrl = data; } -READ16_MEMBER(generalplus_gpac800_device::nand_7850_status_r) +uint16_t generalplus_gpac800_device::nand_7850_status_r() { // 0x8000 = ready return m_nand_7850 | 0x8000; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_7850_w) +void generalplus_gpac800_device::nand_7850_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_7850_w %04x\n", machine().describe_context(), data); m_nand_7850 = data; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_7856_type_w) +void generalplus_gpac800_device::nand_7856_type_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_7856_type_w %04x\n", machine().describe_context(), data); m_nand_7856 = data; @@ -1261,38 +1261,38 @@ WRITE16_MEMBER(generalplus_gpac800_device::nand_7856_type_w) m_curblockaddr = 0; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_7857_w) +void generalplus_gpac800_device::nand_7857_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_7857_w %04x\n", machine().describe_context(), data); m_nand_7857 = data; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_785b_w) +void generalplus_gpac800_device::nand_785b_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_785b_w %04x\n", machine().describe_context(), data); m_nand_785b = data; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_785c_w) +void generalplus_gpac800_device::nand_785c_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_785c_w %04x\n", machine().describe_context(), data); m_nand_785c = data; } -WRITE16_MEMBER(generalplus_gpac800_device::nand_785d_w) +void generalplus_gpac800_device::nand_785d_w(uint16_t data) { logerror("%s:sunplus_gcm394_base_device::nand_785d_w %04x\n", machine().describe_context(), data); m_nand_785d = data; } // [:maincpu] ':maincpu' (00146D) jak_tsm -READ16_MEMBER(generalplus_gpac800_device::nand_785e_r) +uint16_t generalplus_gpac800_device::nand_785e_r() { return 0x0000; } //[:maincpu] ':maincpu' (001490) jak_tsm -READ16_MEMBER(generalplus_gpac800_device::nand_ecc_low_byte_error_flag_1_r) +uint16_t generalplus_gpac800_device::nand_ecc_low_byte_error_flag_1_r() { return 0x0000; } @@ -1407,7 +1407,7 @@ void generalplus_gpac800_device::gpac800_internal_map(address_map& map) } -READ16_MEMBER(generalplus_gpspispi_device::spi_unk_7943_r) +uint16_t generalplus_gpspispi_device::spi_unk_7943_r() { return 0x0007; } diff --git a/src/devices/machine/generalplus_gpl16250soc.h b/src/devices/machine/generalplus_gpl16250soc.h index d0f33f4bcfd..93c097e2d82 100644 --- a/src/devices/machine/generalplus_gpl16250soc.h +++ b/src/devices/machine/generalplus_gpl16250soc.h @@ -194,164 +194,164 @@ protected: devcb_read16 m_nand_read_cb; int m_csbase; - DECLARE_READ16_MEMBER(internalrom_lower32_r); + uint16_t internalrom_lower32_r(offs_t offset); address_space* m_cs_space; - DECLARE_READ16_MEMBER(cs_space_r); - DECLARE_WRITE16_MEMBER(cs_space_w); - DECLARE_READ16_MEMBER(cs_bank_space_r); - DECLARE_WRITE16_MEMBER(cs_bank_space_w); + uint16_t cs_space_r(offs_t offset); + void cs_space_w(offs_t offset, uint16_t data); + uint16_t cs_bank_space_r(offs_t offset); + void cs_bank_space_w(offs_t offset, uint16_t data); int m_romtype; private: devcb_read16 m_space_read_cb; devcb_write16 m_space_write_cb; - DECLARE_READ16_MEMBER(unk_r); - DECLARE_WRITE16_MEMBER(unk_w); + uint16_t unk_r(offs_t offset); + void unk_w(offs_t offset, uint16_t data); - void write_dma_params(int channel, int offset, uint16_t data, address_space& space); + void write_dma_params(int channel, int offset, uint16_t data); uint16_t read_dma_params(int channel, int offset); - void trigger_systemm_dma(address_space &space, int channel); + void trigger_systemm_dma(int channel); - DECLARE_READ16_MEMBER(system_dma_params_channel0_r); - DECLARE_WRITE16_MEMBER(system_dma_params_channel0_w); - DECLARE_READ16_MEMBER(system_dma_params_channel1_r); - DECLARE_WRITE16_MEMBER(system_dma_params_channel1_w); - DECLARE_READ16_MEMBER(system_dma_params_channel2_r); - DECLARE_WRITE16_MEMBER(system_dma_params_channel2_w); - DECLARE_READ16_MEMBER(system_dma_params_channel3_r); - DECLARE_WRITE16_MEMBER(system_dma_params_channel3_w); - DECLARE_READ16_MEMBER(system_dma_status_r); - DECLARE_WRITE16_MEMBER(system_dma_7abf_unk_w); - DECLARE_READ16_MEMBER(system_dma_memtype_r); - DECLARE_WRITE16_MEMBER(system_dma_memtype_w); + uint16_t system_dma_params_channel0_r(offs_t offset); + void system_dma_params_channel0_w(offs_t offset, uint16_t data); + uint16_t system_dma_params_channel1_r(offs_t offset); + void system_dma_params_channel1_w(offs_t offset, uint16_t data); + uint16_t system_dma_params_channel2_r(offs_t offset); + void system_dma_params_channel2_w(offs_t offset, uint16_t data); + uint16_t system_dma_params_channel3_r(offs_t offset); + void system_dma_params_channel3_w(offs_t offset, uint16_t data); + uint16_t system_dma_status_r(); + void system_dma_7abf_unk_w(uint16_t data); + uint16_t system_dma_memtype_r(); + void system_dma_memtype_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_780f_status_r); - DECLARE_READ16_MEMBER(unkarea_78fb_status_r); + uint16_t unkarea_780f_status_r(); + uint16_t unkarea_78fb_status_r(); - DECLARE_READ16_MEMBER(unkarea_7803_r); - DECLARE_WRITE16_MEMBER(unkarea_7803_w); + uint16_t unkarea_7803_r(); + void unkarea_7803_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_7807_w); + void unkarea_7807_w(uint16_t data); - DECLARE_WRITE16_MEMBER(waitmode_enter_780c_w); + void waitmode_enter_780c_w(uint16_t data); - DECLARE_READ16_MEMBER(membankswitch_7810_r); - DECLARE_WRITE16_MEMBER(membankswitch_7810_w); + uint16_t membankswitch_7810_r(); + void membankswitch_7810_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_7816_w); - DECLARE_WRITE16_MEMBER(unkarea_7817_w); + void unkarea_7816_w(uint16_t data); + void unkarea_7817_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_7819_r); - DECLARE_WRITE16_MEMBER(unkarea_7819_w); + uint16_t unkarea_7819_r(); + void unkarea_7819_w(uint16_t data); - DECLARE_WRITE16_MEMBER(chipselect_csx_memory_device_control_w); + void chipselect_csx_memory_device_control_w(offs_t offset, uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_7835_w); + void unkarea_7835_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_782d_r); - DECLARE_WRITE16_MEMBER(unkarea_782d_w); + uint16_t unkarea_782d_r(); + void unkarea_782d_w(uint16_t data); // Port A - DECLARE_READ16_MEMBER(ioarea_7860_porta_r); - DECLARE_WRITE16_MEMBER(ioarea_7860_porta_w); - DECLARE_READ16_MEMBER(ioarea_7861_porta_buffer_r); - DECLARE_WRITE16_MEMBER(ioarea_7861_porta_buffer_w); - DECLARE_READ16_MEMBER(ioarea_7862_porta_direction_r); - DECLARE_WRITE16_MEMBER(ioarea_7862_porta_direction_w); - DECLARE_READ16_MEMBER(ioarea_7863_porta_attribute_r); - DECLARE_WRITE16_MEMBER(ioarea_7863_porta_attribute_w); + uint16_t ioarea_7860_porta_r(); + void ioarea_7860_porta_w(uint16_t data); + uint16_t ioarea_7861_porta_buffer_r(); + void ioarea_7861_porta_buffer_w(uint16_t data); + uint16_t ioarea_7862_porta_direction_r(); + void ioarea_7862_porta_direction_w(uint16_t data); + uint16_t ioarea_7863_porta_attribute_r(); + void ioarea_7863_porta_attribute_w(uint16_t data); // Port B - DECLARE_READ16_MEMBER(ioarea_7868_portb_r); - DECLARE_WRITE16_MEMBER(ioarea_7868_portb_w); - DECLARE_READ16_MEMBER(ioarea_7869_portb_buffer_r); - DECLARE_WRITE16_MEMBER(ioarea_7869_portb_buffer_w); - DECLARE_READ16_MEMBER(ioarea_786a_portb_direction_r); - DECLARE_WRITE16_MEMBER(ioarea_786a_portb_direction_w); - DECLARE_READ16_MEMBER(ioarea_786b_portb_attribute_r); - DECLARE_WRITE16_MEMBER(ioarea_786b_portb_attribute_w); + uint16_t ioarea_7868_portb_r(); + void ioarea_7868_portb_w(uint16_t data); + uint16_t ioarea_7869_portb_buffer_r(); + void ioarea_7869_portb_buffer_w(uint16_t data); + uint16_t ioarea_786a_portb_direction_r(); + void ioarea_786a_portb_direction_w(uint16_t data); + uint16_t ioarea_786b_portb_attribute_r(); + void ioarea_786b_portb_attribute_w(uint16_t data); // Port C - DECLARE_READ16_MEMBER(ioarea_7870_portc_r); - DECLARE_WRITE16_MEMBER(ioarea_7870_portc_w); - DECLARE_READ16_MEMBER(ioarea_7871_portc_buffer_r); - DECLARE_WRITE16_MEMBER(ioarea_7871_portc_buffer_w); - DECLARE_READ16_MEMBER(ioarea_7872_portc_direction_r); - DECLARE_WRITE16_MEMBER(ioarea_7872_portc_direction_w); - DECLARE_READ16_MEMBER(ioarea_7873_portc_attribute_r); - DECLARE_WRITE16_MEMBER(ioarea_7873_portc_attribute_w); + uint16_t ioarea_7870_portc_r(); + void ioarea_7870_portc_w(uint16_t data); + uint16_t ioarea_7871_portc_buffer_r(); + void ioarea_7871_portc_buffer_w(uint16_t data); + uint16_t ioarea_7872_portc_direction_r(); + void ioarea_7872_portc_direction_w(uint16_t data); + uint16_t ioarea_7873_portc_attribute_r(); + void ioarea_7873_portc_attribute_w(uint16_t data); // Port D - DECLARE_READ16_MEMBER(ioarea_7878_portd_r); - DECLARE_WRITE16_MEMBER(ioarea_7878_portd_w); - DECLARE_READ16_MEMBER(ioarea_7879_portd_buffer_r); - DECLARE_WRITE16_MEMBER(ioarea_7879_portd_buffer_w); - DECLARE_READ16_MEMBER(ioarea_787a_portd_direction_r); - DECLARE_WRITE16_MEMBER(ioarea_787a_portd_direction_w); - DECLARE_READ16_MEMBER(ioarea_787b_portd_attribute_r); - DECLARE_WRITE16_MEMBER(ioarea_787b_portd_attribute_w); + uint16_t ioarea_7878_portd_r(); + void ioarea_7878_portd_w(uint16_t data); + uint16_t ioarea_7879_portd_buffer_r(); + void ioarea_7879_portd_buffer_w(uint16_t data); + uint16_t ioarea_787a_portd_direction_r(); + void ioarea_787a_portd_direction_w(uint16_t data); + uint16_t ioarea_787b_portd_attribute_r(); + void ioarea_787b_portd_attribute_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_7882_r); - DECLARE_WRITE16_MEMBER(unkarea_7882_w); - DECLARE_READ16_MEMBER(unkarea_7883_r); - DECLARE_WRITE16_MEMBER(unkarea_7883_w); + uint16_t unkarea_7882_r(); + void unkarea_7882_w(uint16_t data); + uint16_t unkarea_7883_r(); + void unkarea_7883_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_78a0_w); + void unkarea_78a0_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_78a0_r); - DECLARE_READ16_MEMBER(unkarea_78a1_r); + uint16_t unkarea_78a0_r(); + uint16_t unkarea_78a1_r(); - DECLARE_WRITE16_MEMBER(unkarea_78a4_w); - DECLARE_WRITE16_MEMBER(unkarea_78a5_w); - DECLARE_WRITE16_MEMBER(unkarea_78a6_w); + void unkarea_78a4_w(uint16_t data); + void unkarea_78a5_w(uint16_t data); + void unkarea_78a6_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_78a8_w); + void unkarea_78a8_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_78b0_w); - DECLARE_WRITE16_MEMBER(unkarea_78b1_w); + void unkarea_78b0_w(uint16_t data); + void unkarea_78b1_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_78b2_r); - DECLARE_WRITE16_MEMBER(unkarea_78b2_w); + uint16_t unkarea_78b2_r(); + void unkarea_78b2_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_78b8_w); + void unkarea_78b8_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_78d0_r); - DECLARE_READ16_MEMBER(unkarea_78d8_r); + uint16_t unkarea_78d0_r(); + uint16_t unkarea_78d8_r(); - DECLARE_WRITE16_MEMBER(unkarea_78f0_w); + void unkarea_78f0_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_7904_r); + uint16_t unkarea_7904_r(); - DECLARE_READ16_MEMBER(unkarea_7934_r); - DECLARE_WRITE16_MEMBER(unkarea_7934_w); + uint16_t unkarea_7934_r(); + void unkarea_7934_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_7935_r); - DECLARE_WRITE16_MEMBER(unkarea_7935_w); + uint16_t unkarea_7935_r(); + void unkarea_7935_w(uint16_t data); - DECLARE_READ16_MEMBER(unkarea_7936_r); - DECLARE_WRITE16_MEMBER(unkarea_7936_w); + uint16_t unkarea_7936_r(); + void unkarea_7936_w(uint16_t data); - DECLARE_READ16_MEMBER(spi_7944_rxdata_r); - DECLARE_READ16_MEMBER(spi_7945_misc_control_reg_r); - DECLARE_WRITE16_MEMBER(spi_7942_txdata_w); + uint16_t spi_7944_rxdata_r(); + uint16_t spi_7945_misc_control_reg_r(); + void spi_7942_txdata_w(uint16_t data); - DECLARE_WRITE16_MEMBER(unkarea_7960_w); - DECLARE_READ16_MEMBER(unkarea_7961_r); - DECLARE_WRITE16_MEMBER(unkarea_7961_w); + void unkarea_7960_w(uint16_t data); + uint16_t unkarea_7961_r(); + void unkarea_7961_w(uint16_t data); DECLARE_WRITE_LINE_MEMBER(videoirq_w); DECLARE_WRITE_LINE_MEMBER(audioirq_w); - DECLARE_READ16_MEMBER(system_7a35_r); - DECLARE_READ16_MEMBER(system_7a37_r); - DECLARE_READ16_MEMBER(system_7a39_r); - DECLARE_READ16_MEMBER(system_7a3a_r); - DECLARE_READ16_MEMBER(system_7a46_r); - DECLARE_READ16_MEMBER(system_7a54_r); + uint16_t system_7a35_r(); + uint16_t system_7a37_r(); + uint16_t system_7a39_r(); + uint16_t system_7a3a_r(); + uint16_t system_7a46_r(); + uint16_t system_7a54_r(); void checkirq6(); @@ -404,20 +404,20 @@ protected: private: void recalculate_calculate_effective_nand_address(); - DECLARE_READ16_MEMBER(nand_7850_status_r); - DECLARE_READ16_MEMBER(nand_7854_r); - DECLARE_WRITE16_MEMBER(nand_dma_ctrl_w); - DECLARE_WRITE16_MEMBER(nand_7850_w); - DECLARE_WRITE16_MEMBER(nand_command_w); - DECLARE_WRITE16_MEMBER(nand_addr_low_w); - DECLARE_WRITE16_MEMBER(nand_addr_high_w); - DECLARE_READ16_MEMBER(nand_ecc_low_byte_error_flag_1_r); - DECLARE_WRITE16_MEMBER(nand_7856_type_w); - DECLARE_WRITE16_MEMBER(nand_7857_w); - DECLARE_WRITE16_MEMBER(nand_785b_w); - DECLARE_WRITE16_MEMBER(nand_785c_w); - DECLARE_WRITE16_MEMBER(nand_785d_w); - DECLARE_READ16_MEMBER(nand_785e_r); + uint16_t nand_7850_status_r(); + uint16_t nand_7854_r(); + void nand_dma_ctrl_w(uint16_t data); + void nand_7850_w(uint16_t data); + void nand_command_w(uint16_t data); + void nand_addr_low_w(uint16_t data); + void nand_addr_high_w(uint16_t data); + uint16_t nand_ecc_low_byte_error_flag_1_r(); + void nand_7856_type_w(uint16_t data); + void nand_7857_w(uint16_t data); + void nand_785b_w(uint16_t data); + void nand_785c_w(uint16_t data); + void nand_785d_w(uint16_t data); + uint16_t nand_785e_r(); uint16_t m_nandcommand; @@ -457,7 +457,7 @@ protected: //virtual void device_reset() override; private: - DECLARE_READ16_MEMBER(spi_unk_7943_r); + uint16_t spi_unk_7943_r(); }; diff --git a/src/devices/machine/generalplus_gpl16250soc_video.cpp b/src/devices/machine/generalplus_gpl16250soc_video.cpp index b1e0fd77a73..b2534e6b3d3 100644 --- a/src/devices/machine/generalplus_gpl16250soc_video.cpp +++ b/src/devices/machine/generalplus_gpl16250soc_video.cpp @@ -489,7 +489,7 @@ void gcm394_base_video_device::write_tmap_extrascroll(int tmap, uint16_t* regs, // **************************************** TILEMAP 0 ************************************************* -READ16_MEMBER(gcm394_base_video_device::tmap0_regs_r) +uint16_t gcm394_base_video_device::tmap0_regs_r(offs_t offset) { if (offset < 2) { @@ -501,7 +501,7 @@ READ16_MEMBER(gcm394_base_video_device::tmap0_regs_r) } } -WRITE16_MEMBER(gcm394_base_video_device::tmap0_regs_w) +void gcm394_base_video_device::tmap0_regs_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_GCM394_TMAP_EXTRA, "%s:gcm394_base_video_device::tmap0_regs_w %01x %04x\n", machine().describe_context(), offset, data); if (offset < 2) @@ -514,24 +514,24 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap0_regs_w) } } -READ16_MEMBER(gcm394_base_video_device::tmap0_tilebase_lsb_r) +uint16_t gcm394_base_video_device::tmap0_tilebase_lsb_r() { return m_page0_addr_lsb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap0_tilebase_lsb_w) +void gcm394_base_video_device::tmap0_tilebase_lsb_w(uint16_t data) { LOGMASKED(LOG_GCM394_TMAP, "%s:gcm394_base_video_device::tmap0_tilebase_lsb_w %04x\n", machine().describe_context(), data); m_page0_addr_lsb = data; LOGMASKED(LOG_GCM394_TMAP, "\t(tmap0 tilegfxbase is now %04x%04x)\n", m_page0_addr_msb, m_page0_addr_lsb); } -READ16_MEMBER(gcm394_base_video_device::tmap0_tilebase_msb_r) +uint16_t gcm394_base_video_device::tmap0_tilebase_msb_r() { return m_page0_addr_msb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap0_tilebase_msb_w) +void gcm394_base_video_device::tmap0_tilebase_msb_w(uint16_t data) { LOGMASKED(LOG_GCM394_TMAP, "%s:gcm394_base_video_device::tmap0_tilebase_msb_w %04x\n", machine().describe_context(), data); m_page0_addr_msb = data; @@ -541,7 +541,7 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap0_tilebase_msb_w) // **************************************** TILEMAP 1 ************************************************* -READ16_MEMBER(gcm394_base_video_device::tmap1_regs_r) +uint16_t gcm394_base_video_device::tmap1_regs_r(offs_t offset) { if (offset < 2) { @@ -553,7 +553,7 @@ READ16_MEMBER(gcm394_base_video_device::tmap1_regs_r) } } -WRITE16_MEMBER(gcm394_base_video_device::tmap1_regs_w) +void gcm394_base_video_device::tmap1_regs_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_GCM394_TMAP_EXTRA, "%s:gcm394_base_video_device::tmap1_regs_w %01x %04x\n", machine().describe_context(), offset, data); if (offset < 2) @@ -566,24 +566,24 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap1_regs_w) } } -READ16_MEMBER(gcm394_base_video_device::tmap1_tilebase_lsb_r) +uint16_t gcm394_base_video_device::tmap1_tilebase_lsb_r() { return m_page1_addr_lsb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap1_tilebase_lsb_w) +void gcm394_base_video_device::tmap1_tilebase_lsb_w(uint16_t data) { LOGMASKED(LOG_GCM394_TMAP, "%s:gcm394_base_video_device::tmap1_tilebase_lsb_w %04x\n", machine().describe_context(), data); m_page1_addr_lsb = data; LOGMASKED(LOG_GCM394_TMAP, "\t(tmap1 tilegfxbase is now %04x%04x)\n", m_page1_addr_msb, m_page1_addr_lsb); } -READ16_MEMBER(gcm394_base_video_device::tmap1_tilebase_msb_r) +uint16_t gcm394_base_video_device::tmap1_tilebase_msb_r() { return m_page1_addr_msb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap1_tilebase_msb_w) +void gcm394_base_video_device::tmap1_tilebase_msb_w(uint16_t data) { LOGMASKED(LOG_GCM394_TMAP, "%s:gcm394_base_video_device::tmap1_tilebase_msb_w %04x\n", machine().describe_context(), data); m_page1_addr_msb = data; @@ -592,7 +592,7 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap1_tilebase_msb_w) // **************************************** unknown video device 1 (another tilemap? roz? line? zooming sprite layer?) ************************************************* -READ16_MEMBER(gcm394_base_video_device::tmap2_regs_r) +uint16_t gcm394_base_video_device::tmap2_regs_r(offs_t offset) { if (offset < 4) { @@ -604,7 +604,7 @@ READ16_MEMBER(gcm394_base_video_device::tmap2_regs_r) } } -WRITE16_MEMBER(gcm394_base_video_device::tmap2_regs_w) +void gcm394_base_video_device::tmap2_regs_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_GCM394_TMAP_EXTRA, "%s:gcm394_base_video_device::tmap2_regs_w %01x %04x\n", machine().describe_context(), offset, data); if (offset < 4) @@ -617,25 +617,25 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap2_regs_w) } } -READ16_MEMBER(gcm394_base_video_device::tmap2_tilebase_lsb_r) +uint16_t gcm394_base_video_device::tmap2_tilebase_lsb_r() { return m_page2_addr_lsb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap2_tilebase_lsb_w) +void gcm394_base_video_device::tmap2_tilebase_lsb_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::tmap2_tilebase_lsb_w %04x\n", machine().describe_context(), data); m_page2_addr_lsb = data; LOGMASKED(LOG_GCM394_TMAP, "\t(unk_vid1 tilegfxbase is now %04x%04x)\n", m_page2_addr_msb, m_page2_addr_lsb); } -READ16_MEMBER(gcm394_base_video_device::tmap2_tilebase_msb_r) +uint16_t gcm394_base_video_device::tmap2_tilebase_msb_r() { return m_page2_addr_msb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap2_tilebase_msb_w) +void gcm394_base_video_device::tmap2_tilebase_msb_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::tmap2_tilebase_msb_w %04x\n", machine().describe_context(), data); m_page2_addr_msb = data; @@ -644,7 +644,7 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap2_tilebase_msb_w) // **************************************** unknown video device 2 (another tilemap? roz? lines? zooming sprite layer?) ************************************************* -READ16_MEMBER(gcm394_base_video_device::tmap3_regs_r) +uint16_t gcm394_base_video_device::tmap3_regs_r(offs_t offset) { if (offset < 4) { @@ -656,7 +656,7 @@ READ16_MEMBER(gcm394_base_video_device::tmap3_regs_r) } } -WRITE16_MEMBER(gcm394_base_video_device::tmap3_regs_w) +void gcm394_base_video_device::tmap3_regs_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_GCM394_TMAP_EXTRA, "%s:gcm394_base_video_device::tmap3_regs_w %01x %04x\n", machine().describe_context(), offset, data); if (offset < 4) @@ -669,26 +669,26 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap3_regs_w) } } -READ16_MEMBER(gcm394_base_video_device::tmap3_tilebase_lsb_r) +uint16_t gcm394_base_video_device::tmap3_tilebase_lsb_r() { return m_page3_addr_lsb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap3_tilebase_lsb_w) +void gcm394_base_video_device::tmap3_tilebase_lsb_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::tmap3_tilebase_lsb_w %04x\n", machine().describe_context(), data); m_page3_addr_lsb = data; LOGMASKED(LOG_GCM394_TMAP, "\t(unk_vid2 tilegfxbase is now %04x%04x)\n", m_page3_addr_msb, m_page3_addr_lsb); } -READ16_MEMBER(gcm394_base_video_device::tmap3_tilebase_msb_r) +uint16_t gcm394_base_video_device::tmap3_tilebase_msb_r() { return m_page3_addr_msb; } -WRITE16_MEMBER(gcm394_base_video_device::tmap3_tilebase_msb_w) +void gcm394_base_video_device::tmap3_tilebase_msb_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::tmap3_tilebase_msb_w %04x\n", machine().describe_context(), data); m_page3_addr_msb = data; @@ -699,38 +699,38 @@ WRITE16_MEMBER(gcm394_base_video_device::tmap3_tilebase_msb_w) // set to 001264c0 in wrlshunt, which point at the menu selectors (game names, arrows etc.) -READ16_MEMBER(gcm394_base_video_device::sprite_7022_gfxbase_lsb_r) +uint16_t gcm394_base_video_device::sprite_7022_gfxbase_lsb_r() { return m_sprite_7022_gfxbase_lsb; } -WRITE16_MEMBER(gcm394_base_video_device::sprite_7022_gfxbase_lsb_w) +void gcm394_base_video_device::sprite_7022_gfxbase_lsb_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::sprite_7022_gfxbase_lsb_w %04x\n", machine().describe_context(), data); m_sprite_7022_gfxbase_lsb = data; LOGMASKED(LOG_GCM394_TMAP, "\t(sprite tilebase is now %04x%04x)\n", m_sprite_702d_gfxbase_msb, m_sprite_7022_gfxbase_lsb); } -READ16_MEMBER(gcm394_base_video_device::sprite_702d_gfxbase_msb_r) +uint16_t gcm394_base_video_device::sprite_702d_gfxbase_msb_r() { return m_sprite_702d_gfxbase_msb; } -WRITE16_MEMBER(gcm394_base_video_device::sprite_702d_gfxbase_msb_w) +void gcm394_base_video_device::sprite_702d_gfxbase_msb_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::sprite_702d_gfxbase_msb_w %04x\n", machine().describe_context(), data); m_sprite_702d_gfxbase_msb = data; LOGMASKED(LOG_GCM394_TMAP, "\t(sprite tilebase tilegfxbase is now %04x%04x)\n", m_sprite_702d_gfxbase_msb, m_sprite_7022_gfxbase_lsb); } -READ16_MEMBER(gcm394_base_video_device::sprite_7042_extra_r) +uint16_t gcm394_base_video_device::sprite_7042_extra_r() { uint16_t retdata = m_7042_sprite; LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::sprite_7042_extra_r (returning: %04x)\n", machine().describe_context(), retdata); return retdata; } -WRITE16_MEMBER(gcm394_base_video_device::sprite_7042_extra_w) +void gcm394_base_video_device::sprite_7042_extra_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::sprite_7042_extra_w %04x\n", machine().describe_context(), data); m_7042_sprite = data; @@ -742,25 +742,25 @@ WRITE16_MEMBER(gcm394_base_video_device::sprite_7042_extra_w) // **************************************** video DMA device ************************************************* -WRITE16_MEMBER(gcm394_base_video_device::video_dma_source_w) +void gcm394_base_video_device::video_dma_source_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO_DMA, "%s:gcm394_base_video_device::video_dma_source_w %04x\n", machine().describe_context(), data); m_videodma_source = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_dma_dest_w) +void gcm394_base_video_device::video_dma_dest_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO_DMA, "%s:gcm394_base_video_device::video_dma_dest_w %04x\n", machine().describe_context(), data); m_videodma_dest = data; } -READ16_MEMBER(gcm394_base_video_device::video_dma_size_busy_r) +uint16_t gcm394_base_video_device::video_dma_size_busy_r() { LOGMASKED(LOG_GCM394_VIDEO_DMA, "%s:gcm394_base_video_device::video_dma_size_busy_r\n", machine().describe_context()); return 0x0000; } -WRITE16_MEMBER(gcm394_base_video_device::video_dma_size_trigger_w) +void gcm394_base_video_device::video_dma_size_trigger_w(address_space &space, uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO_DMA, "%s:gcm394_base_video_device::video_dma_size_trigger_w %04x\n", machine().describe_context(), data); m_videodma_size = data; @@ -785,13 +785,13 @@ WRITE16_MEMBER(gcm394_base_video_device::video_dma_size_trigger_w) } } -WRITE16_MEMBER(gcm394_base_video_device::video_707e_spritebank_w) +void gcm394_base_video_device::video_707e_spritebank_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_707e_spritebank_w %04x\n", machine().describe_context(), data); m_707e_spritebank = data; } -READ16_MEMBER(gcm394_base_video_device::video_707c_r) +uint16_t gcm394_base_video_device::video_707c_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_707c_r\n", machine().describe_context()); return 0x8000; @@ -813,13 +813,13 @@ READ16_MEMBER(gcm394_base_video_device::video_707c_r) */ -READ16_MEMBER(gcm394_base_video_device::video_707f_r) +uint16_t gcm394_base_video_device::video_707f_r() { uint16_t retdata = m_renderer->get_video_reg_7f(); LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_707f_r (returning %04x)\n", machine().describe_context(), retdata); return retdata; } -WRITE16_MEMBER(gcm394_base_video_device::video_707f_w) +void gcm394_base_video_device::video_707f_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_707f_w %04x\n", machine().describe_context(), data); @@ -845,13 +845,13 @@ WRITE16_MEMBER(gcm394_base_video_device::video_707f_w) //popmessage("707f is %04x\n", data); } -READ16_MEMBER(gcm394_base_video_device::video_703a_palettebank_r) +uint16_t gcm394_base_video_device::video_703a_palettebank_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_703a_palettebank_r\n", machine().describe_context()); return m_703a_palettebank; } -WRITE16_MEMBER(gcm394_base_video_device::video_703a_palettebank_w) +void gcm394_base_video_device::video_703a_palettebank_w(uint16_t data) { // I don't think bit 0 (0x01) is a bank select, it might be a 'mode select' for how the palette operates. // neither lazertag or tkmag220 set it @@ -866,13 +866,13 @@ WRITE16_MEMBER(gcm394_base_video_device::video_703a_palettebank_w) m_703a_palettebank = data; } -READ16_MEMBER(gcm394_base_video_device::videoirq_source_enable_r) +uint16_t gcm394_base_video_device::videoirq_source_enable_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::videoirq_source_enable_r\n", machine().describe_context()); return m_video_irq_enable; } -WRITE16_MEMBER(gcm394_base_video_device::videoirq_source_enable_w) +void gcm394_base_video_device::videoirq_source_enable_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "videoirq_source_enable_w: Video IRQ Enable = %04x (DMA:%d, Timing:%d, Blanking:%d)\n", data, BIT(data, 2), BIT(data, 1), BIT(data, 0)); const uint16_t old = m_video_irq_enable & m_video_irq_status; @@ -882,14 +882,14 @@ WRITE16_MEMBER(gcm394_base_video_device::videoirq_source_enable_w) check_video_irq(); } -READ16_MEMBER(gcm394_base_video_device::video_7063_videoirq_source_r) +uint16_t gcm394_base_video_device::video_7063_videoirq_source_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7063_videoirq_source_r\n", machine().describe_context()); return m_video_irq_status; } -WRITE16_MEMBER(gcm394_base_video_device::video_7063_videoirq_source_ack_w) +void gcm394_base_video_device::video_7063_videoirq_source_ack_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "video_7063_videoirq_source_ack_w: Video IRQ Acknowledge = %04x\n", data); const uint16_t old = m_video_irq_enable & m_video_irq_status; @@ -899,21 +899,21 @@ WRITE16_MEMBER(gcm394_base_video_device::video_7063_videoirq_source_ack_w) check_video_irq(); } -WRITE16_MEMBER(gcm394_base_video_device::video_702a_w) +void gcm394_base_video_device::video_702a_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_702a_w %04x\n", machine().describe_context(), data); m_702a = data; m_renderer->set_video_reg_2a(data); } -READ16_MEMBER(gcm394_base_video_device::video_curline_r) +uint16_t gcm394_base_video_device::video_curline_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s: video_r: Current Line: %04x\n", machine().describe_context(), m_screen->vpos()); return m_screen->vpos(); } // read in IRQ -READ16_MEMBER(gcm394_base_video_device::video_7030_brightness_r) +uint16_t gcm394_base_video_device::video_7030_brightness_r() { /* wrlshunt ends up doing an explicit jump to 0000 shortly after boot if you just return the value written here, however I think that is correct code flow and something else is wrong as this simply looks like some kind of brightness register - there is code to decrease it from 0xff to 0x00 by 0x5 increments (waiting for it to hit 0x05) and code to do the reverse @@ -924,7 +924,7 @@ READ16_MEMBER(gcm394_base_video_device::video_7030_brightness_r) return retdat; } -WRITE16_MEMBER(gcm394_base_video_device::video_7030_brightness_w) +void gcm394_base_video_device::video_7030_brightness_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7030_brightness_w %04x\n", machine().describe_context(), data); m_7030_brightness = data; @@ -945,7 +945,7 @@ void gcm394_base_video_device::update_raster_split_position() m_screenpos_timer->adjust(attotime::never); } -WRITE16_MEMBER(gcm394_base_video_device::split_irq_ypos_w) +void gcm394_base_video_device::split_irq_ypos_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:split_irq_ypos_w %04x\n", machine().describe_context(), data); @@ -953,7 +953,7 @@ WRITE16_MEMBER(gcm394_base_video_device::split_irq_ypos_w) update_raster_split_position(); } -WRITE16_MEMBER(gcm394_base_video_device::split_irq_xpos_w) +void gcm394_base_video_device::split_irq_xpos_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:split_irq_xpos_w %04x\n", machine().describe_context(), data); @@ -961,20 +961,20 @@ WRITE16_MEMBER(gcm394_base_video_device::split_irq_xpos_w) update_raster_split_position(); } -READ16_MEMBER(gcm394_base_video_device::video_703c_tvcontrol1_r) +uint16_t gcm394_base_video_device::video_703c_tvcontrol1_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_703c_tvcontrol1_r\n", machine().describe_context()); return m_703c_tvcontrol1; } -WRITE16_MEMBER(gcm394_base_video_device::video_703c_tvcontrol1_w) +void gcm394_base_video_device::video_703c_tvcontrol1_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_703c_tvcontrol1_w %04x\n", machine().describe_context(), data); m_703c_tvcontrol1 = data; m_renderer->set_video_reg_3c(data); } -READ16_MEMBER(gcm394_base_video_device::video_7051_r) +uint16_t gcm394_base_video_device::video_7051_r() { /* related to what ends up crashing wrlshunt? */ uint16_t retdat = 0x03ff; @@ -982,7 +982,7 @@ READ16_MEMBER(gcm394_base_video_device::video_7051_r) return retdat; } -READ16_MEMBER(gcm394_base_video_device::video_70e0_r) +uint16_t gcm394_base_video_device::video_70e0_r() { uint16_t retdat = machine().rand(); LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_70e0_r (returning %04x)\n", machine().describe_context(), retdat); @@ -991,19 +991,19 @@ READ16_MEMBER(gcm394_base_video_device::video_70e0_r) // this block get set once, in a single function, could be important -WRITE16_MEMBER(gcm394_base_video_device::video_7080_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7080_w %04x\n", machine().describe_context(), data); m_7080 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7081_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7081_w %04x\n", machine().describe_context(), data); m_7081 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7082_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7082_w %04x\n", machine().describe_context(), data); m_7082 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7083_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7083_w %04x\n", machine().describe_context(), data); m_7083 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7084_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7084_w %04x\n", machine().describe_context(), data); m_7084 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7085_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7085_w %04x\n", machine().describe_context(), data); m_7085 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7086_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7086_w %04x\n", machine().describe_context(), data); m_7086 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7087_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7087_w %04x\n", machine().describe_context(), data); m_7087 = data; } -WRITE16_MEMBER(gcm394_base_video_device::video_7088_w) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7088_w %04x\n", machine().describe_context(), data); m_7088 = data; } +void gcm394_base_video_device::video_7080_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7080_w %04x\n", machine().describe_context(), data); m_7080 = data; } +void gcm394_base_video_device::video_7081_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7081_w %04x\n", machine().describe_context(), data); m_7081 = data; } +void gcm394_base_video_device::video_7082_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7082_w %04x\n", machine().describe_context(), data); m_7082 = data; } +void gcm394_base_video_device::video_7083_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7083_w %04x\n", machine().describe_context(), data); m_7083 = data; } +void gcm394_base_video_device::video_7084_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7084_w %04x\n", machine().describe_context(), data); m_7084 = data; } +void gcm394_base_video_device::video_7085_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7085_w %04x\n", machine().describe_context(), data); m_7085 = data; } +void gcm394_base_video_device::video_7086_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7086_w %04x\n", machine().describe_context(), data); m_7086 = data; } +void gcm394_base_video_device::video_7087_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7087_w %04x\n", machine().describe_context(), data); m_7087 = data; } +void gcm394_base_video_device::video_7088_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7088_w %04x\n", machine().describe_context(), data); m_7088 = data; } -READ16_MEMBER(gcm394_base_video_device::video_7083_r) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7083_r\n", machine().describe_context()); return m_7083; } +uint16_t gcm394_base_video_device::video_7083_r() { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_7083_r\n", machine().describe_context()); return m_7083; } -WRITE16_MEMBER(gcm394_base_video_device::spriteram_w) +void gcm394_base_video_device::spriteram_w(offs_t offset, uint16_t data) { // transfers an additional word for each sprite with this bit set (smartfp) or an entire extra bank (wrlshunt) // wrlshunt instead seems to base if it writes the extra data based on 707f so maybe this is more complex than banking @@ -1025,7 +1025,7 @@ WRITE16_MEMBER(gcm394_base_video_device::spriteram_w) } } -READ16_MEMBER(gcm394_base_video_device::spriteram_r) +uint16_t gcm394_base_video_device::spriteram_r(offs_t offset) { if (m_707e_spritebank == 0x0000) { @@ -1042,7 +1042,7 @@ READ16_MEMBER(gcm394_base_video_device::spriteram_r) } } -WRITE16_MEMBER(gcm394_base_video_device::palette_w) +void gcm394_base_video_device::palette_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO_PALETTE, "%s:gcm394_base_video_device::palette_w %04x : %04x (value of 0x703a is %04x)\n", machine().describe_context(), offset, data, m_703a_palettebank); @@ -1063,7 +1063,7 @@ WRITE16_MEMBER(gcm394_base_video_device::palette_w) } } -READ16_MEMBER(gcm394_base_video_device::palette_r) +uint16_t gcm394_base_video_device::palette_r(offs_t offset) { if (m_703a_palettebank & 0xfff0) { @@ -1076,19 +1076,19 @@ READ16_MEMBER(gcm394_base_video_device::palette_r) } } -WRITE16_MEMBER(gcm394_base_video_device::video_701c_w) +void gcm394_base_video_device::video_701c_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_701c_w (unknown video reg?) %04x\n", machine().describe_context(), data); m_renderer->set_video_reg_1c(data); } -WRITE16_MEMBER(gcm394_base_video_device::video_701d_w) +void gcm394_base_video_device::video_701d_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_701d_w (unknown video reg?) %04x\n", machine().describe_context(), data); m_renderer->set_video_reg_1d(data); } -WRITE16_MEMBER(gcm394_base_video_device::video_701e_w) +void gcm394_base_video_device::video_701e_w(uint16_t data) { LOGMASKED(LOG_GCM394_VIDEO, "%s:gcm394_base_video_device::video_701e_w (unknown video reg?) %04x\n", machine().describe_context(), data); m_renderer->set_video_reg_1e(data); diff --git a/src/devices/machine/generalplus_gpl16250soc_video.h b/src/devices/machine/generalplus_gpl16250soc_video.h index a04540dd5a1..d985ee06dd0 100644 --- a/src/devices/machine/generalplus_gpl16250soc_video.h +++ b/src/devices/machine/generalplus_gpl16250soc_video.h @@ -41,98 +41,98 @@ public: //void set_pal_sprites(int pal_sprites) { m_pal_sprites = pal_sprites; } //void set_pal_back(int pal_back) { m_pal_back = pal_back; } - DECLARE_READ16_MEMBER(tmap0_regs_r); - DECLARE_WRITE16_MEMBER(tmap0_regs_w); - DECLARE_READ16_MEMBER(tmap0_tilebase_lsb_r); - DECLARE_READ16_MEMBER(tmap0_tilebase_msb_r); - DECLARE_WRITE16_MEMBER(tmap0_tilebase_lsb_w); - DECLARE_WRITE16_MEMBER(tmap0_tilebase_msb_w); - - DECLARE_READ16_MEMBER(tmap1_regs_r); - DECLARE_WRITE16_MEMBER(tmap1_regs_w); - DECLARE_READ16_MEMBER(tmap1_tilebase_lsb_r); - DECLARE_READ16_MEMBER(tmap1_tilebase_msb_r); - DECLARE_WRITE16_MEMBER(tmap1_tilebase_lsb_w); - DECLARE_WRITE16_MEMBER(tmap1_tilebase_msb_w); - - DECLARE_READ16_MEMBER(tmap2_regs_r); - DECLARE_WRITE16_MEMBER(tmap2_regs_w); - DECLARE_READ16_MEMBER(tmap2_tilebase_lsb_r); - DECLARE_READ16_MEMBER(tmap2_tilebase_msb_r); - DECLARE_WRITE16_MEMBER(tmap2_tilebase_lsb_w); - DECLARE_WRITE16_MEMBER(tmap2_tilebase_msb_w); - - DECLARE_READ16_MEMBER(tmap3_regs_r); - DECLARE_WRITE16_MEMBER(tmap3_regs_w); - DECLARE_READ16_MEMBER(tmap3_tilebase_lsb_r); - DECLARE_READ16_MEMBER(tmap3_tilebase_msb_r); - DECLARE_WRITE16_MEMBER(tmap3_tilebase_lsb_w); - DECLARE_WRITE16_MEMBER(tmap3_tilebase_msb_w); - - DECLARE_WRITE16_MEMBER(video_701c_w); - DECLARE_WRITE16_MEMBER(video_701d_w); - DECLARE_WRITE16_MEMBER(video_701e_w); - - DECLARE_READ16_MEMBER(sprite_7022_gfxbase_lsb_r); - DECLARE_READ16_MEMBER(sprite_702d_gfxbase_msb_r); - - DECLARE_WRITE16_MEMBER(sprite_7022_gfxbase_lsb_w); - DECLARE_WRITE16_MEMBER(sprite_702d_gfxbase_msb_w); - DECLARE_READ16_MEMBER(sprite_7042_extra_r); - DECLARE_WRITE16_MEMBER(sprite_7042_extra_w); - - DECLARE_WRITE16_MEMBER(video_dma_source_w); - DECLARE_WRITE16_MEMBER(video_dma_dest_w); - DECLARE_READ16_MEMBER(video_dma_size_busy_r); - DECLARE_WRITE16_MEMBER(video_dma_size_trigger_w); - DECLARE_WRITE16_MEMBER(video_707e_spritebank_w); - - DECLARE_READ16_MEMBER(video_703a_palettebank_r); - DECLARE_WRITE16_MEMBER(video_703a_palettebank_w); + uint16_t tmap0_regs_r(offs_t offset); + void tmap0_regs_w(offs_t offset, uint16_t data); + uint16_t tmap0_tilebase_lsb_r(); + uint16_t tmap0_tilebase_msb_r(); + void tmap0_tilebase_lsb_w(uint16_t data); + void tmap0_tilebase_msb_w(uint16_t data); + + uint16_t tmap1_regs_r(offs_t offset); + void tmap1_regs_w(offs_t offset, uint16_t data); + uint16_t tmap1_tilebase_lsb_r(); + uint16_t tmap1_tilebase_msb_r(); + void tmap1_tilebase_lsb_w(uint16_t data); + void tmap1_tilebase_msb_w(uint16_t data); + + uint16_t tmap2_regs_r(offs_t offset); + void tmap2_regs_w(offs_t offset, uint16_t data); + uint16_t tmap2_tilebase_lsb_r(); + uint16_t tmap2_tilebase_msb_r(); + void tmap2_tilebase_lsb_w(uint16_t data); + void tmap2_tilebase_msb_w(uint16_t data); + + uint16_t tmap3_regs_r(offs_t offset); + void tmap3_regs_w(offs_t offset, uint16_t data); + uint16_t tmap3_tilebase_lsb_r(); + uint16_t tmap3_tilebase_msb_r(); + void tmap3_tilebase_lsb_w(uint16_t data); + void tmap3_tilebase_msb_w(uint16_t data); + + void video_701c_w(uint16_t data); + void video_701d_w(uint16_t data); + void video_701e_w(uint16_t data); + + uint16_t sprite_7022_gfxbase_lsb_r(); + uint16_t sprite_702d_gfxbase_msb_r(); + + void sprite_7022_gfxbase_lsb_w(uint16_t data); + void sprite_702d_gfxbase_msb_w(uint16_t data); + uint16_t sprite_7042_extra_r(); + void sprite_7042_extra_w(uint16_t data); + + void video_dma_source_w(uint16_t data); + void video_dma_dest_w(uint16_t data); + uint16_t video_dma_size_busy_r(); + void video_dma_size_trigger_w(address_space &space, uint16_t data); + void video_707e_spritebank_w(uint16_t data); + + uint16_t video_703a_palettebank_r(); + void video_703a_palettebank_w(uint16_t data); void update_raster_split_position(); - DECLARE_WRITE16_MEMBER(split_irq_xpos_w); - DECLARE_WRITE16_MEMBER(split_irq_ypos_w); + void split_irq_xpos_w(uint16_t data); + void split_irq_ypos_w(uint16_t data); - DECLARE_READ16_MEMBER(videoirq_source_enable_r); - DECLARE_WRITE16_MEMBER(videoirq_source_enable_w); + uint16_t videoirq_source_enable_r(); + void videoirq_source_enable_w(uint16_t data); - DECLARE_READ16_MEMBER(video_7063_videoirq_source_r); - DECLARE_WRITE16_MEMBER(video_7063_videoirq_source_ack_w); + uint16_t video_7063_videoirq_source_r(); + void video_7063_videoirq_source_ack_w(uint16_t data); - DECLARE_WRITE16_MEMBER(video_702a_w); - DECLARE_READ16_MEMBER(video_7030_brightness_r); - DECLARE_WRITE16_MEMBER(video_7030_brightness_w); - DECLARE_READ16_MEMBER(video_curline_r); + void video_702a_w(uint16_t data); + uint16_t video_7030_brightness_r(); + void video_7030_brightness_w(uint16_t data); + uint16_t video_curline_r(); - DECLARE_READ16_MEMBER(video_703c_tvcontrol1_r); - DECLARE_WRITE16_MEMBER(video_703c_tvcontrol1_w); + uint16_t video_703c_tvcontrol1_r(); + void video_703c_tvcontrol1_w(uint16_t data); - DECLARE_READ16_MEMBER(video_707c_r); + uint16_t video_707c_r(); - DECLARE_READ16_MEMBER(video_707f_r); - DECLARE_WRITE16_MEMBER(video_707f_w); + uint16_t video_707f_r(); + void video_707f_w(uint16_t data); - DECLARE_WRITE16_MEMBER(video_7080_w); - DECLARE_WRITE16_MEMBER(video_7081_w); - DECLARE_WRITE16_MEMBER(video_7082_w); - DECLARE_WRITE16_MEMBER(video_7083_w); - DECLARE_WRITE16_MEMBER(video_7084_w); - DECLARE_WRITE16_MEMBER(video_7085_w); - DECLARE_WRITE16_MEMBER(video_7086_w); - DECLARE_WRITE16_MEMBER(video_7087_w); - DECLARE_WRITE16_MEMBER(video_7088_w); + void video_7080_w(uint16_t data); + void video_7081_w(uint16_t data); + void video_7082_w(uint16_t data); + void video_7083_w(uint16_t data); + void video_7084_w(uint16_t data); + void video_7085_w(uint16_t data); + void video_7086_w(uint16_t data); + void video_7087_w(uint16_t data); + void video_7088_w(uint16_t data); - DECLARE_READ16_MEMBER(video_7083_r); + uint16_t video_7083_r(); - DECLARE_READ16_MEMBER(palette_r); - DECLARE_WRITE16_MEMBER(palette_w); + uint16_t palette_r(offs_t offset); + void palette_w(offs_t offset, uint16_t data); - DECLARE_WRITE16_MEMBER(spriteram_w); - DECLARE_READ16_MEMBER(spriteram_r); + void spriteram_w(offs_t offset, uint16_t data); + uint16_t spriteram_r(offs_t offset); - DECLARE_READ16_MEMBER(video_7051_r); - DECLARE_READ16_MEMBER(video_70e0_r); + uint16_t video_7051_r(); + uint16_t video_70e0_r(); auto write_video_irq_callback() { return m_video_irq_cb.bind(); }; diff --git a/src/devices/machine/gt64xxx.cpp b/src/devices/machine/gt64xxx.cpp index 21ebec2ce6c..4b2aab527e5 100644 --- a/src/devices/machine/gt64xxx.cpp +++ b/src/devices/machine/gt64xxx.cpp @@ -367,22 +367,22 @@ void gt64xxx_device::map_cpu_space() // PCI IO Window winStart = m_reg[GREG_PCI_IO_LO]<<21; winEnd = (m_reg[GREG_PCI_IO_LO]<<21) | (m_reg[GREG_PCI_IO_HI]<<21) | 0x1fffff; - m_cpu_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::master_io_r))); - m_cpu_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::master_io_w))); + m_cpu_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::master_io_r))); + m_cpu_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::master_io_w))); logerror("map_cpu_space pci_io start: %08X end: %08X\n", winStart, winEnd); // PCI MEM0 Window winStart = m_reg[GREG_PCI_MEM0_LO]<<21; winEnd = (m_reg[GREG_PCI_MEM0_LO]<<21) | (m_reg[GREG_PCI_MEM0_HI]<<21) | 0x1fffff; - m_cpu_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::master_mem0_r))); - m_cpu_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::master_mem0_w))); + m_cpu_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::master_mem0_r))); + m_cpu_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::master_mem0_w))); logerror("map_cpu_space pci_mem0 start: %08X end: %08X\n", winStart, winEnd); // PCI MEM1 Window winStart = m_reg[GREG_PCI_MEM1_LO]<<21; winEnd = (m_reg[GREG_PCI_MEM1_LO]<<21) | (m_reg[GREG_PCI_MEM1_HI]<<21) | 0x1fffff; - m_cpu_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::master_mem1_r))); - m_cpu_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::master_mem1_w))); + m_cpu_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::master_mem1_r))); + m_cpu_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::master_mem1_w))); logerror("map_cpu_space pci_mem1 start: %08X end: %08X\n", winStart, winEnd); // Setup the address mapping table for DMA lookups @@ -424,8 +424,8 @@ void gt64xxx_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20); winEnd = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_HI + 0x8 / 4 * ramIndex] << 20) | 0xfffff; winSize = winEnd - winStart + 1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::ras_0_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::ras_0_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::ras_0_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::ras_0_w))); LOGGALILEO("map_extra RAS0 start=%08X end=%08X size=%08X\n", winStart, winEnd, winSize); // RAS1 @@ -433,8 +433,8 @@ void gt64xxx_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20); winEnd = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_HI + 0x8 / 4 * ramIndex] << 20) | 0xfffff; winSize = winEnd - winStart + 1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::ras_1_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::ras_1_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::ras_1_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::ras_1_w))); LOGGALILEO("map_extra RAS1 start=%08X end=%08X size=%08X\n", winStart, winEnd, winSize); // RAS2 @@ -442,8 +442,8 @@ void gt64xxx_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20); winEnd = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_HI + 0x8 / 4 * ramIndex] << 20) | 0xfffff; winSize = winEnd - winStart + 1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::ras_2_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::ras_2_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::ras_2_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::ras_2_w))); LOGGALILEO("map_extra RAS2 start=%08X end=%08X size=%08X\n", winStart, winEnd, winSize); // RAS3 @@ -451,8 +451,8 @@ void gt64xxx_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20); winEnd = (m_reg[GREG_R1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_HI + 0x8 / 4 * ramIndex] << 20) | 0xfffff; winSize = winEnd - winStart + 1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(gt64xxx_device::ras_3_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(gt64xxx_device::ras_3_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(gt64xxx_device::ras_3_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(gt64xxx_device::ras_3_w))); LOGGALILEO("map_extra RAS3 start=%08X end=%08X size=%08X\n", winStart, winEnd, winSize); } @@ -492,24 +492,24 @@ WRITE_LINE_MEMBER(gt64xxx_device::pci_stall) } // PCI bus control -READ32_MEMBER (gt64xxx_device::pci_config_r) +uint32_t gt64xxx_device::pci_config_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; LOGGALILEO("%s galileo pci_config_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (gt64xxx_device::pci_config_w) +void gt64xxx_device::pci_config_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGGALILEO("%s galileo pci_config_w to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); } // PCI Master Window 0 -READ32_MEMBER (gt64xxx_device::master_mem0_r) +uint32_t gt64xxx_device::master_mem0_r(offs_t offset, uint32_t mem_mask) { uint32_t result = this->space(AS_PCI_MEM).read_dword((m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), mem_mask); LOGPCI("%s galileo pci mem0 read from offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM0_LO]<<21) | (offset*4), result, mem_mask); return result; } -WRITE32_MEMBER (gt64xxx_device::master_mem0_w) +void gt64xxx_device::master_mem0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (m_pci_stall_state) { if (m_stall_windex < 2) { @@ -534,20 +534,20 @@ WRITE32_MEMBER (gt64xxx_device::master_mem0_w) } // PCI Master Window 1 -READ32_MEMBER (gt64xxx_device::master_mem1_r) +uint32_t gt64xxx_device::master_mem1_r(offs_t offset, uint32_t mem_mask) { uint32_t result = this->space(AS_PCI_MEM).read_dword((m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), mem_mask); LOGPCI("%s galileo pci mem1 read from offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), result, mem_mask); return result; } -WRITE32_MEMBER (gt64xxx_device::master_mem1_w) +void gt64xxx_device::master_mem1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { this->space(AS_PCI_MEM).write_dword((m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), data, mem_mask); LOGPCI("%s galileo pci mem1 write to offset %08X = %08X & %08X\n", machine().describe_context(), (m_reg[GREG_PCI_MEM1_LO]<<21) | (offset*4), data, mem_mask); } // PCI Master IO -READ32_MEMBER (gt64xxx_device::master_io_r) +uint32_t gt64xxx_device::master_io_r(offs_t offset, uint32_t mem_mask) { uint32_t result = this->space(AS_PCI_IO).read_dword((m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), mem_mask); if (m_prev_addr != offset) { @@ -556,7 +556,7 @@ READ32_MEMBER (gt64xxx_device::master_io_r) } return result; } -WRITE32_MEMBER (gt64xxx_device::master_io_w) +void gt64xxx_device::master_io_w(offs_t offset, uint32_t data, uint32_t mem_mask) { this->space(AS_PCI_IO).write_dword((m_reg[GREG_PCI_IO_LO] << 21) | (offset * 4), data, mem_mask); if (m_prev_addr != offset) { @@ -565,53 +565,53 @@ WRITE32_MEMBER (gt64xxx_device::master_io_w) } } -READ32_MEMBER(gt64xxx_device::ras_0_r) +uint32_t gt64xxx_device::ras_0_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_ram[0][offset]; LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask); return result; } -WRITE32_MEMBER(gt64xxx_device::ras_0_w) +void gt64xxx_device::ras_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ram[0][offset]); LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask); } -READ32_MEMBER(gt64xxx_device::ras_1_r) +uint32_t gt64xxx_device::ras_1_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_ram[1][offset]; LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask); return result; } -WRITE32_MEMBER(gt64xxx_device::ras_1_w) +void gt64xxx_device::ras_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ram[1][offset]); LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask); } -READ32_MEMBER(gt64xxx_device::ras_2_r) +uint32_t gt64xxx_device::ras_2_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_ram[2][offset]; LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask); return result; } -WRITE32_MEMBER(gt64xxx_device::ras_2_w) +void gt64xxx_device::ras_2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ram[2][offset]); LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask); } -READ32_MEMBER(gt64xxx_device::ras_3_r) +uint32_t gt64xxx_device::ras_3_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_ram[3][offset]; LOGPCI("%s galileo ras_0 read from offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, result, mem_mask); return result; } -WRITE32_MEMBER(gt64xxx_device::ras_3_w) +void gt64xxx_device::ras_3_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ram[3][offset]); LOGPCI("%s galileo ras_0 write to offset %08X = %08X & %08X\n", machine().describe_context(), offset * 4, data, mem_mask); @@ -619,7 +619,7 @@ WRITE32_MEMBER(gt64xxx_device::ras_3_w) // CPU I/F -READ32_MEMBER (gt64xxx_device::cpu_if_r) +uint32_t gt64xxx_device::cpu_if_r(offs_t offset) { uint32_t result = m_reg[offset]; @@ -654,12 +654,12 @@ READ32_MEMBER (gt64xxx_device::cpu_if_r) break; case GREG_CONFIG_DATA: - result = config_data_r(space, offset); + result = config_data_r(offset); LOGGALILEO("%s Galileo GREG_CONFIG_DATA read from offset %03X = %08X\n", machine().describe_context(), offset*4, result); break; case GREG_CONFIG_ADDRESS: - result = config_address_r(space, offset); + result = config_address_r(); break; case GREG_INT_STATE: @@ -678,7 +678,7 @@ READ32_MEMBER (gt64xxx_device::cpu_if_r) return result; } -WRITE32_MEMBER(gt64xxx_device::cpu_if_w) +void gt64xxx_device::cpu_if_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask) { if (m_be) { data = swapendian_int32(data); @@ -797,7 +797,7 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w) break; case GREG_CONFIG_DATA: - pci_host_device::config_data_w(space, offset, data); + pci_host_device::config_data_w(offset, data); LOGGALILEO("%s Galileo PCI config data write to offset %03X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); break; @@ -823,7 +823,7 @@ WRITE32_MEMBER(gt64xxx_device::cpu_if_w) // Type 1 transaction, no modification needed modData = data; } - pci_host_device::config_address_w(space, offset, modData); + pci_host_device::config_address_w(offset, modData); LOGGALILEO("%s Galileo PCI config address write to offset %03X = %08X & %08X origData = %08X\n", machine().describe_context(), offset*4, modData, mem_mask, data); break; diff --git a/src/devices/machine/gt64xxx.h b/src/devices/machine/gt64xxx.h index 4b47f0cb898..8f5bd7db079 100644 --- a/src/devices/machine/gt64xxx.h +++ b/src/devices/machine/gt64xxx.h @@ -36,33 +36,31 @@ public: DECLARE_WRITE_LINE_MEMBER(pci_stall); // pci bus - DECLARE_READ32_MEMBER( pci_config_r); - DECLARE_WRITE32_MEMBER( pci_config_w); + uint32_t pci_config_r(offs_t offset, uint32_t mem_mask = ~0); + void pci_config_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); // cpu bus - DECLARE_READ32_MEMBER (cpu_if_r); - DECLARE_WRITE32_MEMBER(cpu_if_w); + uint32_t cpu_if_r(offs_t offset); + void cpu_if_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (master_mem0_r); - DECLARE_WRITE32_MEMBER(master_mem0_w); + uint32_t master_mem0_r(offs_t offset, uint32_t mem_mask = ~0); + void master_mem0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (master_mem1_r); - DECLARE_WRITE32_MEMBER(master_mem1_w); + uint32_t master_mem1_r(offs_t offset, uint32_t mem_mask = ~0); + void master_mem1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (master_io_r); - DECLARE_WRITE32_MEMBER(master_io_w); + uint32_t master_io_r(offs_t offset, uint32_t mem_mask = ~0); + void master_io_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); // devices - DECLARE_READ32_MEMBER (ras_0_r); - DECLARE_WRITE32_MEMBER(ras_0_w); - DECLARE_READ32_MEMBER(ras_1_r); - DECLARE_WRITE32_MEMBER(ras_1_w); - DECLARE_READ32_MEMBER(ras_2_r); - DECLARE_WRITE32_MEMBER(ras_2_w); - DECLARE_READ32_MEMBER(ras_3_r); - DECLARE_WRITE32_MEMBER(ras_3_w); - DECLARE_READ32_MEMBER (cs_0_r); - DECLARE_WRITE32_MEMBER(cs_0_w); + uint32_t ras_0_r(offs_t offset, uint32_t mem_mask = ~0); + void ras_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t ras_1_r(offs_t offset, uint32_t mem_mask = ~0); + void ras_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t ras_2_r(offs_t offset, uint32_t mem_mask = ~0); + void ras_2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t ras_3_r(offs_t offset, uint32_t mem_mask = ~0); + void ras_3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); // Enums enum proc_addr_bank {ADDR_RAS1_0, ADDR_RAS3_2, ADDR_CS2_0, ADDR_CS3_BCS, ADDR_PCI_IO, ADDR_PCI_MEM0, ADDR_PCI_MEM1, ADDR_NUM}; diff --git a/src/devices/machine/hd63450.cpp b/src/devices/machine/hd63450.cpp index c16a3224f4f..86d8a9e101c 100644 --- a/src/devices/machine/hd63450.cpp +++ b/src/devices/machine/hd63450.cpp @@ -101,7 +101,7 @@ void hd63450_device::device_reset() m_irq_callback(CLEAR_LINE); } -READ16_MEMBER(hd63450_device::read) +uint16_t hd63450_device::read(offs_t offset) { int channel,reg; @@ -150,7 +150,7 @@ READ16_MEMBER(hd63450_device::read) return 0xff; } -WRITE16_MEMBER(hd63450_device::write) +void hd63450_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) { int channel,reg; diff --git a/src/devices/machine/hd63450.h b/src/devices/machine/hd63450.h index 780db1dddb1..5aa17321090 100644 --- a/src/devices/machine/hd63450.h +++ b/src/devices/machine/hd63450.h @@ -41,8 +41,8 @@ public: m_burst_clock[3] = clk4; } - DECLARE_READ16_MEMBER( read ); - DECLARE_WRITE16_MEMBER( write ); + uint16_t read(offs_t offset); + void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); DECLARE_WRITE_LINE_MEMBER(drq0_w); DECLARE_WRITE_LINE_MEMBER(drq1_w); DECLARE_WRITE_LINE_MEMBER(drq2_w); diff --git a/src/devices/machine/hp_taco.cpp b/src/devices/machine/hp_taco.cpp index 9c3edf16fc4..f8b712dde7e 100644 --- a/src/devices/machine/hp_taco.cpp +++ b/src/devices/machine/hp_taco.cpp @@ -293,7 +293,7 @@ hp_taco_device::hp_taco_device(const machine_config &mconfig, const char *tag, d { } -WRITE16_MEMBER(hp_taco_device::reg_w) +void hp_taco_device::reg_w(offs_t offset, uint16_t data) { LOG_REG("wr R%u = %04x\n", 4 + offset , data); @@ -323,7 +323,7 @@ WRITE16_MEMBER(hp_taco_device::reg_w) } } -READ16_MEMBER(hp_taco_device::reg_r) +uint16_t hp_taco_device::reg_r(offs_t offset) { uint16_t res = 0; diff --git a/src/devices/machine/hp_taco.h b/src/devices/machine/hp_taco.h index b052ba77a8f..0ea70122b7f 100644 --- a/src/devices/machine/hp_taco.h +++ b/src/devices/machine/hp_taco.h @@ -28,8 +28,8 @@ public: auto sts() { return m_sts_handler.bind(); } // Register read/write - DECLARE_WRITE16_MEMBER(reg_w); - DECLARE_READ16_MEMBER(reg_r); + void reg_w(offs_t offset, uint16_t data); + uint16_t reg_r(offs_t offset); // Flag & status read DECLARE_READ_LINE_MEMBER(flg_r); diff --git a/src/devices/machine/i6300esb.cpp b/src/devices/machine/i6300esb.cpp index 143b70fc63d..3e9d8089b40 100644 --- a/src/devices/machine/i6300esb.cpp +++ b/src/devices/machine/i6300esb.cpp @@ -152,12 +152,12 @@ void i6300esb_lpc_device::reset_all_mappings() rtc_conf = 0x00; } -READ32_MEMBER (i6300esb_lpc_device::pmbase_r) +uint32_t i6300esb_lpc_device::pmbase_r() { return pmbase | 1; } -WRITE32_MEMBER(i6300esb_lpc_device::pmbase_w) +void i6300esb_lpc_device::pmbase_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&pmbase); pmbase &= 0x0000ff80; @@ -165,47 +165,47 @@ WRITE32_MEMBER(i6300esb_lpc_device::pmbase_w) remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::acpi_cntl_r) +uint8_t i6300esb_lpc_device::acpi_cntl_r() { return acpi_cntl; } -WRITE8_MEMBER(i6300esb_lpc_device::acpi_cntl_w) +void i6300esb_lpc_device::acpi_cntl_w(uint8_t data) { acpi_cntl = data; logerror("%s: acpi_cntl = %08x\n", tag(), acpi_cntl); remap_cb(); } -READ16_MEMBER (i6300esb_lpc_device::bios_cntl_r) +uint16_t i6300esb_lpc_device::bios_cntl_r() { return pmbase | 1; } -WRITE16_MEMBER(i6300esb_lpc_device::bios_cntl_w) +void i6300esb_lpc_device::bios_cntl_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&bios_cntl); logerror("%s: bios_cntl = %08x\n", tag(), bios_cntl); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::tco_cntl_r) +uint8_t i6300esb_lpc_device::tco_cntl_r() { return tco_cntl; } -WRITE8_MEMBER (i6300esb_lpc_device::tco_cntl_w) +void i6300esb_lpc_device::tco_cntl_w(uint8_t data) { tco_cntl = data; logerror("%s: tco_cntl = %02x\n", tag(), tco_cntl); } -READ32_MEMBER (i6300esb_lpc_device::gpio_base_r) +uint32_t i6300esb_lpc_device::gpio_base_r() { return gpio_base | 1; } -WRITE32_MEMBER(i6300esb_lpc_device::gpio_base_w) +void i6300esb_lpc_device::gpio_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&gpio_base); gpio_base &= 0x0000ffc0; @@ -213,405 +213,405 @@ WRITE32_MEMBER(i6300esb_lpc_device::gpio_base_w) remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::gpio_cntl_r) +uint8_t i6300esb_lpc_device::gpio_cntl_r() { return gpio_cntl; } -WRITE8_MEMBER (i6300esb_lpc_device::gpio_cntl_w) +void i6300esb_lpc_device::gpio_cntl_w(uint8_t data) { gpio_cntl = data; logerror("%s: gpio_cntl = %02x\n", tag(), gpio_cntl); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::pirq_rout_r) +uint8_t i6300esb_lpc_device::pirq_rout_r(offs_t offset) { return pirq_rout[offset]; } -WRITE8_MEMBER (i6300esb_lpc_device::pirq_rout_w) +void i6300esb_lpc_device::pirq_rout_w(offs_t offset, uint8_t data) { pirq_rout[offset] = data; logerror("%s: pirq_rout[%d] = %02x\n", tag(), offset, pirq_rout[offset]); } -READ8_MEMBER (i6300esb_lpc_device::serirq_cntl_r) +uint8_t i6300esb_lpc_device::serirq_cntl_r() { return serirq_cntl; } -WRITE8_MEMBER (i6300esb_lpc_device::serirq_cntl_w) +void i6300esb_lpc_device::serirq_cntl_w(uint8_t data) { serirq_cntl = data; logerror("%s: serirq_cntl = %02x\n", tag(), serirq_cntl); } -READ8_MEMBER (i6300esb_lpc_device::pirq2_rout_r) +uint8_t i6300esb_lpc_device::pirq2_rout_r(offs_t offset) { - return pirq_rout_r(space, offset+4); + return pirq_rout_r(offset+4); } -WRITE8_MEMBER (i6300esb_lpc_device::pirq2_rout_w) +void i6300esb_lpc_device::pirq2_rout_w(offs_t offset, uint8_t data) { - pirq_rout_w(space, offset+4, data); + pirq_rout_w(offset+4, data); } -READ8_MEMBER (i6300esb_lpc_device::d31_err_cfg_r) +uint8_t i6300esb_lpc_device::d31_err_cfg_r() { return d31_err_cfg; } -WRITE8_MEMBER (i6300esb_lpc_device::d31_err_cfg_w) +void i6300esb_lpc_device::d31_err_cfg_w(uint8_t data) { d31_err_cfg = data; logerror("%s: d31_err_cfg = %02x\n", tag(), d31_err_cfg); } -READ8_MEMBER (i6300esb_lpc_device::d31_err_sts_r) +uint8_t i6300esb_lpc_device::d31_err_sts_r() { return d31_err_sts; } -WRITE8_MEMBER (i6300esb_lpc_device::d31_err_sts_w) +void i6300esb_lpc_device::d31_err_sts_w(uint8_t data) { d31_err_sts &= ~data; logerror("%s: d31_err_sts = %02x\n", tag(), d31_err_sts); } -READ16_MEMBER (i6300esb_lpc_device::pci_dma_cfg_r) +uint16_t i6300esb_lpc_device::pci_dma_cfg_r() { return pci_dma_cfg; } -WRITE16_MEMBER(i6300esb_lpc_device::pci_dma_cfg_w) +void i6300esb_lpc_device::pci_dma_cfg_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&pci_dma_cfg); logerror("%s: pci_dma_cfg = %04x\n", tag(), pci_dma_cfg); } -READ16_MEMBER (i6300esb_lpc_device::gen_pmcon_1_r) +uint16_t i6300esb_lpc_device::gen_pmcon_1_r() { return gen_pmcon_1; } -WRITE16_MEMBER(i6300esb_lpc_device::gen_pmcon_1_w) +void i6300esb_lpc_device::gen_pmcon_1_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&gen_pmcon_1); logerror("%s: gen_pmcon_1 = %04x\n", tag(), gen_pmcon_1); } -READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r) +uint8_t i6300esb_lpc_device::gen_pmcon_2_r() { return gen_pmcon_2; } -WRITE8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_w) +void i6300esb_lpc_device::gen_pmcon_2_w(uint8_t data) { gen_pmcon_2 = data; logerror("%s: gen_pmcon_2 = %02x\n", tag(), gen_pmcon_2); } -READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_3_r) +uint8_t i6300esb_lpc_device::gen_pmcon_3_r() { return gen_pmcon_3; } -WRITE8_MEMBER (i6300esb_lpc_device::gen_pmcon_3_w) +void i6300esb_lpc_device::gen_pmcon_3_w(uint8_t data) { gen_pmcon_3 = data; logerror("%s: gen_pmcon_3 = %02x\n", tag(), gen_pmcon_3); } -READ32_MEMBER (i6300esb_lpc_device::rst_cnt2_r) +uint32_t i6300esb_lpc_device::rst_cnt2_r() { return rst_cnt2; } -WRITE32_MEMBER(i6300esb_lpc_device::rst_cnt2_w) +void i6300esb_lpc_device::rst_cnt2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&rst_cnt2); logerror("%s: rst_cnt2 = %08x\n", tag(), rst_cnt2); } -READ8_MEMBER (i6300esb_lpc_device::apm_cnt_r) +uint8_t i6300esb_lpc_device::apm_cnt_r() { return apm_cnt; } -WRITE8_MEMBER (i6300esb_lpc_device::apm_cnt_w) +void i6300esb_lpc_device::apm_cnt_w(uint8_t data) { apm_cnt = data; logerror("%s: apm_cnt = %02x\n", tag(), apm_cnt); } -READ8_MEMBER (i6300esb_lpc_device::apm_sts_r) +uint8_t i6300esb_lpc_device::apm_sts_r() { return apm_sts; } -WRITE8_MEMBER (i6300esb_lpc_device::apm_sts_w) +void i6300esb_lpc_device::apm_sts_w(uint8_t data) { apm_sts = data; logerror("%s: apm_sts = %02x\n", tag(), apm_sts); } -READ32_MEMBER (i6300esb_lpc_device::gpi_rout_r) +uint32_t i6300esb_lpc_device::gpi_rout_r() { return gpi_rout; } -WRITE32_MEMBER(i6300esb_lpc_device::gpi_rout_w) +void i6300esb_lpc_device::gpi_rout_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&gpi_rout); logerror("%s: gpi_rout = %08x\n", tag(), gpi_rout); } -READ8_MEMBER (i6300esb_lpc_device::mon_fwd_en_r) +uint8_t i6300esb_lpc_device::mon_fwd_en_r() { return mon_fwd_en; } -WRITE8_MEMBER (i6300esb_lpc_device::mon_fwd_en_w) +void i6300esb_lpc_device::mon_fwd_en_w(uint8_t data) { mon_fwd_en = data; logerror("%s: mon_fwd_en = %02x\n", tag(), mon_fwd_en); } -READ16_MEMBER (i6300esb_lpc_device::mon_trp_rng_r) +uint16_t i6300esb_lpc_device::mon_trp_rng_r(offs_t offset) { return mon_trp_rng[offset]; } -WRITE16_MEMBER(i6300esb_lpc_device::mon_trp_rng_w) +void i6300esb_lpc_device::mon_trp_rng_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&mon_trp_rng[offset]); logerror("%s: mon_trp_rng[%d] = %04x\n", tag(), 4+offset, mon_trp_rng[offset]); } -READ16_MEMBER (i6300esb_lpc_device::mon_trp_msk_r) +uint16_t i6300esb_lpc_device::mon_trp_msk_r() { return mon_trp_msk; } -WRITE16_MEMBER(i6300esb_lpc_device::mon_trp_msk_w) +void i6300esb_lpc_device::mon_trp_msk_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&mon_trp_msk); logerror("%s: mon_trp_msk = %04x\n", tag(), mon_trp_msk); } -READ32_MEMBER (i6300esb_lpc_device::gen_cntl_r) +uint32_t i6300esb_lpc_device::gen_cntl_r() { return gen_cntl; } -WRITE32_MEMBER(i6300esb_lpc_device::gen_cntl_w) +void i6300esb_lpc_device::gen_cntl_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&gen_cntl); logerror("%s: gen_cntl = %08x\n", tag(), gen_cntl); } -READ8_MEMBER (i6300esb_lpc_device::gen_sta_r) +uint8_t i6300esb_lpc_device::gen_sta_r() { return gen_sta; } -WRITE8_MEMBER (i6300esb_lpc_device::gen_sta_w) +void i6300esb_lpc_device::gen_sta_w(uint8_t data) { gen_sta = data; logerror("%s: gen_sta = %02x\n", tag(), gen_sta); } -READ8_MEMBER (i6300esb_lpc_device::back_cntl_r) +uint8_t i6300esb_lpc_device::back_cntl_r() { return back_cntl; } -WRITE8_MEMBER (i6300esb_lpc_device::back_cntl_w) +void i6300esb_lpc_device::back_cntl_w(uint8_t data) { back_cntl = data; logerror("%s: back_cntl = %02x\n", tag(), back_cntl); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::rtc_conf_r) +uint8_t i6300esb_lpc_device::rtc_conf_r() { return rtc_conf; } -WRITE8_MEMBER (i6300esb_lpc_device::rtc_conf_w) +void i6300esb_lpc_device::rtc_conf_w(uint8_t data) { rtc_conf = data; logerror("%s: rtc_conf = %02x\n", tag(), rtc_conf); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_r) +uint8_t i6300esb_lpc_device::lpc_if_com_range_r() { return lpc_if_com_range; } -WRITE8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_w) +void i6300esb_lpc_device::lpc_if_com_range_w(uint8_t data) { lpc_if_com_range = data; logerror("%s: lpc_if_com_range = %02x\n", tag(), lpc_if_com_range); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::lpc_if_fdd_lpt_range_r) +uint8_t i6300esb_lpc_device::lpc_if_fdd_lpt_range_r() { return lpc_if_fdd_lpt_range; } -WRITE8_MEMBER (i6300esb_lpc_device::lpc_if_fdd_lpt_range_w) +void i6300esb_lpc_device::lpc_if_fdd_lpt_range_w(offs_t offset, uint8_t data, uint8_t mem_mask) { COMBINE_DATA(&lpc_if_fdd_lpt_range); logerror("%s: lpc_if_fdd_lpt_range = %02x\n", tag(), lpc_if_fdd_lpt_range); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::lpc_if_sound_range_r) +uint8_t i6300esb_lpc_device::lpc_if_sound_range_r() { return lpc_if_sound_range; } -WRITE8_MEMBER (i6300esb_lpc_device::lpc_if_sound_range_w) +void i6300esb_lpc_device::lpc_if_sound_range_w(offs_t offset, uint8_t data, uint8_t mem_mask) { COMBINE_DATA(&lpc_if_sound_range); logerror("%s: lpc_if_sound_range = %02x\n", tag(), lpc_if_sound_range); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::fwh_dec_en1_r) +uint8_t i6300esb_lpc_device::fwh_dec_en1_r() { return fwh_dec_en1; } -WRITE8_MEMBER (i6300esb_lpc_device::fwh_dec_en1_w) +void i6300esb_lpc_device::fwh_dec_en1_w(uint8_t data) { fwh_dec_en1 = data | 0x80; logerror("%s: fwh_dec_en1 = %02x\n", tag(), fwh_dec_en1); remap_cb(); } -READ16_MEMBER (i6300esb_lpc_device::gen1_dec_r) +uint16_t i6300esb_lpc_device::gen1_dec_r() { return gen1_dec; } -WRITE16_MEMBER(i6300esb_lpc_device::gen1_dec_w) +void i6300esb_lpc_device::gen1_dec_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&gen1_dec); logerror("%s: gen1_dec = %04x\n", tag(), gen1_dec); remap_cb(); } -READ16_MEMBER (i6300esb_lpc_device::lpc_en_r) +uint16_t i6300esb_lpc_device::lpc_en_r() { return lpc_en; } -WRITE16_MEMBER(i6300esb_lpc_device::lpc_en_w) +void i6300esb_lpc_device::lpc_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&lpc_en); logerror("%s: lpc_en = %04x\n", tag(), lpc_en); remap_cb(); } -READ32_MEMBER (i6300esb_lpc_device::fwh_sel1_r) +uint32_t i6300esb_lpc_device::fwh_sel1_r() { return fwh_sel1; } -WRITE32_MEMBER(i6300esb_lpc_device::fwh_sel1_w) +void i6300esb_lpc_device::fwh_sel1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&fwh_sel1); logerror("%s: fwh_sel1 = %08x\n", tag(), fwh_sel1); remap_cb(); } -READ16_MEMBER (i6300esb_lpc_device::gen2_dec_r) +uint16_t i6300esb_lpc_device::gen2_dec_r() { return gen2_dec; } -WRITE16_MEMBER(i6300esb_lpc_device::gen2_dec_w) +void i6300esb_lpc_device::gen2_dec_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&gen2_dec); logerror("%s: gen2_dec = %04x\n", tag(), gen2_dec); remap_cb(); } -READ16_MEMBER (i6300esb_lpc_device::fwh_sel2_r) +uint16_t i6300esb_lpc_device::fwh_sel2_r() { return fwh_sel2; } -WRITE16_MEMBER(i6300esb_lpc_device::fwh_sel2_w) +void i6300esb_lpc_device::fwh_sel2_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&fwh_sel2); logerror("%s: fwh_sel2 = %04x\n", tag(), fwh_sel2); remap_cb(); } -READ8_MEMBER (i6300esb_lpc_device::fwh_dec_en2_r) +uint8_t i6300esb_lpc_device::fwh_dec_en2_r() { return fwh_dec_en2; } -WRITE8_MEMBER (i6300esb_lpc_device::fwh_dec_en2_w) +void i6300esb_lpc_device::fwh_dec_en2_w(uint8_t data) { fwh_dec_en2 = data; logerror("%s: fwh_dec_en2 = %02x\n", tag(), fwh_dec_en2); remap_cb(); } -READ16_MEMBER (i6300esb_lpc_device::func_dis_r) +uint16_t i6300esb_lpc_device::func_dis_r() { return func_dis; } -WRITE16_MEMBER(i6300esb_lpc_device::func_dis_w) +void i6300esb_lpc_device::func_dis_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&func_dis); logerror("%s: func_dis = %04x\n", tag(), func_dis); } -READ32_MEMBER (i6300esb_lpc_device::etr1_r) +uint32_t i6300esb_lpc_device::etr1_r() { return etr1; } -WRITE32_MEMBER(i6300esb_lpc_device::etr1_w) +void i6300esb_lpc_device::etr1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&etr1); logerror("%s: etr1 = %08x\n", tag(), etr1); } -READ32_MEMBER (i6300esb_lpc_device::mfid_r) +uint32_t i6300esb_lpc_device::mfid_r() { return 0xf66; } -READ32_MEMBER (i6300esb_lpc_device::unk_fc_r) +uint32_t i6300esb_lpc_device::unk_fc_r() { logerror("%s: read undocumented config reg fc\n", tag()); return 0; } -WRITE32_MEMBER(i6300esb_lpc_device::unk_fc_w) +void i6300esb_lpc_device::unk_fc_w(uint32_t data) { logerror("%s: write undocumented config reg fc (%08x)\n", tag(), data); } -READ8_MEMBER (i6300esb_lpc_device::siu_config_port_r) +uint8_t i6300esb_lpc_device::siu_config_port_r() { return siu_config_port; } -WRITE8_MEMBER (i6300esb_lpc_device::siu_config_port_w) +void i6300esb_lpc_device::siu_config_port_w(uint8_t data) { siu_config_port = data; switch(siu_config_state) { @@ -634,13 +634,13 @@ WRITE8_MEMBER (i6300esb_lpc_device::siu_config_port_w) } } -READ8_MEMBER (i6300esb_lpc_device::siu_data_port_r) +uint8_t i6300esb_lpc_device::siu_data_port_r() { logerror("%s: siu config read port %02x\n", tag(), siu_config_port); return 0xff; } -WRITE8_MEMBER (i6300esb_lpc_device::siu_data_port_w) +void i6300esb_lpc_device::siu_data_port_w(uint8_t data) { if(siu_config_state < 2) { logerror("%s: siu config write port with config disabled (port=%02x, data=%02x)\n", tag(), siu_config_port, data); @@ -649,20 +649,20 @@ WRITE8_MEMBER (i6300esb_lpc_device::siu_data_port_w) logerror("%s: siu config write port %02x, %02x\n", tag(), siu_config_port, data); } -READ8_MEMBER (i6300esb_lpc_device::nmi_sc_r) +uint8_t i6300esb_lpc_device::nmi_sc_r() { nmi_sc ^= 0x10; return nmi_sc; } -WRITE8_MEMBER (i6300esb_lpc_device::nmi_sc_w) +void i6300esb_lpc_device::nmi_sc_w(uint8_t data) { nmi_sc = data; logerror("%s: nmi_sc = %02x\n", tag(), nmi_sc); } -WRITE8_MEMBER (i6300esb_lpc_device::nop_w) +void i6300esb_lpc_device::nop_w(uint8_t data) { } diff --git a/src/devices/machine/i6300esb.h b/src/devices/machine/i6300esb.h index dd154372dfc..a126a5c1735 100644 --- a/src/devices/machine/i6300esb.h +++ b/src/devices/machine/i6300esb.h @@ -41,97 +41,97 @@ private: uint8_t gen_pmcon_2, gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc; int siu_config_state; - DECLARE_WRITE8_MEMBER (nop_w); + void nop_w(uint8_t data); // configuration space registers - DECLARE_READ32_MEMBER (pmbase_r); // 40 - DECLARE_WRITE32_MEMBER(pmbase_w); - DECLARE_READ8_MEMBER (acpi_cntl_r); // 44 - DECLARE_WRITE8_MEMBER (acpi_cntl_w); - DECLARE_READ16_MEMBER (bios_cntl_r); // 4e - DECLARE_WRITE16_MEMBER(bios_cntl_w); - DECLARE_READ8_MEMBER (tco_cntl_r); // 54 - DECLARE_WRITE8_MEMBER (tco_cntl_w); - DECLARE_READ32_MEMBER (gpio_base_r); // 58 - DECLARE_WRITE32_MEMBER(gpio_base_w); - DECLARE_READ8_MEMBER (gpio_cntl_r); // 5c - DECLARE_WRITE8_MEMBER (gpio_cntl_w); - DECLARE_READ8_MEMBER (pirq_rout_r); // 60-63 - DECLARE_WRITE8_MEMBER (pirq_rout_w); - DECLARE_READ8_MEMBER (serirq_cntl_r); // 64 - DECLARE_WRITE8_MEMBER (serirq_cntl_w); - DECLARE_READ8_MEMBER (pirq2_rout_r); // 68-6b - DECLARE_WRITE8_MEMBER (pirq2_rout_w); - DECLARE_READ8_MEMBER (d31_err_cfg_r); // 88 - DECLARE_WRITE8_MEMBER (d31_err_cfg_w); - DECLARE_READ8_MEMBER (d31_err_sts_r); // 8a - DECLARE_WRITE8_MEMBER (d31_err_sts_w); - DECLARE_READ16_MEMBER (pci_dma_cfg_r); // 90 - DECLARE_WRITE16_MEMBER(pci_dma_cfg_w); - DECLARE_READ16_MEMBER (gen_pmcon_1_r); // a0 - DECLARE_WRITE16_MEMBER(gen_pmcon_1_w); - DECLARE_READ8_MEMBER (gen_pmcon_2_r); // a2 - DECLARE_WRITE8_MEMBER(gen_pmcon_2_w); - DECLARE_READ8_MEMBER (gen_pmcon_3_r); // a4 - DECLARE_WRITE8_MEMBER (gen_pmcon_3_w); - DECLARE_READ32_MEMBER (rst_cnt2_r); // ac - DECLARE_WRITE32_MEMBER(rst_cnt2_w); - DECLARE_READ8_MEMBER (apm_cnt_r); // b2 - DECLARE_WRITE8_MEMBER (apm_cnt_w); - DECLARE_READ8_MEMBER (apm_sts_r); // b3 - DECLARE_WRITE8_MEMBER (apm_sts_w); - DECLARE_READ32_MEMBER (gpi_rout_r); // b8 - DECLARE_WRITE32_MEMBER(gpi_rout_w); - DECLARE_READ8_MEMBER (mon_fwd_en_r); // c0 - DECLARE_WRITE8_MEMBER (mon_fwd_en_w); - DECLARE_READ16_MEMBER (mon_trp_rng_r); // c4-ca - DECLARE_WRITE16_MEMBER(mon_trp_rng_w); - DECLARE_READ16_MEMBER (mon_trp_msk_r); // cc - DECLARE_WRITE16_MEMBER(mon_trp_msk_w); - DECLARE_READ32_MEMBER (gen_cntl_r); // d0 - DECLARE_WRITE32_MEMBER(gen_cntl_w); - DECLARE_READ8_MEMBER (gen_sta_r); // d4 - DECLARE_WRITE8_MEMBER (gen_sta_w); - DECLARE_READ8_MEMBER (back_cntl_r); // d5 - DECLARE_WRITE8_MEMBER (back_cntl_w); - DECLARE_READ8_MEMBER (rtc_conf_r); // d8 - DECLARE_WRITE8_MEMBER (rtc_conf_w); - DECLARE_READ8_MEMBER (lpc_if_com_range_r); // e0 - DECLARE_WRITE8_MEMBER (lpc_if_com_range_w); - DECLARE_READ8_MEMBER (lpc_if_fdd_lpt_range_r); // e1 - DECLARE_WRITE8_MEMBER (lpc_if_fdd_lpt_range_w); - DECLARE_READ8_MEMBER (lpc_if_sound_range_r); // e2 - DECLARE_WRITE8_MEMBER (lpc_if_sound_range_w); - DECLARE_READ8_MEMBER (fwh_dec_en1_r); // e3 - DECLARE_WRITE8_MEMBER (fwh_dec_en1_w); - DECLARE_READ16_MEMBER (gen1_dec_r); // e4 - DECLARE_WRITE16_MEMBER(gen1_dec_w); - DECLARE_READ16_MEMBER (lpc_en_r); // e6 - DECLARE_WRITE16_MEMBER(lpc_en_w); - DECLARE_READ32_MEMBER (fwh_sel1_r); // e8 - DECLARE_WRITE32_MEMBER(fwh_sel1_w); - DECLARE_READ16_MEMBER (gen2_dec_r); // ec - DECLARE_WRITE16_MEMBER(gen2_dec_w); - DECLARE_READ16_MEMBER (fwh_sel2_r); // ee - DECLARE_WRITE16_MEMBER(fwh_sel2_w); - DECLARE_READ8_MEMBER (fwh_dec_en2_r); // f0 - DECLARE_WRITE8_MEMBER (fwh_dec_en2_w); - DECLARE_READ16_MEMBER (func_dis_r); // f2 - DECLARE_WRITE16_MEMBER(func_dis_w); - DECLARE_READ32_MEMBER (etr1_r); // f4 - DECLARE_WRITE32_MEMBER(etr1_w); - DECLARE_READ32_MEMBER (mfid_r); // f8 - DECLARE_READ32_MEMBER (unk_fc_r); // fc - DECLARE_WRITE32_MEMBER(unk_fc_w); + uint32_t pmbase_r(); // 40 + void pmbase_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t acpi_cntl_r(); // 44 + void acpi_cntl_w(uint8_t data); + uint16_t bios_cntl_r(); // 4e + void bios_cntl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t tco_cntl_r(); // 54 + void tco_cntl_w(uint8_t data); + uint32_t gpio_base_r(); // 58 + void gpio_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t gpio_cntl_r(); // 5c + void gpio_cntl_w(uint8_t data); + uint8_t pirq_rout_r(offs_t offset); // 60-63 + void pirq_rout_w(offs_t offset, uint8_t data); + uint8_t serirq_cntl_r(); // 64 + void serirq_cntl_w(uint8_t data); + uint8_t pirq2_rout_r(offs_t offset); // 68-6b + void pirq2_rout_w(offs_t offset, uint8_t data); + uint8_t d31_err_cfg_r(); // 88 + void d31_err_cfg_w(uint8_t data); + uint8_t d31_err_sts_r(); // 8a + void d31_err_sts_w(uint8_t data); + uint16_t pci_dma_cfg_r(); // 90 + void pci_dma_cfg_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t gen_pmcon_1_r(); // a0 + void gen_pmcon_1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t gen_pmcon_2_r(); // a2 + void gen_pmcon_2_w(uint8_t data); + uint8_t gen_pmcon_3_r(); // a4 + void gen_pmcon_3_w(uint8_t data); + uint32_t rst_cnt2_r(); // ac + void rst_cnt2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t apm_cnt_r(); // b2 + void apm_cnt_w(uint8_t data); + uint8_t apm_sts_r(); // b3 + void apm_sts_w(uint8_t data); + uint32_t gpi_rout_r(); // b8 + void gpi_rout_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t mon_fwd_en_r(); // c0 + void mon_fwd_en_w(uint8_t data); + uint16_t mon_trp_rng_r(offs_t offset); // c4-ca + void mon_trp_rng_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t mon_trp_msk_r(); // cc + void mon_trp_msk_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t gen_cntl_r(); // d0 + void gen_cntl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t gen_sta_r(); // d4 + void gen_sta_w(uint8_t data); + uint8_t back_cntl_r(); // d5 + void back_cntl_w(uint8_t data); + uint8_t rtc_conf_r(); // d8 + void rtc_conf_w(uint8_t data); + uint8_t lpc_if_com_range_r(); // e0 + void lpc_if_com_range_w(uint8_t data); + uint8_t lpc_if_fdd_lpt_range_r(); // e1 + void lpc_if_fdd_lpt_range_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint8_t lpc_if_sound_range_r(); // e2 + void lpc_if_sound_range_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint8_t fwh_dec_en1_r(); // e3 + void fwh_dec_en1_w(uint8_t data); + uint16_t gen1_dec_r(); // e4 + void gen1_dec_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t lpc_en_r(); // e6 + void lpc_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t fwh_sel1_r(); // e8 + void fwh_sel1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t gen2_dec_r(); // ec + void gen2_dec_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t fwh_sel2_r(); // ee + void fwh_sel2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t fwh_dec_en2_r(); // f0 + void fwh_dec_en2_w(uint8_t data); + uint16_t func_dis_r(); // f2 + void func_dis_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t etr1_r(); // f4 + void etr1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t mfid_r(); // f8 + uint32_t unk_fc_r(); // fc + void unk_fc_w(uint32_t data); // i/o space registers - DECLARE_READ8_MEMBER (siu_config_port_r); // 4e - DECLARE_WRITE8_MEMBER (siu_config_port_w); - DECLARE_READ8_MEMBER (siu_data_port_r); // 4f - DECLARE_WRITE8_MEMBER (siu_data_port_w); - DECLARE_READ8_MEMBER (nmi_sc_r); // 61 - DECLARE_WRITE8_MEMBER (nmi_sc_w); + uint8_t siu_config_port_r(); // 4e + void siu_config_port_w(uint8_t data); + uint8_t siu_data_port_r(); // 4f + void siu_data_port_w(uint8_t data); + uint8_t nmi_sc_r(); // 61 + void nmi_sc_w(uint8_t data); void map_bios(address_space *memory_space, uint32_t start, uint32_t end, int idsel); }; diff --git a/src/devices/machine/i80130.cpp b/src/devices/machine/i80130.cpp index 524f1dca516..94d03c236e2 100644 --- a/src/devices/machine/i80130.cpp +++ b/src/devices/machine/i80130.cpp @@ -31,7 +31,7 @@ void i80130_device::io_map(address_map &map) //map(0x08, 0x0f).rw("pit", FUNC(pit8254_device::read), FUNC(pit8254_device::write)).umask16(0x00ff); } -READ16_MEMBER( i80130_device::io_r ) +uint16_t i80130_device::io_r(offs_t offset, uint16_t mem_mask) { uint16_t data = 0; @@ -55,7 +55,7 @@ READ16_MEMBER( i80130_device::io_r ) return data; } -WRITE16_MEMBER( i80130_device::io_w ) +void i80130_device::io_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/i80130.h b/src/devices/machine/i80130.h index 0a0629b5a77..0b5958ad875 100644 --- a/src/devices/machine/i80130.h +++ b/src/devices/machine/i80130.h @@ -65,8 +65,8 @@ private: DECLARE_WRITE_LINE_MEMBER( delay_w ) { m_write_delay(state); } DECLARE_WRITE_LINE_MEMBER( baud_w ) { m_write_baud(state); } - DECLARE_READ16_MEMBER( io_r ); - DECLARE_WRITE16_MEMBER( io_w ); + uint16_t io_r(offs_t offset, uint16_t mem_mask = ~0); + void io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); }; diff --git a/src/devices/machine/i82371sb.cpp b/src/devices/machine/i82371sb.cpp index d8feaeb05c1..9140b0d4216 100644 --- a/src/devices/machine/i82371sb.cpp +++ b/src/devices/machine/i82371sb.cpp @@ -189,71 +189,71 @@ void i82371sb_isa_device::reset_all_mappings() pci_device::reset_all_mappings(); } -WRITE8_MEMBER (i82371sb_isa_device::boot_state_w) +void i82371sb_isa_device::boot_state_w(uint8_t data) { m_boot_state_hook((offs_t)0, data); } -WRITE8_MEMBER (i82371sb_isa_device::nop_w) +void i82371sb_isa_device::nop_w(uint8_t data) { } -READ8_MEMBER (i82371sb_isa_device::iort_r) +uint8_t i82371sb_isa_device::iort_r() { return iort; } -WRITE8_MEMBER(i82371sb_isa_device::iort_w) +void i82371sb_isa_device::iort_w(uint8_t data) { iort = data; logerror("iort = %02x\n", iort); } -READ16_MEMBER (i82371sb_isa_device::xbcs_r) +uint16_t i82371sb_isa_device::xbcs_r() { return xbcs; } -WRITE16_MEMBER(i82371sb_isa_device::xbcs_w) +void i82371sb_isa_device::xbcs_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&xbcs); logerror("xbcs = %04x\n", xbcs); } -READ8_MEMBER (i82371sb_isa_device::pirqrc_r) +uint8_t i82371sb_isa_device::pirqrc_r(offs_t offset) { return pirqrc[offset]; } -WRITE8_MEMBER(i82371sb_isa_device::pirqrc_w) +void i82371sb_isa_device::pirqrc_w(offs_t offset, uint8_t data) { pirqrc[offset] = data; logerror("pirqrc[%d] = %02x\n", offset, pirqrc[offset]); } -READ8_MEMBER (i82371sb_isa_device::tom_r) +uint8_t i82371sb_isa_device::tom_r() { return tom; } -WRITE8_MEMBER(i82371sb_isa_device::tom_w) +void i82371sb_isa_device::tom_w(uint8_t data) { tom = data; logerror("tom = %02x\n", tom); } -READ16_MEMBER (i82371sb_isa_device::mstat_r) +uint16_t i82371sb_isa_device::mstat_r() { return mstat; } -WRITE16_MEMBER(i82371sb_isa_device::mstat_w) +void i82371sb_isa_device::mstat_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&mstat); logerror("mstat = %04x\n", mstat); } -READ8_MEMBER (i82371sb_isa_device::mbirq01_r) +uint8_t i82371sb_isa_device::mbirq01_r(offs_t offset) { if (offset == 0) return mbirq0; @@ -261,7 +261,7 @@ READ8_MEMBER (i82371sb_isa_device::mbirq01_r) return mbirq1; } -WRITE8_MEMBER(i82371sb_isa_device::mbirq01_w) +void i82371sb_isa_device::mbirq01_w(offs_t offset, uint8_t data) { if (offset == 0) { @@ -275,114 +275,114 @@ WRITE8_MEMBER(i82371sb_isa_device::mbirq01_w) } } -READ8_MEMBER (i82371sb_isa_device::mbdma_r) +uint8_t i82371sb_isa_device::mbdma_r(offs_t offset) { return mbdma[offset]; } -WRITE8_MEMBER(i82371sb_isa_device::mbdma_w) +void i82371sb_isa_device::mbdma_w(offs_t offset, uint8_t data) { mbdma[offset] = data; logerror("mbdma[%d] = %02x\n", offset, mbdma); } -READ8_MEMBER (i82371sb_isa_device::apicbase_r) +uint8_t i82371sb_isa_device::apicbase_r() { return apicbase; } -WRITE8_MEMBER(i82371sb_isa_device::apicbase_w) +void i82371sb_isa_device::apicbase_w(uint8_t data) { apicbase = data; logerror("apicbase = %02x\n", apicbase); } -READ8_MEMBER (i82371sb_isa_device::dlc_r) +uint8_t i82371sb_isa_device::dlc_r() { return dlc; } -WRITE8_MEMBER(i82371sb_isa_device::dlc_w) +void i82371sb_isa_device::dlc_w(uint8_t data) { dlc = data; logerror("dlc = %02x\n", dlc); } -READ8_MEMBER (i82371sb_isa_device::smicntl_r) +uint8_t i82371sb_isa_device::smicntl_r() { return smicntl; } -WRITE8_MEMBER(i82371sb_isa_device::smicntl_w) +void i82371sb_isa_device::smicntl_w(uint8_t data) { smicntl = data; update_smireq_line(); logerror("smicntl = %02x\n", smicntl); } -READ16_MEMBER (i82371sb_isa_device::smien_r) +uint16_t i82371sb_isa_device::smien_r() { return smien; } -WRITE16_MEMBER(i82371sb_isa_device::smien_w) +void i82371sb_isa_device::smien_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&smien); update_smireq_line(); logerror("smien = %04x\n", smien); } -READ32_MEMBER (i82371sb_isa_device::see_r) +uint32_t i82371sb_isa_device::see_r() { return see; } -WRITE32_MEMBER(i82371sb_isa_device::see_w) +void i82371sb_isa_device::see_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&see); logerror("see = %08x\n", see); } -READ8_MEMBER (i82371sb_isa_device::ftmr_r) +uint8_t i82371sb_isa_device::ftmr_r() { return ftmr; } -WRITE8_MEMBER(i82371sb_isa_device::ftmr_w) +void i82371sb_isa_device::ftmr_w(uint8_t data) { ftmr = data; logerror("ftmr = %02x\n", ftmr); } -READ16_MEMBER (i82371sb_isa_device::smireq_r) +uint16_t i82371sb_isa_device::smireq_r() { return smireq; } -WRITE16_MEMBER(i82371sb_isa_device::smireq_w) +void i82371sb_isa_device::smireq_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&smireq); update_smireq_line(); logerror("smireq = %04x\n", smireq); } -READ8_MEMBER (i82371sb_isa_device::ctltmr_r) +uint8_t i82371sb_isa_device::ctltmr_r() { return ctlmtr; } -WRITE8_MEMBER(i82371sb_isa_device::ctltmr_w) +void i82371sb_isa_device::ctltmr_w(uint8_t data) { ctlmtr = data; logerror("ctlmtr = %02x\n", ctlmtr); } -READ8_MEMBER (i82371sb_isa_device::cthtmr_r) +uint8_t i82371sb_isa_device::cthtmr_r() { return cthmtr; } -WRITE8_MEMBER(i82371sb_isa_device::cthtmr_w) +void i82371sb_isa_device::cthtmr_w(uint8_t data) { cthmtr = data; logerror("cthmtr = %02x\n", cthmtr); @@ -526,7 +526,7 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::at_pit8254_out2_changed ) m_speaker->level_w(m_at_spkrdata & m_pit_out2); } -READ8_MEMBER( i82371sb_isa_device::at_page8_r ) +uint8_t i82371sb_isa_device::at_page8_r(offs_t offset) { uint8_t data = m_at_pages[offset % 0x10]; @@ -549,7 +549,7 @@ READ8_MEMBER( i82371sb_isa_device::at_page8_r ) } -WRITE8_MEMBER( i82371sb_isa_device::at_page8_w ) +void i82371sb_isa_device::at_page8_w(offs_t offset, uint8_t data) { m_at_pages[offset % 0x10] = data; @@ -801,7 +801,7 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq14_w ) { m_pic8259_slave->ir6_w(s WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq15_w ) { m_pic8259_slave->ir7_w(state); } -READ8_MEMBER( i82371sb_isa_device::at_portb_r ) +uint8_t i82371sb_isa_device::at_portb_r() { uint8_t data = m_at_speaker; @@ -816,7 +816,7 @@ READ8_MEMBER( i82371sb_isa_device::at_portb_r ) return data; } -WRITE8_MEMBER( i82371sb_isa_device::at_portb_w ) +void i82371sb_isa_device::at_portb_w(uint8_t data) { m_at_speaker = data; m_pit8254->write_gate2(BIT(data, 0)); @@ -832,17 +832,17 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::iochck_w ) m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); } -READ8_MEMBER( i82371sb_isa_device::at_dma8237_2_r ) +uint8_t i82371sb_isa_device::at_dma8237_2_r(offs_t offset) { return m_dma8237_2->read(offset / 2); } -WRITE8_MEMBER( i82371sb_isa_device::at_dma8237_2_w ) +void i82371sb_isa_device::at_dma8237_2_w(offs_t offset, uint8_t data) { m_dma8237_2->write(offset / 2, data); } -READ8_MEMBER(i82371sb_isa_device::eisa_irq_read) +uint8_t i82371sb_isa_device::eisa_irq_read(offs_t offset) { if (offset == 0) return m_eisa_irq_mode & 0xff; @@ -850,7 +850,7 @@ READ8_MEMBER(i82371sb_isa_device::eisa_irq_read) return m_eisa_irq_mode >> 8; } -WRITE8_MEMBER(i82371sb_isa_device::eisa_irq_write) +void i82371sb_isa_device::eisa_irq_write(offs_t offset, uint8_t data) { if (offset == 0) m_eisa_irq_mode = (m_eisa_irq_mode & 0xff00) | data; @@ -859,7 +859,7 @@ WRITE8_MEMBER(i82371sb_isa_device::eisa_irq_write) // TODO: update m_pic8259_master and m_pic8259_slave with the new configuration } -READ8_MEMBER( i82371sb_isa_device::read_apmcapms ) +uint8_t i82371sb_isa_device::read_apmcapms(offs_t offset) { if (offset == 0) return apmc; @@ -867,7 +867,7 @@ READ8_MEMBER( i82371sb_isa_device::read_apmcapms ) return apms; } -WRITE8_MEMBER( i82371sb_isa_device::write_apmcapms ) +void i82371sb_isa_device::write_apmcapms(offs_t offset, uint8_t data) { if (offset == 0) { @@ -976,12 +976,12 @@ WRITE_LINE_MEMBER(i82371sb_ide_device::secondary_int) m_irq_sec_callback(state); } -READ16_MEMBER(i82371sb_ide_device::command_r) +uint16_t i82371sb_ide_device::command_r() { return command; } -WRITE16_MEMBER(i82371sb_ide_device::command_w) +void i82371sb_ide_device::command_w(offs_t offset, uint16_t data, uint16_t mem_mask) { mem_mask &= 5; COMBINE_DATA(&command); @@ -989,12 +989,12 @@ WRITE16_MEMBER(i82371sb_ide_device::command_w) remap_cb(); } -READ32_MEMBER(i82371sb_ide_device::bmiba_r) +uint32_t i82371sb_ide_device::bmiba_r() { return bmiba; } -WRITE32_MEMBER(i82371sb_ide_device::bmiba_w) +void i82371sb_ide_device::bmiba_w(offs_t offset, uint32_t data, uint32_t mem_mask) { mem_mask &= 0xfff0; COMBINE_DATA(&bmiba); @@ -1002,83 +1002,83 @@ WRITE32_MEMBER(i82371sb_ide_device::bmiba_w) remap_cb(); } -READ16_MEMBER(i82371sb_ide_device::idetim_primary_r) +uint16_t i82371sb_ide_device::idetim_primary_r() { return idetim_primary; } -WRITE16_MEMBER(i82371sb_ide_device::idetim_primary_w) +void i82371sb_ide_device::idetim_primary_w(uint16_t data) { } -READ16_MEMBER(i82371sb_ide_device::idetim_secondary_r) +uint16_t i82371sb_ide_device::idetim_secondary_r() { return idetim_secondary; } -WRITE16_MEMBER(i82371sb_ide_device::idetim_secondary_w) +void i82371sb_ide_device::idetim_secondary_w(uint16_t data) { } -READ8_MEMBER(i82371sb_ide_device::sidetim_r) +uint8_t i82371sb_ide_device::sidetim_r() { return sidetim; } -WRITE8_MEMBER(i82371sb_ide_device::sidetim_w) +void i82371sb_ide_device::sidetim_w(uint8_t data) { } -READ32_MEMBER(i82371sb_ide_device::ide1_read32_cs0_r) +uint32_t i82371sb_ide_device::ide1_read32_cs0_r(offs_t offset, uint32_t mem_mask) { if (!(command & 1)) return 0xffffffff; return m_ide1->read_cs0(offset, mem_mask); } -WRITE32_MEMBER(i82371sb_ide_device::ide1_write32_cs0_w) +void i82371sb_ide_device::ide1_write32_cs0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (!(command & 1)) return; m_ide1->write_cs0(offset, data, mem_mask); } -READ32_MEMBER(i82371sb_ide_device::ide2_read32_cs0_r) +uint32_t i82371sb_ide_device::ide2_read32_cs0_r(offs_t offset, uint32_t mem_mask) { if (!(command & 1)) return 0xffffffff; return m_ide2->read_cs0(offset, mem_mask); } -WRITE32_MEMBER(i82371sb_ide_device::ide2_write32_cs0_w) +void i82371sb_ide_device::ide2_write32_cs0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (!(command & 1)) return; m_ide2->write_cs0(offset, data, mem_mask); } -READ8_MEMBER(i82371sb_ide_device::ide1_read_cs1_r) +uint8_t i82371sb_ide_device::ide1_read_cs1_r() { if (!(command & 1)) return 0xff; return m_ide1->read_cs1(1, 0xff0000) >> 16; } -WRITE8_MEMBER(i82371sb_ide_device::ide1_write_cs1_w) +void i82371sb_ide_device::ide1_write_cs1_w(uint8_t data) { if (!(command & 1)) return; m_ide1->write_cs1(1, data << 16, 0xff0000); } -READ8_MEMBER(i82371sb_ide_device::ide2_read_cs1_r) +uint8_t i82371sb_ide_device::ide2_read_cs1_r() { if (!(command & 1)) return 0xff; return m_ide2->read_cs1(1, 0xff0000) >> 16; } -WRITE8_MEMBER(i82371sb_ide_device::ide2_write_cs1_w) +void i82371sb_ide_device::ide2_write_cs1_w(uint8_t data) { if (!(command & 1)) return; diff --git a/src/devices/machine/i82371sb.h b/src/devices/machine/i82371sb.h index 71a5a96b429..4ba3733e515 100644 --- a/src/devices/machine/i82371sb.h +++ b/src/devices/machine/i82371sb.h @@ -103,60 +103,54 @@ private: void internal_io_map(address_map &map); - DECLARE_WRITE8_MEMBER (boot_state_w); - DECLARE_WRITE8_MEMBER (nop_w); - - DECLARE_READ8_MEMBER (iort_r); - DECLARE_WRITE8_MEMBER (iort_w); - DECLARE_READ16_MEMBER (xbcs_r); - DECLARE_WRITE16_MEMBER(xbcs_w); - DECLARE_READ8_MEMBER (pirqrc_r); - DECLARE_WRITE8_MEMBER (pirqrc_w); - DECLARE_READ8_MEMBER (tom_r); - DECLARE_WRITE8_MEMBER (tom_w); - DECLARE_READ16_MEMBER (mstat_r); - DECLARE_WRITE16_MEMBER(mstat_w); - DECLARE_READ8_MEMBER (mbirq01_r); - DECLARE_WRITE8_MEMBER (mbirq01_w); - DECLARE_READ8_MEMBER (mbdma_r); - DECLARE_WRITE8_MEMBER (mbdma_w); - DECLARE_READ16_MEMBER (pcsc_r); - DECLARE_WRITE16_MEMBER(pcsc_w); - DECLARE_READ8_MEMBER (apicbase_r); - DECLARE_WRITE8_MEMBER (apicbase_w); - DECLARE_READ8_MEMBER (dlc_r); - DECLARE_WRITE8_MEMBER (dlc_w); - DECLARE_READ8_MEMBER (smicntl_r); - DECLARE_WRITE8_MEMBER (smicntl_w); - DECLARE_READ16_MEMBER (smien_r); - DECLARE_WRITE16_MEMBER(smien_w); - DECLARE_READ32_MEMBER (see_r); - DECLARE_WRITE32_MEMBER(see_w); - DECLARE_READ8_MEMBER (ftmr_r); - DECLARE_WRITE8_MEMBER (ftmr_w); - DECLARE_READ16_MEMBER (smireq_r); - DECLARE_WRITE16_MEMBER(smireq_w); - DECLARE_READ8_MEMBER (ctltmr_r); - DECLARE_WRITE8_MEMBER (ctltmr_w); - DECLARE_READ8_MEMBER (cthtmr_r); - DECLARE_WRITE8_MEMBER (cthtmr_w); + void boot_state_w(uint8_t data); + void nop_w(uint8_t data); + + uint8_t iort_r(); + void iort_w(uint8_t data); + uint16_t xbcs_r(); + void xbcs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t pirqrc_r(offs_t offset); + void pirqrc_w(offs_t offset, uint8_t data); + uint8_t tom_r(); + void tom_w(uint8_t data); + uint16_t mstat_r(); + void mstat_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t mbirq01_r(offs_t offset); + void mbirq01_w(offs_t offset, uint8_t data); + uint8_t mbdma_r(offs_t offset); + void mbdma_w(offs_t offset, uint8_t data); + uint8_t apicbase_r(); + void apicbase_w(uint8_t data); + uint8_t dlc_r(); + void dlc_w(uint8_t data); + uint8_t smicntl_r(); + void smicntl_w(uint8_t data); + uint16_t smien_r(); + void smien_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t see_r(); + void see_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t ftmr_r(); + void ftmr_w(uint8_t data); + uint16_t smireq_r(); + void smireq_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t ctltmr_r(); + void ctltmr_w(uint8_t data); + uint8_t cthtmr_r(); + void cthtmr_w(uint8_t data); // southbridge - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(at_portb_r); - DECLARE_WRITE8_MEMBER(at_portb_w); + uint8_t at_page8_r(offs_t offset); + void at_page8_w(offs_t offset, uint8_t data);; + uint8_t at_portb_r(); + void at_portb_w(uint8_t data); DECLARE_WRITE_LINE_MEMBER(iochck_w); - DECLARE_READ8_MEMBER(ide_read_cs1_r); - DECLARE_WRITE8_MEMBER(ide_write_cs1_w); - DECLARE_READ8_MEMBER(ide2_read_cs1_r); - DECLARE_WRITE8_MEMBER(ide2_write_cs1_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_READ8_MEMBER(eisa_irq_read); - DECLARE_WRITE8_MEMBER(eisa_irq_write); - DECLARE_READ8_MEMBER(read_apmcapms); - DECLARE_WRITE8_MEMBER(write_apmcapms); + uint8_t at_dma8237_2_r(offs_t offset); + void at_dma8237_2_w(offs_t offset, uint8_t data); + uint8_t eisa_irq_read(offs_t offset); + void eisa_irq_write(offs_t offset, uint8_t data); + uint8_t read_apmcapms(offs_t offset); + void write_apmcapms(offs_t offset, uint8_t data); void update_smireq_line(); @@ -226,25 +220,25 @@ protected: DECLARE_WRITE_LINE_MEMBER(secondary_int); private: - DECLARE_READ16_MEMBER(command_r); - DECLARE_WRITE16_MEMBER(command_w); - DECLARE_READ32_MEMBER(bmiba_r); - DECLARE_WRITE32_MEMBER(bmiba_w); - DECLARE_READ16_MEMBER(idetim_primary_r); - DECLARE_WRITE16_MEMBER(idetim_primary_w); - DECLARE_READ16_MEMBER(idetim_secondary_r); - DECLARE_WRITE16_MEMBER(idetim_secondary_w); - DECLARE_READ8_MEMBER(sidetim_r); - DECLARE_WRITE8_MEMBER(sidetim_w); - - DECLARE_READ32_MEMBER(ide1_read32_cs0_r); - DECLARE_WRITE32_MEMBER(ide1_write32_cs0_w); - DECLARE_READ32_MEMBER(ide2_read32_cs0_r); - DECLARE_WRITE32_MEMBER(ide2_write32_cs0_w); - DECLARE_READ8_MEMBER(ide1_read_cs1_r); - DECLARE_WRITE8_MEMBER(ide1_write_cs1_w); - DECLARE_READ8_MEMBER(ide2_read_cs1_r); - DECLARE_WRITE8_MEMBER(ide2_write_cs1_w); + uint16_t command_r(); + void command_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t bmiba_r(); + void bmiba_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t idetim_primary_r(); + void idetim_primary_w(uint16_t data); + uint16_t idetim_secondary_r(); + void idetim_secondary_w(uint16_t data); + uint8_t sidetim_r(); + void sidetim_w(uint8_t data); + + uint32_t ide1_read32_cs0_r(offs_t offset, uint32_t mem_mask = ~0); + void ide1_write32_cs0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t ide2_read32_cs0_r(offs_t offset, uint32_t mem_mask = ~0); + void ide2_write32_cs0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t ide1_read_cs1_r(); + void ide1_write_cs1_w(uint8_t data); + uint8_t ide2_read_cs1_r(); + void ide2_write_cs1_w(uint8_t data); void internal_io_map(address_map &map); diff --git a/src/devices/machine/i82439hx.cpp b/src/devices/machine/i82439hx.cpp index 6a5f96c9935..bffed0db0d8 100644 --- a/src/devices/machine/i82439hx.cpp +++ b/src/devices/machine/i82439hx.cpp @@ -168,142 +168,142 @@ uint8_t i82439hx_host_device::header_type_r() return 0x00; // from datasheet } -READ8_MEMBER (i82439hx_host_device::pcon_r) +uint8_t i82439hx_host_device::pcon_r() { return pcon; } -WRITE8_MEMBER(i82439hx_host_device::pcon_w) +void i82439hx_host_device::pcon_w(uint8_t data) { pcon = data; logerror("pcon = %02x\n", pcon); } -READ8_MEMBER (i82439hx_host_device::cc_r) +uint8_t i82439hx_host_device::cc_r() { return cc; } -WRITE8_MEMBER(i82439hx_host_device::cc_w) +void i82439hx_host_device::cc_w(uint8_t data) { cc = data; logerror("cc = %02x\n", cc); } -READ8_MEMBER (i82439hx_host_device::dramec_r) +uint8_t i82439hx_host_device::dramec_r() { return dramec; } -WRITE8_MEMBER(i82439hx_host_device::dramec_w) +void i82439hx_host_device::dramec_w(uint8_t data) { dramec = data; logerror("dramec = %02x\n", dramec); } -READ8_MEMBER (i82439hx_host_device::dramc_r) +uint8_t i82439hx_host_device::dramc_r() { return dramc; } -WRITE8_MEMBER(i82439hx_host_device::dramc_w) +void i82439hx_host_device::dramc_w(uint8_t data) { dramc = data; logerror("dramc = %02x\n", dramc); remap_cb(); } -READ8_MEMBER (i82439hx_host_device::dramt_r) +uint8_t i82439hx_host_device::dramt_r() { return dramt; } -WRITE8_MEMBER(i82439hx_host_device::dramt_w) +void i82439hx_host_device::dramt_w(uint8_t data) { dramt = data; logerror("dramt = %02x\n", dramt); } -READ8_MEMBER (i82439hx_host_device::pam_r) +uint8_t i82439hx_host_device::pam_r(offs_t offset) { return pam[offset - 1]; } -WRITE8_MEMBER(i82439hx_host_device::pam_w) +void i82439hx_host_device::pam_w(offs_t offset, uint8_t data) { pam[offset - 1] = data; logerror("pam[%d] = %02x\n", offset - 1, pam[offset - 1]); remap_cb(); } -READ8_MEMBER (i82439hx_host_device::drb_r) +uint8_t i82439hx_host_device::drb_r(offs_t offset) { return drb[offset]; } -WRITE8_MEMBER(i82439hx_host_device::drb_w) +void i82439hx_host_device::drb_w(offs_t offset, uint8_t data) { drb[offset] = data; logerror("drb[%d] = %02x\n", offset, drb[offset]); } -READ8_MEMBER (i82439hx_host_device::drt_r) +uint8_t i82439hx_host_device::drt_r() { return drt; } -WRITE8_MEMBER(i82439hx_host_device::drt_w) +void i82439hx_host_device::drt_w(uint8_t data) { drt = data; logerror("drt = %02x\n", drt); } -READ8_MEMBER (i82439hx_host_device::drat_r) +uint8_t i82439hx_host_device::drat_r() { return drat; } -WRITE8_MEMBER(i82439hx_host_device::drat_w) +void i82439hx_host_device::drat_w(uint8_t data) { drat = data; logerror("drat = %02x\n", drat); } -READ8_MEMBER (i82439hx_host_device::smram_r) +uint8_t i82439hx_host_device::smram_r() { return smram; } -WRITE8_MEMBER(i82439hx_host_device::smram_w) +void i82439hx_host_device::smram_w(uint8_t data) { smram = data; logerror("smram = %02x\n", smram); remap_cb(); } -READ8_MEMBER (i82439hx_host_device::errcmd_r) +uint8_t i82439hx_host_device::errcmd_r() { return errcmd; } -WRITE8_MEMBER(i82439hx_host_device::errcmd_w) +void i82439hx_host_device::errcmd_w(uint8_t data) { errcmd = data; logerror("errcmd = %02x\n", errcmd); } -READ8_MEMBER (i82439hx_host_device::errsts_r) +uint8_t i82439hx_host_device::errsts_r() { return errsts; } -WRITE8_MEMBER(i82439hx_host_device::errsts_w) +void i82439hx_host_device::errsts_w(uint8_t data) { errsts = data; logerror("errsts = %02x\n", errsts); } -READ8_MEMBER (i82439hx_host_device::errsyn_r) +uint8_t i82439hx_host_device::errsyn_r() { return errsyn; } diff --git a/src/devices/machine/i82439hx.h b/src/devices/machine/i82439hx.h index 4968102c353..73650cbac5d 100644 --- a/src/devices/machine/i82439hx.h +++ b/src/devices/machine/i82439hx.h @@ -48,31 +48,31 @@ private: int smiact_n; virtual uint8_t header_type_r() override; - DECLARE_READ8_MEMBER (pcon_r); - DECLARE_WRITE8_MEMBER(pcon_w); - DECLARE_READ8_MEMBER (cc_r); - DECLARE_WRITE8_MEMBER(cc_w); - DECLARE_READ8_MEMBER (dramec_r); - DECLARE_WRITE8_MEMBER(dramec_w); - DECLARE_READ8_MEMBER (dramc_r); - DECLARE_WRITE8_MEMBER(dramc_w); - DECLARE_READ8_MEMBER (dramt_r); - DECLARE_WRITE8_MEMBER(dramt_w); - DECLARE_READ8_MEMBER (pam_r); - DECLARE_WRITE8_MEMBER(pam_w); - DECLARE_READ8_MEMBER (drb_r); - DECLARE_WRITE8_MEMBER(drb_w); - DECLARE_READ8_MEMBER (drt_r); - DECLARE_WRITE8_MEMBER(drt_w); - DECLARE_READ8_MEMBER (drat_r); - DECLARE_WRITE8_MEMBER(drat_w); - DECLARE_READ8_MEMBER (smram_r); - DECLARE_WRITE8_MEMBER(smram_w); - DECLARE_READ8_MEMBER (errcmd_r); - DECLARE_WRITE8_MEMBER(errcmd_w); - DECLARE_READ8_MEMBER (errsts_r); - DECLARE_WRITE8_MEMBER(errsts_w); - DECLARE_READ8_MEMBER (errsyn_r); + uint8_t pcon_r(); + void pcon_w(uint8_t data); + uint8_t cc_r(); + void cc_w(uint8_t data); + uint8_t dramec_r(); + void dramec_w(uint8_t data); + uint8_t dramc_r(); + void dramc_w(uint8_t data); + uint8_t dramt_r(); + void dramt_w(uint8_t data); + uint8_t pam_r(offs_t offset); + void pam_w(offs_t offset, uint8_t data); + uint8_t drb_r(offs_t offset); + void drb_w(offs_t offset, uint8_t data); + uint8_t drt_r(); + void drt_w(uint8_t data); + uint8_t drat_r(); + void drat_w(uint8_t data); + uint8_t smram_r(); + void smram_w(uint8_t data); + uint8_t errcmd_r(); + void errcmd_w(uint8_t data); + uint8_t errsts_r(); + void errsts_w(uint8_t data); + uint8_t errsyn_r(); }; DECLARE_DEVICE_TYPE(I82439HX, i82439hx_host_device) diff --git a/src/devices/machine/i82875p.cpp b/src/devices/machine/i82875p.cpp index 850ca50821a..a2b29782387 100644 --- a/src/devices/machine/i82875p.cpp +++ b/src/devices/machine/i82875p.cpp @@ -54,7 +54,7 @@ void i82875p_host_device::set_ram_size(int _ram_size) ram_size = _ram_size; } -READ8_MEMBER(i82875p_host_device::capptr_r) +uint8_t i82875p_host_device::capptr_r() { return 0xe4; } @@ -79,71 +79,71 @@ void i82875p_host_device::device_start() add_map(256*1024*1024, M_MEM, FUNC(i82875p_host_device::agp_translation_map)); } -READ8_MEMBER( i82875p_host_device::agpm_r) +uint8_t i82875p_host_device::agpm_r() { return agpm; } -WRITE8_MEMBER( i82875p_host_device::agpm_w) +void i82875p_host_device::agpm_w(uint8_t data) { agpm = data; logerror("%s: agpm = %02x\n", tag(), agpm); } -READ8_MEMBER( i82875p_host_device::gc_r) +uint8_t i82875p_host_device::gc_r() { return 0x08; } -READ8_MEMBER( i82875p_host_device::csabcont_r) +uint8_t i82875p_host_device::csabcont_r() { return 0x00; } -READ32_MEMBER( i82875p_host_device::eap_r) +uint32_t i82875p_host_device::eap_r() { return 0x00000000; } -READ8_MEMBER( i82875p_host_device::derrsyn_r) +uint8_t i82875p_host_device::derrsyn_r() { return 0x00; } -READ8_MEMBER( i82875p_host_device::des_r) +uint8_t i82875p_host_device::des_r() { return 0x00; } -READ8_MEMBER( i82875p_host_device::fpllcont_r) +uint8_t i82875p_host_device::fpllcont_r() { return fpllcont; } -WRITE8_MEMBER( i82875p_host_device::fpllcont_w) +void i82875p_host_device::fpllcont_w(uint8_t data) { fpllcont = data; logerror("%s: fpllcont = %02x\n", tag(), data); } -READ8_MEMBER( i82875p_host_device::pam_r) +uint8_t i82875p_host_device::pam_r(offs_t offset) { return pam[offset]; } -WRITE8_MEMBER( i82875p_host_device::pam_w) +void i82875p_host_device::pam_w(offs_t offset, uint8_t data) { pam[offset] = data; logerror("%s: pam[%d] = %02x\n", tag(), offset, data); remap_cb(); } -READ8_MEMBER( i82875p_host_device::smram_r) +uint8_t i82875p_host_device::smram_r() { return smram; } -WRITE8_MEMBER( i82875p_host_device::smram_w) +void i82875p_host_device::smram_w(uint8_t data) { if(!(smram & 0x10)) smram = (data & 0xfe) | 0x02; @@ -151,12 +151,12 @@ WRITE8_MEMBER( i82875p_host_device::smram_w) remap_cb(); } -READ8_MEMBER( i82875p_host_device::esmramc_r) +uint8_t i82875p_host_device::esmramc_r() { return esmramc; } -WRITE8_MEMBER( i82875p_host_device::esmramc_w) +void i82875p_host_device::esmramc_w(uint8_t data) { if(!(smram & 0x10)) esmramc = (data & 0x87) | 0x38; @@ -164,80 +164,80 @@ WRITE8_MEMBER( i82875p_host_device::esmramc_w) remap_cb(); } -READ32_MEMBER( i82875p_host_device::acapid_r) +uint32_t i82875p_host_device::acapid_r() { return 0x00300002; } -READ32_MEMBER( i82875p_host_device::agpstat_r) +uint32_t i82875p_host_device::agpstat_r() { return 0x1f004a13; } -READ32_MEMBER( i82875p_host_device::agpcmd_r) +uint32_t i82875p_host_device::agpcmd_r() { return 0x00000a00; } -READ32_MEMBER( i82875p_host_device::agpctrl_r) +uint32_t i82875p_host_device::agpctrl_r() { return agpctrl; } -WRITE32_MEMBER(i82875p_host_device::agpctrl_w) +void i82875p_host_device::agpctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&agpctrl); logerror("%s: agpctrl = %08x\n", tag(), agpctrl); } -READ8_MEMBER( i82875p_host_device::apsize_r) +uint8_t i82875p_host_device::apsize_r() { return apsize; } -WRITE8_MEMBER( i82875p_host_device::apsize_w) +void i82875p_host_device::apsize_w(uint8_t data) { apsize = data; logerror("%s: apsize = %02x\n", tag(), apsize); } -READ32_MEMBER( i82875p_host_device::attbase_r) +uint32_t i82875p_host_device::attbase_r() { return attbase; } -WRITE32_MEMBER(i82875p_host_device::attbase_w) +void i82875p_host_device::attbase_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&attbase); logerror("%s: attbase = %08x\n", tag(), attbase); } -READ8_MEMBER( i82875p_host_device::amtt_r) +uint8_t i82875p_host_device::amtt_r() { return amtt; } -WRITE8_MEMBER( i82875p_host_device::amtt_w) +void i82875p_host_device::amtt_w(uint8_t data) { amtt = data; } -READ8_MEMBER( i82875p_host_device::lptt_r) +uint8_t i82875p_host_device::lptt_r() { return lptt; } -WRITE8_MEMBER( i82875p_host_device::lptt_w) +void i82875p_host_device::lptt_w(uint8_t data) { lptt = data; } -READ16_MEMBER( i82875p_host_device::toud_r) +uint16_t i82875p_host_device::toud_r() { return toud; } -WRITE16_MEMBER(i82875p_host_device::toud_w) +void i82875p_host_device::toud_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&toud); toud &= ~7; @@ -245,67 +245,67 @@ WRITE16_MEMBER(i82875p_host_device::toud_w) remap_cb(); } -READ16_MEMBER( i82875p_host_device::mchcfg_r) +uint16_t i82875p_host_device::mchcfg_r() { return mchcfg; } -WRITE16_MEMBER(i82875p_host_device::mchcfg_w) +void i82875p_host_device::mchcfg_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&mchcfg); } -READ16_MEMBER( i82875p_host_device::errsts_r) +uint16_t i82875p_host_device::errsts_r() { return 0x0000; } -READ16_MEMBER( i82875p_host_device::errcmd_r) +uint16_t i82875p_host_device::errcmd_r() { return errcmd; } -WRITE16_MEMBER(i82875p_host_device::errcmd_w) +void i82875p_host_device::errcmd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&errcmd); } -READ16_MEMBER( i82875p_host_device::smicmd_r) +uint16_t i82875p_host_device::smicmd_r() { return smicmd; } -WRITE16_MEMBER(i82875p_host_device::smicmd_w) +void i82875p_host_device::smicmd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&smicmd); } -READ16_MEMBER( i82875p_host_device::scicmd_r) +uint16_t i82875p_host_device::scicmd_r() { return scicmd; } -WRITE16_MEMBER(i82875p_host_device::scicmd_w) +void i82875p_host_device::scicmd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&scicmd); } -READ16_MEMBER( i82875p_host_device::skpd_r) +uint16_t i82875p_host_device::skpd_r() { return skpd; } -WRITE16_MEMBER(i82875p_host_device::skpd_w) +void i82875p_host_device::skpd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&skpd); } -READ32_MEMBER( i82875p_host_device::capreg1_r) +uint32_t i82875p_host_device::capreg1_r() { return 0x0106a009; } -READ8_MEMBER( i82875p_host_device::capreg2_r) +uint8_t i82875p_host_device::capreg2_r() { return 0x00; } @@ -469,45 +469,45 @@ void i82875p_overflow_device::device_reset() dram_controller_mode = 0x00010001; } -READ8_MEMBER (i82875p_overflow_device::dram_row_boundary_r) +uint8_t i82875p_overflow_device::dram_row_boundary_r(offs_t offset) { return dram_row_boundary[offset]; } -WRITE8_MEMBER (i82875p_overflow_device::dram_row_boundary_w) +void i82875p_overflow_device::dram_row_boundary_w(offs_t offset, uint8_t data) { dram_row_boundary[offset] = data; logerror("%s: dram_row_boundary_w %d, %02x\n", tag(), offset, data); } -READ8_MEMBER (i82875p_overflow_device::dram_row_attribute_r) +uint8_t i82875p_overflow_device::dram_row_attribute_r(offs_t offset) { return dram_row_attribute[offset]; } -WRITE8_MEMBER (i82875p_overflow_device::dram_row_attribute_w) +void i82875p_overflow_device::dram_row_attribute_w(offs_t offset, uint8_t data) { dram_row_attribute[offset] = data; logerror("%s: dram_row_attribute_w %d, %02x\n", tag(), offset, data); } -READ32_MEMBER (i82875p_overflow_device::dram_timing_r) +uint32_t i82875p_overflow_device::dram_timing_r() { return dram_timing; } -WRITE32_MEMBER(i82875p_overflow_device::dram_timing_w) +void i82875p_overflow_device::dram_timing_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&dram_timing); logerror("%s: dram_timing_w %08x\n", tag(), dram_timing); } -READ32_MEMBER (i82875p_overflow_device::dram_controller_mode_r) +uint32_t i82875p_overflow_device::dram_controller_mode_r() { return dram_controller_mode; } -WRITE32_MEMBER(i82875p_overflow_device::dram_controller_mode_w) +void i82875p_overflow_device::dram_controller_mode_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&dram_controller_mode); logerror("%s: dram_controller_mode_w %08x\n", tag(), dram_controller_mode); diff --git a/src/devices/machine/i82875p.h b/src/devices/machine/i82875p.h index 0ca29e66fc7..ecd252b35ef 100644 --- a/src/devices/machine/i82875p.h +++ b/src/devices/machine/i82875p.h @@ -25,7 +25,7 @@ public: template <typename T> void set_cpu_tag(T &&tag) { cpu.set_tag(std::forward<T>(tag)); } void set_ram_size(int ram_size); - virtual DECLARE_READ8_MEMBER(capptr_r) override; + virtual uint8_t capptr_r() override; protected: virtual void device_start() override; @@ -50,49 +50,49 @@ private: uint16_t toud, mchcfg, errcmd, smicmd, scicmd, skpd; uint32_t agpctrl, attbase; - DECLARE_READ8_MEMBER( agpm_r); - DECLARE_WRITE8_MEMBER( agpm_w); - DECLARE_READ8_MEMBER( gc_r); - DECLARE_READ8_MEMBER( csabcont_r); - DECLARE_READ32_MEMBER( eap_r); - DECLARE_READ8_MEMBER( derrsyn_r); - DECLARE_READ8_MEMBER( des_r); - DECLARE_READ8_MEMBER( fpllcont_r); - DECLARE_WRITE8_MEMBER( fpllcont_w); - DECLARE_READ8_MEMBER( pam_r); - DECLARE_WRITE8_MEMBER( pam_w); - DECLARE_READ8_MEMBER( smram_r); - DECLARE_WRITE8_MEMBER( smram_w); - DECLARE_READ8_MEMBER( esmramc_r); - DECLARE_WRITE8_MEMBER( esmramc_w); - DECLARE_READ32_MEMBER( acapid_r); - DECLARE_READ32_MEMBER( agpstat_r); - DECLARE_READ32_MEMBER( agpcmd_r); - DECLARE_READ32_MEMBER( agpctrl_r); - DECLARE_WRITE32_MEMBER(agpctrl_w); - DECLARE_READ8_MEMBER( apsize_r); - DECLARE_WRITE8_MEMBER( apsize_w); - DECLARE_READ32_MEMBER( attbase_r); - DECLARE_WRITE32_MEMBER(attbase_w); - DECLARE_READ8_MEMBER( amtt_r); - DECLARE_WRITE8_MEMBER( amtt_w); - DECLARE_READ8_MEMBER( lptt_r); - DECLARE_WRITE8_MEMBER( lptt_w); - DECLARE_READ16_MEMBER( toud_r); - DECLARE_WRITE16_MEMBER(toud_w); - DECLARE_READ16_MEMBER( mchcfg_r); - DECLARE_WRITE16_MEMBER(mchcfg_w); - DECLARE_READ16_MEMBER( errsts_r); - DECLARE_READ16_MEMBER( errcmd_r); - DECLARE_WRITE16_MEMBER(errcmd_w); - DECLARE_READ16_MEMBER( smicmd_r); - DECLARE_WRITE16_MEMBER(smicmd_w); - DECLARE_READ16_MEMBER( scicmd_r); - DECLARE_WRITE16_MEMBER(scicmd_w); - DECLARE_READ16_MEMBER( skpd_r); - DECLARE_WRITE16_MEMBER(skpd_w); - DECLARE_READ32_MEMBER( capreg1_r); - DECLARE_READ8_MEMBER( capreg2_r); + uint8_t agpm_r(); + void agpm_w(uint8_t data); + uint8_t gc_r(); + uint8_t csabcont_r(); + uint32_t eap_r(); + uint8_t derrsyn_r(); + uint8_t des_r(); + uint8_t fpllcont_r(); + void fpllcont_w(uint8_t data); + uint8_t pam_r(offs_t offset); + void pam_w(offs_t offset, uint8_t data); + uint8_t smram_r(); + void smram_w(uint8_t data); + uint8_t esmramc_r(); + void esmramc_w(uint8_t data); + uint32_t acapid_r(); + uint32_t agpstat_r(); + uint32_t agpcmd_r(); + uint32_t agpctrl_r(); + void agpctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t apsize_r(); + void apsize_w(uint8_t data); + uint32_t attbase_r(); + void attbase_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t amtt_r(); + void amtt_w(uint8_t data); + uint8_t lptt_r(); + void lptt_w(uint8_t data); + uint16_t toud_r(); + void toud_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t mchcfg_r(); + void mchcfg_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t errsts_r(); + uint16_t errcmd_r(); + void errcmd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t smicmd_r(); + void smicmd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t scicmd_r(); + void scicmd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t skpd_r(); + void skpd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t capreg1_r(); + uint8_t capreg2_r(); }; class i82875p_agp_device : public agp_bridge_device { @@ -114,14 +114,14 @@ public: i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); private: - DECLARE_READ8_MEMBER (dram_row_boundary_r); - DECLARE_WRITE8_MEMBER (dram_row_boundary_w); - DECLARE_READ8_MEMBER (dram_row_attribute_r); - DECLARE_WRITE8_MEMBER (dram_row_attribute_w); - DECLARE_READ32_MEMBER (dram_timing_r); - DECLARE_WRITE32_MEMBER(dram_timing_w); - DECLARE_READ32_MEMBER (dram_controller_mode_r); - DECLARE_WRITE32_MEMBER(dram_controller_mode_w); + uint8_t dram_row_boundary_r(offs_t offset); + void dram_row_boundary_w(offs_t offset, uint8_t data); + uint8_t dram_row_attribute_r(offs_t offset); + void dram_row_attribute_w(offs_t offset, uint8_t data); + uint32_t dram_timing_r(); + void dram_timing_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t dram_controller_mode_r(); + void dram_controller_mode_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: virtual void device_start() override; diff --git a/src/devices/machine/ie15.cpp b/src/devices/machine/ie15.cpp index 07f0a2a011b..3cdb35af145 100644 --- a/src/devices/machine/ie15.cpp +++ b/src/devices/machine/ie15.cpp @@ -68,7 +68,7 @@ ie15_device::ie15_device(const machine_config &mconfig, const char *tag, device_ } -READ8_MEMBER(ie15_device::mem_r) +uint8_t ie15_device::mem_r() { uint8_t ret; @@ -83,7 +83,7 @@ READ8_MEMBER(ie15_device::mem_r) return ret; } -WRITE8_MEMBER(ie15_device::mem_w) +void ie15_device::mem_w(uint8_t data) { if ((m_latch ^= 1) == 0) { @@ -96,7 +96,7 @@ WRITE8_MEMBER(ie15_device::mem_w) } } -WRITE8_MEMBER(ie15_device::mem_addr_inc_w) +void ie15_device::mem_addr_inc_w(uint8_t data) { if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) { @@ -107,7 +107,7 @@ WRITE8_MEMBER(ie15_device::mem_addr_inc_w) if (m_video.enable) m_video.ptr2 = m_video.ptr1; } -WRITE8_MEMBER(ie15_device::mem_addr_dec_w) +void ie15_device::mem_addr_dec_w(uint8_t data) { if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) { @@ -118,7 +118,7 @@ WRITE8_MEMBER(ie15_device::mem_addr_dec_w) if (m_video.enable) m_video.ptr2 = m_video.ptr1; } -WRITE8_MEMBER(ie15_device::mem_addr_lo_w) +void ie15_device::mem_addr_lo_w(uint8_t data) { uint16_t tmp = m_video.ptr1; @@ -132,7 +132,7 @@ WRITE8_MEMBER(ie15_device::mem_addr_lo_w) if (m_video.enable) m_video.ptr2 = tmp; } -WRITE8_MEMBER(ie15_device::mem_addr_hi_w) +void ie15_device::mem_addr_hi_w(uint8_t data) { uint16_t tmp = m_video.ptr1; @@ -151,7 +151,7 @@ TIMER_CALLBACK_MEMBER(ie15_device::ie15_beepoff) m_beeper->set_state(0); } -WRITE8_MEMBER(ie15_device::beep_w) +void ie15_device::beep_w(uint8_t data) { uint16_t length = (m_long_beep & IE_TRUE) ? 150 : 400; @@ -166,14 +166,14 @@ WRITE8_MEMBER(ie15_device::beep_w) /* keyboard */ // active high -READ8_MEMBER(ie15_device::kb_r) +uint8_t ie15_device::kb_r() { DBG_LOG(2, "keyboard", ("R %02X '%c'\n", m_kb_data, m_kb_data < 0x20 ? ' ' : m_kb_data)); return m_kb_data; } // active low -READ8_MEMBER(ie15_device::kb_ready_r) +uint8_t ie15_device::kb_ready_r() { m_kb_flag &= IE_TRUE; if (m_kb_flag != m_kb_flag0) @@ -185,7 +185,7 @@ READ8_MEMBER(ie15_device::kb_ready_r) } // active low -WRITE8_MEMBER(ie15_device::kb_ready_w) +void ie15_device::kb_ready_w(uint8_t data) { DBG_LOG(2, "keyboard", ("clear ready\n")); m_kb_flag = IE_TRUE | ie15_keyboard_device::IE_KB_ACK; @@ -193,31 +193,31 @@ WRITE8_MEMBER(ie15_device::kb_ready_w) // active high; active = interpret controls, inactive = display controls -READ8_MEMBER(ie15_device::kb_s_red_r) +uint8_t ie15_device::kb_s_red_r() { return m_io_keyboard->read() & ie15_keyboard_device::IE_KB_RED ? IE_TRUE : 0; } // active high; active = setup mode -READ8_MEMBER(ie15_device::kb_s_sdv_r) +uint8_t ie15_device::kb_s_sdv_r() { return m_kb_control & ie15_keyboard_device::IE_KB_SDV ? IE_TRUE : 0; } // active high; active = keypress detected on aux keypad -READ8_MEMBER(ie15_device::kb_s_dk_r) +uint8_t ie15_device::kb_s_dk_r() { return m_kb_control & ie15_keyboard_device::IE_KB_DK ? IE_TRUE : 0; } // active low; active = full duplex, inactive = half duplex -READ8_MEMBER(ie15_device::kb_s_dupl_r) +uint8_t ie15_device::kb_s_dupl_r() { return m_io_keyboard->read() & ie15_keyboard_device::IE_KB_DUP ? IE_TRUE : 0; } // active high; active = on-line, inactive = local editing -READ8_MEMBER(ie15_device::kb_s_lin_r) +uint8_t ie15_device::kb_s_lin_r() { return m_io_keyboard->read() & ie15_keyboard_device::IE_KB_LIN ? IE_TRUE : 0; } @@ -268,26 +268,26 @@ void ie15_device::tra_complete() } // active low -READ8_MEMBER(ie15_device::serial_rx_ready_r) +uint8_t ie15_device::serial_rx_ready_r() { return m_serial_rx_ready; } // active high -READ8_MEMBER(ie15_device::serial_tx_ready_r) +uint8_t ie15_device::serial_tx_ready_r() { return m_serial_tx_ready; } // not called unless data are ready -READ8_MEMBER(ie15_device::serial_r) +uint8_t ie15_device::serial_r() { m_serial_rx_ready = IE_TRUE; DBG_LOG(1,"serial",("R %02X '%c'\n", m_serial_rx_char, m_serial_rx_char < 0x20?' ':m_serial_rx_char&127)); return m_serial_rx_char; } -WRITE8_MEMBER(ie15_device::serial_w) +void ie15_device::serial_w(uint8_t data) { DBG_LOG(1, "serial", ("W %02X '%c'\n", data, data < 0x20 ? ' ' : data & 127)); @@ -295,7 +295,7 @@ WRITE8_MEMBER(ie15_device::serial_w) transmit_register_setup(data); } -WRITE8_MEMBER(ie15_device::serial_speed_w) +void ie15_device::serial_speed_w(uint8_t data) { return; } @@ -318,7 +318,7 @@ WRITE_LINE_MEMBER(ie15_device::update_serial) set_rcv_rate(rxbaud); } -READ8_MEMBER(ie15_device::flag_r) +uint8_t ie15_device::flag_r(offs_t offset) { switch (offset) { @@ -340,7 +340,7 @@ READ8_MEMBER(ie15_device::flag_r) return 0; } -WRITE8_MEMBER(ie15_device::flag_w) +void ie15_device::flag_w(offs_t offset, uint8_t data) { switch (offset) { diff --git a/src/devices/machine/ie15.h b/src/devices/machine/ie15.h index 5c870ce8ce4..ef8f73334da 100644 --- a/src/devices/machine/ie15.h +++ b/src/devices/machine/ie15.h @@ -76,28 +76,28 @@ private: void ie15core(machine_config &config); void kbd_put(uint16_t data); - DECLARE_WRITE8_MEMBER(mem_w); - DECLARE_READ8_MEMBER(mem_r); - DECLARE_WRITE8_MEMBER(mem_addr_lo_w); - DECLARE_WRITE8_MEMBER(mem_addr_hi_w); - DECLARE_WRITE8_MEMBER(mem_addr_inc_w); - DECLARE_WRITE8_MEMBER(mem_addr_dec_w); - DECLARE_READ8_MEMBER(flag_r); - DECLARE_WRITE8_MEMBER(flag_w); - DECLARE_WRITE8_MEMBER(beep_w); - DECLARE_READ8_MEMBER(kb_r); - DECLARE_READ8_MEMBER(kb_ready_r); - DECLARE_READ8_MEMBER(kb_s_red_r); - DECLARE_READ8_MEMBER(kb_s_sdv_r); - DECLARE_READ8_MEMBER(kb_s_dk_r); - DECLARE_READ8_MEMBER(kb_s_dupl_r); - DECLARE_READ8_MEMBER(kb_s_lin_r); - DECLARE_WRITE8_MEMBER(kb_ready_w); - DECLARE_READ8_MEMBER(serial_tx_ready_r); - DECLARE_WRITE8_MEMBER(serial_w); - DECLARE_READ8_MEMBER(serial_rx_ready_r); - DECLARE_READ8_MEMBER(serial_r); - DECLARE_WRITE8_MEMBER(serial_speed_w); + void mem_w(uint8_t data); + uint8_t mem_r(); + void mem_addr_lo_w(uint8_t data); + void mem_addr_hi_w(uint8_t data); + void mem_addr_inc_w(uint8_t data); + void mem_addr_dec_w(uint8_t data); + uint8_t flag_r(offs_t offset); + void flag_w(offs_t offset, uint8_t data); + void beep_w(uint8_t data); + uint8_t kb_r(); + uint8_t kb_ready_r(); + uint8_t kb_s_red_r(); + uint8_t kb_s_sdv_r(); + uint8_t kb_s_dk_r(); + uint8_t kb_s_dupl_r(); + uint8_t kb_s_lin_r(); + void kb_ready_w(uint8_t data); + uint8_t serial_tx_ready_r(); + void serial_w(uint8_t data); + uint8_t serial_rx_ready_r(); + uint8_t serial_r(); + void serial_speed_w(uint8_t data); TIMER_CALLBACK_MEMBER(ie15_beepoff); void ie15_io(address_map &map); diff --git a/src/devices/machine/input_merger.h b/src/devices/machine/input_merger.h index aa5e66cc1f1..10c400b4a74 100644 --- a/src/devices/machine/input_merger.h +++ b/src/devices/machine/input_merger.h @@ -27,8 +27,8 @@ public: // input lines template <unsigned Bit> DECLARE_WRITE_LINE_MEMBER(in_w) { static_assert(Bit < 32, "invalid bit"); machine().scheduler().synchronize(timer_expired_delegate(FUNC(input_merger_device::update_state), this), (Bit << 1) | (state ? 1U : 0U)); } - template <unsigned Bit> DECLARE_WRITE8_MEMBER(in_set) { in_w<Bit>(1); } - template <unsigned Bit> DECLARE_WRITE8_MEMBER(in_clear) { in_w<Bit>(0); } + template <unsigned Bit> void in_set(u8 data) { in_w<Bit>(1); } + template <unsigned Bit> void in_clear(u8 data) { in_w<Bit>(0); } protected: // constructor/destructor diff --git a/src/devices/machine/iopdma.cpp b/src/devices/machine/iopdma.cpp index 97b170a0a1a..784bc16b515 100644 --- a/src/devices/machine/iopdma.cpp +++ b/src/devices/machine/iopdma.cpp @@ -312,7 +312,7 @@ void iop_dma_device::transfer_finish(uint32_t chan) } } -READ32_MEMBER(iop_dma_device::bank0_r) +uint32_t iop_dma_device::bank0_r(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -350,7 +350,7 @@ READ32_MEMBER(iop_dma_device::bank0_r) return ret; } -WRITE32_MEMBER(iop_dma_device::bank0_w) +void iop_dma_device::bank0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { @@ -385,7 +385,7 @@ WRITE32_MEMBER(iop_dma_device::bank0_w) } } -READ32_MEMBER(iop_dma_device::bank1_r) +uint32_t iop_dma_device::bank1_r(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -424,7 +424,7 @@ READ32_MEMBER(iop_dma_device::bank1_r) return ret; } -WRITE32_MEMBER(iop_dma_device::bank1_w) +void iop_dma_device::bank1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset & 0x1f) { diff --git a/src/devices/machine/iopdma.h b/src/devices/machine/iopdma.h index 2492f7929ec..2e84ec44aaa 100644 --- a/src/devices/machine/iopdma.h +++ b/src/devices/machine/iopdma.h @@ -36,10 +36,10 @@ public: iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~iop_dma_device() override; - DECLARE_READ32_MEMBER(bank0_r); - DECLARE_WRITE32_MEMBER(bank0_w); - DECLARE_READ32_MEMBER(bank1_r); - DECLARE_WRITE32_MEMBER(bank1_w); + uint32_t bank0_r(offs_t offset, uint32_t mem_mask = ~0); + void bank0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t bank1_r(offs_t offset, uint32_t mem_mask = ~0); + void bank1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); enum channel_type : uint32_t { diff --git a/src/devices/machine/iopintc.cpp b/src/devices/machine/iopintc.cpp index 96a8aef6034..15e57e00608 100644 --- a/src/devices/machine/iopintc.cpp +++ b/src/devices/machine/iopintc.cpp @@ -38,7 +38,7 @@ void iop_intc_device::device_reset() m_enabled = false; } -READ32_MEMBER(iop_intc_device::read) +uint32_t iop_intc_device::read(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -64,7 +64,7 @@ READ32_MEMBER(iop_intc_device::read) return ret; } -WRITE32_MEMBER(iop_intc_device::write) +void iop_intc_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/iopintc.h b/src/devices/machine/iopintc.h index d2e9a544f0b..5ead2c505fe 100644 --- a/src/devices/machine/iopintc.h +++ b/src/devices/machine/iopintc.h @@ -29,8 +29,8 @@ public: iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~iop_intc_device() override; - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void raise_interrupt(uint32_t line); diff --git a/src/devices/machine/iopsio2.cpp b/src/devices/machine/iopsio2.cpp index d0a15d97446..6ffe90c0737 100644 --- a/src/devices/machine/iopsio2.cpp +++ b/src/devices/machine/iopsio2.cpp @@ -73,7 +73,7 @@ void iop_sio2_device::device_reset() m_target_device = 0; } -READ32_MEMBER(iop_sio2_device::read) +uint32_t iop_sio2_device::read(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -108,7 +108,7 @@ READ32_MEMBER(iop_sio2_device::read) return ret; } -WRITE32_MEMBER(iop_sio2_device::write) +void iop_sio2_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/iopsio2.h b/src/devices/machine/iopsio2.h index fe1193ba09e..67fc395b6f3 100644 --- a/src/devices/machine/iopsio2.h +++ b/src/devices/machine/iopsio2.h @@ -34,8 +34,8 @@ public: iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~iop_sio2_device() override; - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void transmit(uint8_t data); uint8_t receive(); diff --git a/src/devices/machine/ioptimer.cpp b/src/devices/machine/ioptimer.cpp index 0340c0a2ff3..487c795ef26 100644 --- a/src/devices/machine/ioptimer.cpp +++ b/src/devices/machine/ioptimer.cpp @@ -198,7 +198,7 @@ TIMER_CALLBACK_MEMBER(iop_timer_device::overflow) update_interrupts(); } -READ32_MEMBER(iop_timer_device::read) +uint32_t iop_timer_device::read(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -229,7 +229,7 @@ READ32_MEMBER(iop_timer_device::read) return ret; } -WRITE32_MEMBER(iop_timer_device::write) +void iop_timer_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/ioptimer.h b/src/devices/machine/ioptimer.h index 8683f3cd61e..a7c4891b9dc 100644 --- a/src/devices/machine/ioptimer.h +++ b/src/devices/machine/ioptimer.h @@ -21,8 +21,8 @@ public: auto irq() { return m_int_cb.bind(); } - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: enum timer_ctrl_mask : uint32_t diff --git a/src/devices/machine/keyboard.cpp b/src/devices/machine/keyboard.cpp index 6f7c7fb125f..eacd6786689 100644 --- a/src/devices/machine/keyboard.cpp +++ b/src/devices/machine/keyboard.cpp @@ -16,7 +16,7 @@ In the machine config function: In the code: -WRITE8_MEMBER( xxx_state::kbd_put ) +void xxx_state::kbd_put(u8 data) { (code to capture the key as it is pressed) (if your machine uses function keys, add your conversion code here) diff --git a/src/devices/machine/linflash.cpp b/src/devices/machine/linflash.cpp index 5b2d3673857..25b5257dd0b 100644 --- a/src/devices/machine/linflash.cpp +++ b/src/devices/machine/linflash.cpp @@ -26,14 +26,14 @@ device_memory_interface::space_config_vector linear_flash_pccard_device::memory_ return space_config_vector{ std::make_pair(0, &m_space_config) }; } -READ16_MEMBER( linear_flash_pccard_device::read_memory ) +uint16_t linear_flash_pccard_device::read_memory(offs_t offset, uint16_t mem_mask) { uint16_t data = m_space->read_word(offset * 2, mem_mask); //printf( "<%08x %04x %04x\n", offset, data, mem_mask ); return data; } -WRITE16_MEMBER( linear_flash_pccard_device::write_memory ) +void linear_flash_pccard_device::write_memory(offs_t offset, uint16_t data, uint16_t mem_mask) { //printf( ">%08x %04x %04x\n", offset, data, mem_mask ); m_space->write_word(offset * 2, data, mem_mask); diff --git a/src/devices/machine/linflash.h b/src/devices/machine/linflash.h index 2dac02c75b2..20f4559e98d 100644 --- a/src/devices/machine/linflash.h +++ b/src/devices/machine/linflash.h @@ -13,8 +13,8 @@ class linear_flash_pccard_device : public device_t, public device_memory_interface { public: - virtual DECLARE_READ16_MEMBER(read_memory) override; - virtual DECLARE_WRITE16_MEMBER(write_memory) override; + virtual uint16_t read_memory(offs_t offset, uint16_t mem_mask = ~0) override; + virtual void write_memory(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; protected: linear_flash_pccard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/lpc-acpi.cpp b/src/devices/machine/lpc-acpi.cpp index cc0cdac2e46..b252ffd2c3b 100644 --- a/src/devices/machine/lpc-acpi.cpp +++ b/src/devices/machine/lpc-acpi.cpp @@ -82,288 +82,288 @@ void lpc_acpi_device::device_reset() sw_irq_gen = 0; } -READ16_MEMBER( lpc_acpi_device::pm1_sts_r) +uint16_t lpc_acpi_device::pm1_sts_r() { return pm1_sts; } -WRITE16_MEMBER(lpc_acpi_device::pm1_sts_w) +void lpc_acpi_device::pm1_sts_w(uint16_t data) { pm1_sts &= ~data; logerror("%s: pm1_sts = %04x\n", tag(), pm1_sts); } -READ16_MEMBER( lpc_acpi_device::pm1_en_r) +uint16_t lpc_acpi_device::pm1_en_r() { return pm1_en; } -WRITE16_MEMBER(lpc_acpi_device::pm1_en_w) +void lpc_acpi_device::pm1_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&pm1_en); logerror("%s: pm1_en = %04x\n", tag(), pm1_en); } -READ32_MEMBER( lpc_acpi_device::pm1_cnt_r) +uint32_t lpc_acpi_device::pm1_cnt_r() { return pm1_cnt; } -WRITE32_MEMBER(lpc_acpi_device::pm1_cnt_w) +void lpc_acpi_device::pm1_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&pm1_cnt); logerror("%s: pm1_cnt = %08x\n", tag(), pm1_cnt); } -READ32_MEMBER(lpc_acpi_device::pm1_tmr_r) +uint32_t lpc_acpi_device::pm1_tmr_r() { return machine().time().as_ticks(3579545) & 0xffffff; } -READ32_MEMBER( lpc_acpi_device::proc_cnt_r) +uint32_t lpc_acpi_device::proc_cnt_r() { return proc_cnt; } -WRITE32_MEMBER(lpc_acpi_device::proc_cnt_w) +void lpc_acpi_device::proc_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&proc_cnt); logerror("%s: proc_cnt = %08x\n", tag(), proc_cnt); } -READ8_MEMBER( lpc_acpi_device::lv2_r) +uint8_t lpc_acpi_device::lv2_r() { return 0x00; } -READ32_MEMBER( lpc_acpi_device::gpe0_sts_r) +uint32_t lpc_acpi_device::gpe0_sts_r() { return gpe0_sts; } -WRITE32_MEMBER(lpc_acpi_device::gpe0_sts_w) +void lpc_acpi_device::gpe0_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&gpe0_sts); logerror("%s: gpe0_sts = %08x\n", tag(), gpe0_sts); } -READ32_MEMBER( lpc_acpi_device::gpe0_en_r) +uint32_t lpc_acpi_device::gpe0_en_r() { return gpe0_en; } -WRITE32_MEMBER(lpc_acpi_device::gpe0_en_w) +void lpc_acpi_device::gpe0_en_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&gpe0_en); logerror("%s: gpe0_en = %08x\n", tag(), gpe0_en); } -READ32_MEMBER( lpc_acpi_device::smi_en_r) +uint32_t lpc_acpi_device::smi_en_r() { return smi_en; } -WRITE32_MEMBER(lpc_acpi_device::smi_en_w) +void lpc_acpi_device::smi_en_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&smi_en); logerror("%s: smi_en = %08x\n", tag(), smi_en); } -READ32_MEMBER( lpc_acpi_device::smi_sts_r) +uint32_t lpc_acpi_device::smi_sts_r() { return smi_sts; } -WRITE32_MEMBER(lpc_acpi_device::smi_sts_w) +void lpc_acpi_device::smi_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&smi_sts); logerror("%s: smi_sts = %08x\n", tag(), smi_sts); } -READ16_MEMBER( lpc_acpi_device::alt_gp_smi_en_r) +uint16_t lpc_acpi_device::alt_gp_smi_en_r() { return alt_gp_smi_en; } -WRITE16_MEMBER(lpc_acpi_device::alt_gp_smi_en_w) +void lpc_acpi_device::alt_gp_smi_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&alt_gp_smi_en); logerror("%s: alt_gp_smi_en = %04x\n", tag(), alt_gp_smi_en); } -READ16_MEMBER( lpc_acpi_device::alt_gp_smi_sts_r) +uint16_t lpc_acpi_device::alt_gp_smi_sts_r() { return alt_gp_smi_sts; } -WRITE16_MEMBER(lpc_acpi_device::alt_gp_smi_sts_w) +void lpc_acpi_device::alt_gp_smi_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&alt_gp_smi_sts); logerror("%s: alt_gp_smi_sts = %04x\n", tag(), alt_gp_smi_sts); } -READ16_MEMBER( lpc_acpi_device::devact_sts_r) +uint16_t lpc_acpi_device::devact_sts_r() { return devact_sts; } -WRITE16_MEMBER(lpc_acpi_device::devact_sts_w) +void lpc_acpi_device::devact_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&devact_sts); logerror("%s: devact_sts = %04x\n", tag(), devact_sts); } -READ16_MEMBER( lpc_acpi_device::devtrap_en_r) +uint16_t lpc_acpi_device::devtrap_en_r() { return devtrap_en; } -WRITE16_MEMBER(lpc_acpi_device::devtrap_en_w) +void lpc_acpi_device::devtrap_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&devtrap_en); logerror("%s: devtrap_en = %04x\n", tag(), devtrap_en); } -READ16_MEMBER( lpc_acpi_device::bus_addr_track_r) +uint16_t lpc_acpi_device::bus_addr_track_r() { logerror("%s: read bus_addr_track\n", tag()); return 0; } -READ8_MEMBER( lpc_acpi_device::bus_cyc_track_r) +uint8_t lpc_acpi_device::bus_cyc_track_r() { logerror("%s: read bus_cyc_track\n", tag()); return 0; } -READ8_MEMBER( lpc_acpi_device::tco_rld_r) +uint8_t lpc_acpi_device::tco_rld_r() { return tco_rld; } -WRITE8_MEMBER( lpc_acpi_device::tco_rld_w) +void lpc_acpi_device::tco_rld_w(uint8_t data) { tco_rld = data; logerror("%s: tco_rld = %02x\n", tag(), tco_rld); } -READ8_MEMBER( lpc_acpi_device::tco_tmr_r) +uint8_t lpc_acpi_device::tco_tmr_r() { return tco_tmr; } -WRITE8_MEMBER( lpc_acpi_device::tco_tmr_w) +void lpc_acpi_device::tco_tmr_w(uint8_t data) { tco_tmr = data; logerror("%s: tco_tmr = %02x\n", tag(), tco_tmr); } -READ8_MEMBER( lpc_acpi_device::tco_dat_in_r) +uint8_t lpc_acpi_device::tco_dat_in_r() { return tco_dat_in; } -WRITE8_MEMBER( lpc_acpi_device::tco_dat_in_w) +void lpc_acpi_device::tco_dat_in_w(uint8_t data) { tco_dat_in = data; logerror("%s: tco_dat_in = %02x\n", tag(), tco_dat_in); } -READ8_MEMBER( lpc_acpi_device::tco_dat_out_r) +uint8_t lpc_acpi_device::tco_dat_out_r() { return tco_dat_out; } -WRITE8_MEMBER( lpc_acpi_device::tco_dat_out_w) +void lpc_acpi_device::tco_dat_out_w(uint8_t data) { tco_dat_out = data; logerror("%s: tco_dat_out = %02x\n", tag(), tco_dat_out); } -READ16_MEMBER( lpc_acpi_device::tco1_sts_r) +uint16_t lpc_acpi_device::tco1_sts_r() { return tco1_sts; } -WRITE16_MEMBER(lpc_acpi_device::tco1_sts_w) +void lpc_acpi_device::tco1_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&tco1_sts); logerror("%s: tco1_sts = %04x\n", tag(), tco1_sts); } -READ16_MEMBER( lpc_acpi_device::tco2_sts_r) +uint16_t lpc_acpi_device::tco2_sts_r() { return tco2_sts; } -WRITE16_MEMBER(lpc_acpi_device::tco2_sts_w) +void lpc_acpi_device::tco2_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&tco2_sts); logerror("%s: tco2_sts = %04x\n", tag(), tco2_sts); } -READ16_MEMBER( lpc_acpi_device::tco1_cnt_r) +uint16_t lpc_acpi_device::tco1_cnt_r() { return tco1_cnt; } -WRITE16_MEMBER(lpc_acpi_device::tco1_cnt_w) +void lpc_acpi_device::tco1_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&tco1_cnt); logerror("%s: tco1_cnt = %04x\n", tag(), tco1_cnt); } -READ16_MEMBER( lpc_acpi_device::tco2_cnt_r) +uint16_t lpc_acpi_device::tco2_cnt_r() { return tco2_cnt; } -WRITE16_MEMBER(lpc_acpi_device::tco2_cnt_w) +void lpc_acpi_device::tco2_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&tco2_cnt); logerror("%s: tco2_cnt = %04x\n", tag(), tco2_cnt); } -READ8_MEMBER( lpc_acpi_device::tco_message1_r) +uint8_t lpc_acpi_device::tco_message1_r() { return tco_message1; } -WRITE8_MEMBER( lpc_acpi_device::tco_message1_w) +void lpc_acpi_device::tco_message1_w(uint8_t data) { tco_message1 = data; logerror("%s: tco_message1 = %02x\n", tag(), tco_message1); } -READ8_MEMBER( lpc_acpi_device::tco_message2_r) +uint8_t lpc_acpi_device::tco_message2_r() { return tco_message2; } -WRITE8_MEMBER( lpc_acpi_device::tco_message2_w) +void lpc_acpi_device::tco_message2_w(uint8_t data) { tco_message2 = data; logerror("%s: tco_message2 = %02x\n", tag(), tco_message2); } -READ8_MEMBER( lpc_acpi_device::tco_wdstatus_r) +uint8_t lpc_acpi_device::tco_wdstatus_r() { return tco_wdstatus; } -WRITE8_MEMBER( lpc_acpi_device::tco_wdstatus_w) +void lpc_acpi_device::tco_wdstatus_w(uint8_t data) { tco_wdstatus = data; logerror("%s: tco_wdstatus = %02x\n", tag(), tco_wdstatus); } -READ8_MEMBER( lpc_acpi_device::sw_irq_gen_r) +uint8_t lpc_acpi_device::sw_irq_gen_r() { return sw_irq_gen; } -WRITE8_MEMBER( lpc_acpi_device::sw_irq_gen_w) +void lpc_acpi_device::sw_irq_gen_w(uint8_t data) { sw_irq_gen = data; logerror("%s: sw_irq_gen = %02x\n", tag(), sw_irq_gen); diff --git a/src/devices/machine/lpc-acpi.h b/src/devices/machine/lpc-acpi.h index ae8f0a21691..1cd64636a10 100644 --- a/src/devices/machine/lpc-acpi.h +++ b/src/devices/machine/lpc-acpi.h @@ -27,59 +27,59 @@ private: void map(address_map &map); - DECLARE_READ16_MEMBER( pm1_sts_r); - DECLARE_WRITE16_MEMBER(pm1_sts_w); - DECLARE_READ16_MEMBER( pm1_en_r); - DECLARE_WRITE16_MEMBER(pm1_en_w); - DECLARE_READ32_MEMBER( pm1_cnt_r); - DECLARE_WRITE32_MEMBER(pm1_cnt_w); - DECLARE_READ32_MEMBER( pm1_tmr_r); - DECLARE_READ32_MEMBER( proc_cnt_r); - DECLARE_WRITE32_MEMBER(proc_cnt_w); - DECLARE_READ8_MEMBER( lv2_r); - DECLARE_READ32_MEMBER( gpe0_sts_r); - DECLARE_WRITE32_MEMBER(gpe0_sts_w); - DECLARE_READ32_MEMBER( gpe0_en_r); - DECLARE_WRITE32_MEMBER(gpe0_en_w); - DECLARE_READ32_MEMBER( smi_en_r); - DECLARE_WRITE32_MEMBER(smi_en_w); - DECLARE_READ32_MEMBER( smi_sts_r); - DECLARE_WRITE32_MEMBER(smi_sts_w); - DECLARE_READ16_MEMBER( alt_gp_smi_en_r); - DECLARE_WRITE16_MEMBER(alt_gp_smi_en_w); - DECLARE_READ16_MEMBER( alt_gp_smi_sts_r); - DECLARE_WRITE16_MEMBER(alt_gp_smi_sts_w); - DECLARE_READ16_MEMBER( devact_sts_r); - DECLARE_WRITE16_MEMBER(devact_sts_w); - DECLARE_READ16_MEMBER( devtrap_en_r); - DECLARE_WRITE16_MEMBER(devtrap_en_w); - DECLARE_READ16_MEMBER( bus_addr_track_r); - DECLARE_READ8_MEMBER( bus_cyc_track_r); + uint16_t pm1_sts_r(); + void pm1_sts_w(uint16_t data); + uint16_t pm1_en_r(); + void pm1_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t pm1_cnt_r(); + void pm1_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t pm1_tmr_r(); + uint32_t proc_cnt_r(); + void proc_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t lv2_r(); + uint32_t gpe0_sts_r(); + void gpe0_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t gpe0_en_r(); + void gpe0_en_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t smi_en_r(); + void smi_en_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t smi_sts_r(); + void smi_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t alt_gp_smi_en_r(); + void alt_gp_smi_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t alt_gp_smi_sts_r(); + void alt_gp_smi_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t devact_sts_r(); + void devact_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t devtrap_en_r(); + void devtrap_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t bus_addr_track_r(); + uint8_t bus_cyc_track_r(); - DECLARE_READ8_MEMBER( tco_rld_r); - DECLARE_WRITE8_MEMBER( tco_rld_w); - DECLARE_READ8_MEMBER( tco_tmr_r); - DECLARE_WRITE8_MEMBER( tco_tmr_w); - DECLARE_READ8_MEMBER( tco_dat_in_r); - DECLARE_WRITE8_MEMBER( tco_dat_in_w); - DECLARE_READ8_MEMBER( tco_dat_out_r); - DECLARE_WRITE8_MEMBER( tco_dat_out_w); - DECLARE_READ16_MEMBER( tco1_sts_r); - DECLARE_WRITE16_MEMBER(tco1_sts_w); - DECLARE_READ16_MEMBER( tco2_sts_r); - DECLARE_WRITE16_MEMBER(tco2_sts_w); - DECLARE_READ16_MEMBER( tco1_cnt_r); - DECLARE_WRITE16_MEMBER(tco1_cnt_w); - DECLARE_READ16_MEMBER( tco2_cnt_r); - DECLARE_WRITE16_MEMBER(tco2_cnt_w); - DECLARE_READ8_MEMBER( tco_message1_r); - DECLARE_WRITE8_MEMBER( tco_message1_w); - DECLARE_READ8_MEMBER( tco_message2_r); - DECLARE_WRITE8_MEMBER( tco_message2_w); - DECLARE_READ8_MEMBER( tco_wdstatus_r); - DECLARE_WRITE8_MEMBER( tco_wdstatus_w); - DECLARE_READ8_MEMBER( sw_irq_gen_r); - DECLARE_WRITE8_MEMBER( sw_irq_gen_w); + uint8_t tco_rld_r(); + void tco_rld_w(uint8_t data); + uint8_t tco_tmr_r(); + void tco_tmr_w(uint8_t data); + uint8_t tco_dat_in_r(); + void tco_dat_in_w(uint8_t data); + uint8_t tco_dat_out_r(); + void tco_dat_out_w(uint8_t data); + uint16_t tco1_sts_r(); + void tco1_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tco2_sts_r(); + void tco2_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tco1_cnt_r(); + void tco1_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tco2_cnt_r(); + void tco2_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t tco_message1_r(); + void tco_message1_w(uint8_t data); + uint8_t tco_message2_r(); + void tco_message2_w(uint8_t data); + uint8_t tco_wdstatus_r(); + void tco_wdstatus_w(uint8_t data); + uint8_t sw_irq_gen_r(); + void sw_irq_gen_w(uint8_t data); }; DECLARE_DEVICE_TYPE(LPC_ACPI, lpc_acpi_device) diff --git a/src/devices/machine/mb89371.cpp b/src/devices/machine/mb89371.cpp index 8bd1c7657bc..7393bd7d529 100644 --- a/src/devices/machine/mb89371.cpp +++ b/src/devices/machine/mb89371.cpp @@ -22,7 +22,7 @@ void mb89371_device::device_start() { } -WRITE8_MEMBER(mb89371_device::write) +void mb89371_device::write(offs_t offset, uint8_t data, uint8_t mem_mask) { switch (offset) { @@ -37,7 +37,7 @@ WRITE8_MEMBER(mb89371_device::write) logerror("MB89371 unimplemented write @%X = %02X & %02X\n", offset, data, mem_mask); } -READ8_MEMBER(mb89371_device::read) +uint8_t mb89371_device::read(offs_t offset, uint8_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/mb89371.h b/src/devices/machine/mb89371.h index 413492ee765..4fe1c8158d2 100644 --- a/src/devices/machine/mb89371.h +++ b/src/devices/machine/mb89371.h @@ -20,8 +20,8 @@ public: // construction/destruction mb89371_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_WRITE8_MEMBER( write ); - DECLARE_READ8_MEMBER( read ); + void write(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint8_t read(offs_t offset, uint8_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/machine/mcf5206e.cpp b/src/devices/machine/mcf5206e.cpp index cea38ca7f0f..776223dc530 100644 --- a/src/devices/machine/mcf5206e.cpp +++ b/src/devices/machine/mcf5206e.cpp @@ -70,7 +70,7 @@ void mcf5206e_peripheral_device::coldfire_regs_map(address_map &map) -READ8_MEMBER( mcf5206e_peripheral_device::ICR1_ICR2_ICR3_ICR4_r ) +uint8_t mcf5206e_peripheral_device::ICR1_ICR2_ICR3_ICR4_r(offs_t offset) { switch (offset) { @@ -91,7 +91,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::ICR1_ICR2_ICR3_ICR4_r ) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::ICR1_ICR2_ICR3_ICR4_w ) +void mcf5206e_peripheral_device::ICR1_ICR2_ICR3_ICR4_w(offs_t offset, uint8_t data) { switch (offset) { @@ -118,7 +118,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::ICR1_ICR2_ICR3_ICR4_w ) } } -READ8_MEMBER( mcf5206e_peripheral_device::ICR9_ICR10_ICR11_ICR12_r ) +uint8_t mcf5206e_peripheral_device::ICR9_ICR10_ICR11_ICR12_r(offs_t offset) { switch (offset) { @@ -139,7 +139,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::ICR9_ICR10_ICR11_ICR12_r ) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::ICR9_ICR10_ICR11_ICR12_w ) +void mcf5206e_peripheral_device::ICR9_ICR10_ICR11_ICR12_w(offs_t offset, uint8_t data) { switch (offset) { @@ -166,7 +166,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::ICR9_ICR10_ICR11_ICR12_w ) } } -READ8_MEMBER( mcf5206e_peripheral_device::ICR13_r ) +uint8_t mcf5206e_peripheral_device::ICR13_r(offs_t offset) { switch (offset) { @@ -183,7 +183,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::ICR13_r ) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::ICR13_w ) +void mcf5206e_peripheral_device::ICR13_w(offs_t offset, uint8_t data) { switch (offset) { @@ -270,64 +270,64 @@ inline void mcf5206e_peripheral_device::CSCR_w(int which, int offset, uint16_t d -READ16_MEMBER( mcf5206e_peripheral_device::CSAR0_r) { return CSAR_r(0, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR0_w) { CSAR_w(0, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR0_r) { return CSMR_r(0, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR0_w) { CSMR_w(0, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR0_r) { return CSCR_r(0, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR0_w) { CSCR_w(0, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR1_r) { return CSAR_r(1, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR1_w) { CSAR_w(1, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR1_r) { return CSMR_r(1, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR1_w) { CSMR_w(1, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR1_r) { return CSCR_r(1, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR1_w) { CSCR_w(1, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR2_r) { return CSAR_r(2, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR2_w) { CSAR_w(2, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR2_r) { return CSMR_r(2, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR2_w) { CSMR_w(2, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR2_r) { return CSCR_r(2, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR2_w) { CSCR_w(2, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR3_r) { return CSAR_r(3, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR3_w) { CSAR_w(3, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR3_r) { return CSMR_r(3, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR3_w) { CSMR_w(3, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR3_r) { return CSCR_r(3, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR3_w) { CSCR_w(3, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR4_r) { return CSAR_r(4, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR4_w) { CSAR_w(4, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR4_r) { return CSMR_r(4, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR4_w) { CSMR_w(4, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR4_r) { return CSCR_r(4, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR4_w) { CSCR_w(4, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR5_r) { return CSAR_r(5, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR5_w) { CSAR_w(5, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR5_r) { return CSMR_r(5, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR5_w) { CSMR_w(5, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR5_r) { return CSCR_r(5, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR5_w) { CSCR_w(5, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR6_r) { return CSAR_r(6, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR6_w) { CSAR_w(6, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR6_r) { return CSMR_r(6, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR6_w) { CSMR_w(6, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR6_r) { return CSCR_r(6, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR6_w) { CSCR_w(6, offset, data, mem_mask); } - -READ16_MEMBER( mcf5206e_peripheral_device::CSAR7_r) { return CSAR_r(7, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSAR7_w) { CSAR_w(7, offset, data, mem_mask); } -READ32_MEMBER( mcf5206e_peripheral_device::CSMR7_r) { return CSMR_r(7, mem_mask); } -WRITE32_MEMBER( mcf5206e_peripheral_device::CSMR7_w) { CSMR_w(7, data, mem_mask); } -READ16_MEMBER( mcf5206e_peripheral_device::CSCR7_r) { return CSCR_r(7, offset, mem_mask); } -WRITE16_MEMBER( mcf5206e_peripheral_device::CSCR7_w) { CSCR_w(7, offset, data, mem_mask); } - - -READ16_MEMBER( mcf5206e_peripheral_device::DMCR_r) +uint16_t mcf5206e_peripheral_device::CSAR0_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(0, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR0_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(0, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR0_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(0, mem_mask); } +void mcf5206e_peripheral_device::CSMR0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(0, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR0_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(0, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR0_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(0, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR1_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(1, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR1_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(1, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR1_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(1, mem_mask); } +void mcf5206e_peripheral_device::CSMR1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(1, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR1_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(1, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR1_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(1, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR2_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(2, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR2_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(2, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR2_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(2, mem_mask); } +void mcf5206e_peripheral_device::CSMR2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(2, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR2_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(2, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR2_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(2, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR3_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(3, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR3_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(3, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR3_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(3, mem_mask); } +void mcf5206e_peripheral_device::CSMR3_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(3, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR3_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(3, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR3_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(3, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR4_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(4, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR4_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(4, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR4_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(4, mem_mask); } +void mcf5206e_peripheral_device::CSMR4_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(4, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR4_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(4, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR4_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(4, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR5_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(5, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR5_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(5, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR5_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(5, mem_mask); } +void mcf5206e_peripheral_device::CSMR5_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(5, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR5_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(5, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR5_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(5, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR6_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(6, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR6_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(6, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR6_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(6, mem_mask); } +void mcf5206e_peripheral_device::CSMR6_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(6, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR6_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(6, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR6_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(6, offset, data, mem_mask); } + +uint16_t mcf5206e_peripheral_device::CSAR7_r(offs_t offset, uint16_t mem_mask) { return CSAR_r(7, offset, mem_mask); } +void mcf5206e_peripheral_device::CSAR7_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSAR_w(7, offset, data, mem_mask); } +uint32_t mcf5206e_peripheral_device::CSMR7_r(offs_t offset, uint32_t mem_mask) { return CSMR_r(7, mem_mask); } +void mcf5206e_peripheral_device::CSMR7_w(offs_t offset, uint32_t data, uint32_t mem_mask) { CSMR_w(7, data, mem_mask); } +uint16_t mcf5206e_peripheral_device::CSCR7_r(offs_t offset, uint16_t mem_mask) { return CSCR_r(7, offset, mem_mask); } +void mcf5206e_peripheral_device::CSCR7_w(offs_t offset, uint16_t data, uint16_t mem_mask) { CSCR_w(7, offset, data, mem_mask); } + + +uint16_t mcf5206e_peripheral_device::DMCR_r(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -342,7 +342,7 @@ READ16_MEMBER( mcf5206e_peripheral_device::DMCR_r) return 0; } -WRITE16_MEMBER( mcf5206e_peripheral_device::DMCR_w) +void mcf5206e_peripheral_device::DMCR_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { @@ -358,7 +358,7 @@ WRITE16_MEMBER( mcf5206e_peripheral_device::DMCR_w) } -READ16_MEMBER( mcf5206e_peripheral_device::PAR_r) +uint16_t mcf5206e_peripheral_device::PAR_r(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -373,7 +373,7 @@ READ16_MEMBER( mcf5206e_peripheral_device::PAR_r) return 0; } -WRITE16_MEMBER( mcf5206e_peripheral_device::PAR_w) +void mcf5206e_peripheral_device::PAR_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { @@ -390,7 +390,7 @@ WRITE16_MEMBER( mcf5206e_peripheral_device::PAR_w) -READ8_MEMBER( mcf5206e_peripheral_device::PPDDR_r) +uint8_t mcf5206e_peripheral_device::PPDDR_r(offs_t offset) { switch (offset) { @@ -407,7 +407,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::PPDDR_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::PPDDR_w) +void mcf5206e_peripheral_device::PPDDR_w(offs_t offset, uint8_t data) { switch (offset) { @@ -423,7 +423,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::PPDDR_w) } } -READ8_MEMBER( mcf5206e_peripheral_device::PPDAT_r) +uint8_t mcf5206e_peripheral_device::PPDAT_r(offs_t offset) { switch (offset) { @@ -440,7 +440,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::PPDAT_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::PPDAT_w) +void mcf5206e_peripheral_device::PPDAT_w(offs_t offset, uint8_t data) { switch (offset) { @@ -458,7 +458,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::PPDAT_w) } -READ8_MEMBER( mcf5206e_peripheral_device::MBCR_r) +uint8_t mcf5206e_peripheral_device::MBCR_r(offs_t offset) { switch (offset) { @@ -475,7 +475,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::MBCR_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::MBCR_w) +void mcf5206e_peripheral_device::MBCR_w(offs_t offset, uint8_t data) { switch (offset) { @@ -492,7 +492,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::MBCR_w) } } -READ8_MEMBER( mcf5206e_peripheral_device::MFDR_r) +uint8_t mcf5206e_peripheral_device::MFDR_r(offs_t offset) { switch (offset) { @@ -509,7 +509,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::MFDR_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::MFDR_w) +void mcf5206e_peripheral_device::MFDR_w(offs_t offset, uint8_t data) { switch (offset) { @@ -531,7 +531,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::MFDR_w) -READ8_MEMBER( mcf5206e_peripheral_device::MBSR_r) +uint8_t mcf5206e_peripheral_device::MBSR_r(offs_t offset) { int hack = 0x00; @@ -553,7 +553,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::MBSR_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::MBSR_w) +void mcf5206e_peripheral_device::MBSR_w(offs_t offset, uint8_t data) { switch (offset) { @@ -573,7 +573,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::MBSR_w) -READ8_MEMBER( mcf5206e_peripheral_device::MBDR_r) +uint8_t mcf5206e_peripheral_device::MBDR_r(offs_t offset) { int hack = 0x00; @@ -595,7 +595,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::MBDR_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::MBDR_w) +void mcf5206e_peripheral_device::MBDR_w(offs_t offset, uint8_t data) { switch (offset) { @@ -614,7 +614,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::MBDR_w) -READ16_MEMBER( mcf5206e_peripheral_device::IMR_r) +uint16_t mcf5206e_peripheral_device::IMR_r(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -629,7 +629,7 @@ READ16_MEMBER( mcf5206e_peripheral_device::IMR_r) return 0; } -WRITE16_MEMBER( mcf5206e_peripheral_device::IMR_w) +void mcf5206e_peripheral_device::IMR_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { @@ -671,7 +671,7 @@ TIMER_CALLBACK_MEMBER(mcf5206e_peripheral_device::timer1_callback) } -READ16_MEMBER( mcf5206e_peripheral_device::TMR1_r) +uint16_t mcf5206e_peripheral_device::TMR1_r(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -686,7 +686,7 @@ READ16_MEMBER( mcf5206e_peripheral_device::TMR1_r) return 0; } -WRITE16_MEMBER( mcf5206e_peripheral_device::TMR1_w) +void mcf5206e_peripheral_device::TMR1_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { @@ -714,7 +714,7 @@ WRITE16_MEMBER( mcf5206e_peripheral_device::TMR1_w) } } -READ16_MEMBER( mcf5206e_peripheral_device::TRR1_r) +uint16_t mcf5206e_peripheral_device::TRR1_r(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -729,7 +729,7 @@ READ16_MEMBER( mcf5206e_peripheral_device::TRR1_r) return 0; } -WRITE16_MEMBER( mcf5206e_peripheral_device::TRR1_w) +void mcf5206e_peripheral_device::TRR1_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { @@ -746,7 +746,7 @@ WRITE16_MEMBER( mcf5206e_peripheral_device::TRR1_w) -READ8_MEMBER( mcf5206e_peripheral_device::TER1_r) +uint8_t mcf5206e_peripheral_device::TER1_r(offs_t offset) { switch (offset) { @@ -763,7 +763,7 @@ READ8_MEMBER( mcf5206e_peripheral_device::TER1_r) return 0; } -WRITE8_MEMBER( mcf5206e_peripheral_device::TER1_w) +void mcf5206e_peripheral_device::TER1_w(offs_t offset, uint8_t data) { switch (offset) { @@ -780,7 +780,7 @@ WRITE8_MEMBER( mcf5206e_peripheral_device::TER1_w) } } -READ16_MEMBER( mcf5206e_peripheral_device::TCN1_r) +uint16_t mcf5206e_peripheral_device::TCN1_r(offs_t offset, uint16_t mem_mask) { switch (offset) { @@ -796,7 +796,7 @@ READ16_MEMBER( mcf5206e_peripheral_device::TCN1_r) return 0; } -WRITE16_MEMBER( mcf5206e_peripheral_device::TCN1_w) +void mcf5206e_peripheral_device::TCN1_w(offs_t offset, uint16_t data, uint16_t mem_mask) { switch (offset) { @@ -876,13 +876,13 @@ void mcf5206e_peripheral_device::device_reset() m_timer1->adjust(attotime::never); } -READ32_MEMBER(mcf5206e_peripheral_device::dev_r) +uint32_t mcf5206e_peripheral_device::dev_r(offs_t offset, uint32_t mem_mask) { address_space ®_space = this->space(); return reg_space.read_dword(offset*4, mem_mask); } -WRITE32_MEMBER(mcf5206e_peripheral_device::dev_w) +void mcf5206e_peripheral_device::dev_w(offs_t offset, uint32_t data, uint32_t mem_mask) { address_space ®_space = this->space(); reg_space.write_dword(offset*4, data, mem_mask); @@ -896,12 +896,12 @@ enum { CF_MBSR = 0x1ec/4 }; -WRITE32_MEMBER(mcf5206e_peripheral_device::seta2_coldfire_regs_w) +void mcf5206e_peripheral_device::seta2_coldfire_regs_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA( &m_coldfire_regs[offset] ); } -READ32_MEMBER(mcf5206e_peripheral_device::seta2_coldfire_regs_r) +uint32_t mcf5206e_peripheral_device::seta2_coldfire_regs_r(offs_t offset) { switch( offset ) { diff --git a/src/devices/machine/mcf5206e.h b/src/devices/machine/mcf5206e.h index 18c8f642fca..171620d5f0b 100644 --- a/src/devices/machine/mcf5206e.h +++ b/src/devices/machine/mcf5206e.h @@ -25,10 +25,10 @@ public: // construction/destruction mcf5206e_peripheral_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ32_MEMBER( dev_r ); - DECLARE_WRITE32_MEMBER( dev_w ); - DECLARE_READ32_MEMBER( seta2_coldfire_regs_r ); - DECLARE_WRITE32_MEMBER( seta2_coldfire_regs_w ); + uint32_t dev_r(offs_t offset, uint32_t mem_mask = ~0); + void dev_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t seta2_coldfire_regs_r(offs_t offset); + void seta2_coldfire_regs_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: // device-level overrides @@ -51,94 +51,94 @@ private: uint16_t CSCR_r(int which, int offset, uint16_t mem_mask); void CSCR_w(int which, int offset, uint16_t data, uint16_t mem_mask); - DECLARE_READ8_MEMBER( ICR1_ICR2_ICR3_ICR4_r ); - DECLARE_WRITE8_MEMBER( ICR1_ICR2_ICR3_ICR4_w ); - - DECLARE_READ8_MEMBER( ICR9_ICR10_ICR11_ICR12_r ); - DECLARE_WRITE8_MEMBER( ICR9_ICR10_ICR11_ICR12_w ); - DECLARE_READ8_MEMBER( ICR13_r ); - DECLARE_WRITE8_MEMBER( ICR13_w ); - - DECLARE_READ16_MEMBER( CSAR0_r ); - DECLARE_WRITE16_MEMBER( CSAR0_w ); - DECLARE_READ32_MEMBER( CSMR0_r ); - DECLARE_WRITE32_MEMBER( CSMR0_w ); - DECLARE_READ16_MEMBER( CSCR0_r ); - DECLARE_WRITE16_MEMBER( CSCR0_w ); - DECLARE_READ16_MEMBER( CSAR1_r ); - DECLARE_WRITE16_MEMBER( CSAR1_w ); - DECLARE_READ32_MEMBER( CSMR1_r ); - DECLARE_WRITE32_MEMBER( CSMR1_w ); - DECLARE_READ16_MEMBER( CSCR1_r ); - DECLARE_WRITE16_MEMBER( CSCR1_w ); - DECLARE_READ16_MEMBER( CSAR2_r ); - DECLARE_WRITE16_MEMBER( CSAR2_w ); - DECLARE_READ32_MEMBER( CSMR2_r ); - DECLARE_WRITE32_MEMBER( CSMR2_w ); - DECLARE_READ16_MEMBER( CSCR2_r ); - DECLARE_WRITE16_MEMBER( CSCR2_w ); - DECLARE_READ16_MEMBER( CSAR3_r ); - DECLARE_WRITE16_MEMBER( CSAR3_w ); - DECLARE_READ32_MEMBER( CSMR3_r ); - DECLARE_WRITE32_MEMBER( CSMR3_w ); - DECLARE_READ16_MEMBER( CSCR3_r ); - DECLARE_WRITE16_MEMBER( CSCR3_w ); - DECLARE_READ16_MEMBER( CSAR4_r ); - DECLARE_WRITE16_MEMBER( CSAR4_w ); - DECLARE_READ32_MEMBER( CSMR4_r ); - DECLARE_WRITE32_MEMBER( CSMR4_w ); - DECLARE_READ16_MEMBER( CSCR4_r ); - DECLARE_WRITE16_MEMBER( CSCR4_w ); - DECLARE_READ16_MEMBER( CSAR5_r ); - DECLARE_WRITE16_MEMBER( CSAR5_w ); - DECLARE_READ32_MEMBER( CSMR5_r ); - DECLARE_WRITE32_MEMBER( CSMR5_w ); - DECLARE_READ16_MEMBER( CSCR5_r ); - DECLARE_WRITE16_MEMBER( CSCR5_w ); - DECLARE_READ16_MEMBER( CSAR6_r ); - DECLARE_WRITE16_MEMBER( CSAR6_w ); - DECLARE_READ32_MEMBER( CSMR6_r ); - DECLARE_WRITE32_MEMBER( CSMR6_w ); - DECLARE_READ16_MEMBER( CSCR6_r ); - DECLARE_WRITE16_MEMBER( CSCR6_w ); - DECLARE_READ16_MEMBER( CSAR7_r ); - DECLARE_WRITE16_MEMBER( CSAR7_w ); - DECLARE_READ32_MEMBER( CSMR7_r ); - DECLARE_WRITE32_MEMBER( CSMR7_w ); - DECLARE_READ16_MEMBER( CSCR7_r ); - DECLARE_WRITE16_MEMBER( CSCR7_w ); - - DECLARE_READ16_MEMBER( DMCR_r ); - DECLARE_WRITE16_MEMBER( DMCR_w ); - DECLARE_READ16_MEMBER( PAR_r ); - DECLARE_WRITE16_MEMBER( PAR_w ); - - DECLARE_READ16_MEMBER( TMR1_r ); - DECLARE_WRITE16_MEMBER( TMR1_w ); - DECLARE_READ16_MEMBER( TRR1_r ); - DECLARE_WRITE16_MEMBER( TRR1_w ); - DECLARE_READ8_MEMBER( TER1_r ); - DECLARE_WRITE8_MEMBER(TER1_w ); - DECLARE_READ16_MEMBER( TCN1_r ); - DECLARE_WRITE16_MEMBER( TCN1_w ); - - DECLARE_READ8_MEMBER( PPDDR_r ); - DECLARE_WRITE8_MEMBER( PPDDR_w ); - DECLARE_READ8_MEMBER( PPDAT_r ); - DECLARE_WRITE8_MEMBER( PPDAT_w ); - - DECLARE_READ16_MEMBER( IMR_r ); - DECLARE_WRITE16_MEMBER( IMR_w ); - - - DECLARE_READ8_MEMBER( MBCR_r ); - DECLARE_WRITE8_MEMBER( MBCR_w ); - DECLARE_READ8_MEMBER( MBSR_r ); - DECLARE_WRITE8_MEMBER( MBSR_w ); - DECLARE_READ8_MEMBER( MFDR_r ); - DECLARE_WRITE8_MEMBER( MFDR_w ); - DECLARE_READ8_MEMBER( MBDR_r ); - DECLARE_WRITE8_MEMBER( MBDR_w ); + uint8_t ICR1_ICR2_ICR3_ICR4_r(offs_t offset); + void ICR1_ICR2_ICR3_ICR4_w(offs_t offset, uint8_t data); + + uint8_t ICR9_ICR10_ICR11_ICR12_r(offs_t offset); + void ICR9_ICR10_ICR11_ICR12_w(offs_t offset, uint8_t data); + uint8_t ICR13_r(offs_t offset); + void ICR13_w(offs_t offset, uint8_t data); + + uint16_t CSAR0_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR0_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR0_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR1_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR1_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR1_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR2_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR2_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR2_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR3_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR3_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR3_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR3_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR3_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR4_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR4_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR4_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR4_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR4_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR4_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR5_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR5_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR5_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR5_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR5_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR5_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR6_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR6_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR6_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR6_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR6_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR6_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t CSAR7_r(offs_t offset, uint16_t mem_mask = ~0); + void CSAR7_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t CSMR7_r(offs_t offset, uint32_t mem_mask = ~0); + void CSMR7_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t CSCR7_r(offs_t offset, uint16_t mem_mask = ~0); + void CSCR7_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint16_t DMCR_r(offs_t offset, uint16_t mem_mask = ~0); + void DMCR_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t PAR_r(offs_t offset, uint16_t mem_mask = ~0); + void PAR_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint16_t TMR1_r(offs_t offset, uint16_t mem_mask = ~0); + void TMR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t TRR1_r(offs_t offset, uint16_t mem_mask = ~0); + void TRR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t TER1_r(offs_t offset); + void TER1_w(offs_t offset, uint8_t data); + uint16_t TCN1_r(offs_t offset, uint16_t mem_mask = ~0); + void TCN1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint8_t PPDDR_r(offs_t offset); + void PPDDR_w(offs_t offset, uint8_t data); + uint8_t PPDAT_r(offs_t offset); + void PPDAT_w(offs_t offset, uint8_t data); + + uint16_t IMR_r(offs_t offset, uint16_t mem_mask = ~0); + void IMR_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + + uint8_t MBCR_r(offs_t offset); + void MBCR_w(offs_t offset, uint8_t data); + uint8_t MBSR_r(offs_t offset); + void MBSR_w(offs_t offset, uint8_t data); + uint8_t MFDR_r(offs_t offset); + void MFDR_w(offs_t offset, uint8_t data); + uint8_t MBDR_r(offs_t offset); + void MBDR_w(offs_t offset, uint8_t data); void coldfire_regs_map(address_map &map); diff --git a/src/devices/machine/pccard.cpp b/src/devices/machine/pccard.cpp index 87ae0b4c8e0..83a05b99421 100644 --- a/src/devices/machine/pccard.cpp +++ b/src/devices/machine/pccard.cpp @@ -12,27 +12,27 @@ device_pccard_interface::device_pccard_interface(const machine_config &mconfig, { } -READ16_MEMBER( device_pccard_interface::read_memory ) +uint16_t device_pccard_interface::read_memory(offs_t offset, uint16_t mem_mask) { if (VERBOSE & LOG_GENERAL) device().logerror("unhandled memory read %08x %04x\n", offset, mem_mask); return 0xffff; } -WRITE16_MEMBER( device_pccard_interface::write_memory ) +void device_pccard_interface::write_memory(offs_t offset, uint16_t data, uint16_t mem_mask) { if (VERBOSE & LOG_GENERAL) device().logerror("unhandled memory write %08x %04x %04x\n", offset, data, mem_mask); } -READ16_MEMBER( device_pccard_interface::read_reg ) +uint16_t device_pccard_interface::read_reg(offs_t offset, uint16_t mem_mask) { if (VERBOSE & LOG_GENERAL) device().logerror("unhandled register read %08x %04x\n", offset, mem_mask); return 0xffff; } -WRITE16_MEMBER( device_pccard_interface::write_reg ) +void device_pccard_interface::write_reg(offs_t offset, uint16_t data, uint16_t mem_mask) { if (VERBOSE & LOG_GENERAL) device().logerror("unhandled register write %08x %04x %04x\n", offset, data, mem_mask); @@ -57,30 +57,30 @@ READ_LINE_MEMBER(pccard_slot_device::read_line_inserted) return m_pccard ? 1 : 0; } -READ16_MEMBER( pccard_slot_device::read_memory ) +uint16_t pccard_slot_device::read_memory(offs_t offset, uint16_t mem_mask) { if (m_pccard) - return m_pccard->read_memory(space, offset, mem_mask); + return m_pccard->read_memory(offset, mem_mask); else return 0xffff; } -WRITE16_MEMBER( pccard_slot_device::write_memory ) +void pccard_slot_device::write_memory(offs_t offset, uint16_t data, uint16_t mem_mask) { if (m_pccard) - m_pccard->write_memory(space, offset, data, mem_mask); + m_pccard->write_memory(offset, data, mem_mask); } -READ16_MEMBER( pccard_slot_device::read_reg ) +uint16_t pccard_slot_device::read_reg(offs_t offset, uint16_t mem_mask) { if (m_pccard) - return m_pccard->read_reg(space, offset, mem_mask); + return m_pccard->read_reg(offset, mem_mask); else return 0xffff; } -WRITE16_MEMBER( pccard_slot_device::write_reg ) +void pccard_slot_device::write_reg(offs_t offset, uint16_t data, uint16_t mem_mask) { if (m_pccard) - m_pccard->write_reg(space, offset, data, mem_mask); + m_pccard->write_reg(offset, data, mem_mask); } diff --git a/src/devices/machine/pccard.h b/src/devices/machine/pccard.h index c223f0587b4..9e06018f005 100644 --- a/src/devices/machine/pccard.h +++ b/src/devices/machine/pccard.h @@ -9,10 +9,10 @@ class device_pccard_interface : public device_interface { public: - virtual DECLARE_READ16_MEMBER(read_memory); - virtual DECLARE_READ16_MEMBER(read_reg); - virtual DECLARE_WRITE16_MEMBER(write_memory); - virtual DECLARE_WRITE16_MEMBER(write_reg); + virtual uint16_t read_memory(offs_t offset, uint16_t mem_mask = ~0); + virtual uint16_t read_reg(offs_t offset, uint16_t mem_mask = ~0); + virtual void write_memory(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + virtual void write_reg(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); virtual ~device_pccard_interface() {} @@ -37,10 +37,10 @@ public: pccard_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); DECLARE_READ_LINE_MEMBER(read_line_inserted); - DECLARE_READ16_MEMBER(read_memory); - DECLARE_READ16_MEMBER(read_reg); - DECLARE_WRITE16_MEMBER(write_memory); - DECLARE_WRITE16_MEMBER(write_reg); + uint16_t read_memory(offs_t offset, uint16_t mem_mask = ~0); + uint16_t read_reg(offs_t offset, uint16_t mem_mask = ~0); + void write_memory(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void write_reg(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: virtual void device_start() override; diff --git a/src/devices/machine/pci-ide.cpp b/src/devices/machine/pci-ide.cpp index 1dbc2775ff8..fed9182e312 100644 --- a/src/devices/machine/pci-ide.cpp +++ b/src/devices/machine/pci-ide.cpp @@ -115,7 +115,7 @@ void ide_pci_device::device_reset() m_ide2->reset(); } -READ32_MEMBER(ide_pci_device::ide_read_cs1) +uint32_t ide_pci_device::ide_read_cs1(offs_t offset, uint32_t mem_mask) { // PCI offset starts at 0x3f4, idectrl expects 0x3f0 uint32_t data; @@ -125,13 +125,13 @@ READ32_MEMBER(ide_pci_device::ide_read_cs1) return data; } -WRITE32_MEMBER(ide_pci_device::ide_write_cs1) +void ide_pci_device::ide_write_cs1(offs_t offset, uint32_t data, uint32_t mem_mask) { // PCI offset starts at 0x3f4, idectrl expects 0x3f0 m_ide->write_cs1(1, data, mem_mask); } -READ32_MEMBER(ide_pci_device::ide2_read_cs1) +uint32_t ide_pci_device::ide2_read_cs1(offs_t offset, uint32_t mem_mask) { // PCI offset starts at 0x374, idectrl expects 0x370 uint32_t data; @@ -139,7 +139,7 @@ READ32_MEMBER(ide_pci_device::ide2_read_cs1) return data; } -WRITE32_MEMBER(ide_pci_device::ide2_write_cs1) +void ide_pci_device::ide2_write_cs1(offs_t offset, uint32_t data, uint32_t mem_mask) { // PCI offset starts at 0x374, idectrl expects 0x370 m_ide2->write_cs1(1, data, mem_mask); @@ -161,7 +161,7 @@ WRITE_LINE_MEMBER(ide_pci_device::ide_interrupt) logerror("%s:ide_interrupt set to %i\n", machine().describe_context(), state); } -WRITE8_MEMBER(ide_pci_device::prog_if_w) +void ide_pci_device::prog_if_w(uint8_t data) { uint32_t oldVal = pclass; pclass = (pclass & ~(0xff)) | (data & 0xff); @@ -170,35 +170,35 @@ WRITE8_MEMBER(ide_pci_device::prog_if_w) // Map Primary IDE Channel if (pclass & 0x1) { // PCI Mode - pci_device::address_base_w(space, 0, pci_bar[0]); - pci_device::address_base_w(space, 1, pci_bar[1]); + pci_device::address_base_w(0, pci_bar[0]); + pci_device::address_base_w(1, pci_bar[1]); } else { // Legacy Mode - pci_device::address_base_w(space, 0, (m_legacy_top << 20) | 0x1f0); - pci_device::address_base_w(space, 1, (m_legacy_top << 20) | 0x3f4); + pci_device::address_base_w(0, (m_legacy_top << 20) | 0x1f0); + pci_device::address_base_w(1, (m_legacy_top << 20) | 0x3f4); } // Map Primary IDE Channel if (pclass & 0x4) { // PCI Mode - pci_device::address_base_w(space, 2, pci_bar[2]); - pci_device::address_base_w(space, 3, pci_bar[3]); + pci_device::address_base_w(2, pci_bar[2]); + pci_device::address_base_w(3, pci_bar[3]); } else { // Legacy Mode - pci_device::address_base_w(space, 2, (m_legacy_top << 20) | 0x170); - pci_device::address_base_w(space, 3, (m_legacy_top << 20) | 0x374); + pci_device::address_base_w(2, (m_legacy_top << 20) | 0x170); + pci_device::address_base_w(3, (m_legacy_top << 20) | 0x374); } } if (1) logerror("%s:prog_if_w pclass = %06X\n", machine().describe_context(), pclass); } -READ32_MEMBER(ide_pci_device::pcictrl_r) +uint32_t ide_pci_device::pcictrl_r(offs_t offset) { return m_config_data[offset]; } -WRITE32_MEMBER(ide_pci_device::pcictrl_w) +void ide_pci_device::pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_config_data[offset]); // PCI646U2 Offset 0x50 is interrupt status @@ -209,7 +209,7 @@ WRITE32_MEMBER(ide_pci_device::pcictrl_w) } } -READ32_MEMBER(ide_pci_device::address_base_r) +uint32_t ide_pci_device::address_base_r(offs_t offset) { if (bank_reg_infos[offset].bank == -1) return 0; @@ -221,7 +221,7 @@ READ32_MEMBER(ide_pci_device::address_base_r) } -WRITE32_MEMBER(ide_pci_device::address_base_w) +void ide_pci_device::address_base_w(offs_t offset, uint32_t data) { // Save local copy of BAR pci_bar[offset] = data; @@ -229,20 +229,20 @@ WRITE32_MEMBER(ide_pci_device::address_base_w) switch (offset) { case 0: case 1: if (pclass & 0x1) - pci_device::address_base_w(space, offset, data); + pci_device::address_base_w(offset, data); break; case 2: case 3: if (pclass & 0x4) - pci_device::address_base_w(space, offset, data); + pci_device::address_base_w(offset, data); break; default: // Only the first 4 bars are controlled by pif - pci_device::address_base_w(space, offset, data); + pci_device::address_base_w(offset, data); } logerror("Mapping bar[%i] = %08x\n", offset, data); } -WRITE32_MEMBER(ide_pci_device::subsystem_id_w) +void ide_pci_device::subsystem_id_w(uint32_t data) { // Config register 0x4f enables subsystem id writing for CMD646 if (m_config_data[0xc / 4] & 0x01000000) diff --git a/src/devices/machine/pci-ide.h b/src/devices/machine/pci-ide.h index 0781afd404c..140db524f50 100644 --- a/src/devices/machine/pci-ide.h +++ b/src/devices/machine/pci-ide.h @@ -50,16 +50,16 @@ protected: private: DECLARE_WRITE_LINE_MEMBER(ide_interrupt); - DECLARE_WRITE8_MEMBER(prog_if_w); - DECLARE_READ32_MEMBER(pcictrl_r); - DECLARE_WRITE32_MEMBER(pcictrl_w); - DECLARE_READ32_MEMBER(address_base_r); - DECLARE_WRITE32_MEMBER(address_base_w); - DECLARE_WRITE32_MEMBER(subsystem_id_w); - DECLARE_READ32_MEMBER(ide_read_cs1); - DECLARE_WRITE32_MEMBER(ide_write_cs1); - DECLARE_READ32_MEMBER(ide2_read_cs1); - DECLARE_WRITE32_MEMBER(ide2_write_cs1); + void prog_if_w(uint8_t data); + uint32_t pcictrl_r(offs_t offset); + void pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t address_base_r(offs_t offset); + void address_base_w(offs_t offset, uint32_t data); + void subsystem_id_w(uint32_t data); + uint32_t ide_read_cs1(offs_t offset, uint32_t mem_mask = ~0); + void ide_write_cs1(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t ide2_read_cs1(offs_t offset, uint32_t mem_mask = ~0); + void ide2_write_cs1(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); required_device<bus_master_ide_controller_device> m_ide; required_device<bus_master_ide_controller_device> m_ide2; diff --git a/src/devices/machine/pci-smbus.cpp b/src/devices/machine/pci-smbus.cpp index 6888534613a..62a4f99cbb7 100644 --- a/src/devices/machine/pci-smbus.cpp +++ b/src/devices/machine/pci-smbus.cpp @@ -64,23 +64,23 @@ void smbus_device::device_reset() notify_dhigh = 0x00; } -READ8_MEMBER (smbus_device::hst_sts_r) +uint8_t smbus_device::hst_sts_r() { return hst_sts; } -WRITE8_MEMBER (smbus_device::hst_sts_w) +void smbus_device::hst_sts_w(uint8_t data) { hst_sts &= ~data; logerror("%s: hst_sts = %02x\n", tag(), hst_sts); } -READ8_MEMBER (smbus_device::hst_cnt_r) +uint8_t smbus_device::hst_cnt_r() { return hst_cnt; } -WRITE8_MEMBER (smbus_device::hst_cnt_w) +void smbus_device::hst_cnt_w(uint8_t data) { hst_cnt = data; logerror("%s: hst_cnt = %02x\n", tag(), hst_cnt); @@ -112,171 +112,171 @@ WRITE8_MEMBER (smbus_device::hst_cnt_w) } } -READ8_MEMBER (smbus_device::hst_cmd_r) +uint8_t smbus_device::hst_cmd_r() { return hst_cmd; } -WRITE8_MEMBER (smbus_device::hst_cmd_w) +void smbus_device::hst_cmd_w(uint8_t data) { hst_cmd = data; logerror("%s: hst_cmd = %02x\n", tag(), hst_cmd); } -READ8_MEMBER (smbus_device::xmit_slva_r) +uint8_t smbus_device::xmit_slva_r() { return xmit_slva; } -WRITE8_MEMBER (smbus_device::xmit_slva_w) +void smbus_device::xmit_slva_w(uint8_t data) { xmit_slva = data; logerror("%s: xmit_slva = %02x\n", tag(), xmit_slva); } -READ8_MEMBER (smbus_device::hst_d0_r) +uint8_t smbus_device::hst_d0_r() { return hst_d0; } -WRITE8_MEMBER (smbus_device::hst_d0_w) +void smbus_device::hst_d0_w(uint8_t data) { hst_d0 = data; logerror("%s: hst_d0 = %02x\n", tag(), hst_d0); } -READ8_MEMBER (smbus_device::hst_d1_r) +uint8_t smbus_device::hst_d1_r() { return hst_d1; } -WRITE8_MEMBER (smbus_device::hst_d1_w) +void smbus_device::hst_d1_w(uint8_t data) { hst_d1 = data; logerror("%s: hst_d1 = %02x\n", tag(), hst_d1); } -READ8_MEMBER (smbus_device::host_block_db_r) +uint8_t smbus_device::host_block_db_r() { return host_block_db; } -WRITE8_MEMBER (smbus_device::host_block_db_w) +void smbus_device::host_block_db_w(uint8_t data) { host_block_db = data; logerror("%s: host_block_db = %02x\n", tag(), host_block_db); } -READ8_MEMBER (smbus_device::pec_r) +uint8_t smbus_device::pec_r() { return pec; } -WRITE8_MEMBER (smbus_device::pec_w) +void smbus_device::pec_w(uint8_t data) { pec = data; logerror("%s: pec = %02x\n", tag(), pec); } -READ8_MEMBER (smbus_device::rcv_slva_r) +uint8_t smbus_device::rcv_slva_r() { return rcv_slva; } -WRITE8_MEMBER (smbus_device::rcv_slva_w) +void smbus_device::rcv_slva_w(uint8_t data) { rcv_slva = data; logerror("%s: rcv_slva = %02x\n", tag(), rcv_slva); } -READ16_MEMBER (smbus_device::slv_data_r) +uint16_t smbus_device::slv_data_r() { return slv_data; } -WRITE16_MEMBER(smbus_device::slv_data_w) +void smbus_device::slv_data_w(uint16_t data) { slv_data = data; logerror("%s: slv_data = %02x\n", tag(), slv_data); } -READ8_MEMBER (smbus_device::aux_sts_r) +uint8_t smbus_device::aux_sts_r() { return aux_sts; } -WRITE8_MEMBER (smbus_device::aux_sts_w) +void smbus_device::aux_sts_w(uint8_t data) { aux_sts = data; logerror("%s: aux_sts = %02x\n", tag(), aux_sts); } -READ8_MEMBER (smbus_device::aux_ctl_r) +uint8_t smbus_device::aux_ctl_r() { return aux_ctl; } -WRITE8_MEMBER (smbus_device::aux_ctl_w) +void smbus_device::aux_ctl_w(uint8_t data) { aux_ctl = data; logerror("%s: aux_ctl = %02x\n", tag(), aux_ctl); } -READ8_MEMBER (smbus_device::smlink_pin_ctl_r) +uint8_t smbus_device::smlink_pin_ctl_r() { return smlink_pin_ctl; } -WRITE8_MEMBER (smbus_device::smlink_pin_ctl_w) +void smbus_device::smlink_pin_ctl_w(uint8_t data) { smlink_pin_ctl = data; logerror("%s: smlink_pin_ctl = %02x\n", tag(), smlink_pin_ctl); } -READ8_MEMBER (smbus_device::smbus_pin_ctl_r) +uint8_t smbus_device::smbus_pin_ctl_r() { return smbus_pin_ctl; } -WRITE8_MEMBER (smbus_device::smbus_pin_ctl_w) +void smbus_device::smbus_pin_ctl_w(uint8_t data) { smbus_pin_ctl = data; logerror("%s: smbus_pin_ctl = %02x\n", tag(), smbus_pin_ctl); } -READ8_MEMBER (smbus_device::slv_sts_r) +uint8_t smbus_device::slv_sts_r() { return slv_sts; } -WRITE8_MEMBER (smbus_device::slv_sts_w) +void smbus_device::slv_sts_w(uint8_t data) { slv_sts = data; logerror("%s: slv_sts = %02x\n", tag(), slv_sts); } -READ8_MEMBER (smbus_device::slv_cmd_r) +uint8_t smbus_device::slv_cmd_r() { return slv_cmd; } -WRITE8_MEMBER (smbus_device::slv_cmd_w) +void smbus_device::slv_cmd_w(uint8_t data) { slv_cmd = data; logerror("%s: slv_cmd = %02x\n", tag(), slv_cmd); } -READ8_MEMBER (smbus_device::notify_daddr_r) +uint8_t smbus_device::notify_daddr_r() { return notify_daddr; } -READ8_MEMBER (smbus_device::notify_dlow_r) +uint8_t smbus_device::notify_dlow_r() { return notify_dlow; } -READ8_MEMBER (smbus_device::notify_dhigh_r) +uint8_t smbus_device::notify_dhigh_r() { return notify_dhigh; } diff --git a/src/devices/machine/pci-smbus.h b/src/devices/machine/pci-smbus.h index 53489efa4c7..9c7cd79aa74 100644 --- a/src/devices/machine/pci-smbus.h +++ b/src/devices/machine/pci-smbus.h @@ -21,41 +21,41 @@ protected: private: void map(address_map &map); - DECLARE_READ8_MEMBER (hst_sts_r); - DECLARE_WRITE8_MEMBER (hst_sts_w); - DECLARE_READ8_MEMBER (hst_cnt_r); - DECLARE_WRITE8_MEMBER (hst_cnt_w); - DECLARE_READ8_MEMBER (hst_cmd_r); - DECLARE_WRITE8_MEMBER (hst_cmd_w); - DECLARE_READ8_MEMBER (xmit_slva_r); - DECLARE_WRITE8_MEMBER (xmit_slva_w); - DECLARE_READ8_MEMBER (hst_d0_r); - DECLARE_WRITE8_MEMBER (hst_d0_w); - DECLARE_READ8_MEMBER (hst_d1_r); - DECLARE_WRITE8_MEMBER (hst_d1_w); - DECLARE_READ8_MEMBER (host_block_db_r); - DECLARE_WRITE8_MEMBER (host_block_db_w); - DECLARE_READ8_MEMBER (pec_r); - DECLARE_WRITE8_MEMBER (pec_w); - DECLARE_READ8_MEMBER (rcv_slva_r); - DECLARE_WRITE8_MEMBER (rcv_slva_w); - DECLARE_READ16_MEMBER (slv_data_r); - DECLARE_WRITE16_MEMBER(slv_data_w); - DECLARE_READ8_MEMBER (aux_sts_r); - DECLARE_WRITE8_MEMBER (aux_sts_w); - DECLARE_READ8_MEMBER (aux_ctl_r); - DECLARE_WRITE8_MEMBER (aux_ctl_w); - DECLARE_READ8_MEMBER (smlink_pin_ctl_r); - DECLARE_WRITE8_MEMBER (smlink_pin_ctl_w); - DECLARE_READ8_MEMBER (smbus_pin_ctl_r); - DECLARE_WRITE8_MEMBER (smbus_pin_ctl_w); - DECLARE_READ8_MEMBER (slv_sts_r); - DECLARE_WRITE8_MEMBER (slv_sts_w); - DECLARE_READ8_MEMBER (slv_cmd_r); - DECLARE_WRITE8_MEMBER (slv_cmd_w); - DECLARE_READ8_MEMBER (notify_daddr_r); - DECLARE_READ8_MEMBER (notify_dlow_r); - DECLARE_READ8_MEMBER (notify_dhigh_r); + uint8_t hst_sts_r(); + void hst_sts_w(uint8_t data); + uint8_t hst_cnt_r(); + void hst_cnt_w(uint8_t data); + uint8_t hst_cmd_r(); + void hst_cmd_w(uint8_t data); + uint8_t xmit_slva_r(); + void xmit_slva_w(uint8_t data); + uint8_t hst_d0_r(); + void hst_d0_w(uint8_t data); + uint8_t hst_d1_r(); + void hst_d1_w(uint8_t data); + uint8_t host_block_db_r(); + void host_block_db_w(uint8_t data); + uint8_t pec_r(); + void pec_w(uint8_t data); + uint8_t rcv_slva_r(); + void rcv_slva_w(uint8_t data); + uint16_t slv_data_r(); + void slv_data_w(uint16_t data); + uint8_t aux_sts_r(); + void aux_sts_w(uint8_t data); + uint8_t aux_ctl_r(); + void aux_ctl_w(uint8_t data); + uint8_t smlink_pin_ctl_r(); + void smlink_pin_ctl_w(uint8_t data); + uint8_t smbus_pin_ctl_r(); + void smbus_pin_ctl_w(uint8_t data); + uint8_t slv_sts_r(); + void slv_sts_w(uint8_t data); + uint8_t slv_cmd_r(); + void slv_cmd_w(uint8_t data); + uint8_t notify_daddr_r(); + uint8_t notify_dlow_r(); + uint8_t notify_dhigh_r(); uint16_t slv_data; diff --git a/src/devices/machine/pci.cpp b/src/devices/machine/pci.cpp index 289940d353a..55fdfcdfce9 100644 --- a/src/devices/machine/pci.cpp +++ b/src/devices/machine/pci.cpp @@ -129,21 +129,21 @@ void pci_device::unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask, int logerror("%s: unmapped write to %08x = %08x & %08x (%s)\n", machine().describe_context(), offset*4, data, mem_mask, bank_infos[bank].map.name()); } -READ32_MEMBER(pci_device::unmapped0_r) { return unmapped_r(offset, mem_mask, 0); } -WRITE32_MEMBER(pci_device::unmapped0_w) { return unmapped_w(offset, data, mem_mask, 0); } -READ32_MEMBER(pci_device::unmapped1_r) { return unmapped_r(offset, mem_mask, 1); } -WRITE32_MEMBER(pci_device::unmapped1_w) { return unmapped_w(offset, data, mem_mask, 1); } -READ32_MEMBER(pci_device::unmapped2_r) { return unmapped_r(offset, mem_mask, 2); } -WRITE32_MEMBER(pci_device::unmapped2_w) { return unmapped_w(offset, data, mem_mask, 2); } -READ32_MEMBER(pci_device::unmapped3_r) { return unmapped_r(offset, mem_mask, 3); } -WRITE32_MEMBER(pci_device::unmapped3_w) { return unmapped_w(offset, data, mem_mask, 3); } -READ32_MEMBER(pci_device::unmapped4_r) { return unmapped_r(offset, mem_mask, 4); } -WRITE32_MEMBER(pci_device::unmapped4_w) { return unmapped_w(offset, data, mem_mask, 4); } -READ32_MEMBER(pci_device::unmapped5_r) { return unmapped_r(offset, mem_mask, 5); } -WRITE32_MEMBER(pci_device::unmapped5_w) { return unmapped_w(offset, data, mem_mask, 5); } - - -READ32_MEMBER(pci_device::address_base_r) +uint32_t pci_device::unmapped0_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 0); } +void pci_device::unmapped0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 0); } +uint32_t pci_device::unmapped1_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 1); } +void pci_device::unmapped1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 1); } +uint32_t pci_device::unmapped2_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 2); } +void pci_device::unmapped2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 2); } +uint32_t pci_device::unmapped3_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 3); } +void pci_device::unmapped3_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 3); } +uint32_t pci_device::unmapped4_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 4); } +void pci_device::unmapped4_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 4); } +uint32_t pci_device::unmapped5_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 5); } +void pci_device::unmapped5_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 5); } + + +uint32_t pci_device::address_base_r(offs_t offset) { if(bank_reg_infos[offset].bank == -1) return 0; @@ -154,7 +154,7 @@ READ32_MEMBER(pci_device::address_base_r) return (bank_infos[bid].adr & ~(bank_infos[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0); } -WRITE32_MEMBER(pci_device::address_base_w) +void pci_device::address_base_w(offs_t offset, uint32_t data) { if(bank_reg_infos[offset].bank == -1) { logerror("write to address base (%d, %08x) not linked to any bank\n", offset, data); @@ -170,22 +170,22 @@ WRITE32_MEMBER(pci_device::address_base_w) remap_cb(); } -READ16_MEMBER(pci_device::vendor_r) +uint16_t pci_device::vendor_r() { return main_id >> 16; } -READ16_MEMBER(pci_device::device_r) +uint16_t pci_device::device_r() { return main_id; } -READ16_MEMBER(pci_device::command_r) +uint16_t pci_device::command_r() { return command; } -WRITE16_MEMBER(pci_device::command_w) +void pci_device::command_w(offs_t offset, uint16_t data, uint16_t mem_mask) { uint16_t old = command; @@ -196,22 +196,22 @@ WRITE16_MEMBER(pci_device::command_w) remap_cb(); } -READ16_MEMBER(pci_device::status_r) +uint16_t pci_device::status_r() { return status; } -READ32_MEMBER(pci_device::class_rev_r) +uint32_t pci_device::class_rev_r() { return (pclass << 8) | revision; } -READ8_MEMBER(pci_device::cache_line_size_r) +uint8_t pci_device::cache_line_size_r() { return 0x00; } -READ8_MEMBER(pci_device::latency_timer_r) +uint8_t pci_device::latency_timer_r() { return 0x00; } @@ -226,28 +226,28 @@ uint8_t pci_device::header_type_r() return is_multifunction_device ? 0x80 : 0x00; } -READ8_MEMBER(pci_device::bist_r) +uint8_t pci_device::bist_r() { return 0x00; } -READ16_MEMBER(pci_device::subvendor_r) +uint16_t pci_device::subvendor_r() { return subsystem_id >> 16; } -READ16_MEMBER(pci_device::subsystem_r) +uint16_t pci_device::subsystem_r() { return subsystem_id; } -READ32_MEMBER(pci_device::expansion_base_r) +uint32_t pci_device::expansion_base_r() { return expansion_rom_base; } -WRITE32_MEMBER(pci_device::expansion_base_w) +void pci_device::expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&expansion_rom_base); if(!expansion_rom_size) @@ -259,30 +259,30 @@ WRITE32_MEMBER(pci_device::expansion_base_w) remap_cb(); } -READ8_MEMBER(pci_device::capptr_r) +uint8_t pci_device::capptr_r() { return 0x00; } -READ8_MEMBER(pci_device::interrupt_line_r) +uint8_t pci_device::interrupt_line_r() { logerror("interrupt_line_r = %02x\n", intr_line); return intr_line; } -WRITE8_MEMBER(pci_device::interrupt_line_w) +void pci_device::interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask) { COMBINE_DATA(&intr_line); logerror("interrupt_line_w %02x\n", data); } -READ8_MEMBER(pci_device::interrupt_pin_r) +uint8_t pci_device::interrupt_pin_r() { logerror("interrupt_pin_r = %02x\n", intr_pin); return intr_pin; } -WRITE8_MEMBER(pci_device::interrupt_pin_w) +void pci_device::interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask) { COMBINE_DATA(&intr_pin); logerror("interrupt_pin_w = %02x\n", data); @@ -326,12 +326,12 @@ void pci_device::map_device(uint64_t memory_window_start, uint64_t memory_window } uint64_t end = start + bi.size-1; switch(i) { - case 0: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped0_r)), write32_delegate(*this, FUNC(pci_device::unmapped0_w))); break; - case 1: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped1_r)), write32_delegate(*this, FUNC(pci_device::unmapped1_w))); break; - case 2: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped2_r)), write32_delegate(*this, FUNC(pci_device::unmapped2_w))); break; - case 3: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped3_r)), write32_delegate(*this, FUNC(pci_device::unmapped3_w))); break; - case 4: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped4_r)), write32_delegate(*this, FUNC(pci_device::unmapped4_w))); break; - case 5: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped5_r)), write32_delegate(*this, FUNC(pci_device::unmapped5_w))); break; + case 0: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped0_r)), write32s_delegate(*this, FUNC(pci_device::unmapped0_w))); break; + case 1: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped1_r)), write32s_delegate(*this, FUNC(pci_device::unmapped1_w))); break; + case 2: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped2_r)), write32s_delegate(*this, FUNC(pci_device::unmapped2_w))); break; + case 3: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped3_r)), write32s_delegate(*this, FUNC(pci_device::unmapped3_w))); break; + case 4: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped4_r)), write32s_delegate(*this, FUNC(pci_device::unmapped4_w))); break; + case 5: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped5_r)), write32s_delegate(*this, FUNC(pci_device::unmapped5_w))); break; } space->install_device_delegate(start, end, *bi.device, bi.map); @@ -629,191 +629,191 @@ void pci_bridge_device::config_write(uint8_t bus, uint8_t device, uint16_t reg, propagate_config_write(bus, device, reg, data, mem_mask); } -READ32_MEMBER (pci_bridge_device::b_address_base_r) +uint32_t pci_bridge_device::b_address_base_r(offs_t offset) { logerror("b_address_base_r %d\n", offset); return 0xffffffff; } -WRITE32_MEMBER(pci_bridge_device::b_address_base_w) +void pci_bridge_device::b_address_base_w(offs_t offset, uint32_t data) { logerror("b_address_base_w %d, %08x\n", offset, data); } -READ8_MEMBER (pci_bridge_device::primary_bus_r) +uint8_t pci_bridge_device::primary_bus_r() { logerror("primary_bus_r\n"); return primary_bus; } -WRITE8_MEMBER (pci_bridge_device::primary_bus_w) +void pci_bridge_device::primary_bus_w(uint8_t data) { primary_bus = data; logerror("primary_bus_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::secondary_bus_r) +uint8_t pci_bridge_device::secondary_bus_r() { logerror("secondary_bus_r\n"); return secondary_bus; } -WRITE8_MEMBER (pci_bridge_device::secondary_bus_w) +void pci_bridge_device::secondary_bus_w(uint8_t data) { secondary_bus = data; logerror("secondary_bus_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::subordinate_bus_r) +uint8_t pci_bridge_device::subordinate_bus_r() { logerror("subordinate_bus_r\n"); return subordinate_bus; } -WRITE8_MEMBER (pci_bridge_device::subordinate_bus_w) +void pci_bridge_device::subordinate_bus_w(uint8_t data) { subordinate_bus = data; logerror("subordinate_bus_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::secondary_latency_r) +uint8_t pci_bridge_device::secondary_latency_r() { logerror("secondary_latency_r\n"); return 0xff; } -WRITE8_MEMBER (pci_bridge_device::secondary_latency_w) +void pci_bridge_device::secondary_latency_w(uint8_t data) { logerror("secondary_latency_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::iobase_r) +uint8_t pci_bridge_device::iobase_r() { return iobase; } -WRITE8_MEMBER (pci_bridge_device::iobase_w) +void pci_bridge_device::iobase_w(uint8_t data) { iobase = data; logerror("iobase_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::iolimit_r) +uint8_t pci_bridge_device::iolimit_r() { return iolimit; } -WRITE8_MEMBER (pci_bridge_device::iolimit_w) +void pci_bridge_device::iolimit_w(uint8_t data) { iolimit = data; logerror("iolimit_w %02x\n", data); } -READ16_MEMBER (pci_bridge_device::secondary_status_r) +uint16_t pci_bridge_device::secondary_status_r() { logerror("secondary_status_r\n"); return 0xffff; } -WRITE16_MEMBER(pci_bridge_device::secondary_status_w) +void pci_bridge_device::secondary_status_w(uint16_t data) { logerror("secondary_status_w %04x\n", data); } -READ16_MEMBER (pci_bridge_device::memory_base_r) +uint16_t pci_bridge_device::memory_base_r() { return memory_base; } -WRITE16_MEMBER(pci_bridge_device::memory_base_w) +void pci_bridge_device::memory_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&memory_base); logerror("memory_base_w %04x\n", memory_base); } -READ16_MEMBER (pci_bridge_device::memory_limit_r) +uint16_t pci_bridge_device::memory_limit_r() { return memory_limit; } -WRITE16_MEMBER(pci_bridge_device::memory_limit_w) +void pci_bridge_device::memory_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&memory_limit); logerror("memory_limit_w %04x\n", memory_limit); } -READ16_MEMBER (pci_bridge_device::prefetch_base_r) +uint16_t pci_bridge_device::prefetch_base_r() { return prefetch_base; } -WRITE16_MEMBER(pci_bridge_device::prefetch_base_w) +void pci_bridge_device::prefetch_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&prefetch_base); logerror("prefetch_base_w %04x\n", prefetch_base); } -READ16_MEMBER (pci_bridge_device::prefetch_limit_r) +uint16_t pci_bridge_device::prefetch_limit_r() { return prefetch_limit; } -WRITE16_MEMBER(pci_bridge_device::prefetch_limit_w) +void pci_bridge_device::prefetch_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&prefetch_limit); logerror("prefetch_limit_w %04x\n", prefetch_limit); } -READ32_MEMBER (pci_bridge_device::prefetch_baseu_r) +uint32_t pci_bridge_device::prefetch_baseu_r() { return prefetch_baseu; } -WRITE32_MEMBER(pci_bridge_device::prefetch_baseu_w) +void pci_bridge_device::prefetch_baseu_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&prefetch_baseu); logerror("prefetch_baseu_w %08x\n", prefetch_baseu); } -READ32_MEMBER (pci_bridge_device::prefetch_limitu_r) +uint32_t pci_bridge_device::prefetch_limitu_r() { return prefetch_limitu; } -WRITE32_MEMBER(pci_bridge_device::prefetch_limitu_w) +void pci_bridge_device::prefetch_limitu_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&prefetch_limitu); logerror("prefetch_limitu_w %08x\n", prefetch_limitu); } -READ16_MEMBER (pci_bridge_device::iobaseu_r) +uint16_t pci_bridge_device::iobaseu_r() { return iobaseu; } -WRITE16_MEMBER(pci_bridge_device::iobaseu_w) +void pci_bridge_device::iobaseu_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&iobaseu); logerror("iobaseu_w %04x\n", iobaseu); } -READ16_MEMBER (pci_bridge_device::iolimitu_r) +uint16_t pci_bridge_device::iolimitu_r() { return iolimitu; } -WRITE16_MEMBER(pci_bridge_device::iolimitu_w) +void pci_bridge_device::iolimitu_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&iolimitu); logerror("iolimitu_w %04x\n", iolimitu); } -READ16_MEMBER (pci_bridge_device::bridge_control_r) +uint16_t pci_bridge_device::bridge_control_r() { return bridge_control; } -WRITE16_MEMBER(pci_bridge_device::bridge_control_w) +void pci_bridge_device::bridge_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&bridge_control); logerror("bridge_control_w %04x\n", bridge_control); @@ -888,22 +888,22 @@ void pci_host_device::regenerate_mapping() io_window_start, io_window_end, io_offset, io_space); } -READ32_MEMBER(pci_host_device::config_address_r) +uint32_t pci_host_device::config_address_r() { return config_address; } -WRITE32_MEMBER(pci_host_device::config_address_w) +void pci_host_device::config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&config_address); } -READ32_MEMBER(pci_host_device::config_data_r) +uint32_t pci_host_device::config_data_r(offs_t offset, uint32_t mem_mask) { return config_address & 0x80000000 ? root_config_read((config_address >> 16) & 0xff, (config_address >> 8) & 0xff, config_address & 0xfc, mem_mask) : 0xffffffff; } -WRITE32_MEMBER(pci_host_device::config_data_w) +void pci_host_device::config_data_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if(config_address & 0x80000000) root_config_write((config_address >> 16) & 0xff, (config_address >> 8) & 0xff, config_address & 0xfc, data, mem_mask); diff --git a/src/devices/machine/pci.h b/src/devices/machine/pci.h index 9eeb3582dc0..37ad677a476 100644 --- a/src/devices/machine/pci.h +++ b/src/devices/machine/pci.h @@ -35,41 +35,41 @@ public: uint32_t unmapped_r(offs_t offset, uint32_t mem_mask, int bank); void unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask, int bank); - READ32_MEMBER (unmapped0_r); - WRITE32_MEMBER(unmapped0_w); - READ32_MEMBER (unmapped1_r); - WRITE32_MEMBER(unmapped1_w); - READ32_MEMBER (unmapped2_r); - WRITE32_MEMBER(unmapped2_w); - READ32_MEMBER (unmapped3_r); - WRITE32_MEMBER(unmapped3_w); - READ32_MEMBER (unmapped4_r); - WRITE32_MEMBER(unmapped4_w); - READ32_MEMBER (unmapped5_r); - WRITE32_MEMBER(unmapped5_w); - - - DECLARE_READ16_MEMBER(vendor_r); - DECLARE_READ16_MEMBER(device_r); - DECLARE_READ16_MEMBER(command_r); - DECLARE_WRITE16_MEMBER(command_w); - DECLARE_READ16_MEMBER(status_r); - DECLARE_READ32_MEMBER(class_rev_r); - virtual DECLARE_READ8_MEMBER(cache_line_size_r); - virtual DECLARE_READ8_MEMBER(latency_timer_r); + uint32_t unmapped0_r(offs_t offset, uint32_t mem_mask = ~0); + void unmapped0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t unmapped1_r(offs_t offset, uint32_t mem_mask = ~0); + void unmapped1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t unmapped2_r(offs_t offset, uint32_t mem_mask = ~0); + void unmapped2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t unmapped3_r(offs_t offset, uint32_t mem_mask = ~0); + void unmapped3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t unmapped4_r(offs_t offset, uint32_t mem_mask = ~0); + void unmapped4_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t unmapped5_r(offs_t offset, uint32_t mem_mask = ~0); + void unmapped5_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + + + uint16_t vendor_r(); + uint16_t device_r(); + uint16_t command_r(); + void command_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t status_r(); + uint32_t class_rev_r(); + virtual uint8_t cache_line_size_r(); + virtual uint8_t latency_timer_r(); virtual uint8_t header_type_r(); - virtual DECLARE_READ8_MEMBER(bist_r); - DECLARE_READ32_MEMBER(address_base_r); - DECLARE_WRITE32_MEMBER(address_base_w); - DECLARE_READ16_MEMBER(subvendor_r); - DECLARE_READ16_MEMBER(subsystem_r); - DECLARE_READ32_MEMBER (expansion_base_r); - DECLARE_WRITE32_MEMBER(expansion_base_w); - virtual DECLARE_READ8_MEMBER(capptr_r); - DECLARE_READ8_MEMBER(interrupt_line_r); - DECLARE_WRITE8_MEMBER(interrupt_line_w); - DECLARE_READ8_MEMBER(interrupt_pin_r); - DECLARE_WRITE8_MEMBER(interrupt_pin_w); + virtual uint8_t bist_r(); + uint32_t address_base_r(offs_t offset); + void address_base_w(offs_t offset, uint32_t data); + uint16_t subvendor_r(); + uint16_t subsystem_r(); + uint32_t expansion_base_r(); + void expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + virtual uint8_t capptr_r(); + uint8_t interrupt_line_r(); + void interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint8_t interrupt_pin_r(); + void interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); protected: pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -156,40 +156,40 @@ public: virtual void config_map(address_map &map) override; - DECLARE_READ32_MEMBER (b_address_base_r); - DECLARE_WRITE32_MEMBER(b_address_base_w); - DECLARE_READ8_MEMBER (primary_bus_r); - DECLARE_WRITE8_MEMBER (primary_bus_w); - DECLARE_READ8_MEMBER (secondary_bus_r); - DECLARE_WRITE8_MEMBER (secondary_bus_w); - DECLARE_READ8_MEMBER (subordinate_bus_r); - DECLARE_WRITE8_MEMBER (subordinate_bus_w); - DECLARE_READ8_MEMBER (secondary_latency_r); - DECLARE_WRITE8_MEMBER (secondary_latency_w); - DECLARE_READ8_MEMBER (iobase_r); - DECLARE_WRITE8_MEMBER (iobase_w); - DECLARE_READ8_MEMBER (iolimit_r); - DECLARE_WRITE8_MEMBER (iolimit_w); - DECLARE_READ16_MEMBER (secondary_status_r); - DECLARE_WRITE16_MEMBER(secondary_status_w); - DECLARE_READ16_MEMBER (memory_base_r); - DECLARE_WRITE16_MEMBER(memory_base_w); - DECLARE_READ16_MEMBER (memory_limit_r); - DECLARE_WRITE16_MEMBER(memory_limit_w); - DECLARE_READ16_MEMBER (prefetch_base_r); - DECLARE_WRITE16_MEMBER(prefetch_base_w); - DECLARE_READ16_MEMBER (prefetch_limit_r); - DECLARE_WRITE16_MEMBER(prefetch_limit_w); - DECLARE_READ32_MEMBER (prefetch_baseu_r); - DECLARE_WRITE32_MEMBER(prefetch_baseu_w); - DECLARE_READ32_MEMBER (prefetch_limitu_r); - DECLARE_WRITE32_MEMBER(prefetch_limitu_w); - DECLARE_READ16_MEMBER (iobaseu_r); - DECLARE_WRITE16_MEMBER(iobaseu_w); - DECLARE_READ16_MEMBER (iolimitu_r); - DECLARE_WRITE16_MEMBER(iolimitu_w); - DECLARE_READ16_MEMBER (bridge_control_r); - DECLARE_WRITE16_MEMBER(bridge_control_w); + uint32_t b_address_base_r(offs_t offset); + void b_address_base_w(offs_t offset, uint32_t data); + uint8_t primary_bus_r(); + void primary_bus_w(uint8_t data); + uint8_t secondary_bus_r(); + void secondary_bus_w(uint8_t data); + uint8_t subordinate_bus_r(); + void subordinate_bus_w(uint8_t data); + uint8_t secondary_latency_r(); + void secondary_latency_w(uint8_t data); + uint8_t iobase_r(); + void iobase_w(uint8_t data); + uint8_t iolimit_r(); + void iolimit_w(uint8_t data); + uint16_t secondary_status_r(); + void secondary_status_w(uint16_t data); + uint16_t memory_base_r(); + void memory_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t memory_limit_r(); + void memory_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t prefetch_base_r(); + void prefetch_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t prefetch_limit_r(); + void prefetch_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t prefetch_baseu_r(); + void prefetch_baseu_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t prefetch_limitu_r(); + void prefetch_limitu_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t iobaseu_r(); + void iobaseu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t iolimitu_r(); + void iolimitu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t bridge_control_r(); + void bridge_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: enum @@ -240,10 +240,10 @@ public: protected: pci_host_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ32_MEMBER(config_address_r); - DECLARE_WRITE32_MEMBER(config_address_w); - DECLARE_READ32_MEMBER(config_data_r); - DECLARE_WRITE32_MEMBER(config_data_w); + uint32_t config_address_r(); + void config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t config_data_r(offs_t offset, uint32_t mem_mask = ~0); + void config_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); virtual void device_start() override; virtual void device_reset() override; diff --git a/src/devices/machine/pci9050.cpp b/src/devices/machine/pci9050.cpp index e65434d3f5a..9f5c63c621e 100644 --- a/src/devices/machine/pci9050.cpp +++ b/src/devices/machine/pci9050.cpp @@ -168,104 +168,104 @@ void pci9050_device::remap_rom() } } -READ32_MEMBER (pci9050_device::lasrr_r) +uint32_t pci9050_device::lasrr_r(offs_t offset) { return m_lasrr[offset]; } -WRITE32_MEMBER(pci9050_device::lasrr_w) +void pci9050_device::lasrr_w(offs_t offset, uint32_t data) { logerror("%s:PCI9050 local bus %d range = %08x: %s flags %d pf %d addr bits 27-4 %08x\n", machine().describe_context(), offset, data, (data & 1) ? "I/O" : "MEM", (data & 6)>>1, (data & 8)>>3, data & 0xfffffff); m_lasrr[offset] = data; remap_local(offset); } -READ32_MEMBER (pci9050_device::eromrr_r) +uint32_t pci9050_device::eromrr_r() { return m_eromrr; } -WRITE32_MEMBER(pci9050_device::eromrr_w) +void pci9050_device::eromrr_w(uint32_t data) { logerror("%s:PCI9050 ROM range = %08x: addr bits 27-11 %08x\n", machine().describe_context(), data, data & 0xfffff800); m_eromrr = data; remap_rom(); } -READ32_MEMBER (pci9050_device::lasba_r) +uint32_t pci9050_device::lasba_r(offs_t offset) { return m_lasba[offset]; } -WRITE32_MEMBER(pci9050_device::lasba_w) +void pci9050_device::lasba_w(offs_t offset, uint32_t data) { logerror("%s:PCI9050 local bus %d base = %08x: enable %d remap %08x\n", machine().describe_context(), offset, data, data&1, data & 0x0ffffffe); m_lasba[offset] = data; remap_local(offset); } -READ32_MEMBER (pci9050_device::eromba_r) +uint32_t pci9050_device::eromba_r() { return m_eromba; } -WRITE32_MEMBER(pci9050_device::eromba_w) +void pci9050_device::eromba_w(uint32_t data) { logerror("%s:PCI9050 ROM base = %08x: remap %08x\n", machine().describe_context(), data, data & 0x0ffff800); m_eromba = data; remap_rom(); } -READ32_MEMBER (pci9050_device::lasbrd_r) +uint32_t pci9050_device::lasbrd_r(offs_t offset) { return m_lasbrd[offset]; } -WRITE32_MEMBER(pci9050_device::lasbrd_w) +void pci9050_device::lasbrd_w(offs_t offset, uint32_t data) { logerror("%s:PCI9050 local bus %d descriptors = %08x: burst %d prefetch %d width %d, endian %s, endian mode %d\n", machine().describe_context(), offset, data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); m_lasbrd[offset] = data; remap_local(offset); } -READ32_MEMBER (pci9050_device::erombrd_r) +uint32_t pci9050_device::erombrd_r() { return m_erombrd; } -WRITE32_MEMBER(pci9050_device::erombrd_w) +void pci9050_device::erombrd_w(uint32_t data) { logerror("%s:PCI9050 ROM descriptors = %08x: burst %d prefetch %d bits %d, endian %s, endian mode %d\n", machine().describe_context(), data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); m_erombrd = data; remap_rom(); } -READ32_MEMBER (pci9050_device::csbase_r) +uint32_t pci9050_device::csbase_r(offs_t offset) { return m_csbase[offset]; } -WRITE32_MEMBER(pci9050_device::csbase_w) +void pci9050_device::csbase_w(offs_t offset, uint32_t data) { logerror("%s:PCI9050 chip select %d base = %08x: enable %d size %08x\n", machine().describe_context(), offset, data, data&1, data&0xfffffffe); m_csbase[offset] = data; remap_local(offset); } -READ32_MEMBER (pci9050_device::intcsr_r) +uint32_t pci9050_device::intcsr_r() { logerror("%s:PCI9050 IRQ CSR read %08x\n", machine().describe_context(), m_intcsr); return m_intcsr; } -WRITE32_MEMBER(pci9050_device::intcsr_w) +void pci9050_device::intcsr_w(uint32_t data) { logerror("%s:PCI9050 IRQ CSR write %08x\n", machine().describe_context(), data); m_intcsr = data; remap_rom(); } -READ32_MEMBER (pci9050_device::cntrl_r) +uint32_t pci9050_device::cntrl_r() { if (!m_user_input_handler.isnull()) { @@ -279,7 +279,7 @@ READ32_MEMBER (pci9050_device::cntrl_r) return m_cntrl; } -WRITE32_MEMBER(pci9050_device::cntrl_w) +void pci9050_device::cntrl_w(uint32_t data) { if (0) logerror("%s:PCI9050 CNTRL write %08x\n", machine().describe_context(), data); diff --git a/src/devices/machine/pci9050.h b/src/devices/machine/pci9050.h index 03bbde058ab..e4a9db67693 100644 --- a/src/devices/machine/pci9050.h +++ b/src/devices/machine/pci9050.h @@ -34,24 +34,24 @@ private: void map(address_map &map); // PCI9050 I/O register space handlers - DECLARE_READ32_MEMBER( lasrr_r ); - DECLARE_WRITE32_MEMBER(lasrr_w ); - DECLARE_READ32_MEMBER( eromrr_r ); - DECLARE_WRITE32_MEMBER(eromrr_w ); - DECLARE_READ32_MEMBER( lasba_r ); - DECLARE_WRITE32_MEMBER(lasba_w ); - DECLARE_READ32_MEMBER( eromba_r ); - DECLARE_WRITE32_MEMBER(eromba_w ); - DECLARE_READ32_MEMBER( lasbrd_r ); - DECLARE_WRITE32_MEMBER(lasbrd_w ); - DECLARE_READ32_MEMBER( erombrd_r); - DECLARE_WRITE32_MEMBER(erombrd_w); - DECLARE_READ32_MEMBER( csbase_r ); - DECLARE_WRITE32_MEMBER(csbase_w ); - DECLARE_READ32_MEMBER( intcsr_r ); - DECLARE_WRITE32_MEMBER(intcsr_w ); - DECLARE_READ32_MEMBER( cntrl_r ); - DECLARE_WRITE32_MEMBER(cntrl_w ); + uint32_t lasrr_r(offs_t offset); + void lasrr_w(offs_t offset, uint32_t data); + uint32_t eromrr_r(); + void eromrr_w(uint32_t data); + uint32_t lasba_r(offs_t offset); + void lasba_w(offs_t offset, uint32_t data); + uint32_t eromba_r(); + void eromba_w(uint32_t data); + uint32_t lasbrd_r(offs_t offset); + void lasbrd_w(offs_t offset, uint32_t data); + uint32_t erombrd_r(); + void erombrd_w(uint32_t data); + uint32_t csbase_r(offs_t offset); + void csbase_w(offs_t offset, uint32_t data); + uint32_t intcsr_r(); + void intcsr_w(uint32_t data); + uint32_t cntrl_r(); + void cntrl_w(uint32_t data); const char *m_names[4]; device_t *m_devices[4]; diff --git a/src/devices/machine/ps2dma.cpp b/src/devices/machine/ps2dma.cpp index d0779ca7686..5699d554247 100644 --- a/src/devices/machine/ps2dma.cpp +++ b/src/devices/machine/ps2dma.cpp @@ -370,7 +370,7 @@ void ps2_dmac_device::update_interrupts() m_ee->set_input_line(MIPS3_IRQ1, (m_istat & m_imask) ? ASSERT_LINE : CLEAR_LINE); } -READ32_MEMBER(ps2_dmac_device::read) +uint32_t ps2_dmac_device::read(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -405,7 +405,7 @@ READ32_MEMBER(ps2_dmac_device::read) return ret; } -WRITE32_MEMBER(ps2_dmac_device::write) +void ps2_dmac_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { @@ -443,7 +443,7 @@ WRITE32_MEMBER(ps2_dmac_device::write) } } -READ32_MEMBER(ps2_dmac_device::channel_r) +uint32_t ps2_dmac_device::channel_r(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset + 0x8000/8) @@ -602,7 +602,7 @@ READ32_MEMBER(ps2_dmac_device::channel_r) return ret; } -WRITE32_MEMBER(ps2_dmac_device::channel_w) +void ps2_dmac_device::channel_w(offs_t offset, uint32_t data, uint32_t mem_mask) { static char const *const mode_strings[4] = { "Normal", "Chain", "Interleave", "Undefined" }; @@ -765,14 +765,14 @@ WRITE32_MEMBER(ps2_dmac_device::channel_w) } } -READ32_MEMBER(ps2_dmac_device::disable_mask_r) +uint32_t ps2_dmac_device::disable_mask_r(offs_t offset, uint32_t mem_mask) { uint32_t ret = m_disable_mask; logerror("%s: m_disable_mask = %08x & %08x\n", machine().describe_context(), ret, mem_mask); return ret; } -WRITE32_MEMBER(ps2_dmac_device::disable_mask_w) +void ps2_dmac_device::disable_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask) { logerror("%s: m_disable_mask = %08x & %08x\n", machine().describe_context(), data, mem_mask); m_disable_mask = data; diff --git a/src/devices/machine/ps2dma.h b/src/devices/machine/ps2dma.h index 10470fd52fa..b602999de28 100644 --- a/src/devices/machine/ps2dma.h +++ b/src/devices/machine/ps2dma.h @@ -49,13 +49,13 @@ public: SPR_IN }; - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); - DECLARE_READ32_MEMBER(channel_r); - DECLARE_WRITE32_MEMBER(channel_w); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t channel_r(offs_t offset, uint32_t mem_mask = ~0); + void channel_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER(disable_mask_r); - DECLARE_WRITE32_MEMBER(disable_mask_w); + uint32_t disable_mask_r(offs_t offset, uint32_t mem_mask = ~0); + void disable_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: virtual void device_start() override; diff --git a/src/devices/machine/ps2intc.cpp b/src/devices/machine/ps2intc.cpp index f9053f60d2d..10b6602606e 100644 --- a/src/devices/machine/ps2intc.cpp +++ b/src/devices/machine/ps2intc.cpp @@ -36,7 +36,7 @@ void ps2_intc_device::device_reset() m_mask = 0; } -READ32_MEMBER(ps2_intc_device::read) +uint32_t ps2_intc_device::read(offs_t offset, uint32_t mem_mask) { switch (offset) { @@ -52,7 +52,7 @@ READ32_MEMBER(ps2_intc_device::read) } } -WRITE32_MEMBER(ps2_intc_device::write) +void ps2_intc_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/ps2intc.h b/src/devices/machine/ps2intc.h index f6ec945741e..111c343372f 100644 --- a/src/devices/machine/ps2intc.h +++ b/src/devices/machine/ps2intc.h @@ -31,8 +31,8 @@ public: ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~ps2_intc_device() override; - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void raise_interrupt(uint32_t line); diff --git a/src/devices/machine/ps2sif.cpp b/src/devices/machine/ps2sif.cpp index a9dd7717b49..b6fd6d5cfe7 100644 --- a/src/devices/machine/ps2sif.cpp +++ b/src/devices/machine/ps2sif.cpp @@ -52,7 +52,7 @@ void ps2_sif_device::device_reset() m_fifo_curr[1] = 0; } -READ32_MEMBER(ps2_sif_device::ee_r) +uint32_t ps2_sif_device::ee_r(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -85,7 +85,7 @@ READ32_MEMBER(ps2_sif_device::ee_r) return ret; } -WRITE32_MEMBER(ps2_sif_device::ee_w) +void ps2_sif_device::ee_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { @@ -115,7 +115,7 @@ WRITE32_MEMBER(ps2_sif_device::ee_w) } } -READ32_MEMBER(ps2_sif_device::iop_r) +uint32_t ps2_sif_device::iop_r(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -148,7 +148,7 @@ READ32_MEMBER(ps2_sif_device::iop_r) return ret; } -WRITE32_MEMBER(ps2_sif_device::iop_w) +void ps2_sif_device::iop_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/ps2sif.h b/src/devices/machine/ps2sif.h index 27850ff2bcb..83fe5f4a076 100644 --- a/src/devices/machine/ps2sif.h +++ b/src/devices/machine/ps2sif.h @@ -29,10 +29,10 @@ public: ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~ps2_sif_device() override; - DECLARE_READ32_MEMBER(ee_r); - DECLARE_WRITE32_MEMBER(ee_w); - DECLARE_READ32_MEMBER(iop_r); - DECLARE_WRITE32_MEMBER(iop_w); + uint32_t ee_r(offs_t offset, uint32_t mem_mask = ~0); + void ee_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t iop_r(offs_t offset, uint32_t mem_mask = ~0); + void iop_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint32_t fifo_depth(uint32_t channel); void fifo_push(uint32_t channel, uint32_t value); diff --git a/src/devices/machine/ps2timer.cpp b/src/devices/machine/ps2timer.cpp index 1ceb1a6257b..2f7111b1a22 100644 --- a/src/devices/machine/ps2timer.cpp +++ b/src/devices/machine/ps2timer.cpp @@ -190,7 +190,7 @@ TIMER_CALLBACK_MEMBER(ps2_timer_device::overflow) { } -READ32_MEMBER(ps2_timer_device::read) +uint32_t ps2_timer_device::read(offs_t offset, uint32_t mem_mask) { uint32_t ret = 0; switch (offset) @@ -226,7 +226,7 @@ READ32_MEMBER(ps2_timer_device::read) return ret; } -WRITE32_MEMBER(ps2_timer_device::write) +void ps2_timer_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (offset) { diff --git a/src/devices/machine/ps2timer.h b/src/devices/machine/ps2timer.h index c412745b6ad..f7cd398f938 100644 --- a/src/devices/machine/ps2timer.h +++ b/src/devices/machine/ps2timer.h @@ -25,8 +25,8 @@ public: ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ32_MEMBER(read); - DECLARE_WRITE32_MEMBER(write); + uint32_t read(offs_t offset, uint32_t mem_mask = ~0); + void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: enum timer_mode_mask : uint32_t diff --git a/src/devices/machine/pxa255.cpp b/src/devices/machine/pxa255.cpp index 54fdade2f83..4c6c750afd3 100644 --- a/src/devices/machine/pxa255.cpp +++ b/src/devices/machine/pxa255.cpp @@ -52,7 +52,7 @@ pxa255_periphs_device::pxa255_periphs_device(const machine_config &mconfig, cons */ -READ32_MEMBER(pxa255_periphs_device::i2s_r) +uint32_t pxa255_periphs_device::i2s_r(offs_t offset, uint32_t mem_mask) { switch(PXA255_I2S_BASE_ADDR | (offset << 2)) { @@ -84,7 +84,7 @@ READ32_MEMBER(pxa255_periphs_device::i2s_r) return 0; } -WRITE32_MEMBER(pxa255_periphs_device::i2s_w) +void pxa255_periphs_device::i2s_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch(PXA255_I2S_BASE_ADDR | (offset << 2)) { @@ -307,7 +307,7 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::dma_dma_end) dma_irq_check(); } -READ32_MEMBER(pxa255_periphs_device::dma_r) +uint32_t pxa255_periphs_device::dma_r(offs_t offset, uint32_t mem_mask) { switch(PXA255_DMA_BASE_ADDR | (offset << 2)) { @@ -363,7 +363,7 @@ READ32_MEMBER(pxa255_periphs_device::dma_r) return 0; } -WRITE32_MEMBER(pxa255_periphs_device::dma_w) +void pxa255_periphs_device::dma_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (PXA255_DMA_BASE_ADDR | (offset << 2)) { @@ -467,7 +467,7 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::ostimer_match) ostimer_irq_check(); } -READ32_MEMBER(pxa255_periphs_device::ostimer_r) +uint32_t pxa255_periphs_device::ostimer_r(offs_t offset, uint32_t mem_mask) { switch(PXA255_OSTMR_BASE_ADDR | (offset << 2)) { @@ -504,7 +504,7 @@ READ32_MEMBER(pxa255_periphs_device::ostimer_r) return 0; } -WRITE32_MEMBER(pxa255_periphs_device::ostimer_w) +void pxa255_periphs_device::ostimer_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch(PXA255_OSTMR_BASE_ADDR | (offset << 2)) { @@ -595,7 +595,7 @@ void pxa255_periphs_device::set_irq_line(uint32_t line, int irq_state) update_interrupts(); } -READ32_MEMBER(pxa255_periphs_device::intc_r) +uint32_t pxa255_periphs_device::intc_r(offs_t offset, uint32_t mem_mask) { switch (PXA255_INTC_BASE_ADDR | (offset << 2)) { @@ -624,7 +624,7 @@ READ32_MEMBER(pxa255_periphs_device::intc_r) return 0; } -WRITE32_MEMBER(pxa255_periphs_device::intc_w) +void pxa255_periphs_device::intc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch (PXA255_INTC_BASE_ADDR | (offset << 2)) { @@ -663,7 +663,7 @@ WRITE32_MEMBER(pxa255_periphs_device::intc_w) */ -READ32_MEMBER(pxa255_periphs_device::gpio_r) +uint32_t pxa255_periphs_device::gpio_r(offs_t offset, uint32_t mem_mask) { switch(PXA255_GPIO_BASE_ADDR | (offset << 2)) { @@ -764,7 +764,7 @@ READ32_MEMBER(pxa255_periphs_device::gpio_r) return 0; } -WRITE32_MEMBER(pxa255_periphs_device::gpio_w) +void pxa255_periphs_device::gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask) { switch(PXA255_GPIO_BASE_ADDR | (offset << 2)) { @@ -999,7 +999,7 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::lcd_dma_eof) lcd_irq_check(); } -READ32_MEMBER(pxa255_periphs_device::lcd_r) +uint32_t pxa255_periphs_device::lcd_r(offs_t offset, uint32_t mem_mask) { switch(PXA255_LCD_BASE_ADDR | (offset << 2)) { @@ -1064,7 +1064,7 @@ READ32_MEMBER(pxa255_periphs_device::lcd_r) return 0; } -WRITE32_MEMBER(pxa255_periphs_device::lcd_w) +void pxa255_periphs_device::lcd_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask) { switch(PXA255_LCD_BASE_ADDR | (offset << 2)) { diff --git a/src/devices/machine/pxa255.h b/src/devices/machine/pxa255.h index 77801e64cde..8f1e90544fe 100644 --- a/src/devices/machine/pxa255.h +++ b/src/devices/machine/pxa255.h @@ -37,18 +37,18 @@ public: auto gpio0_write() { return m_gpio0_w.bind(); } auto gpio0_read() { return m_gpio0_r.bind(); } - DECLARE_READ32_MEMBER(i2s_r); - DECLARE_WRITE32_MEMBER(i2s_w); - DECLARE_READ32_MEMBER(dma_r); - DECLARE_WRITE32_MEMBER(dma_w); - DECLARE_READ32_MEMBER(ostimer_r); - DECLARE_WRITE32_MEMBER(ostimer_w); - DECLARE_READ32_MEMBER(intc_r); - DECLARE_WRITE32_MEMBER(intc_w); - DECLARE_READ32_MEMBER(gpio_r); - DECLARE_WRITE32_MEMBER(gpio_w); - DECLARE_READ32_MEMBER(lcd_r); - DECLARE_WRITE32_MEMBER(lcd_w); + uint32_t i2s_r(offs_t offset, uint32_t mem_mask = ~0); + void i2s_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t dma_r(offs_t offset, uint32_t mem_mask = ~0); + void dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t ostimer_r(offs_t offset, uint32_t mem_mask = ~0); + void ostimer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t intc_r(offs_t offset, uint32_t mem_mask = ~0); + void intc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t gpio_r(offs_t offset, uint32_t mem_mask = ~0); + void gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t lcd_r(offs_t offset, uint32_t mem_mask = ~0); + void lcd_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void set_irq_line(uint32_t line, int state); diff --git a/src/devices/machine/rf5c296.cpp b/src/devices/machine/rf5c296.cpp index b3582f6bfa3..f0756c60471 100644 --- a/src/devices/machine/rf5c296.cpp +++ b/src/devices/machine/rf5c296.cpp @@ -43,7 +43,7 @@ uint8_t rf5c296_device::reg_r(ATTR_UNUSED uint8_t reg) return 0x00; } -WRITE16_MEMBER(rf5c296_device::io_w) +void rf5c296_device::io_w(offs_t offset, uint16_t data, uint16_t mem_mask) { /// TODO: find out if this should be done here. offset *= 2; @@ -65,12 +65,12 @@ WRITE16_MEMBER(rf5c296_device::io_w) break; default: - m_pccard->write_memory(space, offset, data, mem_mask); + m_pccard->write_memory(offset, data, mem_mask); break; } } -READ16_MEMBER(rf5c296_device::io_r) +uint16_t rf5c296_device::io_r(offs_t offset, uint16_t mem_mask) { /// TODO: find out if this should be done here. offset *= 2; @@ -95,7 +95,7 @@ READ16_MEMBER(rf5c296_device::io_r) break; default: - data = m_pccard->read_memory(space, offset, mem_mask); + data = m_pccard->read_memory(offset, mem_mask); break; } @@ -104,12 +104,12 @@ READ16_MEMBER(rf5c296_device::io_r) // Hardcoded to reach the pcmcia CIS -READ16_MEMBER(rf5c296_device::mem_r) +uint16_t rf5c296_device::mem_r(offs_t offset, uint16_t mem_mask) { - return m_pccard->read_reg(space, offset, mem_mask); + return m_pccard->read_reg(offset, mem_mask); } -WRITE16_MEMBER(rf5c296_device::mem_w) +void rf5c296_device::mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - m_pccard->write_reg(space, offset, data, mem_mask); + m_pccard->write_reg(offset, data, mem_mask); } diff --git a/src/devices/machine/rf5c296.h b/src/devices/machine/rf5c296.h index 5945b97fd05..b2d0f68a3cf 100644 --- a/src/devices/machine/rf5c296.h +++ b/src/devices/machine/rf5c296.h @@ -16,10 +16,10 @@ public: // configuration helpers template <typename T> void set_pccard(T &&tag) { m_pccard.set_tag(std::forward<T>(tag)); } - DECLARE_WRITE16_MEMBER(io_w); - DECLARE_READ16_MEMBER(io_r); - DECLARE_READ16_MEMBER(mem_r); - DECLARE_WRITE16_MEMBER(mem_w); + void io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t io_r(offs_t offset, uint16_t mem_mask = ~0); + uint16_t mem_r(offs_t offset, uint16_t mem_mask = ~0); + void mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/machine/s3c2400.cpp b/src/devices/machine/s3c2400.cpp index ef779fb47c1..69649d04db0 100644 --- a/src/devices/machine/s3c2400.cpp +++ b/src/devices/machine/s3c2400.cpp @@ -210,28 +210,28 @@ void s3c2400_device::device_start() s3c24xx_device_start(); address_space &space = m_cpu->space(AS_PROGRAM); - space.install_readwrite_handler(0x14000000, 0x1400003b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_memcon_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_memcon_w))); - space.install_readwrite_handler(0x14200000, 0x1420005b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_host_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_host_w))); - space.install_readwrite_handler(0x14400000, 0x14400017, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_irq_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_irq_w))); - space.install_readwrite_handler(0x14600000, 0x1460001b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_0_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_0_w))); - space.install_readwrite_handler(0x14600020, 0x1460003b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_1_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_1_w))); - space.install_readwrite_handler(0x14600040, 0x1460005b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_2_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_2_w))); - space.install_readwrite_handler(0x14600060, 0x1460007b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_3_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_3_w))); - space.install_readwrite_handler(0x14800000, 0x14800017, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_clkpow_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_clkpow_w))); + space.install_readwrite_handler(0x14000000, 0x1400003b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_memcon_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_memcon_w))); + space.install_readwrite_handler(0x14200000, 0x1420005b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_host_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_host_w))); + space.install_readwrite_handler(0x14400000, 0x14400017, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_irq_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_irq_w))); + space.install_readwrite_handler(0x14600000, 0x1460001b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_0_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_0_w))); + space.install_readwrite_handler(0x14600020, 0x1460003b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_1_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_1_w))); + space.install_readwrite_handler(0x14600040, 0x1460005b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_2_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_2_w))); + space.install_readwrite_handler(0x14600060, 0x1460007b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_3_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_dma_3_w))); + space.install_readwrite_handler(0x14800000, 0x14800017, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_clkpow_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_clkpow_w))); space.install_readwrite_handler(0x14a00000, 0x14a003ff, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_lcd_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_lcd_w))); - space.install_readwrite_handler(0x14a00400, 0x14a007ff, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_lcd_palette_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_lcd_palette_w))); - space.install_readwrite_handler(0x15000000, 0x1500002b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_0_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_0_w))); - space.install_readwrite_handler(0x15004000, 0x1500402b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_1_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_1_w))); - space.install_readwrite_handler(0x15100000, 0x15100043, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_pwm_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_pwm_w))); - space.install_readwrite_handler(0x15200140, 0x152001fb, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_device_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_device_w))); - space.install_readwrite_handler(0x15300000, 0x1530000b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_wdt_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_wdt_w))); - space.install_readwrite_handler(0x15400000, 0x1540000f, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_iic_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_iic_w))); - space.install_readwrite_handler(0x15508000, 0x15508013, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_iis_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_iis_w))); - space.install_readwrite_handler(0x15600000, 0x1560005b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_gpio_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_gpio_w))); - space.install_readwrite_handler(0x15700040, 0x1570008b, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_rtc_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_rtc_w))); - space.install_readwrite_handler(0x15800000, 0x15800007, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_adc_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_adc_w))); - space.install_readwrite_handler(0x15900000, 0x15900017, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_spi_0_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_spi_0_w))); - space.install_readwrite_handler(0x15a00000, 0x15a0003f, read32_delegate(*this, FUNC(s3c2400_device::s3c24xx_mmc_r)), write32_delegate(*this, FUNC(s3c2400_device::s3c24xx_mmc_w))); + space.install_readwrite_handler(0x14a00400, 0x14a007ff, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_lcd_palette_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_lcd_palette_w))); + space.install_readwrite_handler(0x15000000, 0x1500002b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_0_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_0_w))); + space.install_readwrite_handler(0x15004000, 0x1500402b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_1_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_uart_1_w))); + space.install_readwrite_handler(0x15100000, 0x15100043, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_pwm_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_pwm_w))); + space.install_readwrite_handler(0x15200140, 0x152001fb, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_device_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_usb_device_w))); + space.install_readwrite_handler(0x15300000, 0x1530000b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_wdt_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_wdt_w))); + space.install_readwrite_handler(0x15400000, 0x1540000f, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_iic_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_iic_w))); + space.install_readwrite_handler(0x15508000, 0x15508013, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_iis_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_iis_w))); + space.install_readwrite_handler(0x15600000, 0x1560005b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_gpio_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_gpio_w))); + space.install_readwrite_handler(0x15700040, 0x1570008b, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_rtc_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_rtc_w))); + space.install_readwrite_handler(0x15800000, 0x15800007, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_adc_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_adc_w))); + space.install_readwrite_handler(0x15900000, 0x15900017, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_spi_0_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_spi_0_w))); + space.install_readwrite_handler(0x15a00000, 0x15a0003f, read32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_mmc_r)), write32s_delegate(*this, FUNC(s3c2400_device::s3c24xx_mmc_w))); s3c24xx_video_start(); } diff --git a/src/devices/machine/s3c2400.h b/src/devices/machine/s3c2400.h index 969356dd0a4..b5390419a93 100644 --- a/src/devices/machine/s3c2400.h +++ b/src/devices/machine/s3c2400.h @@ -180,24 +180,24 @@ protected: void s3c24xx_lcd_stop(); void s3c24xx_lcd_recalc(); void s3c24xx_lcd_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - READ32_MEMBER( s3c24xx_lcd_palette_r ); - WRITE32_MEMBER( s3c24xx_lcd_palette_w ); + uint32_t s3c24xx_lcd_palette_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_lcd_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_clkpow_reset(); uint32_t s3c24xx_get_fclk(); uint32_t s3c24xx_get_hclk(); uint32_t s3c24xx_get_pclk(); - READ32_MEMBER( s3c24xx_clkpow_r ); - WRITE32_MEMBER( s3c24xx_clkpow_w ); + uint32_t s3c24xx_clkpow_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_irq_reset(); void s3c24xx_check_pending_irq(); void s3c24xx_request_irq(uint32_t int_type); - READ32_MEMBER( s3c24xx_irq_r ); - WRITE32_MEMBER( s3c24xx_irq_w ); - READ32_MEMBER( s3c24xx_pwm_r ); + uint32_t s3c24xx_irq_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_irq_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_pwm_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_pwm_start(int timer); void s3c24xx_pwm_stop(int timer); void s3c24xx_pwm_recalc(int timer); - WRITE32_MEMBER( s3c24xx_pwm_w ); + void s3c24xx_pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_pwm_timer_exp ); void s3c24xx_dma_reset(); void s3c24xx_dma_reload(int ch); @@ -209,40 +209,40 @@ protected: void s3c24xx_dma_recalc(int ch); uint32_t s3c24xx_dma_r(uint32_t ch, uint32_t offset); void s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_dma_0_r ); - READ32_MEMBER( s3c24xx_dma_1_r ); - READ32_MEMBER( s3c24xx_dma_2_r ); - READ32_MEMBER( s3c24xx_dma_3_r ); - WRITE32_MEMBER( s3c24xx_dma_0_w ); - WRITE32_MEMBER( s3c24xx_dma_1_w ); - WRITE32_MEMBER( s3c24xx_dma_2_w ); - WRITE32_MEMBER( s3c24xx_dma_3_w ); + uint32_t s3c24xx_dma_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_2_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_3_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_dma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_dma_timer_exp ); void s3c24xx_gpio_reset(); inline uint32_t iface_gpio_port_r(int port, uint32_t mask); inline void iface_gpio_port_w(int port, uint32_t mask, uint32_t data); uint16_t s3c24xx_gpio_get_mask( uint32_t con, int val); - READ32_MEMBER( s3c24xx_gpio_r ); - WRITE32_MEMBER( s3c24xx_gpio_w ); - READ32_MEMBER( s3c24xx_memcon_r ); - WRITE32_MEMBER( s3c24xx_memcon_w ); - READ32_MEMBER( s3c24xx_usb_host_r ); - WRITE32_MEMBER( s3c24xx_usb_host_w ); + uint32_t s3c24xx_gpio_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_memcon_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_memcon_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_usb_host_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_usb_host_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint32_t s3c24xx_uart_r(uint32_t ch, uint32_t offset); void s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_uart_0_r ); - READ32_MEMBER( s3c24xx_uart_1_r ); - WRITE32_MEMBER( s3c24xx_uart_0_w ); - WRITE32_MEMBER( s3c24xx_uart_1_w ); + uint32_t s3c24xx_uart_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_uart_1_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_uart_fifo_w(int uart, uint8_t data); void s3c24xx_usb_device_reset(); - READ32_MEMBER( s3c24xx_usb_device_r ); - WRITE32_MEMBER( s3c24xx_usb_device_w ); - READ32_MEMBER( s3c24xx_wdt_r ); + uint32_t s3c24xx_usb_device_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_usb_device_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_wdt_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_wdt_start(); void s3c24xx_wdt_stop(); void s3c24xx_wdt_recalc(); - WRITE32_MEMBER( s3c24xx_wdt_w ); + void s3c24xx_wdt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_wdt_timer_exp ); void s3c24xx_iic_reset(); inline void iface_i2c_scl_w( int state); @@ -255,34 +255,34 @@ protected: void iic_start(); void iic_stop(); void iic_resume(); - READ32_MEMBER( s3c24xx_iic_r ); - WRITE32_MEMBER( s3c24xx_iic_w ); + uint32_t s3c24xx_iic_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_iic_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_iic_timer_exp ); inline void iface_i2s_data_w(int ch, uint16_t data); void s3c24xx_iis_start(); void s3c24xx_iis_stop(); void s3c24xx_iis_recalc(); - READ32_MEMBER( s3c24xx_iis_r ); - WRITE32_MEMBER( s3c24xx_iis_w ); + uint32_t s3c24xx_iis_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_iis_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_iis_timer_exp ); - READ32_MEMBER( s3c24xx_rtc_r ); - WRITE32_MEMBER( s3c24xx_rtc_w ); + uint32_t s3c24xx_rtc_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_tick_count_exp ); void s3c24xx_rtc_update(); void s3c24xx_rtc_check_alarm(); TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_update_exp ); void s3c24xx_adc_reset(); uint32_t iface_adc_data_r(int ch); - READ32_MEMBER( s3c24xx_adc_r ); + uint32_t s3c24xx_adc_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_adc_start(); - WRITE32_MEMBER( s3c24xx_adc_w ); + void s3c24xx_adc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_spi_reset(); uint32_t s3c24xx_spi_r(uint32_t ch, uint32_t offset); void s3c24xx_spi_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_spi_0_r ); - WRITE32_MEMBER( s3c24xx_spi_0_w ); - READ32_MEMBER( s3c24xx_mmc_r ); - WRITE32_MEMBER( s3c24xx_mmc_w ); + uint32_t s3c24xx_spi_0_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_spi_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_mmc_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_mmc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_device_reset(); void s3c24xx_device_start(); diff --git a/src/devices/machine/s3c2410.cpp b/src/devices/machine/s3c2410.cpp index 0922ec6b192..e630174b326 100644 --- a/src/devices/machine/s3c2410.cpp +++ b/src/devices/machine/s3c2410.cpp @@ -272,31 +272,31 @@ void s3c2410_device::device_start() s3c24xx_device_start(); address_space &space = m_cpu->space(AS_PROGRAM); - space.install_readwrite_handler( 0x48000000, 0x4800003b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_memcon_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_memcon_w))); - space.install_readwrite_handler( 0x49000000, 0x4900005b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_host_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_host_w))); - space.install_readwrite_handler( 0x4a000000, 0x4a00001f, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_irq_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_irq_w))); - space.install_readwrite_handler( 0x4b000000, 0x4b000023, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_0_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_0_w))); - space.install_readwrite_handler( 0x4b000040, 0x4b000063, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_1_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_1_w))); - space.install_readwrite_handler( 0x4b000080, 0x4b0000a3, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_2_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_2_w))); - space.install_readwrite_handler( 0x4b0000c0, 0x4b0000e3, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_3_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_3_w))); - space.install_readwrite_handler( 0x4c000000, 0x4c000017, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_clkpow_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_clkpow_w))); + space.install_readwrite_handler( 0x48000000, 0x4800003b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_memcon_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_memcon_w))); + space.install_readwrite_handler( 0x49000000, 0x4900005b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_host_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_host_w))); + space.install_readwrite_handler( 0x4a000000, 0x4a00001f, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_irq_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_irq_w))); + space.install_readwrite_handler( 0x4b000000, 0x4b000023, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_0_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_0_w))); + space.install_readwrite_handler( 0x4b000040, 0x4b000063, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_1_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_1_w))); + space.install_readwrite_handler( 0x4b000080, 0x4b0000a3, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_2_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_2_w))); + space.install_readwrite_handler( 0x4b0000c0, 0x4b0000e3, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_3_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_dma_3_w))); + space.install_readwrite_handler( 0x4c000000, 0x4c000017, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_clkpow_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_clkpow_w))); space.install_readwrite_handler( 0x4d000000, 0x4d000063, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_lcd_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_lcd_w))); - space.install_readwrite_handler( 0x4d000400, 0x4d0007ff, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_lcd_palette_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_lcd_palette_w))); - space.install_readwrite_handler( 0x4e000000, 0x4e000017, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_nand_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_nand_w))); - space.install_readwrite_handler( 0x50000000, 0x5000002b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_0_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_0_w))); - space.install_readwrite_handler( 0x50004000, 0x5000402b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_1_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_1_w))); - space.install_readwrite_handler( 0x50008000, 0x5000802b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_2_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_2_w))); - space.install_readwrite_handler( 0x51000000, 0x51000043, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_pwm_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_pwm_w))); - space.install_readwrite_handler( 0x52000140, 0x5200026f, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_device_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_device_w))); - space.install_readwrite_handler( 0x53000000, 0x5300000b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_wdt_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_wdt_w))); - space.install_readwrite_handler( 0x54000000, 0x5400000f, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_iic_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_iic_w))); - space.install_readwrite_handler( 0x55000000, 0x55000013, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_iis_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_iis_w))); - space.install_readwrite_handler( 0x56000000, 0x560000bf, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_gpio_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_gpio_w))); - space.install_readwrite_handler( 0x57000040, 0x5700008b, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_rtc_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_rtc_w))); - space.install_readwrite_handler( 0x58000000, 0x58000013, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_adc_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_adc_w))); - space.install_readwrite_handler( 0x59000000, 0x59000017, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_0_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_0_w))); - space.install_readwrite_handler( 0x59000020, 0x59000037, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_1_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_1_w))); - space.install_readwrite_handler( 0x5a000000, 0x5a000043, read32_delegate(*this, FUNC(s3c2410_device::s3c24xx_sdi_r)), write32_delegate(*this, FUNC(s3c2410_device::s3c24xx_sdi_w))); + space.install_readwrite_handler( 0x4d000400, 0x4d0007ff, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_lcd_palette_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_lcd_palette_w))); + space.install_readwrite_handler( 0x4e000000, 0x4e000017, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_nand_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_nand_w))); + space.install_readwrite_handler( 0x50000000, 0x5000002b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_0_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_0_w))); + space.install_readwrite_handler( 0x50004000, 0x5000402b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_1_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_1_w))); + space.install_readwrite_handler( 0x50008000, 0x5000802b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_2_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_uart_2_w))); + space.install_readwrite_handler( 0x51000000, 0x51000043, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_pwm_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_pwm_w))); + space.install_readwrite_handler( 0x52000140, 0x5200026f, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_device_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_usb_device_w))); + space.install_readwrite_handler( 0x53000000, 0x5300000b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_wdt_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_wdt_w))); + space.install_readwrite_handler( 0x54000000, 0x5400000f, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_iic_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_iic_w))); + space.install_readwrite_handler( 0x55000000, 0x55000013, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_iis_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_iis_w))); + space.install_readwrite_handler( 0x56000000, 0x560000bf, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_gpio_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_gpio_w))); + space.install_readwrite_handler( 0x57000040, 0x5700008b, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_rtc_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_rtc_w))); + space.install_readwrite_handler( 0x58000000, 0x58000013, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_adc_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_adc_w))); + space.install_readwrite_handler( 0x59000000, 0x59000017, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_0_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_0_w))); + space.install_readwrite_handler( 0x59000020, 0x59000037, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_1_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_spi_1_w))); + space.install_readwrite_handler( 0x5a000000, 0x5a000043, read32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_sdi_r)), write32s_delegate(*this, FUNC(s3c2410_device::s3c24xx_sdi_w))); s3c24xx_video_start(); } diff --git a/src/devices/machine/s3c2410.h b/src/devices/machine/s3c2410.h index 52474fcbd79..46b16b441d8 100644 --- a/src/devices/machine/s3c2410.h +++ b/src/devices/machine/s3c2410.h @@ -208,14 +208,14 @@ protected: void s3c24xx_lcd_stop(); void s3c24xx_lcd_recalc(); void s3c24xx_lcd_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - READ32_MEMBER( s3c24xx_lcd_palette_r ); - WRITE32_MEMBER( s3c24xx_lcd_palette_w ); + uint32_t s3c24xx_lcd_palette_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_lcd_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_clkpow_reset(); uint32_t s3c24xx_get_fclk(); uint32_t s3c24xx_get_hclk(); uint32_t s3c24xx_get_pclk(); - READ32_MEMBER( s3c24xx_clkpow_r ); - WRITE32_MEMBER( s3c24xx_clkpow_w ); + uint32_t s3c24xx_clkpow_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_irq_reset(); void s3c24xx_check_pending_irq(); void s3c24xx_request_irq(uint32_t int_type); @@ -223,13 +223,13 @@ protected: void s3c24xx_request_subirq( uint32_t int_type); void s3c24xx_check_pending_eint(); void s3c24xx_request_eint(uint32_t number); - READ32_MEMBER( s3c24xx_irq_r ); - WRITE32_MEMBER( s3c24xx_irq_w ); - READ32_MEMBER( s3c24xx_pwm_r ); + uint32_t s3c24xx_irq_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_irq_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_pwm_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_pwm_start(int timer); void s3c24xx_pwm_stop(int timer); void s3c24xx_pwm_recalc(int timer); - WRITE32_MEMBER( s3c24xx_pwm_w ); + void s3c24xx_pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_pwm_timer_exp ); void s3c24xx_dma_reset(); void s3c24xx_dma_reload(int ch); @@ -241,42 +241,42 @@ protected: void s3c24xx_dma_recalc(int ch); uint32_t s3c24xx_dma_r(uint32_t ch, uint32_t offset); void s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_dma_0_r ); - READ32_MEMBER( s3c24xx_dma_1_r ); - READ32_MEMBER( s3c24xx_dma_2_r ); - READ32_MEMBER( s3c24xx_dma_3_r ); - WRITE32_MEMBER( s3c24xx_dma_0_w ); - WRITE32_MEMBER( s3c24xx_dma_1_w ); - WRITE32_MEMBER( s3c24xx_dma_2_w ); - WRITE32_MEMBER( s3c24xx_dma_3_w ); + uint32_t s3c24xx_dma_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_2_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_3_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_dma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_dma_timer_exp ); void s3c24xx_gpio_reset(); inline uint32_t iface_gpio_port_r(int port, uint32_t mask); inline void iface_gpio_port_w(int port, uint32_t mask, uint32_t data); uint16_t s3c24xx_gpio_get_mask( uint32_t con, int val); - READ32_MEMBER( s3c24xx_gpio_r ); - WRITE32_MEMBER( s3c24xx_gpio_w ); - READ32_MEMBER( s3c24xx_memcon_r ); - WRITE32_MEMBER( s3c24xx_memcon_w ); - READ32_MEMBER( s3c24xx_usb_host_r ); - WRITE32_MEMBER( s3c24xx_usb_host_w ); + uint32_t s3c24xx_gpio_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_memcon_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_memcon_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_usb_host_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_usb_host_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint32_t s3c24xx_uart_r(uint32_t ch, uint32_t offset); void s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_uart_0_r ); - READ32_MEMBER( s3c24xx_uart_1_r ); - READ32_MEMBER( s3c24xx_uart_2_r ); - WRITE32_MEMBER( s3c24xx_uart_0_w ); - WRITE32_MEMBER( s3c24xx_uart_1_w ); - WRITE32_MEMBER( s3c24xx_uart_2_w ); + uint32_t s3c24xx_uart_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_uart_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_uart_2_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_uart_2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_uart_fifo_w(int uart, uint8_t data); void s3c24xx_usb_device_reset(); - READ32_MEMBER( s3c24xx_usb_device_r ); - WRITE32_MEMBER( s3c24xx_usb_device_w ); - READ32_MEMBER( s3c24xx_wdt_r ); + uint32_t s3c24xx_usb_device_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_usb_device_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_wdt_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_wdt_start(); void s3c24xx_wdt_stop(); void s3c24xx_wdt_recalc(); - WRITE32_MEMBER( s3c24xx_wdt_w ); + void s3c24xx_wdt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_wdt_timer_exp ); void s3c24xx_iic_reset(); inline void iface_i2c_scl_w( int state); @@ -289,38 +289,38 @@ protected: void iic_start(); void iic_stop(); void iic_resume(); - READ32_MEMBER( s3c24xx_iic_r ); - WRITE32_MEMBER( s3c24xx_iic_w ); + uint32_t s3c24xx_iic_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_iic_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_iic_timer_exp ); inline void iface_i2s_data_w(int ch, uint16_t data); void s3c24xx_iis_start(); void s3c24xx_iis_stop(); void s3c24xx_iis_recalc(); - READ32_MEMBER( s3c24xx_iis_r ); - WRITE32_MEMBER( s3c24xx_iis_w ); + uint32_t s3c24xx_iis_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_iis_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_iis_timer_exp ); - READ32_MEMBER( s3c24xx_rtc_r ); - WRITE32_MEMBER( s3c24xx_rtc_w ); + uint32_t s3c24xx_rtc_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_tick_count_exp ); void s3c24xx_rtc_update(); void s3c24xx_rtc_check_alarm(); TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_update_exp ); void s3c24xx_adc_reset(); uint32_t iface_adc_data_r(int ch); - READ32_MEMBER( s3c24xx_adc_r ); + uint32_t s3c24xx_adc_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_adc_start(); - WRITE32_MEMBER( s3c24xx_adc_w ); + void s3c24xx_adc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_touch_screen(int state); void s3c24xx_spi_reset(); uint32_t s3c24xx_spi_r(uint32_t ch, uint32_t offset); void s3c24xx_spi_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_spi_0_r ); - READ32_MEMBER( s3c24xx_spi_1_r ); - WRITE32_MEMBER( s3c24xx_spi_0_w ); - WRITE32_MEMBER( s3c24xx_spi_1_w ); + uint32_t s3c24xx_spi_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_spi_1_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_spi_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_spi_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_sdi_reset(); - READ32_MEMBER( s3c24xx_sdi_r ); - WRITE32_MEMBER( s3c24xx_sdi_w ); + uint32_t s3c24xx_sdi_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_sdi_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_nand_reset(); inline void iface_nand_command_w(uint8_t data); inline void iface_nand_address_w(uint8_t data); @@ -332,9 +332,9 @@ protected: void s3c24xx_nand_address_w(uint8_t data); uint8_t s3c24xx_nand_data_r(); void s3c24xx_nand_data_w(uint8_t data); - READ32_MEMBER( s3c24xx_nand_r ); + uint32_t s3c24xx_nand_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_nand_init_ecc(); - WRITE32_MEMBER( s3c24xx_nand_w ); + void s3c24xx_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); ATTR_UNUSED WRITE_LINE_MEMBER( s3c24xx_pin_frnb_w ); void s3c24xx_nand_auto_boot(); void s3c24xx_device_reset(); diff --git a/src/devices/machine/s3c2440.cpp b/src/devices/machine/s3c2440.cpp index 4da695d6d38..801c21dd01d 100644 --- a/src/devices/machine/s3c2440.cpp +++ b/src/devices/machine/s3c2440.cpp @@ -287,33 +287,33 @@ s3c2440_device::~s3c2440_device() void s3c2440_device::device_start() { address_space &space = m_cpu->space(AS_PROGRAM); - space.install_readwrite_handler(0x48000000, 0x4800003b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_memcon_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_memcon_w))); - space.install_readwrite_handler(0x49000000, 0x4900005b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_host_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_host_w))); - space.install_readwrite_handler(0x4a000000, 0x4a00001f, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_irq_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_irq_w))); - space.install_readwrite_handler(0x4b000000, 0x4b000023, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_0_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_0_w))); - space.install_readwrite_handler(0x4b000040, 0x4b000063, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_1_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_1_w))); - space.install_readwrite_handler(0x4b000080, 0x4b0000a3, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_2_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_2_w))); - space.install_readwrite_handler(0x4b0000c0, 0x4b0000e3, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_3_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_3_w))); - space.install_readwrite_handler(0x4c000000, 0x4c00001b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_clkpow_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_clkpow_w))); + space.install_readwrite_handler(0x48000000, 0x4800003b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_memcon_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_memcon_w))); + space.install_readwrite_handler(0x49000000, 0x4900005b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_host_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_host_w))); + space.install_readwrite_handler(0x4a000000, 0x4a00001f, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_irq_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_irq_w))); + space.install_readwrite_handler(0x4b000000, 0x4b000023, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_0_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_0_w))); + space.install_readwrite_handler(0x4b000040, 0x4b000063, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_1_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_1_w))); + space.install_readwrite_handler(0x4b000080, 0x4b0000a3, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_2_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_2_w))); + space.install_readwrite_handler(0x4b0000c0, 0x4b0000e3, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_3_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_dma_3_w))); + space.install_readwrite_handler(0x4c000000, 0x4c00001b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_clkpow_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_clkpow_w))); space.install_readwrite_handler(0x4d000000, 0x4d000063, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_lcd_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_lcd_w))); - space.install_readwrite_handler(0x4d000400, 0x4d0007ff, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_lcd_palette_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_lcd_palette_w))); - space.install_readwrite_handler(0x4e000000, 0x4e00003f, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_nand_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_nand_w))); - space.install_readwrite_handler(0x4f000000, 0x4f0000a3, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_cam_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_cam_w))); - space.install_readwrite_handler(0x50000000, 0x5000002b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_0_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_0_w))); - space.install_readwrite_handler(0x50004000, 0x5000402b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_1_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_1_w))); - space.install_readwrite_handler(0x50008000, 0x5000802b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_2_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_2_w))); - space.install_readwrite_handler(0x51000000, 0x51000043, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_pwm_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_pwm_w))); - space.install_readwrite_handler(0x52000140, 0x5200026f, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_device_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_device_w))); - space.install_readwrite_handler(0x53000000, 0x5300000b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_wdt_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_wdt_w))); - space.install_readwrite_handler(0x54000000, 0x54000013, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_iic_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_iic_w))); - space.install_readwrite_handler(0x55000000, 0x55000013, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_iis_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_iis_w))); - space.install_readwrite_handler(0x56000000, 0x560000df, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_gpio_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_gpio_w))); - space.install_readwrite_handler(0x57000040, 0x5700008b, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_rtc_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_rtc_w))); - space.install_readwrite_handler(0x58000000, 0x58000017, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_adc_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_adc_w))); - space.install_readwrite_handler(0x59000000, 0x59000017, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_0_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_0_w))); - space.install_readwrite_handler(0x59000020, 0x59000037, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_1_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_1_w))); - space.install_readwrite_handler(0x5a000000, 0x5a000043, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_sdi_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_sdi_w))); - space.install_readwrite_handler(0x5b000000, 0x5b00001f, read32_delegate(*this, FUNC(s3c2440_device::s3c24xx_ac97_r)), write32_delegate(*this, FUNC(s3c2440_device::s3c24xx_ac97_w))); + space.install_readwrite_handler(0x4d000400, 0x4d0007ff, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_lcd_palette_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_lcd_palette_w))); + space.install_readwrite_handler(0x4e000000, 0x4e00003f, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_nand_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_nand_w))); + space.install_readwrite_handler(0x4f000000, 0x4f0000a3, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_cam_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_cam_w))); + space.install_readwrite_handler(0x50000000, 0x5000002b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_0_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_0_w))); + space.install_readwrite_handler(0x50004000, 0x5000402b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_1_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_1_w))); + space.install_readwrite_handler(0x50008000, 0x5000802b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_2_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_uart_2_w))); + space.install_readwrite_handler(0x51000000, 0x51000043, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_pwm_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_pwm_w))); + space.install_readwrite_handler(0x52000140, 0x5200026f, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_device_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_usb_device_w))); + space.install_readwrite_handler(0x53000000, 0x5300000b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_wdt_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_wdt_w))); + space.install_readwrite_handler(0x54000000, 0x54000013, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_iic_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_iic_w))); + space.install_readwrite_handler(0x55000000, 0x55000013, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_iis_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_iis_w))); + space.install_readwrite_handler(0x56000000, 0x560000df, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_gpio_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_gpio_w))); + space.install_readwrite_handler(0x57000040, 0x5700008b, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_rtc_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_rtc_w))); + space.install_readwrite_handler(0x58000000, 0x58000017, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_adc_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_adc_w))); + space.install_readwrite_handler(0x59000000, 0x59000017, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_0_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_0_w))); + space.install_readwrite_handler(0x59000020, 0x59000037, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_1_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_spi_1_w))); + space.install_readwrite_handler(0x5a000000, 0x5a000043, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_sdi_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_sdi_w))); + space.install_readwrite_handler(0x5b000000, 0x5b00001f, read32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_ac97_r)), write32s_delegate(*this, FUNC(s3c2440_device::s3c24xx_ac97_w))); s3c24xx_device_start(); diff --git a/src/devices/machine/s3c2440.h b/src/devices/machine/s3c2440.h index 062bf50f7a6..18bdeecacc7 100644 --- a/src/devices/machine/s3c2440.h +++ b/src/devices/machine/s3c2440.h @@ -228,14 +228,14 @@ protected: void s3c24xx_lcd_stop(); void s3c24xx_lcd_recalc(); void s3c24xx_lcd_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - READ32_MEMBER( s3c24xx_lcd_palette_r ); - WRITE32_MEMBER( s3c24xx_lcd_palette_w ); + uint32_t s3c24xx_lcd_palette_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_lcd_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_clkpow_reset(); uint32_t s3c24xx_get_fclk(); uint32_t s3c24xx_get_hclk(); uint32_t s3c24xx_get_pclk(); - READ32_MEMBER( s3c24xx_clkpow_r ); - WRITE32_MEMBER( s3c24xx_clkpow_w ); + uint32_t s3c24xx_clkpow_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_irq_reset(); void s3c24xx_check_pending_irq(); void s3c24xx_request_irq(uint32_t int_type); @@ -243,13 +243,13 @@ protected: void s3c24xx_request_subirq( uint32_t int_type); void s3c24xx_check_pending_eint(); void s3c24xx_request_eint(uint32_t number); - READ32_MEMBER( s3c24xx_irq_r ); - WRITE32_MEMBER( s3c24xx_irq_w ); - READ32_MEMBER( s3c24xx_pwm_r ); + uint32_t s3c24xx_irq_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_irq_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_pwm_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_pwm_start(int timer); void s3c24xx_pwm_stop(int timer); void s3c24xx_pwm_recalc(int timer); - WRITE32_MEMBER( s3c24xx_pwm_w ); + void s3c24xx_pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_pwm_timer_exp ); void s3c24xx_dma_reset(); void s3c24xx_dma_reload(int ch); @@ -261,42 +261,42 @@ protected: void s3c24xx_dma_recalc(int ch); uint32_t s3c24xx_dma_r(uint32_t ch, uint32_t offset); void s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_dma_0_r ); - READ32_MEMBER( s3c24xx_dma_1_r ); - READ32_MEMBER( s3c24xx_dma_2_r ); - READ32_MEMBER( s3c24xx_dma_3_r ); - WRITE32_MEMBER( s3c24xx_dma_0_w ); - WRITE32_MEMBER( s3c24xx_dma_1_w ); - WRITE32_MEMBER( s3c24xx_dma_2_w ); - WRITE32_MEMBER( s3c24xx_dma_3_w ); + uint32_t s3c24xx_dma_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_2_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_dma_3_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_dma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_dma_3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_dma_timer_exp ); void s3c24xx_gpio_reset(); inline uint32_t iface_gpio_port_r(int port, uint32_t mask); inline void iface_gpio_port_w(int port, uint32_t mask, uint32_t data); uint16_t s3c24xx_gpio_get_mask( uint32_t con, int val); - READ32_MEMBER( s3c24xx_gpio_r ); - WRITE32_MEMBER( s3c24xx_gpio_w ); - READ32_MEMBER( s3c24xx_memcon_r ); - WRITE32_MEMBER( s3c24xx_memcon_w ); - READ32_MEMBER( s3c24xx_usb_host_r ); - WRITE32_MEMBER( s3c24xx_usb_host_w ); + uint32_t s3c24xx_gpio_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_memcon_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_memcon_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_usb_host_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_usb_host_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint32_t s3c24xx_uart_r(uint32_t ch, uint32_t offset); void s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_uart_0_r ); - READ32_MEMBER( s3c24xx_uart_1_r ); - READ32_MEMBER( s3c24xx_uart_2_r ); - WRITE32_MEMBER( s3c24xx_uart_0_w ); - WRITE32_MEMBER( s3c24xx_uart_1_w ); - WRITE32_MEMBER( s3c24xx_uart_2_w ); + uint32_t s3c24xx_uart_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_uart_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_uart_2_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_uart_2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_uart_fifo_w(int uart, uint8_t data); void s3c24xx_usb_device_reset(); - READ32_MEMBER( s3c24xx_usb_device_r ); - WRITE32_MEMBER( s3c24xx_usb_device_w ); - READ32_MEMBER( s3c24xx_wdt_r ); + uint32_t s3c24xx_usb_device_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_usb_device_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_wdt_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_wdt_start(); void s3c24xx_wdt_stop(); void s3c24xx_wdt_recalc(); - WRITE32_MEMBER( s3c24xx_wdt_w ); + void s3c24xx_wdt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_wdt_timer_exp ); void s3c24xx_iic_reset(); inline void iface_i2c_scl_w( int state); @@ -309,38 +309,38 @@ protected: void iic_start(); void iic_stop(); void iic_resume(); - READ32_MEMBER( s3c24xx_iic_r ); - WRITE32_MEMBER( s3c24xx_iic_w ); + uint32_t s3c24xx_iic_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_iic_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_iic_timer_exp ); inline void iface_i2s_data_w(int ch, uint16_t data); void s3c24xx_iis_start(); void s3c24xx_iis_stop(); void s3c24xx_iis_recalc(); - READ32_MEMBER( s3c24xx_iis_r ); - WRITE32_MEMBER( s3c24xx_iis_w ); + uint32_t s3c24xx_iis_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_iis_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_iis_timer_exp ); - READ32_MEMBER( s3c24xx_rtc_r ); - WRITE32_MEMBER( s3c24xx_rtc_w ); + uint32_t s3c24xx_rtc_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_tick_count_exp ); void s3c24xx_rtc_update(); void s3c24xx_rtc_check_alarm(); TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_update_exp ); void s3c24xx_adc_reset(); uint32_t iface_adc_data_r(int ch); - READ32_MEMBER( s3c24xx_adc_r ); + uint32_t s3c24xx_adc_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_adc_start(); - WRITE32_MEMBER( s3c24xx_adc_w ); + void s3c24xx_adc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_touch_screen(int state); void s3c24xx_spi_reset(); uint32_t s3c24xx_spi_r(uint32_t ch, uint32_t offset); void s3c24xx_spi_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask); - READ32_MEMBER( s3c24xx_spi_0_r ); - READ32_MEMBER( s3c24xx_spi_1_r ); - WRITE32_MEMBER( s3c24xx_spi_0_w ); - WRITE32_MEMBER( s3c24xx_spi_1_w ); + uint32_t s3c24xx_spi_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t s3c24xx_spi_1_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_spi_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void s3c24xx_spi_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_sdi_reset(); - READ32_MEMBER( s3c24xx_sdi_r ); - WRITE32_MEMBER( s3c24xx_sdi_w ); + uint32_t s3c24xx_sdi_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_sdi_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_nand_reset(); inline void iface_nand_command_w(uint8_t data); inline void iface_nand_address_w(uint8_t data); @@ -353,14 +353,14 @@ protected: void s3c24xx_nand_address_w(uint8_t data); uint8_t s3c24xx_nand_data_r(); void s3c24xx_nand_data_w(uint8_t data); - READ32_MEMBER( s3c24xx_nand_r ); + uint32_t s3c24xx_nand_r(offs_t offset, uint32_t mem_mask = ~0); void s3c24xx_nand_init_ecc(); - WRITE32_MEMBER( s3c24xx_nand_w ); + void s3c24xx_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); ATTR_UNUSED WRITE_LINE_MEMBER( s3c24xx_pin_frnb_w ); - READ32_MEMBER( s3c24xx_cam_r ); - WRITE32_MEMBER( s3c24xx_cam_w ); - READ32_MEMBER( s3c24xx_ac97_r ); - WRITE32_MEMBER( s3c24xx_ac97_w ); + uint32_t s3c24xx_cam_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_cam_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t s3c24xx_ac97_r(offs_t offset, uint32_t mem_mask = ~0); + void s3c24xx_ac97_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void s3c24xx_nand_auto_boot(); void s3c24xx_device_reset(); void s3c24xx_device_start(); diff --git a/src/devices/machine/s3c24xx.hxx b/src/devices/machine/s3c24xx.hxx index 61abe85789e..85f391c0007 100644 --- a/src/devices/machine/s3c24xx.hxx +++ b/src/devices/machine/s3c24xx.hxx @@ -973,14 +973,14 @@ void S3C24_CLASS_NAME::s3c24xx_lcd_w(offs_t offset, uint32_t data, uint32_t mem_ /* LCD Palette */ -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_lcd_palette_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_lcd_palette_r(offs_t offset, uint32_t mem_mask) { uint32_t data = m_lcdpal.regs.data[offset]; LOGMASKED(LOG_LCD_REGS, "%s: lcd palette read: %08X = %08X & %08x\n", machine().describe_context(), S3C24XX_BASE_LCDPAL + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_lcd_palette_w ) +void S3C24_CLASS_NAME::s3c24xx_lcd_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_LCD_REGS, "%s: lcd palette write: %08X = %08X & %08x\n", machine().describe_context(), S3C24XX_BASE_LCDPAL + (offset << 2), data, mem_mask); COMBINE_DATA(&m_lcdpal.regs.data[offset]); @@ -1063,14 +1063,14 @@ uint32_t S3C24_CLASS_NAME::s3c24xx_get_pclk() return s3c24xx_get_hclk() / (1 << BIT(m_clkpow.regs.clkdivn, 0)); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_clkpow_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_clkpow_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_clkpow.regs)[offset]; LOGMASKED(LOG_CLKPOW, "%s: clock/power read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_CLKPOW + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_clkpow_w ) +void S3C24_CLASS_NAME::s3c24xx_clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask) { const uint32_t old = ((uint32_t*)&m_clkpow.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_clkpow.regs)[offset]); @@ -1249,7 +1249,7 @@ ATTR_UNUSED void S3C24_CLASS_NAME::s3c24xx_request_eint(uint32_t number) #endif -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_irq_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_irq_r(offs_t offset, uint32_t mem_mask) { const uint32_t data = ((uint32_t*)&m_irq.regs)[offset]; switch (offset) @@ -1287,7 +1287,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_irq_r ) return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_irq_w ) +void S3C24_CLASS_NAME::s3c24xx_irq_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_irq.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_irq.regs)[offset]); @@ -1328,7 +1328,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_irq_w ) /* PWM Timer */ -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_pwm_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_pwm.regs)[offset]; switch (offset) @@ -1452,7 +1452,7 @@ void S3C24_CLASS_NAME::s3c24xx_pwm_recalc(int timer) } } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_w ) +void S3C24_CLASS_NAME::s3c24xx_pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t const old_value = ((uint32_t*)&m_pwm.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_pwm.regs)[offset]); @@ -1683,42 +1683,42 @@ void S3C24_CLASS_NAME::s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data } } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_0_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_dma_0_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_dma_r(0, offset); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_1_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_dma_1_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_dma_r(1, offset); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_2_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_dma_2_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_dma_r(2, offset); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_3_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_dma_3_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_dma_r(3, offset); } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_0_w ) +void S3C24_CLASS_NAME::s3c24xx_dma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_dma_w(0, offset, data, mem_mask); } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_1_w ) +void S3C24_CLASS_NAME::s3c24xx_dma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_dma_w(1, offset, data, mem_mask); } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_2_w ) +void S3C24_CLASS_NAME::s3c24xx_dma_2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_dma_w(2, offset, data, mem_mask); } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_3_w ) +void S3C24_CLASS_NAME::s3c24xx_dma_3_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_dma_w(3, offset, data, mem_mask); } @@ -1792,7 +1792,7 @@ uint16_t S3C24_CLASS_NAME::s3c24xx_gpio_get_mask( uint32_t con, int val) return mask; } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_gpio_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_gpio.regs)[offset]; switch (offset) @@ -1844,7 +1844,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_r ) return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_w ) +void S3C24_CLASS_NAME::s3c24xx_gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask) { #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440) uint32_t old_value = ((uint32_t*)&m_gpio.regs)[offset]; @@ -1917,7 +1917,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_w ) /* Memory Controller */ -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_memcon_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_memcon_r(offs_t offset, uint32_t mem_mask) { assert(offset < ARRAY_LENGTH(m_memcon.regs.data)); uint32_t data = m_memcon.regs.data[offset]; @@ -1925,7 +1925,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_memcon_r ) return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_memcon_w ) +void S3C24_CLASS_NAME::s3c24xx_memcon_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_MEMCON, "%s: memcon write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_MEMCON + (offset << 2), data, mem_mask); COMBINE_DATA(&m_memcon.regs.data[offset]); @@ -1933,7 +1933,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_memcon_w ) /* USB Host Controller */ -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_host_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_usb_host_r(offs_t offset, uint32_t mem_mask) { uint32_t data = m_usbhost.regs.data[offset]; switch (offset) @@ -1968,7 +1968,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_host_r ) return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_host_w ) +void S3C24_CLASS_NAME::s3c24xx_usb_host_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_USBHOST, "%s: USB host write: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask); COMBINE_DATA(&m_usbhost.regs.data[offset]); @@ -2023,38 +2023,38 @@ void S3C24_CLASS_NAME::s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t dat } } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_0_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_uart_0_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_uart_r(0, offset); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_1_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_uart_1_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_uart_r(1, offset); } #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440) -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_2_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_uart_2_r(offs_t offset, uint32_t mem_mask) { return s3c24xx_uart_r(2, offset); } #endif -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_0_w ) +void S3C24_CLASS_NAME::s3c24xx_uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_uart_w(0, offset, data, mem_mask); } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_1_w ) +void S3C24_CLASS_NAME::s3c24xx_uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_uart_w(1, offset, data, mem_mask); } #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440) -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_2_w ) +void S3C24_CLASS_NAME::s3c24xx_uart_2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { s3c24xx_uart_w(2, offset, data, mem_mask); } @@ -2110,14 +2110,14 @@ void S3C24_CLASS_NAME::s3c24xx_usb_device_reset() #endif } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_device_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_usb_device_r(offs_t offset, uint32_t mem_mask) { const uint32_t data = m_usbdev.regs.data[offset]; LOGMASKED(LOG_USB, "%s: USB read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_USBDEV + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_device_w ) +void S3C24_CLASS_NAME::s3c24xx_usb_device_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_USB, "%s: USB read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_USBDEV + (offset << 2), data, mem_mask); COMBINE_DATA(&m_usbdev.regs.data[offset]); @@ -2125,7 +2125,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_device_w ) /* Watchdog Timer */ -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_wdt_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_wdt.regs)[offset]; switch (offset) @@ -2186,7 +2186,7 @@ void S3C24_CLASS_NAME::s3c24xx_wdt_recalc() s3c24xx_wdt_stop(); } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_w ) +void S3C24_CLASS_NAME::s3c24xx_wdt_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_wdt.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_wdt.regs)[offset]); @@ -2343,7 +2343,7 @@ void S3C24_CLASS_NAME::iic_resume() m_iic.timer->adjust(attotime::from_usec(1)); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_iic_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_iic.regs)[offset]; switch (offset) @@ -2359,7 +2359,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_r ) return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_w ) +void S3C24_CLASS_NAME::s3c24xx_iic_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_iic.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_iic.regs)[offset]); @@ -2485,7 +2485,7 @@ void S3C24_CLASS_NAME::s3c24xx_iis_recalc() s3c24xx_iis_stop(); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_iis_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_iis.regs)[offset]; #if 0 @@ -2501,7 +2501,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_r ) return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_w ) +void S3C24_CLASS_NAME::s3c24xx_iis_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_iis.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_iis.regs)[offset]); @@ -2543,14 +2543,14 @@ TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_timer_exp ) /* RTC */ -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_rtc_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_rtc.regs)[offset]; LOGMASKED(LOG_RTC, "%s: rtc read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_RTC + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_w ) +void S3C24_CLASS_NAME::s3c24xx_rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&((uint32_t*)&m_rtc.regs)[offset]); switch (offset) @@ -2621,7 +2621,7 @@ uint32_t S3C24_CLASS_NAME::iface_adc_data_r(int ch) } } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_adc_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_adc_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_adc.regs)[offset]; switch (offset) @@ -2658,7 +2658,7 @@ void S3C24_CLASS_NAME::s3c24xx_adc_start() #endif } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_adc_w ) +void S3C24_CLASS_NAME::s3c24xx_adc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_adc.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_adc.regs)[offset]); @@ -2719,7 +2719,7 @@ void S3C24_CLASS_NAME::s3c24xx_spi_w(uint32_t ch, uint32_t offset, uint32_t data COMBINE_DATA(&((uint32_t*)&m_spi[ch].regs)[offset]); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_0_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_spi_0_r(offs_t offset, uint32_t mem_mask) { const uint32_t data = s3c24xx_spi_r(0, offset); LOGMASKED(LOG_SPI, "%s: SPI 0 read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_SPI_0 + (offset << 2), data, mem_mask); @@ -2728,7 +2728,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_0_r ) #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440) -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_1_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_spi_1_r(offs_t offset, uint32_t mem_mask) { const uint32_t data = s3c24xx_spi_r(1, offset); LOGMASKED(LOG_SPI, "%s: SPI 0 read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_SPI_0 + (offset << 2), data, mem_mask); @@ -2737,7 +2737,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_1_r ) #endif -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_0_w ) +void S3C24_CLASS_NAME::s3c24xx_spi_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_SPI, "%s: SPI 0 write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_SPI_0 + (offset << 2), data, mem_mask); s3c24xx_spi_w( 0, offset, data, mem_mask); @@ -2745,7 +2745,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_0_w ) #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440) -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_1_w ) +void S3C24_CLASS_NAME::s3c24xx_spi_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_SPI, "%s: SPI 1 write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_SPI_0 + (offset << 2), data, mem_mask); s3c24xx_spi_w( 1, offset, data, mem_mask); @@ -2757,14 +2757,14 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_1_w ) #if defined(DEVICE_S3C2400) -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_mmc_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_mmc_r(offs_t offset, uint32_t mem_mask) { const uint32_t data = m_mmc.regs.data[offset]; LOGMASKED(LOG_MMC, "%s: MMC read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_MMC + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_mmc_w ) +void S3C24_CLASS_NAME::s3c24xx_mmc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_MMC, "%s: MMC write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_MMC + (offset << 2), data, mem_mask); COMBINE_DATA(&m_mmc.regs.data[offset]); @@ -2787,14 +2787,14 @@ void S3C24_CLASS_NAME::s3c24xx_sdi_reset() #endif } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_sdi_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_sdi_r(offs_t offset, uint32_t mem_mask) { uint32_t data = m_sdi.regs.data[offset]; LOGMASKED(LOG_SDI, "%s: SDI read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_SDI + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_sdi_w ) +void S3C24_CLASS_NAME::s3c24xx_sdi_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_SDI, "%s: SDI write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_SDI + (offset << 2), data, mem_mask); COMBINE_DATA(&m_sdi.regs.data[offset]); @@ -2973,7 +2973,7 @@ void S3C24_CLASS_NAME::s3c24xx_nand_data_w(uint8_t data) s3c24xx_nand_update_ecc(data); } -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_nand_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_nand_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_nand.regs)[offset]; switch (offset) @@ -3034,7 +3034,7 @@ void S3C24_CLASS_NAME::s3c24xx_nand_init_ecc() m_nand.ecc_pos = 0; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_nand_w ) +void S3C24_CLASS_NAME::s3c24xx_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_nand.regs)[offset]; COMBINE_DATA(&((uint32_t*)&m_nand.regs)[offset]); @@ -3086,7 +3086,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_nand_w ) } } -ATTR_UNUSED WRITE_LINE_MEMBER( S3C24_CLASS_NAME::s3c24xx_pin_frnb_w ) +ATTR_UNUSED WRITE_LINE_MEMBER( S3C24_CLASS_NAME::s3c24xx_pin_frnb_w ) { LOGMASKED(LOG_FLASH, "s3c24xx_pin_frnb_w (%d)\n", state); #if defined(DEVICE_S3C2440) @@ -3109,14 +3109,14 @@ ATTR_UNUSED WRITE_LINE_MEMBER( S3C24_CLASS_NAME::s3c24xx_pin_frnb_w ) #if defined(DEVICE_S3C2440) -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_cam_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_cam_r(offs_t offset, uint32_t mem_mask) { uint32_t data = m_cam.regs.data[offset]; LOGMASKED(LOG_CAM, "%s: camera read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_CAM + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_cam_w ) +void S3C24_CLASS_NAME::s3c24xx_cam_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_CAM, "%s: camera write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_CAM + (offset << 2), data, mem_mask); COMBINE_DATA(&m_cam.regs.data[offset]); @@ -3128,14 +3128,14 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_cam_w ) #if defined(DEVICE_S3C2440) -READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_ac97_r ) +uint32_t S3C24_CLASS_NAME::s3c24xx_ac97_r(offs_t offset, uint32_t mem_mask) { const uint32_t data = m_ac97.regs.data[offset]; LOGMASKED(LOG_AC97, "%s: audio codec read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_AC97 + (offset << 2), data, mem_mask); return data; } -WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_ac97_w ) +void S3C24_CLASS_NAME::s3c24xx_ac97_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGMASKED(LOG_AC97, "%s: audio codec write: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_AC97 + (offset << 2), data, mem_mask); COMBINE_DATA(&m_ac97.regs.data[offset]); diff --git a/src/devices/machine/s3c44b0.cpp b/src/devices/machine/s3c44b0.cpp index 009b400210e..6672127e20f 100644 --- a/src/devices/machine/s3c44b0.cpp +++ b/src/devices/machine/s3c44b0.cpp @@ -717,7 +717,7 @@ uint32_t s3c44b0_device::video_update(screen_device &screen, bitmap_rgb32 &bitma return 0; } -READ32_MEMBER( s3c44b0_device::lcd_r ) +uint32_t s3c44b0_device::lcd_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_lcd.regs)[offset]; switch (offset) @@ -820,7 +820,7 @@ void s3c44b0_device::lcd_recalc() lcd_stop(); } -WRITE32_MEMBER( s3c44b0_device::lcd_w ) +void s3c44b0_device::lcd_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_lcd.regs)[offset]; // verboselog( *this, 9, "(LCD) %08X <- %08X\n", S3C44B0_BASE_LCD + (offset << 2), data); @@ -851,14 +851,14 @@ uint32_t s3c44b0_device::get_mclk() return (uint32_t)((double)((mdiv + 8) * clock()) / (double)((pdiv + 2) * (1 << sdiv))); } -READ32_MEMBER( s3c44b0_device::clkpow_r ) +uint32_t s3c44b0_device::clkpow_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_clkpow.regs)[offset]; verboselog( *this, 9, "(CLKPOW) %08X -> %08X\n", S3C44B0_BASE_CLKPOW + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::clkpow_w ) +void s3c44b0_device::clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(CLKPOW) %08X <- %08X\n", S3C44B0_BASE_CLKPOW + (offset << 2), data); COMBINE_DATA(&((uint32_t*)&m_clkpow.regs)[offset]); @@ -973,14 +973,14 @@ void s3c44b0_device::request_eint(uint32_t number) } } -READ32_MEMBER( s3c44b0_device::irq_r ) +uint32_t s3c44b0_device::irq_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_irq.regs)[offset]; verboselog( *this, 9, "(IRQ) %08X -> %08X\n", S3C44B0_BASE_INT + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::irq_w ) +void s3c44b0_device::irq_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(IRQ) %08X <- %08X\n", S3C44B0_BASE_INT + (offset << 2), data); COMBINE_DATA(&((uint32_t*)&m_irq.regs)[offset]); @@ -1023,7 +1023,7 @@ uint16_t s3c44b0_device::pwm_calc_observation(int ch) return cnto; } -READ32_MEMBER( s3c44b0_device::pwm_r ) +uint32_t s3c44b0_device::pwm_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_pwm.regs)[offset]; switch (offset) @@ -1178,7 +1178,7 @@ void s3c44b0_device::pwm_recalc(int timer) pwm_stop(timer); } -WRITE32_MEMBER( s3c44b0_device::pwm_w ) +void s3c44b0_device::pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_pwm.regs)[offset]; verboselog( *this, 9, "(PWM) %08X <- %08X\n", S3C44B0_BASE_PWM + (offset << 2), data); @@ -1344,7 +1344,7 @@ void s3c44b0_device::iic_resume() m_iic.timer->adjust(attotime::from_usec( 1), 0); } -READ32_MEMBER( s3c44b0_device::iic_r ) +uint32_t s3c44b0_device::iic_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_iic.regs)[offset]; switch (offset) @@ -1359,7 +1359,7 @@ READ32_MEMBER( s3c44b0_device::iic_r ) return data; } -WRITE32_MEMBER( s3c44b0_device::iic_w ) +void s3c44b0_device::iic_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_iic.regs)[offset]; verboselog( *this, 9, "(IIC) %08X <- %08X\n", S3C44B0_BASE_IIC + (offset << 2), data); @@ -1469,7 +1469,7 @@ inline void s3c44b0_device::iface_gpio_port_w(int port, uint32_t data) (m_port_w_cb)(port, data, 0xffff); } -READ32_MEMBER( s3c44b0_device::gpio_r ) +uint32_t s3c44b0_device::gpio_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_gpio.regs)[offset]; switch (offset) @@ -1514,7 +1514,7 @@ READ32_MEMBER( s3c44b0_device::gpio_r ) return data; } -WRITE32_MEMBER( s3c44b0_device::gpio_w ) +void s3c44b0_device::gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_gpio.regs)[offset]; verboselog( *this, 9, "(GPIO) %08X <- %08X\n", S3C44B0_BASE_GPIO + (offset << 2), data); @@ -1614,27 +1614,27 @@ void s3c44b0_device::uart_w(int ch, uint32_t offset, uint32_t data, uint32_t mem } } -READ32_MEMBER( s3c44b0_device::uart_0_r ) +uint32_t s3c44b0_device::uart_0_r(offs_t offset, uint32_t mem_mask) { uint32_t data = uart_r(0, offset); // verboselog( *this, 9, "(UART 0) %08X -> %08X\n", S3C44B0_BASE_UART_0 + (offset << 2), data); return data; } -READ32_MEMBER( s3c44b0_device::uart_1_r ) +uint32_t s3c44b0_device::uart_1_r(offs_t offset, uint32_t mem_mask) { uint32_t data = uart_r(1, offset); // verboselog( *this, 9, "(UART 1) %08X -> %08X\n", S3C44B0_BASE_UART_1 + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::uart_0_w ) +void s3c44b0_device::uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(UART 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_UART_0 + (offset << 2), data, mem_mask); uart_w(0, offset, data, mem_mask); } -WRITE32_MEMBER( s3c44b0_device::uart_1_w ) +void s3c44b0_device::uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(UART 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_UART_1 + (offset << 2), data, mem_mask); uart_w(1, offset, data, mem_mask); @@ -1665,7 +1665,7 @@ uint16_t s3c44b0_device::wdt_calc_current_count() return 0; } -READ32_MEMBER( s3c44b0_device::wdt_r ) +uint32_t s3c44b0_device::wdt_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_wdt.regs)[offset]; switch (offset) @@ -1713,7 +1713,7 @@ void s3c44b0_device::wdt_recalc() wdt_stop(); } -WRITE32_MEMBER( s3c44b0_device::wdt_w ) +void s3c44b0_device::wdt_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_wdt.regs)[offset]; verboselog( *this, 9, "(WDT) %08X <- %08X\n", S3C44B0_BASE_WDT + (offset << 2), data); @@ -1747,14 +1747,14 @@ TIMER_CALLBACK_MEMBER( s3c44b0_device::wdt_timer_exp ) /* CPU Wrapper */ -READ32_MEMBER( s3c44b0_device::cpuwrap_r ) +uint32_t s3c44b0_device::cpuwrap_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_cpuwrap.regs)[offset]; verboselog( *this, 9, "(CPUWRAP) %08X -> %08X\n", S3C44B0_BASE_CPU_WRAPPER + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::cpuwrap_w ) +void s3c44b0_device::cpuwrap_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(CPUWRAP) %08X <- %08X\n", S3C44B0_BASE_CPU_WRAPPER + (offset << 2), data); COMBINE_DATA(&((uint32_t*)&m_cpuwrap.regs)[offset]); @@ -1762,7 +1762,7 @@ WRITE32_MEMBER( s3c44b0_device::cpuwrap_w ) /* A/D Converter */ -READ32_MEMBER( s3c44b0_device::adc_r ) +uint32_t s3c44b0_device::adc_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_adc.regs)[offset]; verboselog( *this, 9, "(ADC) %08X -> %08X\n", S3C44B0_BASE_ADC + (offset << 2), data); @@ -1796,7 +1796,7 @@ void s3c44b0_device::adc_recalc() adc_stop(); } -WRITE32_MEMBER( s3c44b0_device::adc_w ) +void s3c44b0_device::adc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_wdt.regs)[offset]; verboselog( *this, 9, "(ADC) %08X <- %08X\n", S3C44B0_BASE_ADC + (offset << 2), data); @@ -1824,7 +1824,7 @@ TIMER_CALLBACK_MEMBER( s3c44b0_device::adc_timer_exp ) /* SIO */ -READ32_MEMBER( s3c44b0_device::sio_r ) +uint32_t s3c44b0_device::sio_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_sio.regs)[offset]; verboselog( *this, 9, "(SIO) %08X -> %08X\n", S3C44B0_BASE_SIO + (offset << 2), data); @@ -1860,7 +1860,7 @@ void s3c44b0_device::sio_recalc() sio_stop(); } -WRITE32_MEMBER( s3c44b0_device::sio_w ) +void s3c44b0_device::sio_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_sio.regs)[offset]; verboselog( *this, 9, "(SIO) %08X <- %08X\n", S3C44B0_BASE_SIO + (offset << 2), data); @@ -1893,7 +1893,7 @@ TIMER_CALLBACK_MEMBER( s3c44b0_device::sio_timer_exp ) /* IIS */ -inline void s3c44b0_device::iface_i2s_data_w(address_space &space, int ch, uint16_t data) +inline void s3c44b0_device::iface_i2s_data_w(int ch, uint16_t data) { if (!m_data_w_cb.isnull()) (m_data_w_cb)(ch, data, 0); @@ -1920,14 +1920,14 @@ void s3c44b0_device::iis_stop() m_iis.timer->adjust(attotime::never, 0); } -READ32_MEMBER( s3c44b0_device::iis_r ) +uint32_t s3c44b0_device::iis_r(offs_t offset, uint32_t mem_mask) { uint32_t data = ((uint32_t*)&m_iis.regs)[offset]; verboselog( *this, 9, "(IIS) %08X -> %08X\n", S3C44B0_BASE_IIS + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::iis_w ) +void s3c44b0_device::iis_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old_value = ((uint32_t*)&m_iis.regs)[offset]; verboselog( *this, 9, "(IIS) %08X <- %08X\n", S3C44B0_BASE_IIS + (offset << 2), data); @@ -1962,8 +1962,8 @@ WRITE32_MEMBER( s3c44b0_device::iis_w ) if (m_iis.fifo_index == 2) { m_iis.fifo_index = 0; - iface_i2s_data_w(space, 0, m_iis.fifo[0]); - iface_i2s_data_w(space, 1, m_iis.fifo[1]); + iface_i2s_data_w(0, m_iis.fifo[0]); + iface_i2s_data_w(1, m_iis.fifo[1]); } } break; @@ -2067,27 +2067,27 @@ void s3c44b0_device::zdma_w(int ch, uint32_t offset, uint32_t data, uint32_t mem } } -READ32_MEMBER( s3c44b0_device::zdma_0_r ) +uint32_t s3c44b0_device::zdma_0_r(offs_t offset, uint32_t mem_mask) { uint32_t data = zdma_r(0, offset); verboselog( *this, 9, "(ZDMA 0) %08X -> %08X\n", S3C44B0_BASE_ZDMA_0 + (offset << 2), data); return data; } -READ32_MEMBER( s3c44b0_device::zdma_1_r ) +uint32_t s3c44b0_device::zdma_1_r(offs_t offset, uint32_t mem_mask) { uint32_t data = zdma_r(1, offset); verboselog( *this, 9, "(ZDMA 1) %08X -> %08X\n", S3C44B0_BASE_ZDMA_1 + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::zdma_0_w ) +void s3c44b0_device::zdma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(ZDMA 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_ZDMA_0 + (offset << 2), data, mem_mask); zdma_w(0, offset, data, mem_mask); } -WRITE32_MEMBER( s3c44b0_device::zdma_1_w ) +void s3c44b0_device::zdma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(ZDMA 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_ZDMA_1 + (offset << 2), data, mem_mask); zdma_w(1, offset, data, mem_mask); @@ -2207,27 +2207,27 @@ void s3c44b0_device::bdma_w(int ch, uint32_t offset, uint32_t data, uint32_t mem } } -READ32_MEMBER( s3c44b0_device::bdma_0_r ) +uint32_t s3c44b0_device::bdma_0_r(offs_t offset, uint32_t mem_mask) { uint32_t data = bdma_r(0, offset); verboselog( *this, 9, "(BDMA 0) %08X -> %08X\n", S3C44B0_BASE_BDMA_0 + (offset << 2), data); return data; } -READ32_MEMBER( s3c44b0_device::bdma_1_r ) +uint32_t s3c44b0_device::bdma_1_r(offs_t offset, uint32_t mem_mask) { uint32_t data = bdma_r(1, offset); verboselog( *this, 9, "(BDMA 1) %08X -> %08X\n", S3C44B0_BASE_BDMA_1 + (offset << 2), data); return data; } -WRITE32_MEMBER( s3c44b0_device::bdma_0_w ) +void s3c44b0_device::bdma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(BDMA 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_BDMA_0 + (offset << 2), data, mem_mask); bdma_w(0, offset, data, mem_mask); } -WRITE32_MEMBER( s3c44b0_device::bdma_1_w ) +void s3c44b0_device::bdma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { verboselog( *this, 9, "(BDMA 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_BDMA_1 + (offset << 2), data, mem_mask); bdma_w(1, offset, data, mem_mask); diff --git a/src/devices/machine/s3c44b0.h b/src/devices/machine/s3c44b0.h index 89dfa020920..e082937ea83 100644 --- a/src/devices/machine/s3c44b0.h +++ b/src/devices/machine/s3c44b0.h @@ -125,41 +125,41 @@ public: auto adc_data_r_cb() { return m_data_r_cb.bind(); } auto i2s_data_w_cb() { return m_data_w_cb.bind(); } - DECLARE_READ32_MEMBER(lcd_r); - DECLARE_READ32_MEMBER(clkpow_r); - DECLARE_READ32_MEMBER(irq_r); - DECLARE_READ32_MEMBER(pwm_r); - DECLARE_READ32_MEMBER(iic_r); - DECLARE_READ32_MEMBER(gpio_r); - DECLARE_READ32_MEMBER(uart_0_r); - DECLARE_READ32_MEMBER(uart_1_r); - DECLARE_READ32_MEMBER(wdt_r); - DECLARE_READ32_MEMBER(cpuwrap_r); - DECLARE_READ32_MEMBER(adc_r); - DECLARE_READ32_MEMBER(sio_r); - DECLARE_READ32_MEMBER(iis_r); - DECLARE_READ32_MEMBER(zdma_0_r); - DECLARE_READ32_MEMBER(zdma_1_r); - DECLARE_READ32_MEMBER(bdma_0_r); - DECLARE_READ32_MEMBER(bdma_1_r); - - DECLARE_WRITE32_MEMBER(lcd_w); - DECLARE_WRITE32_MEMBER(clkpow_w); - DECLARE_WRITE32_MEMBER(irq_w); - DECLARE_WRITE32_MEMBER(pwm_w); - DECLARE_WRITE32_MEMBER(iic_w); - DECLARE_WRITE32_MEMBER(gpio_w); - DECLARE_WRITE32_MEMBER(uart_0_w); - DECLARE_WRITE32_MEMBER(uart_1_w); - DECLARE_WRITE32_MEMBER(wdt_w); - DECLARE_WRITE32_MEMBER(cpuwrap_w); - DECLARE_WRITE32_MEMBER(adc_w); - DECLARE_WRITE32_MEMBER(sio_w); - DECLARE_WRITE32_MEMBER(iis_w); - DECLARE_WRITE32_MEMBER(zdma_0_w); - DECLARE_WRITE32_MEMBER(zdma_1_w); - DECLARE_WRITE32_MEMBER(bdma_0_w); - DECLARE_WRITE32_MEMBER(bdma_1_w); + uint32_t lcd_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t clkpow_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t irq_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t pwm_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t iic_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t gpio_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t uart_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t uart_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t wdt_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t cpuwrap_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t adc_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t sio_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t iis_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t zdma_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t zdma_1_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t bdma_0_r(offs_t offset, uint32_t mem_mask = ~0); + uint32_t bdma_1_r(offs_t offset, uint32_t mem_mask = ~0); + + void lcd_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void irq_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void iic_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void wdt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void cpuwrap_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void adc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void sio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void iis_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void zdma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void zdma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void bdma_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void bdma_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void request_eint(uint32_t number); uint32_t video_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -553,7 +553,7 @@ private: TIMER_CALLBACK_MEMBER(sio_timer_exp); // IIS - inline void iface_i2s_data_w(address_space &space, int ch, uint16_t data); + inline void iface_i2s_data_w(int ch, uint16_t data); void iis_start(); void iis_stop(); TIMER_CALLBACK_MEMBER(iis_timer_exp); diff --git a/src/devices/machine/scc68070.cpp b/src/devices/machine/scc68070.cpp index 2363b01637f..f9489edbf57 100644 --- a/src/devices/machine/scc68070.cpp +++ b/src/devices/machine/scc68070.cpp @@ -1241,7 +1241,7 @@ void scc68070_device::mmu_w(offs_t offset, uint16_t data, uint16_t mem_mask) } #if ENABLE_UART_PRINTING -READ16_MEMBER( scc68070_device::uart_loopback_enable ) +uint16_t scc68070_device::uart_loopback_enable() { return 0x1234; } diff --git a/src/devices/machine/sega_scu.cpp b/src/devices/machine/sega_scu.cpp index cbfcdf644b4..d7a0bf521cb 100644 --- a/src/devices/machine/sega_scu.cpp +++ b/src/devices/machine/sega_scu.cpp @@ -571,14 +571,14 @@ inline void sega_scu_device::dma_start_factor_ack(uint8_t event) } } -READ32_MEMBER(sega_scu_device::dma_lv0_r) { return dma_common_r(offset,0); } -WRITE32_MEMBER(sega_scu_device::dma_lv0_w) { dma_common_w(offset,0,data); } -READ32_MEMBER(sega_scu_device::dma_lv1_r) { return dma_common_r(offset,1); } -WRITE32_MEMBER(sega_scu_device::dma_lv1_w) { dma_common_w(offset,1,data); } -READ32_MEMBER(sega_scu_device::dma_lv2_r) { return dma_common_r(offset,2); } -WRITE32_MEMBER(sega_scu_device::dma_lv2_w) { dma_common_w(offset,2,data); } +uint32_t sega_scu_device::dma_lv0_r(offs_t offset) { return dma_common_r(offset,0); } +void sega_scu_device::dma_lv0_w(offs_t offset, uint32_t data) { dma_common_w(offset,0,data); } +uint32_t sega_scu_device::dma_lv1_r(offs_t offset) { return dma_common_r(offset,1); } +void sega_scu_device::dma_lv1_w(offs_t offset, uint32_t data) { dma_common_w(offset,1,data); } +uint32_t sega_scu_device::dma_lv2_r(offs_t offset) { return dma_common_r(offset,2); } +void sega_scu_device::dma_lv2_w(offs_t offset, uint32_t data) { dma_common_w(offset,2,data); } -READ32_MEMBER(sega_scu_device::dma_status_r) +uint32_t sega_scu_device::dma_status_r() { return m_status; } @@ -587,12 +587,12 @@ READ32_MEMBER(sega_scu_device::dma_status_r) // Timers //************************************************************************** -WRITE32_MEMBER(sega_scu_device::t0_compare_w ) +void sega_scu_device::t0_compare_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_t0c); } -WRITE32_MEMBER(sega_scu_device::t1_setdata_w ) +void sega_scu_device::t1_setdata_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_t1s); } @@ -601,7 +601,7 @@ WRITE32_MEMBER(sega_scu_device::t1_setdata_w ) ---- ---x ---- ---- T1MD Timer 1 mode (0=each line, 1=only at timer 0 lines) ---- ---- ---- ---x TENB Timers enable */ -WRITE16_MEMBER(sega_scu_device::t1_mode_w ) +void sega_scu_device::t1_mode_w(uint16_t data) { m_t1md = BIT(data,8); m_tenb = BIT(data,0); @@ -649,23 +649,23 @@ void sega_scu_device::check_scanline_timers(int scanline,int y_step) // Interrupt //************************************************************************** -READ32_MEMBER(sega_scu_device::irq_mask_r) +uint32_t sega_scu_device::irq_mask_r() { return m_ism; } -READ32_MEMBER(sega_scu_device::irq_status_r) +uint32_t sega_scu_device::irq_status_r() { return m_ist; } -WRITE32_MEMBER(sega_scu_device::irq_mask_w) +void sega_scu_device::irq_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ism); test_pending_irqs(); } -WRITE32_MEMBER(sega_scu_device::irq_status_w) +void sega_scu_device::irq_status_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if(mem_mask != 0xffffffff) logerror("%s IST write %08x with %08x\n",this->tag(),data,mem_mask); @@ -797,7 +797,7 @@ WRITE_LINE_MEMBER(sega_scu_device::scudsp_end_w) // Miscellanea //************************************************************************** -READ32_MEMBER(sega_scu_device::version_r) +uint32_t sega_scu_device::version_r() { return 4; // correct for stock Saturn at least } diff --git a/src/devices/machine/sega_scu.h b/src/devices/machine/sega_scu.h index fb1a0672884..ae751b09d2f 100644 --- a/src/devices/machine/sega_scu.h +++ b/src/devices/machine/sega_scu.h @@ -114,24 +114,24 @@ private: void scudsp_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); // DMA - DECLARE_READ32_MEMBER(dma_lv0_r); - DECLARE_WRITE32_MEMBER(dma_lv0_w); - DECLARE_READ32_MEMBER(dma_lv1_r); - DECLARE_WRITE32_MEMBER(dma_lv1_w); - DECLARE_READ32_MEMBER(dma_lv2_r); - DECLARE_WRITE32_MEMBER(dma_lv2_w); - DECLARE_READ32_MEMBER(dma_status_r); + uint32_t dma_lv0_r(offs_t offset); + void dma_lv0_w(offs_t offset, uint32_t data); + uint32_t dma_lv1_r(offs_t offset); + void dma_lv1_w(offs_t offset, uint32_t data); + uint32_t dma_lv2_r(offs_t offset); + void dma_lv2_w(offs_t offset, uint32_t data); + uint32_t dma_status_r(); // Timers - DECLARE_WRITE32_MEMBER(t0_compare_w); - DECLARE_WRITE32_MEMBER(t1_setdata_w); - DECLARE_WRITE16_MEMBER(t1_mode_w); + void t0_compare_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void t1_setdata_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void t1_mode_w(uint16_t data); // Interrupt - DECLARE_READ32_MEMBER(irq_mask_r); - DECLARE_READ32_MEMBER(irq_status_r); - DECLARE_WRITE32_MEMBER(irq_mask_w); - DECLARE_WRITE32_MEMBER(irq_status_w); - DECLARE_READ32_MEMBER(version_r); + uint32_t irq_mask_r(); + uint32_t irq_status_r(); + void irq_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + void irq_status_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t version_r(); }; diff --git a/src/devices/machine/sis85c496.cpp b/src/devices/machine/sis85c496.cpp index 5b03f841dfa..1af083c24d9 100644 --- a/src/devices/machine/sis85c496.cpp +++ b/src/devices/machine/sis85c496.cpp @@ -361,7 +361,7 @@ WRITE_LINE_MEMBER( sis85c496_host_device::at_pit8254_out2_changed ) m_speaker->level_w(m_at_spkrdata & m_pit_out2); } -READ8_MEMBER( sis85c496_host_device::at_page8_r ) +uint8_t sis85c496_host_device::at_page8_r(offs_t offset) { uint8_t data = m_at_pages[offset % 0x10]; @@ -384,7 +384,7 @@ READ8_MEMBER( sis85c496_host_device::at_page8_r ) } -WRITE8_MEMBER( sis85c496_host_device::at_page8_w ) +void sis85c496_host_device::at_page8_w(offs_t offset, uint8_t data) { m_at_pages[offset % 0x10] = data; @@ -517,7 +517,7 @@ WRITE_LINE_MEMBER( sis85c496_host_device::pc_dack5_w ) { pc_select_dma_channel(5 WRITE_LINE_MEMBER( sis85c496_host_device::pc_dack6_w ) { pc_select_dma_channel(6, state); } WRITE_LINE_MEMBER( sis85c496_host_device::pc_dack7_w ) { pc_select_dma_channel(7, state); } -READ8_MEMBER( sis85c496_host_device::at_portb_r ) +uint8_t sis85c496_host_device::at_portb_r() { uint8_t data = m_at_speaker; data &= ~0xd0; /* AT BIOS don't likes this being set */ @@ -533,7 +533,7 @@ READ8_MEMBER( sis85c496_host_device::at_portb_r ) return data; } -WRITE8_MEMBER( sis85c496_host_device::at_portb_w ) +void sis85c496_host_device::at_portb_w(uint8_t data) { m_at_speaker = data; m_pit8254->write_gate2(BIT(data, 0)); @@ -542,38 +542,38 @@ WRITE8_MEMBER( sis85c496_host_device::at_portb_w ) //m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0)); } -READ8_MEMBER( sis85c496_host_device::at_dma8237_2_r ) +uint8_t sis85c496_host_device::at_dma8237_2_r(offs_t offset) { return m_dma8237_2->read( offset / 2); } -WRITE8_MEMBER( sis85c496_host_device::at_dma8237_2_w ) +void sis85c496_host_device::at_dma8237_2_w(offs_t offset, uint8_t data) { m_dma8237_2->write( offset / 2, data); } -READ8_MEMBER( sis85c496_host_device::at_keybc_r ) +uint8_t sis85c496_host_device::at_keybc_r(offs_t offset) { switch (offset) { case 0: return m_keybc->data_r(); - case 1: return at_portb_r(space, 0); + case 1: return at_portb_r(); } return 0xff; } -WRITE8_MEMBER( sis85c496_host_device::at_keybc_w ) +void sis85c496_host_device::at_keybc_w(offs_t offset, uint8_t data) { switch (offset) { case 0: m_keybc->data_w(data); break; - case 1: at_portb_w(space, 0, data); break; + case 1: at_portb_w(data); break; } } -WRITE8_MEMBER( sis85c496_host_device::write_rtc ) +void sis85c496_host_device::write_rtc(offs_t offset, uint8_t data) { if (offset==0) { m_nmi_enabled = BIT(data,7); diff --git a/src/devices/machine/sis85c496.h b/src/devices/machine/sis85c496.h index 7d157107352..05bd11d5d56 100644 --- a/src/devices/machine/sis85c496.h +++ b/src/devices/machine/sis85c496.h @@ -87,24 +87,24 @@ private: void internal_io_map(address_map &map); - DECLARE_READ8_MEMBER (dram_config_r) { return m_dram_config; } - DECLARE_WRITE8_MEMBER(dram_config_w) { m_dram_config = data; remap_cb(); } - DECLARE_READ8_MEMBER (bios_config_r) { return m_bios_config; } - DECLARE_WRITE8_MEMBER(bios_config_w) { m_bios_config = data; remap_cb(); } - DECLARE_READ32_MEMBER(mailbox_r) { return m_mailbox; } - DECLARE_WRITE32_MEMBER(mailbox_w) { COMBINE_DATA(&m_mailbox); } - DECLARE_READ8_MEMBER (isa_decoder_r) { return m_isa_decoder; } - DECLARE_WRITE8_MEMBER(isa_decoder_w) { m_isa_decoder = data; remap_cb(); } - DECLARE_READ16_MEMBER(shadow_config_r) { return m_shadctrl; } - DECLARE_WRITE16_MEMBER(shadow_config_w) { COMBINE_DATA(&m_shadctrl); logerror("SiS496: %04x to shadow control\n", m_shadctrl); remap_cb(); } - DECLARE_READ8_MEMBER (smram_ctrl_r) { return m_smramctrl; } - DECLARE_WRITE8_MEMBER(smram_ctrl_w) { m_smramctrl = data; remap_cb(); } + uint8_t dram_config_r() { return m_dram_config; } + void dram_config_w(uint8_t data) { m_dram_config = data; remap_cb(); } + uint8_t bios_config_r() { return m_bios_config; } + void bios_config_w(uint8_t data) { m_bios_config = data; remap_cb(); } + uint32_t mailbox_r() { return m_mailbox; } + void mailbox_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { COMBINE_DATA(&m_mailbox); } + uint8_t isa_decoder_r() { return m_isa_decoder; } + void isa_decoder_w(uint8_t data) { m_isa_decoder = data; remap_cb(); } + uint16_t shadow_config_r() { return m_shadctrl; } + void shadow_config_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_shadctrl); logerror("SiS496: %04x to shadow control\n", m_shadctrl); remap_cb(); } + uint8_t smram_ctrl_r() { return m_smramctrl; } + void smram_ctrl_w(uint8_t data) { m_smramctrl = data; remap_cb(); } // southbridge - DECLARE_READ8_MEMBER(at_page8_r); - DECLARE_WRITE8_MEMBER(at_page8_w); - DECLARE_READ8_MEMBER(at_portb_r); - DECLARE_WRITE8_MEMBER(at_portb_w); + uint8_t at_page8_r(offs_t offset); + void at_page8_w(offs_t offset, uint8_t data); + uint8_t at_portb_r(); + void at_portb_w(uint8_t data); uint8_t get_slave_ack(offs_t offset); DECLARE_WRITE_LINE_MEMBER(at_pit8254_out0_changed); DECLARE_WRITE_LINE_MEMBER(at_pit8254_out1_changed); @@ -133,15 +133,11 @@ private: DECLARE_WRITE_LINE_MEMBER(pc_dack5_w); DECLARE_WRITE_LINE_MEMBER(pc_dack6_w); DECLARE_WRITE_LINE_MEMBER(pc_dack7_w); - DECLARE_READ8_MEMBER(ide_read_cs1_r); - DECLARE_WRITE8_MEMBER(ide_write_cs1_w); - DECLARE_READ8_MEMBER(ide2_read_cs1_r); - DECLARE_WRITE8_MEMBER(ide2_write_cs1_w); - DECLARE_READ8_MEMBER(at_dma8237_2_r); - DECLARE_WRITE8_MEMBER(at_dma8237_2_w); - DECLARE_READ8_MEMBER(at_keybc_r); - DECLARE_WRITE8_MEMBER(at_keybc_w); - DECLARE_WRITE8_MEMBER(write_rtc); + uint8_t at_dma8237_2_r(offs_t offset); + void at_dma8237_2_w(offs_t offset, uint8_t data); + uint8_t at_keybc_r(offs_t offset); + void at_keybc_w(offs_t offset, uint8_t data); + void write_rtc(offs_t offset, uint8_t data); uint8_t pc_dma_read_byte(offs_t offset); void pc_dma_write_byte(offs_t offset, uint8_t data); uint8_t pc_dma_read_word(offs_t offset); diff --git a/src/devices/machine/smpc.h b/src/devices/machine/smpc.h index f727b4852e4..b62d13dc1d3 100644 --- a/src/devices/machine/smpc.h +++ b/src/devices/machine/smpc.h @@ -1,10 +1,10 @@ // license:LGPL-2.1+ // copyright-holders:Angelo Salese, R. Belmont // TODO: make separate device when code is decoupled better -//DECLARE_WRITE8_MEMBER( stv_SMPC_w ); -//DECLARE_READ8_MEMBER( stv_SMPC_r ); -//DECLARE_WRITE8_MEMBER( saturn_SMPC_w ); -//DECLARE_READ8_MEMBER( saturn_SMPC_r ); +//void stv_SMPC_w(offs_t offset, uint8_t data); +//uint8_t stv_SMPC_r(offs_t offset); +//void saturn_SMPC_w(offs_t offset, uint8_t data); +//uint8_t saturn_SMPC_r(offs_t offset); #ifndef MAME_MACHINE_SMPC_HLE_H #define MAME_MACHINE_SMPC_HLE_H diff --git a/src/devices/machine/spg110_video.cpp b/src/devices/machine/spg110_video.cpp index 067f901e22a..93ad10ae0c0 100644 --- a/src/devices/machine/spg110_video.cpp +++ b/src/devices/machine/spg110_video.cpp @@ -339,7 +339,7 @@ device_memory_interface::space_config_vector spg110_video_device::memory_space_c // irq source or similar? -READ16_MEMBER(spg110_video_device::spg110_2063_r) +uint16_t spg110_video_device::spg110_2063_r() { // checks for bits 0x20 and 0x08 in the IRQ function (all IRQs point to the same place) @@ -347,7 +347,7 @@ READ16_MEMBER(spg110_video_device::spg110_2063_r) return m_video_irq_status | 0x0600; /* | 0x0002; */ } -WRITE16_MEMBER(spg110_video_device::spg110_2063_w) +void spg110_video_device::spg110_2063_w(uint16_t data) { // writes 0x28, probably clears the IRQ / IRQ sources? 0x63 is the same offset for this in spg2xx but bits used seem to be different const uint16_t old = m_video_irq_enable & m_video_irq_status; @@ -358,52 +358,52 @@ WRITE16_MEMBER(spg110_video_device::spg110_2063_w) } -WRITE16_MEMBER(spg110_video_device::spg110_201c_w) { logerror("%s: 201c: %04x\n", machine().describe_context(), data); } // during startup text only -WRITE16_MEMBER(spg110_video_device::spg110_2020_w) { COMBINE_DATA(&m_tilebase); logerror("%s: 2020: %04x\n", machine().describe_context(), data); } // confirmed as tile base, seems to apply to both layers and sprites, unlike spg2xx which has separate registers +void spg110_video_device::spg110_201c_w(uint16_t data) { logerror("%s: 201c: %04x\n", machine().describe_context(), data); } // during startup text only +void spg110_video_device::spg110_2020_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_tilebase); logerror("%s: 2020: %04x\n", machine().describe_context(), data); } // confirmed as tile base, seems to apply to both layers and sprites, unlike spg2xx which has separate registers -WRITE16_MEMBER(spg110_video_device::spg110_2028_w) { logerror("%s: 2028: %04x\n", machine().describe_context(), data); } // startup -READ16_MEMBER(spg110_video_device::spg110_2028_r) { return 0x0000; } +void spg110_video_device::spg110_2028_w(uint16_t data) { logerror("%s: 2028: %04x\n", machine().describe_context(), data); } // startup +uint16_t spg110_video_device::spg110_2028_r() { return 0x0000; } -WRITE16_MEMBER(spg110_video_device::spg110_2029_w) { logerror("%s: 2029: %04x\n", machine().describe_context(), data); } // 0006, 0008 on startup -READ16_MEMBER(spg110_video_device::spg110_2029_r) { return 0x0000; } +void spg110_video_device::spg110_2029_w(uint16_t data) { logerror("%s: 2029: %04x\n", machine().describe_context(), data); } // 0006, 0008 on startup +uint16_t spg110_video_device::spg110_2029_r() { return 0x0000; } -WRITE16_MEMBER(spg110_video_device::spg110_2031_w) { logerror("%s: 2031: %04x\n", machine().describe_context(), data); } // 014a or 0000 when ball is in trap -WRITE16_MEMBER(spg110_video_device::spg110_2032_w) { logerror("%s: 2032: %04x\n", machine().describe_context(), data); } // 014a most of the time, 0000 very rarely -WRITE16_MEMBER(spg110_video_device::spg110_2033_w) { logerror("%s: 2033: %04x\n", machine().describe_context(), data); } // changes, situational, eg when pausing -WRITE16_MEMBER(spg110_video_device::spg110_2034_w) { logerror("%s: 2034: %04x\n", machine().describe_context(), data); } // 0141 on every scene transition -WRITE16_MEMBER(spg110_video_device::spg110_2035_w) { logerror("%s: 2035: %04x\n", machine().describe_context(), data); } // 0141 on every scene transition -WRITE16_MEMBER(spg110_video_device::spg110_2036_w) { logerror("%s: 2036: %04x\n", machine().describe_context(), data); COMBINE_DATA(&m_2036_scroll); } // seems related to ball y position, not scrolling (possibly shadow sprite related?) +void spg110_video_device::spg110_2031_w(uint16_t data) { logerror("%s: 2031: %04x\n", machine().describe_context(), data); } // 014a or 0000 when ball is in trap +void spg110_video_device::spg110_2032_w(uint16_t data) { logerror("%s: 2032: %04x\n", machine().describe_context(), data); } // 014a most of the time, 0000 very rarely +void spg110_video_device::spg110_2033_w(uint16_t data) { logerror("%s: 2033: %04x\n", machine().describe_context(), data); } // changes, situational, eg when pausing +void spg110_video_device::spg110_2034_w(uint16_t data) { logerror("%s: 2034: %04x\n", machine().describe_context(), data); } // 0141 on every scene transition +void spg110_video_device::spg110_2035_w(uint16_t data) { logerror("%s: 2035: %04x\n", machine().describe_context(), data); } // 0141 on every scene transition +void spg110_video_device::spg110_2036_w(offs_t offset, uint16_t data, uint16_t mem_mask) { logerror("%s: 2036: %04x\n", machine().describe_context(), data); COMBINE_DATA(&m_2036_scroll); } // seems related to ball y position, not scrolling (possibly shadow sprite related?) -READ16_MEMBER(spg110_video_device::spg110_2037_r) { return 0x0000; } // added to something from the PRNG -WRITE16_MEMBER(spg110_video_device::spg110_2037_w) { logerror("%s: 2037: %04x\n", machine().describe_context(), data); } // 0126 (always?) +uint16_t spg110_video_device::spg110_2037_r() { return 0x0000; } // added to something from the PRNG +void spg110_video_device::spg110_2037_w(uint16_t data) { logerror("%s: 2037: %04x\n", machine().describe_context(), data); } // 0126 (always?) -WRITE16_MEMBER(spg110_video_device::spg110_2039_w) { logerror("%s: 2039: %04x\n", machine().describe_context(), data); } // 0803 on every scene transition +void spg110_video_device::spg110_2039_w(uint16_t data) { logerror("%s: 2039: %04x\n", machine().describe_context(), data); } // 0803 on every scene transition -WRITE16_MEMBER(spg110_video_device::spg110_203c_w) { logerror("%s: 203c: %04x\n", machine().describe_context(), data); } // 0006 on startup, twice +void spg110_video_device::spg110_203c_w(uint16_t data) { logerror("%s: 203c: %04x\n", machine().describe_context(), data); } // 0006 on startup, twice -WRITE16_MEMBER(spg110_video_device::spg110_203d_w) { logerror("%s: 203d: %04x\n", machine().describe_context(), data); } // changes, usually between scenes +void spg110_video_device::spg110_203d_w(uint16_t data) { logerror("%s: 203d: %04x\n", machine().describe_context(), data); } // changes, usually between scenes -READ16_MEMBER(spg110_video_device::spg110_2042_r) { return 0x0000; } -WRITE16_MEMBER(spg110_video_device::spg110_2042_w) { logerror("%s: 2042: %04x\n", machine().describe_context(), data); } // sets bit 0x0004, masks with 0xfffb etc. +uint16_t spg110_video_device::spg110_2042_r() { return 0x0000; } +void spg110_video_device::spg110_2042_w(uint16_t data) { logerror("%s: 2042: %04x\n", machine().describe_context(), data); } // sets bit 0x0004, masks with 0xfffb etc. -WRITE16_MEMBER(spg110_video_device::spg110_2045_w) { logerror("%s: 2045: %04x\n", machine().describe_context(), data); } // 0006 on startup, once +void spg110_video_device::spg110_2045_w(uint16_t data) { logerror("%s: 2045: %04x\n", machine().describe_context(), data); } // 0006 on startup, once -WRITE16_MEMBER(spg110_video_device::spg110_205x_w) +void spg110_video_device::spg110_205x_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_palctrlram[offset]); } -WRITE16_MEMBER(spg110_video_device::dma_unk_2061_w) { COMBINE_DATA(&m_dma_unk_2061); } -WRITE16_MEMBER(spg110_video_device::dma_dst_step_w) { COMBINE_DATA(&m_dma_dst_step); } -WRITE16_MEMBER(spg110_video_device::dma_unk_2067_w) { COMBINE_DATA(&m_dma_src_high); } -WRITE16_MEMBER(spg110_video_device::dma_src_step_w) { COMBINE_DATA(&m_dma_src_step); } +void spg110_video_device::dma_unk_2061_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_dma_unk_2061); } +void spg110_video_device::dma_dst_step_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_dma_dst_step); } +void spg110_video_device::dma_unk_2067_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_dma_src_high); } +void spg110_video_device::dma_src_step_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_dma_src_step); } -WRITE16_MEMBER(spg110_video_device::dma_dst_w) { COMBINE_DATA(&m_dma_dst); } -WRITE16_MEMBER(spg110_video_device::dma_src_w) { COMBINE_DATA(&m_dma_src); } +void spg110_video_device::dma_dst_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_dma_dst); } +void spg110_video_device::dma_src_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_dma_src); } -WRITE16_MEMBER(spg110_video_device::dma_len_trigger_w) +void spg110_video_device::dma_len_trigger_w(uint16_t data) { int length = data & 0x1fff; @@ -452,25 +452,25 @@ WRITE16_MEMBER(spg110_video_device::dma_len_trigger_w) } } -WRITE16_MEMBER(spg110_video_device::dma_manual_w) +void spg110_video_device::dma_manual_w(uint16_t data) { this->space(0).write_word(m_dma_dst * 2, data, 0xffff); } -READ16_MEMBER(spg110_video_device::dma_manual_r) +uint16_t spg110_video_device::dma_manual_r() { uint16_t val = this->space(0).read_word(m_dma_dst * 2); return val; } -READ16_MEMBER(spg110_video_device::dma_len_status_r) +uint16_t spg110_video_device::dma_len_status_r() { return 0x1fff; // DMA related? } -READ16_MEMBER(spg110_video_device::tmap0_regs_r) { return tmap0_regs[offset]; } -READ16_MEMBER(spg110_video_device::tmap1_regs_r) { return tmap1_regs[offset]; } +uint16_t spg110_video_device::tmap0_regs_r(offs_t offset) { return tmap0_regs[offset]; } +uint16_t spg110_video_device::tmap1_regs_r(offs_t offset) { return tmap1_regs[offset]; } void spg110_video_device::tilemap_write_regs(int which, uint16_t* regs, int regno, uint16_t data) { @@ -513,13 +513,13 @@ void spg110_video_device::tilemap_write_regs(int which, uint16_t* regs, int regn } -WRITE16_MEMBER(spg110_video_device::tmap0_regs_w) +void spg110_video_device::tmap0_regs_w(offs_t offset, uint16_t data) { tilemap_write_regs(0, tmap0_regs,offset,data); } -WRITE16_MEMBER(spg110_video_device::tmap1_regs_w) +void spg110_video_device::tmap1_regs_w(offs_t offset, uint16_t data) { tilemap_write_regs(1, tmap1_regs,offset,data); } @@ -581,7 +581,7 @@ double spg110_video_device::hue2rgb(double p, double q, double t) // wrong format! -WRITE16_MEMBER(spg110_video_device::palette_w) +void spg110_video_device::palette_w(offs_t offset, uint16_t data, uint16_t mem_mask) { // probably not const double h_add = 0.65f; diff --git a/src/devices/machine/spg110_video.h b/src/devices/machine/spg110_video.h index 59b052c4476..8d46ef6c7f3 100644 --- a/src/devices/machine/spg110_video.h +++ b/src/devices/machine/spg110_video.h @@ -35,56 +35,56 @@ public: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); DECLARE_WRITE_LINE_MEMBER(vblank); - DECLARE_WRITE16_MEMBER(spg110_201c_w); - DECLARE_WRITE16_MEMBER(spg110_2020_w); + void spg110_201c_w(uint16_t data); + void spg110_2020_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - DECLARE_WRITE16_MEMBER(spg110_2028_w); - DECLARE_WRITE16_MEMBER(spg110_2029_w); + void spg110_2028_w(uint16_t data); + void spg110_2029_w(uint16_t data); - DECLARE_READ16_MEMBER(spg110_2028_r); - DECLARE_READ16_MEMBER(spg110_2029_r); + uint16_t spg110_2028_r(); + uint16_t spg110_2029_r(); - DECLARE_WRITE16_MEMBER(spg110_2031_w); - DECLARE_WRITE16_MEMBER(spg110_2032_w); - DECLARE_WRITE16_MEMBER(spg110_2033_w); - DECLARE_WRITE16_MEMBER(spg110_2034_w); - DECLARE_WRITE16_MEMBER(spg110_2035_w); - DECLARE_WRITE16_MEMBER(spg110_2036_w); - DECLARE_WRITE16_MEMBER(spg110_2037_w); - DECLARE_WRITE16_MEMBER(spg110_2039_w); + void spg110_2031_w(uint16_t data); + void spg110_2032_w(uint16_t data); + void spg110_2033_w(uint16_t data); + void spg110_2034_w(uint16_t data); + void spg110_2035_w(uint16_t data); + void spg110_2036_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void spg110_2037_w(uint16_t data); + void spg110_2039_w(uint16_t data); - DECLARE_WRITE16_MEMBER(spg110_203c_w); - DECLARE_WRITE16_MEMBER(spg110_203d_w); + void spg110_203c_w(uint16_t data); + void spg110_203d_w(uint16_t data); - DECLARE_WRITE16_MEMBER(spg110_2042_w); + void spg110_2042_w(uint16_t data); - DECLARE_WRITE16_MEMBER(spg110_2045_w); + void spg110_2045_w(uint16_t data); - DECLARE_WRITE16_MEMBER(spg110_205x_w); + void spg110_205x_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - DECLARE_READ16_MEMBER(spg110_2037_r); - DECLARE_READ16_MEMBER(spg110_2042_r); + uint16_t spg110_2037_r(); + uint16_t spg110_2042_r(); - DECLARE_WRITE16_MEMBER(dma_dst_w); - DECLARE_WRITE16_MEMBER(dma_unk_2061_w); - DECLARE_WRITE16_MEMBER(dma_len_trigger_w); - DECLARE_WRITE16_MEMBER(spg110_2063_w); - DECLARE_WRITE16_MEMBER(dma_dst_step_w); - DECLARE_WRITE16_MEMBER(dma_src_w); - DECLARE_WRITE16_MEMBER(dma_unk_2067_w); - DECLARE_WRITE16_MEMBER(dma_src_step_w); + void dma_dst_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void dma_unk_2061_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void dma_len_trigger_w(uint16_t data); + void spg110_2063_w(uint16_t data); + void dma_dst_step_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void dma_src_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void dma_unk_2067_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void dma_src_step_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - DECLARE_READ16_MEMBER(dma_len_status_r); - DECLARE_READ16_MEMBER(spg110_2063_r); + uint16_t dma_len_status_r(); + uint16_t spg110_2063_r(); - DECLARE_READ16_MEMBER(dma_manual_r); - DECLARE_WRITE16_MEMBER(dma_manual_w); + uint16_t dma_manual_r(); + void dma_manual_w(uint16_t data); - DECLARE_READ16_MEMBER(tmap0_regs_r); - DECLARE_READ16_MEMBER(tmap1_regs_r); - DECLARE_WRITE16_MEMBER(tmap0_regs_w); - DECLARE_WRITE16_MEMBER(tmap1_regs_w); + uint16_t tmap0_regs_r(offs_t offset); + uint16_t tmap1_regs_r(offs_t offset); + void tmap0_regs_w(offs_t offset, uint16_t data); + void tmap1_regs_w(offs_t offset, uint16_t data); auto write_video_irq_callback() { return m_video_irq_cb.bind(); }; @@ -131,7 +131,7 @@ private: required_shared_ptr<uint16_t> m_sprattr1; required_shared_ptr<uint16_t> m_sprattr2; - DECLARE_WRITE16_MEMBER(palette_w); + void palette_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint16_t tmap0_regs[0x6]; uint16_t tmap1_regs[0x6]; diff --git a/src/devices/machine/spg2xx_audio.cpp b/src/devices/machine/spg2xx_audio.cpp index 40db5a1f341..f1ffd871f28 100644 --- a/src/devices/machine/spg2xx_audio.cpp +++ b/src/devices/machine/spg2xx_audio.cpp @@ -200,7 +200,7 @@ void spg2xx_audio_device::check_irqs(const uint16_t changed) } } -READ16_MEMBER(spg2xx_audio_device::audio_ctrl_r) +uint16_t spg2xx_audio_device::audio_ctrl_r(offs_t offset) { uint16_t data = m_audio_ctrl_regs[offset]; @@ -332,7 +332,7 @@ READ16_MEMBER(spg2xx_audio_device::audio_ctrl_r) return data; } -READ16_MEMBER(spg2xx_audio_device::audio_r) +uint16_t spg2xx_audio_device::audio_r(offs_t offset) { const uint16_t channel = (offset & 0x01f0) >> 4; uint16_t data = m_audio_regs[offset]; @@ -410,7 +410,7 @@ READ16_MEMBER(spg2xx_audio_device::audio_r) } -READ16_MEMBER(spg2xx_audio_device::audio_phase_r) +uint16_t spg2xx_audio_device::audio_phase_r(offs_t offset) { const uint16_t channel = (offset & 0x01f0) >> 4; uint16_t data = m_audio_phase_regs[offset]; @@ -458,7 +458,7 @@ READ16_MEMBER(spg2xx_audio_device::audio_phase_r) return data; } -WRITE16_MEMBER(spg2xx_audio_device::audio_ctrl_w) +void spg2xx_audio_device::audio_ctrl_w(offs_t offset, uint16_t data) { switch (offset) { @@ -741,7 +741,7 @@ WRITE16_MEMBER(spg2xx_audio_device::audio_ctrl_w) } } -WRITE16_MEMBER(spg2xx_audio_device::audio_phase_w) +void spg2xx_audio_device::audio_phase_w(offs_t offset, uint16_t data) { const uint16_t channel = (offset & 0x01f0) >> 4; @@ -800,7 +800,7 @@ WRITE16_MEMBER(spg2xx_audio_device::audio_phase_w) } -WRITE16_MEMBER(spg2xx_audio_device::audio_w) +void spg2xx_audio_device::audio_w(offs_t offset, uint16_t data) { const uint16_t channel = (offset & 0x01f0) >> 4; @@ -1442,7 +1442,7 @@ bool spg2xx_audio_device::audio_envelope_tick(const uint32_t channel) -WRITE16_MEMBER(spg110_audio_device::audio_w) +void spg110_audio_device::audio_w(offs_t offset, uint16_t data) { const uint16_t channel = (offset & 0x00f0) >> 4; @@ -1456,7 +1456,7 @@ WRITE16_MEMBER(spg110_audio_device::audio_w) return; } - spg2xx_audio_device::audio_w(space,offset,data,mem_mask); + spg2xx_audio_device::audio_w(offset,data); } uint16_t sunplus_gcm394_audio_device::control_group16_r(uint8_t group, uint8_t offset) @@ -1473,13 +1473,13 @@ void sunplus_gcm394_audio_device::control_group16_w(uint8_t group, uint8_t offse // offset 0x0b = triggers? } -READ16_MEMBER(sunplus_gcm394_audio_device::control_r) +uint16_t sunplus_gcm394_audio_device::control_r(offs_t offset) { return control_group16_r(offset & 0x20 ? 1 : 0, offset & 0x1f); } -WRITE16_MEMBER(sunplus_gcm394_audio_device::control_w) +void sunplus_gcm394_audio_device::control_w(offs_t offset, uint16_t data) { control_group16_w(offset & 0x20 ? 1 : 0, offset & 0x1f, data); } diff --git a/src/devices/machine/spg2xx_audio.h b/src/devices/machine/spg2xx_audio.h index 995bd03fba9..30b001edfb2 100644 --- a/src/devices/machine/spg2xx_audio.h +++ b/src/devices/machine/spg2xx_audio.h @@ -24,12 +24,12 @@ public: auto write_irq_callback() { return m_irq_cb.bind(); } auto channel_irq_callback() { return m_ch_irq_cb.bind(); } - DECLARE_READ16_MEMBER(audio_r); - virtual DECLARE_WRITE16_MEMBER(audio_w); - DECLARE_READ16_MEMBER(audio_ctrl_r); - DECLARE_WRITE16_MEMBER(audio_ctrl_w); - DECLARE_READ16_MEMBER(audio_phase_r); - DECLARE_WRITE16_MEMBER(audio_phase_w); + uint16_t audio_r(offs_t offset); + virtual void audio_w(offs_t offset, uint16_t data); + uint16_t audio_ctrl_r(offs_t offset); + void audio_ctrl_w(offs_t offset, uint16_t data); + uint16_t audio_phase_r(offs_t offset); + void audio_phase_w(offs_t offset, uint16_t data); protected: // sound stream update overrides @@ -386,7 +386,7 @@ class spg110_audio_device : public spg2xx_audio_device public: spg110_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_WRITE16_MEMBER(audio_w) override; + virtual void audio_w(offs_t offset, uint16_t data) override; // these either come from somewhere else on spg110 or are hardcoded virtual uint16_t get_16bit_bit(const offs_t channel) const override { return 1; } @@ -400,8 +400,8 @@ class sunplus_gcm394_audio_device : public spg2xx_audio_device public: sunplus_gcm394_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER(control_r); - DECLARE_WRITE16_MEMBER(control_w); + uint16_t control_r(offs_t offset); + void control_w(offs_t offset, uint16_t data); virtual void device_start() override; diff --git a/src/devices/machine/spg2xx_io.cpp b/src/devices/machine/spg2xx_io.cpp index 3ef95b672ab..0ae2ac69c9b 100644 --- a/src/devices/machine/spg2xx_io.cpp +++ b/src/devices/machine/spg2xx_io.cpp @@ -396,7 +396,7 @@ uint16_t spg2xx_io_device::clock_rng(int which) -READ16_MEMBER(spg2xx_io_device::io_r) +uint16_t spg2xx_io_device::io_r(offs_t offset) { static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; static const char gpioports[] = { 'A', 'B', 'C' }; @@ -497,7 +497,7 @@ READ16_MEMBER(spg2xx_io_device::io_r) return val; } -READ16_MEMBER(spg2xx_io_device::io_extended_r) +uint16_t spg2xx_io_device::io_extended_r(offs_t offset) { // this set of registers might only be on the 24x not the 11x @@ -755,7 +755,7 @@ void spg2xx_io_device::update_timer_c_src() } -WRITE16_MEMBER(spg28x_io_device::io_extended_w) +void spg28x_io_device::io_extended_w(offs_t offset, uint16_t data) { offset += REG_UART_CTRL; @@ -767,11 +767,11 @@ WRITE16_MEMBER(spg28x_io_device::io_extended_w) } else { - spg2xx_io_device::io_extended_w(space, offset - REG_UART_CTRL, data, mem_mask); + spg2xx_io_device::io_extended_w(offset - REG_UART_CTRL, data); } } -WRITE16_MEMBER(spg2xx_io_device::io_w) +void spg2xx_io_device::io_w(offs_t offset, uint16_t data) { static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; static const char gpioports[3] = { 'A', 'B', 'C' }; @@ -1214,7 +1214,7 @@ WRITE16_MEMBER(spg2xx_io_device::io_w) -WRITE16_MEMBER(spg2xx_io_device::io_extended_w) +void spg2xx_io_device::io_extended_w(offs_t offset, uint16_t data) { // this set of registers might only be on the 24x not the 11x diff --git a/src/devices/machine/spg2xx_io.h b/src/devices/machine/spg2xx_io.h index 0f0d6a82528..6cbe3f95098 100644 --- a/src/devices/machine/spg2xx_io.h +++ b/src/devices/machine/spg2xx_io.h @@ -35,11 +35,11 @@ public: void extint_w(int channel, bool state); - DECLARE_READ16_MEMBER(io_r); - DECLARE_WRITE16_MEMBER(io_w); + uint16_t io_r(offs_t offset); + void io_w(offs_t offset, uint16_t data); - virtual DECLARE_READ16_MEMBER(io_extended_r); - virtual DECLARE_WRITE16_MEMBER(io_extended_w); + virtual uint16_t io_extended_r(offs_t offset); + virtual void io_extended_w(offs_t offset, uint16_t data); auto pal_read_callback() { return m_pal_read_cb.bind(); }; @@ -308,7 +308,7 @@ public: spg28x_io_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_WRITE16_MEMBER(io_extended_w) override; + virtual void io_extended_w(offs_t offset, uint16_t data) override; }; DECLARE_DEVICE_TYPE(SPG24X_IO, spg24x_io_device) diff --git a/src/devices/machine/spg2xx_sysdma.cpp b/src/devices/machine/spg2xx_sysdma.cpp index fe0d61ea395..d48eee75fdf 100644 --- a/src/devices/machine/spg2xx_sysdma.cpp +++ b/src/devices/machine/spg2xx_sysdma.cpp @@ -39,7 +39,7 @@ void spg2xx_sysdma_device::device_reset() * Machine Hardware * *************************/ -READ16_MEMBER(spg2xx_sysdma_device::dma_r) +uint16_t spg2xx_sysdma_device::dma_r(offs_t offset) { offset &= 0x3; @@ -68,7 +68,7 @@ READ16_MEMBER(spg2xx_sysdma_device::dma_r) return val; } -WRITE16_MEMBER(spg2xx_sysdma_device::dma_w) +void spg2xx_sysdma_device::dma_w(offs_t offset, uint16_t data) { offset &= 0x3; diff --git a/src/devices/machine/spg2xx_sysdma.h b/src/devices/machine/spg2xx_sysdma.h index bea7755bcd9..3264d97ce66 100644 --- a/src/devices/machine/spg2xx_sysdma.h +++ b/src/devices/machine/spg2xx_sysdma.h @@ -27,8 +27,8 @@ public: } spg2xx_sysdma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER(dma_r); - DECLARE_WRITE16_MEMBER(dma_w); + uint16_t dma_r(offs_t offset); + void dma_w(offs_t offset, uint16_t data); protected: virtual void device_start() override; diff --git a/src/devices/machine/spg2xx_video.cpp b/src/devices/machine/spg2xx_video.cpp index 9a4caa945cb..fa14b729384 100644 --- a/src/devices/machine/spg2xx_video.cpp +++ b/src/devices/machine/spg2xx_video.cpp @@ -151,7 +151,7 @@ void spg2xx_video_device::do_sprite_dma(uint32_t len) } } -READ16_MEMBER(spg2xx_video_device::video_r) +uint16_t spg2xx_video_device::video_r(offs_t offset) { switch (offset) { @@ -223,7 +223,7 @@ READ16_MEMBER(spg2xx_video_device::video_r) return m_video_regs[offset]; } -WRITE16_MEMBER(spg2xx_video_device::video_w) +void spg2xx_video_device::video_w(offs_t offset, uint16_t data) { switch (offset) { diff --git a/src/devices/machine/spg2xx_video.h b/src/devices/machine/spg2xx_video.h index 87a8fb90472..2d48f247bdc 100644 --- a/src/devices/machine/spg2xx_video.h +++ b/src/devices/machine/spg2xx_video.h @@ -27,8 +27,8 @@ public: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); DECLARE_WRITE_LINE_MEMBER(vblank); - DECLARE_READ16_MEMBER(video_r); - DECLARE_WRITE16_MEMBER(video_w); + uint16_t video_r(offs_t offset); + void video_w(offs_t offset, uint16_t data); auto sprlimit_read_callback() { return m_sprlimit_read_cb.bind(); }; diff --git a/src/devices/machine/stvcd.cpp b/src/devices/machine/stvcd.cpp index 4499dfe346e..10cacbde736 100644 --- a/src/devices/machine/stvcd.cpp +++ b/src/devices/machine/stvcd.cpp @@ -137,7 +137,7 @@ void stvcd_device::io_regs(address_map &map) map(0x90024, 0x90027).mirror(0x08000).rw(FUNC(stvcd_device::cr4_r), FUNC(stvcd_device::cr4_w)).umask32(0xffffffff); } -READ32_MEMBER( stvcd_device::datatrns_r ) +u32 stvcd_device::datatrns_r(offs_t offset, uint32_t mem_mask) { u32 rv; @@ -161,7 +161,7 @@ READ32_MEMBER( stvcd_device::datatrns_r ) return rv; } -WRITE32_MEMBER( stvcd_device::datatrns_w ) +void stvcd_device::datatrns_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (mem_mask == 0xffffffff) dataxfer_long_w(data); @@ -375,7 +375,7 @@ inline u16 stvcd_device::dataxfer_word_r() return rv; } -READ16_MEMBER( stvcd_device::hirq_r ) +uint16_t stvcd_device::hirq_r() { // TODO: this member must return the register only u16 rv; @@ -394,25 +394,25 @@ READ16_MEMBER( stvcd_device::hirq_r ) return rv; } -WRITE16_MEMBER( stvcd_device::hirq_w ) { hirqreg &= data; } +void stvcd_device::hirq_w(uint16_t data) { hirqreg &= data; } // TODO: these two are actually never read or written to by host? -READ16_MEMBER( stvcd_device::hirqmask_r ) +uint16_t stvcd_device::hirqmask_r() { printf("RW HIRM: %04x\n", hirqmask); return hirqmask; } -WRITE16_MEMBER( stvcd_device::hirqmask_w ) +void stvcd_device::hirqmask_w(offs_t offset, uint16_t data, uint16_t mem_mask) { printf("WW HIRM: %04x => %04x\n", hirqmask, data); COMBINE_DATA(&hirqmask); } -READ16_MEMBER( stvcd_device::cr1_r ) { return cr1; } -READ16_MEMBER( stvcd_device::cr2_r ) { return cr2; } -READ16_MEMBER( stvcd_device::cr3_r ) { return cr3; } -READ16_MEMBER( stvcd_device::cr4_r ) +uint16_t stvcd_device::cr1_r() { return cr1; } +uint16_t stvcd_device::cr2_r() { return cr2; } +uint16_t stvcd_device::cr3_r() { return cr3; } +uint16_t stvcd_device::cr4_r() { cmd_pending = 0; cd_stat |= CD_STAT_PERI; @@ -420,7 +420,7 @@ READ16_MEMBER( stvcd_device::cr4_r ) } // TODO: understand how dual-port interface really works out -WRITE16_MEMBER( stvcd_device::cr1_w ) +void stvcd_device::cr1_w(uint16_t data) { cr1 = data; cd_stat &= ~CD_STAT_PERI; @@ -428,31 +428,31 @@ WRITE16_MEMBER( stvcd_device::cr1_w ) m_sh1_timer->adjust(attotime::never); } -WRITE16_MEMBER( stvcd_device::cr2_w ) +void stvcd_device::cr2_w(uint16_t data) { cr2 = data; cmd_pending |= 2; } -WRITE16_MEMBER( stvcd_device::cr3_w ) +void stvcd_device::cr3_w(uint16_t data) { cr3 = data; cmd_pending |= 4; } -WRITE16_MEMBER( stvcd_device::cr4_w ) +void stvcd_device::cr4_w(uint16_t data) { cr4 = data; cmd_pending |= 8; m_sh1_timer->adjust(attotime::from_hz(get_timing_command())); } -READ32_MEMBER( stvcd_device::stvcd_r ) +uint32_t stvcd_device::stvcd_r(offs_t offset, uint32_t mem_mask) { return this->space().read_dword(offset<<2, mem_mask); } -WRITE32_MEMBER( stvcd_device::stvcd_w ) +void stvcd_device::stvcd_w(offs_t offset, uint32_t data, uint32_t mem_mask) { this->space().write_dword(offset<<2,data, mem_mask); } diff --git a/src/devices/machine/stvcd.h b/src/devices/machine/stvcd.h index 0ccc8c271b6..2cef9608be8 100644 --- a/src/devices/machine/stvcd.h +++ b/src/devices/machine/stvcd.h @@ -22,8 +22,8 @@ class stvcd_device : public device_t, public: stvcd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ32_MEMBER(stvcd_r); - DECLARE_WRITE32_MEMBER(stvcd_w); + uint32_t stvcd_r(offs_t offset, uint32_t mem_mask = ~0); + void stvcd_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void set_tray_open(); void set_tray_close(); @@ -256,24 +256,24 @@ private: void cmd_get_mpeg_card_boot_rom(); // comms - DECLARE_READ32_MEMBER(datatrns_r); - DECLARE_WRITE32_MEMBER(datatrns_w); + uint32_t datatrns_r(offs_t offset, uint32_t mem_mask = ~0); + void datatrns_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); inline u32 dataxfer_long_r(); inline u16 dataxfer_word_r(); inline void dataxfer_long_w(u32 data); - DECLARE_READ16_MEMBER(cr1_r); - DECLARE_READ16_MEMBER(cr2_r); - DECLARE_READ16_MEMBER(cr3_r); - DECLARE_READ16_MEMBER(cr4_r); - DECLARE_WRITE16_MEMBER(cr1_w); - DECLARE_WRITE16_MEMBER(cr2_w); - DECLARE_WRITE16_MEMBER(cr3_w); - DECLARE_WRITE16_MEMBER(cr4_w); - - DECLARE_READ16_MEMBER(hirq_r); - DECLARE_WRITE16_MEMBER(hirq_w); - DECLARE_READ16_MEMBER(hirqmask_r); - DECLARE_WRITE16_MEMBER(hirqmask_w); + uint16_t cr1_r(); + uint16_t cr2_r(); + uint16_t cr3_r(); + uint16_t cr4_r(); + void cr1_w(uint16_t data); + void cr2_w(uint16_t data); + void cr3_w(uint16_t data); + void cr4_w(uint16_t data); + + uint16_t hirq_r(); + void hirq_w(uint16_t data); + uint16_t hirqmask_r(); + void hirqmask_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); }; // device type definition diff --git a/src/devices/machine/tmp68301.cpp b/src/devices/machine/tmp68301.cpp index 75b1f070ad8..f6cd84dd318 100644 --- a/src/devices/machine/tmp68301.cpp +++ b/src/devices/machine/tmp68301.cpp @@ -40,24 +40,24 @@ void tmp68301_device::tmp68301_regs(address_map &map) } // IRQ Mask register -READ16_MEMBER(tmp68301_device::imr_r) +uint16_t tmp68301_device::imr_r() { return m_imr; } -WRITE16_MEMBER(tmp68301_device::imr_w) +void tmp68301_device::imr_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_imr); update_ipl(); } // IRQ Pending Register -READ16_MEMBER(tmp68301_device::ipr_r) +uint16_t tmp68301_device::ipr_r() { return m_ipr; } -WRITE16_MEMBER(tmp68301_device::ipr_w) +void tmp68301_device::ipr_w(offs_t offset, uint16_t data, uint16_t mem_mask) { // software writes only clear bits m_ipr &= data | ~mem_mask; @@ -65,24 +65,24 @@ WRITE16_MEMBER(tmp68301_device::ipr_w) } // IRQ In-Service Register -READ16_MEMBER(tmp68301_device::iisr_r) +uint16_t tmp68301_device::iisr_r() { return m_iisr; } -WRITE16_MEMBER(tmp68301_device::iisr_w) +void tmp68301_device::iisr_w(offs_t offset, uint16_t data, uint16_t mem_mask) { // software writes only clear bits m_iisr &= data | ~mem_mask; } // Serial Control Register (TODO: 8-bit wide) -READ16_MEMBER(tmp68301_device::scr_r) +uint16_t tmp68301_device::scr_r() { return m_scr; } -WRITE16_MEMBER(tmp68301_device::scr_w) +void tmp68301_device::scr_w(offs_t offset, uint16_t data, uint16_t mem_mask) { /* *--- ---- CKSE @@ -95,22 +95,22 @@ WRITE16_MEMBER(tmp68301_device::scr_w) } /* Parallel direction: 1 = output, 0 = input */ -READ16_MEMBER(tmp68301_device::pdir_r) +uint16_t tmp68301_device::pdir_r() { return m_pdir; } -WRITE16_MEMBER(tmp68301_device::pdir_w) +void tmp68301_device::pdir_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_pdir); } -READ16_MEMBER(tmp68301_device::pdr_r) +uint16_t tmp68301_device::pdr_r() { return (m_in_parallel_cb(0) & ~m_pdir) | (m_pdr & m_pdir); } -WRITE16_MEMBER(tmp68301_device::pdr_w) +void tmp68301_device::pdr_w(offs_t offset, uint16_t data, uint16_t mem_mask) { uint16_t old = m_pdr; COMBINE_DATA(&m_pdr); @@ -118,12 +118,12 @@ WRITE16_MEMBER(tmp68301_device::pdr_w) m_out_parallel_cb(0, m_pdr, mem_mask); } -READ8_MEMBER(tmp68301_device::icr_r) +uint8_t tmp68301_device::icr_r(offs_t offset) { return m_icr[offset]; } -WRITE8_MEMBER(tmp68301_device::icr_w) +void tmp68301_device::icr_w(offs_t offset, uint8_t data) { /* --x- ---- Vector number is autogenerated if 1, else use external source @@ -347,12 +347,12 @@ uint8_t tmp68301_device::serial_interrupt_cause(int channel) } -READ16_MEMBER( tmp68301_device::regs_r ) +uint16_t tmp68301_device::regs_r(offs_t offset) { return m_regs[offset]; } -WRITE16_MEMBER( tmp68301_device::regs_w ) +void tmp68301_device::regs_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_regs[offset]); diff --git a/src/devices/machine/tmp68301.h b/src/devices/machine/tmp68301.h index b701822eb78..060519ebd1b 100644 --- a/src/devices/machine/tmp68301.h +++ b/src/devices/machine/tmp68301.h @@ -30,24 +30,24 @@ public: void external_interrupt_2(); private: - DECLARE_READ16_MEMBER(imr_r); - DECLARE_WRITE16_MEMBER(imr_w); - DECLARE_READ16_MEMBER(ipr_r); - DECLARE_WRITE16_MEMBER(ipr_w); - DECLARE_READ16_MEMBER(iisr_r); - DECLARE_WRITE16_MEMBER(iisr_w); - DECLARE_READ16_MEMBER(scr_r); - DECLARE_WRITE16_MEMBER(scr_w); - DECLARE_READ16_MEMBER(pdr_r); - DECLARE_WRITE16_MEMBER(pdr_w); - DECLARE_READ16_MEMBER(pdir_r); - DECLARE_WRITE16_MEMBER(pdir_w); - DECLARE_READ8_MEMBER(icr_r); - DECLARE_WRITE8_MEMBER(icr_w); + uint16_t imr_r(); + void imr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t ipr_r(); + void ipr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t iisr_r(); + void iisr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t scr_r(); + void scr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t pdr_r(); + void pdr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t pdir_r(); + void pdir_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t icr_r(offs_t offset); + void icr_w(offs_t offset, uint8_t data); // Hardware Registers - DECLARE_READ16_MEMBER( regs_r ); - DECLARE_WRITE16_MEMBER( regs_w ); + uint16_t regs_r(offs_t offset); + void regs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void tmp68301_regs(address_map &map); diff --git a/src/devices/machine/vr0uart.cpp b/src/devices/machine/vr0uart.cpp index eaf62aa1073..1bfbf0ebf3d 100644 --- a/src/devices/machine/vr0uart.cpp +++ b/src/devices/machine/vr0uart.cpp @@ -157,12 +157,12 @@ void vr0uart_device::rcv_complete() * ---- ---- --x- Stop Bits (1=2 bits, 0=1 Bit) * ---- ---- ---x Word Length (1=8 bits, 0=7 bits) */ -READ32_MEMBER( vr0uart_device::control_r ) +uint32_t vr0uart_device::control_r() { return m_ucon; } -WRITE32_MEMBER( vr0uart_device::control_w ) +void vr0uart_device::control_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ucon); update_serial_config(); @@ -178,7 +178,7 @@ WRITE32_MEMBER( vr0uart_device::control_w ) * ---- ---- --x- Parity error * ---- ---- ---x Overrun Error */ -READ32_MEMBER( vr0uart_device::status_r ) +uint32_t vr0uart_device::status_r() { uint32_t res = m_ustat; if (!m_urxb_fifo.empty()) @@ -191,13 +191,13 @@ READ32_MEMBER( vr0uart_device::status_r ) return res; } -WRITE32_MEMBER( vr0uart_device::transmit_buffer_w ) +void vr0uart_device::transmit_buffer_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_0_7) tx_send_byte(data & 0xff); } -READ32_MEMBER( vr0uart_device::receive_buffer_r ) +uint32_t vr0uart_device::receive_buffer_r(offs_t offset, uint32_t mem_mask) { // TODO: unknown value & behaviour attempting to read this on empty FIFO (stall?) uint8_t res = 0; @@ -208,12 +208,12 @@ READ32_MEMBER( vr0uart_device::receive_buffer_r ) return res; } -READ32_MEMBER( vr0uart_device::baud_rate_div_r ) +uint32_t vr0uart_device::baud_rate_div_r() { return m_ubdr; } -WRITE32_MEMBER( vr0uart_device::baud_rate_div_w ) +void vr0uart_device::baud_rate_div_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_ubdr); update_serial_config(); diff --git a/src/devices/machine/vrc4373.cpp b/src/devices/machine/vrc4373.cpp index 992bfc355ef..d0dbb96e55a 100644 --- a/src/devices/machine/vrc4373.cpp +++ b/src/devices/machine/vrc4373.cpp @@ -235,8 +235,8 @@ void vrc4373_device::map_cpu_space() winStart = m_cpu_regs[NREG_PCIMW1]&0xff000000; winEnd = winStart | (~(0x80000000 | (((m_cpu_regs[NREG_PCIMW1]>>13)&0x7f)<<24))); winSize = winEnd - winStart + 1; - m_cpu_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc4373_device::master1_r))); - m_cpu_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc4373_device::master1_w))); + m_cpu_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc4373_device::master1_r))); + m_cpu_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc4373_device::master1_w))); LOGNILE("map_cpu_space Master Window 1 start=%08X end=%08X size=%08X laddr=%08X\n", winStart, winEnd, winSize, m_pci1_laddr); } // PCI Master Window 2 @@ -244,8 +244,8 @@ void vrc4373_device::map_cpu_space() winStart = m_cpu_regs[NREG_PCIMW2]&0xff000000; winEnd = winStart | (~(0x80000000 | (((m_cpu_regs[NREG_PCIMW2]>>13)&0x7f)<<24))); winSize = winEnd - winStart + 1; - m_cpu_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc4373_device::master2_r))); - m_cpu_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc4373_device::master2_w))); + m_cpu_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc4373_device::master2_r))); + m_cpu_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc4373_device::master2_w))); LOGNILE("map_cpu_space Master Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", winStart, winEnd, winSize, m_pci2_laddr); } // PCI IO Window @@ -253,8 +253,8 @@ void vrc4373_device::map_cpu_space() winStart = m_cpu_regs[NREG_PCIMIOW]&0xff000000; winEnd = winStart | (~(0x80000000 | (((m_cpu_regs[NREG_PCIMIOW]>>13)&0x7f)<<24))); winSize = winEnd - winStart + 1; - m_cpu_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc4373_device::master_io_r))); - m_cpu_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc4373_device::master_io_w))); + m_cpu_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc4373_device::master_io_r))); + m_cpu_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc4373_device::master_io_w))); LOGNILE("map_cpu_space IO Window start=%08X end=%08X size=%08X laddr=%08X\n", tag(), winStart, winEnd, winSize, m_pci_io_laddr); } } @@ -269,8 +269,8 @@ void vrc4373_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = m_cpu_regs[NREG_PCITW1]&0xffe00000; winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW1]>>13)&0x7f)<<21))); winSize = winEnd - winStart + 1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc4373_device::target1_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc4373_device::target1_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc4373_device::target1_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc4373_device::target1_w))); LOGNILE("map_extra Target Window 1 start=%08X end=%08X size=%08X laddr=%08X\n", winStart, winEnd, winSize, m_target1_laddr); } // PCI Target Window 2 @@ -278,8 +278,8 @@ void vrc4373_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = m_cpu_regs[NREG_PCITW2]&0xffe00000; winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW2]>>13)&0x7f)<<21))); winSize = winEnd - winStart + 1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc4373_device::target2_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc4373_device::target2_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc4373_device::target2_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc4373_device::target2_w))); LOGNILE("map_extra Target Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", winStart, winEnd, winSize, m_target2_laddr); } } @@ -290,76 +290,76 @@ void vrc4373_device::reset_all_mappings() } // PCI bus control -READ32_MEMBER (vrc4373_device::pcictrl_r) +uint32_t vrc4373_device::pcictrl_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; LOGNILE("%s nile pcictrl_r from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc4373_device::pcictrl_w) +void vrc4373_device::pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGNILE("%s nile pcictrl_w to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); } // PCI Master Window 1 -READ32_MEMBER (vrc4373_device::master1_r) +uint32_t vrc4373_device::master1_r(offs_t offset, uint32_t mem_mask) { uint32_t result = this->space(AS_PCI_MEM).read_dword(m_pci1_laddr | (offset*4), mem_mask); LOGNILEMASTER("%s nile master1 read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc4373_device::master1_w) +void vrc4373_device::master1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { this->space(AS_PCI_MEM).write_dword(m_pci1_laddr | (offset*4), data, mem_mask); LOGNILEMASTER("%s nile master1 write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); } // PCI Master Window 2 -READ32_MEMBER (vrc4373_device::master2_r) +uint32_t vrc4373_device::master2_r(offs_t offset, uint32_t mem_mask) { uint32_t result = this->space(AS_PCI_MEM).read_dword(m_pci2_laddr | (offset*4), mem_mask); LOGNILEMASTER("%s nile master2 read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc4373_device::master2_w) +void vrc4373_device::master2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { this->space(AS_PCI_MEM).write_dword(m_pci2_laddr | (offset*4), data, mem_mask); LOGNILEMASTER("%s nile master2 write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); } // PCI Master IO Window -READ32_MEMBER (vrc4373_device::master_io_r) +uint32_t vrc4373_device::master_io_r(offs_t offset, uint32_t mem_mask) { uint32_t result = this->space(AS_PCI_IO).read_dword(m_pci_io_laddr | (offset*4), mem_mask); LOGNILEMASTER("%s nile master io read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc4373_device::master_io_w) +void vrc4373_device::master_io_w(offs_t offset, uint32_t data, uint32_t mem_mask) { this->space(AS_PCI_IO).write_dword(m_pci_io_laddr | (offset*4), data, mem_mask); LOGNILEMASTER("%s nile master io write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); } // PCI Target Window 1 -READ32_MEMBER (vrc4373_device::target1_r) +uint32_t vrc4373_device::target1_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_cpu->space(AS_PCI_CONFIG).read_dword(m_target1_laddr | (offset*4), mem_mask); LOGNILETARGET("%08X:nile target1 read from offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc4373_device::target1_w) +void vrc4373_device::target1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { m_cpu->space(AS_PCI_CONFIG).write_dword(m_target1_laddr | (offset*4), data, mem_mask); LOGNILETARGET("%08X:nile target1 write to offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, data, mem_mask); } // PCI Target Window 2 -READ32_MEMBER (vrc4373_device::target2_r) +uint32_t vrc4373_device::target2_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_cpu->space(AS_PCI_CONFIG).read_dword(m_target2_laddr | (offset*4), mem_mask); LOGNILETARGET("%08X:nile target2 read from offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc4373_device::target2_w) +void vrc4373_device::target2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { m_cpu->space(AS_PCI_CONFIG).write_dword(m_target2_laddr | (offset*4), data, mem_mask); LOGNILETARGET("%08X:nile target2 write to offset %02X = %08X & %08X\n", m_cpu->pc(), offset*4, data, mem_mask); @@ -429,15 +429,15 @@ TIMER_CALLBACK_MEMBER (vrc4373_device::dma_transfer) } // CPU I/F -READ32_MEMBER (vrc4373_device::cpu_if_r) +uint32_t vrc4373_device::cpu_if_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_cpu_regs[offset]; switch (offset) { case NREG_PCICAR: - result = config_address_r(space, offset); + result = config_address_r(); break; case NREG_PCICDR: - result = config_data_r(space, offset); + result = config_data_r(offset); break; case NREG_ICSR: // Top 16 bits always read as zero @@ -450,7 +450,7 @@ READ32_MEMBER (vrc4373_device::cpu_if_r) return result; } -WRITE32_MEMBER(vrc4373_device::cpu_if_w) +void vrc4373_device::cpu_if_w(offs_t offset, uint32_t data, uint32_t mem_mask) { LOGNILE("%s nile write to offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); @@ -498,10 +498,10 @@ WRITE32_MEMBER(vrc4373_device::cpu_if_w) // Type 1 transaction, no modification needed modData = data; } - pci_host_device::config_address_w(space, offset, modData); + pci_host_device::config_address_w(offset, modData); break; case NREG_PCICDR: - pci_host_device::config_data_w(space, offset, data); + pci_host_device::config_data_w(offset, data); break; case NREG_DMACR1: case NREG_DMACR2: diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h index dde4375e5ff..7d47d572940 100644 --- a/src/devices/machine/vrc4373.h +++ b/src/devices/machine/vrc4373.h @@ -33,28 +33,28 @@ public: virtual void config_map(address_map &map) override; - DECLARE_READ32_MEMBER( pcictrl_r); - DECLARE_WRITE32_MEMBER( pcictrl_w); + uint32_t pcictrl_r(offs_t offset, uint32_t mem_mask = ~0); + void pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); //cpu bus registers - DECLARE_READ32_MEMBER (cpu_if_r); - DECLARE_WRITE32_MEMBER(cpu_if_w); + uint32_t cpu_if_r(offs_t offset, uint32_t mem_mask = ~0); + void cpu_if_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (master1_r); - DECLARE_WRITE32_MEMBER(master1_w); + uint32_t master1_r(offs_t offset, uint32_t mem_mask = ~0); + void master1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (master2_r); - DECLARE_WRITE32_MEMBER(master2_w); + uint32_t master2_r(offs_t offset, uint32_t mem_mask = ~0); + void master2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (master_io_r); - DECLARE_WRITE32_MEMBER(master_io_w); + uint32_t master_io_r(offs_t offset, uint32_t mem_mask = ~0); + void master_io_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); virtual void target1_map(address_map &map); - DECLARE_READ32_MEMBER (target1_r); - DECLARE_WRITE32_MEMBER(target1_w); + uint32_t target1_r(offs_t offset, uint32_t mem_mask = ~0); + void target1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); virtual void target2_map(address_map &map); - DECLARE_READ32_MEMBER (target2_r); - DECLARE_WRITE32_MEMBER(target2_w); + uint32_t target2_r(offs_t offset, uint32_t mem_mask = ~0); + void target2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: virtual void device_start() override; diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index 30fcbc3fe1b..dd8894abe39 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -333,12 +333,12 @@ void vrc5074_device::map_cpu_space() winStart = regConfig & 0xffe00000; if (winSize > 0) { if (index == 0) { - m_cpu_space->install_read_handler(winStart, winStart + winSize - 1, read32_delegate(*this, FUNC(vrc5074_device::pci0_r))); - m_cpu_space->install_write_handler(winStart, winStart + winSize - 1, write32_delegate(*this, FUNC(vrc5074_device::pci0_w))); + m_cpu_space->install_read_handler(winStart, winStart + winSize - 1, read32s_delegate(*this, FUNC(vrc5074_device::pci0_r))); + m_cpu_space->install_write_handler(winStart, winStart + winSize - 1, write32s_delegate(*this, FUNC(vrc5074_device::pci0_w))); } else { - m_cpu_space->install_read_handler(winStart, winStart + winSize - 1, read32_delegate(*this, FUNC(vrc5074_device::pci1_r))); - m_cpu_space->install_write_handler(winStart, winStart + winSize - 1, write32_delegate(*this, FUNC(vrc5074_device::pci1_w))); + m_cpu_space->install_read_handler(winStart, winStart + winSize - 1, read32s_delegate(*this, FUNC(vrc5074_device::pci1_r))); + m_cpu_space->install_write_handler(winStart, winStart + winSize - 1, write32s_delegate(*this, FUNC(vrc5074_device::pci1_w))); } } if (LOG_NILE | LOG_MAP) @@ -362,8 +362,8 @@ void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_win winStart = 0x0; winEnd = winStart + winSize -1; - memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc5074_device::target1_r))); - memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc5074_device::target1_w))); + memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc5074_device::target1_r))); + memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc5074_device::target1_w))); if (LOG_NILE | LOG_MAP) logerror("%s: map_extra Target Window 1 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize); } @@ -372,8 +372,8 @@ void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_win // winStart = m_cpu_regs[NREG_PCITW2]&0xffe00000; // winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW2]>>13)&0x7f)<<21))); // winSize = winEnd - winStart + 1; - // memory_space->install_read_handler(winStart, winEnd, read32_delegate(*this, FUNC(vrc5074_device::target2_r))); - // memory_space->install_write_handler(winStart, winEnd, write32_delegate(*this, FUNC(vrc5074_device::target2_w))); + // memory_space->install_read_handler(winStart, winEnd, read32s_delegate(*this, FUNC(vrc5074_device::target2_r))); + // memory_space->install_write_handler(winStart, winEnd, write32s_delegate(*this, FUNC(vrc5074_device::target2_w))); // if (LOG_NILE) // logerror("%s: map_extra Target Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", tag(), winStart, winEnd, winSize, m_target2_laddr); //} @@ -384,12 +384,12 @@ void vrc5074_device::reset_all_mappings() pci_device::reset_all_mappings(); } -READ32_MEMBER(vrc5074_device::sdram_addr_r) +uint32_t vrc5074_device::sdram_addr_r() { return 0; } -WRITE32_MEMBER(vrc5074_device::sdram_addr_w) +void vrc5074_device::sdram_addr_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (offset == 0) m_sdram_addr[0] = data; @@ -411,7 +411,7 @@ void vrc5074_device::setup_pci_space() } } // PCI Master Window 0 -READ32_MEMBER (vrc5074_device::pci0_r) +uint32_t vrc5074_device::pci0_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; int index = 0; @@ -434,11 +434,11 @@ READ32_MEMBER (vrc5074_device::pci0_r) if ((pci_addr >> (21 + dev)) & 0x1) { new_data = (dev << 11) | (0x80000000) | (pci_addr & 0xff); //printf("writing pci_addr: %08x dev: %x new_data: %08x\n", pci_addr, dev, new_data); - pci_host_device::config_address_w(space, offset, new_data); + pci_host_device::config_address_w(offset, new_data); break; } } - result = pci_host_device::config_data_r(space, offset); + result = pci_host_device::config_data_r(offset); } break; default: @@ -449,7 +449,7 @@ READ32_MEMBER (vrc5074_device::pci0_r) logerror("%s nile pci0_r offset %08X = %08X & %08X\n", machine().describe_context(), pci_addr, result, mem_mask); return result; } -WRITE32_MEMBER (vrc5074_device::pci0_w) +void vrc5074_device::pci0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { int index = 0; uint32_t pci_addr = m_pci_laddr[index] | ((offset << 2) & m_pci_mask[index]); @@ -472,11 +472,11 @@ WRITE32_MEMBER (vrc5074_device::pci0_w) if ((pci_addr >> (21 + dev)) & 0x1) { new_data = (dev << 11) | (0x80000000) | (pci_addr & 0xff); //printf("writing pci_addr: %08x dev: %x new_data: %08x\n", pci_addr, dev, new_data); - pci_host_device::config_address_w(space, offset, new_data); + pci_host_device::config_address_w(offset, new_data); break; } } - pci_host_device::config_data_w(space, offset, data); + pci_host_device::config_data_w(offset, data); } break; default: @@ -489,7 +489,7 @@ WRITE32_MEMBER (vrc5074_device::pci0_w) } // PCI Master Window 1 -READ32_MEMBER (vrc5074_device::pci1_r) +uint32_t vrc5074_device::pci1_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; int index = 1; @@ -512,11 +512,11 @@ READ32_MEMBER (vrc5074_device::pci1_r) if ((pci_addr >> (21 + dev)) & 0x1) { new_data = (dev << 11) | (0x80000000) | (pci_addr & 0xff); //printf("writing pci_addr: %08x dev: %x new_data: %08x\n", pci_addr, dev, new_data); - pci_host_device::config_address_w(space, offset, new_data); + pci_host_device::config_address_w(offset, new_data); break; } } - result = pci_host_device::config_data_r(space, offset); + result = pci_host_device::config_data_r(offset); } break; default: @@ -527,7 +527,7 @@ READ32_MEMBER (vrc5074_device::pci1_r) logerror("%s nile pci1_r offset %08X = %08X & %08X\n", machine().describe_context(), pci_addr, result, mem_mask); return result; } -WRITE32_MEMBER (vrc5074_device::pci1_w) +void vrc5074_device::pci1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { int index = 1; uint32_t pci_addr = m_pci_laddr[index] | ((offset << 2) & m_pci_mask[index]); @@ -549,11 +549,11 @@ WRITE32_MEMBER (vrc5074_device::pci1_w) if ((pci_addr >> (21 + dev)) & 0x1) { new_data = (dev << 11) | (0x80000000) | (pci_addr & 0xff); //printf("writing pci_addr: %08x dev: %x new_data: %08x\n", pci_addr, dev, new_data); - pci_host_device::config_address_w(space, offset, new_data); + pci_host_device::config_address_w(offset, new_data); break; } } - pci_host_device::config_data_w(space, offset, data); + pci_host_device::config_data_w(offset, data); } break; default: @@ -566,14 +566,14 @@ WRITE32_MEMBER (vrc5074_device::pci1_w) } // PCI Target Window 1 -READ32_MEMBER (vrc5074_device::target1_r) +uint32_t vrc5074_device::target1_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_sdram[0][offset]; if (LOG_NILE_TARGET) logerror("%s nile target1 read from offset %02X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); return result; } -WRITE32_MEMBER (vrc5074_device::target1_w) +void vrc5074_device::target1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { //m_cpu->space(AS_PROGRAM).write_dword(m_target1_laddr | (offset*4), data, mem_mask); COMBINE_DATA(&m_sdram[0][offset]); @@ -770,7 +770,7 @@ TIMER_CALLBACK_MEMBER(vrc5074_device::nile_timer_callback) * *************************************/ -READ32_MEMBER(vrc5074_device::cpu_reg_r) +uint32_t vrc5074_device::cpu_reg_r(offs_t offset) { uint32_t result = m_cpu_regs[offset]; bool logit = true; @@ -846,7 +846,7 @@ READ32_MEMBER(vrc5074_device::cpu_reg_r) return result; } -WRITE32_MEMBER(vrc5074_device::cpu_reg_w) +void vrc5074_device::cpu_reg_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t olddata = m_cpu_regs[offset]; bool logit = true; @@ -1006,7 +1006,7 @@ WRITE_LINE_MEMBER(vrc5074_device::uart_irq_callback) } } -READ32_MEMBER(vrc5074_device::serial_r) +uint32_t vrc5074_device::serial_r(offs_t offset) { uint32_t result = m_uart->ins8250_r(offset>>1); @@ -1015,7 +1015,7 @@ READ32_MEMBER(vrc5074_device::serial_r) return result; } -WRITE32_MEMBER(vrc5074_device::serial_w) +void vrc5074_device::serial_w(offs_t offset, uint32_t data, uint32_t mem_mask) { m_uart->ins8250_w(offset>>1, data); if (PRINTF_SERIAL && offset == NREG_UARTTHR) { diff --git a/src/devices/machine/vrc5074.h b/src/devices/machine/vrc5074.h index 2a4882df69b..02bafd8d73d 100644 --- a/src/devices/machine/vrc5074.h +++ b/src/devices/machine/vrc5074.h @@ -36,8 +36,8 @@ public: void set_map(int id, const address_map_constructor &map, device_t *device); virtual void config_map(address_map &map) override; - DECLARE_READ32_MEMBER(sdram_addr_r); - DECLARE_WRITE32_MEMBER(sdram_addr_w); + uint32_t sdram_addr_r(); + void sdram_addr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); // PCI interrupts DECLARE_WRITE_LINE_MEMBER(pci_intr_a); @@ -48,21 +48,21 @@ public: void update_pci_irq(const int index, const int state); //cpu bus registers - DECLARE_READ32_MEMBER (cpu_reg_r); - DECLARE_WRITE32_MEMBER(cpu_reg_w); - DECLARE_READ32_MEMBER(serial_r); - DECLARE_WRITE32_MEMBER(serial_w); + uint32_t cpu_reg_r(offs_t offset); + void cpu_reg_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t serial_r(offs_t offset); + void serial_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void update_nile_irqs(); - DECLARE_READ32_MEMBER (pci0_r); - DECLARE_WRITE32_MEMBER(pci0_w); + uint32_t pci0_r(offs_t offset, uint32_t mem_mask = ~0); + void pci0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER (pci1_r); - DECLARE_WRITE32_MEMBER(pci1_w); + uint32_t pci1_r(offs_t offset, uint32_t mem_mask = ~0); + void pci1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); virtual void target1_map(address_map &map); - DECLARE_READ32_MEMBER (target1_r); - DECLARE_WRITE32_MEMBER(target1_w); + uint32_t target1_r(offs_t offset, uint32_t mem_mask = ~0); + void target1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); // Serial port DECLARE_WRITE_LINE_MEMBER(uart_irq_callback); diff --git a/src/devices/machine/vrender0.cpp b/src/devices/machine/vrender0.cpp index 21056dd475f..4d9a9965a5f 100644 --- a/src/devices/machine/vrender0.cpp +++ b/src/devices/machine/vrender0.cpp @@ -242,22 +242,22 @@ void vrender0soc_device::device_reset() * */ -READ16_MEMBER(vrender0soc_device::textureram_r) +uint16_t vrender0soc_device::textureram_r(offs_t offset) { return m_textureram[offset]; } -WRITE16_MEMBER(vrender0soc_device::textureram_w) +void vrender0soc_device::textureram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_textureram[offset]); } -READ16_MEMBER(vrender0soc_device::frameram_r) +uint16_t vrender0soc_device::frameram_r(offs_t offset) { return m_frameram[offset]; } -WRITE16_MEMBER(vrender0soc_device::frameram_w) +void vrender0soc_device::frameram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_frameram[offset]); } @@ -268,12 +268,12 @@ WRITE16_MEMBER(vrender0soc_device::frameram_w) * */ -READ32_MEMBER(vrender0soc_device::intvec_r) +uint32_t vrender0soc_device::intvec_r() { return (m_IntHigh & 7) << 8; } -WRITE32_MEMBER(vrender0soc_device::intvec_w) +void vrender0soc_device::intvec_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_0_7) { @@ -285,12 +285,12 @@ WRITE32_MEMBER(vrender0soc_device::intvec_w) m_IntHigh = (data >> 8) & 7; } -READ32_MEMBER( vrender0soc_device::inten_r ) +uint32_t vrender0soc_device::inten_r() { return m_inten; } -WRITE32_MEMBER( vrender0soc_device::inten_w ) +void vrender0soc_device::inten_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_inten); // P'S Attack has a timer 0 irq service with no call to intvec_w but just this @@ -299,12 +299,12 @@ WRITE32_MEMBER( vrender0soc_device::inten_w ) m_host_cpu->set_input_line(SE3208_INT, CLEAR_LINE); } -READ32_MEMBER( vrender0soc_device::intst_r ) +uint32_t vrender0soc_device::intst_r() { return m_intst; } -WRITE32_MEMBER( vrender0soc_device::intst_w ) +void vrender0soc_device::intst_w(uint32_t data) { // TODO: contradicts with documentation, games writes to this? // ... @@ -377,13 +377,13 @@ TIMER_CALLBACK_MEMBER(vrender0soc_device::Timercb) } template<int Which> -READ32_MEMBER(vrender0soc_device::tmcon_r) +uint32_t vrender0soc_device::tmcon_r() { return m_timer_control[Which]; } template<int Which> -WRITE32_MEMBER(vrender0soc_device::tmcon_w) +void vrender0soc_device::tmcon_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint32_t old = m_timer_control[Which]; data = COMBINE_DATA(&m_timer_control[Which]); @@ -404,13 +404,13 @@ WRITE32_MEMBER(vrender0soc_device::tmcon_w) } template<int Which> -READ16_MEMBER(vrender0soc_device::tmcnt_r) +uint16_t vrender0soc_device::tmcnt_r() { return m_timer_count[Which] & 0xffff; } template<int Which> -WRITE16_MEMBER(vrender0soc_device::tmcnt_w) +void vrender0soc_device::tmcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_timer_count[Which]); } @@ -430,15 +430,15 @@ inline int vrender0soc_device::dma_setup_hold(uint8_t setting, uint8_t bitmask) return setting & bitmask ? 0 : (setting & 2) ? 4 : (1 << (setting & 1)); } -template<int Which> READ32_MEMBER(vrender0soc_device::dmasa_r) { return m_dma[Which].src; } -template<int Which> WRITE32_MEMBER(vrender0soc_device::dmasa_w) { COMBINE_DATA(&m_dma[Which].src); } -template<int Which> READ32_MEMBER(vrender0soc_device::dmada_r) { return m_dma[Which].dst; } -template<int Which> WRITE32_MEMBER(vrender0soc_device::dmada_w) { COMBINE_DATA(&m_dma[Which].dst); } -template<int Which> READ32_MEMBER(vrender0soc_device::dmatc_r) { return m_dma[Which].size; } -template<int Which> WRITE32_MEMBER(vrender0soc_device::dmatc_w) { COMBINE_DATA(&m_dma[Which].size); } -template<int Which> READ32_MEMBER(vrender0soc_device::dmac_r) { return m_dma[Which].ctrl; } +template<int Which> uint32_t vrender0soc_device::dmasa_r() { return m_dma[Which].src; } +template<int Which> void vrender0soc_device::dmasa_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_dma[Which].src); } +template<int Which> uint32_t vrender0soc_device::dmada_r() { return m_dma[Which].dst; } +template<int Which> void vrender0soc_device::dmada_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_dma[Which].dst); } +template<int Which> uint32_t vrender0soc_device::dmatc_r() { return m_dma[Which].size; } +template<int Which> void vrender0soc_device::dmatc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_dma[Which].size); } +template<int Which> uint32_t vrender0soc_device::dmac_r() { return m_dma[Which].ctrl; } template<int Which> -WRITE32_MEMBER(vrender0soc_device::dmac_w) +void vrender0soc_device::dmac_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (((data ^ m_dma[Which].ctrl) & (1 << 10)) && (data & (1 << 10))) //DMAOn { @@ -490,7 +490,7 @@ WRITE32_MEMBER(vrender0soc_device::dmac_w) * */ -READ32_MEMBER(vrender0soc_device::crtc_r) +uint32_t vrender0soc_device::crtc_r(offs_t offset) { uint32_t res = m_crtcregs[offset]; uint32_t hdisp = (m_crtcregs[0x0c / 4] + 1); @@ -516,7 +516,7 @@ READ32_MEMBER(vrender0soc_device::crtc_r) return res; } -WRITE32_MEMBER(vrender0soc_device::crtc_w) +void vrender0soc_device::crtc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (((m_crtcregs[0] & 0x0100) == 0x0100) && (offset > 0) && (offset < 0x28/4)) // Write protect return; @@ -682,7 +682,7 @@ void vrender0soc_device::crtc_update() } // accessed by cross puzzle -READ32_MEMBER(vrender0soc_device::sysid_r) +uint32_t vrender0soc_device::sysid_r() { // Device ID: VRender0+ -> 0x0a // Revision Number -> 0x00 @@ -690,7 +690,7 @@ READ32_MEMBER(vrender0soc_device::sysid_r) return 0x00000a00; } -READ32_MEMBER(vrender0soc_device::cfgr_r) +uint32_t vrender0soc_device::cfgr_r() { // TODO: this truly needs real HW verification, // only Cross Puzzle reads this so far so leaving a logerror diff --git a/src/devices/machine/vrender0.h b/src/devices/machine/vrender0.h index 25776c1fa77..1ae004011b2 100644 --- a/src/devices/machine/vrender0.h +++ b/src/devices/machine/vrender0.h @@ -58,13 +58,13 @@ protected: virtual void device_reset() override; private: - DECLARE_READ32_MEMBER( control_r ); - DECLARE_WRITE32_MEMBER( control_w ); - DECLARE_READ32_MEMBER( baud_rate_div_r ); - DECLARE_WRITE32_MEMBER( baud_rate_div_w ); - DECLARE_READ32_MEMBER( status_r ); - DECLARE_WRITE32_MEMBER( transmit_buffer_w ); - DECLARE_READ32_MEMBER( receive_buffer_r ); + uint32_t control_r(); + void control_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t baud_rate_div_r(); + void baud_rate_div_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t status_r(); + void transmit_buffer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t receive_buffer_r(offs_t offset, uint32_t mem_mask = ~0); TIMER_CALLBACK_MEMBER( break_timer_cb ); uint32_t m_ucon = 0; // control @@ -138,24 +138,24 @@ private: // INTC uint32_t m_inten = 0; - DECLARE_READ32_MEMBER(inten_r); - DECLARE_WRITE32_MEMBER(inten_w); + uint32_t inten_r(); + void inten_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - DECLARE_READ32_MEMBER(intvec_r); - DECLARE_WRITE32_MEMBER(intvec_w); + uint32_t intvec_r(); + void intvec_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint8_t m_IntHigh = 0; uint32_t m_intst = 0; - DECLARE_READ32_MEMBER(intst_r); - DECLARE_WRITE32_MEMBER(intst_w); + uint32_t intst_r(); + void intst_w(uint32_t data); DECLARE_WRITE_LINE_MEMBER(soundirq_cb); // Timer - template<int Which> DECLARE_WRITE32_MEMBER(tmcon_w); - template<int Which> DECLARE_READ32_MEMBER(tmcon_r); - template<int Which> DECLARE_WRITE16_MEMBER(tmcnt_w); - template<int Which> DECLARE_READ16_MEMBER(tmcnt_r); + template<int Which> void tmcon_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + template<int Which> uint32_t tmcon_r(); + template<int Which> void tmcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + template<int Which> uint16_t tmcnt_r(); TIMER_CALLBACK_MEMBER(Timercb); uint32_t m_timer_control[4] = { 0, 0, 0, 0 }; @@ -164,14 +164,14 @@ private: void TimerStart(int which); // DMAC - template<int Which> DECLARE_READ32_MEMBER(dmac_r); - template<int Which> DECLARE_WRITE32_MEMBER(dmac_w); - template<int Which> DECLARE_READ32_MEMBER(dmatc_r); - template<int Which> DECLARE_WRITE32_MEMBER(dmatc_w); - template<int Which> DECLARE_READ32_MEMBER(dmasa_r); - template<int Which> DECLARE_WRITE32_MEMBER(dmasa_w); - template<int Which> DECLARE_READ32_MEMBER(dmada_r); - template<int Which> DECLARE_WRITE32_MEMBER(dmada_w); + template<int Which> uint32_t dmac_r(); + template<int Which> void dmac_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + template<int Which> uint32_t dmatc_r(); + template<int Which> void dmatc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + template<int Which> uint32_t dmasa_r(); + template<int Which> void dmasa_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + template<int Which> uint32_t dmada_r(); + template<int Which> void dmada_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); inline int dma_setup_hold(uint8_t setting, uint8_t bitmask); struct { uint32_t src = 0; @@ -181,22 +181,22 @@ private: }m_dma[2]; // CRTC - DECLARE_READ32_MEMBER(crtc_r); - DECLARE_WRITE32_MEMBER(crtc_w); + uint32_t crtc_r(offs_t offset); + void crtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void crtc_update(); inline bool crt_is_interlaced(); // Misc - DECLARE_READ32_MEMBER( sysid_r ); - DECLARE_READ32_MEMBER( cfgr_r ); + uint32_t sysid_r(); + uint32_t cfgr_r(); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); DECLARE_WRITE_LINE_MEMBER(screen_vblank); - DECLARE_READ16_MEMBER( textureram_r ); - DECLARE_WRITE16_MEMBER( textureram_w ); - DECLARE_READ16_MEMBER( frameram_r ); - DECLARE_WRITE16_MEMBER( frameram_w ); + uint16_t textureram_r(offs_t offset); + void textureram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t frameram_r(offs_t offset); + void frameram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); // Hacks #ifdef IDLE_LOOP_SPEEDUP diff --git a/src/devices/machine/vt83c461.cpp b/src/devices/machine/vt83c461.cpp index 61add7ca65c..005e41d2848 100644 --- a/src/devices/machine/vt83c461.cpp +++ b/src/devices/machine/vt83c461.cpp @@ -35,7 +35,7 @@ void vt83c461_device::device_start() save_item(NAME(m_config_register_num)); } -uint32_t vt83c461_device::read_config(offs_t offset) +uint32_t vt83c461_device::config_r(offs_t offset) { uint32_t result = 0; @@ -68,7 +68,7 @@ uint32_t vt83c461_device::read_config(offs_t offset) return result; } -void vt83c461_device::write_config(offs_t offset, uint32_t data) +void vt83c461_device::config_w(offs_t offset, uint32_t data) { /* logit */ LOG("%s:IDE via config write to %X = %08X\n", machine().describe_context(), offset, data); diff --git a/src/devices/machine/vt83c461.h b/src/devices/machine/vt83c461.h index 3587ccea5a8..97e4941dd56 100644 --- a/src/devices/machine/vt83c461.h +++ b/src/devices/machine/vt83c461.h @@ -41,11 +41,8 @@ public: return *this; } - uint32_t read_config(offs_t offset); - void write_config(offs_t offset, uint32_t data); - - DECLARE_READ32_MEMBER(config_r) { return read_config(offset); } - DECLARE_WRITE32_MEMBER(config_w) { write_config(offset, data); } + uint32_t config_r(offs_t offset); + void config_w(offs_t offset, uint32_t data); protected: virtual void device_start() override; diff --git a/src/devices/sound/bsmt2000.cpp b/src/devices/sound/bsmt2000.cpp index e316e370ee0..05ea982bb8e 100644 --- a/src/devices/sound/bsmt2000.cpp +++ b/src/devices/sound/bsmt2000.cpp @@ -236,7 +236,7 @@ void bsmt2000_device::write_data(uint16_t data) // the register select port //------------------------------------------------- -READ16_MEMBER( bsmt2000_device::tms_register_r ) +uint16_t bsmt2000_device::tms_register_r() { return m_register_select; } @@ -247,7 +247,7 @@ READ16_MEMBER( bsmt2000_device::tms_register_r ) // data port //------------------------------------------------- -READ16_MEMBER( bsmt2000_device::tms_data_r ) +uint16_t bsmt2000_device::tms_data_r() { // also implicitly clear the write pending flag m_write_pending = false; @@ -262,7 +262,7 @@ READ16_MEMBER( bsmt2000_device::tms_data_r ) // selected ROM bank and address //------------------------------------------------- -READ16_MEMBER( bsmt2000_device::tms_rom_r ) +uint16_t bsmt2000_device::tms_rom_r() { // DSP code expects a 16-bit value with the data in the high byte return (int16_t)(read_byte((m_rom_bank << 16) + m_rom_address) << 8); @@ -274,7 +274,7 @@ READ16_MEMBER( bsmt2000_device::tms_rom_r ) // current ROM bank to access //------------------------------------------------- -WRITE16_MEMBER( bsmt2000_device::tms_rom_addr_w ) +void bsmt2000_device::tms_rom_addr_w(uint16_t data) { m_rom_address = data; } @@ -285,7 +285,7 @@ WRITE16_MEMBER( bsmt2000_device::tms_rom_addr_w ) // access //------------------------------------------------- -WRITE16_MEMBER( bsmt2000_device::tms_rom_bank_w ) +void bsmt2000_device::tms_rom_bank_w(uint16_t data) { m_rom_bank = data; } @@ -296,7 +296,7 @@ WRITE16_MEMBER( bsmt2000_device::tms_rom_bank_w ) // DAC //------------------------------------------------- -WRITE16_MEMBER( bsmt2000_device::tms_left_w ) +void bsmt2000_device::tms_left_w(uint16_t data) { m_stream->update(); m_left_data = data; @@ -308,7 +308,7 @@ WRITE16_MEMBER( bsmt2000_device::tms_left_w ) // channel DAC //------------------------------------------------- -WRITE16_MEMBER( bsmt2000_device::tms_right_w ) +void bsmt2000_device::tms_right_w(uint16_t data) { m_stream->update(); m_right_data = data; diff --git a/src/devices/sound/bsmt2000.h b/src/devices/sound/bsmt2000.h index 7e91afa06aa..ef3c13e045f 100644 --- a/src/devices/sound/bsmt2000.h +++ b/src/devices/sound/bsmt2000.h @@ -60,13 +60,13 @@ protected: public: // internal TMS I/O callbacks - DECLARE_READ16_MEMBER( tms_register_r ); - DECLARE_READ16_MEMBER( tms_data_r ); - DECLARE_READ16_MEMBER( tms_rom_r ); - DECLARE_WRITE16_MEMBER( tms_rom_addr_w ); - DECLARE_WRITE16_MEMBER( tms_rom_bank_w ); - DECLARE_WRITE16_MEMBER( tms_left_w ); - DECLARE_WRITE16_MEMBER( tms_right_w ); + uint16_t tms_register_r(); + uint16_t tms_data_r(); + uint16_t tms_rom_r(); + void tms_rom_addr_w(uint16_t data); + void tms_rom_bank_w(uint16_t data); + void tms_left_w(uint16_t data); + void tms_right_w(uint16_t data); private: // timers diff --git a/src/devices/sound/c352.cpp b/src/devices/sound/c352.cpp index 91cc2ba6671..5038e0aaee2 100644 --- a/src/devices/sound/c352.cpp +++ b/src/devices/sound/c352.cpp @@ -1,7 +1,7 @@ // license:BSD-3-Clause // copyright-holders:R. Belmont, superctr /* - c352.c - Namco C352 custom PCM chip emulation + c352.cpp - Namco C352 custom PCM chip emulation v2.0 By R. Belmont Rewritten and improved by superctr @@ -180,7 +180,7 @@ void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **in } } -u16 c352_device::read_reg16(offs_t offset) +u16 c352_device::read(offs_t offset) { m_stream->update(); @@ -206,7 +206,7 @@ u16 c352_device::read_reg16(offs_t offset) return 0; } -void c352_device::write_reg16(offs_t offset, u16 data, u16 mem_mask) +void c352_device::write(offs_t offset, u16 data, u16 mem_mask) { m_stream->update(); @@ -224,7 +224,7 @@ void c352_device::write_reg16(offs_t offset, u16 data, u16 mem_mask) if (offset < 0x100) { - u16 newval = read_reg16(offset); + u16 newval = read(offset); COMBINE_DATA(&newval); *((u16*)&m_c352_v[offset / 8] + reg_map[offset % 8]) = newval; } @@ -414,13 +414,3 @@ void c352_device::device_reset() m_random = 0x1234; m_control = 0; } - -READ16_MEMBER( c352_device::read ) -{ - return read_reg16(offset); -} - -WRITE16_MEMBER( c352_device::write ) -{ - write_reg16(offset, data, mem_mask); -} diff --git a/src/devices/sound/c352.h b/src/devices/sound/c352.h index c00aa667b05..2a8ea946c5b 100644 --- a/src/devices/sound/c352.h +++ b/src/devices/sound/c352.h @@ -29,8 +29,8 @@ public: void set_divider(int divider) { m_divider = divider; } - DECLARE_READ16_MEMBER(read); - DECLARE_WRITE16_MEMBER(write); + u16 read(offs_t offset); + void write(offs_t offset, u16 data, u16 mem_mask = 0); protected: // device-level overrides @@ -91,9 +91,6 @@ private: void fetch_sample(c352_voice_t &v); void ramp_volume(c352_voice_t &v, int ch, u8 val); - u16 read_reg16(offs_t offset); - void write_reg16(offs_t offset, u16 data, u16 mem_mask = 0); - sound_stream *m_stream; int m_sample_rate_base; diff --git a/src/devices/sound/es1373.cpp b/src/devices/sound/es1373.cpp index dbc0c6a96d8..6ff92fcc90b 100644 --- a/src/devices/sound/es1373.cpp +++ b/src/devices/sound/es1373.cpp @@ -426,7 +426,7 @@ uint32_t es1373_device::calc_size(const uint8_t &format) return 0; } -READ32_MEMBER (es1373_device::reg_r) +uint32_t es1373_device::reg_r(offs_t offset, uint32_t mem_mask) { uint32_t result = m_es_regs[offset]; switch (offset) { @@ -489,7 +489,7 @@ READ32_MEMBER (es1373_device::reg_r) return result; } -WRITE32_MEMBER(es1373_device::reg_w) +void es1373_device::reg_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_es_regs[offset]); switch (offset) { diff --git a/src/devices/sound/es1373.h b/src/devices/sound/es1373.h index 2a796ffe6c8..e5f107eed11 100644 --- a/src/devices/sound/es1373.h +++ b/src/devices/sound/es1373.h @@ -18,8 +18,8 @@ public: auto irq_handler() { return m_irq_handler.bind(); } - DECLARE_READ32_MEMBER (reg_r); - DECLARE_WRITE32_MEMBER(reg_w); + uint32_t reg_r(offs_t offset, uint32_t mem_mask = ~0); + void reg_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); protected: virtual void device_resolve_objects() override; diff --git a/src/devices/sound/es5506.cpp b/src/devices/sound/es5506.cpp index 73057087707..2e2ba4c8122 100644 --- a/src/devices/sound/es5506.cpp +++ b/src/devices/sound/es5506.cpp @@ -1422,7 +1422,7 @@ inline void es5506_device::reg_write_test(es550x_voice *voice, offs_t offset, u3 } } -void es5506_device::write(offs_t offset, uint8_t data) +void es5506_device::write(offs_t offset, u8 data) { es550x_voice *voice = &m_voice[m_current_page & 0x1f]; int shift = 8 * (offset & 3); @@ -1631,7 +1631,7 @@ inline u32 es5506_device::reg_read_test(es550x_voice *voice, offs_t offset) return result; } -uint8_t es5506_device::read(offs_t offset) +u8 es5506_device::read(offs_t offset) { es550x_voice *voice = &m_voice[m_current_page & 0x1f]; int shift = 8 * (offset & 3); @@ -1954,7 +1954,7 @@ inline void es5505_device::reg_write_test(es550x_voice *voice, offs_t offset, u1 } -WRITE16_MEMBER(es5505_device::write) +void es5505_device::write(offs_t offset, u16 data, u16 mem_mask) { es550x_voice *voice = &m_voice[m_current_page & 0x1f]; @@ -2170,7 +2170,7 @@ inline u16 es5505_device::reg_read_test(es550x_voice *voice, offs_t offset) } -READ16_MEMBER(es5505_device::read) +u16 es5505_device::read(offs_t offset) { es550x_voice *voice = &m_voice[m_current_page & 0x1f]; u16 result; diff --git a/src/devices/sound/es5506.h b/src/devices/sound/es5506.h index de26c0b1e5a..fe4beb71a6b 100644 --- a/src/devices/sound/es5506.h +++ b/src/devices/sound/es5506.h @@ -159,8 +159,8 @@ public: es5506_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); ~es5506_device() {} - uint8_t read(offs_t offset); - void write(offs_t offset, uint8_t data); + u8 read(offs_t offset); + void write(offs_t offset, u8 data); void voice_bank_w(int voice, int bank); protected: @@ -205,8 +205,8 @@ class es5505_device : public es550x_device public: es5505_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - DECLARE_READ16_MEMBER(read); - DECLARE_WRITE16_MEMBER(write); + u16 read(offs_t offset); + void write(offs_t offset, u16 data, u16 mem_mask = ~0); void voice_bank_w(int voice, int bank); protected: diff --git a/src/devices/sound/gaelco.cpp b/src/devices/sound/gaelco.cpp index f340c5dfa4d..0c2495a4d64 100644 --- a/src/devices/sound/gaelco.cpp +++ b/src/devices/sound/gaelco.cpp @@ -189,7 +189,7 @@ void gaelco_gae1_device::sound_stream_update(sound_stream &stream, stream_sample CG-1V/GAE1 Read Handler ============================================================================*/ -READ16_MEMBER( gaelco_gae1_device::gaelcosnd_r ) +uint16_t gaelco_gae1_device::gaelcosnd_r(offs_t offset) { LOG_READ_WRITES(("%s: (GAE1): read from %04x\n", machine().describe_context(), offset)); @@ -203,7 +203,7 @@ READ16_MEMBER( gaelco_gae1_device::gaelcosnd_r ) CG-1V/GAE1 Write Handler ============================================================================*/ -WRITE16_MEMBER( gaelco_gae1_device::gaelcosnd_w ) +void gaelco_gae1_device::gaelcosnd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { sound_channel *channel = &m_channel[offset >> 3]; diff --git a/src/devices/sound/gaelco.h b/src/devices/sound/gaelco.h index f10cf4446e2..07af14a73ec 100644 --- a/src/devices/sound/gaelco.h +++ b/src/devices/sound/gaelco.h @@ -30,8 +30,8 @@ public: m_banks[3] = offs4; } - DECLARE_WRITE16_MEMBER( gaelcosnd_w ); - DECLARE_READ16_MEMBER( gaelcosnd_r ); + void gaelcosnd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t gaelcosnd_r(offs_t offset); protected: gaelco_gae1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/sound/i5000.cpp b/src/devices/sound/i5000.cpp index 7c8a19111fc..c317d976d9f 100644 --- a/src/devices/sound/i5000.cpp +++ b/src/devices/sound/i5000.cpp @@ -266,7 +266,7 @@ void i5000snd_device::write_reg16(uint8_t reg, uint16_t data) } -READ16_MEMBER( i5000snd_device::read ) +uint16_t i5000snd_device::read(offs_t offset) { uint16_t ret = 0; m_stream->update(); @@ -291,7 +291,7 @@ READ16_MEMBER( i5000snd_device::read ) } -WRITE16_MEMBER( i5000snd_device::write ) +void i5000snd_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) { if (mem_mask != 0xffff) { diff --git a/src/devices/sound/i5000.h b/src/devices/sound/i5000.h index f3891f2730f..9a9a8efb3af 100644 --- a/src/devices/sound/i5000.h +++ b/src/devices/sound/i5000.h @@ -25,8 +25,8 @@ public: // construction/destruction i5000snd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER(read); - DECLARE_WRITE16_MEMBER(write); + uint16_t read(offs_t offset); + void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/sound/iopspu.cpp b/src/devices/sound/iopspu.cpp index 88ace1df633..1d4e78f879c 100644 --- a/src/devices/sound/iopspu.cpp +++ b/src/devices/sound/iopspu.cpp @@ -119,7 +119,7 @@ void iop_spu_device::port_write(int bank, uint16_t data) core.m_curr_port_addr = 0x2800 >> 1; } -READ16_MEMBER(iop_spu_device::read) +uint16_t iop_spu_device::read(offs_t offset, uint16_t mem_mask) { return reg_read(BIT(offset, 9), (offset << 1) & 0x3ff, mem_mask); } @@ -171,7 +171,7 @@ uint16_t iop_spu_device::reg_read(int bank, uint32_t offset, uint16_t mem_mask) return ret; } -WRITE16_MEMBER(iop_spu_device::write) +void iop_spu_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) { reg_write(BIT(offset, 9), (offset << 1) & 0x3ff, data, mem_mask); } diff --git a/src/devices/sound/iopspu.h b/src/devices/sound/iopspu.h index d199b4876bd..6a9e6235409 100644 --- a/src/devices/sound/iopspu.h +++ b/src/devices/sound/iopspu.h @@ -31,8 +31,8 @@ public: iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~iop_spu_device() override; - DECLARE_READ16_MEMBER(read); - DECLARE_WRITE16_MEMBER(write); + uint16_t read(offs_t offset, uint16_t mem_mask = ~0); + void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint16_t reg_read(int bank, uint32_t offset, uint16_t mem_mask); void reg_write(int bank, uint32_t offset, uint16_t data, uint16_t mem_mask); diff --git a/src/devices/sound/nile.cpp b/src/devices/sound/nile.cpp index fcd9e4b592d..80023870593 100644 --- a/src/devices/sound/nile.cpp +++ b/src/devices/sound/nile.cpp @@ -167,7 +167,7 @@ void nile_device::sound_stream_update(sound_stream &stream, stream_sample_t **in } -WRITE16_MEMBER( nile_device::nile_sndctrl_w ) +void nile_device::nile_sndctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) { uint16_t ctrl=m_ctrl; @@ -181,14 +181,14 @@ WRITE16_MEMBER( nile_device::nile_sndctrl_w ) } -READ16_MEMBER( nile_device::nile_sndctrl_r ) +uint16_t nile_device::nile_sndctrl_r() { m_stream->update(); return m_ctrl; } -READ16_MEMBER( nile_device::nile_snd_r ) +uint16_t nile_device::nile_snd_r(offs_t offset) { int reg=offset&0xf; @@ -212,7 +212,7 @@ READ16_MEMBER( nile_device::nile_snd_r ) } -WRITE16_MEMBER( nile_device::nile_snd_w ) +void nile_device::nile_snd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { int v, r; diff --git a/src/devices/sound/nile.h b/src/devices/sound/nile.h index 20a7a0a0c99..169c90c9e4d 100644 --- a/src/devices/sound/nile.h +++ b/src/devices/sound/nile.h @@ -26,10 +26,10 @@ protected: virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override; public: - DECLARE_WRITE16_MEMBER( nile_snd_w ); - DECLARE_READ16_MEMBER( nile_snd_r ); - DECLARE_WRITE16_MEMBER( nile_sndctrl_w ); - DECLARE_READ16_MEMBER( nile_sndctrl_r ); + void nile_snd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t nile_snd_r(offs_t offset); + void nile_sndctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t nile_sndctrl_r(); private: static constexpr unsigned NILE_VOICES = 8; diff --git a/src/devices/sound/qsound.cpp b/src/devices/sound/qsound.cpp index 6d2e4479e9b..05410b73c6c 100644 --- a/src/devices/sound/qsound.cpp +++ b/src/devices/sound/qsound.cpp @@ -141,7 +141,7 @@ qsound_device::qsound_device(machine_config const &mconfig, char const *tag, dev } -WRITE8_MEMBER(qsound_device::qsound_w) +void qsound_device::qsound_w(offs_t offset, u8 data) { switch (offset) { @@ -169,7 +169,7 @@ WRITE8_MEMBER(qsound_device::qsound_w) } -READ8_MEMBER(qsound_device::qsound_r) +u8 qsound_device::qsound_r() { return m_dsp_ready ? 0x80 : 0x00; } @@ -279,7 +279,7 @@ void qsound_device::dsp_io_map(address_map &map) } -READ16_MEMBER(qsound_device::dsp_sample_r) +u16 qsound_device::dsp_sample_r(offs_t offset) { // on CPS2, bit 0-7 of external ROM data is tied to ground u8 const byte(read_byte((u32(m_rom_bank) << 16) | m_rom_offset)); diff --git a/src/devices/sound/qsound.h b/src/devices/sound/qsound.h index d4694f1bf5f..401991c6a59 100644 --- a/src/devices/sound/qsound.h +++ b/src/devices/sound/qsound.h @@ -20,8 +20,8 @@ public: // default 60MHz clock (divided by 2 for DSP core clock, and then by 1248 for sample rate) qsound_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 60'000'000); - DECLARE_WRITE8_MEMBER(qsound_w); - DECLARE_READ8_MEMBER(qsound_r); + void qsound_w(offs_t offset, u8 data); + u8 qsound_r(); protected: // device_t implementation @@ -41,7 +41,7 @@ protected: private: // DSP ROM access - DECLARE_READ16_MEMBER(dsp_sample_r); + u16 dsp_sample_r(offs_t offset); void dsp_pio_w(offs_t offset, u16 data); // for synchronised DSP communication diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index 4436ee07a5e..2fca94c32e2 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -318,7 +318,7 @@ void rf5c400_device::rom_bank_updated() /*****************************************************************************/ -READ16_MEMBER( rf5c400_device::rf5c400_r ) +uint16_t rf5c400_device::rf5c400_r(offs_t offset, uint16_t mem_mask) { if (offset < 0x400) { @@ -364,7 +364,7 @@ READ16_MEMBER( rf5c400_device::rf5c400_r ) } } -WRITE16_MEMBER( rf5c400_device::rf5c400_w ) +void rf5c400_device::rf5c400_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (offset < 0x400) { diff --git a/src/devices/sound/rf5c400.h b/src/devices/sound/rf5c400.h index 1dd7f2ee032..6971c8fc283 100644 --- a/src/devices/sound/rf5c400.h +++ b/src/devices/sound/rf5c400.h @@ -23,8 +23,8 @@ class rf5c400_device : public device_t, public: rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER( rf5c400_r ); - DECLARE_WRITE16_MEMBER( rf5c400_w ); + uint16_t rf5c400_r(offs_t offset, uint16_t mem_mask = ~0); + void rf5c400_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/sound/scsp.cpp b/src/devices/sound/scsp.cpp index 63faf391116..97256bfe01a 100644 --- a/src/devices/sound/scsp.cpp +++ b/src/devices/sound/scsp.cpp @@ -1457,13 +1457,13 @@ int IRQCB(void *param) #endif -READ16_MEMBER(scsp_device::read) +u16 scsp_device::read(offs_t offset) { m_stream->update(); return r16(offset * 2); } -WRITE16_MEMBER(scsp_device::write) +void scsp_device::write(offs_t offset, u16 data, u16 mem_mask) { m_stream->update(); @@ -1482,11 +1482,9 @@ void scsp_device::midi_in(u8 data) CheckPendingIRQ(); } -READ16_MEMBER(scsp_device::midi_out_r) +u16 scsp_device::midi_out_r() { - u8 val; - - val = m_MidiStack[m_MidiR++]; + u8 val = m_MidiStack[m_MidiR++]; m_MidiR &= 31; return val; } diff --git a/src/devices/sound/scsp.h b/src/devices/sound/scsp.h index c349339c463..3a4e94074a6 100644 --- a/src/devices/sound/scsp.h +++ b/src/devices/sound/scsp.h @@ -29,12 +29,12 @@ public: auto main_irq_cb() { return m_main_irq_cb.bind(); } // SCSP register access - DECLARE_READ16_MEMBER(read); - DECLARE_WRITE16_MEMBER(write); + u16 read(offs_t offset); + void write(offs_t offset, u16 data, u16 mem_mask = ~0); // MIDI I/O access (used for comms on Model 2/3) void midi_in(u8 data); - DECLARE_READ16_MEMBER(midi_out_r); + u16 midi_out_r(); protected: // device-level overrides diff --git a/src/devices/sound/zsg2.cpp b/src/devices/sound/zsg2.cpp index bac1d065ba6..3376f466b19 100644 --- a/src/devices/sound/zsg2.cpp +++ b/src/devices/sound/zsg2.cpp @@ -609,7 +609,7 @@ uint16_t zsg2_device::control_r(int reg) /******************************************************************************/ -WRITE16_MEMBER(zsg2_device::write) +void zsg2_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) { // we only support full 16-bit accesses if (mem_mask != 0xffff) @@ -633,7 +633,7 @@ WRITE16_MEMBER(zsg2_device::write) } } -READ16_MEMBER(zsg2_device::read) +uint16_t zsg2_device::read(offs_t offset, uint16_t mem_mask) { // we only support full 16-bit accesses if (mem_mask != 0xffff) diff --git a/src/devices/sound/zsg2.h b/src/devices/sound/zsg2.h index 1601b9da964..b0506927440 100644 --- a/src/devices/sound/zsg2.h +++ b/src/devices/sound/zsg2.h @@ -20,8 +20,8 @@ public: // configuration helpers auto ext_read() { return m_ext_read_handler.bind(); } - DECLARE_READ16_MEMBER(read); - DECLARE_WRITE16_MEMBER(write); + uint16_t read(offs_t offset, uint16_t mem_mask = ~0); + void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: // device-level overrides diff --git a/src/devices/video/catseye.cpp b/src/devices/video/catseye.cpp index 0423b88fb8f..ef242b38969 100644 --- a/src/devices/video/catseye.cpp +++ b/src/devices/video/catseye.cpp @@ -433,7 +433,7 @@ u16 catseye_device::vram_r(offs_t offset, u16 mem_mask) return vram_r_word<Idx>(offset, mem_mask); } -READ16_MEMBER(catseye_device::vram_r) +uint16_t catseye_device::vram_r(offs_t offset, uint16_t mem_mask) { uint16_t ret = 0; @@ -491,7 +491,7 @@ void catseye_device::vram_w(offs_t offset, u16 data, u16 mem_mask) vram_w_word<Idx>(offset, data, mem_mask); } -WRITE16_MEMBER(catseye_device::vram_w) +void catseye_device::vram_w(offs_t offset, u16 data, u16 mem_mask) { LOGMASKED(LOG_VRAM, "%s: %04x: %04x(%04x)\n", __func__, offset << 1, data, mem_mask); @@ -502,7 +502,7 @@ WRITE16_MEMBER(catseye_device::vram_w) vram_w<VRAM_OVERLAY_PLANE>(offset, data, mem_mask); } -WRITE16_MEMBER(catseye_device::ctrl_w) +void catseye_device::ctrl_w(offs_t offset, u16 data, u16 mem_mask) { bool trigger = false; @@ -863,7 +863,7 @@ WRITE16_MEMBER(catseye_device::ctrl_w) } -READ16_MEMBER(catseye_device::ctrl_r) +uint16_t catseye_device::ctrl_r(address_space &space, offs_t offset, uint16_t mem_mask) { uint16_t ret; diff --git a/src/devices/video/catseye.h b/src/devices/video/catseye.h index 0ba53675ac6..8c66eb257c7 100644 --- a/src/devices/video/catseye.h +++ b/src/devices/video/catseye.h @@ -12,10 +12,10 @@ public: catseye_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER(vram_r); - DECLARE_WRITE16_MEMBER(vram_w); - DECLARE_READ16_MEMBER(ctrl_r); - DECLARE_WRITE16_MEMBER(ctrl_w); + uint16_t vram_r(offs_t offset, uint16_t mem_mask = ~0); + void vram_w(offs_t offset, u16 data, u16 mem_mask = ~0); + uint16_t ctrl_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0); + void ctrl_w(offs_t offset, u16 data, u16 mem_mask = ~0); DECLARE_WRITE_LINE_MEMBER(vblank_w); void set_fb_width(int width) { m_fb_width = width; } diff --git a/src/devices/video/cesblit.cpp b/src/devices/video/cesblit.cpp index 0dcfb813c86..4cea7aef4f5 100644 --- a/src/devices/video/cesblit.cpp +++ b/src/devices/video/cesblit.cpp @@ -131,12 +131,12 @@ void cesblit_device::device_stop() READ/WRITE HANDLERS ***************************************************************************/ -READ16_MEMBER(cesblit_device::status_r) +uint16_t cesblit_device::status_r() { return 0x0000; // bit 7 = blitter busy } -WRITE16_MEMBER(cesblit_device::regs_w) +void cesblit_device::regs_w(offs_t offset, uint16_t data, uint16_t mem_mask) { uint16_t olddata = m_regs[offset]; uint16_t newdata = COMBINE_DATA( &m_regs[offset] ); @@ -158,12 +158,12 @@ WRITE16_MEMBER(cesblit_device::regs_w) } } -WRITE16_MEMBER(cesblit_device::color_w) +void cesblit_device::color_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA( &m_color ); } -WRITE16_MEMBER(cesblit_device::addr_hi_w) +void cesblit_device::addr_hi_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA( &m_addr_hi ); } diff --git a/src/devices/video/cesblit.h b/src/devices/video/cesblit.h index d535921ef6b..2a00d601067 100644 --- a/src/devices/video/cesblit.h +++ b/src/devices/video/cesblit.h @@ -39,10 +39,10 @@ public: void set_compute_addr(compute_addr_t compute_addr) { m_compute_addr = compute_addr; } auto irq_callback() { return m_blit_irq_cb.bind(); } - DECLARE_WRITE16_MEMBER(color_w); - DECLARE_WRITE16_MEMBER(addr_hi_w); - DECLARE_WRITE16_MEMBER(regs_w); - DECLARE_READ16_MEMBER(status_r); + void color_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void addr_hi_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void regs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t status_r(); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); diff --git a/src/devices/video/epic12.cpp b/src/devices/video/epic12.cpp index 49c407cb5d0..3adca495c8c 100644 --- a/src/devices/video/epic12.cpp +++ b/src/devices/video/epic12.cpp @@ -686,7 +686,7 @@ u32 epic12_device::gfx_ready_r_unsafe() return 0x00000010; } -WRITE32_MEMBER(epic12_device::gfx_exec_w) +void epic12_device::gfx_exec_w(address_space &space, offs_t offset, u32 data, u32 mem_mask) { if (ACCESSING_BITS_0_7) { @@ -818,7 +818,7 @@ void epic12_device::draw_screen(bitmap_rgb32 &bitmap, const rectangle &cliprect) } -READ32_MEMBER(epic12_device::blitter_r) +u32 epic12_device::blitter_r(offs_t offset, u32 mem_mask) { switch (offset * 4) { @@ -842,7 +842,7 @@ READ32_MEMBER(epic12_device::blitter_r) return 0; } -READ32_MEMBER(epic12_device::blitter_r_unsafe) +u32 epic12_device::blitter_r_unsafe(offs_t offset, u32 mem_mask) { switch (offset * 4) { @@ -867,7 +867,7 @@ READ32_MEMBER(epic12_device::blitter_r_unsafe) } -WRITE32_MEMBER(epic12_device::blitter_w) +void epic12_device::blitter_w(address_space &space, offs_t offset, u32 data, u32 mem_mask) { switch (offset * 4) { @@ -898,7 +898,7 @@ WRITE32_MEMBER(epic12_device::blitter_w) } } -WRITE32_MEMBER(epic12_device::blitter_w_unsafe) +void epic12_device::blitter_w_unsafe(address_space &space, offs_t offset, u32 data, u32 mem_mask) { switch (offset * 4) { @@ -933,22 +933,23 @@ void epic12_device::install_handlers(int addr1, int addr2) { address_space &space = m_maincpu->space(AS_PROGRAM); - read32_delegate read(*this); + read32s_delegate read(*this); write32_delegate write(*this); if (m_is_unsafe) { printf("using unsafe blit code!\n"); - read = read32_delegate(*this, FUNC(epic12_device::blitter_r_unsafe)); + read = read32s_delegate(*this, FUNC(epic12_device::blitter_r_unsafe)); write = write32_delegate(*this, FUNC(epic12_device::blitter_w_unsafe)); } else { - read = read32_delegate(*this, FUNC(epic12_device::blitter_r)); + read = read32s_delegate(*this, FUNC(epic12_device::blitter_r)); write = write32_delegate(*this, FUNC(epic12_device::blitter_w)); } - space.install_readwrite_handler(addr1, addr2, std::move(read), std::move(write), 0xffffffffffffffffU); + space.install_read_handler(addr1, addr2, std::move(read), 0xffffffffffffffffU); + space.install_write_handler(addr1, addr2, std::move(write), 0xffffffffffffffffU); } u64 epic12_device::fpga_r() diff --git a/src/devices/video/epic12.h b/src/devices/video/epic12.h index 7098847d0e6..afea33d4f0d 100644 --- a/src/devices/video/epic12.h +++ b/src/devices/video/epic12.h @@ -53,8 +53,8 @@ public: void install_handlers(int addr1, int addr2); // thread safe mode, with no delays & shadow ram copy - DECLARE_READ32_MEMBER(blitter_r); - DECLARE_WRITE32_MEMBER(blitter_w); + u32 blitter_r(offs_t offset, u32 mem_mask = ~0); + void blitter_w(address_space &space, offs_t offset, u32 data, u32 mem_mask = ~0); u32 m_gfx_addr_shadowcopy; u32 m_gfx_scroll_0_x_shadowcopy, m_gfx_scroll_0_y_shadowcopy; u32 m_gfx_scroll_1_x_shadowcopy, m_gfx_scroll_1_y_shadowcopy; @@ -67,11 +67,11 @@ public: inline void gfx_draw(offs_t *addr); void gfx_exec(void); u32 gfx_ready_r(); - DECLARE_WRITE32_MEMBER(gfx_exec_w); + void gfx_exec_w(address_space &space, offs_t offset, u32 data, u32 mem_mask = ~0); // for thread unsafe mode with blitter delays, no shadow copy of RAM - DECLARE_READ32_MEMBER(blitter_r_unsafe); - DECLARE_WRITE32_MEMBER(blitter_w_unsafe); + u32 blitter_r_unsafe(offs_t offset, u32 mem_mask = ~0); + void blitter_w_unsafe(address_space &space, offs_t offset, u32 data, u32 mem_mask = ~0); u32 gfx_ready_r_unsafe(); void gfx_exec_w_unsafe(offs_t offset, u32 data, u32 mem_mask = ~0); void gfx_exec_unsafe(void); diff --git a/src/devices/video/huc6261.cpp b/src/devices/video/huc6261.cpp index fe86efee2e6..4345e0ce245 100644 --- a/src/devices/video/huc6261.cpp +++ b/src/devices/video/huc6261.cpp @@ -230,7 +230,7 @@ void huc6261_device::video_update( bitmap_rgb32 &bitmap, const rectangle &clipre } -READ16_MEMBER( huc6261_device::read ) +uint16_t huc6261_device::read(offs_t offset) { uint16_t data = 0xFFFF; @@ -285,7 +285,7 @@ READ16_MEMBER( huc6261_device::read ) } -WRITE16_MEMBER( huc6261_device::write ) +void huc6261_device::write(offs_t offset, uint16_t data) { switch ( offset & 1 ) { diff --git a/src/devices/video/huc6261.h b/src/devices/video/huc6261.h index 33efd71fcd9..47e10c2a0e0 100644 --- a/src/devices/video/huc6261.h +++ b/src/devices/video/huc6261.h @@ -31,8 +31,8 @@ public: template <typename T> void set_king_tag(T &&tag) { m_huc6272.set_tag(std::forward<T>(tag)); } void video_update(bitmap_rgb32 &bitmap, const rectangle &cliprect); - DECLARE_READ16_MEMBER( read ); - DECLARE_WRITE16_MEMBER( write ); + uint16_t read(offs_t offset); + void write(offs_t offset, uint16_t data); protected: // device-level overrides diff --git a/src/devices/video/imagetek_i4100.cpp b/src/devices/video/imagetek_i4100.cpp index 462ae0b131a..28fed1c00f6 100644 --- a/src/devices/video/imagetek_i4100.cpp +++ b/src/devices/video/imagetek_i4100.cpp @@ -383,12 +383,12 @@ void imagetek_i4100_device::device_timer(emu_timer &timer, device_timer_id id, i // READ/WRITE HANDLERS //************************************************************************** -READ16_MEMBER(imagetek_i4100_device::vram_0_r){ return vram_r(offset, 0); } -READ16_MEMBER(imagetek_i4100_device::vram_1_r){ return vram_r(offset, 1); } -READ16_MEMBER(imagetek_i4100_device::vram_2_r){ return vram_r(offset, 2); } -WRITE16_MEMBER(imagetek_i4100_device::vram_0_w){ vram_w(offset, data, mem_mask, 0); } -WRITE16_MEMBER(imagetek_i4100_device::vram_1_w){ vram_w(offset, data, mem_mask, 1); } -WRITE16_MEMBER(imagetek_i4100_device::vram_2_w){ vram_w(offset, data, mem_mask, 2); } +uint16_t imagetek_i4100_device::vram_0_r(offs_t offset){ return vram_r(offset, 0); } +uint16_t imagetek_i4100_device::vram_1_r(offs_t offset){ return vram_r(offset, 1); } +uint16_t imagetek_i4100_device::vram_2_r(offs_t offset){ return vram_r(offset, 2); } +void imagetek_i4100_device::vram_0_w(offs_t offset, uint16_t data, uint16_t mem_mask){ vram_w(offset, data, mem_mask, 0); } +void imagetek_i4100_device::vram_1_w(offs_t offset, uint16_t data, uint16_t mem_mask){ vram_w(offset, data, mem_mask, 1); } +void imagetek_i4100_device::vram_2_w(offs_t offset, uint16_t data, uint16_t mem_mask){ vram_w(offset, data, mem_mask, 2); } /* Some game uses almost only the blitter to write to the tilemaps. The CPU can only access a "window" of 512x256 pixels in the upper @@ -400,19 +400,19 @@ static inline offs_t RMW_OFFS(offs_t offset) return (offset & 0x3f) + ((offset & ~0x3f) * (0x100 / 0x40)); } -READ16_MEMBER(imagetek_i4100_device::rmw_vram_0_r){ return vram_r(RMW_OFFS(offset), 0); } -READ16_MEMBER(imagetek_i4100_device::rmw_vram_1_r){ return vram_r(RMW_OFFS(offset), 1); } -READ16_MEMBER(imagetek_i4100_device::rmw_vram_2_r){ return vram_r(RMW_OFFS(offset), 2); } -WRITE16_MEMBER(imagetek_i4100_device::rmw_vram_0_w){ vram_w(RMW_OFFS(offset), data, mem_mask, 0); } -WRITE16_MEMBER(imagetek_i4100_device::rmw_vram_1_w){ vram_w(RMW_OFFS(offset), data, mem_mask, 1); } -WRITE16_MEMBER(imagetek_i4100_device::rmw_vram_2_w){ vram_w(RMW_OFFS(offset), data, mem_mask, 2); } +uint16_t imagetek_i4100_device::rmw_vram_0_r(offs_t offset){ return vram_r(RMW_OFFS(offset), 0); } +uint16_t imagetek_i4100_device::rmw_vram_1_r(offs_t offset){ return vram_r(RMW_OFFS(offset), 1); } +uint16_t imagetek_i4100_device::rmw_vram_2_r(offs_t offset){ return vram_r(RMW_OFFS(offset), 2); } +void imagetek_i4100_device::rmw_vram_0_w(offs_t offset, uint16_t data, uint16_t mem_mask){ vram_w(RMW_OFFS(offset), data, mem_mask, 0); } +void imagetek_i4100_device::rmw_vram_1_w(offs_t offset, uint16_t data, uint16_t mem_mask){ vram_w(RMW_OFFS(offset), data, mem_mask, 1); } +void imagetek_i4100_device::rmw_vram_2_w(offs_t offset, uint16_t data, uint16_t mem_mask){ vram_w(RMW_OFFS(offset), data, mem_mask, 2); } -READ16_MEMBER(imagetek_i4100_device::scratchram_r) { return m_scratchram[offset]; } -WRITE16_MEMBER(imagetek_i4100_device::scratchram_w) { COMBINE_DATA(&m_scratchram[offset]); } -READ16_MEMBER(imagetek_i4100_device::spriteram_r) { return m_spriteram->live()[offset]; } -WRITE16_MEMBER(imagetek_i4100_device::spriteram_w) { COMBINE_DATA(&m_spriteram->live()[offset]); } -READ16_MEMBER(imagetek_i4100_device::tiletable_r) { return m_tiletable[offset]; } -WRITE16_MEMBER(imagetek_i4100_device::tiletable_w) { COMBINE_DATA(&m_tiletable[offset]); } +uint16_t imagetek_i4100_device::scratchram_r(offs_t offset) { return m_scratchram[offset]; } +void imagetek_i4100_device::scratchram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_scratchram[offset]); } +uint16_t imagetek_i4100_device::spriteram_r(offs_t offset) { return m_spriteram->live()[offset]; } +void imagetek_i4100_device::spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_spriteram->live()[offset]); } +uint16_t imagetek_i4100_device::tiletable_r(offs_t offset) { return m_tiletable[offset]; } +void imagetek_i4100_device::tiletable_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_tiletable[offset]); } // video registers /************************************************************* @@ -420,8 +420,8 @@ WRITE16_MEMBER(imagetek_i4100_device::tiletable_w) { COMBINE_DATA(&m_tiletable[o * 0.w ---- ---- ---- ---- Number Of Sprites To Draw * ************************************************************/ -READ16_MEMBER(imagetek_i4100_device::sprite_count_r) { return m_sprite_count; } -WRITE16_MEMBER(imagetek_i4100_device::sprite_count_w) { COMBINE_DATA(&m_sprite_count); } +uint16_t imagetek_i4100_device::sprite_count_r() { return m_sprite_count; } +void imagetek_i4100_device::sprite_count_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_sprite_count); } /************************************************************* * @@ -433,8 +433,8 @@ WRITE16_MEMBER(imagetek_i4100_device::sprite_count_w) { COMBINE_DATA(&m_sprite_c * ---- ---- ---4 3210 Sprites Masked Number * *************************************************************/ -READ16_MEMBER(imagetek_i4100_device::sprite_priority_r) { return m_sprite_priority; } -WRITE16_MEMBER(imagetek_i4100_device::sprite_priority_w) { COMBINE_DATA(&m_sprite_priority); } +uint16_t imagetek_i4100_device::sprite_priority_r() { return m_sprite_priority; } +void imagetek_i4100_device::sprite_priority_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_sprite_priority); } /************************************************************* * @@ -442,18 +442,18 @@ WRITE16_MEMBER(imagetek_i4100_device::sprite_priority_w) { COMBINE_DATA(&m_sprit * 6.w ---- ---- ---- ---- Sprites X Offset * ************************************************************/ -READ16_MEMBER(imagetek_i4100_device::sprite_xoffset_r) { return m_sprite_xoffset; } -WRITE16_MEMBER(imagetek_i4100_device::sprite_xoffset_w) { COMBINE_DATA(&m_sprite_xoffset); } -READ16_MEMBER(imagetek_i4100_device::sprite_yoffset_r) { return m_sprite_yoffset; } -WRITE16_MEMBER(imagetek_i4100_device::sprite_yoffset_w) { COMBINE_DATA(&m_sprite_yoffset); } +uint16_t imagetek_i4100_device::sprite_xoffset_r() { return m_sprite_xoffset; } +void imagetek_i4100_device::sprite_xoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_sprite_xoffset); } +uint16_t imagetek_i4100_device::sprite_yoffset_r() { return m_sprite_yoffset; } +void imagetek_i4100_device::sprite_yoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_sprite_yoffset); } /************************************************************* * * 8.w ---- ---- ---- ---- Sprites Color Codes Start * ************************************************************/ -READ16_MEMBER(imagetek_i4100_device::sprite_color_code_r) { return m_sprite_color_code; } -WRITE16_MEMBER(imagetek_i4100_device::sprite_color_code_w) { COMBINE_DATA(&m_sprite_color_code); } +uint16_t imagetek_i4100_device::sprite_color_code_r() { return m_sprite_color_code; } +void imagetek_i4100_device::sprite_color_code_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_sprite_color_code); } /************************************************************* * @@ -463,12 +463,12 @@ WRITE16_MEMBER(imagetek_i4100_device::sprite_color_code_w) { COMBINE_DATA(&m_spr * ************************************************************/ -READ16_MEMBER(imagetek_i4100_device::layer_priority_r) +uint16_t imagetek_i4100_device::layer_priority_r() { return (m_layer_priority[2]<<4) | (m_layer_priority[1]<<2) | m_layer_priority[0]; } -WRITE16_MEMBER(imagetek_i4100_device::layer_priority_w) +void imagetek_i4100_device::layer_priority_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_layer_priority[2] = (data >> 4) & 3; m_layer_priority[1] = (data >> 2) & 3; @@ -483,12 +483,12 @@ WRITE16_MEMBER(imagetek_i4100_device::layer_priority_w) * ************************************************************/ -READ16_MEMBER(imagetek_i4100_device::background_color_r) +uint16_t imagetek_i4100_device::background_color_r() { return m_background_color; } -WRITE16_MEMBER(imagetek_i4100_device::background_color_w) +void imagetek_i4100_device::background_color_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_background_color); @@ -506,15 +506,15 @@ WRITE16_MEMBER(imagetek_i4100_device::background_color_w) * certain conditions * ***************************************************************************/ -READ16_MEMBER(imagetek_i4100_device::screen_xoffset_r) { return m_screen_xoffset; } -WRITE16_MEMBER(imagetek_i4100_device::screen_xoffset_w) { COMBINE_DATA(&m_screen_xoffset); } -READ16_MEMBER(imagetek_i4100_device::screen_yoffset_r) { return m_screen_yoffset; } -WRITE16_MEMBER(imagetek_i4100_device::screen_yoffset_w) { COMBINE_DATA(&m_screen_yoffset); } +uint16_t imagetek_i4100_device::screen_xoffset_r() { return m_screen_xoffset; } +void imagetek_i4100_device::screen_xoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_screen_xoffset); } +uint16_t imagetek_i4100_device::screen_yoffset_r() { return m_screen_yoffset; } +void imagetek_i4100_device::screen_yoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_screen_yoffset); } -READ16_MEMBER(imagetek_i4100_device::window_r) { return m_window[offset]; } -WRITE16_MEMBER(imagetek_i4100_device::window_w) { COMBINE_DATA(&m_window[offset]); } -READ16_MEMBER(imagetek_i4100_device::scroll_r) { return m_scroll[offset]; } -WRITE16_MEMBER(imagetek_i4100_device::scroll_w) { COMBINE_DATA(&m_scroll[offset]); } +uint16_t imagetek_i4100_device::window_r(offs_t offset) { return m_window[offset]; } +void imagetek_i4100_device::window_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_window[offset]); } +uint16_t imagetek_i4100_device::scroll_r(offs_t offset) { return m_scroll[offset]; } +void imagetek_i4100_device::scroll_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_scroll[offset]); } /**************************************************** * @@ -529,7 +529,7 @@ WRITE16_MEMBER(imagetek_i4100_device::scroll_w) { COMBINE_DATA(&m_scroll[offset] * ---- ---- ---- ---0 Flip Screen * ****************************************************/ -WRITE16_MEMBER(imagetek_i4100_device::screen_ctrl_w) +void imagetek_i4100_device::screen_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_layer_tile_select[2] = BIT(data,7); m_layer_tile_select[1] = BIT(data,6); @@ -553,7 +553,7 @@ WRITE16_MEMBER(imagetek_i4100_device::screen_ctrl_w) that the blitter can readily use (which is a form of compression) */ -READ16_MEMBER(imagetek_i4100_device::gfxrom_r) +uint16_t imagetek_i4100_device::gfxrom_r(offs_t offset) { offset = offset * 2 + 0x10000 * (m_rombank); @@ -563,12 +563,12 @@ READ16_MEMBER(imagetek_i4100_device::gfxrom_r) return 0xffff; } -WRITE16_MEMBER(imagetek_i4100_device::rombank_w) +void imagetek_i4100_device::rombank_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_rombank); } -WRITE16_MEMBER(imagetek_i4100_device::crtc_horz_w) +void imagetek_i4100_device::crtc_horz_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (m_crtc_unlock == true) { @@ -576,7 +576,7 @@ WRITE16_MEMBER(imagetek_i4100_device::crtc_horz_w) } } -WRITE16_MEMBER(imagetek_i4100_device::crtc_vert_w) +void imagetek_i4100_device::crtc_vert_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (m_crtc_unlock == true) { @@ -584,7 +584,7 @@ WRITE16_MEMBER(imagetek_i4100_device::crtc_vert_w) } } -WRITE16_MEMBER(imagetek_i4100_device::crtc_unlock_w) +void imagetek_i4100_device::crtc_unlock_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_crtc_unlock = BIT(data,0); if (data & ~1) @@ -694,7 +694,7 @@ void imagetek_i4100_device::blt_write(int const tmap, const offs_t offs, u16 con // TODO: clean this up -WRITE16_MEMBER(imagetek_i4100_device::blitter_w) +void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_blitter_regs[offset]); diff --git a/src/devices/video/imagetek_i4100.h b/src/devices/video/imagetek_i4100.h index aed5413df53..9936b8f76ab 100644 --- a/src/devices/video/imagetek_i4100.h +++ b/src/devices/video/imagetek_i4100.h @@ -111,57 +111,57 @@ protected: // I/O operations inline u16 vram_r(offs_t offset, int layer) { return m_vram[layer][offset]; } inline void vram_w(offs_t offset, u16 data, u16 mem_mask, int layer) { COMBINE_DATA(&m_vram[layer][offset]); } - DECLARE_READ16_MEMBER(vram_0_r); - DECLARE_READ16_MEMBER(vram_1_r); - DECLARE_READ16_MEMBER(vram_2_r); - DECLARE_WRITE16_MEMBER(vram_0_w); - DECLARE_WRITE16_MEMBER(vram_1_w); - DECLARE_WRITE16_MEMBER(vram_2_w); - DECLARE_READ16_MEMBER(rmw_vram_0_r); - DECLARE_READ16_MEMBER(rmw_vram_1_r); - DECLARE_READ16_MEMBER(rmw_vram_2_r); - DECLARE_WRITE16_MEMBER(rmw_vram_0_w); - DECLARE_WRITE16_MEMBER(rmw_vram_1_w); - DECLARE_WRITE16_MEMBER(rmw_vram_2_w); - DECLARE_READ16_MEMBER(scratchram_r); - DECLARE_WRITE16_MEMBER(scratchram_w); - DECLARE_READ16_MEMBER(spriteram_r); - DECLARE_WRITE16_MEMBER(spriteram_w); - DECLARE_READ16_MEMBER(tiletable_r); - DECLARE_WRITE16_MEMBER(tiletable_w); - DECLARE_READ16_MEMBER(sprite_count_r); - DECLARE_WRITE16_MEMBER(sprite_count_w); - DECLARE_READ16_MEMBER(sprite_priority_r); - DECLARE_WRITE16_MEMBER(sprite_priority_w); - DECLARE_READ16_MEMBER(sprite_xoffset_r); - DECLARE_WRITE16_MEMBER(sprite_xoffset_w); - DECLARE_READ16_MEMBER(sprite_yoffset_r); - DECLARE_WRITE16_MEMBER(sprite_yoffset_w); - DECLARE_READ16_MEMBER(sprite_color_code_r); - DECLARE_WRITE16_MEMBER(sprite_color_code_w); - DECLARE_READ16_MEMBER(layer_priority_r); - DECLARE_WRITE16_MEMBER(layer_priority_w); - DECLARE_READ16_MEMBER(background_color_r); - DECLARE_WRITE16_MEMBER(background_color_w); - - DECLARE_READ16_MEMBER(screen_xoffset_r); - DECLARE_WRITE16_MEMBER(screen_xoffset_w); - DECLARE_READ16_MEMBER(screen_yoffset_r); - DECLARE_WRITE16_MEMBER(screen_yoffset_w); - - DECLARE_READ16_MEMBER(window_r); - DECLARE_WRITE16_MEMBER(window_w); - DECLARE_READ16_MEMBER(scroll_r); - DECLARE_WRITE16_MEMBER(scroll_w); - - - DECLARE_READ16_MEMBER(gfxrom_r); - DECLARE_WRITE16_MEMBER(crtc_vert_w); - DECLARE_WRITE16_MEMBER(crtc_horz_w); - DECLARE_WRITE16_MEMBER(crtc_unlock_w); - DECLARE_WRITE16_MEMBER(blitter_w); - DECLARE_WRITE16_MEMBER(screen_ctrl_w); - DECLARE_WRITE16_MEMBER(rombank_w); + uint16_t vram_0_r(offs_t offset); + uint16_t vram_1_r(offs_t offset); + uint16_t vram_2_r(offs_t offset); + void vram_0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void vram_1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void vram_2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t rmw_vram_0_r(offs_t offset); + uint16_t rmw_vram_1_r(offs_t offset); + uint16_t rmw_vram_2_r(offs_t offset); + void rmw_vram_0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void rmw_vram_1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void rmw_vram_2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t scratchram_r(offs_t offset); + void scratchram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t spriteram_r(offs_t offset); + void spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tiletable_r(offs_t offset); + void tiletable_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t sprite_count_r(); + void sprite_count_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t sprite_priority_r(); + void sprite_priority_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t sprite_xoffset_r(); + void sprite_xoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t sprite_yoffset_r(); + void sprite_yoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t sprite_color_code_r(); + void sprite_color_code_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t layer_priority_r(); + void layer_priority_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t background_color_r(); + void background_color_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint16_t screen_xoffset_r(); + void screen_xoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t screen_yoffset_r(); + void screen_yoffset_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint16_t window_r(offs_t offset); + void window_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t scroll_r(offs_t offset); + void scroll_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + + uint16_t gfxrom_r(offs_t offset); + void crtc_vert_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void crtc_horz_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void crtc_unlock_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void screen_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void rombank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void draw_layers(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int pri); inline u8 get_tile_pix(u16 code, u8 x, u8 y, bool const big, u32 &pix); diff --git a/src/devices/video/m50458.cpp b/src/devices/video/m50458.cpp index 59e0f44cc43..97e67af8a75 100644 --- a/src/devices/video/m50458.cpp +++ b/src/devices/video/m50458.cpp @@ -53,12 +53,12 @@ ROM_START( m50458 ) ROM_LOAD("m50458_char.bin", 0x0000, 0x1200, BAD_DUMP CRC(011cc342) SHA1(d5b9f32d6e251b4b25945267d7c68c099bd83e96) ) ROM_END -WRITE16_MEMBER( m50458_device::vreg_120_w) +void m50458_device::vreg_120_w(uint16_t data) { // printf("%04x\n",data); } -WRITE16_MEMBER( m50458_device::vreg_121_w) +void m50458_device::vreg_121_w(uint16_t data) { /* Horizontal char size for line 0 */ m_hsz1 = (data & 0xc0) >> 6; @@ -71,7 +71,7 @@ WRITE16_MEMBER( m50458_device::vreg_121_w) } -WRITE16_MEMBER( m50458_device::vreg_122_w) +void m50458_device::vreg_122_w(uint16_t data) { /* Vertical char size for line 0 */ m_vsz1 = (data & 0xc0) >> 6; @@ -84,7 +84,7 @@ WRITE16_MEMBER( m50458_device::vreg_122_w) } -WRITE16_MEMBER( m50458_device::vreg_123_w) +void m50458_device::vreg_123_w(uint16_t data) { /* fractional part of vertical scrolling */ m_scrf = data & 0x1f; @@ -97,17 +97,17 @@ WRITE16_MEMBER( m50458_device::vreg_123_w) // printf("%02x %02x %02x\n",m_scrr,m_scrf,m_space); } -WRITE16_MEMBER( m50458_device::vreg_124_w) +void m50458_device::vreg_124_w(uint16_t data) { } -WRITE16_MEMBER( m50458_device::vreg_125_w) +void m50458_device::vreg_125_w(uint16_t data) { /* blinking cycle */ m_blink = data & 4 ? 0x20 : 0x40; } -WRITE16_MEMBER( m50458_device::vreg_126_w) +void m50458_device::vreg_126_w(uint16_t data) { /* Raster Color Setting */ m_phase = data & 7; @@ -116,7 +116,7 @@ WRITE16_MEMBER( m50458_device::vreg_126_w) } -WRITE16_MEMBER( m50458_device::vreg_127_w) +void m50458_device::vreg_127_w(uint16_t data) { if(data & 0x20) // RAMERS, display RAM is erased { diff --git a/src/devices/video/m50458.h b/src/devices/video/m50458.h index 07113a93afe..fd0eed36e22 100644 --- a/src/devices/video/m50458.h +++ b/src/devices/video/m50458.h @@ -58,14 +58,14 @@ private: inline uint16_t read_word(offs_t address); inline void write_word(offs_t address, uint16_t data); - DECLARE_WRITE16_MEMBER(vreg_120_w); - DECLARE_WRITE16_MEMBER(vreg_121_w); - DECLARE_WRITE16_MEMBER(vreg_122_w); - DECLARE_WRITE16_MEMBER(vreg_123_w); - DECLARE_WRITE16_MEMBER(vreg_124_w); - DECLARE_WRITE16_MEMBER(vreg_125_w); - DECLARE_WRITE16_MEMBER(vreg_126_w); - DECLARE_WRITE16_MEMBER(vreg_127_w); + void vreg_120_w(uint16_t data); + void vreg_121_w(uint16_t data); + void vreg_122_w(uint16_t data); + void vreg_123_w(uint16_t data); + void vreg_124_w(uint16_t data); + void vreg_125_w(uint16_t data); + void vreg_126_w(uint16_t data); + void vreg_127_w(uint16_t data); void m50458_vram(address_map &map); diff --git a/src/devices/video/nereid.cpp b/src/devices/video/nereid.cpp index 44d1aa42616..47a4c28371b 100644 --- a/src/devices/video/nereid.cpp +++ b/src/devices/video/nereid.cpp @@ -51,7 +51,7 @@ void nereid_device::device_reset() m_overlay_index = 0; } -READ16_MEMBER(nereid_device::ctrl_r) +uint16_t nereid_device::ctrl_r(offs_t offset, uint16_t mem_mask) { LOG("NEREID ctrl_r: %02X\n", offset); @@ -99,7 +99,7 @@ READ16_MEMBER(nereid_device::ctrl_r) return 0xffff; } -WRITE16_MEMBER(nereid_device::ctrl_w) +void nereid_device::ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) { LOG("NEREID: ctrl_w %02X = %02X\n", offset << 1, data); data &= 0xff; diff --git a/src/devices/video/nereid.h b/src/devices/video/nereid.h index ab4b83feeb4..c1e2b96ea2b 100644 --- a/src/devices/video/nereid.h +++ b/src/devices/video/nereid.h @@ -10,8 +10,8 @@ class nereid_device : public device_t, public device_palette_interface public: nereid_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ16_MEMBER(ctrl_r); - DECLARE_WRITE16_MEMBER(ctrl_w); + uint16_t ctrl_r(offs_t offset, uint16_t mem_mask = ~0); + void ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); rgb_t map_color(uint8_t input, uint8_t ovl = 0); diff --git a/src/devices/video/pc_vga.cpp b/src/devices/video/pc_vga.cpp index b2a799341b7..4b426260a75 100644 --- a/src/devices/video/pc_vga.cpp +++ b/src/devices/video/pc_vga.cpp @@ -3563,12 +3563,12 @@ bit 0-12 (911/924) LINE PARAMETER/ERROR TERM. For Line Drawing this is the the major or independent axis). 0-13 (80x +) LINE PARAMETER/ERROR TERM. See above. */ -READ16_MEMBER(ibm8514a_device::ibm8514_line_error_r) +uint16_t ibm8514a_device::ibm8514_line_error_r() { return ibm8514.line_errorterm; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_line_error_w) +void ibm8514a_device::ibm8514_line_error_w(uint16_t data) { ibm8514.line_errorterm = data; if(LOG_8514) logerror("8514/A: Line Parameter/Error Term write %04x\n",data); @@ -3595,7 +3595,7 @@ bit 0-7 Queue State. available, Fh for 9 words, 7 for 10 words, 3 for 11 words, 1 for 12 words and 0 for 13 words available. */ -READ16_MEMBER(ibm8514a_device::ibm8514_gpstatus_r) +uint16_t ibm8514a_device::ibm8514_gpstatus_r() { uint16_t ret = 0x0000; @@ -3735,7 +3735,7 @@ bit 0 (911-928) ~RD/WT. Read/Write Data. If set VRAM write operations are rectangle, which is copied repeatably to the destination rectangle. */ -WRITE16_MEMBER(ibm8514a_device::ibm8514_cmd_w) +void ibm8514a_device::ibm8514_cmd_w(uint16_t data) { int x,y; int pattern_x,pattern_y; @@ -4031,12 +4031,12 @@ bit 0-11 DESTINATION Y-POSITION. During BITBLT operations this is the Y 0-13 (80 x+) LINE PARAMETER AXIAL STEP CONSTANT. Se above */ -READ16_MEMBER(ibm8514a_device::ibm8514_desty_r) +uint16_t ibm8514a_device::ibm8514_desty_r() { return ibm8514.line_axial_step; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_desty_w) +void ibm8514a_device::ibm8514_desty_w(uint16_t data) { ibm8514.line_axial_step = data; ibm8514.dest_y = data; @@ -4056,12 +4056,12 @@ bit 0-11 DESTINATION X-POSITION. During BITBLT operations this is the X 0-13 (80x +) LINE PARAMETER DIAGONAL STEP CONSTANT. Se above */ -READ16_MEMBER(ibm8514a_device::ibm8514_destx_r) +uint16_t ibm8514a_device::ibm8514_destx_r() { return ibm8514.line_diagonal_step; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_destx_w) +void ibm8514a_device::ibm8514_destx_w(uint16_t data) { ibm8514.line_diagonal_step = data; ibm8514.dest_x = data; @@ -4187,12 +4187,12 @@ void ibm8514a_device::ibm8514_draw_ssv(uint8_t data) ibm8514_draw_vector(len,dir,draw); } -READ16_MEMBER(ibm8514a_device::ibm8514_ssv_r) +uint16_t ibm8514a_device::ibm8514_ssv_r() { return ibm8514.ssv; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_ssv_w) +void ibm8514a_device::ibm8514_ssv_w(uint16_t data) { ibm8514.ssv = data; @@ -4299,58 +4299,58 @@ bit 0-10 (911/924) RECTANGLE WIDTH/LINE PARAMETER MAX. For BITBLT and independent axis). Must be positive. 0-11 (80x +) RECTANGLE WIDTH/LINE PARAMETER MAX. See above */ -READ16_MEMBER(ibm8514a_device::ibm8514_width_r) +uint16_t ibm8514a_device::ibm8514_width_r() { return ibm8514.rect_width; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_width_w) +void ibm8514a_device::ibm8514_width_w(uint16_t data) { ibm8514.rect_width = data & 0x1fff; if(LOG_8514) logerror("8514/A: Major Axis Pixel Count / Rectangle Width write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_currentx_r) +uint16_t ibm8514a_device::ibm8514_currentx_r() { return ibm8514.curr_x; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_currentx_w) +void ibm8514a_device::ibm8514_currentx_w(uint16_t data) { ibm8514.curr_x = data; ibm8514.prev_x = data; if(LOG_8514) logerror("8514/A: Current X set to %04x (%i)\n",data,ibm8514.curr_x); } -READ16_MEMBER(ibm8514a_device::ibm8514_currenty_r) +uint16_t ibm8514a_device::ibm8514_currenty_r() { return ibm8514.curr_y; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_currenty_w) +void ibm8514a_device::ibm8514_currenty_w(uint16_t data) { ibm8514.curr_y = data; ibm8514.prev_y = data; if(LOG_8514) logerror("8514/A: Current Y set to %04x (%i)\n",data,ibm8514.curr_y); } -READ16_MEMBER(ibm8514a_device::ibm8514_fgcolour_r) +uint16_t ibm8514a_device::ibm8514_fgcolour_r() { return ibm8514.fgcolour; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_fgcolour_w) +void ibm8514a_device::ibm8514_fgcolour_w(uint16_t data) { ibm8514.fgcolour = data; if(LOG_8514) logerror("8514/A: Foreground Colour write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_bgcolour_r) +uint16_t ibm8514a_device::ibm8514_bgcolour_r() { return ibm8514.bgcolour; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_bgcolour_w) +void ibm8514a_device::ibm8514_bgcolour_w(uint16_t data) { ibm8514.bgcolour = data; if(LOG_8514) logerror("8514/A: Background Colour write %04x\n",data); @@ -4367,12 +4367,12 @@ bit 0-7 (911/924) Read Mask affects the following commands: CMD_RECT, which 16 bits are accessible and each access toggles to the other 16 bits. */ -READ16_MEMBER(ibm8514a_device::ibm8514_read_mask_r) +uint16_t ibm8514a_device::ibm8514_read_mask_r() { return ibm8514.read_mask & 0xffff; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_read_mask_w) +void ibm8514a_device::ibm8514_read_mask_w(uint16_t data) { ibm8514.read_mask = (ibm8514.read_mask & 0xffff0000) | data; if(LOG_8514) logerror("8514/A: Read Mask (Low) write = %08x\n",ibm8514.read_mask); @@ -4388,18 +4388,18 @@ bit 0-7 (911/924) Writemask. A plane can only be modified if the which 16 bits are accessible and each access toggles to the other 16 bits. */ -READ16_MEMBER(ibm8514a_device::ibm8514_write_mask_r) +uint16_t ibm8514a_device::ibm8514_write_mask_r() { return ibm8514.write_mask & 0xffff; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_write_mask_w) +void ibm8514a_device::ibm8514_write_mask_w(uint16_t data) { ibm8514.write_mask = (ibm8514.write_mask & 0xffff0000) | data; if(LOG_8514) logerror("8514/A: Write Mask (Low) write = %08x\n",ibm8514.write_mask); } -READ16_MEMBER(ibm8514a_device::ibm8514_multifunc_r ) +uint16_t ibm8514a_device::ibm8514_multifunc_r() { switch(ibm8514.multifunc_sel) { @@ -4420,7 +4420,7 @@ READ16_MEMBER(ibm8514a_device::ibm8514_multifunc_r ) } } -WRITE16_MEMBER(ibm8514a_device::ibm8514_multifunc_w ) +void ibm8514a_device::ibm8514_multifunc_w(uint16_t data) { switch(data & 0xf000) { @@ -4699,29 +4699,29 @@ bit 0-3 Background MIX (BACKMIX). 2 BSS is Pixel Data from the PIX_TRANS register (E2E8h) 3 BSS is Bitmap Data (Source data from display buffer). */ -READ16_MEMBER(ibm8514a_device::ibm8514_backmix_r) +uint16_t ibm8514a_device::ibm8514_backmix_r() { return ibm8514.bgmix; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_backmix_w) +void ibm8514a_device::ibm8514_backmix_w(uint16_t data) { ibm8514.bgmix = data; if(LOG_8514) logerror("8514/A: BG Mix write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_foremix_r) +uint16_t ibm8514a_device::ibm8514_foremix_r() { return ibm8514.fgmix; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_foremix_w) +void ibm8514a_device::ibm8514_foremix_w(uint16_t data) { ibm8514.fgmix = data; if(LOG_8514) logerror("8514/A: FG Mix write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_pixel_xfer_r) +uint16_t ibm8514a_device::ibm8514_pixel_xfer_r(offs_t offset) { if(offset == 1) return (ibm8514.pixel_xfer & 0xffff0000) >> 16; @@ -4729,7 +4729,7 @@ READ16_MEMBER(ibm8514a_device::ibm8514_pixel_xfer_r) return ibm8514.pixel_xfer & 0x0000ffff; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_pixel_xfer_w) +void ibm8514a_device::ibm8514_pixel_xfer_w(offs_t offset, uint16_t data) { if(offset == 1) ibm8514.pixel_xfer = (ibm8514.pixel_xfer & 0x0000ffff) | (data << 16); @@ -4882,7 +4882,7 @@ void s3_vga_device::mem_w(offs_t offset, uint8_t data) case 0x8119: case 0x9ae9: s3.mmio_9ae8 = (s3.mmio_9ae8 & 0x00ff) | (data << 8); - dev->ibm8514_cmd_w(machine().dummy_space(),0,s3.mmio_9ae8,0xffff); + dev->ibm8514_cmd_w(s3.mmio_9ae8); break; case 0x8120: case 0xa2e8: @@ -5002,14 +5002,14 @@ void s3_vga_device::mem_w(offs_t offset, uint8_t data) break; case 0xbee9: s3.mmio_bee8 = (s3.mmio_bee8 & 0x00ff) | (data << 8); - dev->ibm8514_multifunc_w(machine().dummy_space(),0,s3.mmio_bee8,0xffff); + dev->ibm8514_multifunc_w(s3.mmio_bee8); break; case 0x96e8: s3.mmio_96e8 = (s3.mmio_96e8 & 0xff00) | data; break; case 0x96e9: s3.mmio_96e8 = (s3.mmio_96e8 & 0x00ff) | (data << 8); - dev->ibm8514_width_w(machine().dummy_space(),0,s3.mmio_96e8,0xffff); + dev->ibm8514_width_w(s3.mmio_96e8); break; case 0xe2e8: dev->ibm8514.pixel_xfer = (dev->ibm8514.pixel_xfer & 0xffffff00) | data; @@ -5500,7 +5500,7 @@ bit 0-3 Interrupt requests. These bits show the state of internal interrupt 8-11 CHIP_REV. Chip revision number. 12-15 (CT82c480) CHIP_ID. 0=CT 82c480. */ -READ16_MEMBER(ibm8514a_device::ibm8514_substatus_r) +uint16_t ibm8514a_device::ibm8514_substatus_r() { // TODO: if(m_vga->vga_vblank() != 0) // not correct, but will do for now @@ -5525,14 +5525,14 @@ bit 0-3 Interrupt Reset. Write 1 to a bit to reset the interrupt. 12-13 CHPTEST. Used for chip testing. 14-15 Graphics Processor Control (GPCTRL). */ -WRITE16_MEMBER(ibm8514a_device::ibm8514_subcontrol_w) +void ibm8514a_device::ibm8514_subcontrol_w(uint16_t data) { ibm8514.subctrl = data; ibm8514.substatus &= ~(data & 0x0f); // reset interrupts // if(LOG_8514) logerror("8514/A: Subsystem control write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_subcontrol_r) +uint16_t ibm8514a_device::ibm8514_subcontrol_r() { return ibm8514.subctrl; } @@ -5544,7 +5544,7 @@ READ16_MEMBER(ibm8514a_device::ibm8514_subcontrol_r) * bit 4: Interlace * bits 5-6: Emable Display - 0=no change, 1=enable 8514/A, 2 or 3=8514/A reset */ -WRITE16_MEMBER(ibm8514a_device::ibm8514_display_ctrl_w) +void ibm8514a_device::ibm8514_display_ctrl_w(uint16_t data) { ibm8514.display_ctrl = data & 0x7e; switch(data & 0x60) @@ -5561,47 +5561,47 @@ WRITE16_MEMBER(ibm8514a_device::ibm8514_display_ctrl_w) } } -WRITE16_MEMBER(ibm8514a_device::ibm8514_advfunc_w) +void ibm8514a_device::ibm8514_advfunc_w(uint16_t data) { ibm8514.advfunction_ctrl = data; ibm8514.passthrough = data & 0x0001; } -READ16_MEMBER(ibm8514a_device::ibm8514_htotal_r) +uint16_t ibm8514a_device::ibm8514_htotal_r() { return ibm8514.htotal; } -READ16_MEMBER(ibm8514a_device::ibm8514_vtotal_r) +uint16_t ibm8514a_device::ibm8514_vtotal_r() { return ibm8514.vtotal; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_vtotal_w) +void ibm8514a_device::ibm8514_vtotal_w(uint16_t data) { ibm8514.vtotal = data; // vga.crtc.vert_total = data; if(LOG_8514) logerror("8514/A: Vertical total write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_vdisp_r) +uint16_t ibm8514a_device::ibm8514_vdisp_r() { return ibm8514.vdisp; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_vdisp_w) +void ibm8514a_device::ibm8514_vdisp_w(uint16_t data) { ibm8514.vdisp = data; // vga.crtc.vert_disp_end = data >> 3; if(LOG_8514) logerror("8514/A: Vertical Displayed write %04x\n",data); } -READ16_MEMBER(ibm8514a_device::ibm8514_vsync_r) +uint16_t ibm8514a_device::ibm8514_vsync_r() { return ibm8514.vsync; } -WRITE16_MEMBER(ibm8514a_device::ibm8514_vsync_w) +void ibm8514a_device::ibm8514_vsync_w(uint16_t data) { ibm8514.vsync = data; if(LOG_8514) logerror("8514/A: Vertical Sync write %04x\n",data); @@ -5613,78 +5613,78 @@ void ibm8514a_device::enabled() ibm8514.gpbusy = false; } -READ16_MEMBER(mach8_device::mach8_ec0_r) +uint16_t mach8_device::mach8_ec0_r() { return ibm8514.ec0; } -WRITE16_MEMBER(mach8_device::mach8_ec0_w) +void mach8_device::mach8_ec0_w(uint16_t data) { ibm8514.ec0 = data; if(LOG_8514) logerror("8514/A: Extended configuration 0 write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_ec1_r) +uint16_t mach8_device::mach8_ec1_r() { return ibm8514.ec1; } -WRITE16_MEMBER(mach8_device::mach8_ec1_w) +void mach8_device::mach8_ec1_w(uint16_t data) { ibm8514.ec1 = data; if(LOG_8514) logerror("8514/A: Extended configuration 1 write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_ec2_r) +uint16_t mach8_device::mach8_ec2_r() { return ibm8514.ec2; } -WRITE16_MEMBER(mach8_device::mach8_ec2_w) +void mach8_device::mach8_ec2_w(uint16_t data) { ibm8514.ec2 = data; if(LOG_8514) logerror("8514/A: Extended configuration 2 write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_ec3_r) +uint16_t mach8_device::mach8_ec3_r() { return ibm8514.ec3; } -WRITE16_MEMBER(mach8_device::mach8_ec3_w) +void mach8_device::mach8_ec3_w(uint16_t data) { ibm8514.ec3 = data; if(LOG_8514) logerror("8514/A: Extended configuration 3 write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_ext_fifo_r) +uint16_t mach8_device::mach8_ext_fifo_r() { return 0x00; // for now, report all FIFO slots as free } -WRITE16_MEMBER(mach8_device::mach8_linedraw_index_w) +void mach8_device::mach8_linedraw_index_w(uint16_t data) { mach8.linedraw = data & 0x07; if(LOG_8514) logerror("Mach8: Line Draw Index write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_bresenham_count_r) +uint16_t mach8_device::mach8_bresenham_count_r() { return ibm8514.rect_width & 0x1fff; } -WRITE16_MEMBER(mach8_device::mach8_bresenham_count_w) +void mach8_device::mach8_bresenham_count_w(uint16_t data) { ibm8514.rect_width = data & 0x1fff; if(LOG_8514) logerror("Mach8: Bresenham count write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_linedraw_r) +uint16_t mach8_device::mach8_linedraw_r() { return 0xff; } -WRITE16_MEMBER(mach8_device::mach8_linedraw_w) +void mach8_device::mach8_linedraw_w(uint16_t data) { // TODO: actually draw the lines switch(mach8.linedraw) @@ -5717,74 +5717,74 @@ WRITE16_MEMBER(mach8_device::mach8_linedraw_w) logerror("ATI: Linedraw register write %04x, mode %i\n",data,mach8.linedraw); } -READ16_MEMBER(mach8_device::mach8_sourcex_r) +uint16_t mach8_device::mach8_sourcex_r() { return ibm8514.dest_x & 0x07ff; } -READ16_MEMBER(mach8_device::mach8_sourcey_r) +uint16_t mach8_device::mach8_sourcey_r() { return ibm8514.dest_y & 0x07ff; } -WRITE16_MEMBER(mach8_device::mach8_ext_leftscissor_w) +void mach8_device::mach8_ext_leftscissor_w(uint16_t data) { // TODO } -WRITE16_MEMBER(mach8_device::mach8_ext_topscissor_w) +void mach8_device::mach8_ext_topscissor_w(uint16_t data) { // TODO } -READ16_MEMBER(mach8_device::mach8_scratch0_r) +uint16_t mach8_device::mach8_scratch0_r() { return mach8.scratch0; } -WRITE16_MEMBER(mach8_device::mach8_scratch0_w) +void mach8_device::mach8_scratch0_w(uint16_t data) { mach8.scratch0 = data; if(LOG_8514) logerror("Mach8: Scratch Pad 0 write %04x\n",data); } -READ16_MEMBER(mach8_device::mach8_scratch1_r) +uint16_t mach8_device::mach8_scratch1_r() { return mach8.scratch1; } -WRITE16_MEMBER(mach8_device::mach8_scratch1_w) +void mach8_device::mach8_scratch1_w(uint16_t data) { mach8.scratch1 = data; if(LOG_8514) logerror("Mach8: Scratch Pad 1 write %04x\n",data); } -WRITE16_MEMBER(mach8_device::mach8_crt_pitch_w) +void mach8_device::mach8_crt_pitch_w(uint16_t data) { mach8.crt_pitch = data & 0x00ff; m_vga->set_offset(mach8.crt_pitch); if(LOG_8514) logerror("Mach8: CRT pitch write %04x\n",mach8.crt_pitch); } -WRITE16_MEMBER(mach8_device::mach8_ge_offset_l_w) +void mach8_device::mach8_ge_offset_l_w(uint16_t data) { mach8.ge_offset = (mach8.ge_offset & 0x0f0000) | data; if(LOG_8514) logerror("Mach8: Graphics Engine Offset (Low) write %05x\n",mach8.ge_offset); } -WRITE16_MEMBER(mach8_device::mach8_ge_offset_h_w) +void mach8_device::mach8_ge_offset_h_w(uint16_t data) { mach8.ge_offset = (mach8.ge_offset & 0x00ffff) | ((data & 0x000f) << 16); if(LOG_8514) logerror("Mach8: Graphics Engine Offset (High) write %05x\n",mach8.ge_offset); } -WRITE16_MEMBER(mach8_device::mach8_ge_pitch_w) +void mach8_device::mach8_ge_pitch_w(uint16_t data) { mach8.ge_pitch = data & 0x00ff; if(LOG_8514) logerror("Mach8: Graphics Engine pitch write %04x\n",mach8.ge_pitch); } -WRITE16_MEMBER(mach8_device::mach8_scan_x_w) +void mach8_device::mach8_scan_x_w(uint16_t data) { mach8.scan_x = data & 0x07ff; @@ -5798,9 +5798,9 @@ WRITE16_MEMBER(mach8_device::mach8_scan_x_w) if(LOG_8514) logerror("Mach8: Scan To X write %04x\n",mach8.scan_x); } -WRITE16_MEMBER(mach8_device::mach8_pixel_xfer_w) +void mach8_device::mach8_pixel_xfer_w(offs_t offset, uint16_t data) { - ibm8514_pixel_xfer_w(space,offset,data,mem_mask); + ibm8514_pixel_xfer_w(offset, data); if(ibm8514.state == MACH8_DRAWING_SCAN) mach8_wait_scan(); @@ -5858,7 +5858,7 @@ void mach8_device::mach8_wait_scan() * 12: LSB First (ignored in mach8 mode when data width is not set) * 13-15: Foreground Colour Source (as Background Source, plus 5=Colour pattern shift register) */ -WRITE16_MEMBER(mach8_device::mach8_dp_config_w) +void mach8_device::mach8_dp_config_w(uint16_t data) { mach8.dp_config = data; if(LOG_8514) logerror("Mach8: Data Path Configuration write %04x\n",mach8.dp_config); @@ -5877,7 +5877,7 @@ bit 0 CLK_MODE. Set to use clock chip, clear to use crystals. 9-15 ROM_LOCATION. If bit 2 and 3 are 0 the ROM will be at this location: 0: C000h, 1: C080h, 2: C100h, .. 127: FF80h (unlikely) */ -READ16_MEMBER(mach8_device::mach8_config1_r) +uint16_t mach8_device::mach8_config1_r() { return 0x0082; } @@ -5890,7 +5890,7 @@ bit 0 SHARE_CLOCK. If set the Mach8 shares clock with the VGA 3 WRITE_PER_BIT. Write masked VRAM operations supported if set 4 FLASH_ENA. Flash page writes supported if set */ -READ16_MEMBER(mach8_device::mach8_config2_r) +uint16_t mach8_device::mach8_config2_r() { return 0x0002; } @@ -5903,7 +5903,7 @@ READ16_MEMBER(mach8_device::mach8_config2_r) * bit 14 EEPROM Chip Select * bit 15 EEPROM Select (Enables read/write of external EEPROM) */ -WRITE16_MEMBER(mach8_device::mach8_ge_ext_config_w) +void mach8_device::mach8_ge_ext_config_w(uint16_t data) { mach8.ge_ext_config = data; if(data & 0x8000) diff --git a/src/devices/video/pc_vga.h b/src/devices/video/pc_vga.h index aee3ffdf98a..5e6ce07f2d1 100644 --- a/src/devices/video/pc_vga.h +++ b/src/devices/video/pc_vga.h @@ -289,52 +289,52 @@ public: bool is_8514a_enabled() { return ibm8514.enabled; } bool is_passthrough_set() { return ibm8514.passthrough; } - READ16_MEMBER(ibm8514_gpstatus_r); - WRITE16_MEMBER(ibm8514_cmd_w); - WRITE16_MEMBER(ibm8514_display_ctrl_w); - READ16_MEMBER(ibm8514_line_error_r); - WRITE16_MEMBER(ibm8514_line_error_w); + uint16_t ibm8514_gpstatus_r(); + void ibm8514_cmd_w(uint16_t data); + void ibm8514_display_ctrl_w(uint16_t data); + uint16_t ibm8514_line_error_r(); + void ibm8514_line_error_w(uint16_t data); uint8_t ibm8514_status_r(offs_t offset); void ibm8514_htotal_w(offs_t offset, uint8_t data); - READ16_MEMBER(ibm8514_substatus_r); - WRITE16_MEMBER(ibm8514_subcontrol_w); - READ16_MEMBER(ibm8514_subcontrol_r); - READ16_MEMBER(ibm8514_htotal_r); - READ16_MEMBER(ibm8514_vtotal_r); - WRITE16_MEMBER(ibm8514_vtotal_w); - READ16_MEMBER(ibm8514_vdisp_r); - WRITE16_MEMBER(ibm8514_vdisp_w); - READ16_MEMBER(ibm8514_vsync_r); - WRITE16_MEMBER(ibm8514_vsync_w); - READ16_MEMBER(ibm8514_desty_r); - WRITE16_MEMBER(ibm8514_desty_w); - READ16_MEMBER(ibm8514_destx_r); - WRITE16_MEMBER(ibm8514_destx_w); - READ16_MEMBER(ibm8514_ssv_r); - WRITE16_MEMBER(ibm8514_ssv_w); - READ16_MEMBER(ibm8514_currentx_r); - WRITE16_MEMBER(ibm8514_currentx_w); - READ16_MEMBER(ibm8514_currenty_r); - WRITE16_MEMBER(ibm8514_currenty_w); - READ16_MEMBER(ibm8514_width_r); - WRITE16_MEMBER(ibm8514_width_w); - READ16_MEMBER(ibm8514_fgcolour_r); - WRITE16_MEMBER(ibm8514_fgcolour_w); - READ16_MEMBER(ibm8514_bgcolour_r); - WRITE16_MEMBER(ibm8514_bgcolour_w); - READ16_MEMBER(ibm8514_multifunc_r); - WRITE16_MEMBER(ibm8514_multifunc_w); - READ16_MEMBER(ibm8514_backmix_r); - WRITE16_MEMBER(ibm8514_backmix_w); - READ16_MEMBER(ibm8514_foremix_r); - WRITE16_MEMBER(ibm8514_foremix_w); - READ16_MEMBER(ibm8514_pixel_xfer_r); - virtual WRITE16_MEMBER(ibm8514_pixel_xfer_w); - READ16_MEMBER(ibm8514_read_mask_r); - WRITE16_MEMBER(ibm8514_read_mask_w); - READ16_MEMBER(ibm8514_write_mask_r); - WRITE16_MEMBER(ibm8514_write_mask_w); - WRITE16_MEMBER(ibm8514_advfunc_w); + uint16_t ibm8514_substatus_r(); + void ibm8514_subcontrol_w(uint16_t data); + uint16_t ibm8514_subcontrol_r(); + uint16_t ibm8514_htotal_r(); + uint16_t ibm8514_vtotal_r(); + void ibm8514_vtotal_w(uint16_t data); + uint16_t ibm8514_vdisp_r(); + void ibm8514_vdisp_w(uint16_t data); + uint16_t ibm8514_vsync_r(); + void ibm8514_vsync_w(uint16_t data); + uint16_t ibm8514_desty_r(); + void ibm8514_desty_w(uint16_t data); + uint16_t ibm8514_destx_r(); + void ibm8514_destx_w(uint16_t data); + uint16_t ibm8514_ssv_r(); + void ibm8514_ssv_w(uint16_t data); + uint16_t ibm8514_currentx_r(); + void ibm8514_currentx_w(uint16_t data); + uint16_t ibm8514_currenty_r(); + void ibm8514_currenty_w(uint16_t data); + uint16_t ibm8514_width_r(); + void ibm8514_width_w(uint16_t data); + uint16_t ibm8514_fgcolour_r(); + void ibm8514_fgcolour_w(uint16_t data); + uint16_t ibm8514_bgcolour_r(); + void ibm8514_bgcolour_w(uint16_t data); + uint16_t ibm8514_multifunc_r(); + void ibm8514_multifunc_w(uint16_t data); + uint16_t ibm8514_backmix_r(); + void ibm8514_backmix_w(uint16_t data); + uint16_t ibm8514_foremix_r(); + void ibm8514_foremix_w(uint16_t data); + uint16_t ibm8514_pixel_xfer_r(offs_t offset); + virtual void ibm8514_pixel_xfer_w(offs_t offset, uint16_t data); + uint16_t ibm8514_read_mask_r(); + void ibm8514_read_mask_w(uint16_t data); + uint16_t ibm8514_write_mask_r(); + void ibm8514_write_mask_w(uint16_t data); + void ibm8514_advfunc_w(uint16_t data); void ibm8514_wait_draw(); struct @@ -423,44 +423,44 @@ class mach8_device : public ibm8514a_device public: mach8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - READ16_MEMBER(mach8_ec0_r); - WRITE16_MEMBER(mach8_ec0_w); - READ16_MEMBER(mach8_ec1_r); - WRITE16_MEMBER(mach8_ec1_w); - READ16_MEMBER(mach8_ec2_r); - WRITE16_MEMBER(mach8_ec2_w); - READ16_MEMBER(mach8_ec3_r); - WRITE16_MEMBER(mach8_ec3_w); - READ16_MEMBER(mach8_ext_fifo_r); - WRITE16_MEMBER(mach8_linedraw_index_w); - READ16_MEMBER(mach8_bresenham_count_r); - WRITE16_MEMBER(mach8_bresenham_count_w); - WRITE16_MEMBER(mach8_linedraw_w); - READ16_MEMBER(mach8_linedraw_r); - READ16_MEMBER(mach8_scratch0_r); - WRITE16_MEMBER(mach8_scratch0_w); - READ16_MEMBER(mach8_scratch1_r); - WRITE16_MEMBER(mach8_scratch1_w); - READ16_MEMBER(mach8_config1_r); - READ16_MEMBER(mach8_config2_r); - READ16_MEMBER(mach8_sourcex_r); - READ16_MEMBER(mach8_sourcey_r); - WRITE16_MEMBER(mach8_ext_leftscissor_w); - WRITE16_MEMBER(mach8_ext_topscissor_w); - READ16_MEMBER(mach8_clksel_r) { return mach8.clksel; } - WRITE16_MEMBER(mach8_crt_pitch_w); - WRITE16_MEMBER(mach8_patt_data_w) { logerror("Mach8: Pattern Data write (unimplemented)\n"); } - WRITE16_MEMBER(mach8_ge_offset_l_w); - WRITE16_MEMBER(mach8_ge_offset_h_w); - WRITE16_MEMBER(mach8_ge_pitch_w); - READ16_MEMBER(mach8_ge_ext_config_r) { return mach8.ge_ext_config; } - WRITE16_MEMBER(mach8_ge_ext_config_w); // TODO: handle 8-bit I/O - WRITE16_MEMBER(mach8_scan_x_w); - WRITE16_MEMBER(mach8_dp_config_w); - READ16_MEMBER(mach8_readonly_r) { return 0; } - WRITE16_MEMBER(mach8_pixel_xfer_w); - WRITE16_MEMBER(mach8_clksel_w) { mach8.ati_mode = true; ibm8514.passthrough = data & 0x0001; mach8.clksel = data; } // read only on the mach8 - WRITE16_MEMBER(mach8_advfunc_w) { mach8.ati_mode = false; ibm8514_advfunc_w(space,offset,data,mem_mask); } + uint16_t mach8_ec0_r(); + void mach8_ec0_w(uint16_t data); + uint16_t mach8_ec1_r(); + void mach8_ec1_w(uint16_t data); + uint16_t mach8_ec2_r(); + void mach8_ec2_w(uint16_t data); + uint16_t mach8_ec3_r(); + void mach8_ec3_w(uint16_t data); + uint16_t mach8_ext_fifo_r(); + void mach8_linedraw_index_w(uint16_t data); + uint16_t mach8_bresenham_count_r(); + void mach8_bresenham_count_w(uint16_t data); + void mach8_linedraw_w(uint16_t data); + uint16_t mach8_linedraw_r(); + uint16_t mach8_scratch0_r(); + void mach8_scratch0_w(uint16_t data); + uint16_t mach8_scratch1_r(); + void mach8_scratch1_w(uint16_t data); + uint16_t mach8_config1_r(); + uint16_t mach8_config2_r(); + uint16_t mach8_sourcex_r(); + uint16_t mach8_sourcey_r(); + void mach8_ext_leftscissor_w(uint16_t data); + void mach8_ext_topscissor_w(uint16_t data); + uint16_t mach8_clksel_r() { return mach8.clksel; } + void mach8_crt_pitch_w(uint16_t data); + void mach8_patt_data_w(uint16_t data) { logerror("Mach8: Pattern Data write (unimplemented)\n"); } + void mach8_ge_offset_l_w(uint16_t data); + void mach8_ge_offset_h_w(uint16_t data); + void mach8_ge_pitch_w(uint16_t data); + uint16_t mach8_ge_ext_config_r() { return mach8.ge_ext_config; } + void mach8_ge_ext_config_w(uint16_t data); // TODO: handle 8-bit I/O + void mach8_scan_x_w(uint16_t data); + void mach8_dp_config_w(uint16_t data); + uint16_t mach8_readonly_r() { return 0; } + void mach8_pixel_xfer_w(offs_t offset, uint16_t data); + void mach8_clksel_w(uint16_t data) { mach8.ati_mode = true; ibm8514.passthrough = data & 0x0001; mach8.clksel = data; } // read only on the mach8 + void mach8_advfunc_w(uint16_t data) { mach8.ati_mode = false; ibm8514_advfunc_w(data); } uint16_t get_ext_config() { return mach8.ge_ext_config; } uint16_t offset() { if(mach8.ati_mode) return mach8.ge_pitch; else return 128; } diff --git a/src/devices/video/topcat.cpp b/src/devices/video/topcat.cpp index da368d10339..79b679b8e77 100644 --- a/src/devices/video/topcat.cpp +++ b/src/devices/video/topcat.cpp @@ -70,7 +70,7 @@ void topcat_device::device_reset() m_pixel_replacement_rule = TOPCAT_REPLACE_RULE_SRC; } -READ16_MEMBER(topcat_device::vram_r) +uint16_t topcat_device::vram_r(offs_t offset, uint16_t mem_mask) { uint16_t ret = 0; @@ -83,7 +83,7 @@ READ16_MEMBER(topcat_device::vram_r) return ret; } -WRITE16_MEMBER(topcat_device::vram_w) +void topcat_device::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (mem_mask & m_plane_mask && (m_fb_write_enable & (m_plane_mask << 8))) { bool src = data & m_plane_mask; @@ -243,7 +243,7 @@ void topcat_device::update_int() m_int_write_func((m_wmove_intrq || m_vert_retrace_intrq) ? ASSERT_LINE : CLEAR_LINE); } -READ16_MEMBER(topcat_device::ctrl_r) +uint16_t topcat_device::ctrl_r(address_space &space, offs_t offset, uint16_t mem_mask) { if (!m_read_enable) return 0; @@ -338,7 +338,7 @@ READ16_MEMBER(topcat_device::ctrl_r) return ret; } -WRITE16_MEMBER(topcat_device::ctrl_w) +void topcat_device::ctrl_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask) { data &= mem_mask; diff --git a/src/devices/video/topcat.h b/src/devices/video/topcat.h index a42761ffb37..b96ef3a3fc0 100644 --- a/src/devices/video/topcat.h +++ b/src/devices/video/topcat.h @@ -15,10 +15,10 @@ public: void set_planemask(int _mask) { m_plane_mask = _mask; } void get_cursor_pos(int &startx, int &starty, int &endx, int &endy); - DECLARE_READ16_MEMBER(vram_r); - DECLARE_WRITE16_MEMBER(vram_w); - DECLARE_READ16_MEMBER(ctrl_r); - DECLARE_WRITE16_MEMBER(ctrl_w); + uint16_t vram_r(offs_t offset, uint16_t mem_mask = ~0); + void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t ctrl_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0); + void ctrl_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0); WRITE_LINE_MEMBER(vblank_w); void topcat_mem(address_map &map); diff --git a/src/devices/video/virge_pci.cpp b/src/devices/video/virge_pci.cpp index f527555ed91..e5371dd786b 100644 --- a/src/devices/video/virge_pci.cpp +++ b/src/devices/video/virge_pci.cpp @@ -87,19 +87,19 @@ void virge_pci_device::refresh_linear_window() } } -READ32_MEMBER(virge_pci_device::base_address_r) +uint32_t virge_pci_device::base_address_r() { return downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address(); } -WRITE32_MEMBER(virge_pci_device::base_address_w) +void virge_pci_device::base_address_w(offs_t offset, uint32_t data) { - pci_device::address_base_w(space,offset,data,mem_mask); + pci_device::address_base_w(offset,data); downcast<s3virge_vga_device *>(m_vga.target())->set_linear_address(data & 0xffff0000); refresh_linear_window(); } -READ32_MEMBER(virge_pci_device::vga_3b0_r) +uint32_t virge_pci_device::vga_3b0_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; if (ACCESSING_BITS_0_7) @@ -113,7 +113,7 @@ READ32_MEMBER(virge_pci_device::vga_3b0_r) return result; } -WRITE32_MEMBER(virge_pci_device::vga_3b0_w) +void virge_pci_device::vga_3b0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_0_7) { @@ -144,7 +144,7 @@ WRITE32_MEMBER(virge_pci_device::vga_3b0_w) downcast<s3_vga_device *>(m_vga.target())->port_03b0_w(offset * 4 + 3, data >> 24); } -READ32_MEMBER(virge_pci_device::vga_3c0_r) +uint32_t virge_pci_device::vga_3c0_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; if (ACCESSING_BITS_0_7) @@ -158,7 +158,7 @@ READ32_MEMBER(virge_pci_device::vga_3c0_r) return result; } -WRITE32_MEMBER(virge_pci_device::vga_3c0_w) +void virge_pci_device::vga_3c0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_0_7) downcast<s3_vga_device *>(m_vga.target())->port_03c0_w(offset * 4 + 0, data >> 0); @@ -170,7 +170,7 @@ WRITE32_MEMBER(virge_pci_device::vga_3c0_w) downcast<s3_vga_device *>(m_vga.target())->port_03c0_w(offset * 4 + 3, data >> 24); } -READ32_MEMBER(virge_pci_device::vga_3d0_r) +uint32_t virge_pci_device::vga_3d0_r(offs_t offset, uint32_t mem_mask) { uint32_t result = 0; if (ACCESSING_BITS_0_7) @@ -184,7 +184,7 @@ READ32_MEMBER(virge_pci_device::vga_3d0_r) return result; } -WRITE32_MEMBER(virge_pci_device::vga_3d0_w) +void virge_pci_device::vga_3d0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if (ACCESSING_BITS_0_7) { @@ -261,9 +261,9 @@ void virge_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_w { memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(virge_pci_device::vram_r)), write8sm_delegate(*this, FUNC(virge_pci_device::vram_w))); - io_space->install_readwrite_handler(0x3b0, 0x3bf, read32_delegate(*this, FUNC(virge_pci_device::vga_3b0_r)), write32_delegate(*this, FUNC(virge_pci_device::vga_3b0_w))); - io_space->install_readwrite_handler(0x3c0, 0x3cf, read32_delegate(*this, FUNC(virge_pci_device::vga_3c0_r)), write32_delegate(*this, FUNC(virge_pci_device::vga_3c0_w))); - io_space->install_readwrite_handler(0x3d0, 0x3df, read32_delegate(*this, FUNC(virge_pci_device::vga_3d0_r)), write32_delegate(*this, FUNC(virge_pci_device::vga_3d0_w))); + io_space->install_readwrite_handler(0x3b0, 0x3bf, read32s_delegate(*this, FUNC(virge_pci_device::vga_3b0_r)), write32s_delegate(*this, FUNC(virge_pci_device::vga_3b0_w))); + io_space->install_readwrite_handler(0x3c0, 0x3cf, read32s_delegate(*this, FUNC(virge_pci_device::vga_3c0_r)), write32s_delegate(*this, FUNC(virge_pci_device::vga_3c0_w))); + io_space->install_readwrite_handler(0x3d0, 0x3df, read32s_delegate(*this, FUNC(virge_pci_device::vga_3d0_r)), write32s_delegate(*this, FUNC(virge_pci_device::vga_3d0_w))); } void virge_pci_device::device_add_mconfig(machine_config &config) diff --git a/src/devices/video/virge_pci.h b/src/devices/video/virge_pci.h index 8470f309e56..f4b6ce29009 100644 --- a/src/devices/video/virge_pci.h +++ b/src/devices/video/virge_pci.h @@ -37,16 +37,16 @@ public: void lfb_map(address_map &map); void mmio_map(address_map& map); - DECLARE_READ32_MEMBER(vga_3b0_r); - DECLARE_WRITE32_MEMBER(vga_3b0_w); - DECLARE_READ32_MEMBER(vga_3c0_r); - DECLARE_WRITE32_MEMBER(vga_3c0_w); - DECLARE_READ32_MEMBER(vga_3d0_r); - DECLARE_WRITE32_MEMBER(vga_3d0_w); + uint32_t vga_3b0_r(offs_t offset, uint32_t mem_mask = ~0); + void vga_3b0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t vga_3c0_r(offs_t offset, uint32_t mem_mask = ~0); + void vga_3c0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t vga_3d0_r(offs_t offset, uint32_t mem_mask = ~0); + void vga_3d0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint8_t vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); - DECLARE_READ32_MEMBER(base_address_r); - DECLARE_WRITE32_MEMBER(base_address_w); + uint32_t base_address_r(); + void base_address_w(offs_t offset, uint32_t data); protected: virtual void device_start() override; diff --git a/src/devices/video/vrender0.cpp b/src/devices/video/vrender0.cpp index e67675888f0..f2bb5c74ac1 100644 --- a/src/devices/video/vrender0.cpp +++ b/src/devices/video/vrender0.cpp @@ -50,27 +50,27 @@ void vr0video_device::regs_map(address_map &map) map(0x00a6, 0x00a7).rw(FUNC(vr0video_device::flip_count_r), FUNC(vr0video_device::flip_count_w)); } -READ16_MEMBER(vr0video_device::cmd_queue_front_r) +uint16_t vr0video_device::cmd_queue_front_r() { return m_queue_front & 0x7ff; } -WRITE16_MEMBER(vr0video_device::cmd_queue_front_w) +void vr0video_device::cmd_queue_front_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_queue_front); } -READ16_MEMBER(vr0video_device::cmd_queue_rear_r) +uint16_t vr0video_device::cmd_queue_rear_r() { return m_queue_rear & 0x7ff; } -READ16_MEMBER(vr0video_device::render_control_r) +uint16_t vr0video_device::render_control_r() { return (m_draw_select<<7) | (m_render_reset<<3) | (m_render_start<<2) | (m_dither_mode); } -WRITE16_MEMBER(vr0video_device::render_control_w) +void vr0video_device::render_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (ACCESSING_BITS_0_7) { @@ -86,28 +86,28 @@ WRITE16_MEMBER(vr0video_device::render_control_w) } } -READ16_MEMBER(vr0video_device::display_bank_r) +uint16_t vr0video_device::display_bank_r() { return m_display_bank; } -READ16_MEMBER(vr0video_device::bank1_select_r) +uint16_t vr0video_device::bank1_select_r() { return (m_bank1_select)<<15; } -WRITE16_MEMBER(vr0video_device::bank1_select_w) +void vr0video_device::bank1_select_w(uint16_t data) { m_bank1_select = BIT(data,15); } -READ16_MEMBER(vr0video_device::flip_count_r) +uint16_t vr0video_device::flip_count_r() { m_idleskip_cb(m_flip_count != 0); return m_flip_count; } -WRITE16_MEMBER(vr0video_device::flip_count_w) +void vr0video_device::flip_count_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (ACCESSING_BITS_0_7) { diff --git a/src/devices/video/vrender0.h b/src/devices/video/vrender0.h index 809f0167ca0..3414721a5e7 100644 --- a/src/devices/video/vrender0.h +++ b/src/devices/video/vrender0.h @@ -22,8 +22,8 @@ public: uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); auto idleskip_cb() { return m_idleskip_cb.bind(); } - DECLARE_READ16_MEMBER(flip_count_r); - DECLARE_WRITE16_MEMBER(flip_count_w); + uint16_t flip_count_r(); + void flip_count_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); protected: // device-level overrides @@ -69,21 +69,21 @@ private: uint16_t *m_packetram; uint16_t *m_frameram; - DECLARE_READ16_MEMBER( cmd_queue_front_r ); - DECLARE_WRITE16_MEMBER( cmd_queue_front_w ); + uint16_t cmd_queue_front_r(); + void cmd_queue_front_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - DECLARE_READ16_MEMBER( cmd_queue_rear_r ); + uint16_t cmd_queue_rear_r(); uint16_t m_queue_rear, m_queue_front; - DECLARE_READ16_MEMBER( bank1_select_r ); - DECLARE_WRITE16_MEMBER( bank1_select_w ); + uint16_t bank1_select_r(); + void bank1_select_w(uint16_t data); bool m_bank1_select; //!< Select framebuffer bank1 address - DECLARE_READ16_MEMBER( display_bank_r ); + uint16_t display_bank_r(); uint8_t m_display_bank; //!< Current display bank - DECLARE_READ16_MEMBER( render_control_r ); - DECLARE_WRITE16_MEMBER( render_control_w ); + uint16_t render_control_r(); + void render_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); bool m_draw_select; //!< If true, device draws to Front buffer instead of Back bool m_render_reset; //!< Reset pipeline FIFO bool m_render_start; //!< Enable pipeline processing diff --git a/src/mame/drivers/juicebox.cpp b/src/mame/drivers/juicebox.cpp index 03f4da0ffd1..f4f95cfcbcf 100644 --- a/src/mame/drivers/juicebox.cpp +++ b/src/mame/drivers/juicebox.cpp @@ -263,23 +263,23 @@ void juicebox_state::machine_start() smc_init(); - space.install_readwrite_handler(0x01c00000, 0x01c0000b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::cpuwrap_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::cpuwrap_w))); - space.install_readwrite_handler(0x01d00000, 0x01d0002b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_0_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_0_w))); - space.install_readwrite_handler(0x01d04000, 0x01d0402b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_1_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_1_w))); - space.install_readwrite_handler(0x01d14000, 0x01d14013, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::sio_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::sio_w))); - space.install_readwrite_handler(0x01d18000, 0x01d18013, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iis_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iis_w))); - space.install_readwrite_handler(0x01d20000, 0x01d20057, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::gpio_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::gpio_w))); - space.install_readwrite_handler(0x01d30000, 0x01d3000b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::wdt_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::wdt_w))); - space.install_readwrite_handler(0x01d40000, 0x01d4000b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::adc_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::adc_w))); - space.install_readwrite_handler(0x01d50000, 0x01d5004f, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::pwm_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::pwm_w))); - space.install_readwrite_handler(0x01d60000, 0x01d6000f, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iic_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iic_w))); - space.install_readwrite_handler(0x01d80000, 0x01d8000f, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::clkpow_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::clkpow_w))); - space.install_readwrite_handler(0x01e00000, 0x01e0003f, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::irq_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::irq_w))); - space.install_readwrite_handler(0x01e80000, 0x01e8001b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_0_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_0_w))); - space.install_readwrite_handler(0x01e80020, 0x01e8003b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_1_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_1_w))); - space.install_readwrite_handler(0x01f00000, 0x01f00047, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::lcd_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::lcd_w))); - space.install_readwrite_handler(0x01f80000, 0x01f8001b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_0_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_0_w))); - space.install_readwrite_handler(0x01f80020, 0x01f8003b, read32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_1_r)), write32_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_1_w))); + space.install_readwrite_handler(0x01c00000, 0x01c0000b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::cpuwrap_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::cpuwrap_w))); + space.install_readwrite_handler(0x01d00000, 0x01d0002b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_0_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_0_w))); + space.install_readwrite_handler(0x01d04000, 0x01d0402b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_1_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::uart_1_w))); + space.install_readwrite_handler(0x01d14000, 0x01d14013, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::sio_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::sio_w))); + space.install_readwrite_handler(0x01d18000, 0x01d18013, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iis_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iis_w))); + space.install_readwrite_handler(0x01d20000, 0x01d20057, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::gpio_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::gpio_w))); + space.install_readwrite_handler(0x01d30000, 0x01d3000b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::wdt_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::wdt_w))); + space.install_readwrite_handler(0x01d40000, 0x01d4000b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::adc_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::adc_w))); + space.install_readwrite_handler(0x01d50000, 0x01d5004f, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::pwm_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::pwm_w))); + space.install_readwrite_handler(0x01d60000, 0x01d6000f, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iic_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::iic_w))); + space.install_readwrite_handler(0x01d80000, 0x01d8000f, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::clkpow_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::clkpow_w))); + space.install_readwrite_handler(0x01e00000, 0x01e0003f, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::irq_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::irq_w))); + space.install_readwrite_handler(0x01e80000, 0x01e8001b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_0_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_0_w))); + space.install_readwrite_handler(0x01e80020, 0x01e8003b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_1_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::zdma_1_w))); + space.install_readwrite_handler(0x01f00000, 0x01f00047, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::lcd_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::lcd_w))); + space.install_readwrite_handler(0x01f80000, 0x01f8001b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_0_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_0_w))); + space.install_readwrite_handler(0x01f80020, 0x01f8003b, read32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_1_r)), write32s_delegate(*m_s3c44b0, FUNC(s3c44b0_device::bdma_1_w))); } void juicebox_state::machine_reset() diff --git a/src/mame/drivers/zn.cpp b/src/mame/drivers/zn.cpp index 218a58beecd..6b4d627ea21 100644 --- a/src/mame/drivers/zn.cpp +++ b/src/mame/drivers/zn.cpp @@ -1133,7 +1133,7 @@ uint16_t primrag2_state::vt83c461_16_r(offs_t offset, uint16_t mem_mask) if( offset >= 0x30 / 2 && offset < 0x40 / 2 ) { - return m_vt83c461->read_config( ( offset / 2 ) & 3 ) >> shift; + return m_vt83c461->config_r( ( offset / 2 ) & 3 ) >> shift; } else if( offset >= 0x1f0 / 2 && offset < 0x1f8 / 2 ) { @@ -1156,7 +1156,7 @@ void primrag2_state::vt83c461_16_w(offs_t offset, uint16_t data, uint16_t mem_ma if( offset >= 0x30 / 2 && offset < 0x40 / 2 ) { - m_vt83c461->write_config( ( offset / 2 ) & 3, data << shift ); + m_vt83c461->config_w( ( offset / 2 ) & 3, data << shift ); } else if( offset >= 0x1f0 / 2 && offset < 0x1f8 / 2 ) { |