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author Miodrag Milanovic <mmicko@gmail.com>2016-05-25 08:19:21 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2016-05-25 08:19:21 +0200
commit68785dccfee3208163c8169abc5c6d01becf36d4 (patch)
treed6967331fd0e938981777aa32b5f246e04fb701b /src
parentc1230f8b9bf4373d396ecb970c966ec2ce6dfc15 (diff)
Cleanups and version bumpmame0174
Diffstat (limited to 'src')
-rw-r--r--src/devices/bus/a2bus/pc_xporter.cpp87
-rw-r--r--src/devices/bus/gba/rom.cpp10
-rw-r--r--src/devices/bus/gba/rom.h6
-rw-r--r--src/devices/bus/megadrive/eeprom.cpp37
-rw-r--r--src/devices/bus/megadrive/eeprom.h16
-rw-r--r--src/devices/bus/megadrive/md_slot.cpp2
-rw-r--r--src/devices/bus/megadrive/rom.cpp11
-rw-r--r--src/devices/bus/megadrive/rom.h6
-rw-r--r--src/devices/bus/neogeo/boot_cthd.cpp1
-rw-r--r--src/devices/bus/neogeo/boot_kof10th.cpp6
-rw-r--r--src/devices/bus/neogeo/boot_kof2k2.cpp2
-rw-r--r--src/devices/bus/neogeo/boot_kof2k2.h6
-rw-r--r--src/devices/bus/neogeo/boot_kof2k3.cpp4
-rw-r--r--src/devices/bus/neogeo/boot_kof2k3.h10
-rw-r--r--src/devices/bus/neogeo/boot_misc.cpp3
-rw-r--r--src/devices/bus/neogeo/boot_misc.h6
-rw-r--r--src/devices/bus/neogeo/boot_svc.cpp2
-rw-r--r--src/devices/bus/neogeo/boot_svc.h6
-rw-r--r--src/devices/bus/neogeo/carts.cpp22
-rw-r--r--src/devices/bus/neogeo/cmc.cpp5
-rw-r--r--src/devices/bus/neogeo/fatfury2.cpp5
-rw-r--r--src/devices/bus/neogeo/kof2k2.cpp4
-rw-r--r--src/devices/bus/neogeo/kof98.cpp2
-rw-r--r--src/devices/bus/neogeo/mslugx.cpp3
-rw-r--r--src/devices/bus/neogeo/pcm2.cpp3
-rw-r--r--src/devices/bus/neogeo/pcm2.h4
-rw-r--r--src/devices/bus/neogeo/prot_cmc.cpp2
-rw-r--r--src/devices/bus/neogeo/prot_cthd.cpp30
-rw-r--r--src/devices/bus/neogeo/prot_cthd.h2
-rw-r--r--src/devices/bus/neogeo/prot_fatfury2.cpp1
-rw-r--r--src/devices/bus/neogeo/prot_kof2k3bl.cpp17
-rw-r--r--src/devices/bus/neogeo/prot_kof98.cpp1
-rw-r--r--src/devices/bus/neogeo/prot_misc.cpp113
-rw-r--r--src/devices/bus/neogeo/prot_misc.h10
-rw-r--r--src/devices/bus/neogeo/prot_mslugx.cpp1
-rw-r--r--src/devices/bus/neogeo/prot_pvc.cpp13
-rw-r--r--src/devices/bus/neogeo/prot_pvc.h2
-rw-r--r--src/devices/bus/neogeo/prot_sma.cpp28
-rw-r--r--src/devices/bus/neogeo/pvc.cpp2
-rw-r--r--src/devices/bus/neogeo/rom.cpp3
-rw-r--r--src/devices/bus/neogeo/rom.h6
-rw-r--r--src/devices/bus/neogeo/sbp.cpp8
-rw-r--r--src/devices/bus/neogeo/sbp.h4
-rw-r--r--src/devices/bus/neogeo/slot.cpp14
-rw-r--r--src/devices/bus/neogeo/slot.h30
-rw-r--r--src/devices/bus/neogeo/sma.cpp3
-rw-r--r--src/devices/bus/nes/mmc3_clones.cpp10
-rw-r--r--src/devices/bus/nes/mmc3_clones.h12
-rw-r--r--src/devices/cpu/drcbec.cpp4
-rw-r--r--src/devices/cpu/drcbex64.cpp36
-rw-r--r--src/devices/cpu/drcbex86.cpp32
-rw-r--r--src/devices/cpu/h8/h8.cpp6
-rw-r--r--src/devices/cpu/h8/h8_dma.cpp6
-rw-r--r--src/devices/cpu/h8/h8_dma.h2
-rw-r--r--src/devices/cpu/h8/h8_dtc.cpp7
-rw-r--r--src/devices/cpu/h8/h8_sci.cpp30
-rw-r--r--src/devices/cpu/h8/h8_timer16.cpp14
-rw-r--r--src/devices/cpu/h8/h8_timer8.cpp6
-rw-r--r--src/devices/cpu/h8/h8_watchdog.cpp8
-rw-r--r--src/devices/cpu/h8/h8_watchdog.h2
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.cpp4
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.h2
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.h2
-rw-r--r--src/devices/machine/gen_latch.h2
-rw-r--r--src/devices/machine/gt64xxx.cpp12
-rw-r--r--src/devices/machine/gt64xxx.h2
-rw-r--r--src/devices/machine/pci-ide.h2
-rw-r--r--src/devices/machine/stvcd.h1
-rw-r--r--src/devices/machine/vrc4373.h2
-rw-r--r--src/devices/machine/z80scc.cpp34
-rw-r--r--src/devices/machine/z80scc.h384
-rw-r--r--src/devices/video/hd44780.cpp2
-rw-r--r--src/devices/video/snes_ppu.cpp2
-rw-r--r--src/emu/digfx.h4
-rw-r--r--src/emu/screen.cpp24
-rw-r--r--src/frontend/mame/ui/filemngr.cpp2
-rw-r--r--src/frontend/mame/ui/menuitem.h2
-rw-r--r--src/frontend/mame/ui/slider.h2
-rw-r--r--src/frontend/mame/ui/ui.cpp2
-rw-r--r--src/lib/netlist/analog/nld_bjt.h10
-rw-r--r--src/lib/netlist/devices/nld_4020.h1
-rw-r--r--src/lib/netlist/devices/nld_74107.h2
-rw-r--r--src/lib/netlist/devices/nld_74153.h2
-rw-r--r--src/lib/netlist/devices/nld_7448.h3
-rw-r--r--src/lib/netlist/devices/nld_7450.h1
-rw-r--r--src/lib/netlist/devices/nld_7474.cpp2
-rw-r--r--src/lib/netlist/devices/nld_7474.h1
-rw-r--r--src/lib/netlist/devices/nld_ne555.h1
-rw-r--r--src/lib/netlist/devices/nld_system.h2
-rw-r--r--src/lib/netlist/macro/nlm_ttl74xx.cpp22
-rw-r--r--src/lib/netlist/macro/nlm_ttl74xx.h12
-rw-r--r--src/lib/netlist/nl_base.cpp13
-rw-r--r--src/lib/netlist/nl_base.h14
-rw-r--r--src/lib/netlist/nl_util.h2
-rw-r--r--src/lib/netlist/plib/pdynlib.cpp2
-rw-r--r--src/lib/netlist/solver/nld_matrix_solver.h2
-rw-r--r--src/lib/netlist/solver/nld_ms_sm.h4
-rw-r--r--src/lib/netlist/solver/nld_ms_w.h2
-rw-r--r--src/mame/drivers/1942.cpp6
-rw-r--r--src/mame/drivers/1943.cpp2
-rw-r--r--src/mame/drivers/alpha68k.cpp2
-rw-r--r--src/mame/drivers/altos486.cpp1
-rw-r--r--src/mame/drivers/apple2e.cpp20
-rw-r--r--src/mame/drivers/bfm_ad5.cpp2
-rw-r--r--src/mame/drivers/crgolf.cpp75
-rw-r--r--src/mame/drivers/cybiko.cpp2
-rw-r--r--src/mame/drivers/dec0.cpp2
-rw-r--r--src/mame/drivers/deco_ld.cpp4
-rw-r--r--src/mame/drivers/fcscsi.cpp14
-rw-r--r--src/mame/drivers/gba.cpp6
-rw-r--r--src/mame/drivers/goldstar.cpp26
-rw-r--r--src/mame/drivers/harddriv.cpp2
-rw-r--r--src/mame/drivers/hh_tms1k.cpp16
-rw-r--r--src/mame/drivers/hk68v10.cpp8
-rw-r--r--src/mame/drivers/hp9845.cpp788
-rw-r--r--src/mame/drivers/icatel.cpp4
-rw-r--r--src/mame/drivers/igspoker.cpp6
-rw-r--r--src/mame/drivers/itt3030.cpp2
-rw-r--r--src/mame/drivers/jack.cpp20
-rw-r--r--src/mame/drivers/lwings.cpp2
-rw-r--r--src/mame/drivers/macs.cpp2
-rw-r--r--src/mame/drivers/mcr68.cpp2
-rw-r--r--src/mame/drivers/merit.cpp6
-rw-r--r--src/mame/drivers/metlfrzr.cpp80
-rw-r--r--src/mame/drivers/mpu4.cpp2
-rw-r--r--src/mame/drivers/mvme147.cpp397
-rw-r--r--src/mame/drivers/neogeo.cpp107
-rw-r--r--src/mame/drivers/neopcb.cpp33
-rw-r--r--src/mame/drivers/seattle.cpp8
-rw-r--r--src/mame/drivers/skylncr.cpp2
-rw-r--r--src/mame/drivers/thomson.cpp6
-rw-r--r--src/mame/drivers/ticalc1x.cpp4
-rw-r--r--src/mame/drivers/tourvis.cpp2
-rw-r--r--src/mame/drivers/unixpc.cpp22
-rw-r--r--src/mame/drivers/vegas.cpp8
-rw-r--r--src/mame/includes/alesis.h2
-rw-r--r--src/mame/includes/asteroid.h1
-rw-r--r--src/mame/includes/astrocde.h1
-rw-r--r--src/mame/includes/chihiro.h2
-rw-r--r--src/mame/includes/dassault.h2
-rw-r--r--src/mame/includes/ladybug.h2
-rw-r--r--src/mame/includes/madmotor.h2
-rw-r--r--src/mame/includes/megadrvb.h2
-rw-r--r--src/mame/includes/midzeus.h1
-rw-r--r--src/mame/includes/model1.h270
-rw-r--r--src/mame/includes/mw8080bw.h2
-rw-r--r--src/mame/includes/neogeo.h35
-rw-r--r--src/mame/includes/redclash.h2
-rw-r--r--src/mame/includes/snes.h2
-rw-r--r--src/mame/layout/fidel_csc.lay22
-rw-r--r--src/mame/layout/mdndclab.lay6
-rw-r--r--src/mame/machine/awboard.cpp2
-rw-r--r--src/mame/machine/deco146.cpp6
-rw-r--r--src/mame/machine/decocrpt.h1
-rw-r--r--src/mame/machine/gamecom.cpp2
-rw-r--r--src/mame/machine/macadb.h1
-rw-r--r--src/mame/machine/pgmprot_igs025_igs028.h2
-rw-r--r--src/mame/mame.lst2
-rw-r--r--src/mame/video/chihiro.cpp20
-rw-r--r--src/mame/video/crgolf.cpp2
-rw-r--r--src/mame/video/holeland.cpp2
-rw-r--r--src/mame/video/ladybug.cpp1
-rw-r--r--src/mame/video/model1.cpp1322
-rw-r--r--src/mame/video/model3.cpp52
-rw-r--r--src/mame/video/mw8080bw.cpp6
-rw-r--r--src/mame/video/neogeo_spr.cpp12
-rw-r--r--src/mame/video/neogeo_spr.h4
-rw-r--r--src/osd/modules/debugger/debugimgui.cpp10
-rw-r--r--src/osd/modules/sound/xaudio2_sound.cpp2
-rw-r--r--src/version.cpp2
-rw-r--r--src/zexall/main.cpp4
-rw-r--r--src/zexall/zexall.cpp10
-rw-r--r--src/zexall/zexall.h4
173 files changed, 2389 insertions, 2444 deletions
diff --git a/src/devices/bus/a2bus/pc_xporter.cpp b/src/devices/bus/a2bus/pc_xporter.cpp
index 0dae54b0df4..ec40e08a1aa 100644
--- a/src/devices/bus/a2bus/pc_xporter.cpp
+++ b/src/devices/bus/a2bus/pc_xporter.cpp
@@ -35,24 +35,24 @@
then read Cn00 to map C800-CFFF first.
PC RAM from 0xA0000-0xAFFFF is where the V30 BIOS is downloaded,
- plus used for general storage by the system. This is mirrored at
+ plus used for general storage by the system. This is mirrored at
Fxxxx on the V30 so that it can boot.
RAM from 0xB8000-0xBFFFF is the CGA framebuffer as usual.
- C800-CFFE: RAM / registers, locations as follows
- C828-C82A: bi-directional mailslots used to allow the PC to make ProDOS MLI calls,
- likely for the HDD emulation (which uses a file on a ProDOS volume
- as the PC).
- $C828 = hi 8 bits of ptr to ProDOS call info, $C829 = middle 8 bits, $C82A = lower 8 bits
- If bit 7 of $C828 is set, then the 6502 will take action.
- C832: current CGA mode index, used by 6502 @ $6869 to setup 6845, or 6845 reg index
- C833: 6845 data to write in the case where C832 is the reg index rather than a mode offset
- C860-C864: PC ports 60h-64h, used for keyboard comms
- CAC1: year for PC real-time clock
- CAC2: month for PC real-time clock
- CAC3: day for PC real-time clock
- CAC4: hour for PC real-time clock
- CAC5: minute for PC real-time clock
+ C800-CFFE: RAM / registers, locations as follows
+ C828-C82A: bi-directional mailslots used to allow the PC to make ProDOS MLI calls,
+ likely for the HDD emulation (which uses a file on a ProDOS volume
+ as the PC).
+ $C828 = hi 8 bits of ptr to ProDOS call info, $C829 = middle 8 bits, $C82A = lower 8 bits
+ If bit 7 of $C828 is set, then the 6502 will take action.
+ C832: current CGA mode index, used by 6502 @ $6869 to setup 6845, or 6845 reg index
+ C833: 6845 data to write in the case where C832 is the reg index rather than a mode offset
+ C860-C864: PC ports 60h-64h, used for keyboard comms
+ CAC1: year for PC real-time clock
+ CAC2: month for PC real-time clock
+ CAC3: day for PC real-time clock
+ CAC4: hour for PC real-time clock
+ CAC5: minute for PC real-time clock
CF00: PC memory pointer (bits 0-7)
CF01: PC memory pointer (bits 8-15)
CF02: PC memory pointer (bits 16-23)
@@ -65,16 +65,16 @@
CF30: control/flags: bit 4 = 1 to release reset on V30, 5 = 1 to release halt on V30
bit 7: read for card IRQ status, write 1 to clear/disable? card IRQ
CF31: control/flags: bit 4 = 1 to assert reset on V30, 5 = 1 to assert halt on V30
- if bit 3 is set on an IRQ, the 6502 will force color 80x25 CGA text mode.
- bit 7: write 1 to enable card IRQ
+ if bit 3 is set on an IRQ, the 6502 will force color 80x25 CGA text mode.
+ bit 7: write 1 to enable card IRQ
TODO:
- - Code at $70b0-$70c5 waits for the V30 to answer FPU presence.
+ - Code at $70b0-$70c5 waits for the V30 to answer FPU presence.
- What's going on at CF0E/CF0F? One value set for normal operation, another during
ProDOS calls. Probably safe to ignore.
- - The manual indicates there is no ROM; special drivers installed into ProDOS 8
- provide the RAMdisk and A2-accessing-PC-drives functionality.
-
+ - The manual indicates there is no ROM; special drivers installed into ProDOS 8
+ provide the RAMdisk and A2-accessing-PC-drives functionality.
+
*********************************************************************/
#include "pc_xporter.h"
@@ -104,7 +104,7 @@ static ADDRESS_MAP_START(pc_io, AS_IO, 16, a2bus_pcxporter_device )
ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT( pcxporter )
- MCFG_CPU_ADD("v30", V30, XTAL_14_31818MHz/2) // 7.16 MHz as per manual
+ MCFG_CPU_ADD("v30", V30, XTAL_14_31818MHz/2) // 7.16 MHz as per manual
MCFG_CPU_PROGRAM_MAP(pc_map)
MCFG_CPU_IO_MAP(pc_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
@@ -153,7 +153,7 @@ MACHINE_CONFIG_FRAGMENT( pcxporter )
MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(a2bus_pcxporter_device, keyboard_clock_w))
MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE(a2bus_pcxporter_device, keyboard_data_w))
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
-
+
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
@@ -224,10 +224,10 @@ void a2bus_pcxporter_device::device_start()
save_item(NAME(m_ram));
save_item(NAME(m_regs));
save_item(NAME(m_offset));
-
+
m_v30->space(AS_PROGRAM).install_ram(0, 0xaffff, m_ram);
m_v30->space(AS_PROGRAM).install_rom(0xf0000, 0xfffff, &m_ram[0xa0000]);
-
+
m_pcmem_space = &m_v30->space(AS_PROGRAM);
m_pcio_space = &m_v30->space(AS_IO);
}
@@ -323,11 +323,11 @@ UINT8 a2bus_pcxporter_device::read_c800(address_space &space, UINT16 offset)
case 0x704: // read w/o increment
rv = m_ram[m_offset];
- return rv;
-
+ return rv;
+
default:
//printf("Read $C800 at %x\n", offset + 0xc800);
- break;
+ break;
}
return m_regs[offset];
@@ -381,13 +381,13 @@ void a2bus_pcxporter_device::write_c800(address_space &space, UINT16 offset, UIN
else if (m_offset >= 0xb8000 && m_offset <= 0xbbfff) m_pcmem_space->write_byte(m_offset, data);
else if (m_offset >= 0xbc000 && m_offset <= 0xbffff) m_pcmem_space->write_byte(m_offset-0x4000, data);
break;
-
- case 0x72c: // CGA 6845 register select
+
+ case 0x72c: // CGA 6845 register select
m_pcio_space->write_byte(0x3d6, data);
m_6845_reg = data;
break;
-
- case 0x72d: // CGA 6845 data read/write
+
+ case 0x72d: // CGA 6845 data read/write
// HACK: adjust the 40 column mode the 6502 sets to
// be more within specs.
switch (m_6845_reg)
@@ -416,37 +416,37 @@ void a2bus_pcxporter_device::write_c800(address_space &space, UINT16 offset, UIN
m_pcio_space->write_byte(0x3d7, data);
break;
-
- case 0x72e: // CGA mode select
+
+ case 0x72e: // CGA mode select
m_pcio_space->write_byte(0x3d8, data);
break;
case 0x72f: // CGA color select
m_pcio_space->write_byte(0x3d9, data);
break;
-
- case 0x730: // control 1
+
+ case 0x730: // control 1
if (data & 0x10) { m_v30->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); m_reset_during_halt = true; }
if (data & 0x20)
- {
+ {
if (m_reset_during_halt)
{
m_v30->reset();
m_reset_during_halt = false;
}
-
+
m_v30->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_v30->resume(SUSPEND_REASON_HALT | SUSPEND_REASON_DISABLE);
}
break;
-
- case 0x731: // control 2
+
+ case 0x731: // control 2
if (data & 0x10) m_v30->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
if (data & 0x20) m_v30->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
break;
-
+
default:
-// printf("%02x to C800 at %x\n", data, offset + 0xc800);
+// printf("%02x to C800 at %x\n", data, offset + 0xc800);
m_regs[offset] = data;
break;
}
@@ -646,6 +646,3 @@ WRITE8_MEMBER( a2bus_pcxporter_device::nmi_enable_w )
m_nmi_enabled = BIT(data,7);
m_isabus->set_nmi_state(m_nmi_enabled);
}
-
-
-
diff --git a/src/devices/bus/gba/rom.cpp b/src/devices/bus/gba/rom.cpp
index b4b2899024f..4aadc54b884 100644
--- a/src/devices/bus/gba/rom.cpp
+++ b/src/devices/bus/gba/rom.cpp
@@ -460,11 +460,11 @@ WRITE32_MEMBER(gba_rom_eeprom64_device::write_ram)
/*-------------------------------------------------
Carts with 3D Matrix Memory controller
-
+
Used by Video carts with 64MB ROM chips
Emulation based on the reverse engineering efforts
by endrift
-
+
The Memory controller basically behaves like a DMA
chip by writing first source and destination address,
then the number of 512K blocks to copy and finally
@@ -473,12 +473,12 @@ WRITE32_MEMBER(gba_rom_eeprom64_device::write_ram)
the transfer, other carts might use 0x11 but currently
they die before getting to the mapper communication
(CPU emulation issue? cart mapping issue? still unknown)
-
+
To investigate:
- why the other carts fail
- which addresses might be used by the mapper
(Disney Collection 2 uses 0x08800180-0x0880018f
- but it might well be possible to issue commands
+ but it might well be possible to issue commands
in an extended range...)
- which bus addresses can be used by the mapper
(currently we restrict the mapping in the range
@@ -492,7 +492,7 @@ WRITE32_MEMBER(gba_rom_3dmatrix_device::write_mapper)
switch (offset & 3)
{
case 0:
- if (data == 0x1) // transfer data
+ if (data == 0x1) // transfer data
memcpy((UINT8 *)m_romhlp + m_dst, (UINT8 *)m_rom + m_src, m_nblock * 0x200);
else
printf("Unknown mapper command 0x%X\n", data);
diff --git a/src/devices/bus/gba/rom.h b/src/devices/bus/gba/rom.h
index b43875af862..e13f6c623ac 100644
--- a/src/devices/bus/gba/rom.h
+++ b/src/devices/bus/gba/rom.h
@@ -168,14 +168,14 @@ class gba_rom_3dmatrix_device : public gba_rom_device
public:
// construction/destruction
gba_rom_3dmatrix_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
-
+
// reading and writing
virtual DECLARE_WRITE32_MEMBER(write_mapper) override;
-
+
private:
UINT32 m_src, m_dst, m_nblock;
};
diff --git a/src/devices/bus/megadrive/eeprom.cpp b/src/devices/bus/megadrive/eeprom.cpp
index e790d7cace8..016a17507eb 100644
--- a/src/devices/bus/megadrive/eeprom.cpp
+++ b/src/devices/bus/megadrive/eeprom.cpp
@@ -399,11 +399,11 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_init()
m_eeprom_word_address = 0;
m_eeprom_devsel = 0;
m_eeprom_byte = 0;
-
+
m_eeprom_sda = m_eeprom_prev_sda = 1;
m_eeprom_scl = m_eeprom_prev_scl = 1;
m_eeprom_cur_state = STATE_I2C_IDLE;
-
+
m_eeprom_mask = 0xff;
m_eeprom_pagewrite_mask = 0x03;
}
@@ -438,17 +438,17 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
case STATE_I2C_IDLE:
idle_devsel_check();
break;
-
+
case STATE_I2C_WAIT_STOP:
if (!m_eeprom_prev_sda && m_eeprom_sda && m_eeprom_scl)
m_eeprom_cur_state = STATE_I2C_IDLE;
break;
-
+
// device select: there can be up to 8 EEPROM in series, so that we start with writing 3 bits
// to identify which device has to be accessed, followed by a Read/Write bit to specify the action
case STATE_I2C_DEVSEL:
idle_devsel_check();
-
+
// LOW to HIGH transition of SCL = prepare to transmit, by moving to cnt = 1
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -480,11 +480,11 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
}
}
break;
-
+
// read operation = count 8 operations and at 9th check whether ACK has been issued
case STATE_I2C_READ_DATA:
idle_devsel_check();
-
+
// HIGH to LOW transition of SCL
if (m_eeprom_prev_scl && !m_eeprom_scl)
{
@@ -493,7 +493,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
else
m_eeprom_cnt = 1;
}
-
+
// LOW to HIGH transition of SCL
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -506,12 +506,12 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
}
break;
-
+
// For a write operation, the x24c02 requires a second address field. This address field is the
// word address, comprised of eight bits, providing access to any one of the 256 words of memory.
case STATE_I2C_GET_WORD_ADDR:
idle_devsel_check();
-
+
// HIGH to LOW transition of SCL
if (m_eeprom_prev_scl && !m_eeprom_scl)
{
@@ -526,7 +526,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
m_eeprom_word_address &= m_eeprom_mask;
}
}
-
+
// LOW to HIGH transition of SCL
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -534,11 +534,11 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
m_eeprom_word_address = ((m_eeprom_word_address << 1) | m_eeprom_sda) & 0xff;
}
break;
-
+
// write operation
case STATE_I2C_WRITE_DATA:
idle_devsel_check();
-
+
// HIGH to LOW transition of SCL
if (m_eeprom_prev_scl && !m_eeprom_scl)
{
@@ -547,7 +547,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
else
m_eeprom_cnt = 1;
}
-
+
// LOW to HIGH transition of SCL
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -568,7 +568,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
}
break;
}
-
+
m_eeprom_prev_scl = m_eeprom_scl;
m_eeprom_prev_sda = m_eeprom_sda;
//printf("Write line : status %d SDA %x SCL %x (count %d)\n", m_eeprom_cur_state, m_eeprom_sda, m_eeprom_scl, m_eeprom_cnt);
@@ -588,7 +588,7 @@ UINT8 md_eeprom_nbajam_device_alt::eeprom_i2c_out()
sram_address &= 0xffff;
res = (nvram[sram_address] >> (8 - m_eeprom_cnt)) & 1;
-
+
if (m_eeprom_cnt == 8)
{
//printf("Read EEPROM : status %d addr %x data %x (count 8)\n", m_eeprom_cur_state, sram_address, nvram[sram_address]);
@@ -604,11 +604,11 @@ UINT8 md_eeprom_nbajam_device_alt::eeprom_i2c_out()
if (m_eeprom_cnt == 9)
res = 0;
break;
-
+
default:
break;
}
-
+
//printf("Read line : status %d data %x (count %d)\n", m_eeprom_cur_state, res, m_eeprom_cnt);
return res;
}
@@ -635,4 +635,3 @@ WRITE16_MEMBER(md_eeprom_nbajam_device_alt::write)
eeprom_i2c_update();
}
}
-
diff --git a/src/devices/bus/megadrive/eeprom.h b/src/devices/bus/megadrive/eeprom.h
index 176b6f48fdd..f3582a49cba 100644
--- a/src/devices/bus/megadrive/eeprom.h
+++ b/src/devices/bus/megadrive/eeprom.h
@@ -162,15 +162,15 @@ class md_eeprom_nbajam_device_alt : public md_std_eeprom_device
public:
// construction/destruction
md_eeprom_nbajam_device_alt(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
-// virtual machine_config_constructor device_mconfig_additions() const override;
+// virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_start() override;
-
+
// reading and writing
virtual DECLARE_READ16_MEMBER(read) override;
virtual DECLARE_WRITE16_MEMBER(write) override;
-
+
std::vector<UINT8> m_sram;
void eeprom_i2c_init();
@@ -180,13 +180,13 @@ public:
private:
// EEPROM runtime vars
- UINT8 m_eeprom_sda; // current SDA
- UINT8 m_eeprom_prev_sda; // previous SDA
- UINT8 m_eeprom_scl; // current SCL
+ UINT8 m_eeprom_sda; // current SDA
+ UINT8 m_eeprom_prev_sda; // previous SDA
+ UINT8 m_eeprom_scl; // current SCL
UINT8 m_eeprom_prev_scl; // previous SCL
UINT8 m_eeprom_cnt; // operation count in 0-9
UINT8 m_eeprom_readwrite; // read/write bit
- UINT16 m_eeprom_slave_mask; // dev addr
+ UINT16 m_eeprom_slave_mask; // dev addr
UINT16 m_eeprom_word_address; // memory addr
UINT16 m_eeprom_devsel; // selected device
UINT16 m_eeprom_byte; // byte to be written
diff --git a/src/devices/bus/megadrive/md_slot.cpp b/src/devices/bus/megadrive/md_slot.cpp
index 84228207d5e..61e847eb6e9 100644
--- a/src/devices/bus/megadrive/md_slot.cpp
+++ b/src/devices/bus/megadrive/md_slot.cpp
@@ -837,7 +837,7 @@ int base_md_cart_slot_device::get_cart_type(UINT8 *ROM, UINT32 len)
if (!memcmp((char *)&ROM[0x0180], "SF-002", 6)) // Legend of Wukong
type = WUKONG;
break;
-
+
case 0x300000:
if (!memcmp(&ROM[0x220], sdk_sig, sizeof(sdk_sig)))
type = LIONK3;
diff --git a/src/devices/bus/megadrive/rom.cpp b/src/devices/bus/megadrive/rom.cpp
index 5d38557ea86..16b12561c8a 100644
--- a/src/devices/bus/megadrive/rom.cpp
+++ b/src/devices/bus/megadrive/rom.cpp
@@ -1443,7 +1443,7 @@ WRITE16_MEMBER(md_rom_wukong_device::write_a13)
/*-------------------------------------------------
STAR ODYSSEY
This game uses a slightly more complex mapper:
- not only RAM can be enabled / disabled, but also
+ not only RAM can be enabled / disabled, but also
ROM can be mapped in three different modes.
In what we call Mode0 the first 256K are mirrored
into area 0x000000-0x1fffff; in Mode1 cart gives
@@ -1457,7 +1457,7 @@ READ16_MEMBER(md_rom_starodys_device::read)
{
if (offset >= m_nvram_start/2 && offset <= m_nvram_end/2 && m_nvram_active && m_ram_enable)
return m_nvram[offset & 0x3fff];
-
+
if (offset < 0x200000/2)
{
if (m_mode == 0)
@@ -1497,7 +1497,7 @@ WRITE16_MEMBER(md_rom_starodys_device::write)
else
m_mode = 0;
//printf("ROM mode %d!\n", m_mode);
-
+
if (!BIT(data, 7))
{
//printf("LOCK BANKSWITCH!\n");
@@ -1512,7 +1512,7 @@ WRITE16_MEMBER(md_rom_starodys_device::write)
}
}
}
-
+
}
READ16_MEMBER(md_rom_starodys_device::read_a13)
@@ -1527,9 +1527,8 @@ WRITE16_MEMBER(md_rom_starodys_device::write_a13)
{
m_nvram_active = BIT(data, 0);
m_nvram_readonly = BIT(data, 1);
-
+
if (m_nvram_active)
m_nvram_handlers_installed = 1;
}
}
-
diff --git a/src/devices/bus/megadrive/rom.h b/src/devices/bus/megadrive/rom.h
index 4e9b656e08a..dcb1536f974 100644
--- a/src/devices/bus/megadrive/rom.h
+++ b/src/devices/bus/megadrive/rom.h
@@ -552,17 +552,17 @@ class md_rom_starodys_device : public md_std_rom_device
public:
// construction/destruction
md_rom_starodys_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
-
+
// reading and writing
virtual DECLARE_READ16_MEMBER(read) override;
virtual DECLARE_WRITE16_MEMBER(write) override;
virtual DECLARE_READ16_MEMBER(read_a13) override;
virtual DECLARE_WRITE16_MEMBER(write_a13) override;
-
+
private:
UINT8 m_mode, m_lock, m_ram_enable, m_base;
};
diff --git a/src/devices/bus/neogeo/boot_cthd.cpp b/src/devices/bus/neogeo/boot_cthd.cpp
index 8f6f4a6a213..1cb69ca1ecb 100644
--- a/src/devices/bus/neogeo/boot_cthd.cpp
+++ b/src/devices/bus/neogeo/boot_cthd.cpp
@@ -133,4 +133,3 @@ machine_config_constructor neogeo_matrimbl_cart::device_mconfig_additions() cons
{
return MACHINE_CONFIG_NAME( matrimbl_cart );
}
-
diff --git a/src/devices/bus/neogeo/boot_kof10th.cpp b/src/devices/bus/neogeo/boot_kof10th.cpp
index 1479e21701f..67d3aa04c1b 100644
--- a/src/devices/bus/neogeo/boot_kof10th.cpp
+++ b/src/devices/bus/neogeo/boot_kof10th.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighters 10th Anniversary Bootleg cart type
@@ -103,9 +103,9 @@ WRITE16_MEMBER(neogeo_kof10th_cart::protection_w)
if (offset < 0x40000/2)
{
if (!m_cart_ram[0xffe])
- COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A
+ COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A
else
- m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
+ m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
}
else if (offset >= 0xfe000/2)
{
diff --git a/src/devices/bus/neogeo/boot_kof2k2.cpp b/src/devices/bus/neogeo/boot_kof2k2.cpp
index 1f83351820d..f6d602491d6 100644
--- a/src/devices/bus/neogeo/boot_kof2k2.cpp
+++ b/src/devices/bus/neogeo/boot_kof2k2.cpp
@@ -106,5 +106,3 @@ void neogeo_kf2k2mp2_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_prot->sx_decrypt(fix_region, fix_region_size, 1);
m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2002_GFX_KEY);
}
-
-
diff --git a/src/devices/bus/neogeo/boot_kof2k2.h b/src/devices/bus/neogeo/boot_kof2k2.h
index a312cc3a7f3..23a8ac53aaf 100644
--- a/src/devices/bus/neogeo/boot_kof2k2.h
+++ b/src/devices/bus/neogeo/boot_kof2k2.h
@@ -23,7 +23,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
private:
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
@@ -45,7 +45,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
private:
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
@@ -66,7 +66,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
private:
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
diff --git a/src/devices/bus/neogeo/boot_kof2k3.cpp b/src/devices/bus/neogeo/boot_kof2k3.cpp
index 07fe8bc4c38..5426ebf9f5b 100644
--- a/src/devices/bus/neogeo/boot_kof2k3.cpp
+++ b/src/devices/bus/neogeo/boot_kof2k3.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighters 2003 Bootleg cart type
@@ -52,7 +52,7 @@ void neogeo_kf2k3bl_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2003_GFX_KEY);
m_pcm2_prot->swap(ym_region, ym_region_size, 5);
m_prot->sx_decrypt(fix_region, fix_region_size, 1);
-
+
}
/*************************************************
diff --git a/src/devices/bus/neogeo/boot_kof2k3.h b/src/devices/bus/neogeo/boot_kof2k3.h
index 7e57266e373..848f5cd647e 100644
--- a/src/devices/bus/neogeo/boot_kof2k3.h
+++ b/src/devices/bus/neogeo/boot_kof2k3.h
@@ -18,9 +18,9 @@ public:
neogeo_kf2k3bl_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
virtual UINT32 get_bank_base(UINT16 sel) override { return m_kof2k3bl_prot->get_bank_base(); }
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_kof2k3bl_prot->protection_r(space, offset, mem_mask); }
virtual DECLARE_WRITE16_MEMBER(protection_w) override { m_kof2k3bl_prot->kof2003_w(space, offset, data, mem_mask); }
@@ -45,7 +45,7 @@ public:
neogeo_kf2k3pl_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
virtual UINT32 get_bank_base(UINT16 sel) override { return m_kof2k3bl_prot->get_bank_base(); }
@@ -71,9 +71,9 @@ public:
neogeo_kf2k3upl_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
virtual UINT32 get_bank_base(UINT16 sel) override { return m_kof2k3bl_prot->get_bank_base(); }
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_kof2k3bl_prot->protection_r(space, offset, mem_mask); }
virtual DECLARE_WRITE16_MEMBER(protection_w) override { m_kof2k3bl_prot->kof2003_w(space, offset, data, mem_mask); }
diff --git a/src/devices/bus/neogeo/boot_misc.cpp b/src/devices/bus/neogeo/boot_misc.cpp
index 61eeb399ed7..16fa78c12f6 100644
--- a/src/devices/bus/neogeo/boot_misc.cpp
+++ b/src/devices/bus/neogeo/boot_misc.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Misc. bootleg cart types (possibly to be split further at a later stage)
@@ -286,4 +286,3 @@ void neogeo_kog_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_prot->sx_decrypt(fix_region, fix_region_size, 1);
m_prot->cx_decrypt(spr_region, spr_region_size);
}
-
diff --git a/src/devices/bus/neogeo/boot_misc.h b/src/devices/bus/neogeo/boot_misc.h
index 646a314d03c..6a62fab27f5 100644
--- a/src/devices/bus/neogeo/boot_misc.h
+++ b/src/devices/bus/neogeo/boot_misc.h
@@ -149,7 +149,7 @@ public:
neogeo_mslug3b6_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
private:
@@ -168,7 +168,7 @@ public:
neogeo_ms5plus_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 1; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_prot->mslug5p_prot_r(space, offset, mem_mask); }
@@ -190,7 +190,7 @@ class neogeo_kog_cart : public neogeo_bootleg_cart
{
public:
neogeo_kog_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual ioport_constructor device_input_ports() const override;
virtual DECLARE_READ16_MEMBER(protection_r) override;
diff --git a/src/devices/bus/neogeo/boot_svc.cpp b/src/devices/bus/neogeo/boot_svc.cpp
index f70b5f4a62f..3bec1518958 100644
--- a/src/devices/bus/neogeo/boot_svc.cpp
+++ b/src/devices/bus/neogeo/boot_svc.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
SNK Vs Capcom Bootleg cart type
diff --git a/src/devices/bus/neogeo/boot_svc.h b/src/devices/bus/neogeo/boot_svc.h
index 5f2a0dd3fb6..e7a94b14da1 100644
--- a/src/devices/bus/neogeo/boot_svc.h
+++ b/src/devices/bus/neogeo/boot_svc.h
@@ -69,15 +69,15 @@ class neogeo_svcsplus_cart : public neogeo_bootleg_cart
{
public:
neogeo_svcsplus_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
virtual UINT32 get_bank_base(UINT16 sel) override { return m_pvc_prot->get_bank_base(); }
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_pvc_prot->protection_r(space, offset, mem_mask); }
virtual DECLARE_WRITE16_MEMBER(protection_w) override { m_pvc_prot->protection_w(space, offset, data, mem_mask); }
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
private:
required_device<pvc_prot_device> m_pvc_prot;
};
diff --git a/src/devices/bus/neogeo/carts.cpp b/src/devices/bus/neogeo/carts.cpp
index 359a69099a4..ebc021c585f 100644
--- a/src/devices/bus/neogeo/carts.cpp
+++ b/src/devices/bus/neogeo/carts.cpp
@@ -24,12 +24,12 @@
SLOT_INTERFACE_START(neogeo_cart)
- SLOT_INTERFACE_INTERNAL("rom", NEOGEO_ROM) // Standard cart with banking
+ SLOT_INTERFACE_INTERNAL("rom", NEOGEO_ROM) // Standard cart with banking
- SLOT_INTERFACE_INTERNAL("rom_vliner", NEOGEO_VLINER_CART) // Standard cart + RAM
- SLOT_INTERFACE_INTERNAL("rom_fatfur2", NEOGEO_FATFURY2_CART) // Custom Fatal Fury 2 protection
- SLOT_INTERFACE_INTERNAL("rom_kof98", NEOGEO_KOF98_CART) // Custom King of Fighters 98 protection
- SLOT_INTERFACE_INTERNAL("rom_mslugx", NEOGEO_MSLUGX_CART) // Custom Metal Slug X protection
+ SLOT_INTERFACE_INTERNAL("rom_vliner", NEOGEO_VLINER_CART) // Standard cart + RAM
+ SLOT_INTERFACE_INTERNAL("rom_fatfur2", NEOGEO_FATFURY2_CART) // Custom Fatal Fury 2 protection
+ SLOT_INTERFACE_INTERNAL("rom_kof98", NEOGEO_KOF98_CART) // Custom King of Fighters 98 protection
+ SLOT_INTERFACE_INTERNAL("rom_mslugx", NEOGEO_MSLUGX_CART) // Custom Metal Slug X protection
// only CMC42 for gfx
SLOT_INTERFACE_INTERNAL("cmc42_zupapa", NEOGEO_CMC_ZUPAPA_CART)
@@ -45,7 +45,7 @@ SLOT_INTERFACE_START(neogeo_cart)
// only CMC50 for gfx + audiocpu
SLOT_INTERFACE_INTERNAL("cmc50_kof2001", NEOGEO_CMC_KOF2001_CART)
SLOT_INTERFACE_INTERNAL("cmc50_kof2000n", NEOGEO_CMC_KOF2000N_CART)
- SLOT_INTERFACE_INTERNAL("cmc50_jockeygp", NEOGEO_CMC_JOCKEYGP_CART) // CMC50 + RAM
+ SLOT_INTERFACE_INTERNAL("cmc50_jockeygp", NEOGEO_CMC_JOCKEYGP_CART) // CMC50 + RAM
// These use SMA for prg & CMC42 for gfx
SLOT_INTERFACE_INTERNAL("sma_kof99", NEOGEO_SMA_KOF99_CART)
@@ -78,13 +78,13 @@ SLOT_INTERFACE_START(neogeo_cart)
SLOT_INTERFACE_INTERNAL("boot_cthd2k3", NEOGEO_CTHD2K3_CART)
SLOT_INTERFACE_INTERNAL("boot_ct2k3sp", NEOGEO_CT2K3SP_CART)
SLOT_INTERFACE_INTERNAL("boot_ct2k3sa", NEOGEO_CT2K3SA_CART)
- SLOT_INTERFACE_INTERNAL("boot_matrimbl", NEOGEO_MATRIMBL_CART) // this also uses a CMC for SFIX & addditional prg scramble from kof2002
+ SLOT_INTERFACE_INTERNAL("boot_matrimbl", NEOGEO_MATRIMBL_CART) // this also uses a CMC for SFIX & addditional prg scramble from kof2002
// Bootleg logic for SVC clones
- SLOT_INTERFACE_INTERNAL("boot_svcboot", NEOGEO_SVCBOOT_CART) // this also uses a PVC protection/encryption
+ SLOT_INTERFACE_INTERNAL("boot_svcboot", NEOGEO_SVCBOOT_CART) // this also uses a PVC protection/encryption
SLOT_INTERFACE_INTERNAL("boot_svcplus", NEOGEO_SVCPLUS_CART)
SLOT_INTERFACE_INTERNAL("boot_svcplusa", NEOGEO_SVCPLUSA_CART)
- SLOT_INTERFACE_INTERNAL("boot_svcsplus", NEOGEO_SVCSPLUS_CART) // this also uses a PVC protection/encryption
+ SLOT_INTERFACE_INTERNAL("boot_svcsplus", NEOGEO_SVCSPLUS_CART) // this also uses a PVC protection/encryption
// Bootleg logic for KOF2002 clones
SLOT_INTERFACE_INTERNAL("boot_kf2k2b", NEOGEO_KOF2002B_CART)
@@ -104,8 +104,8 @@ SLOT_INTERFACE_START(neogeo_cart)
SLOT_INTERFACE_INTERNAL("boot_kf2k4se", NEOGEO_KF2K4SE_CART)
SLOT_INTERFACE_INTERNAL("boot_lans2004", NEOGEO_LANS2004_CART)
SLOT_INTERFACE_INTERNAL("boot_samsho5b", NEOGEO_SAMSHO5B_CART)
- SLOT_INTERFACE_INTERNAL("boot_mslug3b6", NEOGEO_MSLUG3B6_CART) // this also uses a CMC42 for gfx
- SLOT_INTERFACE_INTERNAL("boot_ms5plus", NEOGEO_MS5PLUS_CART) // this also uses a CMC50 for gfx + audiocpu & NEOPCM2 for YM scramble
+ SLOT_INTERFACE_INTERNAL("boot_mslug3b6", NEOGEO_MSLUG3B6_CART) // this also uses a CMC42 for gfx
+ SLOT_INTERFACE_INTERNAL("boot_ms5plus", NEOGEO_MS5PLUS_CART) // this also uses a CMC50 for gfx + audiocpu & NEOPCM2 for YM scramble
SLOT_INTERFACE_INTERNAL("boot_kog", NEOGEO_KOG_CART)
SLOT_INTERFACE_INTERNAL("boot_kf10th", NEOGEO_KOF10TH_CART)
diff --git a/src/devices/bus/neogeo/cmc.cpp b/src/devices/bus/neogeo/cmc.cpp
index c2e544f38e9..4fac2c9eb72 100644
--- a/src/devices/bus/neogeo/cmc.cpp
+++ b/src/devices/bus/neogeo/cmc.cpp
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
CMC42 & CMC50 encrypted cart type
-
+
***********************************************************************************************************/
@@ -264,4 +264,3 @@ void neogeo_cmc_jockeygp_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, JOCKEYGP_GFX_KEY);
m_prot->sfix_decrypt(spr_region, spr_region_size, fix_region, fix_region_size);
}
-
diff --git a/src/devices/bus/neogeo/fatfury2.cpp b/src/devices/bus/neogeo/fatfury2.cpp
index 79c324754cd..3236e2f7574 100644
--- a/src/devices/bus/neogeo/fatfury2.cpp
+++ b/src/devices/bus/neogeo/fatfury2.cpp
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Fatal Fury 2 cart type
-
+
***********************************************************************************************************/
@@ -50,4 +50,3 @@ machine_config_constructor neogeo_fatfury2_cart::device_mconfig_additions() cons
{
return MACHINE_CONFIG_NAME( fatfury2_cart );
}
-
diff --git a/src/devices/bus/neogeo/kof2k2.cpp b/src/devices/bus/neogeo/kof2k2.cpp
index a5ccf559f25..ac8235c471f 100644
--- a/src/devices/bus/neogeo/kof2k2.cpp
+++ b/src/devices/bus/neogeo/kof2k2.cpp
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighers 2002 cart type (CMC + PCM2 + Additional CPU encryption)
-
+
***********************************************************************************************************/
diff --git a/src/devices/bus/neogeo/kof98.cpp b/src/devices/bus/neogeo/kof98.cpp
index 07685700f4c..38bd2445d96 100644
--- a/src/devices/bus/neogeo/kof98.cpp
+++ b/src/devices/bus/neogeo/kof98.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighers '98 cart type
diff --git a/src/devices/bus/neogeo/mslugx.cpp b/src/devices/bus/neogeo/mslugx.cpp
index 4ef91c4b091..b3b83fae1f7 100644
--- a/src/devices/bus/neogeo/mslugx.cpp
+++ b/src/devices/bus/neogeo/mslugx.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Metal Slug X cart type
@@ -50,4 +50,3 @@ machine_config_constructor neogeo_mslugx_cart::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( mslugx_cart );
}
-
diff --git a/src/devices/bus/neogeo/pcm2.cpp b/src/devices/bus/neogeo/pcm2.cpp
index f80ae946006..a83cd966cb8 100644
--- a/src/devices/bus/neogeo/pcm2.cpp
+++ b/src/devices/bus/neogeo/pcm2.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
PCM2 encrypted cart type
@@ -132,4 +132,3 @@ void neogeo_pcm2_pnyaa_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_cmc_prot->sfix_decrypt(spr_region, spr_region_size, fix_region, fix_region_size);
m_pcm2_prot->decrypt(ym_region, ym_region_size, 4);
}
-
diff --git a/src/devices/bus/neogeo/pcm2.h b/src/devices/bus/neogeo/pcm2.h
index bdadbfb0f71..fff3408eae3 100644
--- a/src/devices/bus/neogeo/pcm2.h
+++ b/src/devices/bus/neogeo/pcm2.h
@@ -23,9 +23,9 @@ public:
virtual machine_config_constructor device_mconfig_additions() const override;
// reading and writing
-// virtual DECLARE_READ16_MEMBER(read_rom) override;
+// virtual DECLARE_READ16_MEMBER(read_rom) override;
-// virtual void activate_cart(ACTIVATE_CART_PARAMS) override { m_banked_cart->install_banks(machine, maincpu, cpuregion, cpuregion_size); }
+// virtual void activate_cart(ACTIVATE_CART_PARAMS) override { m_banked_cart->install_banks(machine, maincpu, cpuregion, cpuregion_size); }
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override {}
virtual int get_fixed_bank_type(void) override { return 0; }
diff --git a/src/devices/bus/neogeo/prot_cmc.cpp b/src/devices/bus/neogeo/prot_cmc.cpp
index 80249bf3f94..7a91344aaad 100644
--- a/src/devices/bus/neogeo/prot_cmc.cpp
+++ b/src/devices/bus/neogeo/prot_cmc.cpp
@@ -606,7 +606,7 @@ void cmc_prot_device::sfix_decrypt(UINT8* rom, UINT32 rom_size, UINT8* fixed, UI
int tx_size = fixed_size;
UINT8 *src = rom + rom_size - tx_size;
UINT8 *dst = fixed;
-
+
for (int i = 0; i < tx_size; i++)
dst[i] = src[(i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4)];
}
diff --git a/src/devices/bus/neogeo/prot_cthd.cpp b/src/devices/bus/neogeo/prot_cthd.cpp
index 630840420fa..b2901a60d3e 100644
--- a/src/devices/bus/neogeo/prot_cthd.cpp
+++ b/src/devices/bus/neogeo/prot_cthd.cpp
@@ -25,9 +25,9 @@ void cthd_prot_device::device_reset()
/**************************
-
+
decryption helpers
-
+
**************************/
// descrambling information from razoola
@@ -86,9 +86,9 @@ void cthd_prot_device::cthd2003_c(UINT8* sprrom, UINT32 sprrom_size, int pow)
}
/**************************
-
+
protection / encryption
-
+
**************************/
void cthd_prot_device::decrypt_cthd2003(UINT8* sprrom, UINT32 sprrom_size, UINT8* audiorom, UINT32 audiorom_size, UINT8* fixedrom, UINT32 fixedrom_size)
@@ -119,16 +119,16 @@ void cthd_prot_device::decrypt_cthd2003(UINT8* sprrom, UINT32 sprrom_size, UINT8
/*
WRITE16_MEMBER( ngbootleg_prot_device::cthd2003_bankswitch_w )
{
- int bankaddress;
- static const int cthd2003_banks[8] =
- {
- 1,0,1,0,1,0,3,2,
- };
- if (offset == 0)
- {
- bankaddress = 0x100000 + cthd2003_banks[data&7]*0x100000;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
- }
+ int bankaddress;
+ static const int cthd2003_banks[8] =
+ {
+ 1,0,1,0,1,0,3,2,
+ };
+ if (offset == 0)
+ {
+ bankaddress = 0x100000 + cthd2003_banks[data&7]*0x100000;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
+ }
}
*/
@@ -313,7 +313,7 @@ void cthd_prot_device::matrimbl_decrypt(UINT8* sprrom, UINT32 sprrom_size, UINT8
rom[j] = buf[i];
}
memcpy(rom - 0x10000, rom, 0x10000);
-
+
// decrypt gfx
cthd2003_c(sprrom,sprrom_size, 0 );
}
diff --git a/src/devices/bus/neogeo/prot_cthd.h b/src/devices/bus/neogeo/prot_cthd.h
index b1739c85207..8adc5fec705 100644
--- a/src/devices/bus/neogeo/prot_cthd.h
+++ b/src/devices/bus/neogeo/prot_cthd.h
@@ -32,7 +32,7 @@ public:
void patch_ct2k3sa(UINT8* cpurom, UINT32 cpurom_size);
void decrypt_ct2k3sa(UINT8* sprrom, UINT32 sprrom_size, UINT8* audiorom, UINT32 audiorom_size);
-
+
void matrimbl_decrypt(UINT8* sprrom, UINT32 sprrom_size, UINT8* audiorom, UINT32 audiorom_size);
protected:
diff --git a/src/devices/bus/neogeo/prot_fatfury2.cpp b/src/devices/bus/neogeo/prot_fatfury2.cpp
index 711638d7fb3..7a04e4cefe8 100644
--- a/src/devices/bus/neogeo/prot_fatfury2.cpp
+++ b/src/devices/bus/neogeo/prot_fatfury2.cpp
@@ -99,4 +99,3 @@ WRITE16_MEMBER( fatfury2_prot_device::protection_w )
break;
}
}
-
diff --git a/src/devices/bus/neogeo/prot_kof2k3bl.cpp b/src/devices/bus/neogeo/prot_kof2k3bl.cpp
index 5801f6dacfe..5ef35dee9c5 100644
--- a/src/devices/bus/neogeo/prot_kof2k3bl.cpp
+++ b/src/devices/bus/neogeo/prot_kof2k3bl.cpp
@@ -50,11 +50,11 @@ WRITE16_MEMBER(kof2k3bl_prot_device::kof2003_w)
m_bank_base = 0x100000 + ((cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff1)]);
//UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff1)];
//m_bankdev->neogeo_set_main_cpu_bank_address(address+0x100000);
-
+
cr[BYTE_XOR_LE(0x1ff0)] = 0xa0;
cr[BYTE_XOR_LE(0x1ff1)] &= 0xfe;
cr[BYTE_XOR_LE(0x1ff3)] &= 0x7f;
-
+
m_overlay = (prt & 0x00ff) | (m_overlay & 0xff00);
}
}
@@ -69,7 +69,7 @@ WRITE16_MEMBER(kof2k3bl_prot_device::kof2003p_w)
m_bank_base = 0x100000 + ((cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff0)]);
//UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff0)];
//m_bankdev->neogeo_set_main_cpu_bank_address(address+0x100000);
-
+
cr[BYTE_XOR_LE(0x1ff0)] &= 0xfe;
cr[BYTE_XOR_LE(0x1ff3)] &= 0x7f;
@@ -96,17 +96,17 @@ void kof2k3bl_prot_device::pl_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
std::vector<UINT16> tmp(0x100000/2);
UINT16*rom16 = (UINT16*)cpurom;
-
+
for (int i = 0; i < 0x700000/2; i += 0x100000/2)
{
memcpy(&tmp[0], &rom16[i], 0x100000);
for (int j = 0; j < 0x100000/2; j++)
rom16[i+j] = tmp[BITSWAP24(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)];
}
-
+
/* patched by Altera protection chip on PCB */
rom16[0xf38ac/2] = 0x4e75;
-
+
m_overlay = rom16[0x58196 / 2];
}
@@ -118,7 +118,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
UINT8 *src = cpurom;
memmove(src + 0x100000, src, 0x600000);
memmove(src, src + 0x700000, 0x100000);
-
+
UINT8 *rom = cpurom + 0xfe000;
UINT8 *buf = cpurom + 0xd0610;
for (int i = 0; i < 0x2000 / 2; i++)
@@ -126,8 +126,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int ofst = (i & 0xff00) + BITSWAP8((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5);
memcpy(&rom[i * 2], &buf[ofst * 2], 2);
}
-
+
UINT16* rom16 = (UINT16*)cpurom;
m_overlay = rom16[0x58196 / 2];
}
-
diff --git a/src/devices/bus/neogeo/prot_kof98.cpp b/src/devices/bus/neogeo/prot_kof98.cpp
index 05cc11e3775..9c41f709f2b 100644
--- a/src/devices/bus/neogeo/prot_kof98.cpp
+++ b/src/devices/bus/neogeo/prot_kof98.cpp
@@ -125,4 +125,3 @@ WRITE16_MEMBER( kof98_prot_device::protection_w )
break;
}
}
-
diff --git a/src/devices/bus/neogeo/prot_misc.cpp b/src/devices/bus/neogeo/prot_misc.cpp
index f48591c72d9..c858e05f42b 100644
--- a/src/devices/bus/neogeo/prot_misc.cpp
+++ b/src/devices/bus/neogeo/prot_misc.cpp
@@ -2,9 +2,9 @@
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***************************************************************************
-
+
Neo-Geo hardware encryption and protection used on bootleg cartridges
-
+
Many of the NeoGeo bootlegs use their own form of encryption and
protection, presumably to make them harder for other bootleggers to
copy. This encryption often involves non-trivial scrambling of the
@@ -12,11 +12,11 @@
provides some kind of rom overlay, patching parts of the code.
The graphics roms are usually scrambled in a different way to the
official SNK cartridges too.
-
+
Here we collect functions to emulate some of the protection devices used.
-
+
TODO: split different devices according to the chip responsible for them!
-
+
***************************************************************************/
#include "emu.h"
@@ -197,10 +197,10 @@ void neoboot_prot_device::lans2004_decrypt_68k(UINT8* cpurom, UINT32 cpurom_size
static const int sec[] = { 0x3, 0x8, 0x7, 0xc, 0x1, 0xa, 0x6, 0xd };
dynamic_buffer dst(0x600000);
-
+
for (int i = 0; i < 8; i++)
memcpy (&dst[i * 0x20000], src + sec[i] * 0x20000, 0x20000);
-
+
memcpy (&dst[0x0bbb00], src + 0x045b00, 0x001710);
memcpy (&dst[0x02fff0], src + 0x1a92be, 0x000010);
memcpy (&dst[0x100000], src + 0x200000, 0x400000);
@@ -233,20 +233,20 @@ void neoboot_prot_device::samsho5b_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int px_size = cpurom_size;
UINT8 *rom = cpurom;
dynamic_buffer buf(px_size);
-
+
memcpy(&buf[0], rom, px_size);
-
+
for (int i = 0; i < px_size / 2; i++)
{
int ofst = BITSWAP8((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2);
ofst += (i & 0xfffff00);
ofst ^= 0x060005;
-
+
memcpy(&rom[i * 2], &buf[ofst * 2], 0x02);
}
-
+
memcpy(&buf[0], rom, px_size);
-
+
memcpy(&rom[0x000000], &buf[0x700000], 0x100000);
memcpy(&rom[0x100000], &buf[0x000000], 0x700000);
}
@@ -256,7 +256,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(UINT8* ymsndrom, UINT32 ymsndrom_s
{
int vx_size = ymsndrom_size;
UINT8 *rom = ymsndrom;
-
+
for (int i = 0; i < vx_size; i++)
rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
}
@@ -276,22 +276,22 @@ READ16_MEMBER( neoboot_prot_device::mslug5p_prot_r )
/*
WRITE16_MEMBER( neoboot_prot_device::ms5plus_bankswitch_w )
{
- int bankaddress;
- logerror("offset: %06x PC %06x: set banking %04x\n",offset,space.device().safe_pc(),data);
- if ((offset == 0) && (data == 0xa0))
- {
- bankaddress = 0xa0;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
- logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
- }
- else if(offset == 2)
- {
- data = data >> 4;
- //data = data & 7;
- bankaddress = data * 0x100000;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
- logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
- }
+ int bankaddress;
+ logerror("offset: %06x PC %06x: set banking %04x\n",offset,space.device().safe_pc(),data);
+ if ((offset == 0) && (data == 0xa0))
+ {
+ bankaddress = 0xa0;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
+ logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
+ }
+ else if(offset == 2)
+ {
+ data = data >> 4;
+ //data = data & 7;
+ bankaddress = data * 0x100000;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
+ logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
+ }
}
*/
@@ -314,26 +314,26 @@ void neoboot_prot_device::kog_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
dynamic_buffer dst(0x600000);
UINT16 *rom = (UINT16 *)cpurom;
static const int sec[] = { 0x3, 0x8, 0x7, 0xc, 0x1, 0xa, 0x6, 0xd };
-
+
for (int i = 0; i < 8; i++)
memcpy (&dst[i * 0x20000], src + sec[i] * 0x20000, 0x20000);
-
+
memcpy (&dst[0x0007a6], src + 0x0407a6, 0x000006);
memcpy (&dst[0x0007c6], src + 0x0407c6, 0x000006);
memcpy (&dst[0x0007e6], src + 0x0407e6, 0x000006);
memcpy (&dst[0x090000], src + 0x040000, 0x004000);
memcpy (&dst[0x100000], src + 0x200000, 0x400000);
memcpy (src, &dst[0], 0x600000);
-
+
for (int i = 0x90000/2; i < 0x94000/2; i++)
{
if (((rom[i] & 0xffbf) == 0x4eb9 || rom[i] == 0x43f9) && !rom[i + 1])
rom[i + 1] = 0x0009;
-
+
if (rom[i] == 0x4eb8)
rom[i] = 0x6100;
}
-
+
rom[0x007a8/2] = 0x0009;
rom[0x007c8/2] = 0x0009;
rom[0x007e8/2] = 0x0009;
@@ -363,7 +363,7 @@ void neoboot_prot_device::kog_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
rom[0x93a58/2] = 0xfd08;
rom[0x93a66/2] = 0xf9ca;
rom[0x93a72/2] = 0xf9be;
-
+
}
/* SNK vs. CAPCOM SVC CHAOS (bootleg) */
@@ -374,10 +374,10 @@ void neoboot_prot_device::svcboot_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
for (int i = 0; i < size / 0x100000; i++)
memcpy(&dst[i * 0x100000], &src[sec[i] * 0x100000], 0x100000);
-
+
for (int i = 0; i < size / 2; i++)
{
int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4);
@@ -400,7 +400,7 @@ void neoboot_prot_device::svcboot_cx_decrypt(UINT8* sprrom, UINT32 sprrom_size)
int size = sprrom_size;
UINT8 *src = sprrom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 0x80; i++)
{
@@ -424,18 +424,18 @@ void neoboot_prot_device::svcplus_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
int ofst = BITSWAP24((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02,
- 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08,
- 0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12);
+ 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08,
+ 0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12);
ofst ^= 0x0f0007;
ofst += (i & 0xff00000);
memcpy(&src[i * 0x02], &dst[ofst * 0x02], 0x02);
}
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < 6; i++)
memcpy(&src[i * 0x100000], &dst[sec[i] * 0x100000], 0x100000);
@@ -458,7 +458,7 @@ void neoboot_prot_device::svcplusa_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < 6; i++)
memcpy(&src[i * 0x100000], &dst[sec[i] * 0x100000], 0x100000);
@@ -473,13 +473,13 @@ void neoboot_prot_device::svcsplus_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
int ofst = BITSWAP16((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d,
- 0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e);
-
+ 0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e);
+
ofst += (i & 0x078000);
ofst += sec[(i & 0xf80000) >> 19] << 19;
memcpy(&src[i * 2], &dst[ofst * 2], 0x02);
@@ -513,13 +513,13 @@ void neoboot_prot_device::kof2002b_gfx_decrypt(UINT8 *src, int size)
{ 2, 1, 0, 6, 7, 8 },
{ 8, 0, 7, 6, 2, 1 },
};
-
+
dynamic_buffer dst(0x10000);
-
+
for (int i = 0; i < size; i += 0x10000)
{
memcpy(&dst[0], src + i, 0x10000);
-
+
for (int j = 0; j < 0x200; j++)
{
int n = (j & 0x38) >> 3;
@@ -536,9 +536,9 @@ void neoboot_prot_device::kf2k2mp_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
UINT8 *src = cpurom;
UINT8 dst[0x80];
-
+
memmove(src, src + 0x300000, 0x500000);
-
+
for (int i = 0; i < 0x800000; i+=0x80)
{
for (int j = 0; j < 0x80 / 2; j++)
@@ -557,7 +557,7 @@ void neoboot_prot_device::kf2k2mp2_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
UINT8 *src = cpurom;
dynamic_buffer dst(0x600000);
-
+
memcpy(&dst[0x000000], &src[0x1C0000], 0x040000);
memcpy(&dst[0x040000], &src[0x140000], 0x080000);
memcpy(&dst[0x0C0000], &src[0x100000], 0x040000);
@@ -573,22 +573,21 @@ void neoboot_prot_device::kof10th_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
dynamic_buffer dst(0x900000);
UINT8 *src = cpurom;
-
+
memcpy(&dst[0x000000], src + 0x700000, 0x100000); // Correct (Verified in Uni-bios)
memcpy(&dst[0x100000], src + 0x000000, 0x800000);
-
+
for (int i = 0; i < 0x900000; i++)
{
int j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0);
src[j] = dst[i];
}
-
+
// Altera protection chip patches these over P ROM
((UINT16*)src)[0x0124/2] = 0x000d; // Enables XOR for RAM moves, forces SoftDIPs, and USA region
((UINT16*)src)[0x0126/2] = 0xf7a8;
-
+
((UINT16*)src)[0x8bf4/2] = 0x4ef9; // Run code to change "S" data
((UINT16*)src)[0x8bf6/2] = 0x000d;
((UINT16*)src)[0x8bf8/2] = 0xf980;
}
-
diff --git a/src/devices/bus/neogeo/prot_misc.h b/src/devices/bus/neogeo/prot_misc.h
index 4549f50bea5..ba4681aa640 100644
--- a/src/devices/bus/neogeo/prot_misc.h
+++ b/src/devices/bus/neogeo/prot_misc.h
@@ -28,21 +28,21 @@ public:
void kf2k5uni_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
void kf2k5uni_sx_decrypt(UINT8* fixedrom, UINT32 fixedrom_size);
void kf2k5uni_mx_decrypt(UINT8* audiorom, UINT32 audiorom_size);
-
+
void decrypt_kof2k4se_68k(UINT8* cpurom, UINT32 cpurom_size);
-
+
void lans2004_vx_decrypt(UINT8* ymsndrom, UINT32 ymsndrom_size);
void lans2004_decrypt_68k(UINT8* cpurom, UINT32 cpurom_size);
-
+
void samsho5b_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
void samsho5b_vx_decrypt(UINT8* ymsndrom, UINT32 ymsndrom_size);
-
+
DECLARE_READ16_MEMBER(mslug5p_prot_r);
//DECLARE_WRITE16_MEMBER(ms5plus_bankswitch_w);
UINT32 mslug5p_bank_base(UINT16 sel);
void kog_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
-
+
void svcboot_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
void svcboot_cx_decrypt(UINT8*sprrom, UINT32 sprrom_size);
void svcplus_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
diff --git a/src/devices/bus/neogeo/prot_mslugx.cpp b/src/devices/bus/neogeo/prot_mslugx.cpp
index 7bb14bad1a4..e54007c4a2e 100644
--- a/src/devices/bus/neogeo/prot_mslugx.cpp
+++ b/src/devices/bus/neogeo/prot_mslugx.cpp
@@ -84,4 +84,3 @@ READ16_MEMBER( mslugx_prot_device::protection_r )
return res;
}
-
diff --git a/src/devices/bus/neogeo/prot_pvc.cpp b/src/devices/bus/neogeo/prot_pvc.cpp
index 9becf6bb094..1de3383d5a3 100644
--- a/src/devices/bus/neogeo/prot_pvc.cpp
+++ b/src/devices/bus/neogeo/prot_pvc.cpp
@@ -59,10 +59,10 @@ void pvc_prot_device::pvc_write_pack_color()
/*void pvc_prot_device::pvc_write_bankswitch()
{
- UINT32 bankaddress = ((m_cart_ram[0xff8] >> 8)|(m_cart_ram[0xff9] << 8));
- m_cart_ram[0xff8] = (m_cart_ram[0xff8] & 0xfe00) | 0x00a0;
- m_cart_ram[0xff9] &= 0x7fff;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress + 0x100000);
+ UINT32 bankaddress = ((m_cart_ram[0xff8] >> 8)|(m_cart_ram[0xff9] << 8));
+ m_cart_ram[0xff8] = (m_cart_ram[0xff8] & 0xfe00) | 0x00a0;
+ m_cart_ram[0xff9] &= 0x7fff;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress + 0x100000);
}
*/
@@ -87,8 +87,8 @@ WRITE16_MEMBER( pvc_prot_device::protection_w )
else if (offset >= 0xff4 && offset <= 0xff5)
pvc_write_pack_color();
// FIXME: temporarily moved to the driver, through get_bank_base() above
-// else if(offset >= 0xff8)
-// pvc_write_bankswitch(space);
+// else if(offset >= 0xff8)
+// pvc_write_bankswitch(space);
}
@@ -289,4 +289,3 @@ void pvc_prot_device::kof2003h_decrypt_68k(UINT8* rom, UINT32 size)
memcpy(&rom[0x100000], &buf[0x800000], 0x100000);
memcpy(&rom[0x200000], &buf[0x100000], 0x700000);
}
-
diff --git a/src/devices/bus/neogeo/prot_pvc.h b/src/devices/bus/neogeo/prot_pvc.h
index 5676d1660b5..e14983c197a 100644
--- a/src/devices/bus/neogeo/prot_pvc.h
+++ b/src/devices/bus/neogeo/prot_pvc.h
@@ -20,7 +20,7 @@ public:
void pvc_write_unpack_color();
void pvc_write_pack_color();
-// void pvc_write_bankswitch(address_space &space);
+// void pvc_write_bankswitch(address_space &space);
UINT32 get_bank_base();
DECLARE_READ16_MEMBER(protection_r);
DECLARE_WRITE16_MEMBER(protection_w);
diff --git a/src/devices/bus/neogeo/prot_sma.cpp b/src/devices/bus/neogeo/prot_sma.cpp
index f4a25600e5f..f18481d51be 100644
--- a/src/devices/bus/neogeo/prot_sma.cpp
+++ b/src/devices/bus/neogeo/prot_sma.cpp
@@ -215,7 +215,7 @@ UINT32 sma_prot_device::kof99_bank_base(UINT16 sel)
0x588800, 0x581800, 0x599800, 0x594800,
0x598000, /* rest not used? */
};
-
+
/* unscramble bank number */
int data =
(BIT(sel, 14) << 0)+
@@ -224,7 +224,7 @@ UINT32 sma_prot_device::kof99_bank_base(UINT16 sel)
(BIT(sel, 10) << 3)+
(BIT(sel, 12) << 4)+
(BIT(sel, 5) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -249,7 +249,7 @@ UINT32 sma_prot_device::garou_bank_base(UINT16 sel)
0x5d0000, 0x5d8000, 0x5e0000, 0x5e8000, // 48
0x5f0000, 0x5f8000, 0x600000, // rest not used?
};
-
+
// unscramble bank number
int data =
(BIT(sel, 5) << 0)+
@@ -258,7 +258,7 @@ UINT32 sma_prot_device::garou_bank_base(UINT16 sel)
(BIT(sel, 6) << 3)+
(BIT(sel, 14) << 4)+
(BIT(sel, 12) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -285,7 +285,7 @@ UINT32 sma_prot_device::garouh_bank_base(UINT16 sel)
0x000000, 0x000000, 0x000000, 0x000000, // 56
0x000000, 0x000000, 0x000000, 0x000000, // 60
};
-
+
// unscramble bank number
int data =
(BIT(sel, 4) << 0)+
@@ -294,7 +294,7 @@ UINT32 sma_prot_device::garouh_bank_base(UINT16 sel)
(BIT(sel, 2) << 3)+
(BIT(sel, 11) << 4)+
(BIT(sel, 13) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -318,7 +318,7 @@ UINT32 sma_prot_device::mslug3_bank_base(UINT16 sel)
0x460000, 0x470000, 0x4a0000, 0x4b0000, // 44
0x4c0000, // rest not used?
};
-
+
// unscramble bank number
int data =
(BIT(sel, 14) << 0)+
@@ -327,7 +327,7 @@ UINT32 sma_prot_device::mslug3_bank_base(UINT16 sel)
(BIT(sel, 6) << 3)+
(BIT(sel, 3) << 4)+
(BIT(sel, 9) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -347,7 +347,7 @@ UINT32 sma_prot_device::kof2000_bank_base(UINT16 sel)
0x52d000, 0x62d000, 0x52e800, 0x62e800, // 28
0x618000, 0x619000, 0x61a000, 0x61a800, // 32
};
-
+
// unscramble bank number
int data =
(BIT(sel, 15) << 0)+
@@ -356,7 +356,7 @@ UINT32 sma_prot_device::kof2000_bank_base(UINT16 sel)
(BIT(sel, 3) << 3)+
(BIT(sel, 10) << 4)+
(BIT(sel, 5) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -445,7 +445,7 @@ void sma_prot_device::garouh_decrypt_68k(UINT8* base)
{
// thanks to Razoola and Mr K for the info
UINT16 *rom = (UINT16 *)(base + 0x100000);
-
+
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = BITSWAP16(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6);
@@ -471,7 +471,7 @@ void sma_prot_device::mslug3_decrypt_68k(UINT8* base)
{
// thanks to Razoola and Mr K for the info
UINT16 *rom = (UINT16 *)(base + 0x100000);
-
+
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = BITSWAP16(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6);
@@ -497,7 +497,7 @@ void sma_prot_device::kof2000_decrypt_68k(UINT8* base)
{
// thanks to Razoola and Mr K for the info
UINT16 *rom = (UINT16 *)(base + 0x100000);
-
+
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = BITSWAP16(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4);
@@ -516,5 +516,3 @@ void sma_prot_device::kof2000_decrypt_68k(UINT8* base)
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
}
-
-
diff --git a/src/devices/bus/neogeo/pvc.cpp b/src/devices/bus/neogeo/pvc.cpp
index 6ad58cd4b9d..fbf2cc9b2d8 100644
--- a/src/devices/bus/neogeo/pvc.cpp
+++ b/src/devices/bus/neogeo/pvc.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
PVC encrypted cart type (+ CMC + PCM2)
diff --git a/src/devices/bus/neogeo/rom.cpp b/src/devices/bus/neogeo/rom.cpp
index 8cfd95419cd..9804ba89e2c 100644
--- a/src/devices/bus/neogeo/rom.cpp
+++ b/src/devices/bus/neogeo/rom.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Standard cart type, possibly with bankswitch in the area beyond 0x100000
(We also include here V-Liner, which uses a standard cart + RAM + some custom input)
@@ -85,4 +85,3 @@ void neogeo_vliner_cart::device_reset()
{
memset(m_cart_ram, 0, 0x2000);
}
-
diff --git a/src/devices/bus/neogeo/rom.h b/src/devices/bus/neogeo/rom.h
index f59dde03095..99609e2d198 100644
--- a/src/devices/bus/neogeo/rom.h
+++ b/src/devices/bus/neogeo/rom.h
@@ -39,15 +39,15 @@ class neogeo_vliner_cart : public neogeo_rom_device
{
public:
neogeo_vliner_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual DECLARE_READ16_MEMBER(ram_r) override { return m_cart_ram[offset]; }
virtual DECLARE_WRITE16_MEMBER(ram_w) override { COMBINE_DATA(&m_cart_ram[offset]); }
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual void device_start() override;
virtual void device_reset() override;
-
+
private:
UINT16 m_cart_ram[0x1000];
};
diff --git a/src/devices/bus/neogeo/sbp.cpp b/src/devices/bus/neogeo/sbp.cpp
index 78a5f35dc82..805aeff1214 100644
--- a/src/devices/bus/neogeo/sbp.cpp
+++ b/src/devices/bus/neogeo/sbp.cpp
@@ -1,13 +1,13 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Super Bubble Pop cart type
-
+
Note: since protection here involves accesses to ROM, we include the scrambling in this
file rather than in a separate prot_* source
-
+
***********************************************************************************************************/
@@ -75,7 +75,7 @@ void neogeo_sbp_cart::patch(UINT8* cpurom, UINT32 cpurom_size)
{
/* the game code clears the text overlay used ingame immediately after writing it.. why? protection? sloppy code that the hw ignores? imperfect emulation? */
UINT16* rom = (UINT16*)cpurom;
-
+
rom[0x2a6f8/2] = 0x4e71;
rom[0x2a6fa/2] = 0x4e71;
rom[0x2a6fc/2] = 0x4e71;
diff --git a/src/devices/bus/neogeo/sbp.h b/src/devices/bus/neogeo/sbp.h
index 147d3ae7a93..a46fef86ecf 100644
--- a/src/devices/bus/neogeo/sbp.h
+++ b/src/devices/bus/neogeo/sbp.h
@@ -16,13 +16,13 @@ class neogeo_sbp_cart : public neogeo_rom_device
{
public:
neogeo_sbp_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual void device_start() override;
virtual void device_reset() override;
virtual DECLARE_WRITE16_MEMBER(protection_w) override;
virtual DECLARE_READ16_MEMBER(protection_r) override;
-
+
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
diff --git a/src/devices/bus/neogeo/slot.cpp b/src/devices/bus/neogeo/slot.cpp
index b7ceb2d12cf..af2f151ee8d 100644
--- a/src/devices/bus/neogeo/slot.cpp
+++ b/src/devices/bus/neogeo/slot.cpp
@@ -3,7 +3,7 @@
/***********************************************************************************************************
SNK Neo Geo cartslot emulation
-
+
***********************************************************************************************************/
#include "slot.h"
@@ -44,15 +44,15 @@ UINT32 device_neogeo_cart_interface::get_region_mask(UINT8* rgn, UINT32 rgn_size
// get mask based on the length rounded up to the nearest power of 2
UINT32 mask = 0xffffffff;
UINT32 len = rgn_size;
-
+
for (UINT32 bit = 0x80000000; bit != 0; bit >>= 1)
{
if ((len * 2 - 1) & bit)
break;
-
+
mask >>= 1;
}
-
+
return mask;
}
@@ -64,7 +64,7 @@ void device_neogeo_cart_interface::optimize_sprites(UINT8* region_sprites, UINT3
m_sprites_opt.resize(spritegfx_address_mask + 1);
UINT8 *dest = &m_sprites_opt[0];
-
+
for (unsigned i = 0; i < region_sprites_size; i += 0x80, src += 0x80)
{
for (unsigned y = 0; y < 0x10; y++)
@@ -76,7 +76,7 @@ void device_neogeo_cart_interface::optimize_sprites(UINT8* region_sprites, UINT3
(((src[0x42 | (y << 2)] >> x) & 0x01) << 1) |
(((src[0x40 | (y << 2)] >> x) & 0x01) << 0);
}
-
+
for (unsigned x = 0; x < 8; x++)
{
*(dest++) = (((src[0x03 | (y << 2)] >> x) & 0x01) << 3) |
@@ -219,7 +219,7 @@ static int neogeo_get_pcb_id(const char *slot)
if (!core_stricmp(elem.slot_option, slot))
return elem.pcb_id;
}
-
+
return 0;
}
diff --git a/src/devices/bus/neogeo/slot.h b/src/devices/bus/neogeo/slot.h
index 3bb01d8c359..482e096272b 100644
--- a/src/devices/bus/neogeo/slot.h
+++ b/src/devices/bus/neogeo/slot.h
@@ -87,7 +87,7 @@ public:
// construction/destruction
device_neogeo_cart_interface(const machine_config &mconfig, device_t &device);
virtual ~device_neogeo_cart_interface();
-
+
// reading from ROM
virtual DECLARE_READ16_MEMBER(rom_r) { return 0xffff; }
virtual DECLARE_WRITE16_MEMBER(banksel_w) { };
@@ -102,7 +102,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) { };
virtual int get_fixed_bank_type(void) { return 0; }
-
+
void rom_alloc(UINT32 size) { m_rom.resize(size/sizeof(UINT16)); }
UINT16* get_rom_base() { return &m_rom[0]; }
UINT32 get_rom_size() { return m_rom.size() * sizeof(UINT16); }
@@ -114,19 +114,19 @@ public:
UINT32 get_fixed_size() { return m_fixed.size(); }
UINT8* get_region_fixed_base() { if (m_region_fixed.found()) return m_region_fixed->base(); return nullptr; }
UINT32 get_region_fixed_size() { if (m_region_fixed.found()) return m_region_fixed->bytes(); return 0; }
-
+
void audio_alloc(UINT32 size) { m_audio.resize(size); }
UINT8* get_audio_base() { return &m_audio[0]; }
UINT32 get_audio_size() { return m_audio.size(); }
UINT8* get_region_audio_base() { if (m_region_audio.found()) return m_region_audio->base(); return nullptr; }
UINT32 get_region_audio_size() { if (m_region_audio.found()) return m_region_audio->bytes(); return 0; }
-
+
void audiocrypt_alloc(UINT32 size) { m_audiocrypt.resize(size); }
UINT8* get_audiocrypt_base() { if (m_audiocrypt.size() == 0) return nullptr; else return &m_audiocrypt[0]; }
UINT32 get_audiocrypt_size() { return m_audiocrypt.size(); }
UINT8* get_region_audiocrypt_base() { if (m_region_audiocrypt.found()) return m_region_audiocrypt->base(); return nullptr; }
UINT32 get_region_audiocrypt_size() { if (m_region_audiocrypt.found()) return m_region_audiocrypt->bytes(); return 0; }
-
+
// TODO: review sprite code later!!
void sprites_alloc(UINT32 size) { m_sprites.resize(size); }
UINT8* get_sprites_base() { return &m_sprites[0]; }
@@ -139,7 +139,7 @@ public:
UINT32 get_ym_size() { return m_ym.size(); }
UINT8* get_region_ym_base() { if (m_region_ym.found()) return m_region_ym->base(); return nullptr; }
UINT32 get_region_ym_size() { if (m_region_ym.found()) return m_region_ym->bytes(); return 0; }
-
+
void ymdelta_alloc(UINT32 size) { m_ymdelta.resize(size); }
UINT8* get_ymdelta_base() { return &m_ymdelta[0]; }
UINT32 get_ymdelta_size() { return m_ymdelta.size(); }
@@ -172,7 +172,7 @@ protected:
optional_memory_region m_region_spr;
optional_memory_region m_region_ym;
optional_memory_region m_region_ymd;
-
+
UINT32 get_region_mask(UINT8* rgn, UINT32 rgn_size);
};
@@ -228,7 +228,7 @@ public:
}
return nullptr;
}
- UINT32 get_rom_size() {
+ UINT32 get_rom_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_rom_size(); else return m_cart->get_rom_size();
}
@@ -240,7 +240,7 @@ public:
}
return nullptr;
}
- UINT32 get_fixed_size() {
+ UINT32 get_fixed_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_fixed_size(); else return m_cart->get_fixed_size();
}
@@ -252,7 +252,7 @@ public:
}
return nullptr;
}
- UINT32 get_sprites_size() {
+ UINT32 get_sprites_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_sprites_size(); else return m_cart->get_sprites_size();
}
@@ -264,7 +264,7 @@ public:
}
return nullptr;
}
- UINT32 get_audio_size() {
+ UINT32 get_audio_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_audio_size(); else return m_cart->get_audio_size();
}
@@ -276,7 +276,7 @@ public:
}
return nullptr;
}
- UINT32 get_audiocrypt_size() {
+ UINT32 get_audiocrypt_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_audiocrypt_size(); else return m_cart->get_audiocrypt_size();
}
@@ -288,7 +288,7 @@ public:
}
return nullptr;
}
- UINT32 get_ym_size() {
+ UINT32 get_ym_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_ym_size(); else return m_cart->get_ym_size();
}
@@ -300,7 +300,7 @@ public:
}
return nullptr;
}
- UINT32 get_ymdelta_size() {
+ UINT32 get_ymdelta_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_ymdelta_size(); else return m_cart->get_ymdelta_size();
}
@@ -310,7 +310,7 @@ public:
UINT8* get_sprites_opt_base() {
if (m_cart) return m_cart->get_sprites_opt_base(); else return nullptr;
}
- UINT32 get_sprites_opt_size() {
+ UINT32 get_sprites_opt_size() {
if (m_cart) return m_cart->get_sprites_opt_size(); else return 0;
}
diff --git a/src/devices/bus/neogeo/sma.cpp b/src/devices/bus/neogeo/sma.cpp
index e3f230d9412..d63d3b2bfbf 100644
--- a/src/devices/bus/neogeo/sma.cpp
+++ b/src/devices/bus/neogeo/sma.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
SMA encrypted cart type (+ CMC42 or CMC50)
@@ -149,4 +149,3 @@ void neogeo_sma_kof2000_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2000_GFX_KEY);
m_cmc_prot->sfix_decrypt(spr_region, spr_region_size, fix_region, fix_region_size);
}
-
diff --git a/src/devices/bus/nes/mmc3_clones.cpp b/src/devices/bus/nes/mmc3_clones.cpp
index d8dfa349c6f..72fde58282f 100644
--- a/src/devices/bus/nes/mmc3_clones.cpp
+++ b/src/devices/bus/nes/mmc3_clones.cpp
@@ -2502,13 +2502,13 @@ WRITE8_MEMBER(nes_pjoy84_device::write_m)
}
/*-------------------------------------------------
-
+
COOLBOY
-
+
Games: several multigame carts
-
+
In MESS: Not Supported.
-
+
-------------------------------------------------*/
void nes_coolboy_device::prg_cb(int start, int bank)
@@ -2526,7 +2526,7 @@ void nes_coolboy_device::chr_cb(int start, int bank, int source)
WRITE8_MEMBER(nes_coolboy_device::write_m)
{
LOG_MMC(("coolboy write_m, offset: %04x, data: %02x\n", offset, data));
-
+
m_reg[offset & 0x03] = data;
//set_base_mask();
set_chr(m_chr_source, m_chr_base, m_chr_mask);
diff --git a/src/devices/bus/nes/mmc3_clones.h b/src/devices/bus/nes/mmc3_clones.h
index 4143e88bca7..e6878d9d461 100644
--- a/src/devices/bus/nes/mmc3_clones.h
+++ b/src/devices/bus/nes/mmc3_clones.h
@@ -661,17 +661,17 @@ class nes_coolboy_device : public nes_txrom_device
public:
// construction/destruction
nes_coolboy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
-// virtual void device_start() override;
+// virtual void device_start() override;
virtual DECLARE_WRITE8_MEMBER(write_m) override;
virtual void prg_cb(int start, int bank) override;
virtual void chr_cb(int start, int bank, int source) override;
-
-// virtual void pcb_reset() override;
-
+
+// virtual void pcb_reset() override;
+
private:
-// inline void set_base_mask();
+// inline void set_base_mask();
UINT8 m_reg[4];
};
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index c48bb990f82..193512feb88 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -1070,7 +1070,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_TZCNT, 4, 0): // TZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_TZCNT, 4, 0): // TZCNT dst,src
PARAM0 = tzcount32(PARAM1);
break;
@@ -1689,7 +1689,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_TZCNT, 8, 0): // DTZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_TZCNT, 8, 0): // DTZCNT dst,src
DPARAM0 = tzcount64(DPARAM1);
break;
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index 39863b42f15..b6a5e67732b 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -4303,7 +4303,7 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_add_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
+ emit_add_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
@@ -4331,7 +4331,7 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_add_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
+ emit_add_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && inst.flags() == 0)
@@ -5216,7 +5216,7 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_or_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
+ emit_or_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
// general case
else
@@ -5236,7 +5236,7 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_or_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
+ emit_or_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
// general case
else
@@ -5278,11 +5278,11 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_xor_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
+ emit_xor_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
// dstp == src1p register
else if (dstp.is_int_register() && dstp == src1p)
- emit_xor_r32_p32(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
+ emit_xor_r32_p32(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
// general case
else
@@ -5302,11 +5302,11 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_xor_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
+ emit_xor_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
// dstp == src1p register
else if (dstp.is_int_register() && dstp == src1p)
- emit_xor_r64_p64(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
+ emit_xor_r64_p64(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
// general case
else
@@ -5374,16 +5374,16 @@ void drcbe_x64::op_tzcnt(x86code *&dst, const instruction &inst)
// normalize parameters
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
- be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
// 32-bit form
if (inst.size() == 4)
{
int dstreg = dstp.select_register(REG_EAX);
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -5391,11 +5391,11 @@ void drcbe_x64::op_tzcnt(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
int dstreg = dstp.select_register(REG_RAX);
- emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_r64_imm(dst, REG_RCX, 64); // mov rcx,64
- emit_bsf_r64_r64(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_r64_imm(dst, REG_RCX, 64); // mov rcx,64
+ emit_bsf_r64_r64(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
diff --git a/src/devices/cpu/drcbex86.cpp b/src/devices/cpu/drcbex86.cpp
index 2613028d03b..e4d40ecfd0e 100644
--- a/src/devices/cpu/drcbex86.cpp
+++ b/src/devices/cpu/drcbex86.cpp
@@ -5492,31 +5492,31 @@ void drcbe_x86::op_tzcnt(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
int dstreg = dstp.select_register(REG_EAX);
-
+
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
emit_link skip;
- emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, REG_EDX); // bsf dstreg,edx
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_add_r32_imm(dst, dstreg, 32); // add dstreg,32
- track_resolve_link(dst, skip); // skip:
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, REG_EDX); // bsf dstreg,edx
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_add_r32_imm(dst, dstreg, 32); // add dstreg,32
+ track_resolve_link(dst, skip); // skip:
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
}
}
diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp
index a92143e5680..bd53761bb6a 100644
--- a/src/devices/cpu/h8/h8.cpp
+++ b/src/devices/cpu/h8/h8.cpp
@@ -146,9 +146,9 @@ void h8_device::set_current_dma(h8_dma_state *state)
logerror("DMA done\n");
else
logerror("New current dma s=%x d=%x is=%d id=%d count=%x m=%d\n",
- state->source, state->dest, state->incs, state->incd,
- state->count, state->mode_16 ? 16 : 8);
-
+ state->source, state->dest, state->incs, state->incd,
+ state->count, state->mode_16 ? 16 : 8);
+
}
void h8_device::set_current_dtc(h8_dtc_state *state)
diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp
index 637e1a98b5c..fb907ffcef1 100644
--- a/src/devices/cpu/h8/h8_dma.cpp
+++ b/src/devices/cpu/h8/h8_dma.cpp
@@ -277,7 +277,7 @@ bool h8_dma_channel_device::start_test(int vector)
if(dte == 0)
return false;
- throw emu_fatalerror("%s: DMA startup test in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA startup test in short address mode unimplemented.\n", tag());
}
}
@@ -297,7 +297,7 @@ void h8_dma_channel_device::start(int submodule)
cpu->set_current_dma(state + submodule);
}
} else {
- throw emu_fatalerror("%s: DMA start in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA start in short address mode unimplemented.\n", tag());
}
}
@@ -315,6 +315,6 @@ void h8_dma_channel_device::count_done(int submodule)
throw emu_fatalerror("%s: DMA end-of-transfer interrupt in full address/normal mode unimplemented.\n", tag());
}
} else {
- throw emu_fatalerror("%s: DMA count done in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA count done in short address mode unimplemented.\n", tag());
}
}
diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h
index e241fb5653e..c561f15aea8 100644
--- a/src/devices/cpu/h8/h8_dma.h
+++ b/src/devices/cpu/h8/h8_dma.h
@@ -25,7 +25,7 @@ struct h8_dma_state {
#define MCFG_H8_DMA_ADD( _tag ) \
MCFG_DEVICE_ADD( _tag, H8_DMA, 0 )
-#define MCFG_H8_DMA_CHANNEL_ADD( _tag, intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf ) \
+#define MCFG_H8_DMA_CHANNEL_ADD( _tag, intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf ) \
MCFG_DEVICE_ADD( _tag, H8_DMA_CHANNEL, 0 ) \
downcast<h8_dma_channel_device *>(device)->set_info(intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf);
diff --git a/src/devices/cpu/h8/h8_dtc.cpp b/src/devices/cpu/h8/h8_dtc.cpp
index 0efb6200a54..12cd8155773 100644
--- a/src/devices/cpu/h8/h8_dtc.cpp
+++ b/src/devices/cpu/h8/h8_dtc.cpp
@@ -131,7 +131,7 @@ void h8_dtc_device::vector_done(int vector)
UINT32 mode = sra & 0x0c000000;
if(V>=1) logerror("regs at %08x sra=%08x dar=%08x cr=%08x %s mode\n", state->base, sra, dar, cr,
- mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
+ mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
state->incs = sra & 0x80000000 ?
sra & 0x40000000 ? sra & 0x01000000 ? -2 : -1 :
sra & 0x01000000 ? 2 : 1 :
@@ -140,7 +140,7 @@ void h8_dtc_device::vector_done(int vector)
sra & 0x10000000 ? sra & 0x01000000 ? -2 : -1 :
sra & 0x01000000 ? 2 : 1 :
0;
-
+
switch(mode) {
case 0x00000000: case 0x0c0000000:
state->count = 1;
@@ -215,7 +215,7 @@ bool h8_dtc_device::trigger_dtc(int vector)
{
int slot = vector_to_enable[vector];
if(slot == -1)
- return false;
+ return false;
if(dtcer[slot >> 3] & (0x01 << (7-(slot & 7)))) {
edge(vector);
return true;
@@ -266,4 +266,3 @@ void h8_dtc_device::count_done(int id)
cpu->request_state(h8_device::STATE_DTC_WRITEBACK);
waiting_writeback.push_back(id);
}
-
diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp
index e4806fa4138..e07cca2722b 100644
--- a/src/devices/cpu/h8/h8_sci.cpp
+++ b/src/devices/cpu/h8/h8_sci.cpp
@@ -44,13 +44,13 @@ WRITE8_MEMBER(h8_sci_device::smr_w)
{
smr = data;
if(V>=2) logerror("smr_w %02x %s %c%c%c%s /%d (%06x)\n", data,
- data & SMR_CA ? "sync" : "async",
- data & SMR_CHR ? '7' : '8',
- data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
- data & SMR_STOP ? '2' : '1',
- data & SMR_MP ? " mp" : "",
- 1 << 2*(data & SMR_CKS),
- cpu->pc());
+ data & SMR_CA ? "sync" : "async",
+ data & SMR_CHR ? '7' : '8',
+ data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
+ data & SMR_STOP ? '2' : '1',
+ data & SMR_MP ? " mp" : "",
+ 1 << 2*(data & SMR_CKS),
+ cpu->pc());
clock_update();
}
@@ -86,14 +86,14 @@ bool h8_sci_device::has_recv_error() const
WRITE8_MEMBER(h8_sci_device::scr_w)
{
if(V>=2) logerror("scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data,
- data & SCR_TIE ? " txi" : "",
- data & SCR_RIE ? " rxi" : "",
- data & SCR_TE ? " tx" : "",
- data & SCR_RE ? " rx" : "",
- data & SCR_MPIE ? " mpi" : "",
- data & SCR_TEIE ? " tei" : "",
- data & SCR_CKE,
- cpu->pc());
+ data & SCR_TIE ? " txi" : "",
+ data & SCR_RIE ? " rxi" : "",
+ data & SCR_TE ? " tx" : "",
+ data & SCR_RE ? " rx" : "",
+ data & SCR_MPIE ? " mpi" : "",
+ data & SCR_TEIE ? " tei" : "",
+ data & SCR_CKE,
+ cpu->pc());
UINT8 delta = scr ^ data;
scr = data;
diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp
index 4c7bec631a5..796a26c0fef 100644
--- a/src/devices/cpu/h8/h8_timer16.cpp
+++ b/src/devices/cpu/h8/h8_timer16.cpp
@@ -103,13 +103,13 @@ WRITE8_MEMBER(h8_timer16_channel_device::tier_w)
tier = data;
tier_update();
if(V>=1) logerror("irq %c%c%c%c%c%c trigger=%d\n",
- ier & IRQ_A ? 'a' : '.',
- ier & IRQ_B ? 'b' : '.',
- ier & IRQ_C ? 'c' : '.',
- ier & IRQ_D ? 'd' : '.',
- ier & IRQ_V ? 'v' : '.',
- ier & IRQ_U ? 'u' : '.',
- ier & IRQ_TRIG ? 1 : 0);
+ ier & IRQ_A ? 'a' : '.',
+ ier & IRQ_B ? 'b' : '.',
+ ier & IRQ_C ? 'c' : '.',
+ ier & IRQ_D ? 'd' : '.',
+ ier & IRQ_V ? 'v' : '.',
+ ier & IRQ_U ? 'u' : '.',
+ ier & IRQ_TRIG ? 1 : 0);
recalc_event();
}
diff --git a/src/devices/cpu/h8/h8_timer8.cpp b/src/devices/cpu/h8/h8_timer8.cpp
index 0b9d5da933c..671170e1cab 100644
--- a/src/devices/cpu/h8/h8_timer8.cpp
+++ b/src/devices/cpu/h8/h8_timer8.cpp
@@ -130,9 +130,9 @@ void h8_timer8_channel_device::update_tcr()
}
if(V>=1) p += sprintf(p, ", irq=%c%c%c\n",
- tcr & TCR_CMIEB ? 'b' : '-',
- tcr & TCR_CMIEA ? 'a' : '-',
- tcr & TCR_OVIE ? 'o' : '-');
+ tcr & TCR_CMIEB ? 'b' : '-',
+ tcr & TCR_CMIEA ? 'a' : '-',
+ tcr & TCR_OVIE ? 'o' : '-');
logerror(buf);
}
diff --git a/src/devices/cpu/h8/h8_watchdog.cpp b/src/devices/cpu/h8/h8_watchdog.cpp
index 91c097b8db1..19d9131819a 100644
--- a/src/devices/cpu/h8/h8_watchdog.cpp
+++ b/src/devices/cpu/h8/h8_watchdog.cpp
@@ -27,7 +27,7 @@ UINT64 h8_watchdog_device::internal_update(UINT64 current_time)
int shift = (type == S ? div_s : div_bh)[tcsr & TCSR_CKS];
UINT64 spos = tcnt_cycle_base >> shift;
return (spos + 0x100 - tcnt) << shift;
-
+
} else
return 0;
}
@@ -44,7 +44,7 @@ void h8_watchdog_device::tcnt_update(UINT64 cur_time)
int next_tcnt = tcnt + int(epos - spos);
tcnt = next_tcnt;
tcnt_cycle_base = cur_time;
- // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, tcnt, next_tcnt, shift);
+ // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, tcnt, next_tcnt, shift);
if(next_tcnt >= 0x100) {
logerror("watchdog triggered\n");
@@ -57,7 +57,7 @@ void h8_watchdog_device::tcnt_update(UINT64 cur_time)
if(!(tcsr & TCSR_OVF)) {
tcsr |= TCSR_OVF;
intc->internal_interrupt(irq);
- }
+ }
}
}
} else
@@ -91,7 +91,7 @@ WRITE16_MEMBER(h8_watchdog_device::wd_w)
if(tcsr & TCSR_TME) {
tcnt = data & 0xff;
tcnt_cycle_base = cpu->total_cycles();
- // logerror("%10lld tcnt = %02x\n", tcnt_cycle_base, tcnt);
+ // logerror("%10lld tcnt = %02x\n", tcnt_cycle_base, tcnt);
}
cpu->internal_update();
}
diff --git a/src/devices/cpu/h8/h8_watchdog.h b/src/devices/cpu/h8/h8_watchdog.h
index d5c0d5d21a1..efb77b29c05 100644
--- a/src/devices/cpu/h8/h8_watchdog.h
+++ b/src/devices/cpu/h8/h8_watchdog.h
@@ -43,7 +43,7 @@
#include "h8.h"
#include "h8_intc.h"
-#define MCFG_H8_WATCHDOG_ADD( _tag, intc, irq, type ) \
+#define MCFG_H8_WATCHDOG_ADD( _tag, intc, irq, type ) \
MCFG_DEVICE_ADD( _tag, H8_WATCHDOG, 0 ) \
downcast<h8_watchdog_device *>(device)->set_info(intc, irq, type);
diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp
index 5c731378093..52b3c405c87 100644
--- a/src/devices/cpu/hphybrid/hphybrid.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid.cpp
@@ -133,7 +133,7 @@ WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w)
UINT8 hp_hybrid_cpu_device::pa_r(void) const
{
- return CURRENT_PA;
+ return CURRENT_PA;
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth)
@@ -1092,7 +1092,7 @@ void hp_hybrid_cpu_device::handle_dma(void)
m_icount -= 9;
}
- // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
+ // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h
index aeb5de6586b..c34d6f0b252 100644
--- a/src/devices/cpu/hphybrid/hphybrid.h
+++ b/src/devices/cpu/hphybrid/hphybrid.h
@@ -87,7 +87,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
- UINT8 pa_r(void) const;
+ UINT8 pa_r(void) const;
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h
index c1649f406be..aecbd041557 100644
--- a/src/devices/cpu/tms1000/tms1k_base.h
+++ b/src/devices/cpu/tms1000/tms1k_base.h
@@ -110,7 +110,7 @@ public:
template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_write_r.set_callback(object); }
template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_power_off.set_callback(object); }
static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1k_base_device &>(device).m_output_pla_table = output_pla; }
-
+
UINT8 debug_peek_o_index() { return m_o_index; } // get output PLA index, for debugging (don't use in emulation)
// microinstructions
diff --git a/src/devices/machine/gen_latch.h b/src/devices/machine/gen_latch.h
index 8696353fff4..07938a7b5d9 100644
--- a/src/devices/machine/gen_latch.h
+++ b/src/devices/machine/gen_latch.h
@@ -40,7 +40,7 @@ public:
DECLARE_WRITE8_MEMBER( clear_w );
DECLARE_WRITE_LINE_MEMBER( preset_w );
DECLARE_WRITE_LINE_MEMBER( clear_w );
-
+
void preset_w(UINT16 value) { m_latched_value = value; }
protected:
diff --git a/src/devices/machine/gt64xxx.cpp b/src/devices/machine/gt64xxx.cpp
index a92326f3c4a..263024010c8 100644
--- a/src/devices/machine/gt64xxx.cpp
+++ b/src/devices/machine/gt64xxx.cpp
@@ -241,7 +241,7 @@ void gt64xxx_device::map_cpu_space()
dma_addr_map[index].low_addr = (m_reg[GREG_PCI_MEM1_LO] << 21);
dma_addr_map[index].high_addr = (dma_addr_map[index].low_addr & 0xf0000000) | (m_reg[GREG_PCI_MEM1_HI] << 21) | 0x1fffff;
}
-
+
switch (index) {
case proc_addr_bank::ADDR_PCI_IO:
dma_addr_map[index].space = &this->space(AS_IO);
@@ -262,7 +262,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
{
int ramIndex;
UINT32 winStart, winEnd, winSize;
-
+
// Not sure if GREG_RAS_1_0_LO should be added on PCI address map side.
// RAS0
ramIndex = 0;
@@ -273,7 +273,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
memory_space->install_write_handler(winStart, winEnd, 0, 0, write32_delegate(FUNC(gt64xxx_device::ras_0_w), this));
if (LOG_GALILEO)
logerror("%s: map_extra RAS0 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize);
-
+
// RAS1
ramIndex = 1;
winStart = (m_reg[GREG_RAS_1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20);
@@ -283,7 +283,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
memory_space->install_write_handler(winStart, winEnd, 0, 0, write32_delegate(FUNC(gt64xxx_device::ras_1_w), this));
if (LOG_GALILEO)
logerror("%s: map_extra RAS1 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize);
-
+
// RAS2
ramIndex = 2;
winStart = (m_reg[GREG_RAS_1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20);
@@ -293,7 +293,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
memory_space->install_write_handler(winStart, winEnd, 0, 0, write32_delegate(FUNC(gt64xxx_device::ras_2_w), this));
if (LOG_GALILEO)
logerror("%s: map_extra RAS2 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize);
-
+
// RAS3
ramIndex = 3;
winStart = (m_reg[GREG_RAS_1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20);
@@ -818,7 +818,7 @@ TIMER_CALLBACK_MEMBER (gt64xxx_device::perform_dma)
which = (m_last_dma + i) % 4;
if ((m_dma_active & (1 << which)) && (m_reg[GREG_DMA0_CONTROL + which] & 0x1000))
break;
-
+
}
// Save which dma is processed for arbitration next time
m_last_dma = which;
diff --git a/src/devices/machine/gt64xxx.h b/src/devices/machine/gt64xxx.h
index 69cde74d34b..6433dcbabde 100644
--- a/src/devices/machine/gt64xxx.h
+++ b/src/devices/machine/gt64xxx.h
@@ -47,7 +47,7 @@
#define TIMER_PERIOD attotime::from_hz(m_clock)
#define PCI_BUS_CLOCK 33000000
// Number of dma words to transfer at a time, real hardware configurable between 8-32
-#define DMA_BURST_SIZE 32
+#define DMA_BURST_SIZE 32
#define DMA_TIMER_PERIOD attotime::from_hz(PCI_BUS_CLOCK / 48)
/* Galileo registers - 0x000-0x3ff */
diff --git a/src/devices/machine/pci-ide.h b/src/devices/machine/pci-ide.h
index 349173ae590..7768a7a44cd 100644
--- a/src/devices/machine/pci-ide.h
+++ b/src/devices/machine/pci-ide.h
@@ -8,7 +8,7 @@ Generic PCI IDE controller implementation.
Based on datasheet for National Semiconductor PC87415
TODO:
- Add pci configuration write to PIF byte
+ Add pci configuration write to PIF byte
***************************************************************************/
#ifndef PCI_IDE_H
diff --git a/src/devices/machine/stvcd.h b/src/devices/machine/stvcd.h
index 7e75fe11255..165407d736e 100644
--- a/src/devices/machine/stvcd.h
+++ b/src/devices/machine/stvcd.h
@@ -1,3 +1,2 @@
// license:LGPL-2.1+
// copyright-holders:Angelo Salese, R. Belmont
-
diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h
index bf2ed1fd153..ce7a3f11e92 100644
--- a/src/devices/machine/vrc4373.h
+++ b/src/devices/machine/vrc4373.h
@@ -50,7 +50,7 @@
#define PCI_BUS_CLOCK 33000000
// Number of dma words to transfer at a time, real hardware bursts 8
-#define DMA_BURST_SIZE 128
+#define DMA_BURST_SIZE 128
#define DMA_TIMER_PERIOD attotime::from_hz(PCI_BUS_CLOCK / 32)
#define DMA_BUSY 0x80000000
diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp
index f49b7e9363d..5c3c76abba6 100644
--- a/src/devices/machine/z80scc.cpp
+++ b/src/devices/machine/z80scc.cpp
@@ -27,10 +27,10 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC
p 5-8 bit per char Y Y Y Y
p 1,1.5,2 stop bits Y Y Y Y
x odd/even parity Y Y Y Y
- x x1,x16,x32,x64 Y Y Y Y
+ x x1,x16,x32,x64 Y Y Y Y
p break det/gen Y Y Y Y
x parity, framing & Y Y Y Y
- overrun error det
+ overrun error det
-- byte oriented synchrounous features -------------------------------
Int/ext char sync Y Y Y Y
1/2 synch chars Y Y Y Y
@@ -81,7 +81,7 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC
#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define LOGR(x)
+#define LOGR(x)
#if VERBOSE == 2
#define logerror printf
#endif
@@ -692,7 +692,7 @@ z80scc_channel::z80scc_channel(const machine_config &mconfig, const char *tag, d
m_dtr(0),
m_rts(0),
m_sync(0)
-#if START_BIT_HUNT
+#if START_BIT_HUNT
,m_rcv_mode(RCV_IDLE)
#endif
{
@@ -854,9 +854,9 @@ void z80scc_channel::device_timer(emu_timer &timer, device_timer_id id, int para
//int brconst = m_wr13 << 8 | m_wr12 | 1; // If the counter is 1 the effect is passthrough ehh?! To avoid div0...
if (m_wr14 & WR14_BRG_ENABLE)
{
- // int rate = m_owner->clock() / brconst;
- // attotime attorate = attotime::from_hz(rate);
- // timer.adjust(attorate, id, attorate);
+ // int rate = m_owner->clock() / brconst;
+ // attotime attorate = attotime::from_hz(rate);
+ // timer.adjust(attorate, id, attorate);
txc_w(m_brg_counter & 1);
rxc_w(m_brg_counter & 1);
m_brg_counter++; // Will just keep track of state in timer mode, not hardware counter value.
@@ -869,11 +869,11 @@ void z80scc_channel::device_timer(emu_timer &timer, device_timer_id id, int para
}
break;
default:
- logerror("Spurious timer %d event\n", id);
+ logerror("Spurious timer %d event\n", id);
}
#else
// TODO: Hmmm, either the above default clause is called OR the bellow call is not needed since we handled our local event anyway...?!
- // and the above default is not called unless we implement the BRG timer using diserial timer interfaces...
+ // and the above default is not called unless we implement the BRG timer using diserial timer interfaces...
device_serial_interface::device_timer(timer, id, param, ptr);
#endif
}
@@ -1131,7 +1131,7 @@ int z80scc_channel::get_tx_word_length()
* Break/Abort latch. */
UINT8 z80scc_channel::do_sccreg_rr0()
{
- LOGR(("%s %s <- %02x\n",tag(), FUNCNAME, m_rr0));
+ LOGR(("%s %s <- %02x\n",tag(), FUNCNAME, m_rr0));
return m_rr0;
}
@@ -1836,7 +1836,7 @@ void z80scc_channel::do_sccreg_wr14(UINT8 data)
if ( !(m_wr14 & WR14_BRG_ENABLE) && (data & WR14_BRG_ENABLE) ) // baud rate generator beeing enabled?
{
LOG(("\"%s\": %c : %s Mics Control Bits Baudrate generator enabled with \n", m_owner->tag(), 'A' + m_index, FUNCNAME));
- m_brg_const = 2 + (m_wr13 << 8 | m_wr12);
+ m_brg_const = 2 + (m_wr13 << 8 | m_wr12);
if (data & WR14_BRG_SOURCE) // Do we use the PCLK as baudrate source
{
int rate = m_owner->clock() / (m_brg_const == 0 ? 1 : m_brg_const);
@@ -1999,7 +1999,7 @@ UINT8 z80scc_channel::data_read()
// trigger interrup and lock the fifo if an error is present
if (m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR))
{
- logerror("Rx Error %02x\n", m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR));
+ logerror("Rx Error %02x\n", m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR));
switch (m_wr1 & WR1_RX_INT_MODE_MASK)
{
case WR1_RX_INT_FIRST:
@@ -2074,7 +2074,7 @@ void z80scc_channel::data_write(UINT8 data)
if ((m_wr5 & WR5_TX_ENABLE) && is_transmit_register_empty())
{
- LOG(("%s(%02x) \"%s\": %c : Transmit Data Byte '%02x' %c\n", FUNCNAME, data, m_owner->tag(), 'A' + m_index, m_tx_data, m_tx_data));
+ LOG(("%s(%02x) \"%s\": %c : Transmit Data Byte '%02x' %c\n", FUNCNAME, data, m_owner->tag(), 'A' + m_index, m_tx_data, m_tx_data));
transmit_register_setup(m_tx_data);
// empty transmit buffer
@@ -2103,7 +2103,7 @@ void z80scc_channel::receive_data(UINT8 data)
{
LOG(("\"%s\": %c : Receive Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, data));
- if (m_rx_fifo_wp + 1 == m_rx_fifo_rp || ( (m_rx_fifo_wp + 1 == m_rx_fifo_sz) && (m_rx_fifo_rp == 0) ))
+ if (m_rx_fifo_wp + 1 == m_rx_fifo_rp || ( (m_rx_fifo_wp + 1 == m_rx_fifo_sz) && (m_rx_fifo_rp == 0) ))
{
// receive overrun error detected
m_rx_error_fifo[m_rx_fifo_wp] |= RR1_RX_OVERRUN_ERROR; // = m_rx_error;
@@ -2308,7 +2308,7 @@ WRITE_LINE_MEMBER( z80scc_channel::rxc_w )
rx_clock_w(state);
else if(state)
{
- if (m_rx_clock == clocks/2 && m_rcv_mode == RCV_SAMPLING)
+ if (m_rx_clock == clocks/2 && m_rcv_mode == RCV_SAMPLING)
rx_clock_w(m_rx_clock < clocks/2);
m_rx_clock++;
@@ -2359,8 +2359,8 @@ void z80scc_channel::update_serial()
else
parity = PARITY_NONE;
- LOG((LLFORMAT " %s() \"%s \"Channel %c setting data frame %d+%d%c%d\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, 1,
- data_bit_count, parity == PARITY_NONE ? 'N' : parity == PARITY_EVEN ? 'E' : 'O', (stop_bits + 1) / 2));
+ LOG((LLFORMAT " %s() \"%s \"Channel %c setting data frame %d+%d%c%d\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, 1,
+ data_bit_count, parity == PARITY_NONE ? 'N' : parity == PARITY_EVEN ? 'E' : 'O', (stop_bits + 1) / 2));
set_data_frame(1, data_bit_count, parity, stop_bits);
#if START_BIT_HUNT
diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h
index cc20c783bdf..e754a3dd544 100644
--- a/src/devices/machine/z80scc.h
+++ b/src/devices/machine/z80scc.h
@@ -229,7 +229,7 @@ public:
UINT8 m_rr6; // REG_RR6_LSB_OR_RR2
UINT8 m_rr7; // REG_RR7_MSB_OR_RR3
UINT8 m_rr8; // REG_RR8_RECEIVE_DATA
- UINT8 m_rr9; // REG_RR9_WR3_OR_RR13
+ UINT8 m_rr9; // REG_RR9_WR3_OR_RR13
UINT8 m_rr10; // REG_RR10_MISC_STATUS
UINT8 m_rr11; // REG_RR11_WR10_OR_RR15
UINT8 m_rr12; // REG_RR12_LO_TIME_CONST
@@ -274,239 +274,239 @@ protected:
// Read registers
enum
{
- REG_RR0_STATUS = 0,
- REG_RR1_SPEC_RCV_COND = 1,
- REG_RR2_INTERRUPT_VECT = 2,
- REG_RR3_INTERUPPT_PEND = 3,
- REG_RR4_WR4_OR_RR0 = 4,
- REG_RR5_WR5_OR_RR0 = 5,
- REG_RR6_LSB_OR_RR2 = 6,
- REG_RR7_MSB_OR_RR3 = 7,
- REG_RR8_RECEIVE_DATA = 8,
- REG_RR9_WR3_OR_RR13 = 9,
- REG_RR10_MISC_STATUS = 10,
- REG_RR11_WR10_OR_RR15 = 11,
- REG_RR12_LO_TIME_CONST = 12,
- REG_RR13_HI_TIME_CONST = 13,
- REG_RR14_WR7_OR_R10 = 14,
- REG_RR15_WR15_EXT_STAT = 15
+ REG_RR0_STATUS = 0,
+ REG_RR1_SPEC_RCV_COND = 1,
+ REG_RR2_INTERRUPT_VECT = 2,
+ REG_RR3_INTERUPPT_PEND = 3,
+ REG_RR4_WR4_OR_RR0 = 4,
+ REG_RR5_WR5_OR_RR0 = 5,
+ REG_RR6_LSB_OR_RR2 = 6,
+ REG_RR7_MSB_OR_RR3 = 7,
+ REG_RR8_RECEIVE_DATA = 8,
+ REG_RR9_WR3_OR_RR13 = 9,
+ REG_RR10_MISC_STATUS = 10,
+ REG_RR11_WR10_OR_RR15 = 11,
+ REG_RR12_LO_TIME_CONST = 12,
+ REG_RR13_HI_TIME_CONST = 13,
+ REG_RR14_WR7_OR_R10 = 14,
+ REG_RR15_WR15_EXT_STAT = 15
};
// Write registers
enum
{
- REG_WR0_COMMAND_REGPT = 0,
- REG_WR1_INT_DMA_ENABLE = 1,
- REG_WR2_INT_VECTOR = 2,
- REG_WR3_RX_CONTROL = 3,
- REG_WR4_RX_TX_MODES = 4,
- REG_WR5_TX_CONTROL = 5,
- REG_WR6_SYNC_OR_SDLC_A = 6,
- REG_WR7_SYNC_OR_SDLC_F = 7,
- REG_WR8_TRANSMIT_DATA = 8,
+ REG_WR0_COMMAND_REGPT = 0,
+ REG_WR1_INT_DMA_ENABLE = 1,
+ REG_WR2_INT_VECTOR = 2,
+ REG_WR3_RX_CONTROL = 3,
+ REG_WR4_RX_TX_MODES = 4,
+ REG_WR5_TX_CONTROL = 5,
+ REG_WR6_SYNC_OR_SDLC_A = 6,
+ REG_WR7_SYNC_OR_SDLC_F = 7,
+ REG_WR8_TRANSMIT_DATA = 8,
REG_WR9_MASTER_INT_CTRL = 9,
REG_WR10_MSC_RX_TX_CTRL = 10,
- REG_WR11_CLOCK_MODES = 11,
- REG_WR12_LO_BAUD_GEN = 12,
- REG_WR13_HI_BAUD_GEN = 13,
- REG_WR14_MISC_CTRL = 14,
+ REG_WR11_CLOCK_MODES = 11,
+ REG_WR12_LO_BAUD_GEN = 12,
+ REG_WR13_HI_BAUD_GEN = 13,
+ REG_WR14_MISC_CTRL = 14,
REG_WR15_EXT_ST_INT_CTRL= 15
};
enum
{
- RR0_RX_CHAR_AVAILABLE = 0x01, // SIO bit
- RR0_ZC = 0x02, // SCC bit
- RR0_TX_BUFFER_EMPTY = 0x04, // SIO
- RR0_DCD = 0x08, // SIO
- RR0_RI = 0x10, // DART bit? TODO: investigate function and remove
- RR0_SYNC_HUNT = 0x10, // SIO bit, not supported
- RR0_CTS = 0x20, // SIO bit
- RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported
- RR0_BREAK_ABORT = 0x80 // SIO bit, not supported
+ RR0_RX_CHAR_AVAILABLE = 0x01, // SIO bit
+ RR0_ZC = 0x02, // SCC bit
+ RR0_TX_BUFFER_EMPTY = 0x04, // SIO
+ RR0_DCD = 0x08, // SIO
+ RR0_RI = 0x10, // DART bit? TODO: investigate function and remove
+ RR0_SYNC_HUNT = 0x10, // SIO bit, not supported
+ RR0_CTS = 0x20, // SIO bit
+ RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported
+ RR0_BREAK_ABORT = 0x80 // SIO bit, not supported
};
enum
{
- RR1_ALL_SENT = 0x01, // SIO/SCC bit
- RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported
- RR1_PARITY_ERROR = 0x10, // SIO/SCC bits
- RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits
- RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits
- RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported
+ RR1_ALL_SENT = 0x01, // SIO/SCC bit
+ RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported
+ RR1_PARITY_ERROR = 0x10, // SIO/SCC bits
+ RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits
+ RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits
+ RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported
};
enum
- { // TODO: overload SIO functionality
- RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case)
- RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B
- RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B
- RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B
+ { // TODO: overload SIO functionality
+ RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case)
+ RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B
+ RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B
+ RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B
};
enum
{
- RR3_CHANB_EXT_IP = 0x01, // SCC IP pending registers
- RR3_CHANB_TX_IP = 0x02, // only read in Channel A (for both channels)
- RR3_CHANB_RX_IP = 0x04, // channel B return all zero
- RR3_CHANA_EXT_IP = 0x08,
- RR3_CHANA_TX_IP = 0x10,
- RR3_CHANA_RX_IP = 0x20
+ RR3_CHANB_EXT_IP = 0x01, // SCC IP pending registers
+ RR3_CHANB_TX_IP = 0x02, // only read in Channel A (for both channels)
+ RR3_CHANB_RX_IP = 0x04, // channel B return all zero
+ RR3_CHANA_EXT_IP = 0x08,
+ RR3_CHANA_TX_IP = 0x10,
+ RR3_CHANA_RX_IP = 0x20
};
enum // Universal Bus WR0 commands for 85X30
{
- WR0_REGISTER_MASK = 0x07,
- WR0_COMMAND_MASK = 0x38, // COMMANDS
- WR0_NULL = 0x00, // 0 0 0
- WR0_POINT_HIGH = 0x08, // 0 0 1
- WR0_RESET_EXT_STATUS = 0x10, // 0 1 0
- WR0_SEND_ABORT = 0x18, // 0 1 1
- WR0_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0
- WR0_RESET_TX_INT = 0x28, // 1 0 1
- WR0_ERROR_RESET = 0x30, // 1 1 0
- WR0_RESET_HIGHEST_IUS = 0x38, // 1 1 1
- WR0_CRC_RESET_CODE_MASK = 0xc0, // RESET
- WR0_CRC_RESET_NULL = 0x00, // 0 0
- WR0_CRC_RESET_RX = 0x40, // 0 1
- WR0_CRC_RESET_TX = 0x80, // 1 0
+ WR0_REGISTER_MASK = 0x07,
+ WR0_COMMAND_MASK = 0x38, // COMMANDS
+ WR0_NULL = 0x00, // 0 0 0
+ WR0_POINT_HIGH = 0x08, // 0 0 1
+ WR0_RESET_EXT_STATUS = 0x10, // 0 1 0
+ WR0_SEND_ABORT = 0x18, // 0 1 1
+ WR0_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0
+ WR0_RESET_TX_INT = 0x28, // 1 0 1
+ WR0_ERROR_RESET = 0x30, // 1 1 0
+ WR0_RESET_HIGHEST_IUS = 0x38, // 1 1 1
+ WR0_CRC_RESET_CODE_MASK = 0xc0, // RESET
+ WR0_CRC_RESET_NULL = 0x00, // 0 0
+ WR0_CRC_RESET_RX = 0x40, // 0 1
+ WR0_CRC_RESET_TX = 0x80, // 1 0
WR0_CRC_RESET_TX_UNDERRUN = 0xc0 // 1 1
};
enum // ZBUS WR0 commands or 80X30
{
- WR0_Z_COMMAND_MASK = 0x38, // COMMANDS
- WR0_Z_NULL_1 = 0x00, // 0 0 0
- WR0_Z_NULL_2 = 0x08, // 0 0 1
- WR0_Z_RESET_EXT_STATUS = 0x10, // 0 1 0
- WR0_Z_SEND_ABORT = 0x18, // 0 1 1
+ WR0_Z_COMMAND_MASK = 0x38, // COMMANDS
+ WR0_Z_NULL_1 = 0x00, // 0 0 0
+ WR0_Z_NULL_2 = 0x08, // 0 0 1
+ WR0_Z_RESET_EXT_STATUS = 0x10, // 0 1 0
+ WR0_Z_SEND_ABORT = 0x18, // 0 1 1
WR0_Z_ENABLE_INT_NEXT_RX= 0x20, // 1 0 0
- WR0_Z_RESET_TX_INT = 0x28, // 1 0 1
- WR0_Z_ERROR_RESET = 0x30, // 1 1 0
+ WR0_Z_RESET_TX_INT = 0x28, // 1 0 1
+ WR0_Z_ERROR_RESET = 0x30, // 1 1 0
WR0_Z_RESET_HIGHEST_IUS = 0x38, // 1 1 1
- WR0_Z_SHIFT_MASK = 0x03, // SHIFT mode SDLC chan B
- WR0_Z_SEL_SHFT_LEFT = 0x02, // 1 0
- WR0_Z_SEL_SHFT_RIGHT = 0x03 // 1 1
+ WR0_Z_SHIFT_MASK = 0x03, // SHIFT mode SDLC chan B
+ WR0_Z_SEL_SHFT_LEFT = 0x02, // 1 0
+ WR0_Z_SEL_SHFT_RIGHT = 0x03 // 1 1
};
enum
{
- WR1_EXT_INT_ENABLE = 0x01,
- WR1_TX_INT_ENABLE = 0x02,
- WR1_PARITY_IS_SPEC_COND = 0x04,
- WR1_RX_INT_MODE_MASK = 0x18,
- WR1_RX_INT_DISABLE = 0x00,
- WR1_RX_INT_FIRST = 0x08,
- WR1_RX_INT_ALL_PARITY = 0x10, // not supported
- WR1_RX_INT_ALL = 0x18,
- WR1_WRDY_ON_RX_TX = 0x20, // not supported
- WR1_WRDY_FUNCTION = 0x40, // not supported
- WR1_WRDY_ENABLE = 0x80 // not supported
+ WR1_EXT_INT_ENABLE = 0x01,
+ WR1_TX_INT_ENABLE = 0x02,
+ WR1_PARITY_IS_SPEC_COND = 0x04,
+ WR1_RX_INT_MODE_MASK = 0x18,
+ WR1_RX_INT_DISABLE = 0x00,
+ WR1_RX_INT_FIRST = 0x08,
+ WR1_RX_INT_ALL_PARITY = 0x10, // not supported
+ WR1_RX_INT_ALL = 0x18,
+ WR1_WRDY_ON_RX_TX = 0x20, // not supported
+ WR1_WRDY_FUNCTION = 0x40, // not supported
+ WR1_WRDY_ENABLE = 0x80 // not supported
};
enum
{
- WR3_RX_ENABLE = 0x01,
- WR3_SYNC_CHAR_LOAD_INHIBIT = 0x02, // not supported
- WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported
- WR3_RX_CRC_ENABLE = 0x08, // not supported
- WR3_ENTER_HUNT_PHASE = 0x10, // not supported
- WR3_AUTO_ENABLES = 0x20,
- WR3_RX_WORD_LENGTH_MASK = 0xc0,
- WR3_RX_WORD_LENGTH_5 = 0x00,
- WR3_RX_WORD_LENGTH_7 = 0x40,
- WR3_RX_WORD_LENGTH_6 = 0x80,
- WR3_RX_WORD_LENGTH_8 = 0xc0
+ WR3_RX_ENABLE = 0x01,
+ WR3_SYNC_CHAR_LOAD_INHIBIT = 0x02, // not supported
+ WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported
+ WR3_RX_CRC_ENABLE = 0x08, // not supported
+ WR3_ENTER_HUNT_PHASE = 0x10, // not supported
+ WR3_AUTO_ENABLES = 0x20,
+ WR3_RX_WORD_LENGTH_MASK = 0xc0,
+ WR3_RX_WORD_LENGTH_5 = 0x00,
+ WR3_RX_WORD_LENGTH_7 = 0x40,
+ WR3_RX_WORD_LENGTH_6 = 0x80,
+ WR3_RX_WORD_LENGTH_8 = 0xc0
};
enum
{
- WR4_PARITY_ENABLE = 0x01,
- WR4_PARITY_EVEN = 0x02,
- WR4_STOP_BITS_MASK = 0x0c,
- WR4_STOP_BITS_1 = 0x04,
- WR4_STOP_BITS_1_5 = 0x08, // not supported
- WR4_STOP_BITS_2 = 0x0c,
- WR4_SYNC_MODE_MASK = 0x30, // not supported
- WR4_SYNC_MODE_8_BIT = 0x00, // not supported
- WR4_SYNC_MODE_16_BIT = 0x10, // not supported
- WR4_SYNC_MODE_SDLC = 0x20, // not supported
- WR4_SYNC_MODE_EXT = 0x30, // not supported
- WR4_CLOCK_RATE_MASK = 0xc0,
- WR4_CLOCK_RATE_X1 = 0x00,
- WR4_CLOCK_RATE_X16 = 0x40,
- WR4_CLOCK_RATE_X32 = 0x80,
- WR4_CLOCK_RATE_X64 = 0xc0
+ WR4_PARITY_ENABLE = 0x01,
+ WR4_PARITY_EVEN = 0x02,
+ WR4_STOP_BITS_MASK = 0x0c,
+ WR4_STOP_BITS_1 = 0x04,
+ WR4_STOP_BITS_1_5 = 0x08, // not supported
+ WR4_STOP_BITS_2 = 0x0c,
+ WR4_SYNC_MODE_MASK = 0x30, // not supported
+ WR4_SYNC_MODE_8_BIT = 0x00, // not supported
+ WR4_SYNC_MODE_16_BIT = 0x10, // not supported
+ WR4_SYNC_MODE_SDLC = 0x20, // not supported
+ WR4_SYNC_MODE_EXT = 0x30, // not supported
+ WR4_CLOCK_RATE_MASK = 0xc0,
+ WR4_CLOCK_RATE_X1 = 0x00,
+ WR4_CLOCK_RATE_X16 = 0x40,
+ WR4_CLOCK_RATE_X32 = 0x80,
+ WR4_CLOCK_RATE_X64 = 0xc0
};
enum
{
- WR5_TX_CRC_ENABLE = 0x01, // not supported
- WR5_RTS = 0x02,
- WR5_CRC16 = 0x04, // not supported
- WR5_TX_ENABLE = 0x08,
- WR5_SEND_BREAK = 0x10,
- WR5_TX_WORD_LENGTH_MASK = 0x60,
- WR5_TX_WORD_LENGTH_5 = 0x00,
- WR5_TX_WORD_LENGTH_6 = 0x40,
- WR5_TX_WORD_LENGTH_7 = 0x20,
- WR5_TX_WORD_LENGTH_8 = 0x60,
- WR5_DTR = 0x80
+ WR5_TX_CRC_ENABLE = 0x01, // not supported
+ WR5_RTS = 0x02,
+ WR5_CRC16 = 0x04, // not supported
+ WR5_TX_ENABLE = 0x08,
+ WR5_SEND_BREAK = 0x10,
+ WR5_TX_WORD_LENGTH_MASK = 0x60,
+ WR5_TX_WORD_LENGTH_5 = 0x00,
+ WR5_TX_WORD_LENGTH_6 = 0x40,
+ WR5_TX_WORD_LENGTH_7 = 0x20,
+ WR5_TX_WORD_LENGTH_8 = 0x60,
+ WR5_DTR = 0x80
};
/* SCC specifics */
enum
{
- WR9_CMD_MASK = 0xC0,
- WR9_CMD_NORESET = 0x00,
- WR9_CMD_CHNB_RESET = 0x40,
- WR9_CMD_CHNA_RESET = 0x80,
- WR9_CMD_HW_RESET = 0xC0,
- WR9_BIT_VIS = 0x01,
- WR9_BIT_NV = 0x02,
- WR9_BIT_DLC = 0x04,
- WR9_BIT_MIE = 0x08,
- WR9_BIT_SHSL = 0x10,
- WR9_BIT_IACK = 0x20
+ WR9_CMD_MASK = 0xC0,
+ WR9_CMD_NORESET = 0x00,
+ WR9_CMD_CHNB_RESET = 0x40,
+ WR9_CMD_CHNA_RESET = 0x80,
+ WR9_CMD_HW_RESET = 0xC0,
+ WR9_BIT_VIS = 0x01,
+ WR9_BIT_NV = 0x02,
+ WR9_BIT_DLC = 0x04,
+ WR9_BIT_MIE = 0x08,
+ WR9_BIT_SHSL = 0x10,
+ WR9_BIT_IACK = 0x20
};
enum
{
- WR11_RCVCLK_TYPE = 0x80,
- WR11_RCVCLK_SRC_MASK = 0x60, // RCV CLOCK
- WR11_RCVCLK_SRC_RTXC = 0x00, // 0 0
- WR11_RCVCLK_SRC_TRXC = 0x20, // 0 1
- WR11_RCVCLK_SRC_BR = 0x40, // 1 0
- WR11_RCVCLK_SRC_DPLL = 0x60, // 1 1
- WR11_TRACLK_SRC_MASK = 0x18, // TRA CLOCK
- WR11_TRACLK_SRC_RTXC = 0x00, // 0 0
- WR11_TRACLK_SRC_TRXC = 0x08, // 0 1
- WR11_TRACLK_SRC_BR = 0x10, // 1 0
- WR11_TRACLK_SRC_DPLL = 0x18, // 1 1
- WR11_TRXC_DIRECTION = 0x04,
- WR11_TRXSRC_SRC_MASK = 0x03, // TRXX CLOCK
- WR11_TRXSRC_SRC_XTAL = 0x00, // 0 0
- WR11_TRXSRC_SRC_TRA = 0x01, // 0 1
- WR11_TRXSRC_SRC_BR = 0x02, // 1 0
- WR11_TRXSRC_SRC_DPLL = 0x03 // 1 1
+ WR11_RCVCLK_TYPE = 0x80,
+ WR11_RCVCLK_SRC_MASK = 0x60, // RCV CLOCK
+ WR11_RCVCLK_SRC_RTXC = 0x00, // 0 0
+ WR11_RCVCLK_SRC_TRXC = 0x20, // 0 1
+ WR11_RCVCLK_SRC_BR = 0x40, // 1 0
+ WR11_RCVCLK_SRC_DPLL = 0x60, // 1 1
+ WR11_TRACLK_SRC_MASK = 0x18, // TRA CLOCK
+ WR11_TRACLK_SRC_RTXC = 0x00, // 0 0
+ WR11_TRACLK_SRC_TRXC = 0x08, // 0 1
+ WR11_TRACLK_SRC_BR = 0x10, // 1 0
+ WR11_TRACLK_SRC_DPLL = 0x18, // 1 1
+ WR11_TRXC_DIRECTION = 0x04,
+ WR11_TRXSRC_SRC_MASK = 0x03, // TRXX CLOCK
+ WR11_TRXSRC_SRC_XTAL = 0x00, // 0 0
+ WR11_TRXSRC_SRC_TRA = 0x01, // 0 1
+ WR11_TRXSRC_SRC_BR = 0x02, // 1 0
+ WR11_TRXSRC_SRC_DPLL = 0x03 // 1 1
};
enum
{
- WR14_DPLL_CMD_MASK = 0xe0, // Command
- WR14_CMD_NULL = 0x00, // 0 0 0
- WR14_CMD_ESM = 0x20, // 0 0 1
- WR14_CMD_RMC = 0x40, // 0 1 0
- WR14_CMD_DISABLE_DPLL = 0x60, // 0 1 1
- WR14_CMD_SS_BRG = 0x80, // 1 0 0
- WR14_CMD_SS_RTXC = 0xa0, // 1 0 1
- WR14_CMD_SET_FM = 0xc0, // 1 1 0
- WR14_CMD_SET_NRZI = 0xe0, // 1 1 1
- WR14_BRG_ENABLE = 0x01,
- WR14_BRG_SOURCE = 0x02,
- WR14_DTR_REQ_FUNC = 0x04,
- WR14_AUTO_ECHO = 0x08,
- WR14_LOCAL_LOOPBACK = 0x010
+ WR14_DPLL_CMD_MASK = 0xe0, // Command
+ WR14_CMD_NULL = 0x00, // 0 0 0
+ WR14_CMD_ESM = 0x20, // 0 0 1
+ WR14_CMD_RMC = 0x40, // 0 1 0
+ WR14_CMD_DISABLE_DPLL = 0x60, // 0 1 1
+ WR14_CMD_SS_BRG = 0x80, // 1 0 0
+ WR14_CMD_SS_RTXC = 0xa0, // 1 0 1
+ WR14_CMD_SET_FM = 0xc0, // 1 1 0
+ WR14_CMD_SET_NRZI = 0xe0, // 1 1 1
+ WR14_BRG_ENABLE = 0x01,
+ WR14_BRG_SOURCE = 0x02,
+ WR14_DTR_REQ_FUNC = 0x04,
+ WR14_AUTO_ECHO = 0x08,
+ WR14_LOCAL_LOOPBACK = 0x010
};
enum
@@ -536,40 +536,40 @@ protected:
int get_tx_word_length();
// receiver state
- UINT8 m_rx_data_fifo[8]; // receive data FIFO
- UINT8 m_rx_error_fifo[8]; // receive error FIFO
- UINT8 m_rx_error; // current receive error
- //int m_rx_fifo // receive FIFO pointer
- int m_rx_fifo_rp; // receive FIFO read pointer
- int m_rx_fifo_wp; // receive FIFO write pointer
- int m_rx_fifo_sz; // receive FIFO size
-
- int m_rx_clock; // receive clock pulse count
- int m_rx_first; // first character received
- int m_rx_break; // receive break condition
- UINT8 m_rx_rr0_latch; // read register 0 latched
+ UINT8 m_rx_data_fifo[8]; // receive data FIFO
+ UINT8 m_rx_error_fifo[8]; // receive error FIFO
+ UINT8 m_rx_error; // current receive error
+ //int m_rx_fifo // receive FIFO pointer
+ int m_rx_fifo_rp; // receive FIFO read pointer
+ int m_rx_fifo_wp; // receive FIFO write pointer
+ int m_rx_fifo_sz; // receive FIFO size
+
+ int m_rx_clock; // receive clock pulse count
+ int m_rx_first; // first character received
+ int m_rx_break; // receive break condition
+ UINT8 m_rx_rr0_latch; // read register 0 latched
int m_rxd;
- int m_ri; // ring indicator latch
- int m_cts; // clear to send latch
- int m_dcd; // data carrier detect latch
+ int m_ri; // ring indicator latch
+ int m_cts; // clear to send latch
+ int m_dcd; // data carrier detect latch
// transmitter state
- UINT8 m_tx_data; // transmit data register
- int m_tx_clock; // transmit clock pulse count
+ UINT8 m_tx_data; // transmit data register
+ int m_tx_clock; // transmit clock pulse count
- int m_dtr; // data terminal ready
- int m_rts; // request to send
+ int m_dtr; // data terminal ready
+ int m_rts; // request to send
// synchronous state
- UINT16 m_sync; // sync character
+ UINT16 m_sync; // sync character
int m_rcv_mode;
int m_index;
z80scc_device *m_uart;
// SCC specifics
- int m_ph; // Point high command to access regs 08-0f
+ int m_ph; // Point high command to access regs 08-0f
UINT8 m_zc;
};
diff --git a/src/devices/video/hd44780.cpp b/src/devices/video/hd44780.cpp
index a8ba3a77cc5..ea6a63ca415 100644
--- a/src/devices/video/hd44780.cpp
+++ b/src/devices/video/hd44780.cpp
@@ -90,7 +90,7 @@ void hd44780_device::device_start()
m_cgrom.set_target(memregion("cgrom")->base(), 0x1000);
m_pixel_update_cb.bind_relative_to(*owner());
-
+
m_busy_timer = timer_alloc(TIMER_BUSY);
m_blink_timer = timer_alloc(TIMER_BLINKING);
m_blink_timer->adjust(attotime::from_msec(409), 0, attotime::from_msec(409));
diff --git a/src/devices/video/snes_ppu.cpp b/src/devices/video/snes_ppu.cpp
index d396d86d6c5..fa7c85e3f7c 100644
--- a/src/devices/video/snes_ppu.cpp
+++ b/src/devices/video/snes_ppu.cpp
@@ -371,7 +371,7 @@ void snes_ppu_device::device_reset()
m_beam.latch_vert = 0;
m_beam.latch_horz = 0;
m_beam.current_vert = 0;
-
+
/* Set STAT78 to NTSC or PAL */
m_stat78 = (ATTOSECONDS_TO_HZ(m_screen->frame_period().attoseconds()) >= 59.0) ? SNES_NTSC : SNES_PAL;
m_beam.last_visible_line = m_stat78 & SNES_PAL ? 240 : 225;
diff --git a/src/emu/digfx.h b/src/emu/digfx.h
index 2883f71acd0..d41d8d1dd99 100644
--- a/src/emu/digfx.h
+++ b/src/emu/digfx.h
@@ -71,8 +71,8 @@ const gfx_layout name = { width, height, RGN_FRAC(1,1), 8, { GFX_RAW }, { 0 }, {
#define STEP1024(START,STEP) STEP512(START,STEP),STEP512((START)+512*(STEP),STEP)
#define STEP2048(START,STEP) STEP1024(START,STEP),STEP1024((START)+1024*(STEP),STEP)
-#define STEP2_INV(START,STEP) (START)+(STEP),(START)
-#define STEP4_INV(START,STEP) STEP2_INV(START+2*STEP,STEP),STEP2_INV(START,STEP)
+#define STEP2_INV(START,STEP) (START)+(STEP),(START)
+#define STEP4_INV(START,STEP) STEP2_INV(START+2*STEP,STEP),STEP2_INV(START,STEP)
//**************************************************************************
// GRAPHICS INFO MACROS
diff --git a/src/emu/screen.cpp b/src/emu/screen.cpp
index e9d22a75c22..0e298148d13 100644
--- a/src/emu/screen.cpp
+++ b/src/emu/screen.cpp
@@ -134,7 +134,7 @@ screen_device_svg_renderer::screen_device_svg_renderer(memory_region *region)
w = 1920;
h = (w / ar) + 0.5;
}
-
+
printf("\n\nMCFG_SCREEN_SIZE(%d, %d)\nMCFG_SCREEN_VISIBLE_AREA(0, %d-1, 0, %d-1)\n", w, h, w, h);
#endif
}
@@ -353,7 +353,7 @@ void screen_device_svg_renderer::compute_diff_image(const std::vector<UINT32> &r
dst++;
}
}
-
+
}
bool screen_device_svg_renderer::compute_mask_intersection_bbox(int key1, int key2, bbox &bb) const
@@ -361,9 +361,9 @@ bool screen_device_svg_renderer::compute_mask_intersection_bbox(int key1, int ke
const cached_bitmap &c1 = m_cache[key1];
const cached_bitmap &c2 = m_cache[key2];
if(c1.x >= c2.x + c2.sx ||
- c1.x + c1.sx <= c2.x ||
- c1.y >= c2.y + c2.sy ||
- c1.y + c1.sy <= c2.y)
+ c1.x + c1.sx <= c2.x ||
+ c1.y >= c2.y + c2.sy ||
+ c1.y + c1.sy <= c2.y)
return false;
int cx0 = c1.x > c2.x ? c1.x : c2.x;
int cy0 = c1.y > c2.y ? c1.y : c2.y;
@@ -412,7 +412,7 @@ void screen_device_svg_renderer::compute_dual_diff_image(const std::vector<UINT3
dest.sx = bb.x1 - bb.x0 + 1;
dest.sy = bb.y1 - bb.y0 + 1;
dest.image.resize(dest.sx*dest.sy);
- for(int y = 0; y != dest.sy; y++) {
+ for(int y = 0; y != dest.sy; y++) {
const UINT32 *psrc1 = &src1.image[(dest.x - src1.x) + src1.sx * (y + dest.y - src1.y)];
const UINT32 *psrc2 = &src2.image[(dest.x - src2.x) + src2.sx * (y + dest.y - src2.y)];
const UINT32 *psrcr = &rend [ dest.x + m_sx * (y + dest.y )];
@@ -457,9 +457,9 @@ void screen_device_svg_renderer::rebuild_cache()
for(int okey : doing) {
// The bounding boxes include x1/y1, so the comparisons must be strict
if(!(bboxes[key].x0 > bboxes[okey].x1 ||
- bboxes[key].x1 < bboxes[okey].x0 ||
- bboxes[key].y0 > bboxes[okey].y1 ||
- bboxes[key].y1 < bboxes[okey].y0))
+ bboxes[key].x1 < bboxes[okey].x0 ||
+ bboxes[key].y0 > bboxes[okey].y1 ||
+ bboxes[key].y1 < bboxes[okey].y0))
goto conflict;
}
doing.push_back(key);
@@ -511,9 +511,9 @@ void screen_device_svg_renderer::rebuild_cache()
for(int okey : doing) {
// The bounding boxes include x1/y1, so the comparisons must be strict
if(!(bboxes[key].x0 > bboxes[okey].x1 ||
- bboxes[key].x1 < bboxes[okey].x0 ||
- bboxes[key].y0 > bboxes[okey].y1 ||
- bboxes[key].y1 < bboxes[okey].y0))
+ bboxes[key].x1 < bboxes[okey].x0 ||
+ bboxes[key].y0 > bboxes[okey].y1 ||
+ bboxes[key].y1 < bboxes[okey].y0))
goto conflict2;
}
doing.push_back(key);
diff --git a/src/frontend/mame/ui/filemngr.cpp b/src/frontend/mame/ui/filemngr.cpp
index f031a2ef123..ac455d4c591 100644
--- a/src/frontend/mame/ui/filemngr.cpp
+++ b/src/frontend/mame/ui/filemngr.cpp
@@ -184,7 +184,7 @@ void ui_menu_file_manager::handle()
if (floppy_device != nullptr)
{
ui_menu::stack_push(global_alloc_clear<ui_menu_control_floppy_image>(ui(), container, floppy_device));
- }
+ }
else
{
ui_menu::stack_push(global_alloc_clear<ui_menu_control_device_image>(ui(), container, selected_device));
diff --git a/src/frontend/mame/ui/menuitem.h b/src/frontend/mame/ui/menuitem.h
index 92ceab86628..3fac820b5e7 100644
--- a/src/frontend/mame/ui/menuitem.h
+++ b/src/frontend/mame/ui/menuitem.h
@@ -39,4 +39,4 @@ public:
inline bool is_selectable() const;
};
-#endif // __UI_MENUITEM__ \ No newline at end of file
+#endif // __UI_MENUITEM__
diff --git a/src/frontend/mame/ui/slider.h b/src/frontend/mame/ui/slider.h
index ef3622a0ee5..a7873db800a 100644
--- a/src/frontend/mame/ui/slider.h
+++ b/src/frontend/mame/ui/slider.h
@@ -33,4 +33,4 @@ struct slider_state
char description[1]; /* textual description */
};
-#endif // __UI_SLIDER__ \ No newline at end of file
+#endif // __UI_SLIDER__
diff --git a/src/frontend/mame/ui/ui.cpp b/src/frontend/mame/ui/ui.cpp
index 05ba0138210..e984d445163 100644
--- a/src/frontend/mame/ui/ui.cpp
+++ b/src/frontend/mame/ui/ui.cpp
@@ -2816,4 +2816,4 @@ void mame_ui_manager::save_main_option()
void mame_ui_manager::menu_reset()
{
ui_menu::stack_reset(machine());
-} \ No newline at end of file
+}
diff --git a/src/lib/netlist/analog/nld_bjt.h b/src/lib/netlist/analog/nld_bjt.h
index 978f58a19f3..0ccd3d57c76 100644
--- a/src/lib/netlist/analog/nld_bjt.h
+++ b/src/lib/netlist/analog/nld_bjt.h
@@ -152,11 +152,11 @@ NETLIB_OBJECT_DERIVED(QBJT_EB, QBJT)
{
public:
NETLIB_CONSTRUCTOR_DERIVED(QBJT_EB, QBJT)
- , m_D_CB(owner, "m_D_CB")
- , m_D_EB(owner, "m_D_EB")
- , m_D_EC(owner, "m_D_EC")
- , m_alpha_f(0)
- , m_alpha_r(0)
+ , m_D_CB(owner, "m_D_CB")
+ , m_D_EB(owner, "m_D_EB")
+ , m_D_EC(owner, "m_D_EC")
+ , m_alpha_f(0)
+ , m_alpha_r(0)
{
enregister("E", m_D_EB.m_P); // Cathode
enregister("B", m_D_EB.m_N); // Anode
diff --git a/src/lib/netlist/devices/nld_4020.h b/src/lib/netlist/devices/nld_4020.h
index 491bef29c21..de6f654fcfb 100644
--- a/src/lib/netlist/devices/nld_4020.h
+++ b/src/lib/netlist/devices/nld_4020.h
@@ -91,7 +91,6 @@ NETLIB_OBJECT(CD4020)
, m_sub(*this, "sub")
, m_supply(*this, "supply")
{
-
enregister("RESET", m_RESET);
register_subalias("IP", m_sub.m_IP);
register_subalias("Q1", m_sub.m_Q[0]);
diff --git a/src/lib/netlist/devices/nld_74107.h b/src/lib/netlist/devices/nld_74107.h
index 8023f1103fd..10f0bf71224 100644
--- a/src/lib/netlist/devices/nld_74107.h
+++ b/src/lib/netlist/devices/nld_74107.h
@@ -115,7 +115,6 @@ NETLIB_OBJECT(74107A)
NETLIB_CONSTRUCTOR(74107A)
, m_sub(*this, "sub")
{
-
register_subalias("CLK", m_sub.m_clk);
enregister("J", m_J);
enregister("K", m_K);
@@ -148,7 +147,6 @@ NETLIB_OBJECT(74107_dip)
, m_1(*this, "1")
, m_2(*this, "2")
{
-
register_subalias("1", m_1.m_J);
register_subalias("2", m_1.m_sub.m_QQ);
register_subalias("3", m_1.m_sub.m_Q);
diff --git a/src/lib/netlist/devices/nld_74153.h b/src/lib/netlist/devices/nld_74153.h
index dc7753c28c6..30d76cb051e 100644
--- a/src/lib/netlist/devices/nld_74153.h
+++ b/src/lib/netlist/devices/nld_74153.h
@@ -95,7 +95,6 @@ NETLIB_OBJECT(74153)
NETLIB_CONSTRUCTOR(74153)
, m_sub(*this, "sub")
{
-
register_subalias("C0", m_sub.m_C[0]);
register_subalias("C1", m_sub.m_C[1]);
register_subalias("C2", m_sub.m_C[2]);
@@ -120,7 +119,6 @@ NETLIB_OBJECT(74153_dip)
, m_1(*this, "1")
, m_2(*this, "2")
{
-
register_subalias("1", m_1.m_G);
enregister("2", m_B); // m_2.m_B
register_subalias("3", m_1.m_C[3]);
diff --git a/src/lib/netlist/devices/nld_7448.h b/src/lib/netlist/devices/nld_7448.h
index c9de0af5cc6..b20dde552a3 100644
--- a/src/lib/netlist/devices/nld_7448.h
+++ b/src/lib/netlist/devices/nld_7448.h
@@ -46,7 +46,7 @@ NETLIB_NAMESPACE_DEVICES_START()
* FIXME: Using truthtable is a lot slower than the explicit device
*/
-#define USE_TRUTHTABLE_7448 (0)
+#define USE_TRUTHTABLE_7448 (0)
#if (USE_TRUTHTABLE_7448 && USE_TRUTHTABLE)
@@ -100,7 +100,6 @@ NETLIB_OBJECT(7448)
NETLIB_CONSTRUCTOR(7448)
, m_sub(*this, "sub")
{
-
register_subalias("A", m_sub.m_A);
register_subalias("B", m_sub.m_B);
register_subalias("C", m_sub.m_C);
diff --git a/src/lib/netlist/devices/nld_7450.h b/src/lib/netlist/devices/nld_7450.h
index 0b10b35e1ed..c0db52f4b22 100644
--- a/src/lib/netlist/devices/nld_7450.h
+++ b/src/lib/netlist/devices/nld_7450.h
@@ -65,7 +65,6 @@ NETLIB_OBJECT(7450_dip)
, m_1(*this, "1")
, m_2(*this, "2")
{
-
register_subalias("1", m_1.m_A);
register_subalias("2", m_2.m_A);
register_subalias("3", m_2.m_B);
diff --git a/src/lib/netlist/devices/nld_7474.cpp b/src/lib/netlist/devices/nld_7474.cpp
index d1f2e11cd8a..ee2dc56b327 100644
--- a/src/lib/netlist/devices/nld_7474.cpp
+++ b/src/lib/netlist/devices/nld_7474.cpp
@@ -68,7 +68,7 @@ NETLIB_RESET(7474sub)
NETLIB_RESET(7474_dip)
{
-// m_1.do_reset();
+// m_1.do_reset();
//m_2.do_reset();
}
diff --git a/src/lib/netlist/devices/nld_7474.h b/src/lib/netlist/devices/nld_7474.h
index 1de0838b9c9..6caad4d68f3 100644
--- a/src/lib/netlist/devices/nld_7474.h
+++ b/src/lib/netlist/devices/nld_7474.h
@@ -115,7 +115,6 @@ NETLIB_OBJECT(7474_dip)
, m_1(*this, "1")
, m_2(*this, "2")
{
-
register_subalias("1", m_1.m_CLRQ);
register_subalias("2", m_1.m_D);
register_subalias("3", m_1.sub.m_CLK);
diff --git a/src/lib/netlist/devices/nld_ne555.h b/src/lib/netlist/devices/nld_ne555.h
index 9963b83546e..73413796fd7 100644
--- a/src/lib/netlist/devices/nld_ne555.h
+++ b/src/lib/netlist/devices/nld_ne555.h
@@ -37,7 +37,6 @@ NETLIB_OBJECT(NE555)
, m_last_out(false)
, m_ff(false)
{
-
register_subalias("GND", m_R3.m_N); // Pin 1
enregister("TRIG", m_TRIG); // Pin 2
enregister("OUT", m_OUT); // Pin 3
diff --git a/src/lib/netlist/devices/nld_system.h b/src/lib/netlist/devices/nld_system.h
index a5609704a7d..1b22ae3e9dd 100644
--- a/src/lib/netlist/devices/nld_system.h
+++ b/src/lib/netlist/devices/nld_system.h
@@ -525,7 +525,7 @@ public:
protected:
- NETLIB_RESETI() { }
+ NETLIB_RESETI() { }
NETLIB_UPDATEI()
{
diff --git a/src/lib/netlist/macro/nlm_ttl74xx.cpp b/src/lib/netlist/macro/nlm_ttl74xx.cpp
index fc589231b19..b21b388ba58 100644
--- a/src/lib/netlist/macro/nlm_ttl74xx.cpp
+++ b/src/lib/netlist/macro/nlm_ttl74xx.cpp
@@ -79,7 +79,7 @@ NETLIST_START(TTL_7402_DIP)
s2.A, /* A2 |5 10| Y3 */ s3.Q,
s2.B, /* B2 |6 9| B3 */ s3.B,
GND.I, /* GND |7 8| A3 */ s3.A
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -117,7 +117,7 @@ NETLIST_START(TTL_7404_DIP)
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -156,7 +156,7 @@ NETLIST_START(TTL_7408_DIP)
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -193,7 +193,7 @@ NETLIST_START(TTL_7410_DIP)
s2.C, /* C2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -230,7 +230,7 @@ NETLIST_START(TTL_7411_DIP)
s2.C, /* C2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -297,7 +297,7 @@ NETLIST_START(TTL_7420_DIP)
s1.D, /* D1 |5 10| B2 */ s2.B,
s1.Q, /* Y1 |6 9| A2 */ s2.A,
GND.I, /* GND |7 8| Y2 */ s2.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -334,12 +334,12 @@ NETLIST_START(TTL_7425_DIP)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.B, /* B1 |2 13| D2 */ s2.D,
- X.I, /* X1 |3 12| C2 */ s2.C,
+ X.I, /* X1 |3 12| C2 */ s2.C,
s1.C, /* C1 |4 7425 11| X2 */ X.I,
s1.D, /* D1 |5 10| B2 */ s2.B,
s1.Q, /* Y1 |6 9| A2 */ s2.A,
GND.I, /* GND |7 8| Y2 */ s2.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -377,7 +377,7 @@ NETLIST_START(TTL_7427_DIP)
s2.C, /* C2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -417,7 +417,7 @@ NETLIST_START(TTL_7430_DIP)
s1.E, /* E |5 10| NC */ NC.I,
s1.F, /* F |6 9| NC */ NC.I,
GND.I, /* GND |7 8| Y */ s1.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -456,7 +456,7 @@ NETLIST_START(TTL_7432_DIP)
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/lib/netlist/macro/nlm_ttl74xx.h b/src/lib/netlist/macro/nlm_ttl74xx.h
index 541a9932fb5..924b2c31093 100644
--- a/src/lib/netlist/macro/nlm_ttl74xx.h
+++ b/src/lib/netlist/macro/nlm_ttl74xx.h
@@ -15,8 +15,8 @@
NET_REGISTER_DEV(TTL_7400_GATE, _name)
#define TTL_7400_NAND(_name, _A, _B) \
- NET_REGISTER_DEV(TTL_7400_NAND, _name) \
- NET_CONNECT(_name, A, _A) \
+ NET_REGISTER_DEV(TTL_7400_NAND, _name) \
+ NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
#define TTL_7400_DIP(_name) \
@@ -50,8 +50,8 @@
NET_REGISTER_DEV(TTL_7408_GATE, _name)
#define TTL_7408_AND(_name, _A, _B) \
- NET_REGISTER_DEV(TTL_7408_AND, _name) \
- NET_CONNECT(_name, A, _A) \
+ NET_REGISTER_DEV(TTL_7408_AND, _name) \
+ NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
#define TTL_7408_DIP(_name) \
@@ -166,8 +166,8 @@
NET_REGISTER_DEV(TTL_7437_GATE, _name)
#define TTL_7437_NAND(_name, _A, _B) \
- NET_REGISTER_DEV(TTL_7437_NAND, _name) \
- NET_CONNECT(_name, A, _A) \
+ NET_REGISTER_DEV(TTL_7437_NAND, _name) \
+ NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
#define TTL_7437_DIP(_name) \
diff --git a/src/lib/netlist/nl_base.cpp b/src/lib/netlist/nl_base.cpp
index 6a23dd651b5..477887622a4 100644
--- a/src/lib/netlist/nl_base.cpp
+++ b/src/lib/netlist/nl_base.cpp
@@ -20,7 +20,6 @@ const netlist::netlist_time netlist::netlist_time::zero = netlist::netlist_time(
namespace netlist
{
-
#if 0
static pmempool p(65536, 16);
@@ -31,8 +30,8 @@ void * object_t::operator new (size_t size)
void object_t::operator delete (void * mem)
{
- if (mem)
- p.free(mem);
+ if (mem)
+ p.free(mem);
}
#else
void * object_t::operator new (size_t size)
@@ -42,8 +41,8 @@ void * object_t::operator new (size_t size)
void object_t::operator delete (void * mem)
{
- if (mem)
- ::operator delete(mem);
+ if (mem)
+ ::operator delete(mem);
}
#endif
@@ -234,7 +233,6 @@ netlist_t::netlist_t(const pstring &aname)
netlist_t::~netlist_t()
{
-
m_nets.clear();
m_devices.clear();
@@ -619,7 +617,7 @@ ATTR_COLD net_t::~net_t()
// FIXME: move somewhere central
struct do_nothing_deleter{
- template<typename T> void operator()(T*){}
+ template<typename T> void operator()(T*){}
};
ATTR_COLD void net_t::init_object(netlist_t &nl, const pstring &aname, core_terminal_t *mr)
@@ -1058,4 +1056,3 @@ ATTR_HOT /* inline */ void NETLIB_NAME(mainclock)::mc_update(logic_net_t &net)
NETLIB_NAMESPACE_DEVICES_END()
-
diff --git a/src/lib/netlist/nl_base.h b/src/lib/netlist/nl_base.h
index d60828b7d62..4fd71b8a2c1 100644
--- a/src/lib/netlist/nl_base.h
+++ b/src/lib/netlist/nl_base.h
@@ -176,9 +176,9 @@
*/
using netlist_sig_t = std::uint32_t;
- //============================================================
- // MACROS / New Syntax
- //============================================================
+ //============================================================
+ // MACROS / New Syntax
+ //============================================================
#define NETLIB_NAMESPACE_DEVICES_START() namespace netlist { namespace devices {
#define NETLIB_NAMESPACE_DEVICES_END() }}
@@ -208,10 +208,10 @@ class NETLIB_NAME(_name) : public device_t
public: template <class _CLASS> ATTR_COLD NETLIB_NAME(_name)(_CLASS &owner, const pstring name, __VA_ARGS__) \
: device_t(owner, name)
-#define NETLIB_DYNAMIC() \
+#define NETLIB_DYNAMIC() \
public: ATTR_HOT virtual bool is_dynamic1() const override { return true; }
-#define NETLIB_TIMESTEP() \
+#define NETLIB_TIMESTEP() \
public: ATTR_HOT virtual bool is_timestep() const override { return true; } \
public: ATTR_HOT virtual void step_time(const nl_double step) override
@@ -403,8 +403,8 @@ namespace netlist
#if 1
public:
- void * operator new (size_t size);
- void operator delete (void * mem);
+ void * operator new (size_t size);
+ void operator delete (void * mem);
#endif
};
diff --git a/src/lib/netlist/nl_util.h b/src/lib/netlist/nl_util.h
index f25a0d13320..69ffb10ecdd 100644
--- a/src/lib/netlist/nl_util.h
+++ b/src/lib/netlist/nl_util.h
@@ -182,7 +182,7 @@ public:
}
bool is_owned() const { return m_is_owned; }
-
+
template<typename _DC>
powned_ptr<_DC> & operator =(powned_ptr<_DC> &r)
{
diff --git a/src/lib/netlist/plib/pdynlib.cpp b/src/lib/netlist/plib/pdynlib.cpp
index d08f194a137..743ea7705f4 100644
--- a/src/lib/netlist/plib/pdynlib.cpp
+++ b/src/lib/netlist/plib/pdynlib.cpp
@@ -41,7 +41,7 @@ pdynlib::pdynlib(const pstring libname)
pdynlib::pdynlib(const pstring path, const pstring libname)
: m_isLoaded(false), m_lib(nullptr)
{
- // printf("win: loading <%s>\n", libname.cstr());
+ // printf("win: loading <%s>\n", libname.cstr());
#ifdef _WIN32
if (libname != "")
m_lib = LoadLibrary(libname.cstr());
diff --git a/src/lib/netlist/solver/nld_matrix_solver.h b/src/lib/netlist/solver/nld_matrix_solver.h
index ab6364cb2d3..93d01c962f2 100644
--- a/src/lib/netlist/solver/nld_matrix_solver.h
+++ b/src/lib/netlist/solver/nld_matrix_solver.h
@@ -87,7 +87,7 @@ public:
matrix_solver_t(netlist_t &anetlist, const pstring &name,
const eSortType sort, const solver_parameters_t *params)
: device_t(anetlist, name),
- m_stat_calculations(0),
+ m_stat_calculations(0),
m_stat_newton_raphson(0),
m_stat_vsolver_calls(0),
m_iterative_fail(0),
diff --git a/src/lib/netlist/solver/nld_ms_sm.h b/src/lib/netlist/solver/nld_ms_sm.h
index 1a3c50b4a27..c5d0e1105b6 100644
--- a/src/lib/netlist/solver/nld_ms_sm.h
+++ b/src/lib/netlist/solver/nld_ms_sm.h
@@ -13,9 +13,9 @@
* In this specific implementation, u is a unit vector specifying the row which
* changed. Thus v contains the changed column.
*
- * Than z = A⁻¹ u , w = transpose(A⁻¹) v , lambda = v z
+ * Than z = A^-1 u , w = transpose(A^-1) v , lambda = v z
*
- * A⁻¹ <- 1.0 / (1.0 + lambda) * (z x w)
+ * A^-1 <- 1.0 / (1.0 + lambda) * (z x w)
*
* The approach is iterative and applied for each row changed.
*
diff --git a/src/lib/netlist/solver/nld_ms_w.h b/src/lib/netlist/solver/nld_ms_w.h
index f61c2b1b616..e976fcf3184 100644
--- a/src/lib/netlist/solver/nld_ms_w.h
+++ b/src/lib/netlist/solver/nld_ms_w.h
@@ -15,7 +15,7 @@
* Whilst the book proposes to invert the matrix R=(I+transpose(V)*Z) we define
*
* w = transpose(V)*y
- * a = R⁻¹ * w
+ * a = R^-1 * w
*
* and consequently
*
diff --git a/src/mame/drivers/1942.cpp b/src/mame/drivers/1942.cpp
index a558ff74380..d2b324dfcf5 100644
--- a/src/mame/drivers/1942.cpp
+++ b/src/mame/drivers/1942.cpp
@@ -794,9 +794,9 @@ ROM_END
/* set contained only three program ROMs, other ROMs should be checked against a real PCB */
ROM_START( 1942h )
ROM_REGION( 0x20000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 3*16k for the banked ROMs images */
- ROM_LOAD( "Supercharger_1942_#3.m3", 0x00000, 0x4000, CRC(ec70785f) SHA1(2010a945e1d5c984a14cf7f47a883d04bd71567d) ) /* label confirmed from auction post */
- ROM_LOAD( "Supercharger_1942_#4.m4", 0x04000, 0x4000, CRC(cc11355f) SHA1(44fceb449f406f657494eeee4e6b43bf063f2013) ) /* label confirmed from auction post */
- ROM_LOAD( "Supercharger_1942_#5.m5", 0x10000, 0x4000, CRC(42746d75) SHA1(ede6919b84653b94fddeb40b3004e44336880ba2) ) /* label confirmed from auction post */
+ ROM_LOAD( "Supercharger_1942_#3.m3", 0x00000, 0x4000, CRC(ec70785f) SHA1(2010a945e1d5c984a14cf7f47a883d04bd71567d) ) /* label confirmed from auction post */
+ ROM_LOAD( "Supercharger_1942_#4.m4", 0x04000, 0x4000, CRC(cc11355f) SHA1(44fceb449f406f657494eeee4e6b43bf063f2013) ) /* label confirmed from auction post */
+ ROM_LOAD( "Supercharger_1942_#5.m5", 0x10000, 0x4000, CRC(42746d75) SHA1(ede6919b84653b94fddeb40b3004e44336880ba2) ) /* label confirmed from auction post */
ROM_LOAD( "srb-06.m6", 0x14000, 0x2000, CRC(466f8248) SHA1(2ccc8fc59962d3001fbc10e8d2f20a254a74f251) )
ROM_LOAD( "srb-07.m7", 0x18000, 0x4000, CRC(0d31038c) SHA1(b588eaf6fddd66ecb2d9832dc197f286f1ccd846) )
diff --git a/src/mame/drivers/1943.cpp b/src/mame/drivers/1943.cpp
index 99b8bdda240..c741f83e4b4 100644
--- a/src/mame/drivers/1943.cpp
+++ b/src/mame/drivers/1943.cpp
@@ -334,7 +334,7 @@ static MACHINE_CONFIG_START( 1943, _1943_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
-
+
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ym1", YM2203, XTAL_24MHz/16) /* verified on pcb */
diff --git a/src/mame/drivers/alpha68k.cpp b/src/mame/drivers/alpha68k.cpp
index 1817a2c4d16..1650f88828d 100644
--- a/src/mame/drivers/alpha68k.cpp
+++ b/src/mame/drivers/alpha68k.cpp
@@ -2140,7 +2140,7 @@ static MACHINE_CONFIG_START( alpha68k_II, alpha68k_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
-
+
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ym1", YM2203, 3000000)
diff --git a/src/mame/drivers/altos486.cpp b/src/mame/drivers/altos486.cpp
index d9b4aa81a6e..60589ecde69 100644
--- a/src/mame/drivers/altos486.cpp
+++ b/src/mame/drivers/altos486.cpp
@@ -220,4 +220,3 @@ ROM_START( altos486 )
ROM_END
COMP( 1984, altos486, 0, 0, altos486, 0, driver_device, 0, "Altos Computer Systems", "Altos 486", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
-
diff --git a/src/mame/drivers/apple2e.cpp b/src/mame/drivers/apple2e.cpp
index c324800df82..f9d8f382cce 100644
--- a/src/mame/drivers/apple2e.cpp
+++ b/src/mame/drivers/apple2e.cpp
@@ -1946,34 +1946,34 @@ READ8_MEMBER(apple2e_state::c300_int_r) { return read_int_rom(space, 0x300, off
READ8_MEMBER(apple2e_state::c300_int_bank_r) { return read_int_rom(space, 0x4300, offset); }
WRITE8_MEMBER(apple2e_state::c300_w) { write_slot_rom(space, 3, offset, data); }
READ8_MEMBER(apple2e_state::c400_r) { return read_slot_rom(space, 4, offset); }
-READ8_MEMBER(apple2e_state::c400_int_r)
-{
+READ8_MEMBER(apple2e_state::c400_int_r)
+{
if ((offset < 0x100) && (m_mockingboard4c))
{
return read_slot_rom(space, 4, offset);
}
- return read_int_rom(space, 0x400, offset);
+ return read_int_rom(space, 0x400, offset);
}
-READ8_MEMBER(apple2e_state::c400_int_bank_r)
-{
+READ8_MEMBER(apple2e_state::c400_int_bank_r)
+{
if ((offset < 0x100) && (m_mockingboard4c))
{
return read_slot_rom(space, 4, offset);
}
- return read_int_rom(space, 0x4400, offset);
+ return read_int_rom(space, 0x4400, offset);
}
-WRITE8_MEMBER(apple2e_state::c400_w)
-{
+WRITE8_MEMBER(apple2e_state::c400_w)
+{
if ((m_isiic) && (offset < 0x100))
{
m_mockingboard4c = true;
}
- write_slot_rom(space, 4, offset, data);
+ write_slot_rom(space, 4, offset, data);
}
READ8_MEMBER(apple2e_state::c800_r)
@@ -3457,7 +3457,7 @@ static MACHINE_CONFIG_DERIVED( apple2c, apple2ee )
MCFG_RS232_CTS_HANDLER(DEVWRITELINE(IIC_ACIA2_TAG, mos6551_device, write_cts))
// TODO: populate the IIc's other virtual slots with ONBOARD_ADD
- MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl4", A2BUS_MOCKINGBOARD, NOOP ) // Mockingboard 4C
+ MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl4", A2BUS_MOCKINGBOARD, NOOP ) // Mockingboard 4C
MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl6", A2BUS_DISKIING, NOOP)
MCFG_A2EAUXSLOT_SLOT_REMOVE("aux")
diff --git a/src/mame/drivers/bfm_ad5.cpp b/src/mame/drivers/bfm_ad5.cpp
index 3374a24c2c1..ec3073b7540 100644
--- a/src/mame/drivers/bfm_ad5.cpp
+++ b/src/mame/drivers/bfm_ad5.cpp
@@ -86,4 +86,4 @@ MACHINE_CONFIG_START( bfm_ad5, adder5_state )
/* unknown sound */
MACHINE_CONFIG_END
-#include "bfm_ad5sw.hxx" \ No newline at end of file
+#include "bfm_ad5sw.hxx"
diff --git a/src/mame/drivers/crgolf.cpp b/src/mame/drivers/crgolf.cpp
index 03057b92740..52545910579 100644
--- a/src/mame/drivers/crgolf.cpp
+++ b/src/mame/drivers/crgolf.cpp
@@ -48,41 +48,41 @@
Pin 19 - Pin 22 of F1 (2764 on cpu/sound board), Output
Pin 20 - VCC
- -------------------------------------------------------------------
+ -------------------------------------------------------------------
- Master's Golf is a different PCB, but appears to operate in a similar way
+ Master's Golf is a different PCB, but appears to operate in a similar way
-
- PCB X-081-PC-A
- contains a large box marked
+ PCB X-081-PC-A
+ contains a large box marked
- |-----------------------\_/--------------------|
- | NASCO-9000 |
- | |
- | /- NASCO -\ |
- | /\ | ORIGINAL | |
- | NASCO\/YUVO \- 0001941 -/ |
- | |
- | PAT.P |
- | |---------------------------------------| |
- | | MASTER'S GOLF vers JAPAN | |
- | | | |
- | | CUSTOM BOARD | |
- | |---------------------------------------| |
- | |
- | YUVO CO., LTD |
- |-----------------------------------------------
- next to rom M-GF_A10.12K
- the box must contain at least a Z80
+ |-----------------------\_/--------------------|
+ | NASCO-9000 |
+ | |
+ | /- NASCO -\ |
+ | /\ | ORIGINAL | |
+ | NASCO\/YUVO \- 0001941 -/ |
+ | |
+ | PAT.P |
+ | |---------------------------------------| |
+ | | MASTER'S GOLF vers JAPAN | |
+ | | | |
+ | | CUSTOM BOARD | |
+ | |---------------------------------------| |
+ | |
+ | YUVO CO., LTD |
+ |-----------------------------------------------
+
+ next to rom M-GF_A10.12K
+ the box must contain at least a Z80
DASM Notes:
-- main CPU currently stalls with a RAM buffer check ($63fe), then it
-tries to see if $612c onward has a "MASTERJ" string on it, resets itself
+- main CPU currently stalls with a RAM buffer check ($63fe), then it
+tries to see if $612c onward has a "MASTERJ" string on it, resets itself
otherwise.
-During irq routines it also checks if bit 7 is active for $640a-$6415,
+During irq routines it also checks if bit 7 is active for $640a-$6415,
modifies this area if condition is true.
Neither of above matches what we have in the rom data banks, so it's either
protected or a snippet should do the aforementioned string copy.
@@ -289,7 +289,7 @@ WRITE8_MEMBER(crgolf_state::crgolfhi_sample_w)
WRITE8_MEMBER(crgolf_state::screen_select_w)
{
-// if (data & 0xfe) printf("vram_page_select_w %02x\n", data);
+// if (data & 0xfe) printf("vram_page_select_w %02x\n", data);
m_vrambank->set_bank(data & 0x1);
}
@@ -354,14 +354,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_io, AS_IO, 8, crgolf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
-
+
AM_RANGE(0x03, 0x03) AM_WRITEONLY AM_SHARE("color_select")
AM_RANGE(0x04, 0x04) AM_WRITEONLY AM_SHARE("screen_flip")
AM_RANGE(0x05, 0x05) AM_WRITE( screen_select_w )
AM_RANGE(0x06, 0x06) AM_WRITEONLY AM_SHARE("screenb_enable")
AM_RANGE(0x07, 0x07) AM_WRITEONLY AM_SHARE("screena_enable")
-// AM_RANGE(0x20, 0x20) AM_WRITE( main_to_sound_w )
+// AM_RANGE(0x20, 0x20) AM_WRITE( main_to_sound_w )
AM_RANGE(0x40, 0x40) AM_WRITE( main_to_sound_w )
AM_RANGE(0xa0, 0xa0) AM_READ( sound_to_main_r )
ADDRESS_MAP_END
@@ -391,7 +391,6 @@ READ8_MEMBER(crgolf_state::unk_sub_07_r)
WRITE8_MEMBER(crgolf_state::unk_sub_0c_w)
{
-
}
@@ -571,7 +570,7 @@ ROM_START( crgolf ) // 834-5419-04
ROM_LOAD( "crwnc1.1c", 0x00000, 0x2000, CRC(3246e405) SHA1(f6018029317ac96df5866ca6a2bb2135edbd7e77) )
ROM_LOAD( "crwna1.1a", 0x02000, 0x2000, CRC(b9a936e2) SHA1(cebf67d9c42627fbb39648674012a6cf8cb287b5) )
- ROM_REGION( 0x20000, "maindata", 0 )
+ ROM_REGION( 0x20000, "maindata", 0 )
ROM_LOAD( "epr-5880.6b", 0x00000, 0x2000, CRC(4d6d8dad) SHA1(1530f81ad0097eadc75884ff8690b60b85ae451b) )
ROM_LOAD( "epr-5885.5e", 0x0e000, 0x2000, CRC(fac6d56c) SHA1(67dc1918d5ab2443e967359e51d49dd134cdf25d) )
ROM_LOAD( "epr-5881.6f", 0x10000, 0x2000, CRC(dd48dc1f) SHA1(d4560a88d872bd5f401344e3adb25f8486caca11) )
@@ -601,7 +600,7 @@ ROM_START( crgolfa ) // 834-5419-03
ROM_LOAD( "epr-6143.1c", 0x00000, 0x2000, CRC(4b301360) SHA1(2a7dd4876f4448b4b59b6dd02e55eb2d0126b777) )
ROM_LOAD( "epr-6142.1a", 0x02000, 0x2000, CRC(8fc5e67f) SHA1(6563db94c55cfc7d2270daccaab57fc7b422b9f9) )
- ROM_REGION( 0x20000, "maindata", 0 )
+ ROM_REGION( 0x20000, "maindata", 0 )
ROM_LOAD( "epr-5880.6b", 0x00000, 0x2000, CRC(4d6d8dad) SHA1(1530f81ad0097eadc75884ff8690b60b85ae451b) )
ROM_LOAD( "epr-5885.5e", 0x0e000, 0x2000, CRC(fac6d56c) SHA1(67dc1918d5ab2443e967359e51d49dd134cdf25d) )
ROM_LOAD( "epr-5881.6f", 0x10000, 0x2000, CRC(dd48dc1f) SHA1(d4560a88d872bd5f401344e3adb25f8486caca11) )
@@ -632,7 +631,7 @@ ROM_START( crgolfb )
ROM_LOAD( "epr-5879b.1c", 0x00000, 0x2000, CRC(927be359) SHA1(d534f7e3ef4ced8eea882ae2b8425df4c5842833) ) // 5879b.
ROM_LOAD( "epr-5878.1a", 0x02000, 0x2000, CRC(65fd0fa0) SHA1(de95ff95c9f981cd9eadf8b028ee5373bc69007b) ) // 5878.
- ROM_REGION( 0x20000, "maindata", 0 )
+ ROM_REGION( 0x20000, "maindata", 0 )
ROM_LOAD( "epr-5880.6b", 0x00000, 0x2000, CRC(4d6d8dad) SHA1(1530f81ad0097eadc75884ff8690b60b85ae451b) ) // crnsgolf.c
ROM_LOAD( "epr-5885.5e", 0x0e000, 0x2000, CRC(fac6d56c) SHA1(67dc1918d5ab2443e967359e51d49dd134cdf25d) ) // crnsgolf.h
ROM_LOAD( "epr-5881.6f", 0x10000, 0x2000, CRC(dd48dc1f) SHA1(d4560a88d872bd5f401344e3adb25f8486caca11) ) // crnsgolf.d
@@ -660,7 +659,7 @@ ROM_START( crgolfc )
ROM_LOAD( "15.1a", 0x00000, 0x2000, CRC(e6194356) SHA1(78eec53a0658b552e6a8af109d9c9754e4ddadcb) )
ROM_LOAD( "16.1c", 0x02000, 0x2000, CRC(f50412e2) SHA1(5a50fb1edfc26072e921447bd157fe996f707e05) )
- ROM_REGION( 0x20000, "maindata", 0 )
+ ROM_REGION( 0x20000, "maindata", 0 )
ROM_LOAD( "cg.1", 0x00000, 0x2000, CRC(ad7d537a) SHA1(deff74074a8b16ea91a0fa72d97ec36336c87b97) ) // 1.6a
ROM_LOAD( "epr-5885.5e", 0x0e000, 0x2000, CRC(fac6d56c) SHA1(67dc1918d5ab2443e967359e51d49dd134cdf25d) ) // 6.5a
ROM_LOAD( "epr-5881.6f", 0x10000, 0x2000, CRC(dd48dc1f) SHA1(d4560a88d872bd5f401344e3adb25f8486caca11) ) // 2.6b
@@ -688,7 +687,7 @@ ROM_START( crgolfbt )
ROM_LOAD( "epr-5879b.1c", 0x00000, 0x2000, CRC(927be359) SHA1(d534f7e3ef4ced8eea882ae2b8425df4c5842833) )
ROM_LOAD( "epr-5878.1a", 0x02000, 0x2000, CRC(65fd0fa0) SHA1(de95ff95c9f981cd9eadf8b028ee5373bc69007b) )
- ROM_REGION( 0x20000, "maindata", 0 )
+ ROM_REGION( 0x20000, "maindata", 0 )
ROM_LOAD( "cg.1", 0x00000, 0x2000, CRC(ad7d537a) SHA1(deff74074a8b16ea91a0fa72d97ec36336c87b97) )
ROM_LOAD( "epr-5885.5e", 0x0e000, 0x2000, CRC(fac6d56c) SHA1(67dc1918d5ab2443e967359e51d49dd134cdf25d) ) // cg.6
ROM_LOAD( "epr-5881.6f", 0x10000, 0x2000, CRC(dd48dc1f) SHA1(d4560a88d872bd5f401344e3adb25f8486caca11) ) // cg.2
@@ -716,7 +715,7 @@ ROM_START( crgolfhi )
ROM_LOAD( "cpu.c1", 0x00000, 0x2000, CRC(8b101085) SHA1(a59c369be3e7e645d8b20032998a778a2056b7d7) )
ROM_LOAD( "cpu.a1", 0x02000, 0x2000, CRC(f48a8ee8) SHA1(cc07c7258caf251e9cb52f12be779cb02fca0b0a) )
- ROM_REGION( 0x20000, "maindata", 0 )
+ ROM_REGION( 0x20000, "maindata", 0 )
ROM_LOAD( "main.b6", 0x00000, 0x2000, CRC(5b0336c6) SHA1(86e2c197f23a2f2f7666448b74611150ca15a2af) )
ROM_LOAD( "main.b5", 0x02000, 0x2000, CRC(7b80149a) SHA1(c802a79b1430b15d166f5fca11d2ed4e65bc65a9) )
ROM_LOAD( "main.c6", 0x04000, 0x2000, CRC(7804cb1c) SHA1(487f979f47a0f40fa35331c71a66dc8428387a26) )
@@ -757,7 +756,7 @@ ROM_START( mastrglf )
ROM_LOAD( "M-GF_A5.10A.27256.ROM2", 0x18000, 0x08000, CRC(4397c8a0) SHA1(deb9de1cf7ce6ddc69addf18ff5bf2f25ed11602) )
ROM_LOAD( "M-GF_A6.12A.27256.ROM1", 0x20000, 0x08000, CRC(b1fccecf) SHA1(8fb5e40f34596d9faa73255afc2c2635e9008954) )
ROM_LOAD( "M-GF_A7.13A.27256.ROM0", 0x28000, 0x08000, CRC(06075e41) SHA1(3426f4ede8449288519e25bc8a1d679bb5137279) )
-
+
ROM_REGION( 0x10000, "audiocpu", 0 ) // next to large module
ROM_LOAD( "M-GF_A10.12K.27256", 0x00000, 0x08000, CRC(d145b144) SHA1(52370d56106f0280c52266b5a727493a3396a8e3) )
@@ -765,7 +764,7 @@ ROM_START( mastrglf )
ROM_LOAD( "M-GF_A8.15A.27256", 0x00000, 0x08000, CRC(9ea9183b) SHA1(55f54575cd662b6194f69532baa25c9b2272760f) )
ROM_LOAD( "M-GF_A9.16A.27256", 0x08000, 0x08000, CRC(61ab715f) SHA1(6b9cccaa83a9a9e44a46bae796e2f9eaa9f9c951) )
- ROM_REGION( 0x0300, "proms", 0 )
+ ROM_REGION( 0x0300, "proms", 0 )
ROM_LOAD( "tbp24s10n.1", 0x0000, 0x0100, NO_DUMP )
ROM_LOAD( "tbp24s10n.2", 0x0100, 0x0100, NO_DUMP )
ROM_LOAD( "tbp24s10n.2", 0x0200, 0x0100, NO_DUMP )
diff --git a/src/mame/drivers/cybiko.cpp b/src/mame/drivers/cybiko.cpp
index a6abc4389f1..16501fbb581 100644
--- a/src/mame/drivers/cybiko.cpp
+++ b/src/mame/drivers/cybiko.cpp
@@ -60,7 +60,7 @@ ToDo:
static ADDRESS_MAP_START( cybikov1_mem, AS_PROGRAM, 16, cybiko_state )
AM_RANGE( 0x000000, 0x007fff ) AM_ROM
AM_RANGE( 0x600000, 0x600001 ) AM_READWRITE( cybiko_lcd_r, cybiko_lcd_w )
-// AM_RANGE( 0xe00000, 0xe07fff ) AM_READ( cybikov1_key_r )
+// AM_RANGE( 0xe00000, 0xe07fff ) AM_READ( cybikov1_key_r )
ADDRESS_MAP_END
/*
diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp
index b78e1ca8b45..6e4e753b928 100644
--- a/src/mame/drivers/dec0.cpp
+++ b/src/mame/drivers/dec0.cpp
@@ -1303,7 +1303,7 @@ static MACHINE_CONFIG_START( dec0_base, dec0_state )
MCFG_DEVICE_ADD("spritegen", DECO_MXC06, 0)
MCFG_DECO_MXC06_GFX_REGION(3)
MCFG_DECO_MXC06_GFXDECODE("gfxdecode")
-
+
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/deco_ld.cpp b/src/mame/drivers/deco_ld.cpp
index 3765aa5230e..5c2c1a5a282 100644
--- a/src/mame/drivers/deco_ld.cpp
+++ b/src/mame/drivers/deco_ld.cpp
@@ -494,10 +494,10 @@ static MACHINE_CONFIG_START( rblaster, deco_ld_state )
/* sound hardware */
/* TODO: mixing */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
-
+
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_8_ADD("soundlatch2")
-
+
MCFG_SOUND_ADD("ay1", AY8910, 1500000)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25)
diff --git a/src/mame/drivers/fcscsi.cpp b/src/mame/drivers/fcscsi.cpp
index 2c3f696b341..ea7083a46e7 100644
--- a/src/mame/drivers/fcscsi.cpp
+++ b/src/mame/drivers/fcscsi.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Joakim Larsson Edstrom
/***************************************************************************
- * Interrupt scheme and dmac hookup shamelessly based on esq5505.cpp
+ * Interrupt scheme and dmac hookup shamelessly based on esq5505.cpp
*
* 11/04/2016
* Force SYS68K ISCSI-1 driver - This driver will be converted into a slot device once the VME bus driver exists.
@@ -15,7 +15,7 @@
* ----------------------------------------------------------
* 00 0000 - 00 0007 Initialisation vectors from system EPROM
* 00 0008 - 00 1FFF Local SRAM
- * 00 2000 - 01 FFFF Dynamic Dual Port RAM
+ * 00 2000 - 01 FFFF Dynamic Dual Port RAM
* C4 0000 - C4 001F SCSIbus controller
* C8 0000 - C8 00FF DMAC
* CC 0000 - CC 0007 FDC
@@ -160,7 +160,7 @@ READ16_MEMBER (fcscsi1_state::bootvect_r){
return m_sysrom [offset];
}
-/* The Control Register - descretelly implemented on the PCB
+/* The Control Register - descretelly implemented on the PCB
Bit #: 7 6 5 4 3 2 1 0
\ \ \ \ \ \ \ \ Floppy Disk Side Select
\ \ \ \ \ \ \ Floppy Disk Drive Select 0
@@ -169,7 +169,7 @@ Bit #: 7 6 5 4 3 2 1 0
\ \ \ \ Floppy Disk Drive Select 3
\ \ \ ISCSI-l I.D. Bit #0
\ \ ISCSI-l I.D. Bit #1
- \ ISCSI-l 1.D. Bit #2
+ \ ISCSI-l 1.D. Bit #2
*/
READ8_MEMBER (fcscsi1_state::tcr_r){
@@ -257,7 +257,7 @@ WRITE8_MEMBER (fcscsi1_state::not_implemented_w){
/*
----------------------------------------------------
- IRQ IRQ
+ IRQ IRQ
Level Source B4l inserted B4l removed (Def)
-----------------------------------------------------
1 P3 Pin #13 AV1 Autovector AV1 Autovector
@@ -265,10 +265,10 @@ Level Source B4l inserted B4l removed (Def)
3 SCSIBC AV3 Autovector AV3 Autovector
4 FDC AV4 Autovector AV4 Autovector
5 PI/T Timer PI/T Timer Vect PI/T Timer Vect
- 6 -- -- --
+ 6 -- -- --
7 PI/T Port PI/T Port Vect PI/T Port Vect
------------------------------------------------------
-Default configuration: B41 jumper removed
+Default configuration: B41 jumper removed
The PI/T port interrupt can be used under software control to
cause non-maskable (Level 7) interrupts if the watchdog timer
diff --git a/src/mame/drivers/gba.cpp b/src/mame/drivers/gba.cpp
index 64620d1f156..4a8cae101e5 100644
--- a/src/mame/drivers/gba.cpp
+++ b/src/mame/drivers/gba.cpp
@@ -2109,7 +2109,7 @@ void gba_state::machine_start()
m_maincpu->space(AS_PROGRAM).install_read_bank(0x08000000, 0x09ffffff, 0, 0, "rom1");
m_maincpu->space(AS_PROGRAM).install_read_bank(0x0a000000, 0x0bffffff, 0, 0, "rom2");
m_maincpu->space(AS_PROGRAM).install_read_bank(0x0c000000, 0x0cffffff, 0, 0, "rom3");
-
+
std::string region_tag;
memory_region *cart_rom = memregion(region_tag.assign(m_cart->tag()).append(GBASLOT_ROM_REGION_TAG).c_str());
@@ -2118,7 +2118,7 @@ void gba_state::machine_start()
membank("rom2")->set_base(cart_rom->base());
membank("rom3")->set_base(cart_rom->base());
-
+
// add nvram to save state
m_cart->save_nvram();
@@ -2151,7 +2151,7 @@ void gba_state::machine_start()
memory_region *cart_romhlp = memregion(region_tag.assign(m_cart->tag()).append(GBAHELP_ROM_REGION_TAG).c_str());
membank("rom1")->set_base(cart_romhlp->base());
}
-
+
}
save_item(NAME(m_DISPSTAT));
diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp
index aed5c928dbe..508435f122a 100644
--- a/src/mame/drivers/goldstar.cpp
+++ b/src/mame/drivers/goldstar.cpp
@@ -887,16 +887,16 @@ static ADDRESS_MAP_START( flaming7_map, AS_PROGRAM, 8, goldstar_state )
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_SHARE("fg_atrram")
AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_SHARE("reel1_ram")
-// AM_RANGE(0x9a00, 0x9fff) AM_RAM
+// AM_RANGE(0x9a00, 0x9fff) AM_RAM
AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_SHARE("reel2_ram")
-// AM_RANGE(0xa200, 0xa7ff) AM_RAM
+// AM_RANGE(0xa200, 0xa7ff) AM_RAM
AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_SHARE("reel3_ram")
-// AM_RANGE(0xaa00, 0xafff) AM_RAM
+// AM_RANGE(0xaa00, 0xafff) AM_RAM
-// AM_RANGE(0xb000, 0xb03f) AM_RAM
+// AM_RANGE(0xb000, 0xb03f) AM_RAM
AM_RANGE(0xb040, 0xb07f) AM_RAM AM_SHARE("reel1_scroll")
AM_RANGE(0xb080, 0xb0bf) AM_RAM AM_SHARE("reel2_scroll")
-// AM_RANGE(0xb0c0, 0xb0ff) AM_RAM
+// AM_RANGE(0xb0c0, 0xb0ff) AM_RAM
AM_RANGE(0xb100, 0xb17f) AM_RAM AM_SHARE("reel3_scroll")
AM_RANGE(0xb180, 0xb7ff) AM_RAM
@@ -908,12 +908,12 @@ static ADDRESS_MAP_START( flaming7_map, AS_PROGRAM, 8, goldstar_state )
AM_RANGE(0xb850, 0xb850) AM_WRITE(p1_lamps_w)
AM_RANGE(0xb860, 0xb860) AM_WRITE(p2_lamps_w)
AM_RANGE(0xb870, 0xb870) AM_DEVWRITE("snsnd", sn76489_device, write) /* sound */
-// AM_RANGE(0xc000, 0xd3ff) AM_RAM
+// AM_RANGE(0xc000, 0xd3ff) AM_RAM
AM_RANGE(0xf800, 0xffff) AM_RAM
ADDRESS_MAP_END
/*
W 9A00-B7FF FF
- RW B000-B7FF 00
+ RW B000-B7FF 00
*/
@@ -8179,7 +8179,7 @@ static MACHINE_CONFIG_DERIVED( flaming7, lucky8 )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(flaming7_map)
-// MCFG_CPU_IO_MAP(flaming7_readport)
+// MCFG_CPU_IO_MAP(flaming7_readport)
MACHINE_CONFIG_END
@@ -10827,7 +10827,7 @@ ROM_END
/*
New Lucky 8 Lines / New Super 8 Lines (W-4, Witch Bonus)
-
+
CPUs
1x Z80 (11b) - 8-bit Microprocessor - main (missing).
3x iD8255A-5 (7b, 8b, 9b) - Programmable Peripheral Interface.
@@ -10836,7 +10836,7 @@ ROM_END
1x uPC1181 (0a) - Audio Amplifier - sound.
ROMs
- 4x AM27C64 (1-4) dumped.
+ 4x AM27C64 (1-4) dumped.
4x M27C256B (5-8) dumped.
3x AM27S21APC (1, 2, 3) dumped.
3x N82S123AN (4, 5) dumped.
@@ -10991,11 +10991,11 @@ ROM_END
Silkscreened: LUCKY97-1.
06/07/1993.
TAIWAN.
-
+
GFX ROMs 1, 2, 3, 4 are double size. Each half matches the set ns8lines.
GFX ROMs 5, 6, 7 match the ns8lines set.
- Program ROM is different.
+ Program ROM is different.
*/
ROM_START( ns8linesa )
ROM_REGION( 0x8000, "maincpu", 0 )
@@ -14072,7 +14072,7 @@ ROM_END
graphics sets in their respective order...
-------------------------------------------------------------------
-
+
Tech Notes:
PCB has some hacks...
diff --git a/src/mame/drivers/harddriv.cpp b/src/mame/drivers/harddriv.cpp
index d8212707109..983517a5acc 100644
--- a/src/mame/drivers/harddriv.cpp
+++ b/src/mame/drivers/harddriv.cpp
@@ -5010,7 +5010,7 @@ void harddriv_state::init_racedrivc_panorama_side()
// m_gsp->space(AS_PROGRAM).install_write_handler(0xfff76f60, 0xfff76f6f, write16_delegate(FUNC(harddriv_state::rdgsp_speedup1_w), this));
// m_gsp->space(AS_PROGRAM).install_read_handler(0xfff76f60, 0xfff76f6f, read16_delegate(FUNC(harddriv_state::rdgsp_speedup1_r), this));
// m_gsp_speedup_pc = 0xfff43a00;
-// m_gsp_speedup_addr[0] = (UINT16 *)(m_gsp_vram + ((0xfff76f60 - 0xffc00000) >> 3));
+// m_gsp_speedup_addr[0] = (UINT16 *)(m_gsp_vram + ((0xfff76f60 - 0xffc00000) >> 3));
/* set up adsp speedup handlers */
m_adsp->space(AS_DATA).install_read_handler(0x1fff, 0x1fff, read16_delegate(FUNC(harddriv_state::hdadsp_speedup_r), this));
diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp
index d86910a77f8..16c189ca360 100644
--- a/src/mame/drivers/hh_tms1k.cpp
+++ b/src/mame/drivers/hh_tms1k.cpp
@@ -3626,7 +3626,7 @@ MACHINE_CONFIG_END
* TMS1000NLL MP3208 (die label 1000C, MP3208)
* SN75494N (acting as inverters), SN76477 sound
* 4 sliding buttons, light bulb
-
+
This is a 2-player electronic board game. It still needs game pieces like the
original Battleship board game.
@@ -3653,7 +3653,7 @@ WRITE16_MEMBER(bship_state::write_r)
{
// R0-R10: input mux
m_inp_mux = data;
-
+
// R4: 75494 to R12 33K to SN76477 pin 20
m_sn->slf_res_w((data & 0x10) ? RES_INF : RES_K(33));
}
@@ -3664,7 +3664,7 @@ WRITE16_MEMBER(bship_state::write_o)
// O0: SN76477 pin 9
m_sn->enable_w(data & 1);
-
+
// O1: 75494 to R4 100K to SN76477 pin 18
// O2: 75494 to R3 150K to SN76477 pin 18
double o12 = RES_INF;
@@ -3676,19 +3676,19 @@ WRITE16_MEMBER(bship_state::write_o)
case 3: o12 = RES_2_PARALLEL(RES_K(100), RES_K(150)); break;
}
m_sn->vco_res_w(o12);
-
+
// O2,O6: (TODO) to SN76477 pin 21
//m_sn->slf_cap_w(x);
-
+
// O4: SN76477 pin 22
m_sn->vco_w(data >> 4 & 1);
-
+
// O5: R11 27K to SN76477 pin 23
m_sn->one_shot_cap_w((data & 0x20) ? RES_K(27) : RES_INF);
-
+
// O6: SN76477 pin 25
m_sn->mixer_b_w(data >> 6 & 1);
-
+
// O7: 75494 to light bulb
display_matrix(1, 1, data >> 7 & 1, 1);
}
diff --git a/src/mame/drivers/hk68v10.cpp b/src/mame/drivers/hk68v10.cpp
index e3705319864..5dbdc0b8346 100644
--- a/src/mame/drivers/hk68v10.cpp
+++ b/src/mame/drivers/hk68v10.cpp
@@ -366,13 +366,13 @@ ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e6869
* Setup sequence channel B
* 00
* 04 4C - x16 clock, 2 stop bits, no parity
- * 05 EA -
+ * 05 EA -
* 03 E1 - 8 bit, receiver enable, auto enable on
* 09 00 - no reset
- * 01 00
+ * 01 00
* 0B 56
- * 0C 0B - low baudrate divider
- * 0D 00 - hi baudrate divider
+ * 0C 0B - low baudrate divider
+ * 0D 00 - hi baudrate divider
* 0E 03 - Baud Rate Generator enabled, PCLK is source
*/
ROM_END
diff --git a/src/mame/drivers/hp9845.cpp b/src/mame/drivers/hp9845.cpp
index 2450f760099..748ea998ef3 100644
--- a/src/mame/drivers/hp9845.cpp
+++ b/src/mame/drivers/hp9845.cpp
@@ -104,9 +104,9 @@ public:
driver_device(mconfig, type, tag),
m_lpu(*this , "lpu"),
m_ppu(*this , "ppu"),
- m_screen(*this , "screen"),
+ m_screen(*this , "screen"),
m_palette(*this , "palette"),
- m_gv_timer(*this , "gv_timer"),
+ m_gv_timer(*this , "gv_timer"),
m_io_key0(*this , "KEY0"),
m_io_key1(*this , "KEY1"),
m_io_key2(*this , "KEY2"),
@@ -120,16 +120,16 @@ public:
virtual void machine_reset() override;
TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
- TIMER_DEVICE_CALLBACK_MEMBER(gv_timer);
+ TIMER_DEVICE_CALLBACK_MEMBER(gv_timer);
void vblank_w(screen_device &screen, bool state);
- void set_graphic_mode(bool graphic);
+ void set_graphic_mode(bool graphic);
DECLARE_READ16_MEMBER(graphic_r);
DECLARE_WRITE16_MEMBER(graphic_w);
- attotime time_to_gv_mem_availability(void) const;
- void advance_gv_fsm(bool ds , bool trigger);
- void update_graphic_bits(void);
+ attotime time_to_gv_mem_availability(void) const;
+ void advance_gv_fsm(bool ds , bool trigger);
+ void update_graphic_bits(void);
IRQ_CALLBACK_MEMBER(irq_callback);
void update_irq(void);
@@ -148,9 +148,9 @@ public:
private:
required_device<hp_5061_3001_cpu_device> m_lpu;
required_device<hp_5061_3001_cpu_device> m_ppu;
- required_device<screen_device> m_screen;
+ required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
- required_device<timer_device> m_gv_timer;
+ required_device<timer_device> m_gv_timer;
required_ioport m_io_key0;
required_ioport m_io_key1;
required_ioport m_io_key2;
@@ -160,7 +160,7 @@ private:
void set_video_mar(UINT16 mar);
void video_fill_buff(bool buff_idx);
void video_render_buff(unsigned video_scanline , unsigned line_in_row, bool buff_idx);
- void graphic_video_render(unsigned video_scanline);
+ void graphic_video_render(unsigned video_scanline);
// Character generator
const UINT8 *m_chargen;
@@ -176,41 +176,41 @@ private:
offs_t m_video_mar;
UINT16 m_video_word;
bool m_video_load_mar;
- bool m_video_first_mar;
+ bool m_video_first_mar;
bool m_video_byte_idx;
UINT8 m_video_attr;
bool m_video_buff_idx;
bool m_video_blanked;
video_buffer_t m_video_buff[ 2 ];
- // Graphic video
- typedef enum {
- GV_STAT_RESET,
- GV_STAT_WAIT_DS_0 = GV_STAT_RESET,
- GV_STAT_WAIT_TRIG_0,
- GV_STAT_WAIT_MEM_0,
- GV_STAT_WAIT_DS_1,
- GV_STAT_WAIT_DS_2,
- GV_STAT_WAIT_TRIG_1,
- GV_STAT_WAIT_MEM_1,
- GV_STAT_WAIT_MEM_2
- } gv_fsm_state_t;
-
- bool m_graphic_sel;
- gv_fsm_state_t m_gv_fsm_state;
- bool m_gv_int_en;
- bool m_gv_dma_en;
- bool m_gv_ready;
- UINT8 m_gv_cmd; // U65 (GC)
- UINT16 m_gv_data_w; // U29, U45, U28 & U44 (GC)
- UINT16 m_gv_data_r; // U59 & U60 (GC)
- UINT16 m_gv_io_counter; // U1, U2, U14 & U15 (GC)
- UINT16 m_gv_cursor_w; // U38 & U39 (GS)
- UINT16 m_gv_cursor_x; // U31 & U23 (GS)
- UINT16 m_gv_cursor_y; // U15 & U8 (GS)
- bool m_gv_cursor_gc; // U8 (GS)
- bool m_gv_cursor_fs; // U8 (GS)
- std::vector<UINT16> m_graphic_mem;
+ // Graphic video
+ typedef enum {
+ GV_STAT_RESET,
+ GV_STAT_WAIT_DS_0 = GV_STAT_RESET,
+ GV_STAT_WAIT_TRIG_0,
+ GV_STAT_WAIT_MEM_0,
+ GV_STAT_WAIT_DS_1,
+ GV_STAT_WAIT_DS_2,
+ GV_STAT_WAIT_TRIG_1,
+ GV_STAT_WAIT_MEM_1,
+ GV_STAT_WAIT_MEM_2
+ } gv_fsm_state_t;
+
+ bool m_graphic_sel;
+ gv_fsm_state_t m_gv_fsm_state;
+ bool m_gv_int_en;
+ bool m_gv_dma_en;
+ bool m_gv_ready;
+ UINT8 m_gv_cmd; // U65 (GC)
+ UINT16 m_gv_data_w; // U29, U45, U28 & U44 (GC)
+ UINT16 m_gv_data_r; // U59 & U60 (GC)
+ UINT16 m_gv_io_counter; // U1, U2, U14 & U15 (GC)
+ UINT16 m_gv_cursor_w; // U38 & U39 (GS)
+ UINT16 m_gv_cursor_x; // U31 & U23 (GS)
+ UINT16 m_gv_cursor_y; // U15 & U8 (GS)
+ bool m_gv_cursor_gc; // U8 (GS)
+ bool m_gv_cursor_fs; // U8 (GS)
+ std::vector<UINT16> m_graphic_mem;
// Interrupt handling
UINT8 m_irl_pending;
@@ -373,11 +373,11 @@ UINT32 hp9845_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
UINT32 hp9845b_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- if (m_graphic_sel) {
- copybitmap(bitmap, m_bitmap, 0, 0, GVIDEO_HBEND, GVIDEO_VBEND, cliprect);
- } else {
- copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect);
- }
+ if (m_graphic_sel) {
+ copybitmap(bitmap, m_bitmap, 0, 0, GVIDEO_HBEND, GVIDEO_VBEND, cliprect);
+ } else {
+ copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect);
+ }
return 0;
}
@@ -388,7 +388,7 @@ void hp9845b_state::machine_start()
m_chargen = memregion("chargen")->base();
- m_graphic_mem.resize(GVIDEO_MEM_SIZE);
+ m_graphic_mem.resize(GVIDEO_MEM_SIZE);
}
void hp9845b_state::machine_reset()
@@ -399,16 +399,16 @@ void hp9845b_state::machine_reset()
// Some sensible defaults
m_video_mar = VIDEO_BUFFER_BASE;
m_video_load_mar = false;
- m_video_first_mar = false;
+ m_video_first_mar = false;
m_video_byte_idx = false;
m_video_attr = 0;
m_video_buff_idx = false;
m_video_blanked = false;
- m_graphic_sel = false;
- m_gv_fsm_state = GV_STAT_RESET;
- m_gv_int_en = false;
- m_gv_dma_en = false;
- m_gv_ready = true;
+ m_graphic_sel = false;
+ m_gv_fsm_state = GV_STAT_RESET;
+ m_gv_int_en = false;
+ m_gv_dma_en = false;
+ m_gv_ready = true;
m_irl_pending = 0;
m_irh_pending = 0;
@@ -441,10 +441,10 @@ void hp9845b_state::video_fill_buff(bool buff_idx)
m_video_word = prog_space.read_word(m_video_mar << 1);
if (m_video_load_mar) {
// Load new address into MAR after start of a new frame or NWA instruction
- if (m_video_first_mar) {
- set_graphic_mode(!BIT(m_video_word , 15));
- m_video_first_mar = false;
- }
+ if (m_video_first_mar) {
+ set_graphic_mode(!BIT(m_video_word , 15));
+ m_video_first_mar = false;
+ }
set_video_mar(~m_video_word);
m_video_load_mar = false;
continue;
@@ -492,17 +492,17 @@ void hp9845b_state::video_render_buff(unsigned video_scanline , unsigned line_in
m_video_blanked = true;
}
- const pen_t *pen = m_palette->pens();
+ const pen_t *pen = m_palette->pens();
if (m_video_blanked) {
- // Blank scanline
- for (unsigned i = 0; i < VIDEO_HBSTART; i++) {
- m_bitmap.pix32(video_scanline , i) = pen[ 0 ];
- }
+ // Blank scanline
+ for (unsigned i = 0; i < VIDEO_HBSTART; i++) {
+ m_bitmap.pix32(video_scanline , i) = pen[ 0 ];
+ }
} else {
bool cursor_line = line_in_row == 12;
bool ul_line = line_in_row == 14;
- unsigned video_frame = (unsigned)m_screen->frame_number();
+ unsigned video_frame = (unsigned)m_screen->frame_number();
bool cursor_blink = BIT(video_frame , 3);
bool char_blink = BIT(video_frame , 4);
@@ -539,375 +539,375 @@ void hp9845b_state::video_render_buff(unsigned video_scanline , unsigned line_in
TIMER_DEVICE_CALLBACK_MEMBER(hp9845b_state::scanline_timer)
{
- unsigned video_scanline = param;
-
- if (m_graphic_sel) {
- if (video_scanline >= GVIDEO_VBEND && video_scanline < GVIDEO_VBSTART) {
- graphic_video_render(video_scanline);
- }
- } else if (video_scanline < VIDEO_ACTIVE_SCANLINES) {
- unsigned row = video_scanline / VIDEO_CHAR_HEIGHT;
- unsigned line_in_row = video_scanline - row * VIDEO_CHAR_HEIGHT;
-
- if (line_in_row == 0) {
- // Start of new row, swap buffers
- m_video_buff_idx = !m_video_buff_idx;
- video_fill_buff(!m_video_buff_idx);
- }
-
- video_render_buff(video_scanline , line_in_row , m_video_buff_idx);
- }
+ unsigned video_scanline = param;
+
+ if (m_graphic_sel) {
+ if (video_scanline >= GVIDEO_VBEND && video_scanline < GVIDEO_VBSTART) {
+ graphic_video_render(video_scanline);
+ }
+ } else if (video_scanline < VIDEO_ACTIVE_SCANLINES) {
+ unsigned row = video_scanline / VIDEO_CHAR_HEIGHT;
+ unsigned line_in_row = video_scanline - row * VIDEO_CHAR_HEIGHT;
+
+ if (line_in_row == 0) {
+ // Start of new row, swap buffers
+ m_video_buff_idx = !m_video_buff_idx;
+ video_fill_buff(!m_video_buff_idx);
+ }
+
+ video_render_buff(video_scanline , line_in_row , m_video_buff_idx);
+ }
}
TIMER_DEVICE_CALLBACK_MEMBER(hp9845b_state::gv_timer)
{
- advance_gv_fsm(false , false);
+ advance_gv_fsm(false , false);
}
void hp9845b_state::vblank_w(screen_device &screen, bool state)
{
- // VBlank signal is fed into HALT flag of PPU
- m_ppu->halt_w(state);
-
- if (state) {
- // Start of V blank
- set_video_mar(0);
- m_video_load_mar = true;
- m_video_first_mar = true;
- m_video_byte_idx = false;
- m_video_blanked = false;
- m_video_buff_idx = !m_video_buff_idx;
- video_fill_buff(!m_video_buff_idx);
- }
+ // VBlank signal is fed into HALT flag of PPU
+ m_ppu->halt_w(state);
+
+ if (state) {
+ // Start of V blank
+ set_video_mar(0);
+ m_video_load_mar = true;
+ m_video_first_mar = true;
+ m_video_byte_idx = false;
+ m_video_blanked = false;
+ m_video_buff_idx = !m_video_buff_idx;
+ video_fill_buff(!m_video_buff_idx);
+ }
}
void hp9845b_state::set_graphic_mode(bool graphic)
{
- if (graphic != m_graphic_sel) {
- m_graphic_sel = graphic;
- logerror("GS=%d\n" , graphic);
- if (m_graphic_sel) {
- m_screen->configure(GVIDEO_HTOTAL , GVIDEO_VTOTAL , rectangle(GVIDEO_HBEND , GVIDEO_HBSTART - 1 , GVIDEO_VBEND , GVIDEO_VBSTART - 1) , HZ_TO_ATTOSECONDS(VIDEO_PIXEL_CLOCK) * GVIDEO_HTOTAL * GVIDEO_VTOTAL);
- } else {
- m_screen->configure(VIDEO_HTOTAL , VIDEO_VTOTAL , rectangle(0 , VIDEO_HBSTART - 1 , 0 , VIDEO_ACTIVE_SCANLINES - 1) , HZ_TO_ATTOSECONDS(VIDEO_PIXEL_CLOCK) * VIDEO_HTOTAL * VIDEO_VTOTAL);
- }
- }
+ if (graphic != m_graphic_sel) {
+ m_graphic_sel = graphic;
+ logerror("GS=%d\n" , graphic);
+ if (m_graphic_sel) {
+ m_screen->configure(GVIDEO_HTOTAL , GVIDEO_VTOTAL , rectangle(GVIDEO_HBEND , GVIDEO_HBSTART - 1 , GVIDEO_VBEND , GVIDEO_VBSTART - 1) , HZ_TO_ATTOSECONDS(VIDEO_PIXEL_CLOCK) * GVIDEO_HTOTAL * GVIDEO_VTOTAL);
+ } else {
+ m_screen->configure(VIDEO_HTOTAL , VIDEO_VTOTAL , rectangle(0 , VIDEO_HBSTART - 1 , 0 , VIDEO_ACTIVE_SCANLINES - 1) , HZ_TO_ATTOSECONDS(VIDEO_PIXEL_CLOCK) * VIDEO_HTOTAL * VIDEO_VTOTAL);
+ }
+ }
}
READ16_MEMBER(hp9845b_state::graphic_r)
{
- UINT16 res = 0;
-
- switch (offset) {
- case 0:
- // R4: data register
- res = m_gv_data_r;
- advance_gv_fsm(true , false);
- break;
-
- case 1:
- // R5: status register
- if (m_gv_int_en) {
- BIT_SET(res, 7);
- }
- if (m_gv_dma_en) {
- BIT_SET(res, 6);
- }
- BIT_SET(res, 5);
- break;
-
- case 2:
- // R6: data register with DMA TC
- m_gv_dma_en = false;
- res = m_gv_data_r;
- advance_gv_fsm(true , false);
- break;
-
- case 3:
- // R7: not mapped
- break;
- }
-
- //logerror("rd gv R%u = %04x\n", 4 + offset , res);
-
- return res;
+ UINT16 res = 0;
+
+ switch (offset) {
+ case 0:
+ // R4: data register
+ res = m_gv_data_r;
+ advance_gv_fsm(true , false);
+ break;
+
+ case 1:
+ // R5: status register
+ if (m_gv_int_en) {
+ BIT_SET(res, 7);
+ }
+ if (m_gv_dma_en) {
+ BIT_SET(res, 6);
+ }
+ BIT_SET(res, 5);
+ break;
+
+ case 2:
+ // R6: data register with DMA TC
+ m_gv_dma_en = false;
+ res = m_gv_data_r;
+ advance_gv_fsm(true , false);
+ break;
+
+ case 3:
+ // R7: not mapped
+ break;
+ }
+
+ //logerror("rd gv R%u = %04x\n", 4 + offset , res);
+
+ return res;
}
WRITE16_MEMBER(hp9845b_state::graphic_w)
{
- //logerror("wr gv R%u = %04x\n", 4 + offset , data);
-
- switch (offset) {
- case 0:
- // R4: data register
- m_gv_data_w = data;
- m_gv_cursor_w = data;
- advance_gv_fsm(true , false);
- break;
-
- case 1:
- // R5: command register
- m_gv_cmd = (UINT8)(data & 0xf);
- if (BIT(data , 5)) {
- m_gv_fsm_state = GV_STAT_RESET;
- }
- m_gv_dma_en = BIT(data , 6) != 0;
- m_gv_int_en = BIT(data , 7) != 0;
- advance_gv_fsm(false , false);
- break;
-
- case 2:
- // R6: data register with DMA TC
- m_gv_dma_en = false;
- m_gv_data_w = data;
- m_gv_cursor_w = data;
- advance_gv_fsm(true , false);
- break;
-
- case 3:
- // R7: trigger
- advance_gv_fsm(false , true);
- break;
- }
+ //logerror("wr gv R%u = %04x\n", 4 + offset , data);
+
+ switch (offset) {
+ case 0:
+ // R4: data register
+ m_gv_data_w = data;
+ m_gv_cursor_w = data;
+ advance_gv_fsm(true , false);
+ break;
+
+ case 1:
+ // R5: command register
+ m_gv_cmd = (UINT8)(data & 0xf);
+ if (BIT(data , 5)) {
+ m_gv_fsm_state = GV_STAT_RESET;
+ }
+ m_gv_dma_en = BIT(data , 6) != 0;
+ m_gv_int_en = BIT(data , 7) != 0;
+ advance_gv_fsm(false , false);
+ break;
+
+ case 2:
+ // R6: data register with DMA TC
+ m_gv_dma_en = false;
+ m_gv_data_w = data;
+ m_gv_cursor_w = data;
+ advance_gv_fsm(true , false);
+ break;
+
+ case 3:
+ // R7: trigger
+ advance_gv_fsm(false , true);
+ break;
+ }
}
attotime hp9845b_state::time_to_gv_mem_availability(void) const
{
- if (m_graphic_sel) {
- int hpos = m_screen->hpos();
- if (hpos < (34 - GVIDEO_HCNT_OFF) || hpos >= (628 - GVIDEO_HCNT_OFF)) {
- // Access to graphic memory available now
- return attotime::zero;
- } else {
- // Wait until start of hblank
- return m_screen->time_until_pos(m_screen->vpos() , 628);
- }
- } else {
- // TODO:
- return attotime::zero;
- }
+ if (m_graphic_sel) {
+ int hpos = m_screen->hpos();
+ if (hpos < (34 - GVIDEO_HCNT_OFF) || hpos >= (628 - GVIDEO_HCNT_OFF)) {
+ // Access to graphic memory available now
+ return attotime::zero;
+ } else {
+ // Wait until start of hblank
+ return m_screen->time_until_pos(m_screen->vpos() , 628);
+ }
+ } else {
+ // TODO:
+ return attotime::zero;
+ }
}
void hp9845b_state::advance_gv_fsm(bool ds , bool trigger)
{
- bool get_out = false;
-
- attotime time_mem_av;
-
- do {
- bool act_trig = trigger || m_gv_dma_en || !BIT(m_gv_cmd , 2);
-
- switch (m_gv_fsm_state) {
- case GV_STAT_WAIT_DS_0:
- if ((m_gv_cmd & 0xc) == 0xc) {
- // Read command (11xx)
- m_gv_fsm_state = GV_STAT_WAIT_MEM_0;
- } else if (ds) {
- // Wait for data strobe (r/w on r4 or r6)
- m_gv_fsm_state = GV_STAT_WAIT_TRIG_0;
- } else {
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_TRIG_0:
- // Wait for trigger
- if (act_trig) {
- if (BIT(m_gv_cmd , 3)) {
- // Not a cursor command
- // Load memory address
- m_gv_io_counter = ~m_gv_data_w & GVIDEO_ADDR_MASK;
- // Write commands (10xx)
- m_gv_fsm_state = GV_STAT_WAIT_DS_2;
- } else {
- // Cursor command (0xxx)
- if (BIT(m_gv_cmd , 2)) {
- // Write X cursor position (01xx)
- m_gv_cursor_x = (~m_gv_cursor_w >> 6) & 0x3ff;
- //logerror("gv x curs pos = %u\n" , m_gv_cursor_x);
- } else {
- // Write Y cursor position and type (00xx)
- m_gv_cursor_y = (~m_gv_cursor_w >> 6) & 0x1ff;
- m_gv_cursor_gc = BIT(m_gv_cmd , 1) == 0;
- m_gv_cursor_fs = BIT(m_gv_cmd , 0) != 0;
- //logerror("gv y curs pos = %u gc = %d fs = %d\n" , m_gv_cursor_y , m_gv_cursor_gc , m_gv_cursor_fs);
- }
- m_gv_fsm_state = GV_STAT_WAIT_DS_0;
- }
- } else {
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_MEM_0:
- time_mem_av = time_to_gv_mem_availability();
- if (time_mem_av.is_zero()) {
- // Read a word from graphic memory
- m_gv_data_r = m_graphic_mem[ m_gv_io_counter ];
- //logerror("rd gv mem @%04x = %04x\n" , m_gv_io_counter , m_gv_data_r);
- m_gv_io_counter = (m_gv_io_counter + 1) & GVIDEO_ADDR_MASK;
- m_gv_fsm_state = GV_STAT_WAIT_DS_1;
- } else {
- m_gv_timer->adjust(time_mem_av);
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_DS_1:
- if (ds) {
- m_gv_fsm_state = GV_STAT_WAIT_MEM_0;
- } else {
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_DS_2:
- // Wait for data word to be written
- if (ds) {
- m_gv_fsm_state = GV_STAT_WAIT_TRIG_1;
- } else {
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_TRIG_1:
- // Wait for trigger
- if (act_trig) {
- if (BIT(m_gv_cmd , 1)) {
- // Clear words (101x)
- m_gv_data_w = 0;
- m_gv_fsm_state = GV_STAT_WAIT_MEM_1;
- } else if (BIT(m_gv_cmd , 0)) {
- // Write a single pixel (1001)
- m_gv_fsm_state = GV_STAT_WAIT_MEM_2;
- } else {
- // Write words (1000)
- m_gv_fsm_state = GV_STAT_WAIT_MEM_1;
- }
- } else {
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_MEM_1:
- time_mem_av = time_to_gv_mem_availability();
- if (time_mem_av.is_zero()) {
- // Write a full word to graphic memory
- //logerror("wr gv mem @%04x = %04x\n" , m_gv_io_counter , m_gv_data_w);
- m_graphic_mem[ m_gv_io_counter ] = m_gv_data_w;
- m_gv_io_counter = (m_gv_io_counter + 1) & GVIDEO_ADDR_MASK;
- m_gv_fsm_state = GV_STAT_WAIT_DS_2;
- } else {
- m_gv_timer->adjust(time_mem_av);
- get_out = true;
- }
- break;
-
- case GV_STAT_WAIT_MEM_2:
- time_mem_av = time_to_gv_mem_availability();
- if (time_mem_av.is_zero()) {
- // Write a single pixel to graphic memory
- //logerror("wr gv pixel @%04x:%x = %d\n" , m_gv_io_counter , m_gv_data_w & 0xf , BIT(m_gv_data_w , 15));
- UINT16 mask = 0x8000 >> (m_gv_data_w & 0xf);
- if (BIT(m_gv_data_w , 15)) {
- // Set pixel
- m_graphic_mem[ m_gv_io_counter ] |= mask;
- } else {
- // Clear pixel
- m_graphic_mem[ m_gv_io_counter ] &= ~mask;
- }
- // Not really needed
- m_gv_io_counter = (m_gv_io_counter + 1) & GVIDEO_ADDR_MASK;
- m_gv_fsm_state = GV_STAT_WAIT_DS_0;
- } else {
- m_gv_timer->adjust(time_mem_av);
- get_out = true;
- }
- break;
-
- default:
- logerror("Invalid state reached %d\n" , m_gv_fsm_state);
- m_gv_fsm_state = GV_STAT_RESET;
- }
-
- ds = false;
- trigger = false;
- } while (!get_out);
-
- update_graphic_bits();
+ bool get_out = false;
+
+ attotime time_mem_av;
+
+ do {
+ bool act_trig = trigger || m_gv_dma_en || !BIT(m_gv_cmd , 2);
+
+ switch (m_gv_fsm_state) {
+ case GV_STAT_WAIT_DS_0:
+ if ((m_gv_cmd & 0xc) == 0xc) {
+ // Read command (11xx)
+ m_gv_fsm_state = GV_STAT_WAIT_MEM_0;
+ } else if (ds) {
+ // Wait for data strobe (r/w on r4 or r6)
+ m_gv_fsm_state = GV_STAT_WAIT_TRIG_0;
+ } else {
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_TRIG_0:
+ // Wait for trigger
+ if (act_trig) {
+ if (BIT(m_gv_cmd , 3)) {
+ // Not a cursor command
+ // Load memory address
+ m_gv_io_counter = ~m_gv_data_w & GVIDEO_ADDR_MASK;
+ // Write commands (10xx)
+ m_gv_fsm_state = GV_STAT_WAIT_DS_2;
+ } else {
+ // Cursor command (0xxx)
+ if (BIT(m_gv_cmd , 2)) {
+ // Write X cursor position (01xx)
+ m_gv_cursor_x = (~m_gv_cursor_w >> 6) & 0x3ff;
+ //logerror("gv x curs pos = %u\n" , m_gv_cursor_x);
+ } else {
+ // Write Y cursor position and type (00xx)
+ m_gv_cursor_y = (~m_gv_cursor_w >> 6) & 0x1ff;
+ m_gv_cursor_gc = BIT(m_gv_cmd , 1) == 0;
+ m_gv_cursor_fs = BIT(m_gv_cmd , 0) != 0;
+ //logerror("gv y curs pos = %u gc = %d fs = %d\n" , m_gv_cursor_y , m_gv_cursor_gc , m_gv_cursor_fs);
+ }
+ m_gv_fsm_state = GV_STAT_WAIT_DS_0;
+ }
+ } else {
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_MEM_0:
+ time_mem_av = time_to_gv_mem_availability();
+ if (time_mem_av.is_zero()) {
+ // Read a word from graphic memory
+ m_gv_data_r = m_graphic_mem[ m_gv_io_counter ];
+ //logerror("rd gv mem @%04x = %04x\n" , m_gv_io_counter , m_gv_data_r);
+ m_gv_io_counter = (m_gv_io_counter + 1) & GVIDEO_ADDR_MASK;
+ m_gv_fsm_state = GV_STAT_WAIT_DS_1;
+ } else {
+ m_gv_timer->adjust(time_mem_av);
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_DS_1:
+ if (ds) {
+ m_gv_fsm_state = GV_STAT_WAIT_MEM_0;
+ } else {
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_DS_2:
+ // Wait for data word to be written
+ if (ds) {
+ m_gv_fsm_state = GV_STAT_WAIT_TRIG_1;
+ } else {
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_TRIG_1:
+ // Wait for trigger
+ if (act_trig) {
+ if (BIT(m_gv_cmd , 1)) {
+ // Clear words (101x)
+ m_gv_data_w = 0;
+ m_gv_fsm_state = GV_STAT_WAIT_MEM_1;
+ } else if (BIT(m_gv_cmd , 0)) {
+ // Write a single pixel (1001)
+ m_gv_fsm_state = GV_STAT_WAIT_MEM_2;
+ } else {
+ // Write words (1000)
+ m_gv_fsm_state = GV_STAT_WAIT_MEM_1;
+ }
+ } else {
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_MEM_1:
+ time_mem_av = time_to_gv_mem_availability();
+ if (time_mem_av.is_zero()) {
+ // Write a full word to graphic memory
+ //logerror("wr gv mem @%04x = %04x\n" , m_gv_io_counter , m_gv_data_w);
+ m_graphic_mem[ m_gv_io_counter ] = m_gv_data_w;
+ m_gv_io_counter = (m_gv_io_counter + 1) & GVIDEO_ADDR_MASK;
+ m_gv_fsm_state = GV_STAT_WAIT_DS_2;
+ } else {
+ m_gv_timer->adjust(time_mem_av);
+ get_out = true;
+ }
+ break;
+
+ case GV_STAT_WAIT_MEM_2:
+ time_mem_av = time_to_gv_mem_availability();
+ if (time_mem_av.is_zero()) {
+ // Write a single pixel to graphic memory
+ //logerror("wr gv pixel @%04x:%x = %d\n" , m_gv_io_counter , m_gv_data_w & 0xf , BIT(m_gv_data_w , 15));
+ UINT16 mask = 0x8000 >> (m_gv_data_w & 0xf);
+ if (BIT(m_gv_data_w , 15)) {
+ // Set pixel
+ m_graphic_mem[ m_gv_io_counter ] |= mask;
+ } else {
+ // Clear pixel
+ m_graphic_mem[ m_gv_io_counter ] &= ~mask;
+ }
+ // Not really needed
+ m_gv_io_counter = (m_gv_io_counter + 1) & GVIDEO_ADDR_MASK;
+ m_gv_fsm_state = GV_STAT_WAIT_DS_0;
+ } else {
+ m_gv_timer->adjust(time_mem_av);
+ get_out = true;
+ }
+ break;
+
+ default:
+ logerror("Invalid state reached %d\n" , m_gv_fsm_state);
+ m_gv_fsm_state = GV_STAT_RESET;
+ }
+
+ ds = false;
+ trigger = false;
+ } while (!get_out);
+
+ update_graphic_bits();
}
void hp9845b_state::update_graphic_bits(void)
{
- m_gv_ready = m_gv_fsm_state == GV_STAT_WAIT_DS_0 ||
- m_gv_fsm_state == GV_STAT_WAIT_DS_1 ||
- m_gv_fsm_state == GV_STAT_WAIT_DS_2;
+ m_gv_ready = m_gv_fsm_state == GV_STAT_WAIT_DS_0 ||
+ m_gv_fsm_state == GV_STAT_WAIT_DS_1 ||
+ m_gv_fsm_state == GV_STAT_WAIT_DS_2;
- bool irq = m_gv_int_en && !m_gv_dma_en && m_gv_ready;
+ bool irq = m_gv_int_en && !m_gv_dma_en && m_gv_ready;
- if (irq) {
- BIT_SET(m_irh_pending, GVIDEO_PA - 8);
- } else {
- BIT_CLR(m_irh_pending, GVIDEO_PA - 8);
- }
+ if (irq) {
+ BIT_SET(m_irh_pending, GVIDEO_PA - 8);
+ } else {
+ BIT_CLR(m_irh_pending, GVIDEO_PA - 8);
+ }
- update_irq();
+ update_irq();
- bool dmar = m_gv_ready && m_gv_dma_en;
+ bool dmar = m_gv_ready && m_gv_dma_en;
- m_ppu->dmar_w(dmar);
+ m_ppu->dmar_w(dmar);
- if (m_ppu->pa_r() == GVIDEO_PA) {
- m_ppu->flag_w(m_gv_ready);
- }
+ if (m_ppu->pa_r() == GVIDEO_PA) {
+ m_ppu->flag_w(m_gv_ready);
+ }
}
void hp9845b_state::graphic_video_render(unsigned video_scanline)
{
- const pen_t *pen = m_palette->pens();
- bool yc = (video_scanline + GVIDEO_VCNT_OFF) == (m_gv_cursor_y + 6);
- bool yw;
- bool blink;
-
- if (m_gv_cursor_fs) {
- yw = true;
- // Steady cursor
- blink = true;
- } else {
- yw = (video_scanline + GVIDEO_VCNT_OFF) >= (m_gv_cursor_y + 2) &&
- (video_scanline + GVIDEO_VCNT_OFF) <= (m_gv_cursor_y + 10);
- // Blinking cursor (frame freq. / 16)
- blink = BIT(m_screen->frame_number() , 3) != 0;
- }
-
- unsigned mem_idx = 36 * (video_scanline - GVIDEO_VBEND);
- for (unsigned i = 0; i < GVIDEO_HPIXELS; i += 16) {
- UINT16 word = m_graphic_mem[ mem_idx++ ];
- unsigned x = i;
- for (UINT16 mask = 0x8000; mask != 0; mask >>= 1) {
- unsigned cnt_h = x + GVIDEO_HBEND + GVIDEO_HCNT_OFF;
- bool xc = cnt_h == (m_gv_cursor_x + 6);
- bool xw = m_gv_cursor_fs || (cnt_h >= (m_gv_cursor_x + 2) && cnt_h <= (m_gv_cursor_x + 10));
- unsigned pixel;
- if (blink && ((xw && yc) || (yw && xc && m_gv_cursor_gc))) {
- // Cursor
- pixel = 2;
- } else {
- // Normal pixel
- pixel = (word & mask) != 0;
- }
- m_bitmap.pix32(video_scanline - GVIDEO_VBEND , x++) = pen[ pixel ];
- }
- }
+ const pen_t *pen = m_palette->pens();
+ bool yc = (video_scanline + GVIDEO_VCNT_OFF) == (m_gv_cursor_y + 6);
+ bool yw;
+ bool blink;
+
+ if (m_gv_cursor_fs) {
+ yw = true;
+ // Steady cursor
+ blink = true;
+ } else {
+ yw = (video_scanline + GVIDEO_VCNT_OFF) >= (m_gv_cursor_y + 2) &&
+ (video_scanline + GVIDEO_VCNT_OFF) <= (m_gv_cursor_y + 10);
+ // Blinking cursor (frame freq. / 16)
+ blink = BIT(m_screen->frame_number() , 3) != 0;
+ }
+
+ unsigned mem_idx = 36 * (video_scanline - GVIDEO_VBEND);
+ for (unsigned i = 0; i < GVIDEO_HPIXELS; i += 16) {
+ UINT16 word = m_graphic_mem[ mem_idx++ ];
+ unsigned x = i;
+ for (UINT16 mask = 0x8000; mask != 0; mask >>= 1) {
+ unsigned cnt_h = x + GVIDEO_HBEND + GVIDEO_HCNT_OFF;
+ bool xc = cnt_h == (m_gv_cursor_x + 6);
+ bool xw = m_gv_cursor_fs || (cnt_h >= (m_gv_cursor_x + 2) && cnt_h <= (m_gv_cursor_x + 10));
+ unsigned pixel;
+ if (blink && ((xw && yc) || (yw && xc && m_gv_cursor_gc))) {
+ // Cursor
+ pixel = 2;
+ } else {
+ // Normal pixel
+ pixel = (word & mask) != 0;
+ }
+ m_bitmap.pix32(video_scanline - GVIDEO_VBEND , x++) = pen[ pixel ];
+ }
+ }
}
IRQ_CALLBACK_MEMBER(hp9845b_state::irq_callback)
{
if (irqline == HPHYBRID_IRL) {
- logerror("irq ack L %02x\n" , m_irl_pending);
+ logerror("irq ack L %02x\n" , m_irl_pending);
return m_irl_pending;
} else {
- logerror("irq ack H %02x\n" , m_irh_pending);
+ logerror("irq ack H %02x\n" , m_irh_pending);
return m_irh_pending;
}
}
@@ -1013,10 +1013,10 @@ WRITE8_MEMBER(hp9845b_state::pa_w)
// RHS tape drive (T15)
m_ppu->status_w(m_t15->sts_r());
m_ppu->flag_w(m_t15->flg_r());
- } else if (data == GVIDEO_PA) {
- // Graphic video
- m_ppu->status_w(1);
- m_ppu->flag_w(m_gv_ready);
+ } else if (data == GVIDEO_PA) {
+ // Graphic video
+ m_ppu->status_w(1);
+ m_ppu->flag_w(m_gv_ready);
} else {
m_ppu->status_w(0);
m_ppu->flag_w(0);
@@ -1035,14 +1035,14 @@ WRITE_LINE_MEMBER(hp9845b_state::t15_irq_w)
WRITE_LINE_MEMBER(hp9845b_state::t15_flg_w)
{
- if (m_ppu->pa_r() == T15_PA) {
+ if (m_ppu->pa_r() == T15_PA) {
m_ppu->flag_w(state);
}
}
WRITE_LINE_MEMBER(hp9845b_state::t15_sts_w)
{
- if (m_ppu->pa_r() == T15_PA) {
+ if (m_ppu->pa_r() == T15_PA) {
m_ppu->status_w(state);
}
}
@@ -1082,9 +1082,9 @@ static ADDRESS_MAP_START(global_mem_map , AS_PROGRAM , 16 , hp9845b_state)
ADDRESS_MAP_UNMAP_LOW
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
- AM_RANGE(0x020000 , 0x027fff) AM_RAM AM_SHARE("lpu_02_ram")
+ AM_RANGE(0x020000 , 0x027fff) AM_RAM AM_SHARE("lpu_02_ram")
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
- AM_RANGE(0x040000 , 0x047fff) AM_RAM AM_SHARE("lpu_04_ram")
+ AM_RANGE(0x040000 , 0x047fff) AM_RAM AM_SHARE("lpu_04_ram")
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
ADDRESS_MAP_END
@@ -1096,9 +1096,9 @@ static ADDRESS_MAP_START(ppu_io_map , AS_IO , 16 , hp9845b_state)
// PA = 0, IC = 3
// Keyboard status input & keyboard interrupt clear
AM_RANGE(HP_MAKE_IOADDR(0 , 3) , HP_MAKE_IOADDR(0 , 3)) AM_READWRITE(kb_status_r , kb_irq_clear_w)
- // PA = 13, IC = 0..3
- // Graphic video
- AM_RANGE(HP_MAKE_IOADDR(GVIDEO_PA , 0) , HP_MAKE_IOADDR(GVIDEO_PA , 3)) AM_READWRITE(graphic_r , graphic_w)
+ // PA = 13, IC = 0..3
+ // Graphic video
+ AM_RANGE(HP_MAKE_IOADDR(GVIDEO_PA , 0) , HP_MAKE_IOADDR(GVIDEO_PA , 3)) AM_READWRITE(graphic_r , graphic_w)
// PA = 15, IC = 0..3
// Right-hand side tape drive (T15)
AM_RANGE(HP_MAKE_IOADDR(T15_PA , 0) , HP_MAKE_IOADDR(T15_PA , 3)) AM_DEVREADWRITE("t15" , hp_taco_device , reg_r , reg_w)
@@ -1118,13 +1118,13 @@ static MACHINE_CONFIG_START( hp9845b, hp9845b_state )
// video hardware
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green)
MCFG_SCREEN_UPDATE_DRIVER(hp9845b_state, screen_update)
- // These parameters are for alpha video
+ // These parameters are for alpha video
MCFG_SCREEN_RAW_PARAMS(VIDEO_PIXEL_CLOCK , VIDEO_HTOTAL , 0 , VIDEO_HBSTART , VIDEO_VTOTAL , 0 , VIDEO_ACTIVE_SCANLINES)
MCFG_SCREEN_VBLANK_DRIVER(hp9845b_state, vblank_w)
MCFG_PALETTE_ADD_MONOCHROME_HIGHLIGHT("palette")
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hp9845b_state, scanline_timer, "screen", 0, 1)
- MCFG_TIMER_DRIVER_ADD("gv_timer", hp9845b_state, gv_timer)
+ MCFG_TIMER_DRIVER_ADD("gv_timer", hp9845b_state, gv_timer)
// Actual keyboard refresh rate should be KEY_SCAN_OSCILLATOR / 128 (2560 Hz)
MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer" , hp9845b_state , kb_scan , attotime::from_hz(100))
diff --git a/src/mame/drivers/icatel.cpp b/src/mame/drivers/icatel.cpp
index 63255983beb..79a4c32509d 100644
--- a/src/mame/drivers/icatel.cpp
+++ b/src/mame/drivers/icatel.cpp
@@ -55,8 +55,8 @@ public:
DECLARE_DRIVER_INIT(icatel);
DECLARE_PALETTE_INIT(icatel);
-
- HD44780_PIXEL_UPDATE(icatel_pixel_update);
+
+ HD44780_PIXEL_UPDATE(icatel_pixel_update);
private:
virtual void machine_start() override;
diff --git a/src/mame/drivers/igspoker.cpp b/src/mame/drivers/igspoker.cpp
index ebe766faadf..79588e1c065 100644
--- a/src/mame/drivers/igspoker.cpp
+++ b/src/mame/drivers/igspoker.cpp
@@ -2332,9 +2332,9 @@ ROM_END
CPUs
1x Z0840006PSC-Z80 CPU (u13) - 8-bit Microprocessor - main.
1x PIC16C65A-20/P (u1) - 8bit CMOS Microcontroller (internal ROM not dumped).
- 1x CP82C55A (u29) - Programmable Peripheral Interface.
+ 1x CP82C55A (u29) - Programmable Peripheral Interface.
1x YM2413 (u3) - FM Operator Type-M (OPM) - sound.
- 1x LM358 (u4) - Dual Operational Amplifier - sound.
+ 1x LM358 (u4) - Dual Operational Amplifier - sound.
1x TDA2003 (u6) - Audio Amplifier - sound.
1x 24.000000 MHz oscillator (x2).
@@ -2420,7 +2420,7 @@ ROM_END
4x 8 DIP switches banks (DSW1-4).
1x 4 DIP switches bank (DSW5).
1x 3.6V battery.
-
+
*/
ROM_START( chleagxb )
ROM_REGION( 0x40000, "maincpu", 0 ) // Each half contains a different set of data+program. The game needs banking.
diff --git a/src/mame/drivers/itt3030.cpp b/src/mame/drivers/itt3030.cpp
index d529d27b031..7bd8017e813 100644
--- a/src/mame/drivers/itt3030.cpp
+++ b/src/mame/drivers/itt3030.cpp
@@ -467,7 +467,7 @@ WRITE8_MEMBER(itt3030_state::kbd_matrix_w)
int rd_masks[8] = { 1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80 };
int tmp_read;
-// printf("matrix_w: %02x (col %d row %d clk %d)\n", data, m_kbdcol, m_kbdrow, (data & 0x80) ? 1 : 0);
+// printf("matrix_w: %02x (col %d row %d clk %d)\n", data, m_kbdcol, m_kbdrow, (data & 0x80) ? 1 : 0);
if ((data & 0x80) && (!m_kbdclk))
{
diff --git a/src/mame/drivers/jack.cpp b/src/mame/drivers/jack.cpp
index 44971916807..8238eacc95a 100644
--- a/src/mame/drivers/jack.cpp
+++ b/src/mame/drivers/jack.cpp
@@ -1432,22 +1432,22 @@ ROM_END
ROM_START( trikitri )
ROM_REGION( 0x10000, "maincpu", 0 ) /* main z80 cpu */
- ROM_LOAD( "1.bin", 0x0000, 0x2000, CRC(248f2f12) SHA1(a1796e3e56a2b499997b0459ab875e7e50b797a2) )
- ROM_LOAD( "2.bin", 0x2000, 0x2000, CRC(04052262) SHA1(056a225c8625e53881753b0b0330f9b277d14a7d) )
- ROM_LOAD( "3.bin", 0x4000, 0x2000, CRC(979c17c1) SHA1(518500d35241ceefa802edd6ffd948385faac9eb) )
- ROM_LOAD( "4.bin", 0x6000, 0x1000, CRC(839d79b7) SHA1(ac1c0fbf23e7d1a53b47dae16170857c55e6ae48) )
+ ROM_LOAD( "1.bin", 0x0000, 0x2000, CRC(248f2f12) SHA1(a1796e3e56a2b499997b0459ab875e7e50b797a2) )
+ ROM_LOAD( "2.bin", 0x2000, 0x2000, CRC(04052262) SHA1(056a225c8625e53881753b0b0330f9b277d14a7d) )
+ ROM_LOAD( "3.bin", 0x4000, 0x2000, CRC(979c17c1) SHA1(518500d35241ceefa802edd6ffd948385faac9eb) )
+ ROM_LOAD( "4.bin", 0x6000, 0x1000, CRC(839d79b7) SHA1(ac1c0fbf23e7d1a53b47dae16170857c55e6ae48) )
ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound z80 cpu */
- ROM_LOAD( "snd.bin", 0x0000, 0x1000, CRC(1589c4a9) SHA1(9422d55952b939c761fc47147f392ef0cc7d141b) )
+ ROM_LOAD( "snd.bin", 0x0000, 0x1000, CRC(1589c4a9) SHA1(9422d55952b939c761fc47147f392ef0cc7d141b) )
ROM_REGION( 0x6000, "gfx1", 0 ) /* gfx - 8x8x3bpp */
- ROM_LOAD( "5.bin", 0x0000, 0x2000, CRC(8cb6ec1c) SHA1(89fb29b9c4931d1e32e705ee4c4e38af219100e4) )
- ROM_LOAD( "6.bin", 0x2000, 0x2000, CRC(a7bed0c1) SHA1(67484858abf08b3ffc320777befbfb922d867af9) )
- ROM_LOAD( "7.bin", 0x4000, 0x2000, CRC(b473ce14) SHA1(491539de23fc4b9d0705434bcfba26043414b3b4) )
+ ROM_LOAD( "5.bin", 0x0000, 0x2000, CRC(8cb6ec1c) SHA1(89fb29b9c4931d1e32e705ee4c4e38af219100e4) )
+ ROM_LOAD( "6.bin", 0x2000, 0x2000, CRC(a7bed0c1) SHA1(67484858abf08b3ffc320777befbfb922d867af9) )
+ ROM_LOAD( "7.bin", 0x4000, 0x2000, CRC(b473ce14) SHA1(491539de23fc4b9d0705434bcfba26043414b3b4) )
ROM_REGION( 0x200, "proms", 0 )
- ROM_LOAD_NIB_LOW( "prom2.bin", 0x000, 0x0100, CRC(ed5cec15) SHA1(22001ecce44d7fd886fc3aa8a184993b6e341c00) )
- ROM_LOAD_NIB_HIGH( "prom1.bin", 0x000, 0x0100, CRC(79632c67) SHA1(21480e44ab4941a1e943c10ea6a58c6177f77933) )
+ ROM_LOAD_NIB_LOW( "prom2.bin", 0x000, 0x0100, CRC(ed5cec15) SHA1(22001ecce44d7fd886fc3aa8a184993b6e341c00) )
+ ROM_LOAD_NIB_HIGH( "prom1.bin", 0x000, 0x0100, CRC(79632c67) SHA1(21480e44ab4941a1e943c10ea6a58c6177f77933) )
ROM_END
diff --git a/src/mame/drivers/lwings.cpp b/src/mame/drivers/lwings.cpp
index 244fe09fde3..518714ab720 100644
--- a/src/mame/drivers/lwings.cpp
+++ b/src/mame/drivers/lwings.cpp
@@ -1036,7 +1036,7 @@ static MACHINE_CONFIG_DERIVED( trojan, lwings )
/* sound hardware */
MCFG_GENERIC_LATCH_8_ADD("soundlatch2")
-
+
MCFG_SOUND_ADD("5205", MSM5205, XTAL_384kHz) /* verified on PCB */
MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_SEX_4B) /* slave mode */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
diff --git a/src/mame/drivers/macs.cpp b/src/mame/drivers/macs.cpp
index f318b109946..b3a355b90a3 100644
--- a/src/mame/drivers/macs.cpp
+++ b/src/mame/drivers/macs.cpp
@@ -91,7 +91,7 @@ public:
DECLARE_MACHINE_RESET(macs);
DECLARE_MACHINE_START(macs);
ST0016_DMA_OFFS_CB(dma_offset);
-
+
UINT32 screen_update_macs(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
optional_device<st0016_cpu_device> m_maincpu;
diff --git a/src/mame/drivers/mcr68.cpp b/src/mame/drivers/mcr68.cpp
index 6c321f892cb..ede36d0e4f2 100644
--- a/src/mame/drivers/mcr68.cpp
+++ b/src/mame/drivers/mcr68.cpp
@@ -1022,7 +1022,7 @@ static MACHINE_CONFIG_START( zwackery, mcr68_state )
MCFG_CPU_PROGRAM_MAP(zwackery_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", mcr68_state, mcr68_interrupt)
- MCFG_WATCHDOG_ADD("watchdog")
+ MCFG_WATCHDOG_ADD("watchdog")
// MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
MCFG_MACHINE_START_OVERRIDE(mcr68_state,zwackery)
MCFG_MACHINE_RESET_OVERRIDE(mcr68_state,zwackery)
diff --git a/src/mame/drivers/merit.cpp b/src/mame/drivers/merit.cpp
index 8a57919d4aa..d4498a7874d 100644
--- a/src/mame/drivers/merit.cpp
+++ b/src/mame/drivers/merit.cpp
@@ -726,13 +726,13 @@ INPUT_PORTS_END
static INPUT_PORTS_START( iowapp )
PORT_INCLUDE( meritpoker )
-
+
PORT_MODIFY("IN0") /* Pins #65 through #58 of J3 in decending order */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
-// PORT_MODIFY("IN1") /* Pins #57 through #51 of J3 in decending order */
-// PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* If HIGH triggers a "TOKEN LOW" error - Hopper releated */
+// PORT_MODIFY("IN1") /* Pins #57 through #51 of J3 in decending order */
+// PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* If HIGH triggers a "TOKEN LOW" error - Hopper releated */
PORT_MODIFY("DSW")
PORT_DIPNAME( 0x01, 0x00, "Auto Hold" ) PORT_DIPLOCATION("SW1:1")
diff --git a/src/mame/drivers/metlfrzr.cpp b/src/mame/drivers/metlfrzr.cpp
index 3dc524f2e55..aa5ba6bc640 100644
--- a/src/mame/drivers/metlfrzr.cpp
+++ b/src/mame/drivers/metlfrzr.cpp
@@ -2,18 +2,18 @@
// copyright-holders:Angelo Salese
/****************************************
- Metal Freezer (c) 1989 Seibu
-
- preliminary driver by Angelo Salese
-
- HW seems the natural evolution of Dark Mist type.
-
- TODO:
- - Video registers needs better understanding.
- - Nuke legacy video code and re-do it by using tilemap system.
- - sprites are ahead of 1/2 frames;
- - Writes at 0xb800-0xbfff at attract mode gameplay demo transition?
- - DIPs need work - Flip Screen does not function. Still playable
+ Metal Freezer (c) 1989 Seibu
+
+ preliminary driver by Angelo Salese
+
+ HW seems the natural evolution of Dark Mist type.
+
+ TODO:
+ - Video registers needs better understanding.
+ - Nuke legacy video code and re-do it by using tilemap system.
+ - sprites are ahead of 1/2 frames;
+ - Writes at 0xb800-0xbfff at attract mode gameplay demo transition?
+ - DIPs need work - Flip Screen does not function. Still playable
****************************************/
@@ -64,12 +64,12 @@ void metlfrzr_state::video_start()
/*
- video regs format:
- [0x06] ---- --x- used during title screen transition, unknown purpose
- [0x06] ---- ---x
- [0x15] always 0?
- [0x16] always 0?
- [0x17] xxxx xxxx X scrolling base value
- Notice that it's currently unknown how the game is really supposed to NOT enable scrolling during gameplay.
+ [0x06] ---- --x- used during title screen transition, unknown purpose
+ [0x06] ---- ---x
+ [0x15] always 0?
+ [0x16] always 0?
+ [0x17] xxxx xxxx X scrolling base value
+ Notice that it's currently unknown how the game is really supposed to NOT enable scrolling during gameplay.
*/
void metlfrzr_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect)
{
@@ -81,7 +81,7 @@ void metlfrzr_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &clipre
UINT16 x_scroll_value;
x_scroll_value = m_video_regs[0x17] + ((m_video_regs[0x06] & 1) << 8);
x_scroll_base = (x_scroll_value >> 3) * 32;
-
+
for (count=0;count<32*33;count++)
{
int tile_base = count;
@@ -96,10 +96,10 @@ void metlfrzr_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &clipre
tile_base &= vram_mask;
int x = (count / 32);
-
+
UINT16 tile = m_vram[tile_base*2+0] + ((m_vram[tile_base*2+1] & 0xf0) << 4);
UINT8 color = m_vram[tile_base*2+1] & 0xf;
-
+
gfx->transpen(bitmap,cliprect,tile,color,0,0,x*8-x_scroll_shift,y*8,0xf);
}
@@ -107,16 +107,16 @@ void metlfrzr_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &clipre
/*
sprite DMA:
- 0xfe00-0xffff contains buffer for data to be copied.
- Sprites are currently lagging (noticeable during scrolling) therefore there must be either an automatic or manual trigger.
- Sprite seems to traverse from top to bottom priority-wise, other than that format is almost 1:1 with darkmist.cpp.
+ 0xfe00-0xffff contains buffer for data to be copied.
+ Sprites are currently lagging (noticeable during scrolling) therefore there must be either an automatic or manual trigger.
+ Sprite seems to traverse from top to bottom priority-wise, other than that format is almost 1:1 with darkmist.cpp.
sprite format:
- [0] tttt tttt tile number
- [1] x--- ---- if 1 sprite is disabled
- [1] -ttt ---- tile bank
- [1] ---- cccc palette number
- [2] yyyy yyyy Y offset
- [3] xxxx xxxx X offset
+ [0] tttt tttt tile number
+ [1] x--- ---- if 1 sprite is disabled
+ [1] -ttt ---- tile bank
+ [1] ---- cccc palette number
+ [2] yyyy yyyy Y offset
+ [3] xxxx xxxx X offset
*/
void metlfrzr_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect)
{
@@ -124,19 +124,19 @@ void metlfrzr_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr
gfx_element *gfx_3 = m_gfxdecode->gfx(3);
int count;
UINT8 *base_spriteram = m_work_ram + 0xe00;
-
+
for(count=0x200-4;count>-1;count-=4)
{
if(base_spriteram[count+1] & 0x80)
continue;
-
+
gfx_element *cur_gfx = base_spriteram[count+1] & 0x40 ? gfx_3 : gfx_2;
UINT8 tile_bank = (base_spriteram[count+1] & 0x30) >> 4;
UINT16 tile = base_spriteram[count] | (tile_bank << 8);
UINT8 color = base_spriteram[count+1] & 0xf;
int y = base_spriteram[count+2];
int x = base_spriteram[count+3];
-
+
cur_gfx->transpen(bitmap,cliprect,tile,color,0,0,x,y,0xf);
}
}
@@ -162,7 +162,7 @@ WRITE8_MEMBER(metlfrzr_state::output_w)
m_fg_tilebank = (data & 0x10) >> 4;
membank("bank1")->set_entry((data & 0xc) >> 2);
-// popmessage("%02x",data & 3);
+// popmessage("%02x",data & 3);
}
static ADDRESS_MAP_START( metlfrzr_map, AS_PROGRAM, 8, metlfrzr_state )
@@ -180,14 +180,14 @@ static ADDRESS_MAP_START( metlfrzr_map, AS_PROGRAM, 8, metlfrzr_state )
AM_RANGE(0xd603, 0xd603) AM_READ_PORT("DSW1")
AM_RANGE(0xd604, 0xd604) AM_READ_PORT("DSW2")
AM_RANGE(0xd600, 0xd61f) AM_RAM AM_SHARE("vregs") // TODO: write-only, debug
-
+
AM_RANGE(0xd700, 0xd700) AM_WRITE(output_w)
AM_RANGE(0xd710, 0xd710) AM_DEVWRITE("t5182", t5182_device, sound_irq_w)
AM_RANGE(0xd711, 0xd711) AM_DEVREAD("t5182", t5182_device, sharedram_semaphore_snd_r)
// following two do swapped access compared to darkmist
AM_RANGE(0xd712, 0xd712) AM_DEVWRITE("t5182", t5182_device, sharedram_semaphore_main_release_w)
AM_RANGE(0xd713, 0xd713) AM_DEVWRITE("t5182", t5182_device, sharedram_semaphore_main_acquire_w)
-
+
AM_RANGE(0xd800, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xefff) AM_RAM
AM_RANGE(0xf000, 0xffff) AM_RAM AM_SHARE("wram")
@@ -240,7 +240,7 @@ static INPUT_PORTS_START( metlfrzr )
PORT_DIPNAME( 0x80, 0x80, "2-7" )
PORT_DIPSETTING( 0x80, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
-
+
PORT_START("DSW1")
PORT_DIPNAME( 0x01, 0x00, "SYSA" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
@@ -264,7 +264,7 @@ static INPUT_PORTS_START( metlfrzr )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-
+
PORT_START("DSW2")
PORT_DIPNAME( 0x01, 0x00, "SYSB" )
@@ -313,7 +313,7 @@ static const gfx_layout tile_layout =
RGN_FRAC(1,1),
4,
{ STEP4(0,4) },
- { STEP4_INV(16,1), STEP4_INV(0,1) },
+ { STEP4_INV(16,1), STEP4_INV(0,1) },
{ STEP8(0,32) },
32*8
};
@@ -405,7 +405,7 @@ ROM_START(metlfrzr)
ROM_REGION(0x20000, "gfx3", 0)
ROM_LOAD16_BYTE("14.13a", 0x00001, 0x10000, CRC(a9cd5225) SHA1(f3d5e29ee08fb563fdc1af3c64128f2cd2feb987))
ROM_LOAD16_BYTE("16.11a", 0x00000, 0x10000, CRC(92f2cb49) SHA1(498021d94b0fde216207076491702af2324a2dcc))
-
+
ROM_REGION(0x20000, "gfx4", 0)
ROM_LOAD16_BYTE("15.12a", 0x00001, 0x10000, CRC(ce5c4c8b) SHA1(2351d66ba51e80097ce53bfd448ac24901844cda))
ROM_LOAD16_BYTE("17.10a", 0x00000, 0x10000, CRC(3fec33f7) SHA1(af086ba30fc4521a0114da2824f5baa04d225a89))
diff --git a/src/mame/drivers/mpu4.cpp b/src/mame/drivers/mpu4.cpp
index 1a77ccec16a..a27f886db01 100644
--- a/src/mame/drivers/mpu4.cpp
+++ b/src/mame/drivers/mpu4.cpp
@@ -2765,7 +2765,7 @@ MACHINE_CONFIG_END
#include "mpu4crystal.hxx"
#include "mpu4empire.hxx"
#include "mpu4mdm.hxx"
-#include "mpu4misc.hxx"
+#include "mpu4misc.hxx"
#include "mpu4mod2sw.hxx"
#include "mpu4mod4yam.hxx"
#include "mpu4sw.hxx"
diff --git a/src/mame/drivers/mvme147.cpp b/src/mame/drivers/mvme147.cpp
index 26afc40a74f..84b09c1dd87 100644
--- a/src/mame/drivers/mvme147.cpp
+++ b/src/mame/drivers/mvme147.cpp
@@ -8,7 +8,7 @@
*
* Thanks to Plamen Mihaylov and his site http://www.m88k.com/ I got the information
* required to start the work with this driver. The goal is to boot a tape through
- * the MVME-350 devide connected over a VME bus device.
+ * the MVME-350 devide connected over a VME bus device.
*
*
* ||
@@ -91,7 +91,7 @@
* - A32/D32 VMEbus master/slave interface with system controller function (VMEchip ASIC)
* - Four EIA-232-D serial communications ports (85C30 x 2)
* - Centronics compatible printer port ( PCC ASIC )
- * - Two 16-bit timers and watchdog timer (PCC ASIC )
+ * - Two 16-bit timers and watchdog timer (PCC ASIC )
* - SCSI bus interface with DMA (WD33C93)
* - Ethernet transceiver interface (AM7990)
* - 4-level requester, 7-level interrupter, and 7-level interrupt handler for VMEbus (VMEchip ASIC)
@@ -173,7 +173,7 @@
#endif
/* from documentataion: http://www.m88k.com/Docs/147/147aih.pdf but crystal and divider not known */
-#define BAUDGEN_CLOCK XTAL_5MHz
+#define BAUDGEN_CLOCK XTAL_5MHz
#define SCC_CLOCK (BAUDGEN_CLOCK) /* This gives prompt at the RS232 terminal device (9600) */
class mvme147_state : public driver_device
@@ -212,37 +212,37 @@ private:
required_device<scc85C30_device> m_sccterm2;
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
- UINT32 *m_sysrom;
- UINT32 m_sysram[2];
+ UINT32 *m_sysrom;
+ UINT32 m_sysram[2];
// PCC registers
- UINT8 m_genpurp_stat;
+ UINT8 m_genpurp_stat;
// VME chip registers
- UINT8 m_vc_cntl_conf;
+ UINT8 m_vc_cntl_conf;
};
static ADDRESS_MAP_START (mvme147_mem, AS_PROGRAM, 32, mvme147_state)
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE (0x00000000, 0x00000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just during reset */
- AM_RANGE (0x00000000, 0x00000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */
+ AM_RANGE (0x00000000, 0x00000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just during reset */
+ AM_RANGE (0x00000000, 0x00000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */
AM_RANGE (0x00000008, 0x003fffff) AM_RAM /* 4 Mb RAM */
AM_RANGE (0xff800000, 0xff9fffff) AM_ROM AM_REGION("maincpu", 0xff800000) //AM_MIRROR(0x00780000) /* ROM/EEPROM bank 1 - 147bug */
AM_RANGE (0xffa00000, 0xffbfffff) AM_ROM AM_REGION("maincpu", 0xffa00000) //AM_MIRROR(0x00780000) /* ROM/EEPROM bank 2 - unpopulated */
- /* SGS-Thompson M48T18 RAM and clock chip, only 4088 bytes used, and 8 bytes for the RTC, out of 8Kb though */
+ /* SGS-Thompson M48T18 RAM and clock chip, only 4088 bytes used, and 8 bytes for the RTC, out of 8Kb though */
AM_RANGE (0xfffe0000, 0xfffe0fff) AM_DEVREADWRITE8("m48t18", timekeeper_device, read, write, 0xffffffff)
- //AM_RANGE (0xfffe1000, 0xfffe100f) AM_READWRITE32(pcc32_r, pcc32_w, 0xffffffff) /* PCC 32 bits registers - needs U64 cast defined to work */
+ //AM_RANGE (0xfffe1000, 0xfffe100f) AM_READWRITE32(pcc32_r, pcc32_w, 0xffffffff) /* PCC 32 bits registers - needs U64 cast defined to work */
AM_RANGE (0xfffe1010, 0xfffe1017) AM_READWRITE16(pcc16_r, pcc16_w, 0xffffffff) /* PCC 16 bits registers */
- AM_RANGE (0xfffe1018, 0xfffe102f) AM_READWRITE8(pcc8_r, pcc8_w, 0xffffffff) /* PCC 8 bits registers */
+ AM_RANGE (0xfffe1018, 0xfffe102f) AM_READWRITE8(pcc8_r, pcc8_w, 0xffffffff) /* PCC 8 bits registers */
AM_RANGE (0xfffe2000, 0xfffe201b) AM_READWRITE8(vmechip_r, vmechip_w, 0x00ff00ff) /* VMEchip 8 bits registers on odd adresses */
AM_RANGE (0xfffe3000, 0xfffe3003) AM_DEVREADWRITE8("scc", scc85C30_device, ba_cd_inv_r, ba_cd_inv_w, 0xffffffff) /* Port 1&2 - Dual serial port Z80-SCC */
AM_RANGE (0xfffe3800, 0xfffe3803) AM_DEVREADWRITE8("scc2", scc85C30_device, ba_cd_inv_r, ba_cd_inv_w, 0xffffffff) /* Port 3&4 - Dual serial port Z80-SCC */
- //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */
- //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */
+ //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */
+ //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */
ADDRESS_MAP_END
/* Input ports */
@@ -281,7 +281,7 @@ WRITE32_MEMBER (mvme147_state::bootvect_w){
m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
}
-/****
+/****
* PCC - Periheral Channel Controller driver, might deserve its own driver but will rest here until another board wants it
*/
#if 0 /* Doesn't compile atm */
@@ -312,16 +312,15 @@ WRITE32_MEMBER (mvme147_state::pcc32_w){
#define P16_TIMER2_COUNT (P16BASE + 6)
READ16_MEMBER (mvme147_state::pcc16_r){
-
UINT16 ret = 0;
LOG(("Call to %s[%04x]", FUNCNAME, offset));
switch(offset)
{
- case P16_TIMER1_PRELOAD - P16BASE : LOG((" -> %02x Timer 1 preload - not implemented\n", ret)); break;
- case P16_TIMER1_COUNT - P16BASE : LOG((" -> %02x Timer 1 count - not implemented\n", ret)); break;
- case P16_TIMER2_PRELOAD - P16BASE : LOG((" -> %02x Timer 2 preload - not implemented\n", ret)); break;
- case P16_TIMER2_COUNT - P16BASE : LOG((" -> %02x Timer 2 count - not implemented\n", ret)); break;
+ case P16_TIMER1_PRELOAD - P16BASE : LOG((" -> %02x Timer 1 preload - not implemented\n", ret)); break;
+ case P16_TIMER1_COUNT - P16BASE : LOG((" -> %02x Timer 1 count - not implemented\n", ret)); break;
+ case P16_TIMER2_PRELOAD - P16BASE : LOG((" -> %02x Timer 2 preload - not implemented\n", ret)); break;
+ case P16_TIMER2_COUNT - P16BASE : LOG((" -> %02x Timer 2 count - not implemented\n", ret)); break;
default:
LOG((" -> %02x unsupported register\n", ret));
}
@@ -329,145 +328,144 @@ READ16_MEMBER (mvme147_state::pcc16_r){
}
WRITE16_MEMBER (mvme147_state::pcc16_w){
- LOG(("Call to %s[%04x] <- %04x - ", FUNCNAME, offset, data));
- switch(offset)
- {
- case P16_TIMER1_PRELOAD - P16BASE : LOG(("Timer 1 preload - not implemented\n")); break;
- case P16_TIMER1_COUNT - P16BASE : LOG(("Timer 1 count - not implemented\n")); break;
- case P16_TIMER2_PRELOAD - P16BASE : LOG(("Timer 2 preload - not implemented\n")); break;
- case P16_TIMER2_COUNT - P16BASE : LOG(("Timer 2 count - not implemented\n")); break;
- default:
+ LOG(("Call to %s[%04x] <- %04x - ", FUNCNAME, offset, data));
+ switch(offset)
+ {
+ case P16_TIMER1_PRELOAD - P16BASE : LOG(("Timer 1 preload - not implemented\n")); break;
+ case P16_TIMER1_COUNT - P16BASE : LOG(("Timer 1 count - not implemented\n")); break;
+ case P16_TIMER2_PRELOAD - P16BASE : LOG(("Timer 2 preload - not implemented\n")); break;
+ case P16_TIMER2_COUNT - P16BASE : LOG(("Timer 2 count - not implemented\n")); break;
+ default:
LOG(("unsupported register\n"));
- }
+ }
}
#define P8BASE 0xfffe1018
#define P8_TIMER1_INT_CNTL 0xfffe1018
-#define P8_TIMER1_CNTL 0xfffe1019
+#define P8_TIMER1_CNTL 0xfffe1019
#define P8_TIMER2_INT_CNTL 0xfffe101A
-#define P8_TIMER2_CNTL 0xfffe101B
+#define P8_TIMER2_CNTL 0xfffe101B
#define P8_ACFAIL_INT_CNTL 0xfffe101C
#define P8_WDOG_TIMER_CNTL 0xfffe101D
#define P8_PRINTER_INT_CNTL 0xfffe101E
-#define P8_PRINTER_CNTL 0xfffe101F
-#define P8_DMA_INT_CNTL 0xfffe1020
+#define P8_PRINTER_CNTL 0xfffe101F
+#define P8_DMA_INT_CNTL 0xfffe1020
#define P8_DMA_CNTL_STAT 0xfffe1021
-#define P8_BUSERR_CNTL 0xfffe1022
-#define P8_DMA_STATUS 0xfffe1023
+#define P8_BUSERR_CNTL 0xfffe1022
+#define P8_DMA_STATUS 0xfffe1023
#define P8_ABORT_INT_CNTL 0xfffe1024
#define P8_TABADD_FC_CNTL 0xfffe1025
#define P8_SERIAL_INT_CNTL 0xfffe1026
#define P8_GEN_PURP_CNTL 0xfffe1027
-#define P8_LAN_INT_CNTL 0xfffe1028
+#define P8_LAN_INT_CNTL 0xfffe1028
#define P8_GEN_PURP_STAT 0xfffe1029
#define P8_SCSI_INT_CNTL 0xfffe102A
#define P8_SLAVE_BASE_ADDR 0xfffe102B
-#define P8_SWI_1_CNTL 0xfffe102C
+#define P8_SWI_1_CNTL 0xfffe102C
#define P8_INT_VECT_BASE 0xfffe102D
-#define P8_SWI_2_CNTL 0xfffe102E
+#define P8_SWI_2_CNTL 0xfffe102E
#define P8_REVISION_LEVEL 0xfffe102F
-#define P8_PRINTER_DATA 0xfffe2800
+#define P8_PRINTER_DATA 0xfffe2800
#define P8_PRINTER_STATUS 0xfffe2800
READ8_MEMBER (mvme147_state::pcc8_r){
-
UINT8 ret = 0;
- LOG(("Call to %s[%04x] ", FUNCNAME, offset));
+ LOG(("Call to %s[%04x] ", FUNCNAME, offset));
switch(offset + P8BASE)
{
- case P8_TIMER1_INT_CNTL : LOG((" -> %02x - Timer 1 Interrupt Control - not implemented\n", ret)); break;
- case P8_TIMER1_CNTL : LOG((" -> %02x - Timer 1 Control - not implemented\n", ret)); break;
- case P8_TIMER2_INT_CNTL : LOG((" -> %02x - Timer 2 Interrupt Control - not implemented\n", ret)); break;
- case P8_TIMER2_CNTL : LOG((" -> %02x - Timer 2 Control - not implemented\n", ret)); break;
- case P8_ACFAIL_INT_CNTL : LOG((" -> %02x - AC Fail Interrupt Control Register - not implemented\n", ret)); break;
- case P8_WDOG_TIMER_CNTL : LOG((" -> %02x - Watchdog Timer Control Register - not implemented\n", ret)); break;
+ case P8_TIMER1_INT_CNTL : LOG((" -> %02x - Timer 1 Interrupt Control - not implemented\n", ret)); break;
+ case P8_TIMER1_CNTL : LOG((" -> %02x - Timer 1 Control - not implemented\n", ret)); break;
+ case P8_TIMER2_INT_CNTL : LOG((" -> %02x - Timer 2 Interrupt Control - not implemented\n", ret)); break;
+ case P8_TIMER2_CNTL : LOG((" -> %02x - Timer 2 Control - not implemented\n", ret)); break;
+ case P8_ACFAIL_INT_CNTL : LOG((" -> %02x - AC Fail Interrupt Control Register - not implemented\n", ret)); break;
+ case P8_WDOG_TIMER_CNTL : LOG((" -> %02x - Watchdog Timer Control Register - not implemented\n", ret)); break;
case P8_PRINTER_INT_CNTL : LOG((" -> %02x - Printer Interrupt Control Register - not implemented\n", ret)); break;
- case P8_PRINTER_CNTL : LOG((" -> %02x - Printer Control Register - not implemented\n", ret)); break;
- case P8_DMA_INT_CNTL : LOG((" -> %02x - DMA Interrupt Control Register - not implemented\n", ret)); break;
- case P8_DMA_CNTL_STAT : LOG((" -> %02x - DMA Control and Status Register - not implemented\n", ret)); break;
- case P8_BUSERR_CNTL : LOG((" -> %02x - Bus Error Interrupt Control Register - not implemented\n", ret)); break;
- case P8_DMA_STATUS : LOG((" -> %02x - DMA Status Register - not implemented\n", ret)); break;
- case P8_ABORT_INT_CNTL : LOG((" -> %02x - Abort Interrupt Control Register - not fully implemented\n", ret));
- /* Bit 3 When this bit is high, the interrupt is enabled. The interrupt is disabled when this bit is low. This bit is cleared by reset.
- Bit 6 This bit indicates the current state of the ABORT switch. When this bit is low, the ABORT switch is not pressed. When this bit is
+ case P8_PRINTER_CNTL : LOG((" -> %02x - Printer Control Register - not implemented\n", ret)); break;
+ case P8_DMA_INT_CNTL : LOG((" -> %02x - DMA Interrupt Control Register - not implemented\n", ret)); break;
+ case P8_DMA_CNTL_STAT : LOG((" -> %02x - DMA Control and Status Register - not implemented\n", ret)); break;
+ case P8_BUSERR_CNTL : LOG((" -> %02x - Bus Error Interrupt Control Register - not implemented\n", ret)); break;
+ case P8_DMA_STATUS : LOG((" -> %02x - DMA Status Register - not implemented\n", ret)); break;
+ case P8_ABORT_INT_CNTL : LOG((" -> %02x - Abort Interrupt Control Register - not fully implemented\n", ret));
+ /* Bit 3 When this bit is high, the interrupt is enabled. The interrupt is disabled when this bit is low. This bit is cleared by reset.
+ Bit 6 This bit indicates the current state of the ABORT switch. When this bit is low, the ABORT switch is not pressed. When this bit is
high, the ABORT switch is pressed.
- Bit 7 When this bit is high, an abort interrupt is being generated at Level 7. This bit is edge sensitive and it is set on the leading
+ Bit 7 When this bit is high, an abort interrupt is being generated at Level 7. This bit is edge sensitive and it is set on the leading
edge of interrupt enable and abort. This bit is cleared when a 1 is written to it or when the interrupt is disabled. When cleared,
it remains cleared until the next leading edge of interrupt enable and abort. This bit is cleared by reset. */
ret = 0; /* Always return reset values for now */
break;
- case P8_TABADD_FC_CNTL : LOG((" -> %02x - Table Address Function Code Register - not implemented\n", ret)); break;
- case P8_SERIAL_INT_CNTL : LOG((" -> %02x - Serial Port Interrupt Control Register - not implemented\n", ret)); break;
- case P8_GEN_PURP_CNTL : LOG((" -> %02x - General Purpose Control Register - not implemented\n", ret)); break;
- case P8_LAN_INT_CNTL : LOG((" -> %02x - LAN Interrupt Control Register - not implemented\n", ret)); break;
- case P8_GEN_PURP_STAT : LOG((" -> %02x - General Purpose Status Register\n", ret));
+ case P8_TABADD_FC_CNTL : LOG((" -> %02x - Table Address Function Code Register - not implemented\n", ret)); break;
+ case P8_SERIAL_INT_CNTL : LOG((" -> %02x - Serial Port Interrupt Control Register - not implemented\n", ret)); break;
+ case P8_GEN_PURP_CNTL : LOG((" -> %02x - General Purpose Control Register - not implemented\n", ret)); break;
+ case P8_LAN_INT_CNTL : LOG((" -> %02x - LAN Interrupt Control Register - not implemented\n", ret)); break;
+ case P8_GEN_PURP_STAT : LOG((" -> %02x - General Purpose Status Register\n", ret));
ret = m_genpurp_stat;
break;
- case P8_SCSI_INT_CNTL : LOG((" -> %02x - SCSI Port Interrupt Control Register - not implemented\n", ret)); break;
- case P8_SLAVE_BASE_ADDR : LOG((" -> %02x - Slave Base Address Register - not implemented\n", ret)); break;
- case P8_SWI_1_CNTL : LOG((" -> %02x - Software Interrupt 1 Control Register - not implemented\n", ret)); break;
- case P8_INT_VECT_BASE : LOG((" -> %02x - Interrupt Vector Base - not implemented\n", ret)); break;
- case P8_SWI_2_CNTL : LOG((" -> %02x - Software Interrupt 2 Control Register - not implemented\n", ret)); break;
- case P8_REVISION_LEVEL : LOG((" -> %02x - PCC Revision Level Register - not implemented\n", ret)); break;
- case P8_PRINTER_STATUS : LOG((" -> %02x - Printer Status Register - not implemented\n", ret)); break;
+ case P8_SCSI_INT_CNTL : LOG((" -> %02x - SCSI Port Interrupt Control Register - not implemented\n", ret)); break;
+ case P8_SLAVE_BASE_ADDR : LOG((" -> %02x - Slave Base Address Register - not implemented\n", ret)); break;
+ case P8_SWI_1_CNTL : LOG((" -> %02x - Software Interrupt 1 Control Register - not implemented\n", ret)); break;
+ case P8_INT_VECT_BASE : LOG((" -> %02x - Interrupt Vector Base - not implemented\n", ret)); break;
+ case P8_SWI_2_CNTL : LOG((" -> %02x - Software Interrupt 2 Control Register - not implemented\n", ret)); break;
+ case P8_REVISION_LEVEL : LOG((" -> %02x - PCC Revision Level Register - not implemented\n", ret)); break;
+ case P8_PRINTER_STATUS : LOG((" -> %02x - Printer Status Register - not implemented\n", ret)); break;
default:
- LOG((" -> %02x - unsupported register\n", ret));
+ LOG((" -> %02x - unsupported register\n", ret));
}
return ret;
}
WRITE8_MEMBER (mvme147_state::pcc8_w){
- LOG(("Call to %s[%04x] <- %02x - ", FUNCNAME, offset, data));
+ LOG(("Call to %s[%04x] <- %02x - ", FUNCNAME, offset, data));
switch(offset + P8BASE)
{
- case P8_TIMER1_INT_CNTL : LOG(("Timer 1 Interrupt Control - not implemented\n")); break;
- case P8_TIMER1_CNTL : LOG(("Timer 1 Control - not implemented\n")); break;
- case P8_TIMER2_INT_CNTL : LOG(("Timer 2 Interrupt Control - not implemented\n")); break;
- case P8_TIMER2_CNTL : LOG(("Timer 2 Control - not implemented\n")); break;
- case P8_ACFAIL_INT_CNTL : LOG(("AC Fail Interrupt Control Register - not implemented\n")); break;
- case P8_WDOG_TIMER_CNTL : LOG(("Watchdog Timer Control Register - not implemented\n")); break;
+ case P8_TIMER1_INT_CNTL : LOG(("Timer 1 Interrupt Control - not implemented\n")); break;
+ case P8_TIMER1_CNTL : LOG(("Timer 1 Control - not implemented\n")); break;
+ case P8_TIMER2_INT_CNTL : LOG(("Timer 2 Interrupt Control - not implemented\n")); break;
+ case P8_TIMER2_CNTL : LOG(("Timer 2 Control - not implemented\n")); break;
+ case P8_ACFAIL_INT_CNTL : LOG(("AC Fail Interrupt Control Register - not implemented\n")); break;
+ case P8_WDOG_TIMER_CNTL : LOG(("Watchdog Timer Control Register - not implemented\n")); break;
case P8_PRINTER_INT_CNTL : LOG(("Printer Interrupt Control Register - not implemented\n")); break;
- case P8_PRINTER_CNTL : LOG(("Printer Control Register - not implemented\n")); break;
- case P8_DMA_INT_CNTL : LOG(("DMA Interrupt Control Register - not implemented\n")); break;
- case P8_DMA_CNTL_STAT : LOG(("DMA Control and Status Register - not implemented\n")); break;
- case P8_BUSERR_CNTL : LOG(("Bus Error Interrupt Control Register - not implemented\n")); break;
- case P8_DMA_STATUS : LOG(("DMA Status Register - not implemented\n")); break;
- case P8_ABORT_INT_CNTL : LOG(("Abort Interrupt Control Register - not implemented\n")); break;
- case P8_TABADD_FC_CNTL : LOG(("Table Address Function Code Register - not implemented\n")); break;
- case P8_SERIAL_INT_CNTL : LOG(("Serial Port Interrupt Control Register - not implemented\n")); break;
- case P8_GEN_PURP_CNTL : LOG(("General Purpose Control Register - not implemented\n"));
- /*Bits 0-1 These bits control local RAM parity checking. These bits should not be enabled on the MVME147-010.
- These bits are cleared by reset. x0 = parity disabled, x1 = parity enabled
- Bit 2 This bit is used to test the parity generating and checking logic. When this bit is low, correct parity is written to the DRAM;
- when high, incorrect parity is written to the DRAM. This bit is cleared by reset.
- NOTE: We really don't care about DRAM parity!
- Bit 3 When set, this bit is used to enable the local bus timer that is part of the PCC. Because the VMEchip also contains a local bus
+ case P8_PRINTER_CNTL : LOG(("Printer Control Register - not implemented\n")); break;
+ case P8_DMA_INT_CNTL : LOG(("DMA Interrupt Control Register - not implemented\n")); break;
+ case P8_DMA_CNTL_STAT : LOG(("DMA Control and Status Register - not implemented\n")); break;
+ case P8_BUSERR_CNTL : LOG(("Bus Error Interrupt Control Register - not implemented\n")); break;
+ case P8_DMA_STATUS : LOG(("DMA Status Register - not implemented\n")); break;
+ case P8_ABORT_INT_CNTL : LOG(("Abort Interrupt Control Register - not implemented\n")); break;
+ case P8_TABADD_FC_CNTL : LOG(("Table Address Function Code Register - not implemented\n")); break;
+ case P8_SERIAL_INT_CNTL : LOG(("Serial Port Interrupt Control Register - not implemented\n")); break;
+ case P8_GEN_PURP_CNTL : LOG(("General Purpose Control Register - not implemented\n"));
+ /*Bits 0-1 These bits control local RAM parity checking. These bits should not be enabled on the MVME147-010.
+ These bits are cleared by reset. x0 = parity disabled, x1 = parity enabled
+ Bit 2 This bit is used to test the parity generating and checking logic. When this bit is low, correct parity is written to the DRAM;
+ when high, incorrect parity is written to the DRAM. This bit is cleared by reset.
+ NOTE: We really don't care about DRAM parity!
+ Bit 3 When set, this bit is used to enable the local bus timer that is part of the PCC. Because the VMEchip also contains a local bus
timer, this bit should be cleared, turning off the PCC local bus timer. This bit is cleared by reset.
- Bit 4 This bit is the master interrupt enable. When this bit is low, all interrupts on the MVME147 are disabled; when high, all
+ Bit 4 This bit is the master interrupt enable. When this bit is low, all interrupts on the MVME147 are disabled; when high, all
interrupts are enabled. This bit is cleared by reset
- Bits 5-7 When the pattern %101 is written to these bits, the front panel RESET switch is disabled. The RESET switch is enabled for any
- other pattern. These bits are cleared by reset.
- TODO: Bit 4-7 needs to be implemented
- */
+ Bits 5-7 When the pattern %101 is written to these bits, the front panel RESET switch is disabled. The RESET switch is enabled for any
+ other pattern. These bits are cleared by reset.
+ TODO: Bit 4-7 needs to be implemented
+ */
break;
- case P8_LAN_INT_CNTL : LOG(("LAN Interrupt Control Register - not implemented\n")); break;
- case P8_GEN_PURP_STAT : LOG(("General Purpose Status Register\n"));
- /* Bit 0 This bit is set when a parity error occurs while the local processor is accessing RAM. This bit is cleared by writing a 1 to it.
- This bit is cleared by reset.
- Bit 1 This bit is set when a power-up reset occurs. It is cleared by writing a 1 to it.
+ case P8_LAN_INT_CNTL : LOG(("LAN Interrupt Control Register - not implemented\n")); break;
+ case P8_GEN_PURP_STAT : LOG(("General Purpose Status Register\n"));
+ /* Bit 0 This bit is set when a parity error occurs while the local processor is accessing RAM. This bit is cleared by writing a 1 to it.
+ This bit is cleared by reset.
+ Bit 1 This bit is set when a power-up reset occurs. It is cleared by writing a 1 to it.
When the MVME147BUG is installed, its initialization code clears this bit.
- */
+ */
m_genpurp_stat &= ((data & 1) ? ~1 : 0xff); // Check if parity error bit needs to be cleared
m_genpurp_stat &= ((data & 2) ? ~2 : 0xff); // Check if power up reset bit needs to be cleared
break;
- case P8_SCSI_INT_CNTL : LOG(("SCSI Port Interrupt Control Register - not implemented\n")); break;
- case P8_SLAVE_BASE_ADDR : LOG(("Slave Base Address Register - not implemented\n")); break;
- case P8_SWI_1_CNTL : LOG(("Software Interrupt 1 Control Register - not implemented\n")); break;
- case P8_INT_VECT_BASE : LOG(("Interrupt Vector Base - not implemented\n")); break;
- case P8_SWI_2_CNTL : LOG(("Software Interrupt 2 Control Register - not implemented\n")); break;
- case P8_REVISION_LEVEL : LOG(("PCC Revision Level Register - not implemented\n")); break;
- case P8_PRINTER_DATA : LOG(("Printer Data Register - not implemented\n")); break;
+ case P8_SCSI_INT_CNTL : LOG(("SCSI Port Interrupt Control Register - not implemented\n")); break;
+ case P8_SLAVE_BASE_ADDR : LOG(("Slave Base Address Register - not implemented\n")); break;
+ case P8_SWI_1_CNTL : LOG(("Software Interrupt 1 Control Register - not implemented\n")); break;
+ case P8_INT_VECT_BASE : LOG(("Interrupt Vector Base - not implemented\n")); break;
+ case P8_SWI_2_CNTL : LOG(("Software Interrupt 2 Control Register - not implemented\n")); break;
+ case P8_REVISION_LEVEL : LOG(("PCC Revision Level Register - not implemented\n")); break;
+ case P8_PRINTER_DATA : LOG(("Printer Data Register - not implemented\n")); break;
default:
LOG(("unsupported register\n"));
}
@@ -479,129 +477,128 @@ WRITE8_MEMBER (mvme147_state::pcc8_w){
#define VCBASE 0xfffe2001
#define VC_SYS_CNTL_CONF 0xfffe2001
#define VC_VMEBUS_REQ_CONF 0xfffe2003
-#define VC_MASTER_CONF 0xfffe2005
-#define VC_SLAVE_CONF 0xfffe2007
-#define VC_TIMER_CONF 0xfffe2009
+#define VC_MASTER_CONF 0xfffe2005
+#define VC_SLAVE_CONF 0xfffe2007
+#define VC_TIMER_CONF 0xfffe2009
#define VC_SLAVE_ADR_MOD 0xfffe200B
#define VC_MASTER_ADR_MOD 0xfffe200D
#define VC_INT_HNDL_MASK 0xfffe200F
#define VC_UTIL_INT_MASK 0xfffe2011
#define VC_UTIL_INT_VECT 0xfffe2013
-#define VC_INT_REQUEST 0xfffe2015
+#define VC_INT_REQUEST 0xfffe2015
#define VC_VMEBUS_STAT_ID 0xfffe2017
#define VC_BUS_ERR_STATUS 0xfffe2019
#define VC_GCSR_BASE_ADR 0xfffe201B
READ8_MEMBER (mvme147_state::vmechip_r){
-
UINT8 ret = 0;
- LOG(("Call to %s[%04x] ", FUNCNAME, offset));
+ LOG(("Call to %s[%04x] ", FUNCNAME, offset));
switch(offset * 2 + VCBASE)
{
- case VC_SYS_CNTL_CONF :
- LOG((" -> %02x - System Controller Configuration Register - not implemented\n", ret));
+ case VC_SYS_CNTL_CONF :
+ LOG((" -> %02x - System Controller Configuration Register - not implemented\n", ret));
ret = m_vc_cntl_conf;
break;
- case VC_VMEBUS_REQ_CONF :
- /*
- Bits 0-1 These control bits configure the VMEbus requester level as shown in the table below:
+ case VC_VMEBUS_REQ_CONF :
+ /*
+ Bits 0-1 These control bits configure the VMEbus requester level as shown in the table below:
RQLEV1 RQLEV0 Level
- 0 0 0
- 0 1 1
- 1 0 2
- 1 1 3
- These bits are set to 1, 1 by any reset. Note that writes to REQLEV1,0 do not change the actual
- requester level until the MVME147 goes through the action of having VMEbus mastership and releasing it. This means that
- there are times when the value written into REQLEV1,0 do not match the current requester level (the request level is lagging).
- During such times, reads to REQLEV1,0 reflect the actual requester level, not the value written into REQLEV1,0.
- Bit 3 Setting this bit to 1 prevents the requester from releasing the VMEbus. However, unlike the DWB control bit, setting the
- RNEVER bit does not cause the requester to request the VMEbus. Clearing the RNEVER bit allows the requester to
- relinquish the VMEbus in accordance with the other control bits of the requester configuration register.
- This bit is cleared by any reset.
- Bit 4 The RWD bit allows software to configure the requester release mode. When the bit is set, if RNEVER and DWB are both
- cleared to 0, the requester releases the VMEbus after the MC68030 completes a VMEbus cycle. When the bit is cleared, if
- RNEVER and DWB are both cleared to 0, the requester operates in the Release-On-Request (ROR) mode. After acquiring control
- of the VMEbus, it maintains control until it detects another request pending on the VMEbus. This bit is cleared by any reset.
- Bit 5 The RONR bit controls the manner in which the VMEchip requests the VMEbus. When the bit is set; anytime the
- MVME147 has bus mastership, then gives it up, the VMEchip does not request the VMEbus again until it detects the bus
- request signal BR*, on its level, negated for at least 150 ns. When the VMEchip detects BR* negated, it refrains from
- driving it again for at least 200 ns. This bit is cleared by any reset.
- Bit 6 The DHB status bit is 1 when the MVME147 is VMEbus master and 0 when it is not.
- Bit 7 Setting the DWB control bit to 1 causes the VMEchip to request the VMEbus (if not already bus master). When VMEbus
- mastership has been obtained, it is not relinquished until after the DWB and RNEVER bits are both cleared.
- This bit is cleared by any reset.
- */
- ret = 1 << 6; /* Let BUG147 think we are bus master. TODO: Implement proper VME bus signalling */
- LOG((" -> %02x - VMEbus Requester Configuration Register - not implemented\n", ret));
+ 0 0 0
+ 0 1 1
+ 1 0 2
+ 1 1 3
+ These bits are set to 1, 1 by any reset. Note that writes to REQLEV1,0 do not change the actual
+ requester level until the MVME147 goes through the action of having VMEbus mastership and releasing it. This means that
+ there are times when the value written into REQLEV1,0 do not match the current requester level (the request level is lagging).
+ During such times, reads to REQLEV1,0 reflect the actual requester level, not the value written into REQLEV1,0.
+ Bit 3 Setting this bit to 1 prevents the requester from releasing the VMEbus. However, unlike the DWB control bit, setting the
+ RNEVER bit does not cause the requester to request the VMEbus. Clearing the RNEVER bit allows the requester to
+ relinquish the VMEbus in accordance with the other control bits of the requester configuration register.
+ This bit is cleared by any reset.
+ Bit 4 The RWD bit allows software to configure the requester release mode. When the bit is set, if RNEVER and DWB are both
+ cleared to 0, the requester releases the VMEbus after the MC68030 completes a VMEbus cycle. When the bit is cleared, if
+ RNEVER and DWB are both cleared to 0, the requester operates in the Release-On-Request (ROR) mode. After acquiring control
+ of the VMEbus, it maintains control until it detects another request pending on the VMEbus. This bit is cleared by any reset.
+ Bit 5 The RONR bit controls the manner in which the VMEchip requests the VMEbus. When the bit is set; anytime the
+ MVME147 has bus mastership, then gives it up, the VMEchip does not request the VMEbus again until it detects the bus
+ request signal BR*, on its level, negated for at least 150 ns. When the VMEchip detects BR* negated, it refrains from
+ driving it again for at least 200 ns. This bit is cleared by any reset.
+ Bit 6 The DHB status bit is 1 when the MVME147 is VMEbus master and 0 when it is not.
+ Bit 7 Setting the DWB control bit to 1 causes the VMEchip to request the VMEbus (if not already bus master). When VMEbus
+ mastership has been obtained, it is not relinquished until after the DWB and RNEVER bits are both cleared.
+ This bit is cleared by any reset.
+ */
+ ret = 1 << 6; /* Let BUG147 think we are bus master. TODO: Implement proper VME bus signalling */
+ LOG((" -> %02x - VMEbus Requester Configuration Register - not implemented\n", ret));
break;
- case VC_MASTER_CONF : LOG((" -> %02x - Master Configuration Register - not implemented\n", ret)); break;
- case VC_SLAVE_CONF : LOG((" -> %02x - Slave Configuration Register - not implemented\n", ret)); break;
- case VC_TIMER_CONF : LOG((" -> %02x - Timer Configuration Register - not implemented\n", ret));
- /*Bits 0-1 These two bits configure the local time-out period. They are set to 1 by any reset.
+ case VC_MASTER_CONF : LOG((" -> %02x - Master Configuration Register - not implemented\n", ret)); break;
+ case VC_SLAVE_CONF : LOG((" -> %02x - Slave Configuration Register - not implemented\n", ret)); break;
+ case VC_TIMER_CONF : LOG((" -> %02x - Timer Configuration Register - not implemented\n", ret));
+ /*Bits 0-1 These two bits configure the local time-out period. They are set to 1 by any reset.
LBTO1 LBTO0 Time-Out Period
- 0 0 102 microseconds
- 0 1 205 microseconds
- 1 0 410 microseconds
- 1 1 Timer disabled
+ 0 0 102 microseconds
+ 0 1 205 microseconds
+ 1 0 410 microseconds
+ 1 1 Timer disabled
The local bus timer activates bus error to the MC68030 when it tries to access nonexistent locations in the local memory map
- Bits 2-3 These two bits configure the VMEbus access time-out period. They are set to 1 by any reset.
+ Bits 2-3 These two bits configure the VMEbus access time-out period. They are set to 1 by any reset.
ACTO1 ACTO0 Time-Out Period
- 0 0 102 microseconds
- 0 1 1.6 millisecond
- 1 0 51 milliseconds
- 1 1 Timer disabled
+ 0 0 102 microseconds
+ 0 1 1.6 millisecond
+ 1 0 51 milliseconds
+ 1 1 Timer disabled
The VMEbus access timer activates bus error to the MC68030 (except on write posted time-outs) when the VMEchip is
- unsuccessful in obtaining the VMEbus within the time-out period
- Bits 4-5 These two bits configure the VMEbus global time-out period. VBTO1 is set to 1 and VBTO0 is cleared to 0 by SYSRESET.
+ unsuccessful in obtaining the VMEbus within the time-out period
+ Bits 4-5 These two bits configure the VMEbus global time-out period. VBTO1 is set to 1 and VBTO0 is cleared to 0 by SYSRESET.
VBTO1 VBTO0 Time-Out Period
- 0 0 102 microseconds
- 0 1 205 microseconds
- 1 0 410 microseconds
- 1 1 Timer disabled
- The VMEbus global timer activates BERR* on the VMEbus.
- Bit 6 Setting ARBTO to 1 enables the VMEbus arbitration timer. The VMEbus arbitration timer activates BBSY* if it is not activated
- within 410 s after the MVME147 arbiter issues a bus grant. The timer deactivates BBSY* as specified in the VMEbus specification.
+ 0 0 102 microseconds
+ 0 1 205 microseconds
+ 1 0 410 microseconds
+ 1 1 Timer disabled
+ The VMEbus global timer activates BERR* on the VMEbus.
+ Bit 6 Setting ARBTO to 1 enables the VMEbus arbitration timer. The VMEbus arbitration timer activates BBSY* if it is not activated
+ within 410 us after the MVME147 arbiter issues a bus grant. The timer deactivates BBSY* as specified in the VMEbus specification.
This causes the arbiter to arbitrate any pending requests for the bus. This bit is set to 1 by SYSRESET.
- */
+ */
break;
- case VC_SLAVE_ADR_MOD : LOG((" -> %02x - Slave Address Modifier Register - not implemented\n", ret)); break;
- case VC_MASTER_ADR_MOD : LOG((" -> %02x - Master Address Modifier Register - not implemented\n", ret)); break;
- case VC_INT_HNDL_MASK : LOG((" -> %02x - Interrupt Handler Mask Register - not implemented\n", ret)); break;
- case VC_UTIL_INT_MASK : LOG((" -> %02x - Utility Interrupt Mask Register - not implemented\n", ret)); break;
- case VC_UTIL_INT_VECT : LOG((" -> %02x - Utility Interrupt Vector Register - not implemented\n", ret)); break;
- case VC_INT_REQUEST : LOG((" -> %02x - Interrupt Request Register - not implemented\n", ret)); break;
- case VC_VMEBUS_STAT_ID : LOG((" -> %02x - VMEbus Status/ID Register - not implemented\n", ret)); break;
- case VC_BUS_ERR_STATUS : LOG((" -> %02x - Bus Error Status Register - not implemented\n", ret)); break;
- case VC_GCSR_BASE_ADR : LOG((" -> %02x - GCSR Base Address Configuration Register - not implemented\n", ret)); break;
+ case VC_SLAVE_ADR_MOD : LOG((" -> %02x - Slave Address Modifier Register - not implemented\n", ret)); break;
+ case VC_MASTER_ADR_MOD : LOG((" -> %02x - Master Address Modifier Register - not implemented\n", ret)); break;
+ case VC_INT_HNDL_MASK : LOG((" -> %02x - Interrupt Handler Mask Register - not implemented\n", ret)); break;
+ case VC_UTIL_INT_MASK : LOG((" -> %02x - Utility Interrupt Mask Register - not implemented\n", ret)); break;
+ case VC_UTIL_INT_VECT : LOG((" -> %02x - Utility Interrupt Vector Register - not implemented\n", ret)); break;
+ case VC_INT_REQUEST : LOG((" -> %02x - Interrupt Request Register - not implemented\n", ret)); break;
+ case VC_VMEBUS_STAT_ID : LOG((" -> %02x - VMEbus Status/ID Register - not implemented\n", ret)); break;
+ case VC_BUS_ERR_STATUS : LOG((" -> %02x - Bus Error Status Register - not implemented\n", ret)); break;
+ case VC_GCSR_BASE_ADR : LOG((" -> %02x - GCSR Base Address Configuration Register - not implemented\n", ret)); break;
default:
LOG(("unsupported register"));
- }
- return ret;
+ }
+ return ret;
}
WRITE8_MEMBER (mvme147_state::vmechip_w){
LOG(("Call to %s[%04x] <- %02x - ", FUNCNAME, offset, data));
switch(offset * 2 + VCBASE)
{
- case VC_SYS_CNTL_CONF :
- LOG(("System Controller Configuration Register - not implemented\n"));
+ case VC_SYS_CNTL_CONF :
+ LOG(("System Controller Configuration Register - not implemented\n"));
m_vc_cntl_conf = data & 0xff;
break;
- case VC_VMEBUS_REQ_CONF : LOG(("VMEbus Requester Configuration Register - not implemented\n")); break;
- case VC_MASTER_CONF : LOG(("Master Configuration Register - not implemented\n")); break;
- case VC_SLAVE_CONF : LOG(("Slave Configuration Register - not implemented\n")); break;
- case VC_TIMER_CONF : LOG(("Timer Configuration Register - not implemented\n")); break;
- case VC_SLAVE_ADR_MOD : LOG(("Slave Address Modifier Register - not implemented\n")); break;
- case VC_MASTER_ADR_MOD : LOG(("Master Address Modifier Register - not implemented\n")); break;
- case VC_INT_HNDL_MASK : LOG(("Interrupt Handler Mask Register - not implemented\n")); break;
- case VC_UTIL_INT_MASK : LOG(("Utility Interrupt Mask Register - not implemented\n")); break;
- case VC_UTIL_INT_VECT : LOG(("Utility Interrupt Vector Register - not implemented\n")); break;
- case VC_INT_REQUEST : LOG(("Interrupt Request Register - not implemented\n")); break;
- case VC_VMEBUS_STAT_ID : LOG(("VMEbus Status/ID Register - not implemented\n")); break;
- case VC_BUS_ERR_STATUS : LOG(("Bus Error Status Register - not implemented\n")); break;
- case VC_GCSR_BASE_ADR : LOG(("GCSR Base Address Configuration Register - not implemented\n")); break;
+ case VC_VMEBUS_REQ_CONF : LOG(("VMEbus Requester Configuration Register - not implemented\n")); break;
+ case VC_MASTER_CONF : LOG(("Master Configuration Register - not implemented\n")); break;
+ case VC_SLAVE_CONF : LOG(("Slave Configuration Register - not implemented\n")); break;
+ case VC_TIMER_CONF : LOG(("Timer Configuration Register - not implemented\n")); break;
+ case VC_SLAVE_ADR_MOD : LOG(("Slave Address Modifier Register - not implemented\n")); break;
+ case VC_MASTER_ADR_MOD : LOG(("Master Address Modifier Register - not implemented\n")); break;
+ case VC_INT_HNDL_MASK : LOG(("Interrupt Handler Mask Register - not implemented\n")); break;
+ case VC_UTIL_INT_MASK : LOG(("Utility Interrupt Mask Register - not implemented\n")); break;
+ case VC_UTIL_INT_VECT : LOG(("Utility Interrupt Vector Register - not implemented\n")); break;
+ case VC_INT_REQUEST : LOG(("Interrupt Request Register - not implemented\n")); break;
+ case VC_VMEBUS_STAT_ID : LOG(("VMEbus Status/ID Register - not implemented\n")); break;
+ case VC_BUS_ERR_STATUS : LOG(("Bus Error Status Register - not implemented\n")); break;
+ case VC_GCSR_BASE_ADR : LOG(("GCSR Base Address Configuration Register - not implemented\n")); break;
default:
LOG(("unsupported register\n"));
}
@@ -669,18 +666,18 @@ ROM_LOAD16_BYTE("147bug-2.44-U30.BIN", 0xff800001, 0x20000, CRC (f883e17d) SHA1
* 09 80 - Channel A reset
* 04 44 - x16 clock, 1 stop bits, no parity
* 03 C1 - 8 bit, receiver enable, auto enable off
- * 01 00 -
+ * 01 00 -
* 02 70 - set interrupt vector 70
* 05 EA
* 0B 56
- * 0C 0E - low baudrate divider
- * 0D 00 - hi baudrate divider
+ * 0C 0E - low baudrate divider
+ * 0D 00 - hi baudrate divider
* 0E 83 - Baud Rate Generator (BRG) enabled, PCLK is BRG source, BRG is DPLL source
* 06 00 - Tx sync character SDLC
* 07 00 - Rx sync character SDLC
* 0F 00 - disable all external interrupt and status
* 10
- * channel B is identical but resets Channel B of course, SCC2 is also identical except using interrupt vector 71
+ * channel B is identical but resets Channel B of course, SCC2 is also identical except using interrupt vector 71
*/
ROM_END
diff --git a/src/mame/drivers/neogeo.cpp b/src/mame/drivers/neogeo.cpp
index 644c4a1873e..6ed800c3006 100644
--- a/src/mame/drivers/neogeo.cpp
+++ b/src/mame/drivers/neogeo.cpp
@@ -432,7 +432,7 @@
backup ram to indiate that the protection check has failed.
****************************************************************************
-
+
Mahjong Panel notes (2009-03 FP):
=================================
@@ -451,8 +451,8 @@
doubt other BIOS were programmed to be compatible with mahjong panels
****************************************************************************
-
- AES driver (home version of MVS)
+
+ AES driver (home version of MVS)
Current emulation status:
- Cartridges run.
- Riding Hero runs in slow-mo due to the unemulated comm link MCU in the cartridge.
@@ -892,13 +892,13 @@ WRITE8_MEMBER(neogeo_state::system_control_w)
WRITE16_MEMBER(neogeo_state::write_banksel)
{
UINT32 len = (!m_slots[m_curr_slot] || m_slots[m_curr_slot]->get_rom_size() == 0) ? m_region_maincpu->bytes() : m_slots[m_curr_slot]->get_rom_size();
-
+
if ((len <= 0x100000) && (data & 0x07))
logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", space.device().safe_pc(), data);
else
{
int bank = data & 0x07;
-
+
if ((bank + 1) * 0x100000 >= len)
{
logerror("PC %06x: warning: bankswitch to empty bank %02x\n", space.device().safe_pc(), data);
@@ -986,7 +986,7 @@ WRITE16_MEMBER(neogeo_state::write_bankprot_pvc)
{
// write to cart ram
m_slots[m_curr_slot]->protection_w(space, offset, data, mem_mask);
-
+
// actual bankswitch
if (offset >= 0xff8)
{
@@ -999,7 +999,7 @@ WRITE16_MEMBER(neogeo_state::write_bankprot_kf2k3bl)
{
// write to cart ram
m_slots[m_curr_slot]->protection_w(space, offset, data, mem_mask);
-
+
// actual bankswitch
if (offset == 0x1ff0/2 || offset == 0x1ff2/2)
{
@@ -1011,7 +1011,7 @@ WRITE16_MEMBER(neogeo_state::write_bankprot_kf2k3bl)
WRITE16_MEMBER(neogeo_state::write_bankprot_ms5p)
{
logerror("ms5plus bankswitch - offset: %06x PC %06x: set banking %04x\n", offset, space.device().safe_pc(), data);
-
+
if ((offset == 0) && (data == 0xa0))
{
m_bank_base = 0xa0;
@@ -1027,7 +1027,7 @@ WRITE16_MEMBER(neogeo_state::write_bankprot_ms5p)
WRITE16_MEMBER(neogeo_state::write_bankprot_kof10th)
{
m_slots[m_curr_slot]->protection_w(space, offset, data, mem_mask);
-
+
if (offset == 0xffff0/2)
{
// Standard bankswitch
@@ -1054,7 +1054,7 @@ void neogeo_state::init_cpu()
{
UINT8 *ROM = (!m_slots[m_curr_slot] || m_slots[m_curr_slot]->get_rom_size() == 0) ? m_region_maincpu->base() : (UINT8 *)m_slots[m_curr_slot]->get_rom_base();
UINT32 len = (!m_slots[m_curr_slot] || m_slots[m_curr_slot]->get_rom_size() == 0) ? m_region_maincpu->bytes() : m_slots[m_curr_slot]->get_rom_size();
-
+
if (len > 0x100000)
m_bank_cartridge->set_base(ROM + 0x100000);
else
@@ -1066,18 +1066,18 @@ void neogeo_state::init_audio()
UINT8 *ROM = (!m_slots[m_curr_slot] || m_slots[m_curr_slot]->get_audio_size() == 0) ? m_region_audiocpu->base() : m_slots[m_curr_slot]->get_audio_base();
UINT32 len = (!m_slots[m_curr_slot] || m_slots[m_curr_slot]->get_audio_size() == 0) ? m_region_audiocpu->bytes() : m_slots[m_curr_slot]->get_audio_size();
UINT32 address_mask;
-
+
/* audio bios/cartridge selection */
m_bank_audio_main->configure_entry(0, (m_region_audiobios != nullptr) ? m_region_audiobios->base() : ROM); /* on hardware with no SM1 ROM, the cart ROM is always enabled */
m_bank_audio_main->configure_entry(1, ROM);
m_bank_audio_main->set_entry(1);
-
+
/* audio banking */
m_bank_audio_cart[0] = membank("audio_f000");
m_bank_audio_cart[1] = membank("audio_e000");
m_bank_audio_cart[2] = membank("audio_c000");
m_bank_audio_cart[3] = membank("audio_8000");
-
+
address_mask = (len - 0x10000 - 1) & 0x3ffff;
for (int region = 0; region < 4; region++)
{
@@ -1087,7 +1087,7 @@ void neogeo_state::init_audio()
m_bank_audio_cart[region]->configure_entry(bank, &ROM[bank_address]);
}
}
-
+
// set initial audio banks - THIS IS A HACK
// Z80 banking is handled by the NEO-ZMC chip in the cartridge
// (in later cartridges, by multifunction banking/protection chips that implement the same bank scheme)
@@ -1105,12 +1105,12 @@ void neogeo_state::init_ym()
{
UINT8 *ROM;
UINT32 len;
-
+
// Resetting a sound device causes the core to update() it and generate samples if it's not up to date.
// Thus we preemptively reset it here while the old pointers are still valid so it's up to date and
// doesn't generate samples below when we reset it for the new pointers.
m_ym->reset();
-
+
// all these region_free / region_alloc machinery is needed because current YM emulation does not allow
// to pass a ROM pointer different from a "ymsnd" / "ymsnd.deltat" region, and therefore we need to copy
// the ROM(s) from the cart to the corresponding region(s) with appropriate names...
@@ -1123,17 +1123,17 @@ void neogeo_state::init_ym()
machine().memory().region_alloc(":ymsnd", len, 1, ENDIANNESS_LITTLE);
memcpy(memregion(":ymsnd")->base(), ROM, len);
}
-
+
if (memregion(":ymsnd.deltat"))
machine().memory().region_free(":ymsnd.deltat");
if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_ymdelta_size())
{
ROM = m_slots[m_curr_slot]->get_ymdelta_base();
- len = m_slots[m_curr_slot]->get_ymdelta_size();
+ len = m_slots[m_curr_slot]->get_ymdelta_size();
machine().memory().region_alloc(":ymsnd.deltat", len, 1, ENDIANNESS_LITTLE);
memcpy(memregion(":ymsnd.deltat")->base(), ROM, len);
}
-
+
m_ym->reset(); // reset it again to get the new pointers
}
@@ -1164,10 +1164,10 @@ void neogeo_state::set_slot_idx(int slot)
address_space &space = m_maincpu->space(AS_PROGRAM);
m_curr_slot = slot;
m_bank_base = 0;
-
+
if (!m_slots[m_curr_slot]->user_loadable())
m_slots[m_curr_slot]->late_decrypt_all();
-
+
// unmap any handler that previous carts could have installed
space.unmap_readwrite(0x000080, 0x0fffff);
space.unmap_readwrite(0x200000, 0x2fffff);
@@ -1175,24 +1175,24 @@ void neogeo_state::set_slot_idx(int slot)
space.install_rom(0x000080, 0x0fffff, 0, 0, (UINT16 *)m_region_maincpu->base() + 0x80/2);
else
space.install_rom(0x000080, 0x0fffff, 0, 0, (UINT16 *)m_slots[m_curr_slot]->get_rom_base() + 0x80/2);
-
+
space.install_read_bank(0x200000, 0x2fffff, 0, 0, "cartridge");
space.install_write_handler(0x2ffff0, 0x2fffff, write16_delegate(FUNC(neogeo_state::write_banksel),this));
m_bank_cartridge = membank("cartridge");
-
+
init_cpu();
-
+
init_audio();
m_audiocpu->reset(); // svc have no sound if in higher slots without this?
-
+
init_ym();
-
+
init_sprites();
-
+
if (!m_slots[m_curr_slot]->user_loadable())
m_slots[m_curr_slot]->set_cart_type(m_slots[m_curr_slot]->default_option());
-
+
int type = m_slots[m_curr_slot]->get_type();
switch (type)
{
@@ -1306,16 +1306,16 @@ void neogeo_state::set_slot_idx(int slot)
void neogeo_state::common_machine_start()
{
m_use_cart_vectors = 0;
-
+
create_interrupt_timers();
-
+
/* irq levels for MVS / AES */
m_vblank_level = 1;
m_raster_level = 2;
-
+
/* start with an IRQ3 - but NOT on a reset */
m_irq3_pending = 1;
-
+
/* register state save */
save_item(NAME(m_display_position_interrupt_control));
save_item(NAME(m_display_counter));
@@ -1346,21 +1346,21 @@ void neogeo_state::machine_start()
{
m_type = NEOGEO_MVS;
common_machine_start();
-
+
// enable rtc and serial mode
m_upd4990a->cs_w(1);
m_upd4990a->oe_w(1);
m_upd4990a->c0_w(1);
m_upd4990a->c1_w(1);
m_upd4990a->c2_w(1);
-
+
if (m_slot1) { m_slots[0] = m_slot1; } else { m_slots[0] = nullptr; }
if (m_slot2) { m_slots[1] = m_slot2; } else { m_slots[1] = nullptr; }
if (m_slot3) { m_slots[2] = m_slot3; } else { m_slots[2] = nullptr; }
if (m_slot4) { m_slots[3] = m_slot4; } else { m_slots[3] = nullptr; }
if (m_slot5) { m_slots[4] = m_slot5; } else { m_slots[4] = nullptr; }
if (m_slot6) { m_slots[5] = m_slot6; } else { m_slots[5] = nullptr; }
-
+
m_sprgen->m_fixed_layer_bank_type = 0;
m_sprgen->set_screen(m_screen);
@@ -1372,7 +1372,7 @@ void neogeo_state::machine_start()
void neogeo_state::neogeo_postload()
{
m_bank_audio_main->set_entry(m_use_cart_audio);
-
+
if (m_type == NEOGEO_MVS)
set_outputs();
if (m_type == NEOGEO_MVS || m_type == NEOGEO_AES)
@@ -1392,23 +1392,23 @@ void neogeo_state::machine_reset()
{
offs_t offs;
address_space &space = m_maincpu->space(AS_PROGRAM);
-
+
// reset system control registers
for (offs = 0; offs < 8; offs++)
system_control_w(space, offs, 0);
-
+
// disable audiocpu nmi
m_audio_cpu_nmi_enabled = false;
m_audio_cpu_nmi_pending = false;
audio_cpu_check_nmi();
-
+
m_maincpu->reset();
-
+
start_interrupt_timers();
-
+
// trigger the IRQ3 that was set by MACHINE_START
update_interrupts();
-
+
m_recurse = false;
}
@@ -1700,23 +1700,23 @@ MACHINE_CONFIG_END
// two cartslots (MV-2F)
#define NEOGEO_CONFIG_TWO_CARTSLOTS \
- NEOGEO_CONFIG_CARTSLOT("cslot1") \
+ NEOGEO_CONFIG_CARTSLOT("cslot1") \
NEOGEO_CONFIG_CARTSLOT("cslot2")
// four cartslots (MV-4F)
#define NEOGEO_CONFIG_FOUR_CARTSLOTS \
- NEOGEO_CONFIG_CARTSLOT("cslot1") \
- NEOGEO_CONFIG_CARTSLOT("cslot2") \
- NEOGEO_CONFIG_CARTSLOT("cslot3") \
+ NEOGEO_CONFIG_CARTSLOT("cslot1") \
+ NEOGEO_CONFIG_CARTSLOT("cslot2") \
+ NEOGEO_CONFIG_CARTSLOT("cslot3") \
NEOGEO_CONFIG_CARTSLOT("cslot4")
// six cartslots (MV-6F)
#define NEOGEO_CONFIG_SIX_CARTSLOTS \
- NEOGEO_CONFIG_CARTSLOT("cslot1") \
- NEOGEO_CONFIG_CARTSLOT("cslot2") \
- NEOGEO_CONFIG_CARTSLOT("cslot3") \
- NEOGEO_CONFIG_CARTSLOT("cslot4") \
- NEOGEO_CONFIG_CARTSLOT("cslot5") \
+ NEOGEO_CONFIG_CARTSLOT("cslot1") \
+ NEOGEO_CONFIG_CARTSLOT("cslot2") \
+ NEOGEO_CONFIG_CARTSLOT("cslot3") \
+ NEOGEO_CONFIG_CARTSLOT("cslot4") \
+ NEOGEO_CONFIG_CARTSLOT("cslot5") \
NEOGEO_CONFIG_CARTSLOT("cslot6")
@@ -1746,14 +1746,14 @@ MACHINE_START_MEMBER(aes_state, aes)
{
m_type = NEOGEO_AES;
common_machine_start();
-
+
m_slots[0] = m_slot1;
m_slots[1] = nullptr;
m_slots[2] = nullptr;
m_slots[3] = nullptr;
m_slots[4] = nullptr;
m_slots[5] = nullptr;
-
+
m_sprgen->m_fixed_layer_bank_type = 0;
m_sprgen->set_screen(m_screen);
@@ -2036,4 +2036,3 @@ CONS( 1990, aes, 0, 0, aes, aes, driver_device, 0,
// Include standalone drivers for the single games
#include "neodriv.hxx"
-
diff --git a/src/mame/drivers/neopcb.cpp b/src/mame/drivers/neopcb.cpp
index d23aefca218..e33e82c9113 100644
--- a/src/mame/drivers/neopcb.cpp
+++ b/src/mame/drivers/neopcb.cpp
@@ -11,7 +11,7 @@ void neopcb_state::machine_start()
{
m_type = NEOGEO_MVS;
common_machine_start();
-
+
// enable rtc and serial mode
m_upd4990a->cs_w(1);
m_upd4990a->oe_w(1);
@@ -243,7 +243,7 @@ void neopcb_state::svcpcb_gfx_decrypt()
int rom_size = memregion("sprites")->bytes();
UINT8 *rom = memregion("sprites")->base();
dynamic_buffer buf(rom_size);
-
+
for (int i = 0; i < rom_size; i++)
rom[i] ^= xorval[(i % 4)];
@@ -287,7 +287,7 @@ void neopcb_state::kf2k3pcb_gfx_decrypt()
int rom_size = memregion("sprites")->bytes();
UINT8 *rom = memregion("sprites")->base();
dynamic_buffer buf(rom_size);
-
+
for (int i = 0; i < rom_size; i++)
rom[ i ] ^= xorval[ (i % 4) ];
@@ -320,18 +320,18 @@ void neopcb_state::kf2k3pcb_decrypt_s1data()
int srom_size = memregion("sprites")->bytes();
src = memregion("sprites")->base() + srom_size - 0x1000000 - 0x80000; // Decrypt S
dst = memregion("fixed")->base();
-
+
for (int i = 0; i < tx_size / 2; i++)
dst[i] = src[(i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4)];
-
+
src = memregion("sprites")->base() + srom_size - 0x80000;
dst = memregion("fixed")->base() + 0x80000;
-
- for (int i = 0; i < tx_size / 2; i++)
+
+ for (int i = 0; i < tx_size / 2; i++)
dst[i] = src[(i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4)];
-
+
dst = memregion("fixed")->base();
-
+
for (int i = 0; i < tx_size; i++)
dst[i] = BITSWAP8(dst[i] ^ 0xd2, 4, 0, 7, 2, 5, 1, 6, 3);
}
@@ -350,10 +350,10 @@ void neopcb_state::kf2k3pcb_sp1_decrypt()
0x03,0x05,0x0b,0x0d,0x03,0x05,0x0b,0x0d,
0x04,0x00,0x04,0x00,0x0e,0x0a,0x0e,0x0a
};
-
+
UINT16 *rom = (UINT16 *)memregion("mainbios")->base();
std::vector<UINT16> buf(0x80000/2);
-
+
for (int i = 0; i < 0x80000/2; i++)
{
// address xor
@@ -367,13 +367,13 @@ void neopcb_state::kf2k3pcb_sp1_decrypt()
if ( i & 0x02000) addr ^= 0x8000;
addr ^= address[((i >> 1) & 0x38) | (i & 7)];
buf[i] = rom[addr];
-
+
// data xor
if (buf[i] & 0x0004) buf[i] ^= 0x0001;
if (buf[i] & 0x0010) buf[i] ^= 0x0002;
if (buf[i] & 0x0020) buf[i] ^= 0x0008;
}
-
+
memcpy(rom, &buf[0], 0x80000);
}
@@ -406,7 +406,7 @@ WRITE16_MEMBER(neopcb_state::write_bankpvc)
{
// write to cart ram
m_pvc_prot->protection_w(space, offset, data, mem_mask);
-
+
// actual bankswitch
if (offset >= 0xff8)
{
@@ -424,7 +424,7 @@ void neopcb_state::install_common()
// install protection handlers + bankswitch handler
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x2fe000, 0x2fffff, read16_delegate(FUNC(pvc_prot_device::protection_r),(pvc_prot_device*)m_pvc_prot), write16_delegate(FUNC(neopcb_state::write_bankpvc),this));
-
+
// perform basic memory initialization that are usually done on-cart
m_curr_slot = 0;
m_bank_base = 0;
@@ -439,7 +439,7 @@ void neopcb_state::install_banked_bios()
m_maincpu->space(AS_PROGRAM).install_read_bank(0xc00000, 0xc1ffff, 0, 0x0e0000, "bios_bank");
membank("bios_bank")->configure_entries(0, 2, memregion("mainbios")->base(), 0x20000);
membank("bios_bank")->set_entry(1);
-
+
}
DRIVER_INIT_MEMBER(neopcb_state, ms5pcb)
@@ -513,4 +513,3 @@ GAME( 2003, ms5pcb, 0, neopcb, dualbios, neopcb_state, ms5pcb, RO
GAME( 2003, svcpcb, 0, neopcb, dualbios, neopcb_state, svcpcb, ROT0, "SNK Playmore", "SNK vs. Capcom - SVC Chaos (JAMMA PCB, set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 2003, svcpcba, svcpcb, neopcb, dualbios, neopcb_state, svcpcb, ROT0, "SNK Playmore", "SNK vs. Capcom - SVC Chaos (JAMMA PCB, set 2)" , MACHINE_SUPPORTS_SAVE ) /* Encrypted Code */
GAME( 2003, kf2k3pcb, 0, neopcb, neogeo, neopcb_state, kf2k3pcb, ROT0, "SNK Playmore", "The King of Fighters 2003 (Japan, JAMMA PCB)", MACHINE_SUPPORTS_SAVE )
-
diff --git a/src/mame/drivers/seattle.cpp b/src/mame/drivers/seattle.cpp
index 3d9034e1c7b..395b7cfd0fd 100644
--- a/src/mame/drivers/seattle.cpp
+++ b/src/mame/drivers/seattle.cpp
@@ -2701,7 +2701,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( blitz99, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99)
@@ -2713,7 +2713,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( blitz2k, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99)
@@ -2725,7 +2725,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( carnevil, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CARNEVIL)
@@ -2737,7 +2737,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( hyprdriv, seattle200_widget )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_HYPRDRIV)
diff --git a/src/mame/drivers/skylncr.cpp b/src/mame/drivers/skylncr.cpp
index 2bc5ac2fc1b..1c06057c8f9 100644
--- a/src/mame/drivers/skylncr.cpp
+++ b/src/mame/drivers/skylncr.cpp
@@ -1932,7 +1932,7 @@ DRIVER_INIT_MEMBER(skylncr_state, sonikfig)
00 01 02 03 04 05 06 07
\ /
SWAPPED
-
+
00 01 02 03 04 05 06 07
\ \ / /
\ X /
diff --git a/src/mame/drivers/thomson.cpp b/src/mame/drivers/thomson.cpp
index 5b138d2a082..75027cdfecb 100644
--- a/src/mame/drivers/thomson.cpp
+++ b/src/mame/drivers/thomson.cpp
@@ -742,7 +742,7 @@ static MACHINE_CONFIG_START( to7, thomson_state )
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("40K")
MCFG_RAM_EXTRA_OPTIONS("24K,48K")
-
+
/* software lists */
MCFG_SOFTWARE_LIST_ADD("to7_cart_list","to7_cart")
MCFG_SOFTWARE_LIST_ADD("to7_cass_list","to7_cass")
@@ -2235,7 +2235,7 @@ static MACHINE_CONFIG_DERIVED( mo6, to7 )
/* internal ram */
MCFG_RAM_MODIFY(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("128K")
-
+
MCFG_DEVICE_REMOVE("to7_cart_list")
MCFG_DEVICE_REMOVE("to7_cass_list")
MCFG_DEVICE_REMOVE("to_flop_list")
@@ -2505,7 +2505,7 @@ static MACHINE_CONFIG_DERIVED( mo5nr, to7 )
/* internal ram */
MCFG_RAM_MODIFY(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("128K")
-
+
MCFG_DEVICE_REMOVE("to7_cart_list")
MCFG_DEVICE_REMOVE("to7_cass_list")
MCFG_DEVICE_REMOVE("to_flop_list")
diff --git a/src/mame/drivers/ticalc1x.cpp b/src/mame/drivers/ticalc1x.cpp
index 04dea3b8e16..e558e53756b 100644
--- a/src/mame/drivers/ticalc1x.cpp
+++ b/src/mame/drivers/ticalc1x.cpp
@@ -913,7 +913,7 @@ MACHINE_CONFIG_END
TI Math Marvel
* TMS1980 MCU label TMC1986A-NL (die label 1980A 86A)
* 9-digit cyan VFD display(2 digits are custom), 1-bit sound
-
+
This is the same hardware as DataMan, with R8 connected to a piezo.
***************************************************************************/
@@ -934,7 +934,7 @@ WRITE16_MEMBER(mathmarv_state::write_r)
{
// R8: speaker out
m_speaker->level_w(data >> 8 & 1);
-
+
// rest is same as dataman
dataman_state::write_r(space, offset, data);
}
diff --git a/src/mame/drivers/tourvis.cpp b/src/mame/drivers/tourvis.cpp
index 4ea88122232..18887ebcf4c 100644
--- a/src/mame/drivers/tourvis.cpp
+++ b/src/mame/drivers/tourvis.cpp
@@ -381,7 +381,7 @@ static INPUT_PORTS_START( tourvision )
PORT_DIPSETTING( 0x10, "120" )
PORT_DIPSETTING( 0x08, "90" )
PORT_DIPSETTING( 0x00, "60" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
PORT_START( "DSW2" )
PORT_DIPNAME( 0x03, 0x03, "Coins needed 2" )
diff --git a/src/mame/drivers/unixpc.cpp b/src/mame/drivers/unixpc.cpp
index 63bbe281737..d579128dfc8 100644
--- a/src/mame/drivers/unixpc.cpp
+++ b/src/mame/drivers/unixpc.cpp
@@ -5,13 +5,13 @@
AT&T Unix PC series
Skeleton driver by Dirk Best and R. Belmont
-
- DIVS instruction at 0x801112 (the second time) causes a divide-by-zero
- exception the system isn't ready for due to word at 0x5EA6 being zero.
-
- Code might not get there if the attempted FDC boot succeeds; FDC hookup
- probably needs help. 2797 isn't asserting DRQ?
-
+
+ DIVS instruction at 0x801112 (the second time) causes a divide-by-zero
+ exception the system isn't ready for due to word at 0x5EA6 being zero.
+
+ Code might not get there if the attempted FDC boot succeeds; FDC hookup
+ probably needs help. 2797 isn't asserting DRQ?
+
***************************************************************************/
@@ -66,13 +66,13 @@ public:
DECLARE_READ16_MEMBER( diskdma_size_r );
DECLARE_WRITE16_MEMBER( diskdma_size_w );
DECLARE_WRITE16_MEMBER( diskdma_ptr_w );
-
+
DECLARE_WRITE_LINE_MEMBER( wd2797_intrq_w );
DECLARE_WRITE_LINE_MEMBER( wd2797_drq_w );
required_shared_ptr<UINT16> m_mapram;
required_shared_ptr<UINT16> m_videoram;
-
+
private:
UINT16 *m_ramptr;
UINT32 m_ramsize;
@@ -183,7 +183,7 @@ WRITE16_MEMBER( unixpc_state::misc_control_w )
// bit 14 = 0 for disk DMA write, 1 for disk DMA read
// bit 13 = Centronics strobe
// bit 12 = 0 = modem baud rate from UART clock inputs, 1 = baud from programmable timer
-
+
output().set_value("led_0", !BIT(data, 8));
output().set_value("led_1", !BIT(data, 9));
output().set_value("led_2", !BIT(data, 10));
@@ -218,7 +218,7 @@ WRITE16_MEMBER( unixpc_state::diskdma_ptr_w )
m_diskdmaptr &= 0xffff00;
m_diskdmaptr |= (offset & 0xff);
}
-
+
logerror("diskdma_ptr_w: wrote at %x, ptr now %x\n", offset<<1, m_diskdmaptr);
}
diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp
index 2754a7afe92..395779d3c44 100644
--- a/src/mame/drivers/vegas.cpp
+++ b/src/mame/drivers/vegas.cpp
@@ -2313,7 +2313,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gauntleg, vegas )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CALSPEED)
@@ -2326,7 +2326,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gauntdl, vegas )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_GAUNTDL)
@@ -2339,7 +2339,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( warfa, vegas250 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE)
@@ -2352,7 +2352,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tenthdeg, vegas )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
-// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb) -- Not in ram???
+// MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb) -- Not in ram???
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_GAUNTDL)
diff --git a/src/mame/includes/alesis.h b/src/mame/includes/alesis.h
index bec0463f49d..c4bb2efa70e 100644
--- a/src/mame/includes/alesis.h
+++ b/src/mame/includes/alesis.h
@@ -95,7 +95,7 @@ public:
DECLARE_WRITE8_MEMBER( mmt8_p3_w );
DECLARE_WRITE8_MEMBER( sr16_lcd_w );
HD44780_PIXEL_UPDATE(sr16_pixel_update);
-
+
private:
UINT8 m_kb_matrix;
UINT8 m_leds;
diff --git a/src/mame/includes/asteroid.h b/src/mame/includes/asteroid.h
index 10da970254c..76f90210483 100644
--- a/src/mame/includes/asteroid.h
+++ b/src/mame/includes/asteroid.h
@@ -63,4 +63,3 @@ public:
DISCRETE_SOUND_EXTERN( asteroid );
DISCRETE_SOUND_EXTERN( astdelux );
-
diff --git a/src/mame/includes/astrocde.h b/src/mame/includes/astrocde.h
index e1141d96c33..4f2b447439a 100644
--- a/src/mame/includes/astrocde.h
+++ b/src/mame/includes/astrocde.h
@@ -203,4 +203,3 @@ public:
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
};
-
diff --git a/src/mame/includes/chihiro.h b/src/mame/includes/chihiro.h
index 90757bb4cbc..895cdf6c01c 100644
--- a/src/mame/includes/chihiro.h
+++ b/src/mame/includes/chihiro.h
@@ -212,7 +212,7 @@ public:
enum class NV2A_VERTEX_ATTR {
POS = 0, // position
WEIGHT = 1, // blend weigth
- NORMAL = 2,
+ NORMAL = 2,
COLOR0 = 3, // diffuse
COLOR1 = 4, // specular
FOG = 5,
diff --git a/src/mame/includes/dassault.h b/src/mame/includes/dassault.h
index 2470c42366f..aa8d5a5f4b8 100644
--- a/src/mame/includes/dassault.h
+++ b/src/mame/includes/dassault.h
@@ -36,7 +36,7 @@ public:
m_ram(*this, "ram"),
m_shared_ram(*this, "shared_ram"),
m_ram2(*this, "ram2")
-
+
{ }
/* devices */
diff --git a/src/mame/includes/ladybug.h b/src/mame/includes/ladybug.h
index e6f5572f607..51d1cd92a6f 100644
--- a/src/mame/includes/ladybug.h
+++ b/src/mame/includes/ladybug.h
@@ -3,7 +3,7 @@
/*************************************************************************
Universal 8106-A2 + 8106-B PCB set
-
+
*************************************************************************/
class ladybug_state : public driver_device
diff --git a/src/mame/includes/madmotor.h b/src/mame/includes/madmotor.h
index db43ea6f9c5..27089ace10b 100644
--- a/src/mame/includes/madmotor.h
+++ b/src/mame/includes/madmotor.h
@@ -38,7 +38,7 @@ public:
required_device<deco_bac06_device> m_tilegen3;
required_device<deco_mxc06_device> m_spritegen;
required_device<generic_latch_8_device> m_soundlatch;
-
+
DECLARE_WRITE16_MEMBER(madmotor_sound_w);
DECLARE_DRIVER_INIT(madmotor);
virtual void machine_start() override;
diff --git a/src/mame/includes/megadrvb.h b/src/mame/includes/megadrvb.h
index 5be00cf1810..8b1f6b1c11a 100644
--- a/src/mame/includes/megadrvb.h
+++ b/src/mame/includes/megadrvb.h
@@ -33,5 +33,3 @@ public:
DECLARE_MACHINE_START(md_bootleg) { MACHINE_START_CALL_MEMBER(megadriv); m_vdp->stop_timers(); }
DECLARE_MACHINE_START(md_6button);
};
-
-
diff --git a/src/mame/includes/midzeus.h b/src/mame/includes/midzeus.h
index 9e8a717c3e0..7530b0b68f2 100644
--- a/src/mame/includes/midzeus.h
+++ b/src/mame/includes/midzeus.h
@@ -84,4 +84,3 @@ private:
void log_waveram(UINT32 length_and_base);
void update_gun_irq();
};
-
diff --git a/src/mame/includes/model1.h b/src/mame/includes/model1.h
index 0e93c6b0705..62cb80d9c6e 100644
--- a/src/mame/includes/model1.h
+++ b/src/mame/includes/model1.h
@@ -137,25 +137,25 @@ public:
class view_t
{
- public:
- view_t() { }
+ public:
+ view_t() { }
- void init_translation_matrix();
+ void init_translation_matrix();
- void set_viewport(float xcenter, float ycenter, float xl, float xr, float yb, float yt);
- void set_lightparam(int index, float diffuse, float ambient, float specular, int power);
- void set_zoom(float x, float y);
- void set_light_direction(float x, float y, float z);
- void set_translation_matrix(float* mat);
- void set_view_translation(float x, float y);
+ void set_viewport(float xcenter, float ycenter, float xl, float xr, float yb, float yt);
+ void set_lightparam(int index, float diffuse, float ambient, float specular, int power);
+ void set_zoom(float x, float y);
+ void set_light_direction(float x, float y, float z);
+ void set_translation_matrix(float* mat);
+ void set_view_translation(float x, float y);
- void project_point(point_t *p) const;
- void project_point_direct(point_t *p) const;
+ void project_point(point_t *p) const;
+ void project_point_direct(point_t *p) const;
- void transform_vector(glm::vec3& p) const;
- void transform_point(point_t *p) const;
+ void transform_vector(glm::vec3& p) const;
+ void transform_point(point_t *p) const;
- void recompute_frustum();
+ void recompute_frustum();
int xc, yc, x1, y1, x2, y2;
float zoomx, zoomy, viewx, viewy;
@@ -176,10 +176,10 @@ private:
bool m_swa;
// Devices
- required_device<v60_device> m_maincpu; // V60
- required_device<segam1audio_device> m_m1audio; // Model 1 standard sound board
- optional_device<m1comm_device> m_m1comm; // Model 1 communication board
- optional_device<dsbz80_device> m_dsbz80; // Digital Sound Board
+ required_device<v60_device> m_maincpu; // V60
+ required_device<segam1audio_device> m_m1audio; // Model 1 standard sound board
+ optional_device<m1comm_device> m_m1comm; // Model 1 communication board
+ optional_device<dsbz80_device> m_dsbz80; // Digital Sound Board
optional_device<mb86233_cpu_device> m_tgp;
required_device<screen_device> m_screen;
@@ -195,32 +195,32 @@ private:
int m_snd_cmd_state;
// TGP FIFO
- UINT32 fifoout_pop();
- void fifoout_push(UINT32 data);
- void fifoout_push_f(float data);
- UINT32 fifoin_pop();
- void fifoin_push(UINT32 data);
- float fifoin_pop_f();
- UINT16 ram_get_i();
- float ram_get_f();
- void copro_fifoin_push(UINT32 data);
- UINT32 copro_fifoout_pop();
- void next_fn();
-
- UINT32 m_copro_r;
- UINT32 m_copro_w;
- int m_copro_fifoout_rpos;
- int m_copro_fifoout_wpos;
- UINT32 m_copro_fifoout_data[FIFO_SIZE];
- int m_copro_fifoout_num;
- int m_copro_fifoin_rpos;
- int m_copro_fifoin_wpos;
- UINT32 m_copro_fifoin_data[FIFO_SIZE];
- int m_copro_fifoin_num;
+ UINT32 fifoout_pop();
+ void fifoout_push(UINT32 data);
+ void fifoout_push_f(float data);
+ UINT32 fifoin_pop();
+ void fifoin_push(UINT32 data);
+ float fifoin_pop_f();
+ UINT16 ram_get_i();
+ float ram_get_f();
+ void copro_fifoin_push(UINT32 data);
+ UINT32 copro_fifoout_pop();
+ void next_fn();
+
+ UINT32 m_copro_r;
+ UINT32 m_copro_w;
+ int m_copro_fifoout_rpos;
+ int m_copro_fifoout_wpos;
+ UINT32 m_copro_fifoout_data[FIFO_SIZE];
+ int m_copro_fifoout_num;
+ int m_copro_fifoin_rpos;
+ int m_copro_fifoin_wpos;
+ UINT32 m_copro_fifoin_data[FIFO_SIZE];
+ int m_copro_fifoin_num;
// TGP
- void vr_tgp_reset();
- void tgp_reset(bool swa);
+ void vr_tgp_reset();
+ void tgp_reset(bool swa);
DECLARE_TGP_FUNCTION( fadd );
DECLARE_TGP_FUNCTION( fsub );
@@ -339,19 +339,19 @@ private:
std::function<void(view_t*, point_t*, point_t*, point_t*)> m_clip;
};
- view_t *m_view;
- point_t *m_pointdb;
- point_t *m_pointpt;
- quad_t *m_quaddb;
- quad_t *m_quadpt;
- quad_t **m_quadind;
- offs_t m_pushpc;
- int m_fifoin_rpos;
- int m_fifoin_wpos;
- UINT32 m_fifoin_data[FIFO_SIZE];
- int m_fifoin_cbcount;
+ view_t *m_view;
+ point_t *m_pointdb;
+ point_t *m_pointpt;
+ quad_t *m_quaddb;
+ quad_t *m_quadpt;
+ quad_t **m_quadind;
+ offs_t m_pushpc;
+ int m_fifoin_rpos;
+ int m_fifoin_wpos;
+ UINT32 m_fifoin_data[FIFO_SIZE];
+ int m_fifoin_cbcount;
typedef void (model1_state::*tgp_func)();
- tgp_func m_fifoin_cb;
+ tgp_func m_fifoin_cb;
struct function
{
@@ -361,95 +361,95 @@ private:
static const struct function ftab_vf[];
static const struct function ftab_swa[];
- INT32 m_fifoout_rpos;
- INT32 m_fifoout_wpos;
- UINT32 m_fifoout_data[FIFO_SIZE];
- UINT32 m_list_length;
- float m_cmat[12];
- float m_mat_stack[MAT_STACK_SIZE][12];
- float m_mat_vector[21][12];
- INT32 m_mat_stack_pos;
- float m_acc;
- float m_tgp_vf_xmin;
- float m_tgp_vf_xmax;
- float m_tgp_vf_zmin;
- float m_tgp_vf_zmax;
- float m_tgp_vf_ygnd;
- float m_tgp_vf_yflr;
- float m_tgp_vf_yjmp;
- float m_tgp_vr_circx;
- float m_tgp_vr_circy;
- float m_tgp_vr_circrad;
- float m_tgp_vr_cbox[12];
- int m_tgp_vr_select;
-
- float m_tgp_int_px;
- float m_tgp_int_py;
- float m_tgp_int_pz;
- UINT32 m_tgp_int_adr;
- UINT16 m_ram_adr;
- UINT16 m_ram_latch[2];
- UINT16 m_ram_scanadr;
+ INT32 m_fifoout_rpos;
+ INT32 m_fifoout_wpos;
+ UINT32 m_fifoout_data[FIFO_SIZE];
+ UINT32 m_list_length;
+ float m_cmat[12];
+ float m_mat_stack[MAT_STACK_SIZE][12];
+ float m_mat_vector[21][12];
+ INT32 m_mat_stack_pos;
+ float m_acc;
+ float m_tgp_vf_xmin;
+ float m_tgp_vf_xmax;
+ float m_tgp_vf_zmin;
+ float m_tgp_vf_zmax;
+ float m_tgp_vf_ygnd;
+ float m_tgp_vf_yflr;
+ float m_tgp_vf_yjmp;
+ float m_tgp_vr_circx;
+ float m_tgp_vr_circy;
+ float m_tgp_vr_circrad;
+ float m_tgp_vr_cbox[12];
+ int m_tgp_vr_select;
+
+ float m_tgp_int_px;
+ float m_tgp_int_py;
+ float m_tgp_int_pz;
+ UINT32 m_tgp_int_adr;
+ UINT16 m_ram_adr;
+ UINT16 m_ram_latch[2];
+ UINT16 m_ram_scanadr;
std::unique_ptr<UINT32[]> m_ram_data;
- float m_tgp_vr_base[4];
- int m_puuu;
- int m_ccount;
- UINT32 m_vr_r;
- UINT32 m_vr_w;
- UINT16 m_listctl[2];
- UINT16 *m_glist;
- bool m_render_done;
+ float m_tgp_vr_base[4];
+ int m_puuu;
+ int m_ccount;
+ UINT32 m_vr_r;
+ UINT32 m_vr_w;
+ UINT16 m_listctl[2];
+ UINT16 *m_glist;
+ bool m_render_done;
std::unique_ptr<UINT16[]> m_tgp_ram;
UINT32 *m_poly_rom;
std::unique_ptr<UINT32[]> m_poly_ram;
// Rendering helper functions
- UINT32 readi(const UINT16 *adr) const;
- INT16 readi16(const UINT16 *adr) const;
- float readf(const UINT16 *adr) const;
- void cross_product(point_t* o, const point_t* p, const point_t* q) const;
- float view_determinant(const point_t *p1, const point_t *p2, const point_t *p3) const;
-
- static bool fclip_isc_bottom(view_t*, point_t*);
- static bool fclip_isc_top(view_t*, point_t*);
- static bool fclip_isc_left(view_t*, point_t*);
- static bool fclip_isc_right(view_t*, point_t*);
- static void fclip_clip_bottom(view_t*, point_t*, point_t*, point_t*);
- static void fclip_clip_top(view_t*, point_t*, point_t*, point_t*);
- static void fclip_clip_left(view_t*, point_t*, point_t*, point_t*);
- static void fclip_clip_right(view_t*, point_t*, point_t*, point_t*);
+ UINT32 readi(const UINT16 *adr) const;
+ INT16 readi16(const UINT16 *adr) const;
+ float readf(const UINT16 *adr) const;
+ void cross_product(point_t* o, const point_t* p, const point_t* q) const;
+ float view_determinant(const point_t *p1, const point_t *p2, const point_t *p3) const;
+
+ static bool fclip_isc_bottom(view_t*, point_t*);
+ static bool fclip_isc_top(view_t*, point_t*);
+ static bool fclip_isc_left(view_t*, point_t*);
+ static bool fclip_isc_right(view_t*, point_t*);
+ static void fclip_clip_bottom(view_t*, point_t*, point_t*, point_t*);
+ static void fclip_clip_top(view_t*, point_t*, point_t*, point_t*);
+ static void fclip_clip_left(view_t*, point_t*, point_t*, point_t*);
+ static void fclip_clip_right(view_t*, point_t*, point_t*, point_t*);
// Rendering
- void tgp_render(bitmap_rgb32 &bitmap, const rectangle &cliprect);
- void tgp_scan();
-
- void sort_quads() const;
- void unsort_quads() const;
- void draw_quads(bitmap_rgb32 &bitmap, const rectangle &cliprect);
- static void recompute_frustum(view_t *view);
- static void draw_hline(bitmap_rgb32 &bitmap, int x1, int x2, int y, int color);
- static void draw_hline_moired(bitmap_rgb32 &bitmap, int x1, int x2, int y, int color);
- static void fill_slope(bitmap_rgb32 &bitmap, view_t *view, int color, INT32 x1, INT32 x2, INT32 sl1, INT32 sl2, INT32 y1, INT32 y2, INT32 *nx1, INT32 *nx2);
- static void fill_line(bitmap_rgb32 &bitmap, view_t *view, int color, INT32 y, INT32 x1, INT32 x2);
- void fill_quad(bitmap_rgb32 &bitmap, view_t *view, const quad_t& q) const;
-
- void fclip_push_quad_next(int level, quad_t& q, point_t *p1, point_t *p2, point_t *p3, point_t *p4);
- void fclip_push_quad(int level, quad_t& q);
-
- static float min4f(float a, float b, float c, float d);
- static float max4f(float a, float b, float c, float d);
- static float compute_specular(glm::vec3& normal, glm::vec3& light, float diffuse,int lmode);
-
- void push_object(UINT32 tex_adr, UINT32 poly_adr, UINT32 size);
- UINT16* push_direct(UINT16 *list);
- UINT16* skip_direct(UINT16 *list) const;
- void draw_objects(bitmap_rgb32 &bitmap, const rectangle &cliprect);
- UINT16* draw_direct(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT16 *list);
-
- UINT16* get_list();
- int get_list_number();
- void end_frame();
+ void tgp_render(bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ void tgp_scan();
+
+ void sort_quads() const;
+ void unsort_quads() const;
+ void draw_quads(bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ static void recompute_frustum(view_t *view);
+ static void draw_hline(bitmap_rgb32 &bitmap, int x1, int x2, int y, int color);
+ static void draw_hline_moired(bitmap_rgb32 &bitmap, int x1, int x2, int y, int color);
+ static void fill_slope(bitmap_rgb32 &bitmap, view_t *view, int color, INT32 x1, INT32 x2, INT32 sl1, INT32 sl2, INT32 y1, INT32 y2, INT32 *nx1, INT32 *nx2);
+ static void fill_line(bitmap_rgb32 &bitmap, view_t *view, int color, INT32 y, INT32 x1, INT32 x2);
+ void fill_quad(bitmap_rgb32 &bitmap, view_t *view, const quad_t& q) const;
+
+ void fclip_push_quad_next(int level, quad_t& q, point_t *p1, point_t *p2, point_t *p3, point_t *p4);
+ void fclip_push_quad(int level, quad_t& q);
+
+ static float min4f(float a, float b, float c, float d);
+ static float max4f(float a, float b, float c, float d);
+ static float compute_specular(glm::vec3& normal, glm::vec3& light, float diffuse,int lmode);
+
+ void push_object(UINT32 tex_adr, UINT32 poly_adr, UINT32 size);
+ UINT16* push_direct(UINT16 *list);
+ UINT16* skip_direct(UINT16 *list) const;
+ void draw_objects(bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ UINT16* draw_direct(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT16 *list);
+
+ UINT16* get_list();
+ int get_list_number();
+ void end_frame();
clipper_t m_clipfn[4];
@@ -458,7 +458,7 @@ private:
required_device<segas24_tile> m_tiles;
// I/O related
- UINT16 m_lamp_state;
+ UINT16 m_lamp_state;
optional_ioport_array<8> m_analog_ports;
required_ioport_array<3> m_digital_ports;
};
diff --git a/src/mame/includes/mw8080bw.h b/src/mame/includes/mw8080bw.h
index f5347046568..833b5bf1d32 100644
--- a/src/mame/includes/mw8080bw.h
+++ b/src/mame/includes/mw8080bw.h
@@ -86,7 +86,7 @@ public:
UINT8 m_spcenctr_trench_center;
UINT8 m_spcenctr_trench_slope[16]; /* 16x4 bit RAM */
UINT8 m_spcenctr_bright_control;
- UINT8 m_spcenctr_brightness;
+ UINT8 m_spcenctr_brightness;
/* timer */
emu_timer *m_interrupt_timer;
diff --git a/src/mame/includes/neogeo.h b/src/mame/includes/neogeo.h
index 51a88aeadc2..e5f0ffaa303 100644
--- a/src/mame/includes/neogeo.h
+++ b/src/mame/includes/neogeo.h
@@ -99,12 +99,12 @@ public:
DECLARE_WRITE16_MEMBER(write_bankprot_kf2k3bl);
DECLARE_WRITE16_MEMBER(write_bankprot_kof10th);
DECLARE_READ16_MEMBER(read_lorom_kof10th);
-
+
DECLARE_DRIVER_INIT(neogeo);
protected:
void common_machine_start();
-
+
void set_outputs();
// device overrides
@@ -121,7 +121,7 @@ protected:
optional_device<ym2610_device> m_ym;
required_device<neosprite_optimized_device> m_sprgen;
optional_shared_ptr<UINT16> m_save_ram;
-
+
required_device<screen_device> m_screen;
optional_device<palette_device> m_palette;
optional_device<ng_memcard_device> m_memcard;
@@ -169,14 +169,14 @@ protected:
void init_sprites();
// temporary helper to restore memory banking while bankswitch is handled in the driver...
UINT32 m_bank_base;
-
+
optional_device<neogeo_cart_slot_device> m_slot1;
optional_device<neogeo_cart_slot_device> m_slot2;
optional_device<neogeo_cart_slot_device> m_slot3;
optional_device<neogeo_cart_slot_device> m_slot4;
optional_device<neogeo_cart_slot_device> m_slot5;
optional_device<neogeo_cart_slot_device> m_slot6;
-
+
int m_curr_slot;
neogeo_cart_slot_device* m_slots[6];
@@ -185,28 +185,28 @@ private:
void create_interrupt_timers();
void start_interrupt_timers();
void acknowledge_interrupt(UINT16 data);
-
+
void adjust_display_position_interrupt_timer();
void set_display_position_interrupt_control(UINT16 data);
void set_display_counter_msb(UINT16 data);
void set_display_counter_lsb(UINT16 data);
void set_video_control(UINT16 data);
-
+
void create_rgb_lookups();
void set_pens();
void set_screen_shadow(int data);
void set_palette_bank(int data);
-
+
void audio_cpu_check_nmi();
void set_save_ram_unlock(UINT8 data);
void set_output_latch(UINT8 data);
void set_output_data(UINT8 data);
-
+
// internal state
bool m_recurse;
bool m_audio_cpu_nmi_enabled;
bool m_audio_cpu_nmi_pending;
-
+
// MVS-specific state
UINT8 m_save_ram_unlocked;
UINT8 m_output_data;
@@ -214,7 +214,7 @@ private:
UINT8 m_el_value;
UINT8 m_led1_value;
UINT8 m_led2_value;
-
+
emu_timer *m_display_position_interrupt_timer;
emu_timer *m_display_position_vblank_timer;
emu_timer *m_vblank_interrupt_timer;
@@ -223,9 +223,9 @@ private:
UINT8 m_display_position_interrupt_pending;
UINT8 m_irq3_pending;
UINT8 m_display_position_interrupt_control;
-
+
UINT16 get_video_control();
-
+
// color/palette related
std::vector<UINT16> m_paletteram;
UINT8 m_palette_lookup[32][4];
@@ -241,11 +241,11 @@ class aes_state : public neogeo_state
: neogeo_state(mconfig, type, tag)
, m_io_in2(*this, "IN2")
{}
-
+
DECLARE_READ16_MEMBER(aes_in2_r);
DECLARE_INPUT_CHANGED_MEMBER(aes_jp1);
DECLARE_MACHINE_START(aes);
-
+
protected:
required_ioport m_io_in2;
};
@@ -264,7 +264,7 @@ class neopcb_state : public neogeo_state
, m_pcm2_prot(*this, "pcm2")
, m_pvc_prot(*this, "pvc")
{}
-
+
// device overrides
virtual void machine_start() override;
@@ -286,7 +286,7 @@ class neopcb_state : public neogeo_state
void kf2k3pcb_gfx_decrypt();
void kf2k3pcb_decrypt_s1data();
void kf2k3pcb_sp1_decrypt();
-
+
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
required_device<pvc_prot_device> m_pvc_prot;
@@ -299,4 +299,3 @@ MACHINE_CONFIG_EXTERN( neogeo_base );
MACHINE_CONFIG_EXTERN( neogeo_arcade );
INPUT_PORTS_EXTERN(neogeo);
INPUT_PORTS_EXTERN(aes);
-
diff --git a/src/mame/includes/redclash.h b/src/mame/includes/redclash.h
index 7ebbc12e5e2..b0875b10260 100644
--- a/src/mame/includes/redclash.h
+++ b/src/mame/includes/redclash.h
@@ -29,7 +29,7 @@ public:
DECLARE_WRITE8_MEMBER(sraider_misc_w);
DECLARE_WRITE8_MEMBER(sraider_io_w);
DECLARE_INPUT_CHANGED_MEMBER(left_coin_inserted);
- DECLARE_INPUT_CHANGED_MEMBER(right_coin_inserted);
+ DECLARE_INPUT_CHANGED_MEMBER(right_coin_inserted);
DECLARE_DRIVER_INIT(redclash);
DECLARE_MACHINE_START(sraider);
DECLARE_MACHINE_RESET(sraider);
diff --git a/src/mame/includes/snes.h b/src/mame/includes/snes.h
index bacdabc0d1f..c25379a4537 100644
--- a/src/mame/includes/snes.h
+++ b/src/mame/includes/snes.h
@@ -322,7 +322,7 @@ public:
UINT32 m_wram_address;
UINT16 m_htime;
UINT16 m_vtime;
- bool m_is_pal;
+ bool m_is_pal;
/* non-SNES HW-specific flags / variables */
UINT8 m_is_nss;
diff --git a/src/mame/layout/fidel_csc.lay b/src/mame/layout/fidel_csc.lay
index f65cc5dcc47..9ae92f59ed1 100644
--- a/src/mame/layout/fidel_csc.lay
+++ b/src/mame/layout/fidel_csc.lay
@@ -25,16 +25,16 @@
end
function layout.reset()
- board =
+ board =
{{ 3, 5, 4, 2, 1, 4, 5, 3},
- { 6, 6, 6, 6, 6, 6, 6, 6},
- { 0, 0, 0, 0, 0, 0, 0, 0},
- { 0, 0, 0, 0, 0, 0, 0, 0},
- { 0, 0, 0, 0, 0, 0, 0, 0},
- { 0, 0, 0, 0, 0, 0, 0, 0},
- {12,12,12,12,12,12,12,12},
- { 9,11,10, 8, 7,10,11, 9}}
-
+ { 6, 6, 6, 6, 6, 6, 6, 6},
+ { 0, 0, 0, 0, 0, 0, 0, 0},
+ { 0, 0, 0, 0, 0, 0, 0, 0},
+ { 0, 0, 0, 0, 0, 0, 0, 0},
+ { 0, 0, 0, 0, 0, 0, 0, 0},
+ {12,12,12,12,12,12,12,12},
+ { 9,11,10, 8, 7,10,11, 9}}
+
for y, row in ipairs(board) do
for x, cell in ipairs(row) do
machine:outputs():set_indexed_value("pos", (y * 10) + x, board[y][x])
@@ -49,7 +49,7 @@
layout.reset()
return
end
-
+
for x, tag in ipairs(port_tags) do
local port = ports[tag]
if port then
@@ -260,7 +260,7 @@
<text string="&#x265d;" state="4"><color red="0.27" green="0.25" blue="0.25" /></text>
<text string="&#x265e;" state="5"><color red="0.27" green="0.25" blue="0.25" /></text>
<text string="&#x265f;" state="6"><color red="0.27" green="0.25" blue="0.25" /></text>
-
+
<text string="&#x265a;" state="7"><color red="0.71" green="0.7" blue="0.69" /></text>
<text string="&#x265b;" state="8"><color red="0.71" green="0.7" blue="0.69" /></text>
<text string="&#x265c;" state="9"><color red="0.71" green="0.7" blue="0.69" /></text>
diff --git a/src/mame/layout/mdndclab.lay b/src/mame/layout/mdndclab.lay
index a102145bd6d..4f806c57060 100644
--- a/src/mame/layout/mdndclab.lay
+++ b/src/mame/layout/mdndclab.lay
@@ -49,7 +49,7 @@
for num, col in pairs(walls) do
if col[1] &lt; x and (col[1] + 2.5) &gt; x then
for num2, wall in pairs(col[2]) do
- if wall &lt; y and (wall + 7.5) &gt; y then
+ if wall &lt; y and (wall + 7.5) &gt; y then
local state = machine:outputs():get_indexed_value("colwall", (num * 10) + num2)
machine:outputs():set_indexed_value("colwall", (num * 10) + num2, (~state) &amp; 1)
return
@@ -60,7 +60,7 @@
for num, row in pairs(walls) do
if row[1] &lt; y and (row[1] + 2.5) &gt; y then
for num2, wall in pairs(row[2]) do
- if wall &lt; x and (wall + 7.5) &gt; x then
+ if wall &lt; x and (wall + 7.5) &gt; x then
local state = machine:outputs():get_indexed_value("rowwall", (num * 10) + num2)
machine:outputs():set_indexed_value("rowwall", (num * 10) + num2, (~state) &amp; 1)
return
@@ -392,7 +392,7 @@
<bezel name="rowwall76" element="wall"><bounds x="50" y="67.5" width="7.5" height="2.5" /></bezel>
<bezel name="rowwall77" element="wall"><bounds x="60" y="67.5" width="7.5" height="2.5" /></bezel>
<bezel name="rowwall78" element="wall"><bounds x="70" y="67.5" width="7.5" height="2.5" /></bezel>
-
+
<!-- left side -->
<bezel element="static_red"><bounds x="-12.5" y="0" width="7.5" height="7.5" /></bezel>
diff --git a/src/mame/machine/awboard.cpp b/src/mame/machine/awboard.cpp
index 703d3ebfc88..b9d5a28ced6 100644
--- a/src/mame/machine/awboard.cpp
+++ b/src/mame/machine/awboard.cpp
@@ -301,7 +301,7 @@ READ16_MEMBER(aw_rom_board::pio_r)
UINT32 roffset = epr_offset & 0x3ffffff;
if (roffset >= (mpr_offset / 2))
roffset += mpr_bank * 0x4000000;
- UINT16 retval = (m_region->bytes() > (roffset * 2)) ? m_region->u16(roffset) : 0; // not endian-safe?
+ UINT16 retval = (m_region->bytes() > (roffset * 2)) ? m_region->u16(roffset) : 0; // not endian-safe?
return retval;
}
diff --git a/src/mame/machine/deco146.cpp b/src/mame/machine/deco146.cpp
index 9e477f3aae9..0f0cd068100 100644
--- a/src/mame/machine/deco146.cpp
+++ b/src/mame/machine/deco146.cpp
@@ -1179,12 +1179,12 @@ void deco_146_base_device::write_data(address_space &space, UINT16 address, UINT
if (i==0) // the first cs is our internal protection area
{
-// logerror("write matches cs table (protection) %01x %04x %04x %04x\n", i, real_address, data, mem_mask);
+// logerror("write matches cs table (protection) %01x %04x %04x %04x\n", i, real_address, data, mem_mask);
write_protport(space, real_address, data, mem_mask);
}
else
{
-// logerror("write matches cs table (external connection) %01x %04x %04x %04x\n", i, real_address, data, mem_mask);
+// logerror("write matches cs table (external connection) %01x %04x %04x %04x\n", i, real_address, data, mem_mask);
}
}
}
@@ -1249,7 +1249,7 @@ void deco_146_base_device::write_protport(address_space &space, UINT16 address,
}
else if ((address&0xff) == m_mask_port)
{
-// logerror("LOAD NAND REGISTER %04x %04x\n", data, mem_mask);
+// logerror("LOAD NAND REGISTER %04x %04x\n", data, mem_mask);
COMBINE_DATA(&m_nand);
}
else if ((address&0xff) == m_soundlatch_port)
diff --git a/src/mame/machine/decocrpt.h b/src/mame/machine/decocrpt.h
index c9c56571711..f818c579154 100644
--- a/src/mame/machine/decocrpt.h
+++ b/src/mame/machine/decocrpt.h
@@ -4,4 +4,3 @@
void deco56_decrypt_gfx(running_machine &machine, const char *tag);
void deco74_decrypt_gfx(running_machine &machine, const char *tag);
void deco56_remap_gfx(running_machine &machine, const char *tag);
-
diff --git a/src/mame/machine/gamecom.cpp b/src/mame/machine/gamecom.cpp
index c05e14dcfc7..60242cb7f85 100644
--- a/src/mame/machine/gamecom.cpp
+++ b/src/mame/machine/gamecom.cpp
@@ -603,7 +603,7 @@ WRITE8_MEMBER( gamecom_state::gamecom_update_timers )
if ( m_p_ram[SM8521_TM0D] >= m_timer[0].check_value )
{
m_p_ram[SM8521_TM0D] = 0;
-// m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE ); // this causes crazy flickering
+// m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE ); // this causes crazy flickering
}
}
}
diff --git a/src/mame/machine/macadb.h b/src/mame/machine/macadb.h
index 2067f492cf9..6a8d16a718e 100644
--- a/src/mame/machine/macadb.h
+++ b/src/mame/machine/macadb.h
@@ -1,3 +1,2 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont
-
diff --git a/src/mame/machine/pgmprot_igs025_igs028.h b/src/mame/machine/pgmprot_igs025_igs028.h
index 1d6ef718c22..ec3739399ca 100644
--- a/src/mame/machine/pgmprot_igs025_igs028.h
+++ b/src/mame/machine/pgmprot_igs025_igs028.h
@@ -12,7 +12,7 @@ public:
{
}
-
+
required_shared_ptr<UINT16> m_sharedprotram;
required_device<igs025_device> m_igs025;
required_device<igs028_device> m_igs028;
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 760b0b52a8f..59255ffa87b 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -9592,7 +9592,7 @@ commandou // 5/1985 (c) 1985 + Data East license (US)
commandou2 // 5/1985 (c) 1985 + Data East license (US)
sinvasn // Europe original?
sinvasnb // bootleg
-mercenario // bootleg
+mercenario // bootleg
@source:compgolf.cpp
compgolf // (c) 1985 Data East Corporation (Japan)
diff --git a/src/mame/video/chihiro.cpp b/src/mame/video/chihiro.cpp
index bd6bdd835b9..b4011053030 100644
--- a/src/mame/video/chihiro.cpp
+++ b/src/mame/video/chihiro.cpp
@@ -2379,10 +2379,10 @@ void nv2a_renderer::convert_vertices_poly(vertex_nv *source, nv2avertex_t *desti
v[i] += matrix.projection[i][j] * t[j];
};
/*for (int i = 0; i < 3; i++) {
- v[i] *= matrix.scale[i];
+ v[i] *= matrix.scale[i];
}
for (int i = 0; i < 3; i++) {
- v[i] += matrix.translate[i];
+ v[i] += matrix.translate[i];
}*/
destination[m].w = v[3];
destination[m].x = (v[0] / v[3])*supersample_factor_x; // source[m].attribute[0].fv[0];
@@ -2864,7 +2864,7 @@ int nv2a_renderer::geforce_exec_method(address_space & space, UINT32 chanel, UIN
// each dword after 1808 contains a 32 bit index value to select the vartices
while (1) {
int c;
-
+
if ((countlen * mult + indexesleft_count) < 4)
break;
if (mult == 1)
@@ -3373,13 +3373,13 @@ int nv2a_renderer::geforce_exec_method(address_space & space, UINT32 chanel, UIN
}
}
/*if (maddress == 0x1b08) {
- (data >> 0) & 15;
- (data >> 4) & 15;
- (data >> 8) & 15;
- (data >> 12) & 15;
- (data >> 16) & 15;
- (data >> 20) & 15;
- (data >> 24) & 255;
+ (data >> 0) & 15;
+ (data >> 4) & 15;
+ (data >> 8) & 15;
+ (data >> 12) & 15;
+ (data >> 16) & 15;
+ (data >> 20) & 15;
+ (data >> 24) & 255;
}*/
if (maddress == 0x1b0c) {
texture[unit].colorkey = (data >> 0) & 3;
diff --git a/src/mame/video/crgolf.cpp b/src/mame/video/crgolf.cpp
index bc25f42b074..3ba4a5c549e 100644
--- a/src/mame/video/crgolf.cpp
+++ b/src/mame/video/crgolf.cpp
@@ -57,7 +57,6 @@ PALETTE_INIT_MEMBER(crgolf_state, crgolf)
PALETTE_INIT_MEMBER(crgolf_state, mastrglf)
{
-
}
/*************************************
@@ -135,4 +134,3 @@ UINT32 crgolf_state::screen_update_crgolf(screen_device &screen, bitmap_ind16 &b
return 0;
}
-
diff --git a/src/mame/video/holeland.cpp b/src/mame/video/holeland.cpp
index a98fd610506..e0df030eedf 100644
--- a/src/mame/video/holeland.cpp
+++ b/src/mame/video/holeland.cpp
@@ -61,7 +61,7 @@ VIDEO_START_MEMBER(holeland_state,holeland)
m_bg_tilemap->set_transmask(0, 0xff, 0x00); /* split type 0 is totally transparent in front half */
m_bg_tilemap->set_transmask(1, 0x01, 0xfe); /* split type 1 has pen 0? transparent in front half */
-
+
save_item(NAME(m_po));
save_item(NAME(m_palette_offset));
}
diff --git a/src/mame/video/ladybug.cpp b/src/mame/video/ladybug.cpp
index 773344349c5..7d4136b77a4 100644
--- a/src/mame/video/ladybug.cpp
+++ b/src/mame/video/ladybug.cpp
@@ -218,4 +218,3 @@ UINT32 ladybug_state::screen_update_ladybug(screen_device &screen, bitmap_ind16
draw_sprites(bitmap, cliprect);
return 0;
}
-
diff --git a/src/mame/video/model1.cpp b/src/mame/video/model1.cpp
index 2c90eaceb25..2a4a192d039 100644
--- a/src/mame/video/model1.cpp
+++ b/src/mame/video/model1.cpp
@@ -36,7 +36,7 @@ void model1_state::view_t::transform_point(point_t *p) const
{
point_t q = *p;
float xx = translation[0] * q.x + translation[3] * q.y + translation[6] * q.z + translation[ 9] + vxx;
- p->y = translation[1] * q.x + translation[4] * q.y + translation[7] * q.z + translation[10] + vyy;
+ p->y = translation[1] * q.x + translation[4] * q.y + translation[7] * q.z + translation[10] + vyy;
float zz = translation[2] * q.x + translation[5] * q.y + translation[8] * q.z + translation[11] + vzz;
p->x = ayyc * xx - ayys * zz;
p->z = ayys * xx + ayyc * zz;
@@ -592,7 +592,7 @@ void model1_state::fclip_clip_right(view_t *view, point_t *pt, point_t *p1, poin
void model1_state::fclip_push_quad_next(int level, quad_t& q, point_t *p1, point_t *p2, point_t *p3, point_t *p4)
{
- quad_t cquad(q.col, q.z, p1, p2, p3, p4);
+ quad_t cquad(q.col, q.z, p1, p2, p3, p4);
fclip_push_quad(level+1, cquad);
}
@@ -757,445 +757,445 @@ float model1_state::compute_specular(glm::vec3& normal, glm::vec3& light, float
void model1_state::push_object(UINT32 tex_adr, UINT32 poly_adr, UINT32 size) {
#if 0
- int dump;
+ int dump;
#endif
- float *poly_data;
- if (poly_adr & 0x800000)
- poly_data = (float *)m_poly_ram.get();
- else
- poly_data = (float *)m_poly_rom;
+ float *poly_data;
+ if (poly_adr & 0x800000)
+ poly_data = (float *)m_poly_ram.get();
+ else
+ poly_data = (float *)m_poly_rom;
- poly_adr &= 0x7fffff;
+ poly_adr &= 0x7fffff;
#if 0
- dump = poly_adr == 0x944ea;
- dump = 0;
+ dump = poly_adr == 0x944ea;
+ dump = 0;
#endif
#if 0
- if (poly_adr < 0x10000 || poly_adr >= 0x80000)
- return;
+ if (poly_adr < 0x10000 || poly_adr >= 0x80000)
+ return;
- if (poly_adr < 0x40000 || poly_adr >= 0x50000)
- return;
+ if (poly_adr < 0x40000 || poly_adr >= 0x50000)
+ return;
- if (poly_adr == 0x4c7db || poly_adr == 0x4cdaa || poly_adr == 0x4d3e7)
- return;
+ if (poly_adr == 0x4c7db || poly_adr == 0x4cdaa || poly_adr == 0x4d3e7)
+ return;
- if (poly_adr != 0x483e5)
- return;
+ if (poly_adr != 0x483e5)
+ return;
#endif
- if (true) {
- LOG_TGP(("XVIDEO: draw object (%x, %x, %x)\n", tex_adr, poly_adr, size));
- }
-
- if (!size)
- size = 0xffffffff;
-
- point_t *old_p0 = m_pointpt++;
- point_t *old_p1 = m_pointpt++;
-
- old_p0->x = poly_data[poly_adr + 0];
- old_p0->y = poly_data[poly_adr + 1];
- old_p0->z = poly_data[poly_adr + 2];
- old_p1->x = poly_data[poly_adr + 3];
- old_p1->y = poly_data[poly_adr + 4];
- old_p1->z = poly_data[poly_adr + 5];
- m_view->transform_point(old_p0);
- m_view->transform_point(old_p1);
-
- if (old_p0->z > 0)
- {
- m_view->project_point(old_p0);
- }
- else
- {
- old_p0->s.x = old_p0->s.y = 0;
- }
-
- if (old_p1->z > 0)
- {
- m_view->project_point(old_p1);
- }
- else
- {
- old_p1->s.x = old_p1->s.y = 0;
- }
-
- float old_z = 0;
-
- poly_adr += 6;
-
- for (int i = 0; i < size; i++)
- {
+ if (true) {
+ LOG_TGP(("XVIDEO: draw object (%x, %x, %x)\n", tex_adr, poly_adr, size));
+ }
+
+ if (!size)
+ size = 0xffffffff;
+
+ point_t *old_p0 = m_pointpt++;
+ point_t *old_p1 = m_pointpt++;
+
+ old_p0->x = poly_data[poly_adr + 0];
+ old_p0->y = poly_data[poly_adr + 1];
+ old_p0->z = poly_data[poly_adr + 2];
+ old_p1->x = poly_data[poly_adr + 3];
+ old_p1->y = poly_data[poly_adr + 4];
+ old_p1->z = poly_data[poly_adr + 5];
+ m_view->transform_point(old_p0);
+ m_view->transform_point(old_p1);
+
+ if (old_p0->z > 0)
+ {
+ m_view->project_point(old_p0);
+ }
+ else
+ {
+ old_p0->s.x = old_p0->s.y = 0;
+ }
+
+ if (old_p1->z > 0)
+ {
+ m_view->project_point(old_p1);
+ }
+ else
+ {
+ old_p1->s.x = old_p1->s.y = 0;
+ }
+
+ float old_z = 0;
+
+ poly_adr += 6;
+
+ for (int i = 0; i < size; i++)
+ {
#if 0
- LOG_TGP(("VIDEO: %08x (%f, %f, %f) (%f, %f, %f) (%f, %f, %f)\n",
- *(UINT32 *)(poly_data + poly_adr) & ~(0x01800303),
- poly_data[poly_adr + 1], poly_data[poly_adr + 2], poly_data[poly_adr + 3],
- poly_data[poly_adr + 4], poly_data[poly_adr + 5], poly_data[poly_adr + 6],
- poly_data[poly_adr + 7], poly_data[poly_adr + 8], poly_data[poly_adr + 9]));
+ LOG_TGP(("VIDEO: %08x (%f, %f, %f) (%f, %f, %f) (%f, %f, %f)\n",
+ *(UINT32 *)(poly_data + poly_adr) & ~(0x01800303),
+ poly_data[poly_adr + 1], poly_data[poly_adr + 2], poly_data[poly_adr + 3],
+ poly_data[poly_adr + 4], poly_data[poly_adr + 5], poly_data[poly_adr + 6],
+ poly_data[poly_adr + 7], poly_data[poly_adr + 8], poly_data[poly_adr + 9]));
#endif
- UINT32 flags = *reinterpret_cast<UINT32*>(poly_data + poly_adr);
-
- int type = flags & 3;
- if (!type)
- break;
-
- if (flags & 0x00001000)
- tex_adr++;
- int lightmode = (flags >> 17) & 15;
-
- point_t *p0 = m_pointpt++;
- point_t *p1 = m_pointpt++;
-
- glm::vec3 vn(poly_data[poly_adr + 1], poly_data[poly_adr + 2], poly_data[poly_adr + 3]);
- p0->x = poly_data[poly_adr + 4];
- p0->y = poly_data[poly_adr + 5];
- p0->z = poly_data[poly_adr + 6];
- p1->x = poly_data[poly_adr + 7];
- p1->y = poly_data[poly_adr + 8];
- p1->z = poly_data[poly_adr + 9];
-
- int link = (flags >> 8) & 3;
-
- m_view->transform_vector(vn);
-
- m_view->transform_point(p0);
- m_view->transform_point(p1);
- if (p0->z > 0)
- {
- m_view->project_point(p0);
- }
- else
- {
- p0->s.x = p0->s.y = 0;
- }
-
- if (p1->z > 0)
- {
- m_view->project_point(p1);
- }
- else
- {
- p1->s.x = p1->s.y = 0;
- }
+ UINT32 flags = *reinterpret_cast<UINT32*>(poly_data + poly_adr);
+
+ int type = flags & 3;
+ if (!type)
+ break;
+
+ if (flags & 0x00001000)
+ tex_adr++;
+ int lightmode = (flags >> 17) & 15;
+
+ point_t *p0 = m_pointpt++;
+ point_t *p1 = m_pointpt++;
+
+ glm::vec3 vn(poly_data[poly_adr + 1], poly_data[poly_adr + 2], poly_data[poly_adr + 3]);
+ p0->x = poly_data[poly_adr + 4];
+ p0->y = poly_data[poly_adr + 5];
+ p0->z = poly_data[poly_adr + 6];
+ p1->x = poly_data[poly_adr + 7];
+ p1->y = poly_data[poly_adr + 8];
+ p1->z = poly_data[poly_adr + 9];
+
+ int link = (flags >> 8) & 3;
+
+ m_view->transform_vector(vn);
+
+ m_view->transform_point(p0);
+ m_view->transform_point(p1);
+ if (p0->z > 0)
+ {
+ m_view->project_point(p0);
+ }
+ else
+ {
+ p0->s.x = p0->s.y = 0;
+ }
+
+ if (p1->z > 0)
+ {
+ m_view->project_point(p1);
+ }
+ else
+ {
+ p1->s.x = p1->s.y = 0;
+ }
#if 0
- if (dump)
- LOG_TGP(("VIDEO: %08x (%f, %f, %f) (%f, %f, %f)\n",
- *(UINT32 *)(poly_data + poly_adr),
- p0->x, p0->y, p0->z,
- p1->x, p1->y, p1->z));
+ if (dump)
+ LOG_TGP(("VIDEO: %08x (%f, %f, %f) (%f, %f, %f)\n",
+ *(UINT32 *)(poly_data + poly_adr),
+ p0->x, p0->y, p0->z,
+ p1->x, p1->y, p1->z));
#endif
#if 0
- if (true || dump) {
- LOG_TGP(("VIDEO: %08x (%d, %d) (%d, %d) (%d, %d) (%d, %d)\n",
- *(UINT32 *)(poly_data + poly_adr),
- old_p0->s.x, old_p0->s.y,
- old_p1->s.x, old_p1->s.y,
- p0->s.x, p0->s.y,
- p1->s.x, p1->s.y));
- }
+ if (true || dump) {
+ LOG_TGP(("VIDEO: %08x (%d, %d) (%d, %d) (%d, %d) (%d, %d)\n",
+ *(UINT32 *)(poly_data + poly_adr),
+ old_p0->s.x, old_p0->s.y,
+ old_p1->s.x, old_p1->s.y,
+ p0->s.x, p0->s.y,
+ p1->s.x, p1->s.y));
+ }
#endif
- quad_t cquad;
-
- if (!link)
- goto next;
-
- if (!(flags & 0x00004000) && view_determinant(old_p1, old_p0, p0) > 0)
- goto next;
-
- vn = glm::normalize(vn);
-
- cquad.p[0] = old_p1;
- cquad.p[1] = old_p0;
- cquad.p[2] = p0;
- cquad.p[3] = p1;
-
- switch ((flags >> 10) & 3)
- {
- case 0:
- cquad.z = old_z;
- break;
- case 1:
- cquad.z = old_z = min4f(old_p1->z, old_p0->z, p0->z, p1->z);
- break;
- case 2:
- cquad.z = old_z = max4f(old_p1->z, old_p0->z, p0->z, p1->z);
- break;
- case 3:
- default:
- cquad.z = 0.0;
- break;
- }
-
- {
+ quad_t cquad;
+
+ if (!link)
+ goto next;
+
+ if (!(flags & 0x00004000) && view_determinant(old_p1, old_p0, p0) > 0)
+ goto next;
+
+ vn = glm::normalize(vn);
+
+ cquad.p[0] = old_p1;
+ cquad.p[1] = old_p0;
+ cquad.p[2] = p0;
+ cquad.p[3] = p1;
+
+ switch ((flags >> 10) & 3)
+ {
+ case 0:
+ cquad.z = old_z;
+ break;
+ case 1:
+ cquad.z = old_z = min4f(old_p1->z, old_p0->z, p0->z, p1->z);
+ break;
+ case 2:
+ cquad.z = old_z = max4f(old_p1->z, old_p0->z, p0->z, p1->z);
+ break;
+ case 3:
+ default:
+ cquad.z = 0.0;
+ break;
+ }
+
+ {
#if 0
- float dif = mult_vector(&vn, &view->light);
- float ln = view->lightparams[lightmode].a + view->lightparams[lightmode].d*MAX(0.0, dif);
- cquad.col = scale_color(machine().pens[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)], MIN(1.0, ln));
- cquad.col = scale_color(machine().pens[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)], MIN(1.0, ln));
+ float dif = mult_vector(&vn, &view->light);
+ float ln = view->lightparams[lightmode].a + view->lightparams[lightmode].d*MAX(0.0, dif);
+ cquad.col = scale_color(machine().pens[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)], MIN(1.0, ln));
+ cquad.col = scale_color(machine().pens[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)], MIN(1.0, ln));
#endif
- float dif = glm::dot(vn, m_view->light);
- float spec = compute_specular(vn, m_view->light, dif, lightmode);
- float ln = m_view->lightparams[lightmode].a + m_view->lightparams[lightmode].d * MAX(0.0f, dif) + spec;
- int lumval = 255.0f * MIN(1.0f, ln);
- int color = m_paletteram16[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)];
- int r = (color >> 0x0) & 0x1f;
- int g = (color >> 0x5) & 0x1f;
- int b = (color >> 0xA) & 0x1f;
-
- lumval >>= 2; //there must be a luma translation table somewhere
- if (lumval > 0x3f)
- lumval = 0x3f;
- else if (lumval < 0)
- lumval = 0;
-
- r = (m_color_xlat[(r << 8) | lumval | 0x0] >> 3) & 0x1f;
- g = (m_color_xlat[(g << 8) | lumval | 0x2000] >> 3) & 0x1f;
- b = (m_color_xlat[(b << 8) | lumval | 0x4000] >> 3) & 0x1f;
- cquad.col = (pal5bit(r) << 16) | (pal5bit(g) << 8) | (pal5bit(b) << 0);
- }
-
- if (flags & 0x00002000)
- cquad.col |= MOIRE;
-
- fclip_push_quad(0, cquad);
-
- next:
- poly_adr += 10;
- switch (link) {
- case 0:
- case 2:
- old_p0 = p0;
- old_p1 = p1;
- break;
- case 1:
- old_p1 = p0;
- break;
- case 3:
- old_p0 = p1;
- break;
- }
- }
+ float dif = glm::dot(vn, m_view->light);
+ float spec = compute_specular(vn, m_view->light, dif, lightmode);
+ float ln = m_view->lightparams[lightmode].a + m_view->lightparams[lightmode].d * MAX(0.0f, dif) + spec;
+ int lumval = 255.0f * MIN(1.0f, ln);
+ int color = m_paletteram16[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)];
+ int r = (color >> 0x0) & 0x1f;
+ int g = (color >> 0x5) & 0x1f;
+ int b = (color >> 0xA) & 0x1f;
+
+ lumval >>= 2; //there must be a luma translation table somewhere
+ if (lumval > 0x3f)
+ lumval = 0x3f;
+ else if (lumval < 0)
+ lumval = 0;
+
+ r = (m_color_xlat[(r << 8) | lumval | 0x0] >> 3) & 0x1f;
+ g = (m_color_xlat[(g << 8) | lumval | 0x2000] >> 3) & 0x1f;
+ b = (m_color_xlat[(b << 8) | lumval | 0x4000] >> 3) & 0x1f;
+ cquad.col = (pal5bit(r) << 16) | (pal5bit(g) << 8) | (pal5bit(b) << 0);
+ }
+
+ if (flags & 0x00002000)
+ cquad.col |= MOIRE;
+
+ fclip_push_quad(0, cquad);
+
+ next:
+ poly_adr += 10;
+ switch (link) {
+ case 0:
+ case 2:
+ old_p0 = p0;
+ old_p1 = p1;
+ break;
+ case 1:
+ old_p1 = p0;
+ break;
+ case 3:
+ old_p0 = p1;
+ break;
+ }
+ }
}
UINT16 *model1_state::push_direct(UINT16 *list) {
- UINT32 tex_adr = readi(list);
- // v1 = readi(list+2);
- // v2 = readi(list+10);
-
- point_t *old_p0 = m_pointpt++;
- point_t *old_p1 = m_pointpt++;
-
- old_p0->x = readf(list + 4);
- old_p0->y = readf(list + 6);
- old_p0->z = readf(list + 8);
- old_p1->x = readf(list + 12);
- old_p1->y = readf(list + 14);
- old_p1->z = readf(list + 16);
-
- LOG_TGP(("VIDEOD start direct\n"));
- LOG_TGP(("VIDEOD (%f, %f, %f) (%f, %f, %f)\n",
- old_p0->x, old_p0->y, old_p0->z,
- old_p1->x, old_p1->y, old_p1->z));
-
- //m_view-transform_point(old_p0);
- //m_view->transform_point(old_p1);
- if (old_p0->z > 0)
- {
- m_view->project_point_direct(old_p0);
- }
- else
- {
- old_p0->s.x = old_p0->s.y = 0;
- }
-
- if (old_p1->z > 0)
- {
- m_view->project_point_direct(old_p1);
- }
- else
- {
- old_p1->s.x = old_p1->s.y = 0;
- }
-
- list += 18;
-
- for (;;) {
- UINT32 flags = readi(list);
-
- int type = flags & 3;
- if (!type)
- break;
-
- if (flags & 0x00001000)
- tex_adr++;
-
- // list+2 is luminosity
- // list+4 is 0?
- // list+12 is z?
-
- point_t *p0 = m_pointpt++;
- point_t *p1 = m_pointpt++;
-
- UINT32 lum = readi(list + 2);
- // v1 = readi(list+4);
-
- float z = 0;
- if (type == 2)
- {
- p0->x = readf(list + 6);
- p0->y = readf(list + 8);
- p0->z = readf(list + 10);
- z = p0->z;
- LOG_TGP(("VIDEOD %08x %08x (%f, %f, %f)\n",
- flags, lum,
- p0->x, p0->y, p0->z));
- *p1 = *p0;
- list += 12;
- }
- else
- {
- p0->x = readf(list + 6);
- p0->y = readf(list + 8);
- p0->z = readf(list + 10);
- p1->x = readf(list + 14);
- p1->y = readf(list + 16);
- p1->z = readf(list + 18);
- z = readf(list + 12);
- LOG_TGP(("VIDEOD %08x %08x (%f, %f, %f) (%f, %f, %f)\n",
- flags, lum,
- p0->x, p0->y, p0->z,
- p1->x, p1->y, p1->z));
- list += 20;
- }
-
- int link = (flags >> 8) & 3;
-
- //m_view->transform_point(p0);
- //m_view->transform_point(p1);
- if (p0->z > 0)
- {
- m_view->project_point_direct(p0);
- }
- if (p1->z > 0)
- {
- m_view->project_point_direct(p1);
- }
+ UINT32 tex_adr = readi(list);
+ // v1 = readi(list+2);
+ // v2 = readi(list+10);
+
+ point_t *old_p0 = m_pointpt++;
+ point_t *old_p1 = m_pointpt++;
+
+ old_p0->x = readf(list + 4);
+ old_p0->y = readf(list + 6);
+ old_p0->z = readf(list + 8);
+ old_p1->x = readf(list + 12);
+ old_p1->y = readf(list + 14);
+ old_p1->z = readf(list + 16);
+
+ LOG_TGP(("VIDEOD start direct\n"));
+ LOG_TGP(("VIDEOD (%f, %f, %f) (%f, %f, %f)\n",
+ old_p0->x, old_p0->y, old_p0->z,
+ old_p1->x, old_p1->y, old_p1->z));
+
+ //m_view-transform_point(old_p0);
+ //m_view->transform_point(old_p1);
+ if (old_p0->z > 0)
+ {
+ m_view->project_point_direct(old_p0);
+ }
+ else
+ {
+ old_p0->s.x = old_p0->s.y = 0;
+ }
+
+ if (old_p1->z > 0)
+ {
+ m_view->project_point_direct(old_p1);
+ }
+ else
+ {
+ old_p1->s.x = old_p1->s.y = 0;
+ }
+
+ list += 18;
+
+ for (;;) {
+ UINT32 flags = readi(list);
+
+ int type = flags & 3;
+ if (!type)
+ break;
+
+ if (flags & 0x00001000)
+ tex_adr++;
+
+ // list+2 is luminosity
+ // list+4 is 0?
+ // list+12 is z?
+
+ point_t *p0 = m_pointpt++;
+ point_t *p1 = m_pointpt++;
+
+ UINT32 lum = readi(list + 2);
+ // v1 = readi(list+4);
+
+ float z = 0;
+ if (type == 2)
+ {
+ p0->x = readf(list + 6);
+ p0->y = readf(list + 8);
+ p0->z = readf(list + 10);
+ z = p0->z;
+ LOG_TGP(("VIDEOD %08x %08x (%f, %f, %f)\n",
+ flags, lum,
+ p0->x, p0->y, p0->z));
+ *p1 = *p0;
+ list += 12;
+ }
+ else
+ {
+ p0->x = readf(list + 6);
+ p0->y = readf(list + 8);
+ p0->z = readf(list + 10);
+ p1->x = readf(list + 14);
+ p1->y = readf(list + 16);
+ p1->z = readf(list + 18);
+ z = readf(list + 12);
+ LOG_TGP(("VIDEOD %08x %08x (%f, %f, %f) (%f, %f, %f)\n",
+ flags, lum,
+ p0->x, p0->y, p0->z,
+ p1->x, p1->y, p1->z));
+ list += 20;
+ }
+
+ int link = (flags >> 8) & 3;
+
+ //m_view->transform_point(p0);
+ //m_view->transform_point(p1);
+ if (p0->z > 0)
+ {
+ m_view->project_point_direct(p0);
+ }
+ if (p1->z > 0)
+ {
+ m_view->project_point_direct(p1);
+ }
#if 1
- if (old_p0 && old_p1)
- LOG_TGP(("VIDEOD: %08x (%d, %d) (%d, %d) (%d, %d) (%d, %d)\n",
- flags,
- old_p0->s.x, old_p0->s.y,
- old_p1->s.x, old_p1->s.y,
- p0->s.x, p0->s.y,
- p1->s.x, p1->s.y));
- else
- LOG_TGP(("VIDEOD: %08x (%d, %d) (%d, %d)\n",
- flags,
- p0->s.x, p0->s.y,
- p1->s.x, p1->s.y));
+ if (old_p0 && old_p1)
+ LOG_TGP(("VIDEOD: %08x (%d, %d) (%d, %d) (%d, %d) (%d, %d)\n",
+ flags,
+ old_p0->s.x, old_p0->s.y,
+ old_p1->s.x, old_p1->s.y,
+ p0->s.x, p0->s.y,
+ p1->s.x, p1->s.y));
+ else
+ LOG_TGP(("VIDEOD: %08x (%d, %d) (%d, %d)\n",
+ flags,
+ p0->s.x, p0->s.y,
+ p1->s.x, p1->s.y));
#endif
- quad_t cquad;
- if (!link)
- goto next;
-
- cquad.p[0] = old_p1;
- cquad.p[1] = old_p0;
- cquad.p[2] = p0;
- cquad.p[3] = p1;
- cquad.z = z;
- {
- int lumval = ((float)(lum >> 24)) * 2.0f;
- int color = m_paletteram16[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)];
- int r = (color >> 0x0) & 0x1f;
- int g = (color >> 0x5) & 0x1f;
- int b = (color >> 0xA) & 0x1f;
- lumval >>= 2; //there must be a luma translation table somewhere
- if (lumval>0x3f) lumval = 0x3f;
- else if (lumval<0) lumval = 0;
- r = (m_color_xlat[(r << 8) | lumval | 0x0] >> 3) & 0x1f;
- g = (m_color_xlat[(g << 8) | lumval | 0x2000] >> 3) & 0x1f;
- b = (m_color_xlat[(b << 8) | lumval | 0x4000] >> 3) & 0x1f;
- cquad.col = (pal5bit(r) << 16) | (pal5bit(g) << 8) | (pal5bit(b) << 0);
- }
- //cquad.col = scale_color(machine().pens[0x1000|(m_tgp_ram[tex_adr-0x40000] & 0x3ff)],((float) (lum>>24)) / 128.0);
- if (flags & 0x00002000)
- cquad.col |= MOIRE;
-
- fclip_push_quad(0, cquad);
-
- next:
- switch (link) {
- case 0:
- case 2:
- old_p0 = p0;
- old_p1 = p1;
- break;
- case 1:
- old_p1 = p0;
- break;
- case 3:
- old_p0 = p1;
- break;
- }
- }
- return list + 2;
+ quad_t cquad;
+ if (!link)
+ goto next;
+
+ cquad.p[0] = old_p1;
+ cquad.p[1] = old_p0;
+ cquad.p[2] = p0;
+ cquad.p[3] = p1;
+ cquad.z = z;
+ {
+ int lumval = ((float)(lum >> 24)) * 2.0f;
+ int color = m_paletteram16[0x1000 | (m_tgp_ram[tex_adr - 0x40000] & 0x3ff)];
+ int r = (color >> 0x0) & 0x1f;
+ int g = (color >> 0x5) & 0x1f;
+ int b = (color >> 0xA) & 0x1f;
+ lumval >>= 2; //there must be a luma translation table somewhere
+ if (lumval>0x3f) lumval = 0x3f;
+ else if (lumval<0) lumval = 0;
+ r = (m_color_xlat[(r << 8) | lumval | 0x0] >> 3) & 0x1f;
+ g = (m_color_xlat[(g << 8) | lumval | 0x2000] >> 3) & 0x1f;
+ b = (m_color_xlat[(b << 8) | lumval | 0x4000] >> 3) & 0x1f;
+ cquad.col = (pal5bit(r) << 16) | (pal5bit(g) << 8) | (pal5bit(b) << 0);
+ }
+ //cquad.col = scale_color(machine().pens[0x1000|(m_tgp_ram[tex_adr-0x40000] & 0x3ff)],((float) (lum>>24)) / 128.0);
+ if (flags & 0x00002000)
+ cquad.col |= MOIRE;
+
+ fclip_push_quad(0, cquad);
+
+ next:
+ switch (link) {
+ case 0:
+ case 2:
+ old_p0 = p0;
+ old_p1 = p1;
+ break;
+ case 1:
+ old_p1 = p0;
+ break;
+ case 3:
+ old_p0 = p1;
+ break;
+ }
+ }
+ return list + 2;
}
UINT16* model1_state::skip_direct(UINT16 *list) const
{
- list += 18;
+ list += 18;
- while (true) {
- UINT32 flags = readi(list);
+ while (true) {
+ UINT32 flags = readi(list);
- int type = flags & 3;
- if (!type)
- break;
+ int type = flags & 3;
+ if (!type)
+ break;
- if (type == 2)
- list += 12;
- else
- list += 20;
- }
- return list + 2;
+ if (type == 2)
+ list += 12;
+ else
+ list += 20;
+ }
+ return list + 2;
}
void model1_state::draw_objects(bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- if (m_quadpt != m_quaddb)
- {
- LOG_TGP(("VIDEO: sort&draw\n"));
- sort_quads();
- draw_quads(bitmap, cliprect);
- }
-
- m_quadpt = m_quaddb;
- m_pointpt = m_pointdb;
+ if (m_quadpt != m_quaddb)
+ {
+ LOG_TGP(("VIDEO: sort&draw\n"));
+ sort_quads();
+ draw_quads(bitmap, cliprect);
+ }
+
+ m_quadpt = m_quaddb;
+ m_pointpt = m_pointdb;
}
UINT16 *model1_state::draw_direct(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT16 *list)
{
- LOG_TGP(("VIDEO: draw direct %x\n", readi(list)));
+ LOG_TGP(("VIDEO: draw direct %x\n", readi(list)));
- draw_objects(bitmap, cliprect);
- UINT16 *res = push_direct(list);
- unsort_quads();
- draw_quads(bitmap, cliprect);
+ draw_objects(bitmap, cliprect);
+ UINT16 *res = push_direct(list);
+ unsort_quads();
+ draw_quads(bitmap, cliprect);
- m_quadpt = m_quaddb;
- m_pointpt = m_pointdb;
- return res;
+ m_quadpt = m_quaddb;
+ m_pointpt = m_pointdb;
+ return res;
}
UINT16 *model1_state::get_list()
@@ -1234,38 +1234,38 @@ WRITE16_MEMBER(model1_state::model1_listctl_w)
void model1_state::view_t::init_translation_matrix()
{
- memset(translation, 0, sizeof(translation));
- translation[0] = 1.0;
- translation[4] = 1.0;
- translation[8] = 1.0;
+ memset(translation, 0, sizeof(translation));
+ translation[0] = 1.0;
+ translation[4] = 1.0;
+ translation[8] = 1.0;
}
void model1_state::view_t::set_viewport(float xcenter, float ycenter, float xl, float xr, float yb, float yt)
{
- xc = xcenter;
- yc = ycenter;
- x1 = xl;
- x2 = xr;
- y1 = yb;
- y2 = yt;
-
- recompute_frustum();
+ xc = xcenter;
+ yc = ycenter;
+ x1 = xl;
+ x2 = xr;
+ y1 = yb;
+ y2 = yt;
+
+ recompute_frustum();
}
void model1_state::view_t::set_lightparam(int index, float diffuse, float ambient, float specular, int power)
{
- lightparams[index].d = diffuse;
- lightparams[index].a = ambient;
- lightparams[index].s = specular;
- lightparams[index].p = power;
+ lightparams[index].d = diffuse;
+ lightparams[index].a = ambient;
+ lightparams[index].s = specular;
+ lightparams[index].p = power;
}
void model1_state::view_t::set_zoom(float x, float y)
{
- zoomx = x;
- zoomy = y;
+ zoomx = x;
+ zoomy = y;
- recompute_frustum();
+ recompute_frustum();
}
void model1_state::view_t::set_light_direction(float x, float y, float z)
@@ -1275,272 +1275,272 @@ void model1_state::view_t::set_light_direction(float x, float y, float z)
void model1_state::view_t::set_translation_matrix(float* mat)
{
- for (int i = 0; i < 12; i++)
- {
- translation[i] = mat[i];
- }
+ for (int i = 0; i < 12; i++)
+ {
+ translation[i] = mat[i];
+ }
}
void model1_state::view_t::set_view_translation(float x, float y)
{
- viewx = x;
- viewy = y;
+ viewx = x;
+ viewy = y;
- recompute_frustum();
+ recompute_frustum();
}
void model1_state::tgp_render(bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- m_render_done = 1;
- if ((m_listctl[1] & 0x1f) == 0x1f)
- {
- UINT16 *list = get_list();
- int zz = 0;
- LOG_TGP(("VIDEO: render list %d\n", get_list_number()));
-
- m_view->init_translation_matrix();
-
- for (;;) {
- int type = (list[1] << 16) | list[0];
- m_glist = list;
- switch (type & 15)
- {
- case 0:
- list += 2;
- break;
- case 1:
- // 1 = plane 1
- // 2 = ?? draw object (413d3, 17c4c, e)
- // 3 = plane 2
- // 4 = ?? draw object (408a8, a479, 9)
- // 5 = decor
- // 6 = ?? draw object (57bd4, 387460, 2ad)
-
- if (true || zz >= 666)
- push_object(readi(list + 2), readi(list + 4), readi(list + 6));
- list += 8;
- break;
- case 2:
- list = draw_direct(bitmap, cliprect, list + 2);
- break;
- case 3:
- {
- LOG_TGP(("VIDEO: viewport (%d, %d, %d, %d, %d, %d, %d)\n",
- readi(list + 2),
- readi16(list + 4), readi16(list + 6), readi16(list + 8),
- readi16(list + 10), readi16(list + 12), readi16(list + 14)));
-
- draw_objects(bitmap, cliprect);
-
- float xc = readi16(list + 4);
- float yc = 383 - (readi16(list + 6) - 39);
- float x1 = readi16(list + 8);
- float y2 = 383 - (readi16(list + 10) - 39);
- float x2 = readi16(list + 12);
- float y1 = 383 - (readi16(list + 14) - 39);
-
- m_view->set_viewport(xc, yc, x1, x2, y1, y2);
-
- list += 16;
- break;
- }
- case 4:
- {
- int adr = readi(list + 2);
- int len = readi(list + 4) + 1;
- LOG_TGP(("ZVIDEO: color write, adr=%x, len=%x\n", adr, len));
- for (int i = 0; i < len; i++)
- {
- m_tgp_ram[adr - 0x40000 + i] = list[6 + 2 * i];
- }
- list += 6 + len * 2;
- break;
- }
- case 5:
- {
- int adr = readi(list + 2);
- int len = readi(list + 4);
- for (int i = 0; i < len; i++)
- {
- m_poly_ram[adr - 0x800000 + i] = readi(list + 2 * i + 6);
- }
- list += 6 + len * 2;
- break;
- }
- case 6:
- {
- int adr = readi(list + 2);
- int len = readi(list + 4);
- LOG_TGP(("VIDEO: upload data, adr=%x, len=%x\n", adr, len));
- for (int i = 0; i < len; i++)
- {
- int v = readi(list + 6 + i * 2);
- float diffuse = (float(v & 0xff)) / 255.0f;
- float ambient = (float((v >> 8) & 0xff)) / 255.0f;
- float specular = (float((v >> 16) & 0xff)) / 255.0f;
- int power = (v >> 24) & 0xff;
- m_view->set_lightparam(i + adr, diffuse, ambient, specular, power);
- }
- list += 6 + len * 2;
- break;
- }
- case 7:
- LOG_TGP(("VIDEO: code 7 (%d)\n", readi(list + 2)));
- zz++;
- list += 4;
- break;
- case 8:
- LOG_TGP(("VIDEO: select mode %08x\n", readi(list + 2)));
- list += 4;
- break;
- case 9:
- LOG_TGP(("VIDEO: zoom (%f, %f)\n", readf(list + 2), readf(list + 4)));
- m_view->set_zoom(readf(list + 2) * 4, readf(list + 4) * 4);
- list += 6;
- break;
- case 0xa:
- LOG_TGP(("VIDEO: light vector (%f, %f, %f)\n", readf(list + 2), readf(list + 4), readf(list + 6)));
- m_view->set_light_direction(readf(list + 2), readf(list + 4), readf(list + 6));
- list += 8;
- break;
- case 0xb:
- {
- LOG_TGP(("VIDEO: matrix (%f, %f, %f, %f, %f, %f, %f, %f, %f, %f, %f, %f)\n",
- readf(list + 2), readf(list + 4), readf(list + 6),
- readf(list + 8), readf(list + 10), readf(list + 12),
- readf(list + 14), readf(list + 16), readf(list + 18),
- readf(list + 20), readf(list + 22), readf(list + 24)));
- float mat[12];
- for (int i = 0; i < 12; i++)
- {
- mat[i] = readf(list + 2 + 2 * i);
- }
- m_view->set_translation_matrix(mat);
- list += 26;
- break;
- }
- case 0xc:
- LOG_TGP(("VIDEO: trans (%f, %f)\n", readf(list + 2), readf(list + 4)));
- m_view->set_view_translation(readf(list + 2), readf(list + 4));
- list += 6;
- break;
- case 0xf:
- //case -1:
- goto end;
- default:
- LOG_TGP(("VIDEO: unknown type %d\n", type));
- goto end;
- }
- }
- end:
- draw_objects(bitmap, cliprect);
- }
+ m_render_done = 1;
+ if ((m_listctl[1] & 0x1f) == 0x1f)
+ {
+ UINT16 *list = get_list();
+ int zz = 0;
+ LOG_TGP(("VIDEO: render list %d\n", get_list_number()));
+
+ m_view->init_translation_matrix();
+
+ for (;;) {
+ int type = (list[1] << 16) | list[0];
+ m_glist = list;
+ switch (type & 15)
+ {
+ case 0:
+ list += 2;
+ break;
+ case 1:
+ // 1 = plane 1
+ // 2 = ?? draw object (413d3, 17c4c, e)
+ // 3 = plane 2
+ // 4 = ?? draw object (408a8, a479, 9)
+ // 5 = decor
+ // 6 = ?? draw object (57bd4, 387460, 2ad)
+
+ if (true || zz >= 666)
+ push_object(readi(list + 2), readi(list + 4), readi(list + 6));
+ list += 8;
+ break;
+ case 2:
+ list = draw_direct(bitmap, cliprect, list + 2);
+ break;
+ case 3:
+ {
+ LOG_TGP(("VIDEO: viewport (%d, %d, %d, %d, %d, %d, %d)\n",
+ readi(list + 2),
+ readi16(list + 4), readi16(list + 6), readi16(list + 8),
+ readi16(list + 10), readi16(list + 12), readi16(list + 14)));
+
+ draw_objects(bitmap, cliprect);
+
+ float xc = readi16(list + 4);
+ float yc = 383 - (readi16(list + 6) - 39);
+ float x1 = readi16(list + 8);
+ float y2 = 383 - (readi16(list + 10) - 39);
+ float x2 = readi16(list + 12);
+ float y1 = 383 - (readi16(list + 14) - 39);
+
+ m_view->set_viewport(xc, yc, x1, x2, y1, y2);
+
+ list += 16;
+ break;
+ }
+ case 4:
+ {
+ int adr = readi(list + 2);
+ int len = readi(list + 4) + 1;
+ LOG_TGP(("ZVIDEO: color write, adr=%x, len=%x\n", adr, len));
+ for (int i = 0; i < len; i++)
+ {
+ m_tgp_ram[adr - 0x40000 + i] = list[6 + 2 * i];
+ }
+ list += 6 + len * 2;
+ break;
+ }
+ case 5:
+ {
+ int adr = readi(list + 2);
+ int len = readi(list + 4);
+ for (int i = 0; i < len; i++)
+ {
+ m_poly_ram[adr - 0x800000 + i] = readi(list + 2 * i + 6);
+ }
+ list += 6 + len * 2;
+ break;
+ }
+ case 6:
+ {
+ int adr = readi(list + 2);
+ int len = readi(list + 4);
+ LOG_TGP(("VIDEO: upload data, adr=%x, len=%x\n", adr, len));
+ for (int i = 0; i < len; i++)
+ {
+ int v = readi(list + 6 + i * 2);
+ float diffuse = (float(v & 0xff)) / 255.0f;
+ float ambient = (float((v >> 8) & 0xff)) / 255.0f;
+ float specular = (float((v >> 16) & 0xff)) / 255.0f;
+ int power = (v >> 24) & 0xff;
+ m_view->set_lightparam(i + adr, diffuse, ambient, specular, power);
+ }
+ list += 6 + len * 2;
+ break;
+ }
+ case 7:
+ LOG_TGP(("VIDEO: code 7 (%d)\n", readi(list + 2)));
+ zz++;
+ list += 4;
+ break;
+ case 8:
+ LOG_TGP(("VIDEO: select mode %08x\n", readi(list + 2)));
+ list += 4;
+ break;
+ case 9:
+ LOG_TGP(("VIDEO: zoom (%f, %f)\n", readf(list + 2), readf(list + 4)));
+ m_view->set_zoom(readf(list + 2) * 4, readf(list + 4) * 4);
+ list += 6;
+ break;
+ case 0xa:
+ LOG_TGP(("VIDEO: light vector (%f, %f, %f)\n", readf(list + 2), readf(list + 4), readf(list + 6)));
+ m_view->set_light_direction(readf(list + 2), readf(list + 4), readf(list + 6));
+ list += 8;
+ break;
+ case 0xb:
+ {
+ LOG_TGP(("VIDEO: matrix (%f, %f, %f, %f, %f, %f, %f, %f, %f, %f, %f, %f)\n",
+ readf(list + 2), readf(list + 4), readf(list + 6),
+ readf(list + 8), readf(list + 10), readf(list + 12),
+ readf(list + 14), readf(list + 16), readf(list + 18),
+ readf(list + 20), readf(list + 22), readf(list + 24)));
+ float mat[12];
+ for (int i = 0; i < 12; i++)
+ {
+ mat[i] = readf(list + 2 + 2 * i);
+ }
+ m_view->set_translation_matrix(mat);
+ list += 26;
+ break;
+ }
+ case 0xc:
+ LOG_TGP(("VIDEO: trans (%f, %f)\n", readf(list + 2), readf(list + 4)));
+ m_view->set_view_translation(readf(list + 2), readf(list + 4));
+ list += 6;
+ break;
+ case 0xf:
+ //case -1:
+ goto end;
+ default:
+ LOG_TGP(("VIDEO: unknown type %d\n", type));
+ goto end;
+ }
+ }
+ end:
+ draw_objects(bitmap, cliprect);
+ }
}
void model1_state::tgp_scan()
{
#if 0
- if (machine().input().code_pressed_once(KEYCODE_F)) {
- FILE *fp;
- fp = fopen("tgp-ram.bin", "w+b");
- if (fp) {
- fwrite(m_tgp_ram, (0x100000 - 0x40000) * 2, 1, fp);
- fclose(fp);
- }
- exit(0);
- }
+ if (machine().input().code_pressed_once(KEYCODE_F)) {
+ FILE *fp;
+ fp = fopen("tgp-ram.bin", "w+b");
+ if (fp) {
+ fwrite(m_tgp_ram, (0x100000 - 0x40000) * 2, 1, fp);
+ fclose(fp);
+ }
+ exit(0);
+ }
#endif
- if (!m_render_done && (m_listctl[1] & 0x1f) == 0x1f)
- {
- UINT16 *list = get_list();
- // Skip everything but the data uploads
- LOG_TGP(("VIDEO: scan list %d\n", get_list_number()));
- for (;;)
- {
- int type = (list[1] << 16) | list[0];
- switch (type) {
- case 0:
- list += 2;
- break;
- case 1:
- list += 8;
- break;
- case 2:
- list = skip_direct(list + 2);
- break;
- case 3:
- list += 16;
- break;
- case 4:
- {
- int adr = readi(list + 2);
- int len = readi(list + 4) + 1;
- LOG_TGP(("ZVIDEO: scan color write, adr=%x, len=%x\n", adr, len));
- for (int i = 0; i<len; i++)
- {
- m_tgp_ram[adr - 0x40000 + i] = list[6 + 2 * i];
- }
- list += 6 + len * 2;
- break;
- }
- case 5:
- {
- int adr = readi(list + 2);
- int len = readi(list + 4);
- for (int i = 0; i < len; i++)
- {
- m_poly_ram[adr - 0x800000 + i] = readi(list + 2 * i + 6);
- }
- list += 6 + len * 2;
- break;
- }
- case 6:
- {
- int adr = readi(list + 2);
- int len = readi(list + 4);
- //LOG_TGP(("VIDEO: upload data, adr=%x, len=%x\n", adr, len));
- for (int i = 0; i<len; i++)
- {
- int v = readi(list + 6 + i * 2);
- m_view->lightparams[i + adr].d = (float(v & 0xff)) / 255.0f;
- m_view->lightparams[i + adr].a = (float((v >> 8) & 0xff)) / 255.0f;
- m_view->lightparams[i + adr].s = (float((v >> 16) & 0xff)) / 255.0f;
- m_view->lightparams[i + adr].p = (v >> 24) & 0xff;
- //LOG_TGP((" %02X\n",v));
- }
- list += 6 + len * 2;
- break;
- }
- case 7:
- list += 4;
- break;
- case 8:
- list += 4;
- break;
- case 9:
- list += 6;
- break;
- case 0xa:
- list += 8;
- break;
- case 0xb:
- list += 26;
- break;
- case 0xc:
- list += 6;
- break;
- case 0xf:
- case -1:
- goto end;
- default:
- LOG_TGP(("VIDEO: unknown type %d\n", type));
- goto end;
- }
- }
- end:
- ;
- }
- m_render_done = 0;
+ if (!m_render_done && (m_listctl[1] & 0x1f) == 0x1f)
+ {
+ UINT16 *list = get_list();
+ // Skip everything but the data uploads
+ LOG_TGP(("VIDEO: scan list %d\n", get_list_number()));
+ for (;;)
+ {
+ int type = (list[1] << 16) | list[0];
+ switch (type) {
+ case 0:
+ list += 2;
+ break;
+ case 1:
+ list += 8;
+ break;
+ case 2:
+ list = skip_direct(list + 2);
+ break;
+ case 3:
+ list += 16;
+ break;
+ case 4:
+ {
+ int adr = readi(list + 2);
+ int len = readi(list + 4) + 1;
+ LOG_TGP(("ZVIDEO: scan color write, adr=%x, len=%x\n", adr, len));
+ for (int i = 0; i<len; i++)
+ {
+ m_tgp_ram[adr - 0x40000 + i] = list[6 + 2 * i];
+ }
+ list += 6 + len * 2;
+ break;
+ }
+ case 5:
+ {
+ int adr = readi(list + 2);
+ int len = readi(list + 4);
+ for (int i = 0; i < len; i++)
+ {
+ m_poly_ram[adr - 0x800000 + i] = readi(list + 2 * i + 6);
+ }
+ list += 6 + len * 2;
+ break;
+ }
+ case 6:
+ {
+ int adr = readi(list + 2);
+ int len = readi(list + 4);
+ //LOG_TGP(("VIDEO: upload data, adr=%x, len=%x\n", adr, len));
+ for (int i = 0; i<len; i++)
+ {
+ int v = readi(list + 6 + i * 2);
+ m_view->lightparams[i + adr].d = (float(v & 0xff)) / 255.0f;
+ m_view->lightparams[i + adr].a = (float((v >> 8) & 0xff)) / 255.0f;
+ m_view->lightparams[i + adr].s = (float((v >> 16) & 0xff)) / 255.0f;
+ m_view->lightparams[i + adr].p = (v >> 24) & 0xff;
+ //LOG_TGP((" %02X\n",v));
+ }
+ list += 6 + len * 2;
+ break;
+ }
+ case 7:
+ list += 4;
+ break;
+ case 8:
+ list += 4;
+ break;
+ case 9:
+ list += 6;
+ break;
+ case 0xa:
+ list += 8;
+ break;
+ case 0xb:
+ list += 26;
+ break;
+ case 0xc:
+ list += 6;
+ break;
+ case 0xf:
+ case -1:
+ goto end;
+ default:
+ LOG_TGP(("VIDEO: unknown type %d\n", type));
+ goto end;
+ }
+ }
+ end:
+ ;
+ }
+ m_render_done = 0;
}
VIDEO_START_MEMBER(model1_state, model1)
diff --git a/src/mame/video/model3.cpp b/src/mame/video/model3.cpp
index eb1bfbd5438..2a81f39d7bd 100644
--- a/src/mame/video/model3.cpp
+++ b/src/mame/video/model3.cpp
@@ -825,13 +825,13 @@ cached_texture *model3_state::get_texture(int page, int texx, int texy, int texw
-------- -------- -------- ------x- ?
-------- -------- -------- -------x ?
- 0x01,0x02 only present on Step 2+
+ 0x01,0x02 only present on Step 2+
0x01: xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx Model scale (float)
0x02: -------- -------- x------- -------- Texture replace
- -------- -------- -x------ -------- Switch bank
- -------- -------- --xxxxxx x------- X offset
- -------- -------- -------- -xxxxxxx Y offset
+ -------- -------- -x------ -------- Switch bank
+ -------- -------- --xxxxxx x------- X offset
+ -------- -------- -------- -xxxxxxx Y offset
0x03: --x----- -------- -------- -------- ?
-------- -xxxxxxx xxxx---- -------- LOD?
@@ -850,47 +850,47 @@ cached_texture *model3_state::get_texture(int page, int texx, int texy, int texw
Polygon Data
0x00: xxxxxx-- -------- -------- -------- Specular
- ------x- -------- -------- -------- Clockwise data
+ ------x- -------- -------- -------- Clockwise data
-------x xxxxxxxx xxxxxx-- -------- Polygon ID
- -------- -------- ------xx -------- Discard this polygon
- -------- -------- -------- x------- Specular enable
+ -------- -------- ------xx -------- Discard this polygon
+ -------- -------- -------- x------- Specular enable
-------- -------- -------- -x------ 0 = Triangle, 1 = Quad
- -------- -------- -------- --x----- Polygon is points
- -------- -------- -------- ---x---- Smoothing enable
+ -------- -------- -------- --x----- Polygon is points
+ -------- -------- -------- ---x---- Smoothing enable
-------- -------- -------- ----x--- Vertex 3 shared from previous polygon
-------- -------- -------- -----x-- Vertex 2 shared from previous polygon
-------- -------- -------- ------x- Vertex 1 shared from previous polygon
-------- -------- -------- -------x Vertex 0 shared from previous polygon
-
+
0x01: xxxxxxxx xxxxxxxx xxxxxxxx -------- Polygon normal X coordinate (2.22 fixed point)
- -------- -------- -------- x------- Edge on translucency
+ -------- -------- -------- x------- Edge on translucency
-------- -------- -------- -x------ UV format (0 = 13.3, 1 = 16.0)
- -------- -------- -------- --x----- Enable fixed shading
+ -------- -------- -------- --x----- Enable fixed shading
-------- -------- -------- ---x---- Enable double-sided polygon
- -------- -------- -------- ----x--- Enable smooth shading
+ -------- -------- -------- ----x--- Enable smooth shading
-------- -------- -------- -----x-- If set, this is the last polygon
-------- -------- -------- ------x- Poly color, 1 = RGB, 0 = color table
- -------- -------- -------- -------x No LOS return
+ -------- -------- -------- -------x No LOS return
0x02: xxxxxxxx xxxxxxxx xxxxxxxx -------- Polygon normal Y coordinate (2.22 fixed point)
- -------- -------- -------- xxx----- Microtexture select
- -------- -------- -------- ---x---- Microtexture enable
- -------- -------- -------- ----xx-- Microtexture min LOD
+ -------- -------- -------- xxx----- Microtexture select
+ -------- -------- -------- ---x---- Microtexture enable
+ -------- -------- -------- ----xx-- Microtexture min LOD
-------- -------- -------- ------x- Texture U mirror enable
-------- -------- -------- -------x Texture V mirror enable
0x03: xxxxxxxx xxxxxxxx xxxxxxxx -------- Polygon normal Z coordinate (2.22 fixed point)
- -------- -------- -------- x------- X wrap smoothing
- -------- -------- -------- -x------ Y wrap smoothing
+ -------- -------- -------- x------- X wrap smoothing
+ -------- -------- -------- -x------ Y wrap smoothing
-------- -------- -------- --xxx--- Texture width (in 8-pixel tiles)
-------- -------- -------- -----xxx Texture height (in 8-pixel tiles)
0x04: xxxxxxxx xxxxxxxx xxxxxxxx -------- Color (RGB888)
-------- -------- -------- x------- Translator map select
- -------- -------- -------- -x------ Texture page
- -------- -------- -------- --xxxxxx Upper 6 bits of texture U coordinate
+ -------- -------- -------- -x------ Texture page
+ -------- -------- -------- --xxxxxx Upper 6 bits of texture U coordinate
0x05: xxxxxxxx xxxxxxxx xxxxxxxx -------- Texture NP scale
-------- -------- -------- x------- Low bit of texture U coordinate
@@ -900,17 +900,17 @@ cached_texture *model3_state::get_texture(int page, int texx, int texy, int texw
0x06: x------- -------- -------- -------- Texture contour enable
-xxxxxxx -------- -------- -------- Translator map offset
-------- xxxxxx-- -------- -------- Polygon translucency
- -------- ------x- -------- -------- Translucency pattern select
+ -------- ------x- -------- -------- Translucency pattern select
-------- -------x -------- -------- 1 = disable lighting
-------- -------- xxxxx--- -------- Polygon light modifier (Amount that a luminous polygon will burn through fog.
Valid range is 0.0 to 1.0. 0.0 is completely fogged;
1.0 has no fog.)
-------- -------- -----x-- -------- Texture enable
-------- -------- ------xx x------- Texture format
- -------- -------- -------- -xx----- Shininess
- -------- -------- -------- ---x---- High priority polygon
- -------- -------- -------- ----x--- Layered polygon (stencil)
- -------- -------- -------- -----xxx Translucency mode
+ -------- -------- -------- -xx----- Shininess
+ -------- -------- -------- ---x---- High priority polygon
+ -------- -------- -------- ----x--- Layered polygon (stencil)
+ -------- -------- -------- -----xxx Translucency mode
Vertex entry
diff --git a/src/mame/video/mw8080bw.cpp b/src/mame/video/mw8080bw.cpp
index 425bf758fc9..6b0276d6e6d 100644
--- a/src/mame/video/mw8080bw.cpp
+++ b/src/mame/video/mw8080bw.cpp
@@ -82,8 +82,8 @@ UINT32 mw8080bw_state::screen_update_mw8080bw(screen_device &screen, bitmap_rgb3
* (guess) pin 8 low for trench floor
* thus, trench side: 1.4 or 2.2 V
* trench floor: 1.3 or 2.0 V
- * trech top: 1.8 or 3 V
- * scaled to 3.2 V = 255, 1.2 V = 0 (arbitrary values chosen to match video)
+ * trech top: 1.8 or 3 V
+ * scaled to 3.2 V = 255, 1.2 V = 0 (arbitrary values chosen to match video)
*/
#define SPCENCTR_TOP_TRENCH_DARK_RGB32_PEN rgb_t(0x4d, 0x4d, 0x4d)
@@ -111,7 +111,7 @@ UINT32 mw8080bw_state::screen_update_spcenctr(screen_device &screen, bitmap_rgb3
memset(line_buf, 0, 256);
- if(m_spcenctr_bright_control)
+ if(m_spcenctr_bright_control)
m_spcenctr_brightness = 255;
else if(m_spcenctr_brightness > SPCENCTR_BRIGHTNESS_DECAY)
m_spcenctr_brightness -= SPCENCTR_BRIGHTNESS_DECAY;
diff --git a/src/mame/video/neogeo_spr.cpp b/src/mame/video/neogeo_spr.cpp
index 93a9ca1e68e..b6a772d476c 100644
--- a/src/mame/video/neogeo_spr.cpp
+++ b/src/mame/video/neogeo_spr.cpp
@@ -709,15 +709,15 @@ UINT32 neosprite_optimized_device::optimize_helper(std::vector<UINT8> &spritegfx
// convert the sprite graphics data into a format that allows faster blitting
UINT8 *src;
UINT8 *dest;
-
+
UINT32 mask = get_region_mask(region_sprites, region_sprites_size);
-
+
spritegfx.resize(mask + 1);
UINT32 spritegfx_address_mask = mask;
-
+
src = region_sprites;
dest = &spritegfx[0];
-
+
for (unsigned i = 0; i < region_sprites_size; i += 0x80, src += 0x80)
{
for (unsigned y = 0; y < 0x10; y++)
@@ -729,7 +729,7 @@ UINT32 neosprite_optimized_device::optimize_helper(std::vector<UINT8> &spritegfx
(((src[0x42 | (y << 2)] >> x) & 0x01) << 1) |
(((src[0x40 | (y << 2)] >> x) & 0x01) << 0);
}
-
+
for (unsigned x = 0; x < 8; x++)
{
*(dest++) = (((src[0x03 | (y << 2)] >> x) & 0x01) << 3) |
@@ -739,7 +739,7 @@ UINT32 neosprite_optimized_device::optimize_helper(std::vector<UINT8> &spritegfx
}
}
}
-
+
return spritegfx_address_mask;
}
diff --git a/src/mame/video/neogeo_spr.h b/src/mame/video/neogeo_spr.h
index 6be770b9c3b..a5cb2c99c3c 100644
--- a/src/mame/video/neogeo_spr.h
+++ b/src/mame/video/neogeo_spr.h
@@ -26,7 +26,7 @@ public:
virtual void optimize_sprite_data();
virtual void set_optimized_sprite_data(UINT8* sprdata, UINT32 mask);
-
+
virtual void draw_fixed_layer_2pixels(UINT32*&pixel_addr, int offset, UINT8* gfx_base, const pen_t* char_pens);
void draw_fixed_layer(bitmap_rgb32 &bitmap, int scanline);
void set_videoram_offset(UINT16 data);
@@ -114,7 +114,7 @@ public:
virtual void draw_pixel(int romaddr, UINT32* dst, const pen_t *line_pens) override;
std::vector<UINT8> m_sprite_gfx;
UINT8* m_spritegfx8;
-
+
private:
UINT32 optimize_helper(std::vector<UINT8> &spritegfx, UINT8* region_sprites, UINT32 region_sprites_size);
};
diff --git a/src/osd/modules/debugger/debugimgui.cpp b/src/osd/modules/debugger/debugimgui.cpp
index 5308da71d1f..4033e8e4176 100644
--- a/src/osd/modules/debugger/debugimgui.cpp
+++ b/src/osd/modules/debugger/debugimgui.cpp
@@ -498,11 +498,11 @@ void debug_imgui::draw_view(debug_area* view_ptr, bool exp_change)
ImGui::PushStyleVar(ImGuiStyleVar_FramePadding, ImVec2(0,0));
ImGui::PushStyleVar(ImGuiStyleVar_ItemSpacing, ImVec2(0,0));
-
+
// if the view has changed its expression (disasm, memory), then update scroll bar
if(exp_change)
ImGui::SetScrollY(view_ptr->view->visible_position().y * fsize.y);
-
+
// update view location, while the cursor is at 0,0.
view_ptr->ofs_x = ImGui::GetCursorScreenPos().x;
view_ptr->ofs_y = ImGui::GetCursorScreenPos().y;
@@ -523,7 +523,7 @@ void debug_imgui::draw_view(debug_area* view_ptr, bool exp_change)
pos.x = 0;
pos.y = ImGui::GetScrollY() / fsize.y;
view_ptr->view->set_visible_position(pos);
-
+
viewdata = view_ptr->view->viewdata();
xy1.x = view_ptr->ofs_x;
@@ -693,7 +693,7 @@ void debug_imgui::draw_disasm(debug_area* view_ptr, bool* opened)
ImGui::BeginChild("##disasm_output", ImVec2(ImGui::GetWindowWidth() - 16,ImGui::GetWindowHeight() - ImGui::GetTextLineHeight() - ImGui::GetCursorPosY())); // account for title bar and widgets already drawn
draw_view(view_ptr,exp_change);
ImGui::EndChild();
-
+
ImGui::End();
}
}
@@ -801,7 +801,7 @@ void debug_imgui::draw_memory(debug_area* view_ptr, bool* opened)
ImGui::BeginChild("##memory_output", ImVec2(ImGui::GetWindowWidth() - 16,ImGui::GetWindowHeight() - ImGui::GetTextLineHeight() - ImGui::GetCursorPosY())); // account for title bar and widgets already drawn
draw_view(view_ptr,exp_change);
ImGui::EndChild();
-
+
ImGui::End();
}
}
diff --git a/src/osd/modules/sound/xaudio2_sound.cpp b/src/osd/modules/sound/xaudio2_sound.cpp
index 59cca9b762b..d49765e9d07 100644
--- a/src/osd/modules/sound/xaudio2_sound.cpp
+++ b/src/osd/modules/sound/xaudio2_sound.cpp
@@ -342,7 +342,7 @@ void sound_xaudio2::exit()
m_xAudio2.reset();
m_buffer.reset();
m_buffer_pool.reset();
-
+
CoUninitialize();
if (m_overflows != 0 || m_underflows != 0)
diff --git a/src/version.cpp b/src/version.cpp
index f8c28e47482..b7f73e4618a 100644
--- a/src/version.cpp
+++ b/src/version.cpp
@@ -8,7 +8,7 @@
***************************************************************************/
-#define BARE_BUILD_VERSION "0.173"
+#define BARE_BUILD_VERSION "0.174"
extern const char bare_build_version[];
extern const char build_version[];
diff --git a/src/zexall/main.cpp b/src/zexall/main.cpp
index e35767babbc..b3bcf101b9e 100644
--- a/src/zexall/main.cpp
+++ b/src/zexall/main.cpp
@@ -48,7 +48,7 @@ public:
~zexall_machine_manager() { delete m_manager; m_manager = nullptr; }
- int execute()
+ int execute()
{
auto system = &GAME_NAME(zexall);
machine_config config(*system, m_options);
@@ -107,4 +107,4 @@ const char * emulator_info::get_copyright() { return nullptr; }
const char * emulator_info::get_copyright_info() { return nullptr; }
-bool emulator_info::standalone() { return true; } \ No newline at end of file
+bool emulator_info::standalone() { return true; }
diff --git a/src/zexall/zexall.cpp b/src/zexall/zexall.cpp
index 663d9101b06..1ae89c1ac20 100644
--- a/src/zexall/zexall.cpp
+++ b/src/zexall/zexall.cpp
@@ -31,10 +31,10 @@ public:
zexall_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
- m_main_ram(*this, "main_ram"),
- m_out_data(0),
- m_out_req(0),
- m_out_req_last(0),
+ m_main_ram(*this, "main_ram"),
+ m_out_data(0),
+ m_out_req(0),
+ m_out_req_last(0),
m_out_ack(0)
{
}
@@ -68,7 +68,7 @@ DRIVER_INIT_MEMBER(zexall_state,zexall)
void zexall_state::machine_reset()
{
// rom is self-modifying, so need to refresh it on each run
- // fill main ram with zexall code
+ // fill main ram with zexall code
memcpy(m_main_ram, zexall_program, 0x228a);
}
diff --git a/src/zexall/zexall.h b/src/zexall/zexall.h
index 8b0e1493432..a276e509eed 100644
--- a/src/zexall/zexall.h
+++ b/src/zexall/zexall.h
@@ -373,7 +373,7 @@ static const uint8_t zexall_program[8841] =
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd6, // ................
0x38, 0xdd, 0x6a, 0x6e, 0x65, 0x67, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, // 8.jneg..........
0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, // ................
- 0x2e, 0x24, 0xff, 0xed, 0x67, 0x00, 0x00, 0xcb, 0x91, 0x8b, 0xc4, 0x62, 0xfa, 0x03, 0x01, 0x20, // .$..g......b...
+ 0x2e, 0x24, 0xff, 0xed, 0x67, 0x00, 0x00, 0xcb, 0x91, 0x8b, 0xc4, 0x62, 0xfa, 0x03, 0x01, 0x20, // .$..g......b...
0xe7, 0x79, 0xb4, 0x40, 0x06, 0xe2, 0x8a, 0x00, 0x08, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, // .y.@............
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ................
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd7, 0xff, 0x00, 0x00, 0xff, // ................
@@ -495,7 +495,7 @@ static const uint8_t zexall_program[8841] =
0x96, 0xee, 0x0e, 0x61, 0x2c, 0x99, 0x09, 0x51, 0xba, 0x07, 0x6d, 0xc4, 0x19, 0x70, 0x6a, 0xf4, // ...a,..Q..m..pj.
0x8f, 0xe9, 0x63, 0xa5, 0x35, 0x9e, 0x64, 0x95, 0xa3, 0x0e, 0xdb, 0x88, 0x32, 0x79, 0xdc, 0xb8, // ..c.5.d.....2y..
0xa4, 0xe0, 0xd5, 0xe9, 0x1e, 0x97, 0xd2, 0xd9, 0x88, 0x09, 0xb6, 0x4c, 0x2b, 0x7e, 0xb1, 0x7c, // ...........L+~.|
- 0xbd, 0xe7, 0xb8, 0x2d, 0x07, 0x90, 0xbf, 0x1d, 0x91, 0x1d, 0xb7, 0x10, 0x64, 0x6a, 0xb0, 0x20, // ...-........dj.
+ 0xbd, 0xe7, 0xb8, 0x2d, 0x07, 0x90, 0xbf, 0x1d, 0x91, 0x1d, 0xb7, 0x10, 0x64, 0x6a, 0xb0, 0x20, // ...-........dj.
0xf2, 0xf3, 0xb9, 0x71, 0x48, 0x84, 0xbe, 0x41, 0xde, 0x1a, 0xda, 0xd4, 0x7d, 0x6d, 0xdd, 0xe4, // ...qH..A....}m..
0xeb, 0xf4, 0xd4, 0xb5, 0x51, 0x83, 0xd3, 0x85, 0xc7, 0x13, 0x6c, 0x98, 0x56, 0x64, 0x6b, 0xa8, // ....Q.....l.Vdk.
0xc0, 0xfd, 0x62, 0xf9, 0x7a, 0x8a, 0x65, 0xc9, 0xec, 0x14, 0x01, 0x5c, 0x4f, 0x63, 0x06, 0x6c, // ..b.z.e.....Oc.l