summaryrefslogtreecommitdiffstatshomepage
path: root/src
diff options
context:
space:
mode:
author Patrick Mackinlay <pmackinlay@hotmail.com>2020-10-29 17:17:42 +0700
committer Patrick Mackinlay <pmackinlay@hotmail.com>2020-10-29 17:17:42 +0700
commit6778308df65f46f0527a9a442fb3a96c58237658 (patch)
tree437db0c93c472bbfb70134a71078445a9f7011aa /src
parentc44f6a05ce7276c5bc9146e5ede7820e54e33fb6 (diff)
ncr5380: bug fixes
* clear ACK upon exit from DMA mode * assert DRQ at start of DMA initiator send cycle
Diffstat (limited to 'src')
-rw-r--r--src/devices/machine/ncr5380n.cpp32
-rw-r--r--src/mame/machine/dmac_0266.cpp13
2 files changed, 26 insertions, 19 deletions
diff --git a/src/devices/machine/ncr5380n.cpp b/src/devices/machine/ncr5380n.cpp
index a0158c5fee3..3f107db84cd 100644
--- a/src/devices/machine/ncr5380n.cpp
+++ b/src/devices/machine/ncr5380n.cpp
@@ -286,6 +286,9 @@ void ncr5380n_device::mode_w(u8 data)
m_tcmd &= ~TC_LBS;
set_drq(false);
+
+ // clear ACK
+ scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
}
// start/stop arbitration
@@ -366,7 +369,7 @@ void ncr5380n_device::sds_w(u8 data)
if (m_mode & MODE_DMA)
{
- m_state = DMA_OUT_REQ;
+ m_state = DMA_OUT_DRQ;
m_state_timer->adjust(attotime::zero);
}
}
@@ -502,25 +505,26 @@ int ncr5380n_device::state_step()
}
break;
+ case DMA_OUT_DRQ:
+ m_state = DMA_OUT_REQ;
+ set_drq(true);
+
+ delay = -1;
+ break;
case DMA_OUT_REQ:
if (ctrl & S_REQ)
{
if ((ctrl & S_PHASE_MASK) == (m_tcmd & TC_PHASE))
{
- m_state = DMA_OUT_DRQ;
- set_drq(true);
- }
+ LOGMASKED(LOG_DMA, "dma out: 0x%02x\n", m_odata);
- delay = -1;
- }
- break;
- case DMA_OUT_DRQ:
- LOGMASKED(LOG_DMA, "dma out: 0x%02x\n", m_odata);
- m_state = DMA_OUT_ACK;
+ m_state = DMA_OUT_ACK;
- // assert data and ACK
- scsi_bus->data_w(scsi_refid, m_odata);
- scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK);
+ // assert data and ACK
+ scsi_bus->data_w(scsi_refid, m_odata);
+ scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK);
+ }
+ }
break;
case DMA_OUT_ACK:
if (!(ctrl & S_REQ))
@@ -533,7 +537,7 @@ int ncr5380n_device::state_step()
m_tcmd |= TC_LBS;
}
else
- m_state = DMA_OUT_REQ;
+ m_state = DMA_OUT_DRQ;
// clear data and ACK
scsi_bus->data_w(scsi_refid, 0);
diff --git a/src/mame/machine/dmac_0266.cpp b/src/mame/machine/dmac_0266.cpp
index 0e65a33af87..e3343baa8e0 100644
--- a/src/mame/machine/dmac_0266.cpp
+++ b/src/mame/machine/dmac_0266.cpp
@@ -143,12 +143,15 @@ void dmac_0266_device::dma_check(void *ptr, s32 param)
* adapter waits for more data that the DMAC is not ready to supply.
* It's not clear how the real hardware works - for now this hack
* continues to read and discard data from the device, or write
- * arbitrary zero bytes to it until it deasserts the request line.
+ * arbitrary zero bytes to it until it asserts EOP (driven by IRQ).
*/
- if (m_control & DIRECTION)
- m_dma_r();
- else
- m_dma_w(0);
+ if (!(m_status & INTERRUPT))
+ {
+ if (m_control & DIRECTION)
+ m_dma_r();
+ else
+ m_dma_w(0);
+ }
return;
}