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author Couriersud <couriersud@users.noreply.github.com>2007-12-30 12:04:20 +0000
committer Couriersud <couriersud@users.noreply.github.com>2007-12-30 12:04:20 +0000
commit1c670facf465d17c6156bad8df8bb7fa45fe5a7b (patch)
treefb46ba2e5addd2dbcd711bba0aa09a59a3fb4605 /src
parent4df95f41db254e2714f53963b78515aa33946341 (diff)
Dkong fixes
- Cosmetic changes - Fixed regression in radarscp sound - Added dipswitch locations to dkong3b
Diffstat (limited to 'src')
-rw-r--r--src/mame/audio/dkong.c52
-rw-r--r--src/mame/drivers/dkong.c157
2 files changed, 74 insertions, 135 deletions
diff --git a/src/mame/audio/dkong.c b/src/mame/audio/dkong.c
index 9dbf7cfcb2e..2fa86a92a48 100644
--- a/src/mame/audio/dkong.c
+++ b/src/mame/audio/dkong.c
@@ -353,22 +353,11 @@ static DISCRETE_SOUND_START(dkong2b)
DISCRETE_MIXER4(NODE_288, 1, DS_OUT_SOUND0, DS_OUT_SOUND1, DS_OUT_DAC, DS_OUT_SOUND2, &dkong_mixer_desc)
-#if 0
- /* This filter should simulate gain vs. frequency behaviour of MB3712 */
- //DISCRETE_FILTER1(NODE_294,1,NODE_288,80,DISC_FILTER_HIGHPASS)
-
- /* The following is the CR filter by the speaker and C8 */
- /* 4 Ohm is from MB3712 Spec Sheet */
- DISCRETE_CRFILTER(NODE_295,1,NODE_288, 4, DK_C8)
- DISCRETE_OUTPUT(NODE_295, 32767.0/5.0*15)
-#else
// Amplifier: internal amplifier
- //DISCRETE_ADDER2(NODE_289,1,NODE_288,0.3+5.0*150.0/(150.0+1000.0))
DISCRETE_ADDER2(NODE_289,1,NODE_288,5.0*43.0/(100.0+43.0))
DISCRETE_RCINTEGRATE(NODE_294,1,NODE_289,0,150,1000, CAP_U(33),DK_SUP_V,DISC_RC_INTEGRATE_TYPE3)
DISCRETE_CRFILTER(NODE_295,1,NODE_294, 1000, DK_C13)
DISCRETE_OUTPUT(NODE_295, 32767.0/5.0 * 3)
-#endif
DISCRETE_SOUND_END
@@ -623,22 +612,11 @@ static DISCRETE_SOUND_START(radarscp)
DISCRETE_MIXER5(NODE_288, 1, DS_OUT_SOUND0, DS_OUT_SOUND1, DS_OUT_SOUND2, DS_OUT_SOUND7, DS_OUT_DAC, &radarscp_mixer_desc)
-#if 0
- /* This filter should simulate gain vs. frequency behaviour of MB3712 */
- //DISCRETE_FILTER1(NODE_291,1,NODE_289,80,DISC_FILTER_HIGHPASS)
-
- /* The following is the CR filter by the speaker and C8 */
- /* 4 Ohm is from MB3712 Spec Sheet */
- DISCRETE_CRFILTER(NODE_295,1,NODE_288, 4, RS_C5)
- DISCRETE_OUTPUT(NODE_295, 32767.0/5.0*20)
-#else
// Amplifier: internal amplifier
- //DISCRETE_ADDER2(NODE_289,1,NODE_288,0.5+5.0*150.0/(150.0+1000.0))
DISCRETE_ADDER2(NODE_289,1,NODE_288,5.0*43.0/(100.0+43.0))
DISCRETE_RCINTEGRATE(NODE_294,1,NODE_289,0,150,1000, CAP_U(33),DK_SUP_V,DISC_RC_INTEGRATE_TYPE3)
DISCRETE_CRFILTER(NODE_295,1,NODE_294, 1000, DK_C13)
DISCRETE_OUTPUT(NODE_295, 32767.0/5.0 * 3)
-#endif
DISCRETE_SOUND_END
@@ -1060,8 +1038,6 @@ static READ8_HANDLER( dkongjr_sh_tune_r )
return soundlatch_r(0) & 0x01F;
}
-#define TSTEP 0.001
-
static WRITE8_HANDLER( dkong_sh_p1_w )
{
discrete_sound_w(DS_DAC,data);
@@ -1158,6 +1134,7 @@ WRITE8_HANDLER( dkong_snd_disc_w )
break;
case 6:
discrete_sound_w(DS_SOUND6_INP,data & 1);
+ break;
case 7:
discrete_sound_w(DS_SOUND7_INP,data & 1);
break;
@@ -1272,30 +1249,6 @@ ADDRESS_MAP_END
*
*************************************/
-static const char *const dkongjr_sample_names[] =
-{
- "*dkongjr",
- "jump.wav",
- "land.wav",
- "roar.wav",
- "climb0.wav",
- "climb1.wav",
- "climb2.wav",
- "death.wav",
- "drop.wav",
- "walk0.wav",
- "walk1.wav",
- "walk2.wav",
- "snapjaw.wav",
- 0 /* end of array */
-};
-
-static const struct Samplesinterface dkongjr_samples_interface =
-{
- 8, /* 8 channels */
- dkongjr_sample_names
-};
-
static const struct NESinterface nes_interface_1 = { REGION_CPU2 };
static const struct NESinterface nes_interface_2 = { REGION_CPU3 };
@@ -1306,6 +1259,7 @@ static struct TMS5110interface tms5110_interface =
NULL,
NULL
};
+
/*************************************
*
* Machine driver
@@ -1363,7 +1317,7 @@ MACHINE_DRIVER_START( dkongjr_audio )
MDRV_SOUND_ADD_TAG("discrete", DISCRETE, 0)
MDRV_SOUND_CONFIG_DISCRETE(dkongjr)
- MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.55)
+ MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_DRIVER_END
diff --git a/src/mame/drivers/dkong.c b/src/mame/drivers/dkong.c
index fd857a18f10..128f9dfa827 100644
--- a/src/mame/drivers/dkong.c
+++ b/src/mame/drivers/dkong.c
@@ -59,6 +59,9 @@ Done:
Couriersud: 12/2007
+ - Cosmetic changes
+ - Fixed regression in radarscp sound
+ - Added dipswitch locations to dkong3b
- Added dkongjr discrete sound
- Proper interface Z80 - I8035 for dkongjr
- Changed discrete sound output factors
@@ -688,11 +691,66 @@ static ADDRESS_MAP_START( dkong_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x7d86, 0x7d87) AM_WRITE(dkong_palettebank_w)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( dkongjr_map, ADDRESS_SPACE_PROGRAM, 8 )
+ AM_RANGE(0x0000, 0x5fff) AM_ROM
+ AM_RANGE(0x6000, 0x6bff) AM_RAM
+ AM_RANGE(0x6c00, 0x6fff) AM_RAM /* DK3 bootleg only */
+ AM_RANGE(0x7000, 0x73ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite set 1 */
+ AM_RANGE(0x7400, 0x77ff) AM_READWRITE(MRA8_RAM, dkong_videoram_w) AM_BASE(&videoram)
+ AM_RANGE(0x7800, 0x780f) AM_READWRITE(dma8257_0_r, dma8257_0_w) /* P8257 control registers */
+ AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_WRITE(dkongjr_sh_tuneselect_w)
+ AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(dkongjr_gfxbank_w)
+ AM_RANGE(0x7c81, 0x7c81) AM_WRITE(dkongjr_sh_test6_w)
+ AM_RANGE(0x7d00, 0x7d00) AM_READ(dkong_in2_r) /* IN2 */
+ AM_RANGE(0x7d00, 0x7d07) AM_WRITE(dkongjr_snd_w1) /* Sound addrs */
+ AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */
+ AM_RANGE(0x7d81, 0x7d81) AM_WRITE(dkongjr_snd_w2) /* Sound addrs */
+ AM_RANGE(0x7d82, 0x7d82) AM_WRITE(dkong_flipscreen_w)
+ AM_RANGE(0x7d83, 0x7d83) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */
+ AM_RANGE(0x7d84, 0x7d84) AM_WRITE(interrupt_enable_w)
+ AM_RANGE(0x7d85, 0x7d85) AM_WRITE(p8257_drq_w) /* P8257 ==> /DRQ0 /DRQ1 */
+ AM_RANGE(0x7d86, 0x7d87) AM_WRITE(dkong_palettebank_w)
+ AM_RANGE(0x8000, 0x9fff) AM_ROM /* bootleg DKjr only */
+ AM_RANGE(0xb000, 0xbfff) AM_ROM /* pestplce only */
+ AM_RANGE(0xd000, 0xdfff) AM_ROM /* DK3 bootleg only */
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( dkong3_map, ADDRESS_SPACE_PROGRAM, 8 )
+ AM_RANGE(0x0000, 0x5fff) AM_ROM
+ AM_RANGE(0x6000, 0x68ff) AM_RAM
+ AM_RANGE(0x6900, 0x6a7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite set 1 */
+ AM_RANGE(0x6a80, 0x6cff) AM_RAM /* 0x6b00: sprite set 2 */
+ AM_RANGE(0x6d00, 0x6fff) AM_RAM /* ???? */
+ AM_RANGE(0x7000, 0x73ff) AM_RAM /* Actual sprite ram location ... waiting for missing z80 dma */
+ AM_RANGE(0x7400, 0x77ff) AM_READWRITE(MRA8_RAM, dkong_videoram_w) AM_BASE(&videoram)
+ AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_w)
+ AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(soundlatch2_w)
+ AM_RANGE(0x7d00, 0x7d00) AM_READ_PORT("DSW0") AM_WRITE(soundlatch3_w)
+ AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW1") AM_WRITE(dkong3_2a03_reset_w)
+ AM_RANGE(0x7e80, 0x7e80) AM_WRITE(dkong3_coin_counter_w)
+ AM_RANGE(0x7e81, 0x7e81) AM_WRITE(dkong3_gfxbank_w)
+ AM_RANGE(0x7e82, 0x7e82) AM_WRITE(dkong_flipscreen_w)
+ AM_RANGE(0x7e83, 0x7e83) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */
+ AM_RANGE(0x7e84, 0x7e84) AM_WRITE(interrupt_enable_w)
+ AM_RANGE(0x7e85, 0x7e85) AM_NOP /* ==> DMA Chip */
+ AM_RANGE(0x7e86, 0x7e87) AM_WRITE(dkong_palettebank_w)
+ AM_RANGE(0x8000, 0x9fff) AM_ROM /* DK3 and bootleg DKjr only */
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( dkong3_io_map, ADDRESS_SPACE_IO, 8 )
+ ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
+ AM_RANGE(0x00, 0x00) AM_WRITE(MWA8_NOP) /* dma controller */
+ADDRESS_MAP_END
+
+/* Epos conversions */
+
static ADDRESS_MAP_START( epos_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
AM_RANGE(0x00, 0xff) AM_READ(epos_decrypt_rom) /* Switch protection logic */
ADDRESS_MAP_END
+/* S2650 conversions */
+
static ADDRESS_MAP_START( hunchbkd_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* 0x7000 */
@@ -750,57 +808,6 @@ static ADDRESS_MAP_START( shootgal_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_WRITE(hunchbkd_data_w)
ADDRESS_MAP_END
-static ADDRESS_MAP_START( dkong3_map, ADDRESS_SPACE_PROGRAM, 8 )
- AM_RANGE(0x0000, 0x5fff) AM_ROM
- AM_RANGE(0x6000, 0x68ff) AM_RAM
- AM_RANGE(0x6900, 0x6a7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite set 1 */
- AM_RANGE(0x6a80, 0x6cff) AM_RAM /* 0x6b00: sprite set 2 */
- AM_RANGE(0x6d00, 0x6fff) AM_RAM /* ???? */
- AM_RANGE(0x7000, 0x73ff) AM_RAM /* Actual sprite ram location ... waiting for missing z80 dma */
- AM_RANGE(0x7400, 0x77ff) AM_READWRITE(MRA8_RAM, dkong_videoram_w) AM_BASE(&videoram)
- AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_w)
- AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(soundlatch2_w)
- AM_RANGE(0x7d00, 0x7d00) AM_READ_PORT("DSW0") AM_WRITE(soundlatch3_w)
- AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW1") AM_WRITE(dkong3_2a03_reset_w)
- AM_RANGE(0x7e80, 0x7e80) AM_WRITE(dkong3_coin_counter_w)
- AM_RANGE(0x7e81, 0x7e81) AM_WRITE(dkong3_gfxbank_w)
- AM_RANGE(0x7e82, 0x7e82) AM_WRITE(dkong_flipscreen_w)
- AM_RANGE(0x7e83, 0x7e83) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */
- AM_RANGE(0x7e84, 0x7e84) AM_WRITE(interrupt_enable_w)
- AM_RANGE(0x7e85, 0x7e85) AM_NOP /* ==> DMA Chip */
- AM_RANGE(0x7e86, 0x7e87) AM_WRITE(dkong_palettebank_w)
- AM_RANGE(0x8000, 0x9fff) AM_ROM /* DK3 and bootleg DKjr only */
-ADDRESS_MAP_END
-
-static ADDRESS_MAP_START( dkong3_io_map, ADDRESS_SPACE_IO, 8 )
- ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
- AM_RANGE(0x00, 0x00) AM_WRITE(MWA8_NOP) /* dma controller */
-ADDRESS_MAP_END
-
-static ADDRESS_MAP_START( dkongjr_map, ADDRESS_SPACE_PROGRAM, 8 )
- AM_RANGE(0x0000, 0x5fff) AM_ROM
- AM_RANGE(0x6000, 0x6bff) AM_RAM
- AM_RANGE(0x6c00, 0x6fff) AM_RAM /* DK3 bootleg only */
- AM_RANGE(0x7000, 0x73ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite set 1 */
- AM_RANGE(0x7400, 0x77ff) AM_READWRITE(MRA8_RAM, dkong_videoram_w) AM_BASE(&videoram)
- AM_RANGE(0x7800, 0x780f) AM_READWRITE(dma8257_0_r, dma8257_0_w) /* P8257 control registers */
- AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_WRITE(dkongjr_sh_tuneselect_w)
- AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(dkongjr_gfxbank_w)
- AM_RANGE(0x7c81, 0x7c81) AM_WRITE(dkongjr_sh_test6_w)
- AM_RANGE(0x7d00, 0x7d00) AM_READ(dkong_in2_r) /* IN2 */
- AM_RANGE(0x7d00, 0x7d07) AM_WRITE(dkongjr_snd_w1) /* Sound addrs */
- AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */
- AM_RANGE(0x7d81, 0x7d81) AM_WRITE(dkongjr_snd_w2) /* Sound addrs */
- AM_RANGE(0x7d82, 0x7d82) AM_WRITE(dkong_flipscreen_w)
- AM_RANGE(0x7d83, 0x7d83) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */
- AM_RANGE(0x7d84, 0x7d84) AM_WRITE(interrupt_enable_w)
- AM_RANGE(0x7d85, 0x7d85) AM_WRITE(p8257_drq_w) /* P8257 ==> /DRQ0 /DRQ1 */
- AM_RANGE(0x7d86, 0x7d87) AM_WRITE(dkong_palettebank_w)
- AM_RANGE(0x8000, 0x9fff) AM_ROM /* bootleg DKjr only */
- AM_RANGE(0xb000, 0xbfff) AM_ROM /* pestplce only */
- AM_RANGE(0xd000, 0xdfff) AM_ROM /* DK3 bootleg only */
-ADDRESS_MAP_END
-
/*************************************
*
@@ -1024,7 +1031,7 @@ static INPUT_PORTS_START( dkong3b )
PORT_INCLUDE( dkong_in2 )
PORT_START_TAG("DSW0") /* DSW0 */
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) )
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!1,!2,!3")
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
@@ -1033,21 +1040,13 @@ static INPUT_PORTS_START( dkong3b )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x07, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:!4")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x08, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x80, DEF_STR( On ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x00, "SW2:!5" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW2:!6" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "SW2:!7" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "SW2:!8" )
INPUT_PORTS_END
static INPUT_PORTS_START( dkongjr )
@@ -1150,18 +1149,12 @@ static INPUT_PORTS_START( sbdk )
PORT_INCLUDE( dkong_dsw0 )
PORT_MODIFY("DSW0")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!1" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x01, DEF_STR( On ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x00, "SW2:!1" )
PORT_DIPNAME( 0x02, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION( "SW1:!2" )
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x02, "5" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!3" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!4" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x08, DEF_STR( On ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW2:!3" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW2:!4" )
PORT_START_TAG("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
@@ -1178,18 +1171,10 @@ static INPUT_PORTS_START( herbiedk )
PORT_INCLUDE( dkong_dsw0 )
PORT_MODIFY("DSW0")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!1" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x01, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!2" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x02, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!3" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION( "SW1:!4" )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x08, DEF_STR( On ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x00, "SW2:!1" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "SW2:!2" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW2:!3" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW2:!4" )
PORT_START_TAG("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )