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author Angelo Salese <angelosa@users.noreply.github.com>2013-08-28 19:30:38 +0000
committer Angelo Salese <angelosa@users.noreply.github.com>2013-08-28 19:30:38 +0000
commitb10071c1da013bc305ade65c9e06b8d81f98ff98 (patch)
tree8b26da1a541f446b551c5e02b35aa213b1330d41 /src/mess/drivers/dccons.c
parentc0ea7213c6848a9454765ea5283fc8195b991523 (diff)
PowerVR2: Added SPG control register, used to change pixel clock dynamically [Angelo Salese]
Diffstat (limited to 'src/mess/drivers/dccons.c')
-rw-r--r--src/mess/drivers/dccons.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mess/drivers/dccons.c b/src/mess/drivers/dccons.c
index 811c33772e7..9189592d858 100644
--- a/src/mess/drivers/dccons.c
+++ b/src/mess/drivers/dccons.c
@@ -306,7 +306,7 @@ READ64_MEMBER(dc_cons_state::dc_pdtra_r )
{
UINT64 out = PCTRA<<32;
- out |= PDTRA & ~0x0303;
+ out |= PDTRA & ~0x0103;
// if both bits are inputs
if (!(PCTRA & 0x5))
@@ -552,11 +552,9 @@ static INPUT_PORTS_START( dc )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_START("SCREEN_TYPE")
- PORT_CONFNAME( 0x03, 0x00, "Connection Type" )
- PORT_CONFSETTING( 0x00, "NTSC" )
- PORT_CONFSETTING( 0x01, "PAL" )
- PORT_CONFSETTING( 0x02, "VGA (0)" )
- PORT_CONFSETTING( 0x03, "VGA (1)" )
+ PORT_CONFNAME( 0x01, 0x00, "Screen Connection Type" )
+ PORT_CONFSETTING( 0x00, "VGA" )
+ PORT_CONFSETTING( 0x01, "Composite" )
INPUT_PORTS_END
MACHINE_RESET_MEMBER(dc_cons_state,dc_console)