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author Vas Crabb <vas@vastheman.com>2016-08-02 16:59:02 +1000
committer Vas Crabb <vas@vastheman.com>2016-08-02 16:59:02 +1000
commit889ecdfd4f633aa9a868f69f10ed4fb2a427238c (patch)
tree892e43cc128118b948ba0fba414303ea82d39ddf /src/mame
parenta26a40445beb13d0df877fa4e44093fb73c7703b (diff)
Let's give the new srcclean a spin...
Diffstat (limited to 'src/mame')
-rw-r--r--src/mame/audio/beezer.cpp2
-rw-r--r--src/mame/drivers/a7800.cpp2
-rw-r--r--src/mame/drivers/alto2.cpp2
-rw-r--r--src/mame/drivers/apexc.cpp4
-rw-r--r--src/mame/drivers/argox.cpp2
-rw-r--r--src/mame/drivers/bebox.cpp4
-rw-r--r--src/mame/drivers/bigevglf.cpp4
-rw-r--r--src/mame/drivers/mbc55x.cpp6
-rw-r--r--src/mame/drivers/megaphx.cpp2
-rw-r--r--src/mame/drivers/mpu4.cpp18
-rw-r--r--src/mame/drivers/pdp1.cpp6
-rw-r--r--src/mame/drivers/pokemini.cpp636
-rw-r--r--src/mame/drivers/ptcsol.cpp8
-rw-r--r--src/mame/drivers/rex6000.cpp2
-rw-r--r--src/mame/drivers/rmnimbus.cpp4
-rw-r--r--src/mame/drivers/sonson.cpp2
-rw-r--r--src/mame/drivers/tv950.cpp62
-rw-r--r--src/mame/drivers/tv990.cpp50
-rw-r--r--src/mame/drivers/tx0.cpp2
-rw-r--r--src/mame/drivers/zapcomputer.cpp2
-rw-r--r--src/mame/includes/cvs.h4
-rw-r--r--src/mame/machine/apollo.cpp2
-rw-r--r--src/mame/machine/konppc.cpp2
-rw-r--r--src/mame/machine/m20_kbd.cpp90
-rw-r--r--src/mame/machine/ngen_kb.cpp8
-rw-r--r--src/mame/machine/rmnimbus.cpp12
-rw-r--r--src/mame/machine/scramble.cpp2
-rw-r--r--src/mame/machine/seibucop/seibucop_cmd.hxx30
-rw-r--r--src/mame/machine/wswan.cpp308
-rw-r--r--src/mame/video/911_vdt.cpp2
-rw-r--r--src/mame/video/bbusters.cpp16
-rw-r--r--src/mame/video/dai.cpp40
-rw-r--r--src/mame/video/dynax.cpp2
-rw-r--r--src/mame/video/flkatck.cpp2
34 files changed, 670 insertions, 670 deletions
diff --git a/src/mame/audio/beezer.cpp b/src/mame/audio/beezer.cpp
index 3a295208073..fa2d49f0c56 100644
--- a/src/mame/audio/beezer.cpp
+++ b/src/mame/audio/beezer.cpp
@@ -84,7 +84,7 @@ beezer_sound_device::beezer_sound_device(const machine_config &mconfig, const ch
m_sh6840_noiselatch1(0),
m_sh6840_noiselatch3(0),
m_stream(nullptr)/*,
- m_freq_to_step(0)*/
+ m_freq_to_step(0)*/
{
memset(m_sh6840_timer, 0, sizeof(m_sh6840_timer));
m_sh6840_volume[0] = 0;
diff --git a/src/mame/drivers/a7800.cpp b/src/mame/drivers/a7800.cpp
index eda5f74ac07..0ebaaeee0a3 100644
--- a/src/mame/drivers/a7800.cpp
+++ b/src/mame/drivers/a7800.cpp
@@ -445,7 +445,7 @@ upon display type.
#define NTSC_ORANGE \
rgb_t(0x31,0x00,0x00), rgb_t(0x42,0x06,0x00), rgb_t(0x53,0x17,0x00), rgb_t(0x64,0x28,0x00), \
- rgb_t(0x75,0x39,0x00), rgb_t(0x86,0X4A,0x00), rgb_t(0x97,0x5B,0x0A), rgb_t(0xA8,0x6C,0x1B), \
+ rgb_t(0x75,0x39,0x00), rgb_t(0x86,0x4A,0x00), rgb_t(0x97,0x5B,0x0A), rgb_t(0xA8,0x6C,0x1B), \
rgb_t(0xB9,0x7D,0x2C), rgb_t(0xCA,0x8E,0x3D), rgb_t(0xDB,0x9F,0x4E), rgb_t(0xEC,0xB0,0x5F), \
rgb_t(0xFD,0xC1,0x70), rgb_t(0xFF,0xD2,0x85), rgb_t(0xFF,0xE3,0x9C), rgb_t(0xFF,0xF4,0xB2 )
diff --git a/src/mame/drivers/alto2.cpp b/src/mame/drivers/alto2.cpp
index 77ac8f9ca66..4b9e7542b65 100644
--- a/src/mame/drivers/alto2.cpp
+++ b/src/mame/drivers/alto2.cpp
@@ -158,7 +158,7 @@ static INPUT_PORTS_START( alto2 )
PORT_START("mousey") // Mouse - Y AXIS
PORT_BIT( 0xffff, 0x00, IPT_MOUSE_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(1) PORT_CHANGED_MEMBER( ":maincpu", alto2_cpu_device, mouse_motion_y, nullptr )
- PORT_START("utilout") // Speaker connected to UTILOUT
+ PORT_START("utilout") // Speaker connected to UTILOUT
PORT_BIT( 0xff, 0x00, IPT_PORT ) PORT_WRITE_LINE_DEVICE_MEMBER(":speaker", speaker_sound_device, level_w)
PORT_START("CONFIG") /* Memory switch on AIM board */
diff --git a/src/mame/drivers/apexc.cpp b/src/mame/drivers/apexc.cpp
index 4987c7343fc..1a7960380f9 100644
--- a/src/mame/drivers/apexc.cpp
+++ b/src/mame/drivers/apexc.cpp
@@ -23,8 +23,8 @@ public:
m_screen(*this, "screen") { }
UINT32 m_panel_data_reg; /* value of a data register on the control panel which can
- be edited - the existence of this register is a personnal
- guess */
+ be edited - the existence of this register is a personnal
+ guess */
std::unique_ptr<bitmap_ind16> m_bitmap;
diff --git a/src/mame/drivers/argox.cpp b/src/mame/drivers/argox.cpp
index aa52674a1f3..432eba83224 100644
--- a/src/mame/drivers/argox.cpp
+++ b/src/mame/drivers/argox.cpp
@@ -66,7 +66,7 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_START( os214, os214_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", H83002, XTAL_16MHz) /* X1 xtal value is correct,
- but there can be some clock divider perhaps ? */
+ but there can be some clock divider perhaps ? */
MCFG_CPU_PROGRAM_MAP(os214_prg_map)
MCFG_CPU_IO_MAP(os214_io_map)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/bebox.cpp b/src/mame/drivers/bebox.cpp
index b83e1fbe152..87440306b37 100644
--- a/src/mame/drivers/bebox.cpp
+++ b/src/mame/drivers/bebox.cpp
@@ -61,8 +61,8 @@ static ADDRESS_MAP_START( bebox_mem, AS_PROGRAM, 64, bebox_state )
//AM_RANGE(0x800042E8, 0x800042EF) AM_DEVWRITE8("cirrus", cirrus_device, cirrus_42E8_w, U64(0xffffffffffffffff) )
AM_RANGE(0xBFFFFFF0, 0xBFFFFFFF) AM_READ(bebox_interrupt_ack_r )
- AM_RANGE(0xC00A0000, 0XC00BFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_r, mem_w, U64(0xffffffffffffffff) )
- AM_RANGE(0xC1000000, 0XC11FFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_linear_r, mem_linear_w, U64(0xffffffffffffffff) )
+ AM_RANGE(0xC00A0000, 0xC00BFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_r, mem_w, U64(0xffffffffffffffff) )
+ AM_RANGE(0xC1000000, 0xC11FFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_linear_r, mem_linear_w, U64(0xffffffffffffffff) )
AM_RANGE(0xFFF00000, 0xFFF03FFF) AM_ROMBANK("bank2")
AM_RANGE(0xFFF04000, 0xFFFFFFFF) AM_READWRITE8(bebox_flash_r, bebox_flash_w, U64(0xffffffffffffffff) )
ADDRESS_MAP_END
diff --git a/src/mame/drivers/bigevglf.cpp b/src/mame/drivers/bigevglf.cpp
index a5b6fe662b6..57f3b50c088 100644
--- a/src/mame/drivers/bigevglf.cpp
+++ b/src/mame/drivers/bigevglf.cpp
@@ -490,8 +490,8 @@ static MACHINE_CONFIG_START( bigevglf, bigevglf_state )
MCFG_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz ? */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(bigevglf_state, irq0_line_hold, 2*60) /* IRQ generated by ???;
- 2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
- 4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
+ 2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
+ 4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
MCFG_CPU_ADD("mcu", M68705,2000000) /* ??? */
MCFG_CPU_PROGRAM_MAP(m68705_map)
diff --git a/src/mame/drivers/mbc55x.cpp b/src/mame/drivers/mbc55x.cpp
index 05b9c6a9d5d..36e7a614399 100644
--- a/src/mame/drivers/mbc55x.cpp
+++ b/src/mame/drivers/mbc55x.cpp
@@ -57,11 +57,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(mbc55x_io, AS_IO, 8, mbc55x_state)
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE( 0X0000, 0X0003) AM_READWRITE(mbcpic8259_r, mbcpic8259_w)
+ AM_RANGE( 0x0000, 0x0003) AM_READWRITE(mbcpic8259_r, mbcpic8259_w)
AM_RANGE( 0x0008, 0x000F) AM_READWRITE(mbc55x_disk_r, mbc55x_disk_w)
- AM_RANGE( 0X0010, 0X0010) AM_READWRITE( vram_page_r, vram_page_w)
+ AM_RANGE( 0x0010, 0x0010) AM_READWRITE( vram_page_r, vram_page_w)
AM_RANGE( 0x0018, 0x001F) AM_READWRITE( ppi8255_r, ppi8255_w)
- AM_RANGE( 0X0020, 0X0027) AM_READWRITE(mbcpit8253_r, mbcpit8253_w)
+ AM_RANGE( 0x0020, 0x0027) AM_READWRITE(mbcpit8253_r, mbcpit8253_w)
AM_RANGE( 0x0028, 0x002B) AM_READWRITE( mbc55x_usart_r, mbc55x_usart_w)
AM_RANGE( 0x0030, 0x0031) AM_DEVREADWRITE(VID_MC6845_NAME, mc6845_device, status_r, address_w )
AM_RANGE( 0x0032, 0x0033) AM_DEVREADWRITE(VID_MC6845_NAME, mc6845_device, register_r, register_w )
diff --git a/src/mame/drivers/megaphx.cpp b/src/mame/drivers/megaphx.cpp
index ce22404a4b6..6d52fc87404 100644
--- a/src/mame/drivers/megaphx.cpp
+++ b/src/mame/drivers/megaphx.cpp
@@ -314,7 +314,7 @@ WRITE8_MEMBER(megaphx_state::port_c_w)
if (m_pic_data == 0xfe) // get software version??
{
- m_pic_result = (ioport("PIC1")->read()) | (0XFF << 8);
+ m_pic_result = (ioport("PIC1")->read()) | (0xFF << 8);
}
else if (m_pic_data == 0x82) // dsw1
{
diff --git a/src/mame/drivers/mpu4.cpp b/src/mame/drivers/mpu4.cpp
index ea9465e7298..f21de53772b 100644
--- a/src/mame/drivers/mpu4.cpp
+++ b/src/mame/drivers/mpu4.cpp
@@ -531,7 +531,7 @@ WRITE8_MEMBER(mpu4_state::bankset_w)
WRITE8_MEMBER(mpu4_state::ic2_o1_callback)
{
m_6840ptm->set_c2(data); /* copy output value to IC2 c2
- this output is the clock for timer2 */
+ this output is the clock for timer2 */
/* 1200Hz System interrupt timer */
}
@@ -1022,14 +1022,14 @@ READ8_MEMBER(mpu4_state::pia_ic5_portb_r)
{
if (m_hopper == HOPPER_NONDUART_B)
{/*
- if (hopper1_active)
- {
- m_aux2_input |= 0x08;
- }
- else
- {
- m_aux2_input &= ~0x08;
- }*/
+ if (hopper1_active)
+ {
+ m_aux2_input |= 0x08;
+ }
+ else
+ {
+ m_aux2_input &= ~0x08;
+ }*/
}
LOG(("%s: IC5 PIA Read of Port B (coin input AUX2)\n",machine().describe_context()));
diff --git a/src/mame/drivers/pdp1.cpp b/src/mame/drivers/pdp1.cpp
index ab18705b760..97a642cdebd 100644
--- a/src/mame/drivers/pdp1.cpp
+++ b/src/mame/drivers/pdp1.cpp
@@ -452,7 +452,7 @@ enum
static pdp1_reset_param_t pdp1_reset_param =
{
{ /* external iot handlers. NULL means that the iot is unimplemented, unless there are
- parentheses around the iot name, in which case the iot is internal to the cpu core. */
+ parentheses around the iot name, in which case the iot is internal to the cpu core. */
/* I put a ? when the source is the handbook, since a) I have used the maintenance manual
as the primary source (as it goes more into details) b) the handbook and the maintenance
manual occasionnally contradict each other. */
@@ -1821,8 +1821,8 @@ INTERRUPT_GEN_MEMBER(pdp1_state::pdp1_interrupt)
{
m_maincpu->set_state_int(PDP1_RUN, (UINT64)0);
m_maincpu->set_state_int(PDP1_RIM, (UINT64)0); /* bug : we stop after reading an even-numbered word
- (i.e. data), whereas a real pdp-1 stops after reading
- an odd-numbered word (i.e. dio instruciton) */
+ (i.e. data), whereas a real pdp-1 stops after reading
+ an odd-numbered word (i.e. dio instruciton) */
}
if (control_transitions & pdp1_continue)
{
diff --git a/src/mame/drivers/pokemini.cpp b/src/mame/drivers/pokemini.cpp
index 86d971a34a8..baa96878702 100644
--- a/src/mame/drivers/pokemini.cpp
+++ b/src/mame/drivers/pokemini.cpp
@@ -527,22 +527,22 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
switch( offset )
{
case 0x00: /* start-up contrast
- Bit 0-1 R/W Must be 1(?)
- Bit 2-7 R/W Start up contrast (doesn't affect contrast until after reboot)
- */
+ Bit 0-1 R/W Must be 1(?)
+ Bit 2-7 R/W Start up contrast (doesn't affect contrast until after reboot)
+ */
case 0x01: /* CPU related?
- Bit 0-7 R/W Unknown
- */
+ Bit 0-7 R/W Unknown
+ */
case 0x02: /* CPU related?
- Bit 0-7 R/W Unknown
- */
+ Bit 0-7 R/W Unknown
+ */
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x08: /* Seconds-timer control
- Bit 0 R/W Timer enable
- Bit 1 W Timer reset
- Bit 2-7 Unused
- */
+ Bit 0 R/W Timer enable
+ Bit 1 W Timer reset
+ Bit 2-7 Unused
+ */
if ( data & 0x02 )
{
m_pm_reg[0x09] = 0x00;
@@ -552,38 +552,38 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x09: /* Seconds-timer (low), read only
- Bit 0-7 R Seconds timer bit 0-7
- */
+ Bit 0-7 R Seconds timer bit 0-7
+ */
return;
case 0x0A: /* Seconds-timer (mid), read only
- Bit 0-7 R Seconds timer bit 8-15
- */
+ Bit 0-7 R Seconds timer bit 8-15
+ */
return;
case 0x0B: /* Seconds-timer (high), read only
- Bit 0-7 R Seconds timer bit 16-23
- */
+ Bit 0-7 R Seconds timer bit 16-23
+ */
return;
case 0x10: /* Low power detector
- Bit 0-4 R/W Unknown
- Bit 5 R Battery status: 0 - battery OK, 1 - battery low
- Bit 6-7 Unused
- */
+ Bit 0-4 R/W Unknown
+ Bit 5 R Battery status: 0 - battery OK, 1 - battery low
+ Bit 6-7 Unused
+ */
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x18: /* Timer 1 pre-scale + enable
- Bit 0-2 R/W low timer 1 prescaler select
- 000 - 2 or 128 cycles
- 001 - 8 or 256 cycles
- 010 - 32 or 512 cycles
- 011 - 64 or 1024 cycles
- 100 - 128 or 2048 cycles
- 101 - 256 or 4096 cycles
- 110 - 1024 or 8192 cycles
- 111 - 4096 or 16384 cycles
- Bit 3 R/W Enable low counting
- Bit 4-6 R/W high timer 1 prescaler select
- Bit 7 R/W Enable high counting
- */
+ Bit 0-2 R/W low timer 1 prescaler select
+ 000 - 2 or 128 cycles
+ 001 - 8 or 256 cycles
+ 010 - 32 or 512 cycles
+ 011 - 64 or 1024 cycles
+ 100 - 128 or 2048 cycles
+ 101 - 256 or 4096 cycles
+ 110 - 1024 or 8192 cycles
+ 111 - 4096 or 16384 cycles
+ Bit 3 R/W Enable low counting
+ Bit 4-6 R/W high timer 1 prescaler select
+ Bit 7 R/W Enable high counting
+ */
/* Check for prescaler change for the low counter */
if ( ( data & 0x07 ) != ( m_pm_reg[0x18] & 0x07 ) )
{
@@ -627,13 +627,13 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x19: /* Timers 1 speed
- Bit 0 R/W Select slow timer for timer 1 lo
- Bit 1 R/W Select slow timer for timer 1 hi
- Bit 2-3 Unused
- Bit 4 R/W Enable slow timers
- Bit 5 R/W Enable fast timers
- Bit 6-7 Unused
- */
+ Bit 0 R/W Select slow timer for timer 1 lo
+ Bit 1 R/W Select slow timer for timer 1 hi
+ Bit 2-3 Unused
+ Bit 4 R/W Enable slow timers
+ Bit 5 R/W Enable fast timers
+ Bit 6-7 Unused
+ */
/* Check for prescaler change for the high counter */
if ( ( data & 0x01 ) != ( m_pm_reg[0x19] & 0x01 ) )
{
@@ -700,19 +700,19 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1A: /* Timer 2 pre-scale + enable
- Bit 0-2 R/W low timer 2 prescaler select
- 000 - 2 or 128 cycles
- 001 - 8 or 256 cycles
- 010 - 32 or 512 cycles
- 011 - 64 or 1024 cycles
- 100 - 128 or 2048 cycles
- 101 - 256 or 4096 cycles
- 110 - 1024 or 8192 cycles
- 111 - 4096 or 16384 cycles
- Bit 3 R/W Enable low counting
- Bit 4-6 R/W high timer 2 prescaler select
- Bit 7 R/W Enable high counting
- */
+ Bit 0-2 R/W low timer 2 prescaler select
+ 000 - 2 or 128 cycles
+ 001 - 8 or 256 cycles
+ 010 - 32 or 512 cycles
+ 011 - 64 or 1024 cycles
+ 100 - 128 or 2048 cycles
+ 101 - 256 or 4096 cycles
+ 110 - 1024 or 8192 cycles
+ 111 - 4096 or 16384 cycles
+ Bit 3 R/W Enable low counting
+ Bit 4-6 R/W high timer 2 prescaler select
+ Bit 7 R/W Enable high counting
+ */
/* Check for prescaler change for the low counter */
if ( ( data & 0x07 ) != ( m_pm_reg[0x1A] & 0x07 ) )
{
@@ -756,9 +756,9 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1B: /* Timer 2 speeds
- Bit 0 R/W Select slow timer for timer 2 lo
- Bit 1 R/W Select slow timer for timer 2 hi
- */
+ Bit 0 R/W Select slow timer for timer 2 lo
+ Bit 1 R/W Select slow timer for timer 2 hi
+ */
/* Check for prescaler change for the high counter */
if ( ( data & 0x01 ) != ( m_pm_reg[0x1B] & 0x01 ) )
{
@@ -800,19 +800,19 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1C: /* Timer 3 pre-scale + enable
- Bit 0-2 R/W low timer 3 prescaler select
- 000 - 2 or 128 cycles
- 001 - 8 or 256 cycles
- 010 - 32 or 512 cycles
- 011 - 64 or 1024 cycles
- 100 - 128 or 2048 cycles
- 101 - 256 or 4096 cycles
- 110 - 1024 or 8192 cycles
- 111 - 4096 or 16384 cycles
- Bit 3 R/W Enable low counting
- Bit 4-6 R/W high timer 3 prescaler select
- Bit 7 R/W Enable high counting
- */
+ Bit 0-2 R/W low timer 3 prescaler select
+ 000 - 2 or 128 cycles
+ 001 - 8 or 256 cycles
+ 010 - 32 or 512 cycles
+ 011 - 64 or 1024 cycles
+ 100 - 128 or 2048 cycles
+ 101 - 256 or 4096 cycles
+ 110 - 1024 or 8192 cycles
+ 111 - 4096 or 16384 cycles
+ Bit 3 R/W Enable low counting
+ Bit 4-6 R/W high timer 3 prescaler select
+ Bit 7 R/W Enable high counting
+ */
/* Check for prescaler change for the low counter */
if ( ( data & 0x07 ) != ( m_pm_reg[0x1C] & 0x07 ) )
{
@@ -856,9 +856,9 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1D: /* Timer 3 speeds
- Bit 0 R/W Select slow timer for timer 3 lo
- Bit 1 R/W Select slow timer for timer 3 hi
- */
+ Bit 0 R/W Select slow timer for timer 3 lo
+ Bit 1 R/W Select slow timer for timer 3 hi
+ */
/* Check for prescaler change for the high counter */
if ( ( data & 0x01 ) != ( m_pm_reg[0x1D] & 0x01 ) )
{
@@ -900,125 +900,125 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x20: /* Event #1-#8 priority
- Bit 0-1 R/W Timer 3 overflow Interrupt #7-#8
- Bit 2-3 R/W Timer 1 overflow Interrupt #5-#6
- Bit 4-5 R/W Timer 2 overflow Interrupt #3-#4
- Bit 6-7 R/W VDraw/VBlank trigger Interrupt #1-#2
- */
+ Bit 0-1 R/W Timer 3 overflow Interrupt #7-#8
+ Bit 2-3 R/W Timer 1 overflow Interrupt #5-#6
+ Bit 4-5 R/W Timer 2 overflow Interrupt #3-#4
+ Bit 6-7 R/W VDraw/VBlank trigger Interrupt #1-#2
+ */
m_pm_reg[0x20] = data;
check_irqs();
break;
case 0x21: /* Event #15-#22 priority
- Bit 0-1 R/W Unknown
- Bit 2-3 R/W All keypad interrupts - Interrupt #15-#22
- Bit 4-7 R/W Unknown
- */
+ Bit 0-1 R/W Unknown
+ Bit 2-3 R/W All keypad interrupts - Interrupt #15-#22
+ Bit 4-7 R/W Unknown
+ */
m_pm_reg[0x21] = data;
check_irqs();
break;
case 0x22: /* Event #9-#14 priority
- Bit 0-1 R/W All #9 - #14 events - Interrupt #9-#14
- Bit 2-7 Unused
- */
+ Bit 0-1 R/W All #9 - #14 events - Interrupt #9-#14
+ Bit 2-7 Unused
+ */
m_pm_reg[0x22] = data;
check_irqs();
break;
case 0x23: /* Event #1-#8 enable
- Bit 0 R/W Timer 3 overflow (mirror) - Enable Interrupt #8
- Bit 1 R/W Timer 3 overflow - Enable Interrupt #7
- Bit 2 R/W Not called... - Enable Interrupt #6
- Bit 3 R/W Timer 1 overflow - Enable Interrupt #5
- Bit 4 R/W Not called... - Enable Interrupt #4
- Bit 5 R/W Timer 2 overflow - Enable Interrupt #3
- Bit 6 R/W V-Draw trigger - Enable Interrupt #2
- Bit 7 R/W V-Blank trigger - Enable Interrupt #1
- */
+ Bit 0 R/W Timer 3 overflow (mirror) - Enable Interrupt #8
+ Bit 1 R/W Timer 3 overflow - Enable Interrupt #7
+ Bit 2 R/W Not called... - Enable Interrupt #6
+ Bit 3 R/W Timer 1 overflow - Enable Interrupt #5
+ Bit 4 R/W Not called... - Enable Interrupt #4
+ Bit 5 R/W Timer 2 overflow - Enable Interrupt #3
+ Bit 6 R/W V-Draw trigger - Enable Interrupt #2
+ Bit 7 R/W V-Blank trigger - Enable Interrupt #1
+ */
m_pm_reg[0x23] = data;
check_irqs();
break;
case 0x24: /* Event #9-#12 enable
- Bit 0-5 R/W Unknown
- Bit 6-7 Unused
- */
+ Bit 0-5 R/W Unknown
+ Bit 6-7 Unused
+ */
m_pm_reg[0x24] = data;
check_irqs();
break;
case 0x25: /* Event #15-#22 enable
- Bit 0 R/W Press key "A" event - Enable interrupt #22
- Bit 1 R/W Press key "B" event - Enable interrupt #21
- Bit 2 R/W Press key "C" event - Enable interrupt #20
- Bit 3 R/W Press D-pad up key event - Enable interrupt #19
- Bit 4 R/W Press D-pad down key event - Enable interrupt #18
- Bit 5 R/W Press D-pad left key event - Enable interrupt #17
- Bit 6 R/W Press D-pad right key event - Enable interrupt #16
- Bit 7 R/W Press power button event - Enable interrupt #15
- */
+ Bit 0 R/W Press key "A" event - Enable interrupt #22
+ Bit 1 R/W Press key "B" event - Enable interrupt #21
+ Bit 2 R/W Press key "C" event - Enable interrupt #20
+ Bit 3 R/W Press D-pad up key event - Enable interrupt #19
+ Bit 4 R/W Press D-pad down key event - Enable interrupt #18
+ Bit 5 R/W Press D-pad left key event - Enable interrupt #17
+ Bit 6 R/W Press D-pad right key event - Enable interrupt #16
+ Bit 7 R/W Press power button event - Enable interrupt #15
+ */
m_pm_reg[0x25] = data;
check_irqs();
break;
case 0x26: /* Event #13-#14 enable
- Bit 0-2 R/W Unknown
- Bit 3 Unused
- Bit 4-5 R/W Unknown
- Bit 6 R/W Shock detector trigger - Enable interrupt #14
- Bit 7 R/W IR receiver - low to high trigger - Enable interrupt #13
- */
+ Bit 0-2 R/W Unknown
+ Bit 3 Unused
+ Bit 4-5 R/W Unknown
+ Bit 6 R/W Shock detector trigger - Enable interrupt #14
+ Bit 7 R/W IR receiver - low to high trigger - Enable interrupt #13
+ */
m_pm_reg[0x26] = data;
check_irqs();
break;
case 0x27: /* Interrupt active flag #1-#8
- Bit 0 Timer 3 overflow (mirror) / Clear interrupt #8
- Bit 1 Timer 3 overflow / Clear interrupt #7
- Bit 2 Not called ... / Clear interrupt #6
- Bit 3 Timer 1 overflow / Clear interrupt #5
- Bit 4 Not called ... / Clear interrupt #4
- Bit 5 Timer 2 overflow / Clear interrupt #3
- Bit 6 VDraw trigger / Clear interrupt #2
- Bit 7 VBlank trigger / Clear interrupt #1
- */
+ Bit 0 Timer 3 overflow (mirror) / Clear interrupt #8
+ Bit 1 Timer 3 overflow / Clear interrupt #7
+ Bit 2 Not called ... / Clear interrupt #6
+ Bit 3 Timer 1 overflow / Clear interrupt #5
+ Bit 4 Not called ... / Clear interrupt #4
+ Bit 5 Timer 2 overflow / Clear interrupt #3
+ Bit 6 VDraw trigger / Clear interrupt #2
+ Bit 7 VBlank trigger / Clear interrupt #1
+ */
m_pm_reg[0x27] &= ~data;
check_irqs();
return;
case 0x28: /* Interrupt active flag #9-#12
- Bit 0-1 Unknown
- Bit 2 Unknown / Clear interrupt #12
- Bit 3 Unknown / Clear interrupt #11
- Bit 4 Unknown / Clear interrupt #10
- Bit 5 Unknown / Clear interrupt #9
- Bit 6-7 Unknown
- */
+ Bit 0-1 Unknown
+ Bit 2 Unknown / Clear interrupt #12
+ Bit 3 Unknown / Clear interrupt #11
+ Bit 4 Unknown / Clear interrupt #10
+ Bit 5 Unknown / Clear interrupt #9
+ Bit 6-7 Unknown
+ */
m_pm_reg[0x28] &= ~data;
check_irqs();
return;
case 0x29: /* Interrupt active flag #15-#22
- Bit 0 Press key "A" event / Clear interrupt #22
- Bit 1 Press key "B" event / Clear interrupt #21
- Bit 2 Press key "C" event / Clear interrupt #20
- Bit 3 Press D-pad up key event / Clear interrupt #19
- Bit 4 Press D-pad down key event / Clear interrupt #18
- Bit 5 Press D-pad left key event / Clear interrupt #17
- Bit 6 Press D-pad right key event / Clear interrupt #16
- Bit 7 Press power button event / Clear interrupt #15
- */
+ Bit 0 Press key "A" event / Clear interrupt #22
+ Bit 1 Press key "B" event / Clear interrupt #21
+ Bit 2 Press key "C" event / Clear interrupt #20
+ Bit 3 Press D-pad up key event / Clear interrupt #19
+ Bit 4 Press D-pad down key event / Clear interrupt #18
+ Bit 5 Press D-pad left key event / Clear interrupt #17
+ Bit 6 Press D-pad right key event / Clear interrupt #16
+ Bit 7 Press power button event / Clear interrupt #15
+ */
m_pm_reg[0x29] &= ~data;
check_irqs();
return;
case 0x2A: /* Interrupt active flag #13-#14
- Bit 0-5 Unknown
- Bit 6 Shock detector trigger / Clear interrupt #14
- Bit 7 Unknown / Clear interrupt #13
- */
+ Bit 0-5 Unknown
+ Bit 6 Shock detector trigger / Clear interrupt #14
+ Bit 7 Unknown / Clear interrupt #13
+ */
m_pm_reg[0x2A] &= ~data;
check_irqs();
return;
case 0x30: /* Timer 1 control 1
- Bit 0 R/W Unknown
- Bit 1 W Reset low counter
- Bit 2 R/W Enable high counter
- Bit 3 R/W Unknown
- Bit 4-6 Unused
- Bit 7 R/W Enable 16bit mode
- */
+ Bit 0 R/W Unknown
+ Bit 1 W Reset low counter
+ Bit 2 R/W Enable high counter
+ Bit 3 R/W Unknown
+ Bit 4-6 Unused
+ Bit 7 R/W Enable 16bit mode
+ */
if ( data & 0x02 )
{
m_pm_reg[0x36] = m_pm_reg[0x32];
@@ -1048,12 +1048,12 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x31: /* Timer 1 control 2
- Bit 0 R/W Unknown
- Bit 1 W Reset hi counter
- Bit 2 R/W Enable high counter
- Bit 3 R/W Unknown
- Bit 4-7 Unused
- */
+ Bit 0 R/W Unknown
+ Bit 1 W Reset hi counter
+ Bit 2 R/W Enable high counter
+ Bit 3 R/W Unknown
+ Bit 4-7 Unused
+ */
if ( data & 0x02 )
{
m_pm_reg[0x37] = m_pm_reg[0x33];
@@ -1072,33 +1072,33 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x32: /* Timer 1 preset value (low)
- Bit 0-7 R/W Timer 1 preset value bit 0-7
- */
+ Bit 0-7 R/W Timer 1 preset value bit 0-7
+ */
break;
case 0x33: /* Timer 1 preset value (high)
- Bit 0-7 R/W Timer 1 preset value bit 8-15
- */
+ Bit 0-7 R/W Timer 1 preset value bit 8-15
+ */
break;
case 0x34: /* Timer 1 sound-pivot (low, unused)
- */
+ */
case 0x35: /* Timer 1 sound-pivot (high, unused)
- */
+ */
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x36: /* Timer 1 counter (low), read only
- */
+ */
return;
case 0x37: /* Timer 1 counter (high), read only
- */
+ */
return;
case 0x38: /* Timer 2 control 1
- Bit 0 R/W Unknown
- Bit 1 W Reset low counter
- Bit 2 R/W Enable high counter
- Bit 3 R/W Unknown
- Bit 4-6 Unused
- Bit 7 R/W Enable 16bit mode
- */
+ Bit 0 R/W Unknown
+ Bit 1 W Reset low counter
+ Bit 2 R/W Enable high counter
+ Bit 3 R/W Unknown
+ Bit 4-6 Unused
+ Bit 7 R/W Enable 16bit mode
+ */
if ( data & 0x02 )
{
m_pm_reg[0x3E] = m_pm_reg[0x3A];
@@ -1127,12 +1127,12 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x39: /* Timer 2 control 2
- Bit 0 R/W Unknown
- Bit 1 W Reset hi counter
- Bit 2 R/W Enable high counter
- Bit 3 R/W Unknown
- Bit 4-7 Unused
- */
+ Bit 0 R/W Unknown
+ Bit 1 W Reset hi counter
+ Bit 2 R/W Enable high counter
+ Bit 3 R/W Unknown
+ Bit 4-7 Unused
+ */
if ( data & 0x02 )
{
m_pm_reg[0x3F] = m_pm_reg[0x3A];
@@ -1151,32 +1151,32 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x3A: /* Timer 2 preset value (low)
- Bit 0-7 R/W Timer 2 preset value bit 0-7
- */
+ Bit 0-7 R/W Timer 2 preset value bit 0-7
+ */
break;
case 0x3B: /* Timer 2 preset value (high)
- Bit 0-7 R/W Timer 2 preset value bit 8-15
- */
+ Bit 0-7 R/W Timer 2 preset value bit 8-15
+ */
break;
case 0x3C: /* Timer 2 sound-pivot (low, unused)
- */
+ */
case 0x3D: /* Timer 2 sound-pivot (high, unused)
- */
+ */
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x3E: /* Timer 2 counter (low), read only
- Bit 0-7 R/W Timer 2 counter value bit 0-7
- */
+ Bit 0-7 R/W Timer 2 counter value bit 0-7
+ */
return;
case 0x3F: /* Timer 2 counter (high), read only
- Bit 0-7 R/W Timer 2 counter value bit 8-15
- */
+ Bit 0-7 R/W Timer 2 counter value bit 8-15
+ */
return;
case 0x40: /* 256Hz timer control
- Bit 0 R/W Enable Timer
- Bit 1 W Reset Timer
- Bit 2-7 Unused
- */
+ Bit 0 R/W Enable Timer
+ Bit 1 W Reset Timer
+ Bit 2-7 Unused
+ */
if ( data & 0x02 )
{
m_pm_reg[0x41] = 0;
@@ -1184,17 +1184,17 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x41: /* 256Hz timer counter
- Bit 0-7 R 256Hz timer counter
- */
+ Bit 0-7 R 256Hz timer counter
+ */
return;
case 0x48: /* Timer 3 control 1
- Bit 0 R/W Unknown
- Bit 1 W Reset low counter
- Bit 2 R/W Enable high counter
- Bit 3 R/W Unknown
- Bit 4-6 Unused
- Bit 7 R/W Enable 16bit mode
- */
+ Bit 0 R/W Unknown
+ Bit 1 W Reset low counter
+ Bit 2 R/W Enable high counter
+ Bit 3 R/W Unknown
+ Bit 4-6 Unused
+ Bit 7 R/W Enable 16bit mode
+ */
if ( data & 0x02 )
{
m_pm_reg[0x4E] = m_pm_reg[0x4A];
@@ -1225,12 +1225,12 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
update_sound();
break;
case 0x49: /* Timer 3 control 2
- Bit 0 R/W Unknown
- Bit 1 W Reset hi counter
- Bit 2 R/W Enable high counter
- Bit 3 R/W Unknown
- Bit 4-7 Unused
- */
+ Bit 0 R/W Unknown
+ Bit 1 W Reset hi counter
+ Bit 2 R/W Enable high counter
+ Bit 3 R/W Unknown
+ Bit 4-7 Unused
+ */
if ( data & 0x02 )
{
m_pm_reg[0x4F] = m_pm_reg[0x4B];
@@ -1251,74 +1251,74 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
update_sound();
break;
case 0x4A: /* Timer 3 preset value (low)
- Bit 0-7 R/W Timer 3 preset value bit 0-7
- */
+ Bit 0-7 R/W Timer 3 preset value bit 0-7
+ */
m_pm_reg[0x4A] = data;
update_sound();
break;
case 0x4B: /* Timer 3 preset value (high)
- Bit 0-7 R/W Timer 3 preset value bit 8-15
- */
+ Bit 0-7 R/W Timer 3 preset value bit 8-15
+ */
m_pm_reg[0x4B] = data;
update_sound();
break;
case 0x4C: /* Timer 3 sound-pivot (low)
- Bit 0-7 R/W Timer 3 sound-pivot value bit 0-7
- */
+ Bit 0-7 R/W Timer 3 sound-pivot value bit 0-7
+ */
m_pm_reg[0x4C] = data;
update_sound();
break;
case 0x4D: /* Timer 3 sound-pivot (high)
- Bit 0-7 R/W Timer 3 sound-pivot value bit 8-15
+ Bit 0-7 R/W Timer 3 sound-pivot value bit 8-15
- Sound-pivot location:
- Pulse-Width of 0% = 0x0000
- Pulse-Width of 50% = Half of preset-value
- Pulse-Width of 100% = Same as preset-value
- */
+ Sound-pivot location:
+ Pulse-Width of 0% = 0x0000
+ Pulse-Width of 50% = Half of preset-value
+ Pulse-Width of 100% = Same as preset-value
+ */
m_pm_reg[0x4D] = data;
update_sound();
break;
case 0x4E: /* Timer 3 counter (low), read only
- Bit 0-7 R/W Timer 3 counter value bit 0-7
- */
+ Bit 0-7 R/W Timer 3 counter value bit 0-7
+ */
return;
case 0x4F: /* Timer 3 counter (high), read only
- Bit 0-7 R/W Timer 3 counter value bit 8-15
- */
+ Bit 0-7 R/W Timer 3 counter value bit 8-15
+ */
return;
case 0x52: /* Keypad status
- Bit 0 R Key "A"
- Bit 1 R Key "B"
- Bit 2 R Key "C"
- Bit 3 R D-pad up
- Bit 4 R D-pad down
- Bit 5 R D-pad left
- Bit 6 R D-pad right
- Bit 7 R Power button
- */
+ Bit 0 R Key "A"
+ Bit 1 R Key "B"
+ Bit 2 R Key "C"
+ Bit 3 R D-pad up
+ Bit 4 R D-pad down
+ Bit 5 R D-pad left
+ Bit 6 R D-pad right
+ Bit 7 R Power button
+ */
return;
case 0x60: /* I/O peripheral circuit select
- Bit 0 R/W Unknown
- bit 1 R/W IR receive / transmit
- Bit 2 R/W EEPROM / RTC data
- Bit 3 R/W EEPROM / RTC clock
- Bit 4 R/W Rumble controller
- Bit 5 R/W IR enable/disable
- Bit 6 R/W Unknown
- Bit 7 R/W Unknown
- */
+ Bit 0 R/W Unknown
+ bit 1 R/W IR receive / transmit
+ Bit 2 R/W EEPROM / RTC data
+ Bit 3 R/W EEPROM / RTC clock
+ Bit 4 R/W Rumble controller
+ Bit 5 R/W IR enable/disable
+ Bit 6 R/W Unknown
+ Bit 7 R/W Unknown
+ */
break;
case 0x61: /* I/O peripheral status control
- Bit 0 R/W IR received bit (if device not selected: 0)
- Bit 1 R/W IR transmit (if device not selected: 0)
- Bit 2 R/W EEPROM / RTC data (if device not selected: 1)
- Bit 3 R/W EEPROM / RTC clock (if device not selected: 0)
- Bit 4 R/W Rumble on/off (if device not selected: 0)
- Bit 5 R/W IR disable (receive & transmit) (if device not selected: 1)
- Bit 6 Always 1
- Bit 7 R/W IR received bit (mirror, if device not selected: 0)
- */
+ Bit 0 R/W IR received bit (if device not selected: 0)
+ Bit 1 R/W IR transmit (if device not selected: 0)
+ Bit 2 R/W EEPROM / RTC data (if device not selected: 1)
+ Bit 3 R/W EEPROM / RTC clock (if device not selected: 0)
+ Bit 4 R/W Rumble on/off (if device not selected: 0)
+ Bit 5 R/W IR disable (receive & transmit) (if device not selected: 1)
+ Bit 6 Always 1
+ Bit 7 R/W IR received bit (mirror, if device not selected: 0)
+ */
if ( m_pm_reg[0x60] & 0x04 )
m_i2cmem->write_sda( ( data & 0x04 ) ? 1 : 0 );
@@ -1330,29 +1330,29 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
update_sound();
break;
case 0x71: /* Sound volume
- Bit 0-1 R/W Sound volume
- 00 - 0%
- 01 - 50%
- 10 - 50%
- 11 - 100%
- Bit 2 R/W Always set to 0
- Bit 3-7 Unused
- */
+ Bit 0-1 R/W Sound volume
+ 00 - 0%
+ 01 - 50%
+ 10 - 50%
+ 11 - 100%
+ Bit 2 R/W Always set to 0
+ Bit 3-7 Unused
+ */
m_pm_reg[0x71] = data;
update_sound();
break;
case 0x80: /* LCD control
- Bit 0 R/W Invert colors; 0 - normal, 1 - inverted
- Bit 1 R/W Enable rendering of background
- Bit 2 R/W Enable rendering of sprites
- Bit 3 R/W Enable copy to LCD ram
- Bit 4-5 R/W Map size
- 00 - 12x16
- 01 - 16x12
- 10 - 24x8
- 11 - 24x8 (prohibited code)
- Bit 6-7 Unused
- */
+ Bit 0 R/W Invert colors; 0 - normal, 1 - inverted
+ Bit 1 R/W Enable rendering of background
+ Bit 2 R/W Enable rendering of sprites
+ Bit 3 R/W Enable copy to LCD ram
+ Bit 4-5 R/W Map size
+ 00 - 12x16
+ 01 - 16x12
+ 10 - 24x8
+ 11 - 24x8 (prohibited code)
+ Bit 6-7 Unused
+ */
m_prc.colors_inverted = ( data & 0x01 ) ? 1 : 0;
m_prc.background_enabled = ( data & 0x02 ) ? 1 : 0;
m_prc.sprites_enabled = ( data & 0x04 ) ? 1 : 0;
@@ -1370,18 +1370,18 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x81: /* LCD render refresh rate
- Bit 0 R/W Unknown
- Bit 1-3 R/W LCD refresh rate divider
- 000 - 60Hz / 3 = 20Hz (0 - 2)
- 001 - 60Hz / 6 = 10Hz (0 - 5)
- 010 - 60Hz / 9 = 6,6Hz (0 - 8)
- 011 - 60Hz / 12 = 5Hz (0 - B)
- 100 - 60Hz / 2 = 30Hz (0 - 1)
- 101 - 60Hz / 4 = 15Hz (0 - 3)
- 110 - 60Hz / 6 = 10Hz (0 - 5)
- 111 - 60Hz / 8 = 7,5Hz (0 - 7)
- Bit 4-7 R Divider position, when overflow the LCD is updated
- */
+ Bit 0 R/W Unknown
+ Bit 1-3 R/W LCD refresh rate divider
+ 000 - 60Hz / 3 = 20Hz (0 - 2)
+ 001 - 60Hz / 6 = 10Hz (0 - 5)
+ 010 - 60Hz / 9 = 6,6Hz (0 - 8)
+ 011 - 60Hz / 12 = 5Hz (0 - B)
+ 100 - 60Hz / 2 = 30Hz (0 - 1)
+ 101 - 60Hz / 4 = 15Hz (0 - 3)
+ 110 - 60Hz / 6 = 10Hz (0 - 5)
+ 111 - 60Hz / 8 = 7,5Hz (0 - 7)
+ Bit 4-7 R Divider position, when overflow the LCD is updated
+ */
switch ( data & 0x0E )
{
case 0x00: m_prc.max_frame_count = 3; break;
@@ -1395,76 +1395,76 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x82: /* BG tile data memory offset (low)
- Bit 0-2 Always "0"
- Bit 3-7 R/W BG tile data memory offset bit 3-7
- */
+ Bit 0-2 Always "0"
+ Bit 3-7 R/W BG tile data memory offset bit 3-7
+ */
data &= 0xF8;
m_prc.bg_tiles = ( m_prc.bg_tiles & 0xFFFF00 ) | data;
break;
case 0x83: /* BG tile data memory offset (mid)
- Bit 0-7 R/W BG tile data memory offset bit 8-15
- */
+ Bit 0-7 R/W BG tile data memory offset bit 8-15
+ */
m_prc.bg_tiles = ( m_prc.bg_tiles & 0xFF00FF ) | ( data << 8 );
break;
case 0x84: /* BG tile data memory offset (high)
- Bit 0-4 R/W BG tile data memory offset bit 16-20
- Bit 5-7 Unused
- */
+ Bit 0-4 R/W BG tile data memory offset bit 16-20
+ Bit 5-7 Unused
+ */
data &= 0x1F;
m_prc.bg_tiles = ( m_prc.bg_tiles & 0x00FFFF ) | ( data << 16 );
break;
case 0x85: /* BG vertical move
- Bit 0-6 R/W Move the background up, move range:
- Map size 0: 0x00 to 0x40
- Map size 1: 0x00 to 0x20
- Map size 2: move ignored
- Bit 7 Unused
- */
+ Bit 0-6 R/W Move the background up, move range:
+ Map size 0: 0x00 to 0x40
+ Map size 1: 0x00 to 0x20
+ Map size 2: move ignored
+ Bit 7 Unused
+ */
case 0x86: /* BG horizontal move
- Bit 0-6 R/W Move the background left, move range:
- Map size 0: move ignored
- Map size 1: 0x00 to 0x20
- Map size 2: 0x00 to 0x60
- Bit 7 Unused
- */
+ Bit 0-6 R/W Move the background left, move range:
+ Map size 0: move ignored
+ Map size 1: 0x00 to 0x20
+ Map size 2: 0x00 to 0x60
+ Bit 7 Unused
+ */
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x87: /* Sprite tile data memory offset (low)
- Bit 0-5 Always "0"
- Bit 6-7 R/W Sprite tile data memory offset bit 6-7
- */
+ Bit 0-5 Always "0"
+ Bit 6-7 R/W Sprite tile data memory offset bit 6-7
+ */
data &= 0xC0;
m_prc.spr_tiles = ( m_prc.spr_tiles & 0xFFFF00 ) | data;
break;
case 0x88: /* Sprite tile data memory offset (med)
- Bit 0-7 R/W Sprite tile data memory offset bit 8-15
- */
+ Bit 0-7 R/W Sprite tile data memory offset bit 8-15
+ */
m_prc.spr_tiles = ( m_prc.spr_tiles & 0xFF00FF ) | ( data << 8 );
break;
case 0x89: /* Sprite tile data memory offset (high)
- Bit 0-4 R/W Sprite tile data memory offset bit 16-20
- Bit 5-7 Unused
- */
+ Bit 0-4 R/W Sprite tile data memory offset bit 16-20
+ Bit 5-7 Unused
+ */
data &= 0x1F;
m_prc.spr_tiles = ( m_prc.spr_tiles & 0x00FFFF ) | ( data << 16 );
break;
case 0x8A: /* LCD status
- Bit 0 R Unknown
- Bit 1 R Unknown
- Bit 2 R Unknown
- Bit 3 R Unknown
- Bit 4 R LCD during V-Sync / Rendering circuitry active or not ( 1 = not active)
- Bit 5 R Unknown
- Bit 6-7 Unused
- */
+ Bit 0 R Unknown
+ Bit 1 R Unknown
+ Bit 2 R Unknown
+ Bit 3 R Unknown
+ Bit 4 R LCD during V-Sync / Rendering circuitry active or not ( 1 = not active)
+ Bit 5 R Unknown
+ Bit 6-7 Unused
+ */
case 0xFE: /* Direct LCD control / data
- Bit 0-7 R/W Direct LCD command or data
- */
+ Bit 0-7 R/W Direct LCD command or data
+ */
// lcd_command_w( data );
break;
case 0xFF: /* Direct LCD data
- Bit 0-7 R/W Direct LCD data
- */
+ Bit 0-7 R/W Direct LCD data
+ */
// lcd_data_w( data );
break;
default:
diff --git a/src/mame/drivers/ptcsol.cpp b/src/mame/drivers/ptcsol.cpp
index 97d8af9ca13..c7515dfb4b7 100644
--- a/src/mame/drivers/ptcsol.cpp
+++ b/src/mame/drivers/ptcsol.cpp
@@ -435,11 +435,11 @@ WRITE8_MEMBER( sol20_state::sol20_fe_w )
static ADDRESS_MAP_START( sol20_mem, AS_PROGRAM, 8, sol20_state)
AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("boot")
- AM_RANGE(0X0800, 0Xbfff) AM_RAM // optional s100 ram
+ AM_RANGE(0x0800, 0xbfff) AM_RAM // optional s100 ram
AM_RANGE(0xc000, 0xc7ff) AM_ROM
- AM_RANGE(0Xc800, 0Xcbff) AM_RAM // system ram
- AM_RANGE(0Xcc00, 0Xcfff) AM_RAM AM_SHARE("videoram")
- AM_RANGE(0Xd000, 0Xffff) AM_RAM // optional s100 ram
+ AM_RANGE(0xc800, 0xcbff) AM_RAM // system ram
+ AM_RANGE(0xcc00, 0xcfff) AM_RAM AM_SHARE("videoram")
+ AM_RANGE(0xd000, 0xffff) AM_RAM // optional s100 ram
ADDRESS_MAP_END
static ADDRESS_MAP_START( sol20_io, AS_IO, 8, sol20_state)
diff --git a/src/mame/drivers/rex6000.cpp b/src/mame/drivers/rex6000.cpp
index 1c4553f2e40..c91af48b9e1 100644
--- a/src/mame/drivers/rex6000.cpp
+++ b/src/mame/drivers/rex6000.cpp
@@ -306,7 +306,7 @@ READ8_MEMBER( rex6000_state::touchscreen_r )
switch (offset)
{
case 0x08:
- return ((ioport("INPUT")->read() & 0x40) ? 0x20 : 0x00) | 0X10;
+ return ((ioport("INPUT")->read() & 0x40) ? 0x20 : 0x00) | 0x10;
case 0x09:
if (m_touchscreen[4] & 0x80)
return (battery>>0) & 0xff;
diff --git a/src/mame/drivers/rmnimbus.cpp b/src/mame/drivers/rmnimbus.cpp
index 52248450e84..902655ac9ab 100644
--- a/src/mame/drivers/rmnimbus.cpp
+++ b/src/mame/drivers/rmnimbus.cpp
@@ -46,8 +46,8 @@ static ADDRESS_MAP_START(nimbus_io, AS_IO, 16, rmnimbus_state )
AM_RANGE( 0x0080, 0x0081) AM_READWRITE8(nimbus_mcu_r, nimbus_mcu_w, 0x00FF)
AM_RANGE( 0x0092, 0x0093) AM_READWRITE8(nimbus_iou_r, nimbus_iou_w, 0x00FF)
AM_RANGE( 0x00A4, 0x00A5) AM_READWRITE8(nimbus_mouse_js_r, nimbus_mouse_js_w, 0x00FF)
- AM_RANGE( 0X00c0, 0X00cf) AM_READWRITE8(nimbus_pc8031_r, nimbus_pc8031_w, 0x00FF)
- AM_RANGE( 0X00e0, 0X00ef) AM_DEVREADWRITE8(AY8910_TAG, ay8910_device, data_r, address_data_w, 0x00FF)
+ AM_RANGE( 0x00c0, 0x00cf) AM_READWRITE8(nimbus_pc8031_r, nimbus_pc8031_w, 0x00FF)
+ AM_RANGE( 0x00e0, 0x00ef) AM_DEVREADWRITE8(AY8910_TAG, ay8910_device, data_r, address_data_w, 0x00FF)
AM_RANGE( 0x00f0, 0x00f7) AM_DEVREADWRITE8(Z80SIO_TAG, z80sio2_device, cd_ba_r, cd_ba_w, 0x00ff)
AM_RANGE( 0x0400, 0x0401) AM_WRITE8(fdc_ctl_w, 0x00ff)
AM_RANGE( 0x0408, 0x040f) AM_DEVREADWRITE8(FDC_TAG, wd2793_t, read, write, 0x00ff)
diff --git a/src/mame/drivers/sonson.cpp b/src/mame/drivers/sonson.cpp
index 870563cd786..41fd40305b1 100644
--- a/src/mame/drivers/sonson.cpp
+++ b/src/mame/drivers/sonson.cpp
@@ -166,7 +166,7 @@ static INPUT_PORTS_START( sonson )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE( 0x40, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPNAME( 0X80, 0x80, DEF_STR( Flip_Screen )) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen )) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
diff --git a/src/mame/drivers/tv950.cpp b/src/mame/drivers/tv950.cpp
index a84031817ba..815b02f3916 100644
--- a/src/mame/drivers/tv950.cpp
+++ b/src/mame/drivers/tv950.cpp
@@ -8,13 +8,13 @@
TODO:
- Keyboard
- CRTC reset and drawing
-
+
Hardware:
6502 CPU
6545 CRTC
6522 VIA, wired to count HSYNCs and to enable the 6502 to pull RESET on the CRTC
3x 6551 ACIA 1 for the keyboard, 1 for the modem port, 1 for the printer port
-
+
VIA hookup (see schematics):
PA3 = beep?
PA5 = inverse video
@@ -24,14 +24,14 @@
CA1 = reset CRTC in
CA2 = reset CRTC out
CB2 = blink timer
-
+
IRQ = ACIAs (all 3 ORed together)
NMI = 6522 VIA's IRQ line
-
+
http://www.bitsavers.org/pdf/televideo/950/Model_950_Terminal_Theory_of_Operation_26Jan1981.pdf
- http://www.bitsavers.org/pdf/televideo/950/2002100_Model_950_Maintenance_Manual_Nov1983.pdf
- http://www.bitsavers.org/pdf/televideo/950/B300002-001_Model_950_Operators_Manual_Feb81.pdf
-
+ http://www.bitsavers.org/pdf/televideo/950/2002100_Model_950_Maintenance_Manual_Nov1983.pdf
+ http://www.bitsavers.org/pdf/televideo/950/B300002-001_Model_950_Operators_Manual_Feb81.pdf
+
****************************************************************************/
#include "emu.h"
@@ -41,13 +41,13 @@
#include "machine/mos6551.h"
#include "bus/rs232/rs232.h"
-#define ACIA1_TAG "acia1"
-#define ACIA2_TAG "acia2"
-#define ACIA3_TAG "acia3"
-#define CRTC_TAG "crtc"
-#define VIA_TAG "via"
-#define RS232A_TAG "rs232a"
-#define RS232B_TAG "rs232b"
+#define ACIA1_TAG "acia1"
+#define ACIA2_TAG "acia2"
+#define ACIA3_TAG "acia3"
+#define CRTC_TAG "crtc"
+#define VIA_TAG "via"
+#define RS232A_TAG "rs232a"
+#define RS232B_TAG "rs232b"
#define MASTER_CLOCK (23814000)
@@ -64,7 +64,7 @@ public:
MC6845_UPDATE_ROW(crtc_update_row);
MC6845_ON_UPDATE_ADDR_CHANGED(crtc_update_addr);
-
+
DECLARE_WRITE8_MEMBER(row_addr_w);
DECLARE_WRITE_LINE_MEMBER(via_crtc_reset_w);
@@ -74,14 +74,14 @@ private:
required_device<via6522_device> m_via;
required_device<r6545_1_device> m_crtc;
required_shared_ptr<UINT8> m_vram;
-
+
int m_row_addr;
};
static ADDRESS_MAP_START(tv950_mem, AS_PROGRAM, 8, tv950_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x07ff) AM_RAM
- AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("vram") // VRAM
+ AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("vram") // VRAM
AM_RANGE(0x8000, 0x8100) AM_DEVREADWRITE(CRTC_TAG, r6545_1_device, status_r, address_w)
AM_RANGE(0x8001, 0x8101) AM_DEVREADWRITE(CRTC_TAG, r6545_1_device, register_r, register_w)
AM_RANGE(0x9000, 0x9000) AM_WRITE(row_addr_w)
@@ -106,7 +106,7 @@ WRITE_LINE_MEMBER(tv950_state::via_crtc_reset_w)
{
//printf("via_crtc_reset_w: %d\n", state);
m_via->write_ca1(state);
-
+
if (!state)
{
//m_crtc->device_reset();
@@ -130,11 +130,11 @@ static MACHINE_CONFIG_START( tv950, tv950_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/14)
MCFG_CPU_PROGRAM_MAP(tv950_mem)
-
+
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK, 882, 0, 720, 370, 0, 350 ) // not real values
+ MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK, 882, 0, 720, 370, 0, 350 ) // not real values
MCFG_SCREEN_UPDATE_DEVICE( CRTC_TAG, r6545_1_device, screen_update )
-
+
// there are many 6845 CRTC submodels, the Theory of Operation manual references the Rockwell R6545-1 specificially.
MCFG_MC6845_ADD(CRTC_TAG, R6545_1, "screen", MASTER_CLOCK/14)
MCFG_MC6845_SHOW_BORDER_AREA(false)
@@ -142,17 +142,17 @@ static MACHINE_CONFIG_START( tv950, tv950_state )
MCFG_MC6845_UPDATE_ROW_CB(tv950_state, crtc_update_row)
MCFG_MC6845_ADDR_CHANGED_CB(tv950_state, crtc_update_addr)
MCFG_MC6845_OUT_HSYNC_CB(DEVWRITELINE(VIA_TAG, via6522_device, write_pb6))
-
+
MCFG_DEVICE_ADD(VIA_TAG, VIA6522, MASTER_CLOCK/14)
MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6502_NMI_LINE))
MCFG_VIA6522_CA2_HANDLER(WRITELINE(tv950_state, via_crtc_reset_w))
-
+
MCFG_DEVICE_ADD(ACIA1_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
MCFG_DEVICE_ADD(ACIA2_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
-
+
MCFG_DEVICE_ADD(ACIA3_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
MACHINE_CONFIG_END
@@ -160,15 +160,15 @@ MACHINE_CONFIG_END
/* ROM definition */
ROM_START( tv950 )
ROM_REGION(0x2000, "maincpu", 0)
- ROM_LOAD( "180000-001a_a41_eb17.bin", 0x001000, 0x001000, CRC(b7187cc5) SHA1(41cc8fd51661314e03ee7e00cc1e206e9a694d92) )
- ROM_LOAD( "180000-007a_a42_67d3.bin", 0x000000, 0x001000, CRC(3ef2e6fb) SHA1(21ccfd2b50c37b715eed67671b82faa4d75fc6bb) )
-
+ ROM_LOAD( "180000-001a_a41_eb17.bin", 0x001000, 0x001000, CRC(b7187cc5) SHA1(41cc8fd51661314e03ee7e00cc1e206e9a694d92) )
+ ROM_LOAD( "180000-007a_a42_67d3.bin", 0x000000, 0x001000, CRC(3ef2e6fb) SHA1(21ccfd2b50c37b715eed67671b82faa4d75fc6bb) )
+
ROM_REGION(0x2000, "graphics", 0)
- ROM_LOAD16_BYTE( "180000-002a_a33_9294.bin", 0x000001, 0x001000, CRC(eaf4f346) SHA1(b4c531626846f3f055ddc086ac24fdb1b34f3f8e) )
- ROM_LOAD16_BYTE( "180000-003a_a32_7ebf.bin", 0x000000, 0x001000, CRC(783ca0b6) SHA1(1cec9a9a56ef5795809f7ca7cd2e3f61b27e698d) )
-
+ ROM_LOAD16_BYTE( "180000-002a_a33_9294.bin", 0x000001, 0x001000, CRC(eaf4f346) SHA1(b4c531626846f3f055ddc086ac24fdb1b34f3f8e) )
+ ROM_LOAD16_BYTE( "180000-003a_a32_7ebf.bin", 0x000000, 0x001000, CRC(783ca0b6) SHA1(1cec9a9a56ef5795809f7ca7cd2e3f61b27e698d) )
+
ROM_REGION(0x1000, "kbd", 0)
- ROM_LOAD( "950kbd_8748_pn52080723-02.bin", 0x000000, 0x000400, CRC(11c8f22c) SHA1(99e73e9c74b10055733e89b92adbc5bf7f4ff338) )
+ ROM_LOAD( "950kbd_8748_pn52080723-02.bin", 0x000000, 0x000400, CRC(11c8f22c) SHA1(99e73e9c74b10055733e89b92adbc5bf7f4ff338) )
ROM_END
/* Driver */
diff --git a/src/mame/drivers/tv990.cpp b/src/mame/drivers/tv990.cpp
index 124e05d86a2..e445ebdf2ba 100644
--- a/src/mame/drivers/tv990.cpp
+++ b/src/mame/drivers/tv990.cpp
@@ -3,10 +3,10 @@
/***************************************************************************
TeleVideo 990/995 terminal
-
+
Driver by Carl and R. Belmont
Thanks to Al Kossow.
-
+
H/W:
68000-P16 CPU (clock unknown, above 10 MHz it outruns the AT keyboard controller)
16C452 dual 16450 (PC/AT standard) UART + PC-compatible Centronics (integrated into
@@ -14,7 +14,7 @@
AMI MEGA-KBD-H-Q PS/2 keyboard interface on 990, PS/2 8042 on 995
Televideo ASIC marked "134446-00 TVI1111-0 427"
3x AS7C256 (32K x 8 SRAM)
-
+
IRQs:
2 = PS/2 keyboard
3 = Centronics
@@ -24,7 +24,7 @@
Video modes include 80 or 132 wide by 24, 25, 42, 43, 48, or 49 lines high plus an
optional status bar
- Modes include TeleVideo 990, 950, and 955, Wyse WY-60, WY-150/120/50+/50, ANSI,
+ Modes include TeleVideo 990, 950, and 955, Wyse WY-60, WY-150/120/50+/50, ANSI,
DEC VT320/220, VT100/52, SCO Console, and PC TERM.
****************************************************************************/
@@ -38,11 +38,11 @@
#include "machine/nvram.h"
#include "sound/beep.h"
-#define UART0_TAG "ns16450_0"
-#define UART1_TAG "ns16450_1"
+#define UART0_TAG "ns16450_0"
+#define UART1_TAG "ns16450_1"
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
-#define LPT_TAG "lpt"
+#define LPT_TAG "lpt"
class tv990_state : public driver_device
{
@@ -74,14 +74,14 @@ public:
virtual void machine_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual void device_post_load() override;
-
+
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
-
+
DECLARE_READ16_MEMBER(tvi1111_r);
DECLARE_WRITE16_MEMBER(tvi1111_w);
DECLARE_READ8_MEMBER(kbdc_r);
DECLARE_WRITE8_MEMBER(kbdc_w);
-
+
DECLARE_WRITE_LINE_MEMBER(uart0_irq);
DECLARE_WRITE_LINE_MEMBER(uart1_irq);
DECLARE_WRITE_LINE_MEMBER(lpt_irq);
@@ -104,7 +104,7 @@ INTERRUPT_GEN_MEMBER(tv990_state::vblank)
void tv990_state::machine_start()
{
m_rowtimer = timer_alloc();
-
+
save_item(NAME(tvi1111_regs));
save_item(NAME(m_rowh));
save_item(NAME(m_width));
@@ -137,7 +137,7 @@ READ16_MEMBER(tv990_state::tvi1111_r)
{
if (offset == (0x32/2))
{
- tvi1111_regs[offset] |= 8; // loop at 109ca wants this set
+ tvi1111_regs[offset] |= 8; // loop at 109ca wants this set
}
else if(offset == 0x1d)
{
@@ -239,7 +239,7 @@ UINT32 tv990_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c
attr ^= attrchg;
}
- if (attr & 0x4) // inverse video?
+ if (attr & 0x4) // inverse video?
{
palette[1] = m_palette->pen(0);
palette[0] = (attr & 0x10) ? m_palette->pen(1) : m_palette->pen(2);
@@ -304,14 +304,14 @@ WRITE8_MEMBER(tv990_state::kbdc_w)
static ADDRESS_MAP_START(tv990_mem, AS_PROGRAM, 16, tv990_state)
AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_REGION("maincpu", 0)
- AM_RANGE(0x060000, 0x06ffff) AM_RAM AM_SHARE("vram") // character/attribute RAM
- AM_RANGE(0X080000, 0X087fff) AM_RAM AM_SHARE("fontram") // font RAM
+ AM_RANGE(0x060000, 0x06ffff) AM_RAM AM_SHARE("vram") // character/attribute RAM
+ AM_RANGE(0x080000, 0x087fff) AM_RAM AM_SHARE("fontram") // font RAM
AM_RANGE(0x090000, 0x0900ff) AM_READWRITE(tvi1111_r, tvi1111_w)
AM_RANGE(0x0a0000, 0x0a000f) AM_DEVREADWRITE8(UART0_TAG, ns16450_device, ins8250_r, ins8250_w, 0x00ff)
AM_RANGE(0x0a0010, 0x0a001f) AM_DEVREADWRITE8(UART1_TAG, ns16450_device, ins8250_r, ins8250_w, 0x00ff)
AM_RANGE(0x0a0028, 0x0a002d) AM_DEVREADWRITE8(LPT_TAG, pc_lpt_device, read, write, 0x00ff)
AM_RANGE(0x0b0000, 0x0b0003) AM_READWRITE8(kbdc_r, kbdc_w, 0x00ff)
- AM_RANGE(0x0c0000, 0x0c7fff) AM_RAM AM_SHARE("nvram")// work RAM
+ AM_RANGE(0x0c0000, 0x0c7fff) AM_RAM AM_SHARE("nvram")// work RAM
ADDRESS_MAP_END
/* Input ports */
@@ -349,7 +349,7 @@ INPUT_CHANGED_MEMBER(tv990_state::color)
void tv990_state::machine_reset()
{
m_rowtimer->adjust(m_screen->time_until_pos(0));
-
+
memset(tvi1111_regs, 0, sizeof(tvi1111_regs));
m_rowh = 16;
m_width = 80;
@@ -363,10 +363,10 @@ void tv990_state::device_post_load()
static MACHINE_CONFIG_START( tv990, tv990_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 14967500) // verified (59.86992/4)
+ MCFG_CPU_ADD("maincpu", M68000, 14967500) // verified (59.86992/4)
MCFG_CPU_PROGRAM_MAP(tv990_mem)
MCFG_CPU_VBLANK_INT_DRIVER("screen", tv990_state, vblank)
-
+
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green)
MCFG_SCREEN_UPDATE_DRIVER(tv990_state, screen_update)
MCFG_SCREEN_SIZE(132*16, 50*16)
@@ -385,7 +385,7 @@ static MACHINE_CONFIG_START( tv990, tv990_state )
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE(RS232B_TAG, rs232_port_device, write_rts))
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE(RS232B_TAG, rs232_port_device, write_txd))
MCFG_INS8250_OUT_INT_CB(WRITELINE(tv990_state, uart1_irq))
-
+
MCFG_DEVICE_ADD(LPT_TAG, PC_LPT, 0)
MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(tv990_state, lpt_irq))
@@ -398,7 +398,7 @@ static MACHINE_CONFIG_START( tv990, tv990_state )
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, rx_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, dcd_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, cts_w))
-
+
MCFG_DEVICE_ADD("pc_kbdc", KBDC8042, 0)
MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_AT386)
MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(INPUTLINE("maincpu", M68K_IRQ_2))
@@ -413,14 +413,14 @@ MACHINE_CONFIG_END
/* ROM definition */
ROM_START( tv990 )
ROM_REGION( 0x40000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "180003-89_u3.bin", 0x000000, 0x010000, CRC(0465fc55) SHA1(b8874ce54bf2bf4f77664194d2f23c0e4e6ccbe9) )
- ROM_LOAD16_BYTE( "180003-90_u4.bin", 0x000001, 0x010000, CRC(fad7d77d) SHA1(f1114a4a07c8b4ffa0323a2e7ce03d82a386f7d3) )
+ ROM_LOAD16_BYTE( "180003-89_u3.bin", 0x000000, 0x010000, CRC(0465fc55) SHA1(b8874ce54bf2bf4f77664194d2f23c0e4e6ccbe9) )
+ ROM_LOAD16_BYTE( "180003-90_u4.bin", 0x000001, 0x010000, CRC(fad7d77d) SHA1(f1114a4a07c8b4ffa0323a2e7ce03d82a386f7d3) )
ROM_END
ROM_START( tv995 )
ROM_REGION( 0x40000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "995-65_u3.bin", 0x000000, 0x020000, CRC(2d71b6fe) SHA1(a2a3406c19308eb9232db319ea8f151949b2ac74) )
- ROM_LOAD16_BYTE( "995-65_u4.bin", 0x000001, 0x020000, CRC(dc002af2) SHA1(9608e7a729c5ac0fc58f673eaf441d2f4f591ec6) )
+ ROM_LOAD16_BYTE( "995-65_u3.bin", 0x000000, 0x020000, CRC(2d71b6fe) SHA1(a2a3406c19308eb9232db319ea8f151949b2ac74) )
+ ROM_LOAD16_BYTE( "995-65_u4.bin", 0x000001, 0x020000, CRC(dc002af2) SHA1(9608e7a729c5ac0fc58f673eaf441d2f4f591ec6) )
ROM_END
/* Driver */
diff --git a/src/mame/drivers/tx0.cpp b/src/mame/drivers/tx0.cpp
index 92c120adde2..6a6b98a2ce6 100644
--- a/src/mame/drivers/tx0.cpp
+++ b/src/mame/drivers/tx0.cpp
@@ -904,7 +904,7 @@ void tx0_state::magtape_callback()
if ((mar & 03) != 1)
{ /* unimplemented device: remain in unselected state and set rwc
- flag? */
+ flag? */
m_maincpu->set_state_int(TX0_PF, m_maincpu->state_int(TX0_PF) | PF_RWC);
}
else
diff --git a/src/mame/drivers/zapcomputer.cpp b/src/mame/drivers/zapcomputer.cpp
index b876fcaf555..2b5be700b8d 100644
--- a/src/mame/drivers/zapcomputer.cpp
+++ b/src/mame/drivers/zapcomputer.cpp
@@ -104,7 +104,7 @@ READ8_MEMBER( zapcomp_state::keyboard_r )
for (int i=0; i<16; i++)
if (hex_keys & (1 << i))
retval |= (0x80 | i); /* provide the key index in bits 3-0
- as well as turning on the strobe bit */
+ as well as turning on the strobe bit */
return retval;
}
diff --git a/src/mame/includes/cvs.h b/src/mame/includes/cvs.h
index 6450e90fb3b..66d536c7116 100644
--- a/src/mame/includes/cvs.h
+++ b/src/mame/includes/cvs.h
@@ -90,8 +90,8 @@ public:
UINT8 m_color_ram[0x400];
UINT8 m_palette_ram[0x10];
UINT8 m_character_ram[3 * 0x800]; /* only half is used, but
- by allocating twice the amount,
- we can use the same gfx_layout */
+ by allocating twice the amount,
+ we can use the same gfx_layout */
DECLARE_READ_LINE_MEMBER(speech_rom_read_bit);
DECLARE_WRITE_LINE_MEMBER(write_s2650_flag);
DECLARE_WRITE_LINE_MEMBER(cvs_slave_cpu_interrupt);
diff --git a/src/mame/machine/apollo.cpp b/src/mame/machine/apollo.cpp
index f7af91cd4b4..abd6f7c7622 100644
--- a/src/mame/machine/apollo.cpp
+++ b/src/mame/machine/apollo.cpp
@@ -1220,7 +1220,7 @@ MACHINE_START_MEMBER(apollo_state,apollo)
// fake mc146818 interrupts (DN3000 only)
m_dn3000_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(apollo_state::apollo_rtc_timer),this));
}
-
+
m_dma_channel = -1;
m_cur_eop = false;
}
diff --git a/src/mame/machine/konppc.cpp b/src/mame/machine/konppc.cpp
index d70d3364142..c3b3211feb4 100644
--- a/src/mame/machine/konppc.cpp
+++ b/src/mame/machine/konppc.cpp
@@ -20,7 +20,7 @@ konppc_device::konppc_device(const machine_config &mconfig, const char *tag, dev
: device_t(mconfig, KONPPC, "Konami PowerPC Common Functions", tag, owner, clock, "konppc", __FILE__),
cgboard_type(0),
num_cgboards(0)/*,
- cgboard_id(MAX_CG_BOARDS)*/
+ cgboard_id(MAX_CG_BOARDS)*/
{
}
diff --git a/src/mame/machine/m20_kbd.cpp b/src/mame/machine/m20_kbd.cpp
index 702985294ed..6d2bbbd6e44 100644
--- a/src/mame/machine/m20_kbd.cpp
+++ b/src/mame/machine/m20_kbd.cpp
@@ -8,51 +8,51 @@
namespace {
/*
- TODO: dump 8048 mcu
-
- There seem to be a lot of guesses in this code - actual scan rate,
- FIFO length, command processing, etc. don't seem to be evidence-
- based. The modifier handling seems very odd as it has aliasing and
- overflow all over the place.
-
- Layout is selected with a set of four jumpers on the keyboard MCU.
- We need to bring these out to DIP switches, work out which command
- is the layout request, and respond appropriately.
-
- Available layouts:
- Italian
- German
- French
- British
- USA ASCII
- Spanish
- Portuguese
- Swedish - Finnish
- Danish
- Katakana
- Yugoslavian
- Norwegian
- Greek
- Swiss - French
- Swiss - German
-
- The keyboard MCU drives a buzzer. We should work out what the bell
- on/off commands are and emulate it.
-
- There are apparently no break codes.
- The scancodes are arranged to read in alphabetical order with the QWERTY layout.
- Modifiers apparently modify the make codes.
- We are using a matrix here that corresponds to the logical scan codes - the physical matrix apparently doesn't match this.
-
- 00 1c 1d 1e 1f 20 21 22 23 24 25 26 27 c3 cd ce cf d0
- ?? 12 18 06 13 15 1a 16 0a 10 11 28 29 c2 ca cb cc d1
- ?? 02 14 05 07 08 09 0b 0c 0d 2a 2b 2c c1 c7 c8 c9 d2
- ?? 01 1b 19 04 17 03 0f 0e 2d 2e 2f ?? c4 c5 c6 d3
- c0
-
- Ths is the 72-key version of the keyboard.
- The katakana kayout has 75 keys, but we don't have a diagram for it.
- ?? are modifiers, which are read directly, not through the 8x9 scan matrix.
+ TODO: dump 8048 mcu
+
+ There seem to be a lot of guesses in this code - actual scan rate,
+ FIFO length, command processing, etc. don't seem to be evidence-
+ based. The modifier handling seems very odd as it has aliasing and
+ overflow all over the place.
+
+ Layout is selected with a set of four jumpers on the keyboard MCU.
+ We need to bring these out to DIP switches, work out which command
+ is the layout request, and respond appropriately.
+
+ Available layouts:
+ Italian
+ German
+ French
+ British
+ USA ASCII
+ Spanish
+ Portuguese
+ Swedish - Finnish
+ Danish
+ Katakana
+ Yugoslavian
+ Norwegian
+ Greek
+ Swiss - French
+ Swiss - German
+
+ The keyboard MCU drives a buzzer. We should work out what the bell
+ on/off commands are and emulate it.
+
+ There are apparently no break codes.
+ The scancodes are arranged to read in alphabetical order with the QWERTY layout.
+ Modifiers apparently modify the make codes.
+ We are using a matrix here that corresponds to the logical scan codes - the physical matrix apparently doesn't match this.
+
+ 00 1c 1d 1e 1f 20 21 22 23 24 25 26 27 c3 cd ce cf d0
+ ?? 12 18 06 13 15 1a 16 0a 10 11 28 29 c2 ca cb cc d1
+ ?? 02 14 05 07 08 09 0b 0c 0d 2a 2b 2c c1 c7 c8 c9 d2
+ ?? 01 1b 19 04 17 03 0f 0e 2d 2e 2f ?? c4 c5 c6 d3
+ c0
+
+ Ths is the 72-key version of the keyboard.
+ The katakana kayout has 75 keys, but we don't have a diagram for it.
+ ?? are modifiers, which are read directly, not through the 8x9 scan matrix.
*/
// Italian layout (QZERTY typewriter)
static INPUT_PORTS_START( m20_keyboard )
diff --git a/src/mame/machine/ngen_kb.cpp b/src/mame/machine/ngen_kb.cpp
index 960cc97f3c7..0d9532f1286 100644
--- a/src/mame/machine/ngen_kb.cpp
+++ b/src/mame/machine/ngen_kb.cpp
@@ -2,10 +2,10 @@
// copyright-holders:Barry Rodewald
// Convergent NGEN keyboard device
/*
- TODO: represent the real layout/scancodes for this keyboard. The
- current HLE just sends ASCII and hopes, with an additional 0xc0
- "last key up" code. We're also inheriting typematic behaviour from
- the serial keyboard which may not be desirable.
+ TODO: represent the real layout/scancodes for this keyboard. The
+ current HLE just sends ASCII and hopes, with an additional 0xc0
+ "last key up" code. We're also inheriting typematic behaviour from
+ the serial keyboard which may not be desirable.
*/
#include "ngen_kb.h"
diff --git a/src/mame/machine/rmnimbus.cpp b/src/mame/machine/rmnimbus.cpp
index d3c87ba516c..ba7342a06db 100644
--- a/src/mame/machine/rmnimbus.cpp
+++ b/src/mame/machine/rmnimbus.cpp
@@ -93,13 +93,13 @@ chdman createhd -o ST125N.chd -chs 41921,1,1 -ss 512
/* 8031/8051 Peripheral controller */
-#define IPC_OUT_ADDR 0X01
-#define IPC_OUT_READ_PEND 0X02
-#define IPC_OUT_BYTE_AVAIL 0X04
+#define IPC_OUT_ADDR 0x01
+#define IPC_OUT_READ_PEND 0x02
+#define IPC_OUT_BYTE_AVAIL 0x04
-#define IPC_IN_ADDR 0X01
-#define IPC_IN_BYTE_AVAIL 0X02
-#define IPC_IN_READ_PEND 0X04
+#define IPC_IN_ADDR 0x01
+#define IPC_IN_BYTE_AVAIL 0x02
+#define IPC_IN_READ_PEND 0x04
/* IO unit */
diff --git a/src/mame/machine/scramble.cpp b/src/mame/machine/scramble.cpp
index 6f2293f2b90..f304742d5f2 100644
--- a/src/mame/machine/scramble.cpp
+++ b/src/mame/machine/scramble.cpp
@@ -258,7 +258,7 @@ DRIVER_INIT_MEMBER(scramble_state,cavelon)
m_maincpu->space(AS_PROGRAM).nop_write(0x2000, 0x2000); /* ??? */
m_maincpu->space(AS_PROGRAM).nop_write(0x3800, 0x3801); /* looks suspicously like
- an AY8910, but not sure */
+ an AY8910, but not sure */
save_item(NAME(m_cavelon_bank));
}
diff --git a/src/mame/machine/seibucop/seibucop_cmd.hxx b/src/mame/machine/seibucop/seibucop_cmd.hxx
index c007437ab3d..d699e7a3026 100644
--- a/src/mame/machine/seibucop/seibucop_cmd.hxx
+++ b/src/mame/machine/seibucop/seibucop_cmd.hxx
@@ -20,7 +20,7 @@
00 - 0105 ( 00) ( 105) : (180, 2e0, 0a0, 000, 000, 000, 000, 000) 6 fffb (zeroteamsr)
*/
void raiden2cop_device::execute_0205(int offset, UINT16 data)
-{
+{
int ppos = m_host_space->read_dword(cop_regs[0] + 0x04 + offset * 4);
int npos = ppos + m_host_space->read_dword(cop_regs[0] + 0x10 + offset * 4);
int delta = (npos >> 16) - (ppos >> 16);
@@ -44,7 +44,7 @@ void raiden2cop_device::execute_0904(int offset, UINT16 data)
#if LOG_Move0905
printf("cmd %04x: %08x %08x [%08x]\n",data, m_host_space->read_dword(cop_regs[0] + 16 + offset * 4),m_host_space->read_dword(cop_regs[0] + 0x28 + offset * 4),cop_regs[0]);
#endif
-
+
if (data&0x0001)
m_host_space->write_dword(cop_regs[0] + 16 + offset * 4, m_host_space->read_dword(cop_regs[0] + 16 + offset * 4) + m_host_space->read_dword(cop_regs[0] + 0x28 + offset * 4));
else /* X Se Dae and Zero Team uses this variant */
@@ -72,19 +72,19 @@ void raiden2cop_device::LEGACY_execute_130e_cupsoc(int offset, UINT16 data)
{
int dy = m_host_space->read_dword(cop_regs[1] + 4) - m_host_space->read_dword(cop_regs[0] + 4);
int dx = m_host_space->read_dword(cop_regs[1] + 8) - m_host_space->read_dword(cop_regs[0] + 8);
-
+
cop_status = 7;
if (!dx) {
cop_status |= 0x8000;
cop_angle = 0;
}
- else
+ else
{
cop_angle = (int)(atan(double(dy) / double(dx)) * 128.0 / M_PI);
if (dx < 0)
cop_angle += 0x80;
-
+
cop_angle &= 0xff;
}
@@ -163,7 +163,7 @@ void raiden2cop_device::execute_338e(int offset, UINT16 data)
cop_angle = (int)(atan(double(dx) / double(dy)) * 128 / M_PI);
if (dy < 0)
cop_angle += 0x80;
-
+
cop_angle &= 0xff;
}
@@ -200,7 +200,7 @@ void raiden2cop_device::execute_3b30(int offset, UINT16 data)
#if LOG_Phytagoras
printf("cmd %04x: dx = %d dy = %d dist = %08x \n",data,dx >> 16,dy >> 16,cop_dist);
#endif
-
+
if (data & 0x0080)
cop_write_word(cop_regs[0] + (data & 0x200 ? 0x3a : 0x38), cop_dist);
}
@@ -229,11 +229,11 @@ void raiden2cop_device::execute_42c2(int offset, UINT16 data)
#if LOG_Division
printf("res = %04x dist %04x\n",(cop_dist << (5 - cop_scale)) / div,cop_dist);
-
-// if(div & 0x8000)
-// machine().debugger().debug_break();
+
+// if(div & 0x8000)
+// machine().debugger().debug_break();
#endif
-
+
cop_write_word(cop_regs[0] + (0x38), (cop_dist << (5 - cop_scale)) / div);
}
@@ -312,7 +312,7 @@ void raiden2cop_device::execute_6200(int offset, UINT16 data)
}
cop_write_word(cop_regs[primary_reg], flags);
-
+
if (!m_host_endian)
cop_write_byte(cop_regs[primary_reg] + primary_offset, angle);
else // angle is a byte, but grainbow (cave mid-boss) is only happy with write-word, could be more endian weirdness, or it always writes a word?
@@ -592,11 +592,11 @@ void raiden2cop_device::LEGACY_execute_dde5(int offset, UINT16 data)
*/
// controls GK position, aligned to the ball position
void raiden2cop_device::LEGACY_execute_e30e(int offset, UINT16 data)
-{
+{
int dy = m_host_space->read_dword(cop_regs[2] + 4) - m_host_space->read_dword(cop_regs[0] + 4);
int dx = m_host_space->read_dword(cop_regs[2] + 8) - m_host_space->read_dword(cop_regs[0] + 8);
-
+
cop_status = 7;
if (!dx)
{
@@ -610,7 +610,7 @@ void raiden2cop_device::LEGACY_execute_e30e(int offset, UINT16 data)
cop_angle &= 0xff;
}
-
+
#if LOG_Phytagoras
printf("cmd %04x: dx = %d dy = %d angle = %02x %04x\n",data,dx,dy,cop_angle);
#endif
diff --git a/src/mame/machine/wswan.cpp b/src/mame/machine/wswan.cpp
index d6596c77676..b249befd784 100644
--- a/src/mame/machine/wswan.cpp
+++ b/src/mame/machine/wswan.cpp
@@ -310,34 +310,34 @@ WRITE8_MEMBER( wswan_state::port_w )
switch (offset)
{
case 0x40: /* DMA source address (low)
- Bit 0-7 - DMA source address bit 0-7
- */
+ Bit 0-7 - DMA source address bit 0-7
+ */
case 0x41: /* DMA source address (high)
- Bit 0-7 - DMA source address bit 8-15
- */
+ Bit 0-7 - DMA source address bit 8-15
+ */
case 0x42: /* DMA source bank
- Bit 0-7 - DMA source bank number
- */
+ Bit 0-7 - DMA source bank number
+ */
case 0x43: /* DMA destination bank
- Bit 0-7 - DMA destination bank number
- */
+ Bit 0-7 - DMA destination bank number
+ */
case 0x44: /* DMA destination address (low)
- Bit 0-7 - DMA destination address bit 0-7
- */
+ Bit 0-7 - DMA destination address bit 0-7
+ */
case 0x45: /* DMA destination address (high)
- Bit 0-7 - DMA destination address bit 8-15
- */
+ Bit 0-7 - DMA destination address bit 8-15
+ */
case 0x46: /* Size of copied data (low)
- Bit 0-7 - DMA size bit 0-7
- */
+ Bit 0-7 - DMA size bit 0-7
+ */
case 0x47: /* Size of copied data (high)
- Bit 0-7 - DMA size bit 8-15
- */
+ Bit 0-7 - DMA size bit 8-15
+ */
break;
case 0x48: /* DMA control
- Bit 0-6 - Unknown
- Bit 7 - DMA stop/start
- */
+ Bit 0-6 - Unknown
+ Bit 7 - DMA stop/start
+ */
if (data & 0x80)
{
UINT32 src, dst;
@@ -365,167 +365,167 @@ WRITE8_MEMBER( wswan_state::port_w )
}
break;
case 0x4a: /* Sound DMA source address (low)
- Bit 0-7 - Sound DMA source address bit 0-7
- */
+ Bit 0-7 - Sound DMA source address bit 0-7
+ */
m_sound_dma.source = (m_sound_dma.source & 0x0fff00) | data;
break;
case 0x4b: /* Sound DMA source address (high)
- Bit 0-7 - Sound DMA source address bit 8-15
- */
+ Bit 0-7 - Sound DMA source address bit 8-15
+ */
m_sound_dma.source = (m_sound_dma.source & 0x0f00ff) | (data << 8);
break;
case 0x4c: /* Sound DMA source memory segment
- Bit 0-3 - Sound DMA source address segment
- Bit 4-7 - Unknown
- */
+ Bit 0-3 - Sound DMA source address segment
+ Bit 4-7 - Unknown
+ */
m_sound_dma.source = (m_sound_dma.source & 0xffff) | ((data & 0x0f) << 16);
break;
case 0x4d: /* Unknown */
break;
case 0x4e: /* Sound DMA transfer size (low)
- Bit 0-7 - Sound DMA transfer size bit 0-7
- */
+ Bit 0-7 - Sound DMA transfer size bit 0-7
+ */
m_sound_dma.size = (m_sound_dma.size & 0xff00) | data;
break;
case 0x4f: /* Sound DMA transfer size (high)
- Bit 0-7 - Sound DMA transfer size bit 8-15
- */
+ Bit 0-7 - Sound DMA transfer size bit 8-15
+ */
m_sound_dma.size = (m_sound_dma.size & 0xff) | (data << 8);
break;
case 0x50: /* Unknown */
case 0x51: /* Unknown */
break;
case 0x52: /* Sound DMA start/stop
- Bit 0-6 - Unknown
- Bit 7 - Sound DMA stop/start
- */
+ Bit 0-6 - Unknown
+ Bit 7 - Sound DMA stop/start
+ */
m_sound_dma.enable = data;
break;
case 0x60:
m_vdp->reg_w(space, offset, data);
break;
case 0x80: /* Audio 1 freq (lo)
- Bit 0-7 - Audio channel 1 frequency bit 0-7
- */
+ Bit 0-7 - Audio channel 1 frequency bit 0-7
+ */
case 0x81: /* Audio 1 freq (hi)
- Bit 0-7 - Audio channel 1 frequency bit 8-15
- */
+ Bit 0-7 - Audio channel 1 frequency bit 8-15
+ */
case 0x82: /* Audio 2 freq (lo)
- Bit 0-7 - Audio channel 2 frequency bit 0-7
- */
+ Bit 0-7 - Audio channel 2 frequency bit 0-7
+ */
case 0x83: /* Audio 2 freq (hi)
- Bit 0-7 - Audio channel 2 frequency bit 8-15
- */
+ Bit 0-7 - Audio channel 2 frequency bit 8-15
+ */
case 0x84: /* Audio 3 freq (lo)
- Bit 0-7 - Audio channel 3 frequency bit 0-7
- */
+ Bit 0-7 - Audio channel 3 frequency bit 0-7
+ */
case 0x85: /* Audio 3 freq (hi)
- Bit 0-7 - Audio channel 3 frequency bit 8-15
- */
+ Bit 0-7 - Audio channel 3 frequency bit 8-15
+ */
case 0x86: /* Audio 4 freq (lo)
- Bit 0-7 - Audio channel 4 frequency bit 0-7
- */
+ Bit 0-7 - Audio channel 4 frequency bit 0-7
+ */
case 0x87: /* Audio 4 freq (hi)
- Bit 0-7 - Audio channel 4 frequency bit 8-15
- */
+ Bit 0-7 - Audio channel 4 frequency bit 8-15
+ */
case 0x88: /* Audio 1 volume
- Bit 0-3 - Right volume audio channel 1
- Bit 4-7 - Left volume audio channel 1
- */
+ Bit 0-3 - Right volume audio channel 1
+ Bit 4-7 - Left volume audio channel 1
+ */
case 0x89: /* Audio 2 volume
- Bit 0-3 - Right volume audio channel 2
- Bit 4-7 - Left volume audio channel 2
- */
+ Bit 0-3 - Right volume audio channel 2
+ Bit 4-7 - Left volume audio channel 2
+ */
case 0x8a: /* Audio 3 volume
- Bit 0-3 - Right volume audio channel 3
- Bit 4-7 - Left volume audio channel 3
- */
+ Bit 0-3 - Right volume audio channel 3
+ Bit 4-7 - Left volume audio channel 3
+ */
case 0x8b: /* Audio 4 volume
- Bit 0-3 - Right volume audio channel 4
- Bit 4-7 - Left volume audio channel 4
- */
+ Bit 0-3 - Right volume audio channel 4
+ Bit 4-7 - Left volume audio channel 4
+ */
case 0x8c: /* Sweep step
- Bit 0-7 - Sweep step
- */
+ Bit 0-7 - Sweep step
+ */
case 0x8d: /* Sweep time
- Bit 0-7 - Sweep time
- */
+ Bit 0-7 - Sweep time
+ */
case 0x8e: /* Noise control
- Bit 0-2 - Noise generator type
- Bit 3 - Reset
- Bit 4 - Enable
- Bit 5-7 - Unknown
- */
+ Bit 0-2 - Noise generator type
+ Bit 3 - Reset
+ Bit 4 - Enable
+ Bit 5-7 - Unknown
+ */
case 0x8f: /* Sample location
- Bit 0-7 - Sample address location 0 00xxxxxx xx000000
- */
+ Bit 0-7 - Sample address location 0 00xxxxxx xx000000
+ */
case 0x90: /* Audio control
- Bit 0 - Audio 1 enable
- Bit 1 - Audio 2 enable
- Bit 2 - Audio 3 enable
- Bit 3 - Audio 4 enable
- Bit 4 - Unknown
- Bit 5 - Audio 2 voice mode enable
- Bit 6 - Audio 3 sweep mode enable
- Bit 7 - Audio 4 noise mode enable
- */
+ Bit 0 - Audio 1 enable
+ Bit 1 - Audio 2 enable
+ Bit 2 - Audio 3 enable
+ Bit 3 - Audio 4 enable
+ Bit 4 - Unknown
+ Bit 5 - Audio 2 voice mode enable
+ Bit 6 - Audio 3 sweep mode enable
+ Bit 7 - Audio 4 noise mode enable
+ */
case 0x91: /* Audio output
- Bit 0 - Mono select
- Bit 1-2 - Output volume
- Bit 3 - External stereo
- Bit 4-6 - Unknown
- Bit 7 - External speaker (Read-only, set by hardware)
- */
+ Bit 0 - Mono select
+ Bit 1-2 - Output volume
+ Bit 3 - External stereo
+ Bit 4-6 - Unknown
+ Bit 7 - External speaker (Read-only, set by hardware)
+ */
case 0x92: /* Noise counter shift register (lo)
- Bit 0-7 - Noise counter shift register bit 0-7
- */
+ Bit 0-7 - Noise counter shift register bit 0-7
+ */
case 0x93: /* Noise counter shift register (hi)
- Bit 0-6 - Noise counter shift register bit 8-14
- bit 7 - Unknown
- */
+ Bit 0-6 - Noise counter shift register bit 8-14
+ bit 7 - Unknown
+ */
case 0x94: /* Master volume
- Bit 0-3 - Master volume
- Bit 4-7 - Unknown
- */
+ Bit 0-3 - Master volume
+ Bit 4-7 - Unknown
+ */
m_sound->port_w(space, offset, data);
break;
case 0xa0: /* Hardware type - this is probably read only
- Bit 0 - Enable cartridge slot and/or disable bios
- Bit 1 - Hardware type: 0 = WS, 1 = WSC
- Bit 2-7 - Unknown
- */
+ Bit 0 - Enable cartridge slot and/or disable bios
+ Bit 1 - Hardware type: 0 = WS, 1 = WSC
+ Bit 2-7 - Unknown
+ */
if ((data & 0x01) && !m_bios_disabled)
m_bios_disabled = 1;
break;
case 0xb0: /* Interrupt base vector
- Bit 0-7 - Interrupt base vector
- */
+ Bit 0-7 - Interrupt base vector
+ */
break;
case 0xb1: /* Communication byte
- Bit 0-7 - Communication byte
- */
+ Bit 0-7 - Communication byte
+ */
break;
case 0xb2: /* Interrupt enable
- Bit 0 - Serial transmit interrupt enable
- Bit 1 - Key press interrupt enable
- Bit 2 - RTC alarm interrupt enable
- Bit 3 - Serial receive interrupt enable
- Bit 4 - Drawing line detection interrupt enable
- Bit 5 - VBlank timer interrupt enable
- Bit 6 - VBlank interrupt enable
- Bit 7 - HBlank timer interrupt enable
- */
+ Bit 0 - Serial transmit interrupt enable
+ Bit 1 - Key press interrupt enable
+ Bit 2 - RTC alarm interrupt enable
+ Bit 3 - Serial receive interrupt enable
+ Bit 4 - Drawing line detection interrupt enable
+ Bit 5 - VBlank timer interrupt enable
+ Bit 6 - VBlank interrupt enable
+ Bit 7 - HBlank timer interrupt enable
+ */
break;
case 0xb3: /* serial communication control
- Bit 0 - Receive complete
- Bit 1 - Error
- Bit 2 - Send complete
- Bit 3-4 - Unknown
- Bit 5 - Send data interrupt generation
- Bit 6 - Connection speed: 0 = 9600 bps, 1 = 38400 bps
- bit 7 - Receive data interrupt generation
- */
+ Bit 0 - Receive complete
+ Bit 1 - Error
+ Bit 2 - Send complete
+ Bit 3-4 - Unknown
+ Bit 5 - Send data interrupt generation
+ Bit 6 - Connection speed: 0 = 9600 bps, 1 = 38400 bps
+ bit 7 - Receive data interrupt generation
+ */
// data |= 0x02;
m_ws_portram[0xb1] = 0xff;
if (data & 0x80)
@@ -539,13 +539,13 @@ WRITE8_MEMBER( wswan_state::port_w )
}
break;
case 0xb5: /* Read controls
- Bit 0-3 - Current state of input lines (read-only)
- Bit 4-6 - Select line of inputs to read
- 001 - Read Y cursors
- 010 - Read X cursors
- 100 - Read START,A,B buttons
- Bit 7 - Unknown
- */
+ Bit 0-3 - Current state of input lines (read-only)
+ Bit 4-6 - Select line of inputs to read
+ 001 - Read Y cursors
+ 010 - Read X cursors
+ 100 - Read START,A,B buttons
+ Bit 7 - Unknown
+ */
data = data & 0xf0;
switch (data)
{
@@ -579,43 +579,43 @@ WRITE8_MEMBER( wswan_state::port_w )
}
break;
case 0xb6: /* Interrupt acknowledge
- Bit 0 - Serial transmit interrupt acknowledge
- Bit 1 - Key press interrupt acknowledge
- Bit 2 - RTC alarm interrupt acknowledge
- Bit 3 - Serial receive interrupt acknowledge
- Bit 4 - Drawing line detection interrupt acknowledge
- Bit 5 - VBlank timer interrupt acknowledge
- Bit 6 - VBlank interrupt acknowledge
- Bit 7 - HBlank timer interrupt acknowledge
- */
+ Bit 0 - Serial transmit interrupt acknowledge
+ Bit 1 - Key press interrupt acknowledge
+ Bit 2 - RTC alarm interrupt acknowledge
+ Bit 3 - Serial receive interrupt acknowledge
+ Bit 4 - Drawing line detection interrupt acknowledge
+ Bit 5 - VBlank timer interrupt acknowledge
+ Bit 6 - VBlank interrupt acknowledge
+ Bit 7 - HBlank timer interrupt acknowledge
+ */
clear_irq_line(data);
data = m_ws_portram[0xb6];
break;
case 0xba: /* Internal EEPROM data (low)
- Bit 0-7 - Internal EEPROM data transfer bit 0-7
- */
+ Bit 0-7 - Internal EEPROM data transfer bit 0-7
+ */
case 0xbb: /* Internal EEPROM data (high)
- Bit 0-7 - Internal EEPROM data transfer bit 8-15
- */
+ Bit 0-7 - Internal EEPROM data transfer bit 8-15
+ */
break;
case 0xbc: /* Internal EEPROM address (low)
- Bit 0-7 - Internal EEPROM address bit 1-8
- */
+ Bit 0-7 - Internal EEPROM address bit 1-8
+ */
case 0xbd: /* Internal EEPROM address (high)
- Bit 0 - Internal EEPROM address bit 9(?)
- Bit 1-7 - Unknown
- Only 1KByte internal EEPROM??
- */
+ Bit 0 - Internal EEPROM address bit 9(?)
+ Bit 1-7 - Unknown
+ Only 1KByte internal EEPROM??
+ */
break;
case 0xbe: /* Internal EEPROM command
- Bit 0 - Read complete (read only)
- Bit 1 - Write complete (read only)
- Bit 2-3 - Unknown
- Bit 4 - Read
- Bit 5 - Write
- Bit 6 - Protect
- Bit 7 - Initialize
- */
+ Bit 0 - Read complete (read only)
+ Bit 1 - Write complete (read only)
+ Bit 2-3 - Unknown
+ Bit 4 - Read
+ Bit 5 - Write
+ Bit 6 - Protect
+ Bit 7 - Initialize
+ */
if (data & 0x20)
{
UINT16 addr = ( ( ( m_ws_portram[0xbd] << 8 ) | m_ws_portram[0xbc] ) << 1 ) & 0x1FF;
diff --git a/src/mame/video/911_vdt.cpp b/src/mame/video/911_vdt.cpp
index 6b00207b919..098bf1f6cb4 100644
--- a/src/mame/video/911_vdt.cpp
+++ b/src/mame/video/911_vdt.cpp
@@ -567,7 +567,7 @@ void vdt911_device::check_keyboard()
}
else
{ /* we are using a Western keyboard, or a katakana/Arabic keyboard in
- romaji/Latin mode */
+ romaji/Latin mode */
m_foreign_mode = false;
if (key_buf[3] & 0x0040)
diff --git a/src/mame/video/bbusters.cpp b/src/mame/video/bbusters.cpp
index 0e7362fd085..a180c485339 100644
--- a/src/mame/video/bbusters.cpp
+++ b/src/mame/video/bbusters.cpp
@@ -122,19 +122,19 @@ inline const UINT8 *bbusters_state::get_source_ptr(gfx_element *gfx, UINT32 spri
break;
case 1: /* 32 x 32 block
- 0 1
- 2 3
- */
+ 0 1
+ 2 3
+ */
ADJUST_4x4;
break;
case 2: /* 64 by 64 block
- 0 1 4 5
- 2 3 6 7
+ 0 1 4 5
+ 2 3 6 7
- 8 9 12 13
- 10 11 14 15
- */
+ 8 9 12 13
+ 10 11 14 15
+ */
ADJUST_4x4;
ADJUST_8x8;
break;
diff --git a/src/mame/video/dai.cpp b/src/mame/video/dai.cpp
index a0d36a8097c..58a9e157449 100644
--- a/src/mame/video/dai.cpp
+++ b/src/mame/video/dai.cpp
@@ -71,30 +71,30 @@ UINT32 dai_state::screen_update_dai(screen_device &screen, bitmap_ind16 &bitmap,
UINT16 current_video_memory_address = dai_video_memory_start;
UINT8 mode; /* mode byte of line
- bits 0-3 - line repeat count
- bits 4-5 - resolution control
- bits 6-7 - display mode control */
+ bits 0-3 - line repeat count
+ bits 4-5 - resolution control
+ bits 6-7 - display mode control */
UINT8 colour; /* colour byte of line
- bits 0-3 - one of 16 colours
- bits 4-5 - colour register for update
- bit 6 - if unset force 'unit colour mode'
- bit 7 - enable coulor change
- if unset bits 0-5 are ignored */
+ bits 0-3 - one of 16 colours
+ bits 4-5 - colour register for update
+ bit 6 - if unset force 'unit colour mode'
+ bit 7 - enable coulor change
+ if unset bits 0-5 are ignored */
UINT8 line_repeat_count; /* number of horizontalraster scans
- for which same data will be displayed
- 0000 - 2 lines
- each additional repeat adds 2 scans */
+ for which same data will be displayed
+ 0000 - 2 lines
+ each additional repeat adds 2 scans */
UINT8 horizontal_resolution; /* number of blobs per line
- 00 - 88 (low resolution graphics)
- 01 - 176 (medium resolution graphics)
- 10 - 352 (high resolution graphics)
- 11 - 528 (text with 66 chars per line) */
+ 00 - 88 (low resolution graphics)
+ 01 - 176 (medium resolution graphics)
+ 10 - 352 (high resolution graphics)
+ 11 - 528 (text with 66 chars per line) */
UINT8 display_mode; /* determine how data will be used
- to generate the picture
- 00 - four colour graphics
- 01 - four colour characters
- 10 - sixteen colour graphics
- 11 - sixteen colour characters */
+ to generate the picture
+ 00 - four colour graphics
+ 01 - four colour characters
+ 10 - sixteen colour graphics
+ 11 - sixteen colour characters */
UINT8 unit_mode;
UINT8 current_data_1, current_data_2;
diff --git a/src/mame/video/dynax.cpp b/src/mame/video/dynax.cpp
index 48277da36b2..5834586864a 100644
--- a/src/mame/video/dynax.cpp
+++ b/src/mame/video/dynax.cpp
@@ -1288,7 +1288,7 @@ int dynax_state::debug_viewer(bitmap_ind16 &bitmap, const rectangle &cliprect )
}
if (machine().input().code_pressed(KEYCODE_N) | machine().input().code_pressed_once(KEYCODE_J))
{
- if (i >= 2) i -= 2;
+ if (i >= 2) i -= 2;
while (i > 0 && RAM[i]) i--;
i++;
}
diff --git a/src/mame/video/flkatck.cpp b/src/mame/video/flkatck.cpp
index 2476afd3fcb..7f0cee97424 100644
--- a/src/mame/video/flkatck.cpp
+++ b/src/mame/video/flkatck.cpp
@@ -40,7 +40,7 @@ TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_A)
if ((attr == 0x0d) && (!ctrl_0) && (!ctrl_2))
bank = 0; /* this allows the game to print text
- in all banks selected by the k007121 */
+ in all banks selected by the k007121 */
SET_TILE_INFO_MEMBER(0,
code + 256*bank,