summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame
diff options
context:
space:
mode:
author Miodrag Milanovic <mmicko@gmail.com>2016-07-27 09:26:22 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2016-07-27 09:26:22 +0200
commit4887ce18443a51fd2a861da959082ad346ff4ee2 (patch)
treef21e5096b569bff399a6e03c09715502ef859c34 /src/mame
parent385f433cf4f7c3a2fa6012536a479de6ddddc68a (diff)
Cleanups and version bump
Diffstat (limited to 'src/mame')
-rw-r--r--src/mame/drivers/bfm_sc4.cpp2
-rw-r--r--src/mame/drivers/chihiro.cpp8
-rw-r--r--src/mame/drivers/ddenlovr.cpp16
-rw-r--r--src/mame/drivers/dynax.cpp66
-rw-r--r--src/mame/drivers/epos.cpp10
-rw-r--r--src/mame/drivers/esh.cpp4
-rw-r--r--src/mame/drivers/expro02.cpp2
-rw-r--r--src/mame/drivers/fccpu30.cpp16
-rw-r--r--src/mame/drivers/fcisio.cpp54
-rw-r--r--src/mame/drivers/fromance.cpp118
-rw-r--r--src/mame/drivers/galaxian.cpp4
-rw-r--r--src/mame/drivers/goldstar.cpp10
-rw-r--r--src/mame/drivers/hk68v10.cpp6
-rw-r--r--src/mame/drivers/hnayayoi.cpp2
-rw-r--r--src/mame/drivers/homedata.cpp64
-rw-r--r--src/mame/drivers/ibmpcjr.cpp2
-rw-r--r--src/mame/drivers/itech32.cpp2
-rw-r--r--src/mame/drivers/legionna.cpp12
-rw-r--r--src/mame/drivers/nbmj8688.cpp44
-rw-r--r--src/mame/drivers/nbmj8891.cpp34
-rw-r--r--src/mame/drivers/nbmj8991.cpp26
-rw-r--r--src/mame/drivers/nbmj9195.cpp38
-rw-r--r--src/mame/drivers/ohmygod.cpp2
-rw-r--r--src/mame/drivers/poisk1.cpp2
-rw-r--r--src/mame/drivers/rainbow.cpp204
-rw-r--r--src/mame/drivers/seibuspi.cpp4
-rw-r--r--src/mame/drivers/seicupbl.cpp32
-rw-r--r--src/mame/drivers/sliver.cpp4
-rw-r--r--src/mame/drivers/sm7238.cpp26
-rw-r--r--src/mame/drivers/sun4.cpp182
-rw-r--r--src/mame/drivers/tiamc1.cpp32
-rw-r--r--src/mame/drivers/tv990.cpp46
-rw-r--r--src/mame/includes/bfm_sc4.h14
-rw-r--r--src/mame/includes/legionna.h1
-rw-r--r--src/mame/includes/vendetta.h2
-rw-r--r--src/mame/machine/archimds.cpp2
-rw-r--r--src/mame/machine/opwolf.cpp28
-rw-r--r--src/mame/machine/seibucop/seibucop.cpp64
-rw-r--r--src/mame/machine/seibucop/seibucop.h2
-rw-r--r--src/mame/machine/seicop.cpp56
-rw-r--r--src/mame/machine/seicop.h4
-rw-r--r--src/mame/mame.lst12
-rw-r--r--src/mame/video/epos.cpp2
-rw-r--r--src/mame/video/gime.cpp4
-rw-r--r--src/mame/video/itech32.cpp2
-rw-r--r--src/mame/video/legionna.cpp32
-rw-r--r--src/mame/video/pcd.cpp2
-rw-r--r--src/mame/video/vtvideo.cpp28
48 files changed, 664 insertions, 665 deletions
diff --git a/src/mame/drivers/bfm_sc4.cpp b/src/mame/drivers/bfm_sc4.cpp
index 309c3f905d6..df5852c9410 100644
--- a/src/mame/drivers/bfm_sc4.cpp
+++ b/src/mame/drivers/bfm_sc4.cpp
@@ -326,7 +326,7 @@ WRITE8_MEMBER(bfm_sc45_state::mux_output2_w)
UINT16 short_data;
UINT8 byte_data_first_segment;
UINT8 byte_data_second_segment;
- for (int digit = 0; digit < 32; digit += 2)
+ for (int digit = 0; digit < 32; digit += 2)
{
short_data = (m_segment_34_cache[digit + 1] << 8) | m_segment_34_cache[digit];
byte_data_first_segment = (short_data >> 1) & 15;
diff --git a/src/mame/drivers/chihiro.cpp b/src/mame/drivers/chihiro.cpp
index 054aa568a76..002a2a07568 100644
--- a/src/mame/drivers/chihiro.cpp
+++ b/src/mame/drivers/chihiro.cpp
@@ -720,7 +720,7 @@ static const struct {
} hacks[3] = { { "chihiro", false, { { 0x6a79f/*3f79f*/, 0x01 }, { 0x6a7a0/*3f7a0*/, 0x00 }, { 0x6b575/*40575*/, 0x00 }, { 0x6b576/*40576*/, 0x00 }, { 0x6b5af/*405af*/, 0x75 }, { 0x6b78a/*4078a*/, 0x75 }, { 0x6b7ca/*407ca*/, 0x00 }, { 0x6b7b8/*407b8*/, 0x00 }, { 0x8f5b2, 0x75 }, { 0x79a9e/*2ea9e*/, 0x74 }, { 0x79b80/*2eb80*/, 0xeb }, { 0x79b97/*2eb97*/, 0x74 }, { 0, 0 } } },
{ "outr2", true, { { 0x12e4cf, 0x01 }, { 0x12e4d0, 0x00 }, { 0x4793e, 0x01 }, { 0x4793f, 0x00 }, { 0x47aa3, 0x01 }, { 0x47aa4, 0x00 }, { 0x14f2b6, 0x84 }, { 0x14f2d1, 0x75 }, { 0x8732f, 0x7d }, { 0x87384, 0x7d }, { 0x87388, 0xeb }, { 0, 0 } } },
{ "crtaxihr", false, { { 0x14ada5/*11fda5*/, 0x90 },{ 0x14ada6/*11fda6*/, 0x90 }, { 0, 0 } } },
- };
+ };
void chihiro_state::hack_usb()
{
@@ -899,7 +899,7 @@ int ohci_hlean2131qc_device::handle_nonstandard_request(int endpoint, USBSetupPa
// setup->wIndex = number of bytes to write
// data will be transferred from the host using endpoint 2 (OUT)
endpoints[endpoint].buffer[0] = 0;
- }
+ }
else if (setup->bRequest == 0x1f)
{
// this command is used to write data to external memory (with respect to the internal 8051 cpu)
@@ -907,7 +907,7 @@ int ohci_hlean2131qc_device::handle_nonstandard_request(int endpoint, USBSetupPa
// setup->wIndex = number of bytes to write
// data will be transferred from the host using endpoint 3 (OUT)
endpoints[endpoint].buffer[0] = 0;
- }
+ }
else if (setup->bRequest == 0x20)
{
// this command is used to send a set of jvs packets, each to a different node
@@ -942,7 +942,7 @@ int ohci_hlean2131qc_device::handle_nonstandard_request(int endpoint, USBSetupPa
}
else if (setup->bRequest == 0x30)
{
- // this command first disables external interrupt 0 if the lower 8 bits of setup->wValue are 0
+ // this command first disables external interrupt 0 if the lower 8 bits of setup->wValue are 0
// or enables it if those bits, seen as a signed 8 bit value, represent a number greater than 0
// then it will return in byte 4 of the data stage the value 0 if external interrupt 0 has been disabled or value 1 if it has been enabled
// and in byte 5 the value of an 8 bit counter that is incremented at every external interrupt 0
diff --git a/src/mame/drivers/ddenlovr.cpp b/src/mame/drivers/ddenlovr.cpp
index adc86a9e39a..ec87b4ac442 100644
--- a/src/mame/drivers/ddenlovr.cpp
+++ b/src/mame/drivers/ddenlovr.cpp
@@ -8198,12 +8198,12 @@ static INPUT_PORTS_START( mjflove )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2) // "s"
PORT_START("DSW2") /* IN12 - DSW2 */
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
- PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3,4,5")
+ PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3,4,5")
PORT_DIPSETTING( 0x18, "1" )
PORT_DIPSETTING( 0x14, "2" )
PORT_DIPSETTING( 0x10, "3" )
@@ -8212,17 +8212,17 @@ static INPUT_PORTS_START( mjflove )
PORT_DIPSETTING( 0x08, "6" )
PORT_DIPSETTING( 0x04, "7" )
PORT_DIPSETTING( 0x00, "8" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:8")
+ PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:8")
/*
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Test ) ) PORT_DIPLOCATION("SW1:8")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )*/
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Test ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )*/
PORT_START("DSW1") /* IN11 - DSW1 */
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:1" )
diff --git a/src/mame/drivers/dynax.cpp b/src/mame/drivers/dynax.cpp
index 02036eb868a..f183ebdd0cd 100644
--- a/src/mame/drivers/dynax.cpp
+++ b/src/mame/drivers/dynax.cpp
@@ -2612,33 +2612,33 @@ INPUT_PORTS_END
static INPUT_PORTS_START( mjdialq2 )
PORT_START("DSW0")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x04, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x38, 0x20, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5,6")
- PORT_DIPSETTING( 0x38, "1 (Easy)" )
- PORT_DIPSETTING( 0x30, "2" )
- PORT_DIPSETTING( 0x28, "3" )
- PORT_DIPSETTING( 0x20, "4" )
- PORT_DIPSETTING( 0x18, "5" )
- PORT_DIPSETTING( 0x10, "6" )
- PORT_DIPSETTING( 0x08, "7" )
- PORT_DIPSETTING( 0x00, "8 (Hard)" )
-
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x38, 0x20, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5,6")
+ PORT_DIPSETTING( 0x38, "1 (Easy)" )
+ PORT_DIPSETTING( 0x30, "2" )
+ PORT_DIPSETTING( 0x28, "3" )
+ PORT_DIPSETTING( 0x20, "4" )
+ PORT_DIPSETTING( 0x18, "5" )
+ PORT_DIPSETTING( 0x10, "6" )
+ PORT_DIPSETTING( 0x08, "7" )
+ PORT_DIPSETTING( 0x00, "8 (Hard)" )
+
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x07, 0x07, "Time Setting" ) PORT_DIPLOCATION("SW2:1,2,3")
+ PORT_DIPNAME( 0x07, 0x07, "Time Setting" ) PORT_DIPLOCATION("SW2:1,2,3")
PORT_DIPSETTING( 0x07, "08:30" )
PORT_DIPSETTING( 0x06, "09:00" )
PORT_DIPSETTING( 0x05, "09:30" )
@@ -2647,19 +2647,19 @@ static INPUT_PORTS_START( mjdialq2 )
PORT_DIPSETTING( 0x02, "11:00" )
PORT_DIPSETTING( 0x01, "11:30" )
PORT_DIPSETTING( 0x00, "12:00" )
- PORT_DIPNAME( 0x08, 0x00, "Time Service" ) PORT_DIPLOCATION("SW2:4") // "secret moves" happen at certain time stamps
+ PORT_DIPNAME( 0x08, 0x00, "Time Service" ) PORT_DIPLOCATION("SW2:4") // "secret moves" happen at certain time stamps
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "TEL Display" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, "TEL Display" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPNAME( 0x20, 0x20, "GAL mode" ) PORT_DIPLOCATION("SW2:6") // unknown what this does
+ PORT_DIPNAME( 0x20, 0x20, "GAL mode" ) PORT_DIPLOCATION("SW2:6") // unknown what this does
PORT_DIPSETTING( 0x20, "1" )
PORT_DIPSETTING( 0x00, "2" )
- PORT_DIPNAME( 0x40, 0x40, "Select Special Item" ) PORT_DIPLOCATION("SW2:7")/* Allows to select which one of the nine special items you want. */
+ PORT_DIPNAME( 0x40, 0x40, "Select Special Item" ) PORT_DIPLOCATION("SW2:7")/* Allows to select which one of the nine special items you want. */
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Debug" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x80, "Debug" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -6381,24 +6381,24 @@ ROM_END
/*
Intergirl by Barko
-1x GM68A45S uj11 CRT Controller (CRTC)
-1x Z8400ADSD-Z80ACPU ug8 8-bit Microprocessor - main
-1x GL324 u14 Quad Operational Amplifier - sound
-1x YM2203C uj5 FM Operator Type-N (OPM) - sound
-1x YM3014B u13 D/A Converter (DAC) - sound
-1x oscillator 22.1184MHz xt1
+1x GM68A45S uj11 CRT Controller (CRTC)
+1x Z8400ADSD-Z80ACPU ug8 8-bit Microprocessor - main
+1x GL324 u14 Quad Operational Amplifier - sound
+1x YM2203C uj5 FM Operator Type-N (OPM) - sound
+1x YM3014B u13 D/A Converter (DAC) - sound
+1x oscillator 22.1184MHz xt1
ROMs
-2x TMS27C512 1,2 dumped
-3x TMS27C020 3,4,5 dumped
+2x TMS27C512 1,2 dumped
+3x TMS27C020 3,4,5 dumped
RAMs
-1x GM76C88AL-15 ug1
-6x KM424C64P-10 uf13,uf13a,uf14,uf15,uf16,uf17
+1x GM76C88AL-15 ug1
+6x KM424C64P-10 uf13,uf13a,uf14,uf15,uf16,uf17
PLDs
-1x PAL16L8ACN ug6 read protected
-1x CY7C381-0JC read protected
+1x PAL16L8ACN ug6 read protected
+1x CY7C381-0JC read protected
*/
ROM_START( intrgirl )
@@ -6415,7 +6415,7 @@ ROM_START( intrgirl )
ROM_LOAD( "n82s147n.uk15", 0x000, 0x200, NO_DUMP )
ROM_LOAD( "n82s147n.uk16", 0x200, 0x200, NO_DUMP )
- ROM_REGION( 0x104, "pals", ROMREGION_ERASE00 )
+ ROM_REGION( 0x104, "pals", ROMREGION_ERASE00 )
ROM_LOAD( "pal16l8acn.ug6", 0x000, 0x104, NO_DUMP ) //read protected
ROM_END
diff --git a/src/mame/drivers/epos.cpp b/src/mame/drivers/epos.cpp
index 538799158f1..2afbd439cdd 100644
--- a/src/mame/drivers/epos.cpp
+++ b/src/mame/drivers/epos.cpp
@@ -27,10 +27,10 @@
between the two palettes. This effect is not emulated, but since both
halfs of the palette are identical, this is not an issue. See $039c.
The other games have a different color test, not using the busy loop.
-
- - Find out how Beastie Feastie's 2nd player inputs work.
-
- - Fix flip screen support for The Dealer and Beastie Feastie.
+
+ - Find out how Beastie Feastie's 2nd player inputs work.
+
+ - Fix flip screen support for The Dealer and Beastie Feastie.
***************************************************************************/
@@ -355,7 +355,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( beastf )
PORT_INCLUDE(dealer)
-
+
PORT_MODIFY("INPUTS")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
diff --git a/src/mame/drivers/esh.cpp b/src/mame/drivers/esh.cpp
index b3bcfd51cd9..588782f3394 100644
--- a/src/mame/drivers/esh.cpp
+++ b/src/mame/drivers/esh.cpp
@@ -150,8 +150,8 @@ WRITE8_MEMBER(esh_state::misc_write)
{
/* Bit 0 unknown */
-// if (data & 0x02)
-// logerror("BEEP!\n");
+// if (data & 0x02)
+// logerror("BEEP!\n");
m_beep->set_state(BIT(data, 1)); // polarity unknown
/* Bit 2 unknown */
m_ld_video_visible = bool(!((data & 0x08) >> 3));
diff --git a/src/mame/drivers/expro02.cpp b/src/mame/drivers/expro02.cpp
index b1bbf6448fc..cf39a1db0a7 100644
--- a/src/mame/drivers/expro02.cpp
+++ b/src/mame/drivers/expro02.cpp
@@ -228,7 +228,7 @@ public:
m_kaneko_spr(*this, "kan_spr"),
m_spriteram(*this, "spriteram")
{ }
-
+
required_device<cpu_device> m_maincpu;
required_device<palette_device> m_palette;
required_device<screen_device> m_screen;
diff --git a/src/mame/drivers/fccpu30.cpp b/src/mame/drivers/fccpu30.cpp
index cfef6508309..3687f4f81a0 100644
--- a/src/mame/drivers/fccpu30.cpp
+++ b/src/mame/drivers/fccpu30.cpp
@@ -352,11 +352,11 @@ READ8_MEMBER (fccpu30_state::rotary_rd){
*/
READ8_MEMBER (fccpu30_state::board_mem_id_rd){
LOG(("%s\n", FUNCNAME));
- // return 0x6A; // CPU-30 R4 with 4Mb of shared RAM. TODO: make this configurable from commandline or artwork
- // return 0x57; // blankt 53 56
- // return 0x36; // CPU-26 1Mb 36 MHz
- // return 0x35; // CPU-26 1Mb 36 MHz
- return 0x36; // CPU-26 1Mb 36 MHz
+ // return 0x6A; // CPU-30 R4 with 4Mb of shared RAM. TODO: make this configurable from commandline or artwork
+ // return 0x57; // blankt 53 56
+ // return 0x36; // CPU-26 1Mb 36 MHz
+ // return 0x35; // CPU-26 1Mb 36 MHz
+ return 0x36; // CPU-26 1Mb 36 MHz
}
#if 0
@@ -415,7 +415,7 @@ MACHINE_CONFIG_END
ROM_START (fccpu30)
ROM_REGION32_BE(0x900000, "roms", 0)
-// Boots with Board ID set to: 0x36
+// Boots with Board ID set to: 0x36
ROM_LOAD16_BYTE("CPU33LO.BIN", 0x000001, 0x40000, CRC (49895fdf) SHA1 (733abd144c95225a2faf920490e31df2a27f8e03))
ROM_LOAD16_BYTE("CPU33UP.BIN", 0x000000, 0x40000, CRC (cfe75e94) SHA1 (d40e0635a48607be25f7c58c74b53b7e58fe735d))
@@ -425,9 +425,9 @@ ROM_START (fccpu30)
ROM_LOAD32_BYTE("CPU30LO.BIN", 0x000002, 0x20000, CRC (fefa88ed) SHA1 (71a9ad807c0c2da5c6f6a6dc68c73ad8b52f3ea9))
ROM_LOAD32_BYTE("CPU30UP.BIN", 0x000001, 0x20000, CRC (dfed1f68) SHA1 (71478a77d5ab5da0fabcd78e69537919b560e3b8))
ROM_LOAD32_BYTE("CPU30UU.BIN", 0x000000, 0x20000, CRC (66e95cc2) SHA1 (acdb468a3a5974295b81271d617de7f101098891))
-#endif
+#endif
-// Same binary for many boards, attempts to detect CPU speed etc, currently failing detection but boots system roms anyway
+// Same binary for many boards, attempts to detect CPU speed etc, currently failing detection but boots system roms anyway
ROM_LOAD ("PGA-002.bin", 0x800000, 0x10000, CRC(faa38972) SHA1(651dfc2f9a865fc6adf49dad90f9e705f2889919) )
ROM_END
diff --git a/src/mame/drivers/fcisio.cpp b/src/mame/drivers/fcisio.cpp
index 4e33d41c8a8..6b068f4c9e7 100644
--- a/src/mame/drivers/fcisio.cpp
+++ b/src/mame/drivers/fcisio.cpp
@@ -118,7 +118,7 @@ static ADDRESS_MAP_START (fcisio1_mem, AS_PROGRAM, 16, fcisio1_state)
AM_RANGE (0xe60000, 0xe601ff) AM_DEVREADWRITE8("duscc3", duscc68562_device, read, write, 0x00ff)
AM_RANGE (0xe80000, 0xe80dff) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff)
AM_RANGE (0xf00000, 0xf7ffff) AM_ROM /* System EPROM Area 32Kb DEBUGGER supplied */
-// AM_RANGE (0xc40000, 0xc800ff) AM_READWRITE8 (not_implemented_r, not_implemented_w, 0xffff) /* Dummy mapping af address area to display message */
+// AM_RANGE (0xc40000, 0xc800ff) AM_READWRITE8 (not_implemented_r, not_implemented_w, 0xffff) /* Dummy mapping af address area to display message */
ADDRESS_MAP_END
/* Start it up */
@@ -155,14 +155,14 @@ WRITE8_MEMBER (fcisio1_state::not_implemented_w){
// TODO: Get a manual to understand the config options for real
READ8_MEMBER (fcisio1_state::config_rd){
- UINT8 ret = 0;
+ UINT8 ret = 0;
LOG(("%s\n", FUNCNAME));
// Port B bit #7, 0x80 Self test bit, choose either of these two lines
ret &= ~0x80; // 0 = selftest
- // ret |= 0x80; // 1 = no selftest
+ // ret |= 0x80; // 1 = no selftest
- return ret;
+ return ret;
}
/* Input ports */
@@ -211,7 +211,7 @@ ROM_START (fcisio1)
/* ISIO ROM:s v2.1 information
* PIT setup sequence
* 00 -> REG_PGCR
- * 18 -> REG_PSRR
+ * 18 -> REG_PSRR
* 0f -> Reg PADDR
* 0f -> REG_PBDDR
* fa -> REG_PACR
@@ -225,7 +225,7 @@ ROM_START (fcisio1)
* 40 -> Reg PIVR
* 00 -> REG_TCR - timer disabled, all C pins, use preload, CLK and prescaler are used
* a0 -> REG_TCR - timer disabled, The dual-function pin PC3/TOUT carries the TOUTfunction and is used as a timer interrupt request
- * output. The timer interrupt is enabled ; thus, the pin is low when the timer ZDS status bit is one. The dual-function
+ * output. The timer interrupt is enabled ; thus, the pin is low when the timer ZDS status bit is one. The dual-function
* pin PC7/TIACK carries the TIACK function and is used as a timer interrupt acknowledge input.
* 00 -> Reg 0x12
* 00 -> REG_CPRH
@@ -263,39 +263,39 @@ ROM_START (fcisio1)
* 00 -> REG_PCDR
* ------- repeated 16 times -------------------
* a1 -> REG_TCR - timer enabled, The dual-function pin PC3/TOUT carries the TOUTfunction and is used as a timer interrupt request
- * output. The timer interrupt is enabled ; thus, the pin is low when the timer ZDS status bit is one. The dual-function
+ * output. The timer interrupt is enabled ; thus, the pin is low when the timer ZDS status bit is one. The dual-function
* pin PC7/TIACK carries the TIACK function and is used as a timer interrupt acknowledge input.
* ?? <- Reg 0x0c
* ---------------------------------------------
*
* DUSCC0 channel A setup sequence
- * 0f 00 -> REG_CCR - Reset Tx
- * 0f 40 -> REG_CCR - Reset Rx
- * 00 07 -> REG_CMR1 - Async mode
- * 01 38 -> REG_CMR2 - Normal polled or interrupt mode, no DMA
- * 02 00 -> REG_S1R - SYN1, Secondary Address 1 Register, 0 = no sync
- * 03 00 -> REG_S2R - SYN2, only used in COP dual Sync mode but alao 0 = no sync
+ * 0f 00 -> REG_CCR - Reset Tx
+ * 0f 40 -> REG_CCR - Reset Rx
+ * 00 07 -> REG_CMR1 - Async mode
+ * 01 38 -> REG_CMR2 - Normal polled or interrupt mode, no DMA
+ * 02 00 -> REG_S1R - SYN1, Secondary Address 1 Register, 0 = no sync
+ * 03 00 -> REG_S2R - SYN2, only used in COP dual Sync mode but alao 0 = no sync
* 04 7F -> REG_TPR - Tx 8 bits, CTS and RTS, 1 STOP bit
* 05 3d -> REG_TTR - Tx BRG 9600 (assuming a 14.7456 crystal)
* 06 1b -> REG_RPR - Rx RTS, 8 bits, no DCD, no parity
* 07 2d -> REG_RTR - Rx BRG 9600 (assuming a 14.7456 crystal)
- * 0b e1 -> REG_OMR - RTS high, OUT1 = OUT2 = high, RxRdy asserted for each character,
- * TxRdy asserted on threshold, Same Tx Residual Character Length as for REG_TPR
- * 0a 00 -> REG_CTCR - Counter/Timer control register 00 = Zero Det Int: disabled, Zero Det Control: preset,
- * Output Control: square, Prescaler: 1, Clock Source: RTxC pin
- * 09 00 -> REG_CTPRL - Counter/Timer Prescaler Register Low = 0
- * 08 00 -> REG_CTPRH - Counter/Timer Prescaler Register High = 0
- * 0f 00 -> REG_CCR - Reset Tx
- * 0f 02 -> REG_CCR - Enable Tx
- * 0f 40 -> REG_CCR - Reset Rx
- * 0f 42 -> REG_CCR - Enable Rx
- * 0f 02 -> REG_CCR - Enable Tx
- * 0f 42 -> REG_CCR - Enable Rx
+ * 0b e1 -> REG_OMR - RTS high, OUT1 = OUT2 = high, RxRdy asserted for each character,
+ * TxRdy asserted on threshold, Same Tx Residual Character Length as for REG_TPR
+ * 0a 00 -> REG_CTCR - Counter/Timer control register 00 = Zero Det Int: disabled, Zero Det Control: preset,
+ * Output Control: square, Prescaler: 1, Clock Source: RTxC pin
+ * 09 00 -> REG_CTPRL - Counter/Timer Prescaler Register Low = 0
+ * 08 00 -> REG_CTPRH - Counter/Timer Prescaler Register High = 0
+ * 0f 00 -> REG_CCR - Reset Tx
+ * 0f 02 -> REG_CCR - Enable Tx
+ * 0f 40 -> REG_CCR - Reset Rx
+ * 0f 42 -> REG_CCR - Enable Rx
+ * 0f 02 -> REG_CCR - Enable Tx
+ * 0f 42 -> REG_CCR - Enable Rx
* 0e 27 -> REG_PCR - TRxC = RxCLK 1x, RTxC is input, RTS, GPO2, crystal oscillator connected to X2
- * 1c 10 -> REG_IER - Interrupt Enable Register: RxRdy generates interrupt
+ * 1c 10 -> REG_IER - Interrupt Enable Register: RxRdy generates interrupt
* ... chan B setup with same data....
* ---- DUSCC0 to DUSCC3, setup with same data except at the end of each setup:
- * 1e 1c -> DUSCC0 REG_IVR -
+ * 1e 1c -> DUSCC0 REG_IVR -
* 1e 1b -> DUSCC1 REG_IVR
* 1e 1a -> DUSCC2 REG_IVR
* 1e 19 -> DUSCC3 REG_IVR
diff --git a/src/mame/drivers/fromance.cpp b/src/mame/drivers/fromance.cpp
index c9729606561..33a5cb017ce 100644
--- a/src/mame/drivers/fromance.cpp
+++ b/src/mame/drivers/fromance.cpp
@@ -722,49 +722,49 @@ static INPUT_PORTS_START( daiyogen )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:!1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:!1")
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
- PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW1:!2,!3")
+ PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW1:!2,!3")
PORT_DIPSETTING( 0x00, "1,000" )
- PORT_DIPSETTING( 0x04, "1,500" )
+ PORT_DIPSETTING( 0x04, "1,500" )
PORT_DIPSETTING( 0x02, "2,000" )
PORT_DIPSETTING( 0x06, "3,000" )
- PORT_DIPNAME( 0x18, 0x00, "Computer Difficulty" ) PORT_DIPLOCATION("SW1:!4,!5")
+ PORT_DIPNAME( 0x18, 0x00, "Computer Difficulty" ) PORT_DIPLOCATION("SW1:!4,!5")
PORT_DIPSETTING( 0x10, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x18, DEF_STR( Very_Hard ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:!6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:!6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:!7" )
- PORT_DIPNAME( 0x80, 0x00, "YAKUMAN STOP" ) PORT_DIPLOCATION("SW1:!8") // not sure what this is supposed to mean
+ PORT_DIPNAME( 0x80, 0x00, "YAKUMAN STOP" ) PORT_DIPLOCATION("SW1:!8") // not sure what this is supposed to mean
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("DSW2")
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!1,!2,!3")
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!1,!2,!3")
PORT_DIPSETTING( 0x00, "1" )
- PORT_DIPSETTING( 0x04, "2" )
+ PORT_DIPSETTING( 0x04, "2" )
PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x06, "4" )
- PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x06, "4" )
+ PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x05, "6" )
- PORT_DIPSETTING( 0x03, "7" )
+ PORT_DIPSETTING( 0x03, "7" )
PORT_DIPSETTING( 0x07, "8" )
- PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!4,!5")
+ PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!4,!5")
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 3C_1C ) )
- PORT_DIPNAME( 0x20, 0x00, "Ignore FURITEN" ) PORT_DIPLOCATION("SW2:!6")
+ PORT_DIPNAME( 0x20, 0x00, "Ignore FURITEN" ) PORT_DIPLOCATION("SW2:!6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW2:!7")
+ PORT_DIPNAME( 0x40, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW2:!7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:!8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:!8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
@@ -793,50 +793,50 @@ static INPUT_PORTS_START( mjnatsu )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) // COIN1
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW2")
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!1,!2,!3")
- PORT_DIPSETTING( 0x00, "1" )
- PORT_DIPSETTING( 0x04, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x06, "4" )
- PORT_DIPSETTING( 0x01, "5" )
- PORT_DIPSETTING( 0x05, "6" )
- PORT_DIPSETTING( 0x03, "7" )
- PORT_DIPSETTING( 0x07, "8" )
- PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!4,!5")
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x18, DEF_STR( 3C_1C ) )
- PORT_DIPNAME( 0x20, 0x00, "Ignore FURITEN" ) PORT_DIPLOCATION("SW1:!6")
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW1:!7")
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:!8")
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x80, DEF_STR( On ) )
-
- PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:!1")
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
- PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW2:!2,!3")
- PORT_DIPSETTING( 0x00, "1,000" )
- PORT_DIPSETTING( 0x04, "2,000" )
- PORT_DIPSETTING( 0x02, "3,000" )
- PORT_DIPSETTING( 0x06, "5,000" )
- PORT_DIPNAME( 0x08, 0x00, "Start GOLD" ) PORT_DIPLOCATION("SW2:!4")
- PORT_DIPSETTING( 0x00, "1,000" )
- PORT_DIPSETTING( 0x08, "6,000" )
- PORT_DIPNAME( 0x10, 0x00, "Item Shop Voice" ) PORT_DIPLOCATION("SW2:!5")
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, "Stop Button (N)" ) PORT_DIPLOCATION("SW2:!6")
- PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:!7" )
+ PORT_START("DSW2")
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!1,!2,!3")
+ PORT_DIPSETTING( 0x00, "1" )
+ PORT_DIPSETTING( 0x04, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x06, "4" )
+ PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x05, "6" )
+ PORT_DIPSETTING( 0x03, "7" )
+ PORT_DIPSETTING( 0x07, "8" )
+ PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!4,!5")
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x18, DEF_STR( 3C_1C ) )
+ PORT_DIPNAME( 0x20, 0x00, "Ignore FURITEN" ) PORT_DIPLOCATION("SW1:!6")
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW1:!7")
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:!8")
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( On ) )
+
+ PORT_START("DSW1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:!1")
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW2:!2,!3")
+ PORT_DIPSETTING( 0x00, "1,000" )
+ PORT_DIPSETTING( 0x04, "2,000" )
+ PORT_DIPSETTING( 0x02, "3,000" )
+ PORT_DIPSETTING( 0x06, "5,000" )
+ PORT_DIPNAME( 0x08, 0x00, "Start GOLD" ) PORT_DIPLOCATION("SW2:!4")
+ PORT_DIPSETTING( 0x00, "1,000" )
+ PORT_DIPSETTING( 0x08, "6,000" )
+ PORT_DIPNAME( 0x10, 0x00, "Item Shop Voice" ) PORT_DIPLOCATION("SW2:!5")
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x00, "Stop Button (N)" ) PORT_DIPLOCATION("SW2:!6")
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:!7" )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:!8" )
PORT_INCLUDE( mahjong_panel )
diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp
index dc6807fc286..816b2206e66 100644
--- a/src/mame/drivers/galaxian.cpp
+++ b/src/mame/drivers/galaxian.cpp
@@ -5862,11 +5862,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( turpins, turtles )
// the ROMs came from a blister, so there aren't PCB infos available. Chip types and clocks are guessed.
-
+
/* alternate memory map */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(turpins_map)
-
+
MCFG_CPU_MODIFY("audiocpu")
MCFG_CPU_PROGRAM_MAP(turpins_sound_map)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp
index b3d2011f7c8..01636756c80 100644
--- a/src/mame/drivers/goldstar.cpp
+++ b/src/mame/drivers/goldstar.cpp
@@ -14680,7 +14680,7 @@ ROM_END
The taiwanese hardware needs better decoded reels graphics ROMs,
The chars/text graphics are properly decodes, but texts strings
look bad in the game.
-
+
*******************************************************************************************/
/*
@@ -15567,8 +15567,8 @@ DRIVER_INIT_MEMBER(wingco_state, flaming7)
/* Patch to bypass the iButton electronic serial number check.
5D79: jumps to $5D83 for the demo game.
- just patched to jump to $5D80 (jmp $6115)
- where the check is succesfull.
+ just patched to jump to $5D80 (jmp $6115)
+ where the check is succesfull.
*/
UINT8 *ROM = memregion("maincpu")->base();
ROM[0x5d7a] = 0x05;
@@ -15586,8 +15586,8 @@ DRIVER_INIT_MEMBER(wingco_state, flam7_tw)
/* Patch to bypass the iButton electronic serial number check.
60B2: After last compare, code jumps to $60BC for the demo game.
- Just patched to jump to $60B9 (jmp $644E) where the check
- is succesfull.
+ Just patched to jump to $60B9 (jmp $644E) where the check
+ is succesfull.
*/
UINT8 *ROM = memregion("maincpu")->base();
ROM[0x60b3] = 0x05;
diff --git a/src/mame/drivers/hk68v10.cpp b/src/mame/drivers/hk68v10.cpp
index cab10d05ac0..0020375ea63 100644
--- a/src/mame/drivers/hk68v10.cpp
+++ b/src/mame/drivers/hk68v10.cpp
@@ -370,15 +370,15 @@ ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e6869
* :scc B Reg 05 <- ea Setting up the transmitter, Transmitter Enable 1, Transmitter Bits/Character 8, Send Break 0, RTS=1, DTR=1
* :scc B Reg 03 <- e1 Setting up the receiver, Receiver Enable 1, Auto Enables 1, Receiver Bits/Character 8
* :scc B Reg 09 <- 00 Master Interrupt Control - No reset 02 A&B: RTS=1 DTR=1 INT=0 Vector generated
- * :scc B Reg 01 <- 00 Ext INT:0 Tx INT:0 Parity SC:0 Wait/Ready Enable:0 as Wait on Transmit, Rx INT:0
+ * :scc B Reg 01 <- 00 Ext INT:0 Tx INT:0 Parity SC:0 Wait/Ready Enable:0 as Wait on Transmit, Rx INT:0
* :scc B Reg 0b <- 56 Clock Mode Control 55 Clock type TTL level on RTxC pin, RCV CLK=BRG, TRA CLK=BRG, TRxC pin is Output, TRxC CLK=BRG - not_implemented
* :scc B Reg 0c <- 0b Low byte of Time Constant for Baudrate generator -> 38400 baud
* :scc B Reg 0d <- 00 High byte of Time Constant for Baudrate generator
* :scc B Reg 0e <- 03 Misc Control Bits DPLL NULL Command, BRG enabled SRC=PCLK, BRG SRC bps=307200=PCLK 4915200/16, BRG OUT 9600=307200/16(32)
- * Repeated for :scc A
+ * Repeated for :scc A
* :scc B Reg 0c <- 0e Low byte of Time Constant for Baudrate generator -> 9600 baud
* :scc B Reg 0d <- 00 High byte of Time Constant for Baudrate generator
- * Repeated for :scc A
+ * Repeated for :scc A
*/
ROM_END
diff --git a/src/mame/drivers/hnayayoi.cpp b/src/mame/drivers/hnayayoi.cpp
index ad8fc057afc..3afc8c0def9 100644
--- a/src/mame/drivers/hnayayoi.cpp
+++ b/src/mame/drivers/hnayayoi.cpp
@@ -424,7 +424,7 @@ static INPUT_PORTS_START( untoucha )
PORT_DIPNAME( 0x40, 0x40, "Speech" ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPNAME( 0x20, 0x20, "Unknown (Aumit?)" ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x20, 0x20, "Unknown (Aumit?)" ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) /* DIPSW sheet says 'AUMIT CUT WHEN ON' */
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) /* Maybe it is Audit, but where/what? */
PORT_DIPNAME( 0x10, 0x10, "Auto Hold" ) PORT_DIPLOCATION("SW2:4")
diff --git a/src/mame/drivers/homedata.cpp b/src/mame/drivers/homedata.cpp
index f5d2a6181b1..b19ab6dd652 100644
--- a/src/mame/drivers/homedata.cpp
+++ b/src/mame/drivers/homedata.cpp
@@ -639,19 +639,19 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( mjhokite )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW1:7" )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:6,5")
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW1:7" )
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:6,5")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x10, 0x10, "Initial Score" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x10, 0x10, "Initial Score" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x10, "1000" )
PORT_DIPSETTING( 0x00, "2000" )
- PORT_DIPNAME( 0xe0, 0x80, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3,2,1")
+ PORT_DIPNAME( 0xe0, 0x80, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3,2,1")
PORT_DIPSETTING( 0xe0, "1 (easiest)" )
PORT_DIPSETTING( 0xc0, "2" )
PORT_DIPSETTING( 0xa0, "3" )
@@ -662,18 +662,18 @@ static INPUT_PORTS_START( mjhokite )
PORT_DIPSETTING( 0x00, "8 (hardest)" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x00, "Girl Voice" ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x02, 0x00, "Girl Voice" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:6" )
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:5" )
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:5" )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:4" )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:3" )
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:3" )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:2" )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:1" )
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:1" )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
@@ -913,30 +913,30 @@ INPUT_PORTS_END
static INPUT_PORTS_START( pteacher )
PORT_START("DSW") /* dip switches (handled by pteacher_keyboard_r) */
- PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0002, 0x0000, "In-Game BGM") PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x0002, 0x0000, "In-Game BGM") PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4")
- PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
- PORT_DIPSETTING( 0x0004, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x000c, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x0008, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x0010, 0x0010, "Female Voices" ) PORT_DIPLOCATION("SW1:5")
- PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW1:6" )
- PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
- PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
-
- PORT_SERVICE_DIPLOC(0x0100, IP_ACTIVE_LOW, "SW2:1" )
- PORT_DIPUNKNOWN_DIPLOC( 0x0200, 0x0200, "SW2:2" )
- PORT_DIPUNKNOWN_DIPLOC( 0x0400, 0x0400, "SW2:3" )
- PORT_DIPUNKNOWN_DIPLOC( 0x0800, 0x0800, "SW2:4" )
+ PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
+ PORT_DIPSETTING( 0x0004, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x000c, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x0008, DEF_STR( 1C_2C ) )
+ PORT_DIPNAME( 0x0010, 0x0010, "Female Voices" ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW1:6" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" )
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+
+ PORT_SERVICE_DIPLOC(0x0100, IP_ACTIVE_LOW, "SW2:1" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x0200, 0x0200, "SW2:2" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x0400, 0x0400, "SW2:3" )
+ PORT_DIPUNKNOWN_DIPLOC( 0x0800, 0x0800, "SW2:4" )
PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("COIN")
@@ -950,8 +950,8 @@ INPUT_PORTS_END
static INPUT_PORTS_START( mjjoship )
PORT_INCLUDE( pteacher )
- // Manual wrong for this game - it's an incomplete version of the
- // pteacher set, with no service mode and start score instead of
+ // Manual wrong for this game - it's an incomplete version of the
+ // pteacher set, with no service mode and start score instead of
// girl voices. Coins stated in manual in same place but do nothing
PORT_MODIFY("DSW")
diff --git a/src/mame/drivers/ibmpcjr.cpp b/src/mame/drivers/ibmpcjr.cpp
index 6d3859f7183..878b6ff29dd 100644
--- a/src/mame/drivers/ibmpcjr.cpp
+++ b/src/mame/drivers/ibmpcjr.cpp
@@ -613,7 +613,7 @@ static MACHINE_CONFIG_START( ibmpcjr, pcjr_state)
/* video hardware */
MCFG_PCVIDEO_PCJR_ADD("pcvideo_pcjr")
MCFG_VIDEO_SET_SCREEN("pcvideo_pcjr:screen")
-
+
MCFG_GFXDECODE_ADD("gfxdecode", "pcvideo_pcjr:palette", pcjr)
/* sound hardware */
diff --git a/src/mame/drivers/itech32.cpp b/src/mame/drivers/itech32.cpp
index af9304a915d..1b0ef8b6137 100644
--- a/src/mame/drivers/itech32.cpp
+++ b/src/mame/drivers/itech32.cpp
@@ -443,7 +443,7 @@ WRITE16_MEMBER(itech32_state::int1_ack_w)
void itech32_state::machine_start()
{
membank("soundbank")->configure_entries(0, 256, memregion("soundcpu")->base() + 0x10000, 0x4000);
-
+
save_item(NAME(m_vint_state));
save_item(NAME(m_xint_state));
save_item(NAME(m_qint_state));
diff --git a/src/mame/drivers/legionna.cpp b/src/mame/drivers/legionna.cpp
index 87d29f816e9..08c4480e40b 100644
--- a/src/mame/drivers/legionna.cpp
+++ b/src/mame/drivers/legionna.cpp
@@ -904,13 +904,13 @@ static INPUT_PORTS_START( cupsoc )
// TODO: dip-conditional with coin slots
// SEIBU_COIN_INPUTS override
PORT_START("COIN")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("SYSTEM")
@@ -931,7 +931,7 @@ static INPUT_PORTS_START( cupsoc )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
diff --git a/src/mame/drivers/nbmj8688.cpp b/src/mame/drivers/nbmj8688.cpp
index 455f67c5dbf..314a62da37f 100644
--- a/src/mame/drivers/nbmj8688.cpp
+++ b/src/mame/drivers/nbmj8688.cpp
@@ -2210,7 +2210,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( ojousan )
PORT_START("DSWA")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2,3")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2,3")
PORT_DIPSETTING( 0x07, "1 (Easy)" )
PORT_DIPSETTING( 0x06, "2" )
PORT_DIPSETTING( 0x05, "3" )
@@ -2219,10 +2219,10 @@ static INPUT_PORTS_START( ojousan )
PORT_DIPSETTING( 0x02, "6" )
PORT_DIPSETTING( 0x01, "7" )
PORT_DIPSETTING( 0x00, "8 (Hard)" )
- PORT_DIPNAME( 0x08, 0x00, "RENCHAN after TENPAIed RYUKYOKU" ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x00, "RENCHAN after TENPAIed RYUKYOKU" ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Character Display Test" ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x10, 0x10, "Character Display Test" ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SWA:6" )
@@ -3029,7 +3029,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( swinggal, ojousan )
- MCFG_CPU_MODIFY("maincpu")
+ MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(secolove_map)
MCFG_CPU_IO_MAP(iemoto_io_map)
MACHINE_CONFIG_END
@@ -3560,23 +3560,23 @@ ROM_START( ojousanm )
ROM_END
ROM_START( swinggal )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* program */
- ROM_LOAD( "1.4G", 0x00000, 0x08000, CRC(e0e94bb9) SHA1(f514993614376c2175e906eab2776567e0c32f67) )
- ROM_LOAD( "2.3G", 0x08000, 0x08000, CRC(577d786e) SHA1(e47e78d8607be0e41c2b220eb367f67e5e19c481) )
-
- ROM_REGION( 0x30000, "voice", 0 ) /* voice */
- ROM_LOAD( "3I", 0x00000, 0x10000, CRC(b15ac0c4) SHA1(88c7a0be533465fc9c6833e52bcb1729c2307d06) )
- ROM_LOAD( "2I", 0x10000, 0x10000, CRC(ff44d460) SHA1(cd070b6b48cfafa67e9fe778a2a31e623caa3ddd) )
- ROM_LOAD( "1I", 0x20000, 0x10000, CRC(05294295) SHA1(bb2114dccc94545664c10a9e32ebd87eed59865c) )
-
- ROM_REGION( 0x1c0000, "gfx1", 0 ) /* gfx */
- /* 000000-0fffff empty */
- ROM_LOAD( "3.5A", 0x100000, 0x20000, CRC(c1f49332) SHA1(35e4db593ab54b0ab6734a377cc2ed1c8670314c) )
- ROM_LOAD( "4.6A", 0x120000, 0x20000, CRC(f9bac001) SHA1(3aa707c75c27b968303bb8bc007e5da872a807f5) )
- ROM_LOAD( "5.7A", 0x140000, 0x20000, CRC(d9ec3418) SHA1(0d29d800a821b6806dc6b9d5a7aaa0939346ddc4) )
- ROM_LOAD( "6.8A", 0x160000, 0x20000, CRC(5a966741) SHA1(c122ada315f09b0851947e9efd67e0a11663cf66) )
- ROM_LOAD( "7.9A", 0x180000, 0x20000, CRC(93abe5c5) SHA1(d71da2ded70726af0aa1ee751fbab758326447ab) )
- ROM_LOAD( "8.10A", 0x1a0000, 0x20000, CRC(010d353d) SHA1(5ea7fd6f26f6ad484bb6e07e66e8c25d178ac037) )
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* program */
+ ROM_LOAD( "1.4G", 0x00000, 0x08000, CRC(e0e94bb9) SHA1(f514993614376c2175e906eab2776567e0c32f67) )
+ ROM_LOAD( "2.3G", 0x08000, 0x08000, CRC(577d786e) SHA1(e47e78d8607be0e41c2b220eb367f67e5e19c481) )
+
+ ROM_REGION( 0x30000, "voice", 0 ) /* voice */
+ ROM_LOAD( "3I", 0x00000, 0x10000, CRC(b15ac0c4) SHA1(88c7a0be533465fc9c6833e52bcb1729c2307d06) )
+ ROM_LOAD( "2I", 0x10000, 0x10000, CRC(ff44d460) SHA1(cd070b6b48cfafa67e9fe778a2a31e623caa3ddd) )
+ ROM_LOAD( "1I", 0x20000, 0x10000, CRC(05294295) SHA1(bb2114dccc94545664c10a9e32ebd87eed59865c) )
+
+ ROM_REGION( 0x1c0000, "gfx1", 0 ) /* gfx */
+ /* 000000-0fffff empty */
+ ROM_LOAD( "3.5A", 0x100000, 0x20000, CRC(c1f49332) SHA1(35e4db593ab54b0ab6734a377cc2ed1c8670314c) )
+ ROM_LOAD( "4.6A", 0x120000, 0x20000, CRC(f9bac001) SHA1(3aa707c75c27b968303bb8bc007e5da872a807f5) )
+ ROM_LOAD( "5.7A", 0x140000, 0x20000, CRC(d9ec3418) SHA1(0d29d800a821b6806dc6b9d5a7aaa0939346ddc4) )
+ ROM_LOAD( "6.8A", 0x160000, 0x20000, CRC(5a966741) SHA1(c122ada315f09b0851947e9efd67e0a11663cf66) )
+ ROM_LOAD( "7.9A", 0x180000, 0x20000, CRC(93abe5c5) SHA1(d71da2ded70726af0aa1ee751fbab758326447ab) )
+ ROM_LOAD( "8.10A", 0x1a0000, 0x20000, CRC(010d353d) SHA1(5ea7fd6f26f6ad484bb6e07e66e8c25d178ac037) )
ROM_END
ROM_START( bijokkog )
@@ -4060,7 +4060,7 @@ GAME( 1987, iemotom, iemoto, iemotom, iemotom, driver_device, 0,
GAME( 1987, ryuuha, iemoto, ryuuha, ryuuha, driver_device, 0, ROT0, "Central Denshi", "Ryuuha [BET] (Japan 871027)", MACHINE_SUPPORTS_SAVE )
GAME( 1987, ojousan, 0, ojousan, ojousan, driver_device, 0, ROT0, "Nichibutsu", "Ojousan (Japan 871204)", MACHINE_SUPPORTS_SAVE )
GAME( 1987, ojousanm, ojousan, ojousanm, ojousanm, driver_device, 0, ROT0, "Nichibutsu", "Ojousan [BET] (Japan 870108)", MACHINE_SUPPORTS_SAVE )
-GAME( 1987, swinggal, 0, swinggal, ryuuha, driver_device, 0, ROT0, "Digital Denshi", "Swing Gal [BET] (Japan 871221)", MACHINE_SUPPORTS_SAVE )
+GAME( 1987, swinggal, 0, swinggal, ryuuha, driver_device, 0, ROT0, "Digital Denshi", "Swing Gal [BET] (Japan 871221)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, korinai, 0, korinai, korinai, driver_device, 0, ROT0, "Nichibutsu", "Mahjong-zukino Korinai Menmen (Japan 880425)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, korinaim, korinai, korinaim, korinaim, driver_device, 0, ROT0, "Nichibutsu", "Mahjong-zukino Korinai Menmen [BET] (Japan 880920)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/nbmj8891.cpp b/src/mame/drivers/nbmj8891.cpp
index 0ef8e6879e3..25c4fdbb1bd 100644
--- a/src/mame/drivers/nbmj8891.cpp
+++ b/src/mame/drivers/nbmj8891.cpp
@@ -767,7 +767,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( msjiken )
PORT_START("DSWA")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2,3")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2,3")
PORT_DIPSETTING( 0x07, "1 (Easy)" )
PORT_DIPSETTING( 0x06, "2" )
PORT_DIPSETTING( 0x05, "3" )
@@ -776,19 +776,19 @@ static INPUT_PORTS_START( msjiken )
PORT_DIPSETTING( 0x02, "6" )
PORT_DIPSETTING( 0x01, "7" )
PORT_DIPSETTING( 0x00, "8 (Hard)" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "Game Sounds" ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x00, "Game Sounds" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Control Type" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, "Control Type" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, "ROYAL" )
PORT_DIPSETTING( 0x00, "JAMMA" )
@@ -1161,7 +1161,7 @@ static INPUT_PORTS_START( mjfocus )
// I don't have manual for this game.
PORT_START("DSWA")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2,3")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2,3")
PORT_DIPSETTING( 0x07, "1 (Easy)" )
PORT_DIPSETTING( 0x06, "2" )
PORT_DIPSETTING( 0x05, "3" )
@@ -1170,13 +1170,13 @@ static INPUT_PORTS_START( mjfocus )
PORT_DIPSETTING( 0x02, "6" )
PORT_DIPSETTING( 0x01, "7" )
PORT_DIPSETTING( 0x00, "8 (Hard)" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x10, 0x10, "Character Display Test" ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x10, 0x10, "Character Display Test" ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SWA:7" )
@@ -1738,27 +1738,27 @@ INPUT_PORTS_END
static INPUT_PORTS_START( mladyhtr )
PORT_START("DSWA")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2")
PORT_DIPSETTING( 0x03, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "4" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:3")
PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Game Sounds" ) PORT_DIPLOCATION("SWA:6")
+ PORT_DIPNAME( 0x20, 0x20, "Game Sounds" ) PORT_DIPLOCATION("SWA:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Game Mode" ) PORT_DIPLOCATION("SWA:7")
+ PORT_DIPNAME( 0x40, 0x40, "Game Mode" ) PORT_DIPLOCATION("SWA:7")
PORT_DIPSETTING( 0x40, "Beginner" )
PORT_DIPSETTING( 0x00, "Expert" )
- PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("SWA:8")
+ PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("SWA:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
diff --git a/src/mame/drivers/nbmj8991.cpp b/src/mame/drivers/nbmj8991.cpp
index 24a49727239..50900d54b80 100644
--- a/src/mame/drivers/nbmj8991.cpp
+++ b/src/mame/drivers/nbmj8991.cpp
@@ -300,27 +300,27 @@ INPUT_PORTS_END
static INPUT_PORTS_START( triplew1 )
PORT_START("DSWA")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2")
PORT_DIPSETTING( 0x03, "1 (Easy)" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "4 (Hard)" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:3")
PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Game Sounds" ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x10, 0x10, "Game Sounds" ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Character Display Test" ) PORT_DIPLOCATION("SWA:7")
+ PORT_DIPNAME( 0x40, 0x40, "Character Display Test" ) PORT_DIPLOCATION("SWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("SWA:8")
+ PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("SWA:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -669,7 +669,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( galkoku )
PORT_START("DSWA")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2,3")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:1,2,3")
PORT_DIPSETTING( 0x07, "1 (Easy)" )
PORT_DIPSETTING( 0x06, "2" )
PORT_DIPSETTING( 0x05, "3" )
@@ -678,19 +678,19 @@ static INPUT_PORTS_START( galkoku )
PORT_DIPSETTING( 0x02, "6" )
PORT_DIPSETTING( 0x01, "7" )
PORT_DIPSETTING( 0x00, "8 (Hard)" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x10, 0x10, "Character Display Test" ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x10, 0x10, "Character Display Test" ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
diff --git a/src/mame/drivers/nbmj9195.cpp b/src/mame/drivers/nbmj9195.cpp
index 06eddd16b8c..c0874236844 100644
--- a/src/mame/drivers/nbmj9195.cpp
+++ b/src/mame/drivers/nbmj9195.cpp
@@ -817,53 +817,53 @@ static INPUT_PORTS_START( patimono )
// Interesting note - manual states switch A:8 is always off/unused
PORT_START("DSWA")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSWA:1,2")
- PORT_DIPSETTING( 0x03, "1" )
- PORT_DIPSETTING( 0x02, "2" )
- PORT_DIPSETTING( 0x01, "3" )
- PORT_DIPSETTING( 0x00, "4" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:3")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSWA:1,2")
+ PORT_DIPSETTING( 0x03, "1" )
+ PORT_DIPSETTING( 0x02, "2" )
+ PORT_DIPSETTING( 0x01, "3" )
+ PORT_DIPSETTING( 0x00, "4" )
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:3")
PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSWA:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSWA:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Music" ) PORT_DIPLOCATION("DSWA:5")
+ PORT_DIPNAME( 0x10, 0x10, "Music" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Character Display Test" ) PORT_DIPLOCATION("DSWA:7")
+ PORT_DIPNAME( 0x40, 0x40, "Character Display Test" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("DSWA:8")
+ PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWB")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
diff --git a/src/mame/drivers/ohmygod.cpp b/src/mame/drivers/ohmygod.cpp
index a77393d241a..19432ad7651 100644
--- a/src/mame/drivers/ohmygod.cpp
+++ b/src/mame/drivers/ohmygod.cpp
@@ -300,7 +300,7 @@ GFXDECODE_END
void ohmygod_state::machine_start()
{
membank("okibank")->configure_entries(0, 16, memregion("oki")->base(), 0x20000);
-
+
save_item(NAME(m_spritebank));
save_item(NAME(m_scrollx));
save_item(NAME(m_scrolly));
diff --git a/src/mame/drivers/poisk1.cpp b/src/mame/drivers/poisk1.cpp
index 85f3c024706..8e7408060f1 100644
--- a/src/mame/drivers/poisk1.cpp
+++ b/src/mame/drivers/poisk1.cpp
@@ -644,7 +644,7 @@ static MACHINE_CONFIG_START( poisk1, p1_state )
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED)
MCFG_SOFTWARE_LIST_ADD("flop_list","poisk1_flop")
-// MCFG_SOFTWARE_LIST_ADD("cass_list","poisk1_cass")
+// MCFG_SOFTWARE_LIST_ADD("cass_list","poisk1_cass")
MCFG_SPEAKER_STANDARD_MONO( "mono" )
MCFG_SOUND_ADD( "speaker", SPEAKER_SOUND, 0 )
diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp
index c9bbafeea8b..de3c7e9ea08 100644
--- a/src/mame/drivers/rainbow.cpp
+++ b/src/mame/drivers/rainbow.cpp
@@ -36,11 +36,11 @@ NVRAM files from -A and -B machines are not interchangeable. If problems arise,
CPM 2.1 / DOS2.11 / DOS 3.x and UCSD systems (fort_sys, pas_sys) + diag disks boot.
It is possible to boot DOS 3.10 from floppy A: and later use a hard disk attached to E:.
-NB.: a single hard disk (5 - 67 MB, 512 byte sectors) may be attached before startup. It should remain there
+NB.: a single hard disk (5 - 67 MB, 512 byte sectors) may be attached before startup. It should remain there
until shutdown. "Hot swapping" wasn't possible on the original system (our GUI just doesn't forbid it).
To create a RD50/ST506 compatible image (153 cylinders, 4 heads, 16 sectors, standard 512 byte sectors) enter
->chdman64 createhd - c none - chs 153, 4, 16 - ss 512 - o RD50_ST506.chd
+>chdman64 createhd - c none - chs 153, 4, 16 - ss 512 - o RD50_ST506.chd
NOTE: use -c none parameter for no compression. No more than 8 heads or 1024 cylinders.
Some BUGS remain: BIOS autoboot doesnt work at all. It is not possible to boot from a properly formatted
@@ -58,7 +58,7 @@ CURRENTY UNEMULATED
(b1) LOOPBACK circuit not emulated, NMI from RAM card also unemulated (NMI vector 02).
The former is used in startup tests, the latter seems less relevant (must use menu self test "S"
- or memory diagnostic test. TODO: mem.test causes a CPU crash when reaching higher RAM regions.
+ or memory diagnostic test. TODO: mem.test causes a CPU crash when reaching higher RAM regions.
(b2) system interaction tests HALT Z80 CPU at location $0211 (forever). Boot the RX50 diag.disk
to see what happens (key 3 - individual tests, then 12 - system interaction). Uses LOOPBACK too?
@@ -84,7 +84,7 @@ SH10 BDL REQ (L) -> Pin 1 (A0) BUNDLE OPTION wishes to use shared memory
HARDWARE UPGRADES WORTH EMULATING (should be implemented as SLOT DEVICES):
* Color graphics option (uses NEC upd7220 GDC). REFERENCE: Programmer's Reference: AA-AE36A-TV.
-Either 240 X 380 x 16 or 240 x 800 x 4 colors (out of 4096). 8 x 64 K video RAM.
+Either 240 X 380 x 16 or 240 x 800 x 4 colors (out of 4096). 8 x 64 K video RAM.
On a 100-A, pallette limited to 4 shades (LSB 2 bits; applies to medium resolution mode 240 X 380 pixels only).
Graphics output independent from monochrome output. Single and dual monitor configurations possible.
@@ -242,10 +242,10 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
#define RTC_BASE 0xFC000
// Do not pretend to emulate newer RAM board; stick with the old one:
-// (only affects presence bit in 'system_parameter_r')
+// (only affects presence bit in 'system_parameter_r')
#define OLD_RAM_BOARD_PRESENT
-#ifdef ASSUME_MODEL_A_HARDWARE
+#ifdef ASSUME_MODEL_A_HARDWARE
// Define standard and maximum RAM sizes (A model):
#define MOTHERBOARD_RAM 0x0ffff // 64 K base RAM (100-A)
#define END_OF_RAM 0xcffff // Very last byte (theretical; on 100-A) DO NOT CHANGE.
@@ -268,8 +268,8 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
// DEC says that MHFU is also re-enabled 'automatically after STI' (when under BIOS control?)
// Schematics show "VERT FREQ INT" (= DC012 output, pin 2) and MHFU ENBL L are evaluated,
-// as well as the power good signal from the PSU (AC_OK). MS_TO_POWER_GOOD is a guess:
-#define MS_TO_POWER_GOOD 350
+// as well as the power good signal from the PSU (AC_OK). MS_TO_POWER_GOOD is a guess:
+#define MS_TO_POWER_GOOD 350
// Reset duration of 108 ms from documentation -
#define RESET_DURATION_MS 108
@@ -290,13 +290,13 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
#include "machine/wd_fdc.h"
#include "formats/rx50_dsk.h"
-#include "formats/pc_dsk.h" // PC Formats
+#include "formats/pc_dsk.h" // PC Formats
#include "imagedev/flopdrv.h"
#include "imagedev/harddriv.h"
#include "machine/wd2010.h"
-#include "machine/z80dart.h"
+#include "machine/z80dart.h"
#include "bus/rs232/rs232.h"
#include "imagedev/bitbngr.h"
#include "machine/com8116.h"
@@ -422,7 +422,7 @@ public:
DECLARE_WRITE8_MEMBER(printer_bitrate_w);
DECLARE_WRITE_LINE_MEMBER( com8116_a_fr_w );
DECLARE_WRITE_LINE_MEMBER( com8116_a_ft_w );
-
+
UINT32 screen_update_rainbow(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(vblank_irq);
IRQ_CALLBACK_MEMBER(irq_callback);
@@ -485,7 +485,7 @@ private:
void lower_8088_irq(int ref);
void update_mpsc_irq();
- int m_mpsc_irq;
+ int m_mpsc_irq;
void update_8088_irqs();
void update_bundle_irq(); // RD51 or COMM.OPTION!
@@ -552,7 +552,7 @@ FLOPPY_FORMATS_END
static SLOT_INTERFACE_START(rainbow_floppies)
SLOT_INTERFACE("525qd0", FLOPPY_525_QD) // QD means 80 tracks with DD data rate (single or double sided).
SLOT_INTERFACE("525qd1", FLOPPY_525_QD)
-SLOT_INTERFACE("525dd", FLOPPY_525_DD) // mimic a 5.25" PC (40 track) drive. Requires IDrive5.SYS.
+SLOT_INTERFACE("525dd", FLOPPY_525_DD) // mimic a 5.25" PC (40 track) drive. Requires IDrive5.SYS.
SLOT_INTERFACE("35dd", FLOPPY_35_DD) // mimic 3.5" PC drive (720K, double density). Use Impdrv3.SYS.
SLOT_INTERFACE_END
@@ -560,8 +560,8 @@ void rainbow_state::machine_start()
{
m_POWER_GOOD = false; // Simulate AC_OK signal from power supply.
cmd_timer = timer_alloc(0);
- cmd_timer->adjust(attotime::from_msec(MS_TO_POWER_GOOD));
-
+ cmd_timer->adjust(attotime::from_msec(MS_TO_POWER_GOOD));
+
MOTOR_DISABLE_counter = 2; // soon resets drv.LEDs
m_SCREEN_BLANK = false;
@@ -585,7 +585,7 @@ void rainbow_state::machine_start()
rom[0xf4000 + 0x0303] = 0x00; // disable CRC check
rom[0xf4000 + 0x135e] = 0x00; // FLOPPY / RX-50 WORKAROUND: in case of Z80 RESPONSE FAILURE ($80 bit set in AL), do not block floppy access.
- rom[0xf4000 + 0x198F] = 0xeb; // cond.JMP to uncond.JMP (disables error message 60...)
+ rom[0xf4000 + 0x198F] = 0xeb; // cond.JMP to uncond.JMP (disables error message 60...)
}
#endif
}
@@ -719,7 +719,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(rainbowz80_io, AS_IO, 8, rainbow_state)
ADDRESS_MAP_UNMAP_HIGH
-ADDRESS_MAP_GLOBAL_MASK(0xff)
+ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(z80_latch_r, z80_latch_w)
AM_RANGE(0x20, 0x20) AM_READWRITE(z80_generalstat_r, z80_diskdiag_read_w) // read to port 0x20 used by MS-DOS 2.x diskette loader.
AM_RANGE(0x21, 0x21) AM_READWRITE(z80_generalstat_r, z80_diskdiag_write_w)
@@ -836,31 +836,31 @@ void rainbow_state::machine_reset()
printf("\nWARNING: 896 K is not a valid memory configuration on Rainbow 100 A!\n");
}
-// check = (unmap_start >> 16)-1; // guess.
-// NVRAM_LOCATION = nv[0xed084]; // location not verified yet. DMT RAM check tests offset $84 !
+// check = (unmap_start >> 16)-1; // guess.
+// NVRAM_LOCATION = nv[0xed084]; // location not verified yet. DMT RAM check tests offset $84 !
#else
printf("\n*** RAINBOW B MODEL ASSUMED (128 - 896 K RAM)\n");
if (unmap_start < 0x20000)
{
- unmap_start = 0x20000; // 128 K minimum
+ unmap_start = 0x20000; // 128 K minimum
printf("\nWARNING: 64 K is not a valid memory size on Rainbow 100-B!\n");
}
check = (unmap_start >> 16) - 2;
- NVRAM_LOCATION = nv[0xed0db];
+ NVRAM_LOCATION = nv[0xed0db];
#endif
if (check != NVRAM_LOCATION)
printf("\nNOTE: RAM configuration does not match NVRAM.\nUNMAP_START = %05x NVRAM VALUE = %02x SHOULD BE: %02x\n", unmap_start, NVRAM_LOCATION, check);
if(END_OF_RAM > unmap_start)
program.unmap_readwrite(unmap_start, END_OF_RAM);
-
- m_crtc->MHFU(MHFU_RESET_and_DISABLE);
+
+ m_crtc->MHFU(MHFU_RESET_and_DISABLE);
#ifdef RTC_ENABLED
// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
// No address space needed ( -> IRQs must be disabled to block ROM accesses during reads ).
- program.install_read_handler(RTC_BASE, RTC_BASE + 0x2104, read8_delegate(FUNC(rainbow_state::rtc_r), this));
+ program.install_read_handler(RTC_BASE, RTC_BASE + 0x2104, read8_delegate(FUNC(rainbow_state::rtc_r), this));
// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
#endif
@@ -908,7 +908,7 @@ void rainbow_state::machine_reset()
m_z80->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_z80_halted = true;
- m_zflip = true; // ZRESET high on startup
+ m_zflip = true; // ZRESET high on startup
m_diagnostic = 0; // DIAGNOSTIC_R/W registers (shouldn't it be 1?)
INTZ80 = false;
@@ -1022,7 +1022,7 @@ void rainbow_state::update_mpsc_irq()
else
raise_8088_irq(IRQ_COMM_PTR_INTR_L);
- m_mpsc->m1_r(); // interrupt acknowledge
+ m_mpsc->m1_r(); // interrupt acknowledge
}
WRITE_LINE_MEMBER(rainbow_state::mpsc_irq)
@@ -1031,18 +1031,18 @@ WRITE_LINE_MEMBER(rainbow_state::mpsc_irq)
update_mpsc_irq();
}
-// PORT 0x0e : Printer bit rates
+// PORT 0x0e : Printer bit rates
WRITE8_MEMBER(rainbow_state::printer_bitrate_w)
-{
+{
printf("\nPRINTER bitrate = %02x HEX\n",data & 7);
// "bit 3 controls the communications port clock (RxC,TxC). External clock when 1, internal when 0"
- printf(" - CLOCK BIT: %02x", data & 8);
+ printf(" - CLOCK BIT: %02x", data & 8);
}
// PORT 0x06 : Communication bit rates (see page 21 of PC 100 SPEC)
WRITE8_MEMBER(rainbow_state::comm_bitrate_w)
-{
+{
m_dbrg->str_w(data & 0x0f); // PDF is wrong, low nibble is RECEIVE clock (verified in SETUP).
printf("\nRECEIVE bitrate = %02x HEX\n",data & 0x0f);
@@ -1126,9 +1126,9 @@ WRITE8_MEMBER(rainbow_state::share_z80_w)
// DRIVERS: (a) DOS and CP/M binaries plus source from DEC employee (rbclik); Reads & displays times. Y2K READY!
// (b) Suitable Solutions ClikClok distribution disk; Uses $FE000 and up. 2 digit year. Needed to set time & date.
-//
-// TODO: obtain hardware / check address decoders.
-// RTC accesses here were derived from Vincent Esser's published source.
+//
+// TODO: obtain hardware / check address decoders.
+// RTC accesses here were derived from Vincent Esser's published source.
READ8_MEMBER(rainbow_state::rtc_r)
{
if((m_inp11->read() == 0x01)) // if enabled...
@@ -1136,34 +1136,34 @@ READ8_MEMBER(rainbow_state::rtc_r)
switch (offset)
{
// Transfer data to DS1315 (data = offset):
- case 0x0000: // RTC_WRITE_DATA_0 0xFC000
+ case 0x0000: // RTC_WRITE_DATA_0 0xFC000
case 0x2000: // RTC_WRITE_DATA_0 0xFE000 (MIRROR)
- case 0x0001: // RTC_WRITE_DATA_1 0xFC001
+ case 0x0001: // RTC_WRITE_DATA_1 0xFC001
case 0x2001: // RTC_WRITE_DATA_1 0xFE001 (MIRROR)
- m_rtc->write_data(space, offset & 0x01);
+ m_rtc->write_data(space, offset & 0x01);
break;
// Read actual time/date from ClikClok:
case 0x0004: // 0xFC004
case 0x2004: // 0xFE004 (MIRROR)
- if (m_rtc->chip_enable())
- return (m_rtc->read_data(space, 0) & 0x01);
+ if (m_rtc->chip_enable())
+ return (m_rtc->read_data(space, 0) & 0x01);
- // (RTC ACTIVATION) READ MAGIC PATTERN 0
- case 0x0100: // 0xFC100
+ // (RTC ACTIVATION) READ MAGIC PATTERN 0
+ case 0x0100: // 0xFC100
case 0x2100: // 0xFE100 (MIRROR)
- m_rtc->read_0(space, 0);
+ m_rtc->read_0(space, 0);
break;
- // (RTC ACTIVATION) READ MAGIC PATTERN 1
- case 0x0101: // 0xFC101
+ // (RTC ACTIVATION) READ MAGIC PATTERN 1
+ case 0x0101: // 0xFC101
case 0x2101: // 0xFE101 (MIRROR)
- m_rtc->read_1(space, 0);
+ m_rtc->read_1(space, 0);
break;
// RESET
- case 0x0104: // 0xFC104
+ case 0x0104: // 0xFC104
case 0x2104: // 0xFE104 (MIRROR)
m_rtc->chip_reset();
break;
@@ -1171,7 +1171,7 @@ READ8_MEMBER(rainbow_state::rtc_r)
}
UINT8 *rom = memregion("maincpu")->base();
- return rom[RTC_BASE + offset]; // Return ROM to prevent crashes
+ return rom[RTC_BASE + offset]; // Return ROM to prevent crashes
}
// ------------------------/ ClikClok (for model B; DS1315) ---------------------------------
@@ -1185,8 +1185,8 @@ static const int SECTOR_SIZES[4] = { 256, 512, 1024, 128 };
void rainbow_state::hdc_reset()
{
-// logerror(">> HARD DISC CONTROLLER RESET <<\n");
- m_hdc->reset();
+// logerror(">> HARD DISC CONTROLLER RESET <<\n");
+ m_hdc->reset();
m_bdl_irq = 0;
update_bundle_irq(); // reset INTRQ
@@ -1260,7 +1260,7 @@ static UINT32 get_and_print_lbasector(device_t *device, hard_disk_info *info, UI
lbasector *= info->sectors; // LBA : ( x 16 )
lbasector += (sector_number - 1); // + (sector number - 1)
-// device->logerror(" CYLINDER %u - HEAD %u - SECTOR NUMBER %u (LBA-SECTOR %u) ", cylinder, head, sector_number, lbasector);
+// device->logerror(" CYLINDER %u - HEAD %u - SECTOR NUMBER %u (LBA-SECTOR %u) ", cylinder, head, sector_number, lbasector);
return lbasector;
}
@@ -1279,7 +1279,7 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_read_sector)
{
read_status = 2;
-// logerror("\nTRYING TO READ");
+// logerror("\nTRYING TO READ");
output().set_value("led1", 0);
int hi = (m_hdc->read(generic_space(), 0x05)) & 0x07;
@@ -1310,7 +1310,7 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_read_sector)
if (hard_disk_read(local_hard_disk, lbasector, m_hdc_buffer)) // accepts LBA sector (UINT32) !
{
read_status = 0;
-// logerror("...success!\n");
+// logerror("...success!\n");
}
}
}
@@ -1401,7 +1401,7 @@ int rainbow_state::do_write_sector()
if ((info = hard_disk_get_info(local_hard_disk)))
{
feedback = 10;
-// logerror("\n* TRYING TO WRITE * ");
+// logerror("\n* TRYING TO WRITE * ");
output().set_value("led1", 1); // OFF
UINT8 SDH = (m_hdc->read(generic_space(), 0x06));
@@ -1483,7 +1483,7 @@ READ8_MEMBER(rainbow_state::hd_status_68_r)
int my_offset = 0x07;
int stat = m_hdc->read(space, my_offset);
-// logerror("(x68) WD1010 register %04x (STATUS) read, result : %04x\n", my_offset, stat);
+// logerror("(x68) WD1010 register %04x (STATUS) read, result : %04x\n", my_offset, stat);
// NOTE: SEEK COMPLETE IS CURRENTLY HARD WIRED / NOT FULLY EMULATED -
// Bit 4 : SEEK COMPLETE: This status bit indicates that the disk drive positioned the R/W heads over the desired track on the disk surface.
@@ -1546,7 +1546,7 @@ WRITE8_MEMBER(rainbow_state::hd_status_68_w)
// 1 : see @ 088D after 'READ_SECTOR_OK'
if (data & 0x01)
{
-// logerror(">> HARD DISC * SET BUFFER READY * <<\n");
+// logerror(">> HARD DISC * SET BUFFER READY * <<\n");
output().set_value("led1", 0); // 1 = OFF (One of the CPU LEDs as DRIVE LED) = HARD DISK ACTIVITY =
MOTOR_DISABLE_counter = 20;
@@ -1585,7 +1585,7 @@ positioned over cylinder 0 (the data track furthest away from the spindle).
READ8_MEMBER(rainbow_state::hd_status_69_r)
{
int HS = m_hdc->read(space, 0x06) & (1 + 2 + 4); // SDH bits 0-2 = HEAD #
-// logerror("(x69 READ) %i = HEAD SELECT WD1010\n", HS);
+// logerror("(x69 READ) %i = HEAD SELECT WD1010\n", HS);
UINT8 data = (HS << 1);
@@ -1594,7 +1594,7 @@ READ8_MEMBER(rainbow_state::hd_status_69_r)
int DRV = ((m_hdc->read(space, 0x06) >> 3) & 0x01); // 0x03 gives error R6 with DIAG.DISK
if (DRV == 0)
{
-// logerror("(x69 READ) %i = _DRIVE # 0_ SELECT! \n", DRV);
+// logerror("(x69 READ) %i = _DRIVE # 0_ SELECT! \n", DRV);
data |= 1;
}
@@ -1607,7 +1607,7 @@ READ8_MEMBER(rainbow_state::hd_status_69_r)
if (m_hdc_drive_ready)
data |= 64;
- m_hdc_track0 = false; // Fake TRACK 0 signal (normally FROM DRIVE)
+ m_hdc_track0 = false; // Fake TRACK 0 signal (normally FROM DRIVE)
int stat1 = m_hdc->read(space, 0x04); // CYL LO
int stat2 = m_hdc->read(space, 0x05); // CYL HI
@@ -1617,7 +1617,7 @@ READ8_MEMBER(rainbow_state::hd_status_69_r)
if (m_hdc_track0)
{
data |= 128;
-// logerror("(x69 READ) TRACK 00 detected\n");
+// logerror("(x69 READ) TRACK 00 detected\n");
}
return data;
@@ -1672,7 +1672,7 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_bdrq)
{
static int old_state;
-// logerror("BDRQ - BUFFER DATA REQUEST OBTAINED: %u\n", state);
+// logerror("BDRQ - BUFFER DATA REQUEST OBTAINED: %u\n", state);
if ((state == 1) && (old_state == 0))
{
hdc_buffer_counter_reset();
@@ -1725,35 +1725,35 @@ READ8_MEMBER(rainbow_state::system_parameter_r)
return (((m_inp5->read() == 1) ? 0 : 1) |
((m_inp6->read() == 1) ? 0 : 2) |
((m_inp7->read() == 1) ? 0 : 4) |
-#ifdef OLD_RAM_BOARD_PRESENT
- ((m_inp8->read() > MOTHERBOARD_RAM) ? 0 : 8) |
+#ifdef OLD_RAM_BOARD_PRESENT
+ ((m_inp8->read() > MOTHERBOARD_RAM) ? 0 : 8) |
#else
8 |
#endif
- 16 | 32 | 64 | 128 // to be verified.
+ 16 | 32 | 64 | 128 // to be verified.
);
}
-// [02] COMMUNICATIONS STATUS REGISTER - PAGE 154 (**** READ **** )
-// Used to read status of SERIAL port, IRQ line of each CPU, and MHFU logic enable signal.
+// [02] COMMUNICATIONS STATUS REGISTER - PAGE 154 (**** READ **** )
+// Used to read status of SERIAL port, IRQ line of each CPU, and MHFU logic enable signal.
// ******* TODO: 5 status bits * MISSING * ********************************************************
// 0 COMM RI (reflects status of RI line at COMM port)
// 1 COMM SI / SCF(reflects status of speed indicator line or
-// the secondary receive line signal detect at COMM port)
+// the secondary receive line signal detect at COMM port)
// 2 COMM DSR (reflects status of DSR at COMM)
// 3 COMM CTS (reflects status of CTS at COMM)
// 4 COMM RLSD (receive line signal detect at COMM)
READ8_MEMBER(rainbow_state::comm_control_r)
{
- bool is_mhfu_enabled = false;
- if (m_POWER_GOOD)
- is_mhfu_enabled = m_crtc->MHFU(MHFU_IS_ENABLED);
-
- return (
- (is_mhfu_enabled ? 0x00 : 0x20) | // (L) status of MHFU flag => bit pos.5
- ((INT88) ? 0x00 : 0x40) | // (L)
- ((INTZ80) ? 0x00 : 0x80) // (L)
+ bool is_mhfu_enabled = false;
+ if (m_POWER_GOOD)
+ is_mhfu_enabled = m_crtc->MHFU(MHFU_IS_ENABLED);
+
+ return (
+ (is_mhfu_enabled ? 0x00 : 0x20) | // (L) status of MHFU flag => bit pos.5
+ ((INT88) ? 0x00 : 0x40) | // (L)
+ ((INTZ80) ? 0x00 : 0x80) // (L)
);
}
@@ -1763,7 +1763,7 @@ READ8_MEMBER(rainbow_state::comm_control_r)
// 0 COMM SPD SEL H (controls speed select line of COMM port)
// 1 COMM SRTS H (controls secondary request to send line of COMM)
// 2 COMM DTR L (controls terminal ready line of COMM)
-// 3 COMM RTS (controls request to send line of COMM)
+// 3 COMM RTS (controls request to send line of COMM)
WRITE8_MEMBER(rainbow_state::comm_control_w)
{
printf("%02x to COMM.CONTROL REGISTER ", data);
@@ -1894,7 +1894,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r)
if (!m_floppy->ready_r()) // weird (see wd_fdc)
fdc_ready = 1;
- if ((fdc_ready) && (m_floppy->wpt_r() != 1) && m_POWER_GOOD)
+ if ((fdc_ready) && (m_floppy->wpt_r() != 1) && m_POWER_GOOD)
fdc_write_gate = 1; // * FAKE * WRITE GATE !
// "valid only when drive is selected" !
@@ -1922,7 +1922,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r)
READ8_MEMBER(rainbow_state::z80_diskstatus_r)
{
int track = 0;
- int data = m_z80_diskcontrol & (255 - 0x80 - 0x40 - 0x20 - 4);
+ int data = m_z80_diskcontrol & (255 - 0x80 - 0x40 - 0x20 - 4);
// D7: DRQ: reflects status of DATA REQUEST signal from FDC.
// '1' indicates that FDC has read data OR requires new write data.
@@ -1938,7 +1938,7 @@ READ8_MEMBER(rainbow_state::z80_diskstatus_r)
// D5: SIDE 0 * HIGH ACTIVE *: status of side select signal at J2 + J3 of RX50 controller.
// For 1 sided drives, this bit will always read low (0).
if (m_floppy)
- data |= m_floppy->ss_r() ? 0x20 : 0x00;
+ data |= m_floppy->ss_r() ? 0x20 : 0x00;
// *LOW ACTIVE *
// D4: MOTOR 1 ON L: 0 = indicates MOTOR 1 ON bit is set in drive control reg.
@@ -1955,7 +1955,7 @@ READ8_MEMBER(rainbow_state::z80_diskstatus_r)
// D2: TG43 * LOW ACTIVE * : 0 = INDICATES TRACK > 43 SIGNAL FROM FDC TO DISK DRIVE.
// (asserted when writing data to tracks 44 through 79)
- data |= (track > 43) ? 0x00 : 0x04; // ! LOW ACTIVE !
+ data |= (track > 43) ? 0x00 : 0x04; // ! LOW ACTIVE !
// D1: DS1 H: reflect status of bits 0 and 1 from disk.control reg.
// D0: DS0 H: "
@@ -2090,14 +2090,14 @@ READ8_MEMBER(rainbow_state::read_video_ram_r)
// CPU acknowledge of VBL IRQ resets counter
IRQ_CALLBACK_MEMBER(rainbow_state::irq_callback)
-{
- int intnum = -1;
+{
+ int intnum = -1;
for (int i = IRQ_8088_VBL; i >= 0; i--)
{
if (m_irq_mask & (1 << i))
{
- if (i == IRQ_8088_VBL) // If VBL IRQ acknowledged...
- m_crtc->MHFU(MHFU_RESET); // ...reset counter (also: DC012_W)
+ if (i == IRQ_8088_VBL) // If VBL IRQ acknowledged...
+ m_crtc->MHFU(MHFU_RESET); // ...reset counter (also: DC012_W)
intnum = vectors[i] | m_irq_high;
break;
@@ -2111,7 +2111,7 @@ INTERRUPT_GEN_MEMBER(rainbow_state::vblank_irq)
raise_8088_irq(IRQ_8088_VBL);
m_crtc->notify_vblank(true);
- if (m_POWER_GOOD && m_crtc->MHFU(MHFU_IS_ENABLED)) // If enabled...
+ if (m_POWER_GOOD && m_crtc->MHFU(MHFU_IS_ENABLED)) // If enabled...
{
if (m_crtc->MHFU(MHFU_VALUE) > 7) // + more than (7 * 16.666) msecs gone (108 ms would be by the book)
{
@@ -2130,7 +2130,7 @@ WRITE_LINE_MEMBER(rainbow_state::clear_video_interrupt)
m_crtc->notify_vblank(false);
}
-// Reflects bits from 'diagnostic_w' (1:1), except test jumpers
+// Reflects bits from 'diagnostic_w' (1:1), except test jumpers
READ8_MEMBER(rainbow_state::diagnostic_r) // 8088 (port 0A READ). Fig.4-29 + table 4-15
{
return ((m_diagnostic & (0xf1)) |
@@ -2144,7 +2144,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
{
// printf("%02x to diag port (PC=%x)\n", data, space.device().safe_pc());
m_SCREEN_BLANK = (data & 2) ? false : true;
-
+
// ZRESET from 8088 to Z80 - - HIGH at powerup!
if (!(data & 1))
{
@@ -2173,15 +2173,15 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
m_fdc->reset(); // See formatter description p.197 or 5-13
}
- if (data & 0x04) // GRF_VID_SEL
+ if (data & 0x04) // GRF_VID_SEL
printf("\n*** UNEMULATED GRAPHICS [on GRAPHICS OPTION]. (bit 2 in diagnostic_w) = %i (0 = system module; else graphics option) ",data & 4);
// BIT 3: PARITY TEST (1 = enables parity test on memory option board).
- // FIXME: parity test = NMI? When should NMI fire? Whole bank tested?
+ // FIXME: parity test = NMI? When should NMI fire? Whole bank tested?
if (data & 0x08)
printf("\n*** UNEMULATED PARITY TEST [on RAM EXTENSION] - (bit 3 in diagnostic_w) ");
- // m_i8088->set_input_line_and_vector(INPUT_LINE_NMI, ASSERT_LINE, 0x02);
-
+ // m_i8088->set_input_line_and_vector(INPUT_LINE_NMI, ASSERT_LINE, 0x02);
+
// MISSING BITS (* not vital for normal operation, see diag.disk) -
// * BIT 4: DIAG LOOPBACK (0 at power-up; 1 directs RX50 and DC12 output to printer port)
// * BIT 5: PORT LOOPBACK (1 enables loopback for COMM, PRINTER, KEYBOARD ports)
@@ -2277,7 +2277,7 @@ WRITE_LINE_MEMBER(rainbow_state::write_keyboard_clock)
TIMER_DEVICE_CALLBACK_MEMBER(rainbow_state::motor_tick)
{
if (m_POWER_GOOD)
- m_crtc->MHFU(MHFU_COUNT); // // Increment IF ENABLED and POWER_GOOD, return count
+ m_crtc->MHFU(MHFU_COUNT); // // Increment IF ENABLED and POWER_GOOD, return count
m_hdc_index_latch = true; // HDC drive index signal (not working ?)
@@ -2298,7 +2298,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(rainbow_state::motor_tick)
// on 100-B, DTR from the keyboard 8051 controls bit 7 of IRQ vectors
WRITE_LINE_MEMBER(rainbow_state::irq_hi_w)
{
-#ifdef ASSUME_MODEL_A_HARDWARE
+#ifdef ASSUME_MODEL_A_HARDWARE
m_irq_high = 0;
#else
m_irq_high = (state == ASSERT_LINE) ? 0x80 : 0;
@@ -2316,7 +2316,7 @@ static const gfx_layout rainbow_charlayout =
{ 0, 1, 2, 3, 4, 5, 6, 7 },
/* y offsets */
{ 15 * 8, 0 * 8, 1 * 8, 2 * 8, 3 * 8, 4 * 8, 5 * 8, 6 * 8, 7 * 8, 8 * 8 },
- 8 * 16 /* every char takes 16 bytes */
+ 8 * 16 /* every char takes 16 bytes */
};
static GFXDECODE_START(rainbow)
@@ -2386,28 +2386,28 @@ MCFG_HARDDISK_ADD("harddisk1")
MCFG_DS1315_ADD("rtc") // DS1315 (ClikClok for DEC-100 B) * OPTIONAL *
-MCFG_DEVICE_ADD("com8116", COM8116, XTAL_5_0688MHz) // Baud rate generator
+MCFG_DEVICE_ADD("com8116", COM8116, XTAL_5_0688MHz) // Baud rate generator
MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_a_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_a_ft_w))
-MCFG_UPD7201_ADD("upd7201", XTAL_2_5MHz, 0, 0, 0, 0) // 2.5 Mhz from schematics
+MCFG_UPD7201_ADD("upd7201", XTAL_2_5MHz, 0, 0, 0, 0) // 2.5 Mhz from schematics
MCFG_Z80DART_OUT_INT_CB(WRITELINE(rainbow_state, mpsc_irq))
-MCFG_Z80DART_OUT_TXDA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_txd))
-MCFG_Z80DART_OUT_DTRA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_dtr))
+MCFG_Z80DART_OUT_TXDA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_txd))
+MCFG_Z80DART_OUT_DTRA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_dtr))
MCFG_Z80DART_OUT_RTSA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_rts))
-MCFG_Z80DART_OUT_TXDB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_txd))
-MCFG_Z80DART_OUT_DTRB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_dtr))
+MCFG_Z80DART_OUT_TXDB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_txd))
+MCFG_Z80DART_OUT_DTRB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_dtr))
MCFG_Z80DART_OUT_RTSB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_rts))
MCFG_RS232_PORT_ADD("rs232_a", default_rs232_devices, nullptr)
-MCFG_RS232_RXD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, rxa_w))
-MCFG_RS232_CTS_HANDLER(DEVWRITELINE("upd7201", upd7201_device, ctsa_w))
-MCFG_RS232_DCD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, dcda_w))
+MCFG_RS232_RXD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, rxa_w))
+MCFG_RS232_CTS_HANDLER(DEVWRITELINE("upd7201", upd7201_device, ctsa_w))
+MCFG_RS232_DCD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, dcda_w))
MCFG_RS232_PORT_ADD("rs232_b", default_rs232_devices, nullptr)
-MCFG_RS232_RXD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, rxb_w))
+MCFG_RS232_RXD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, rxb_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("upd7201", upd7201_device, ctsb_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("upd7201", upd7201_device, dcdb_w))
diff --git a/src/mame/drivers/seibuspi.cpp b/src/mame/drivers/seibuspi.cpp
index fac077ac3f9..262e549c51b 100644
--- a/src/mame/drivers/seibuspi.cpp
+++ b/src/mame/drivers/seibuspi.cpp
@@ -947,12 +947,12 @@ READ32_MEMBER(seibuspi_state::ejsakura_keyboard_r)
{
// coins/eeprom data
UINT32 ret = m_special->read();
-
+
// multiplexed inputs
for (int i = 0; i < 5; i++)
if (m_ejsakura_input_port >> i & 1)
ret &= m_key[i]->read();
-
+
return ret;
}
diff --git a/src/mame/drivers/seicupbl.cpp b/src/mame/drivers/seicupbl.cpp
index 32d5bb4ebbe..27ed8f82f4e 100644
--- a/src/mame/drivers/seicupbl.cpp
+++ b/src/mame/drivers/seicupbl.cpp
@@ -2,15 +2,15 @@
// copyright-holders:Angelo Salese
/***************************************************************************
- Seibu Cup Soccer bootlegs
-
- Splitted since it definitely doesn't use neither real COP nor CRTC
-
-
- TODO:
- - tilemap chip drawings might be merged between this and other
- Seibu implementations.
-
+ Seibu Cup Soccer bootlegs
+
+ Splitted since it definitely doesn't use neither real COP nor CRTC
+
+
+ TODO:
+ - tilemap chip drawings might be merged between this and other
+ Seibu implementations.
+
***************************************************************************/
@@ -55,9 +55,9 @@ public:
required_device<generic_latch_8_device> m_soundlatch;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
-
+
tilemap_t *m_sc_layer[4];
-
+
// screen updates
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE8_MEMBER(okim_rombank_w);
@@ -70,14 +70,14 @@ public:
TILE_GET_INFO_MEMBER(get_sc1_tileinfo);
TILE_GET_INFO_MEMBER(get_sc2_tileinfo);
TILE_GET_INFO_MEMBER(get_sc3_tileinfo);
-
+
protected:
// driver_device overrides
virtual void machine_start() override;
virtual void machine_reset() override;
virtual void video_start() override;
-
+
private:
void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap,const rectangle &cliprect);
};
@@ -281,7 +281,7 @@ UINT32 seicupbl_state::screen_update( screen_device &screen, bitmap_ind16 &bitma
m_sc_layer[i]->set_scrollx(0, m_vregs[i*2+0] - 0x1f0);
m_sc_layer[i]->set_scrolly(0, m_vregs[i*2+1]);
}
-
+
/*if (!(m_layer_disable&0x0001)) */m_sc_layer[0]->draw(screen, bitmap, cliprect, 0, 0);
/*if (!(m_layer_disable&0x0002)) */m_sc_layer[1]->draw(screen, bitmap, cliprect, 0, 1);
/*if (!(m_layer_disable&0x0004)) */m_sc_layer[2]->draw(screen, bitmap, cliprect, 0, 2);
@@ -323,7 +323,7 @@ WRITE16_MEMBER(seicupbl_state::vram_sc3_w)
}
static ADDRESS_MAP_START( cupsocbl_mem, AS_PROGRAM, 16, seicupbl_state )
-// AM_IMPORT_FROM( legionna_cop_mem )
+// AM_IMPORT_FROM( legionna_cop_mem )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100400, 0x1005ff) AM_DEVREADWRITE("seibucop_boot", seibu_cop_bootleg_device, copdxbl_0_r,copdxbl_0_w) AM_SHARE("cop_mcu_ram")
AM_RANGE(0x100660, 0x10066f) AM_RAM AM_SHARE("vregs")
@@ -570,7 +570,7 @@ static MACHINE_CONFIG_START( cupsocbl, seicupbl_state )
MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
-// MCFG_VIDEO_START_OVERRIDE(seicupbl_state,cupsoc)
+// MCFG_VIDEO_START_OVERRIDE(seicupbl_state,cupsoc)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
diff --git a/src/mame/drivers/sliver.cpp b/src/mame/drivers/sliver.cpp
index 5faa1adb0f4..0762736ac24 100644
--- a/src/mame/drivers/sliver.cpp
+++ b/src/mame/drivers/sliver.cpp
@@ -138,7 +138,7 @@ public:
void sliver_state::machine_start()
{
membank("okibank")->configure_entries(0, 4, memregion("oki")->base() + 0x20000, 0x20000);
-
+
save_item(NAME(m_io_offset));
save_item(NAME(m_io_reg));
save_item(NAME(m_fifo));
@@ -401,7 +401,7 @@ void sliver_state::video_start()
save_item(NAME(m_jpeg2));
save_item(NAME(m_jpeg_x));
save_item(NAME(m_jpeg_y));
-
+
machine().save().register_postload(save_prepost_delegate(FUNC(sliver_state::postload), this));
}
diff --git a/src/mame/drivers/sm7238.cpp b/src/mame/drivers/sm7238.cpp
index 8d29c6baa3e..912a521d3ea 100644
--- a/src/mame/drivers/sm7238.cpp
+++ b/src/mame/drivers/sm7238.cpp
@@ -2,19 +2,19 @@
// copyright-holders:Sergey Svishchev
/***************************************************************************
- SM 7238 (aka T3300) color/mono text terminal, compatible with DEC VT 240.
- Graphics option adds Tek 401x and DEC ReGIS support on a 512x250 bitmap.
+ SM 7238 (aka T3300) color/mono text terminal, compatible with DEC VT 240.
+ Graphics option adds Tek 401x and DEC ReGIS support on a 512x250 bitmap.
- Technical manual and schematics: http://doc.pdp-11.org.ru/Terminals/CM7238/
+ Technical manual and schematics: http://doc.pdp-11.org.ru/Terminals/CM7238/
To do:
- - handle more text_control_w bits
- - more character attributes incl. double width and height, color
- - 80/132 columns switching on the fly, reverse video
+ - handle more text_control_w bits
+ - more character attributes incl. double width and height, color
+ - 80/132 columns switching on the fly, reverse video
- smooth scroll
- - graphics option
- - run vblank from timer output?
- - document hardware and ROM variants, verify if pixel stretching is done
+ - graphics option
+ - run vblank from timer output?
+ - document hardware and ROM variants, verify if pixel stretching is done
****************************************************************************/
@@ -29,7 +29,7 @@
#include "machine/km035.h"
#include "machine/nvram.h"
-#define KSM_COLUMNS 80 // or 132
+#define KSM_COLUMNS 80 // or 132
#define KSM_TOTAL_HORZ KSM_COLUMNS*10
#define KSM_DISP_HORZ KSM_COLUMNS*8
@@ -133,7 +133,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sm7238_io, AS_IO, 8, sm7238_state )
ADDRESS_MAP_UNMAP_HIGH
-// AM_RANGE (0x40, 0x4f) AM_RAM // LUT
+// AM_RANGE (0x40, 0x4f) AM_RAM // LUT
AM_RANGE (0xa0, 0xa0) AM_DEVREADWRITE("i8251line", i8251_device, data_r, data_w)
AM_RANGE (0xa1, 0xa1) AM_DEVREADWRITE("i8251line", i8251_device, status_r, control_w)
AM_RANGE (0xa4, 0xa4) AM_DEVREADWRITE("i8251kbd", i8251_device, data_r, data_w)
@@ -177,7 +177,7 @@ WRITE8_MEMBER(sm7238_state::text_control_w)
if (BIT((data ^ m_video.control), 0)) {
m_video.stride = BIT(data, 0) ? 80 : 132;
-// recompute_parameters();
+// recompute_parameters();
}
m_video.control = data;
@@ -295,7 +295,7 @@ void sm7238_state::recompute_parameters()
int horiz_pix_total = m_video.stride * 8;
visarea.set(0, horiz_pix_total - 1, 0, KSM_DISP_VERT - 1);
- machine().first_screen()->configure(horiz_pix_total, KSM_DISP_VERT, visarea,
+ machine().first_screen()->configure(horiz_pix_total, KSM_DISP_VERT, visarea,
HZ_TO_ATTOSECONDS((m_video.stride == 80) ? 60 : 57.1 ));
}
diff --git a/src/mame/drivers/sun4.cpp b/src/mame/drivers/sun4.cpp
index ecb44cc56f7..2fe04e67b6e 100644
--- a/src/mame/drivers/sun4.cpp
+++ b/src/mame/drivers/sun4.cpp
@@ -383,28 +383,28 @@
20/06/2016 Much less skeletony.
// sun4: 16 contexts, 4096 segments, each PMEG is 32 PTEs, each PTE is 8K
- // VA lower 13 bits in page, next 5 bits select PTE in PMEG, next 12 bits select PMEG, top 2 must be 00 or 11.
+ // VA lower 13 bits in page, next 5 bits select PTE in PMEG, next 12 bits select PMEG, top 2 must be 00 or 11.
4/60 ROM notes:
ffe809fc: call to print "Sizing Memory" to the UART
- ffe80a70: call to "Setting up RAM for monitor" that goes wrong
- ffe80210: testing memory
- ffe80274: loop that goes wobbly and fails
- ffe80dc4: switch off boot mode, MMU maps ROM to copy in RAM from here on
- ffe82000: start of FORTH (?) interpreter once decompressed
+ ffe80a70: call to "Setting up RAM for monitor" that goes wrong
+ ffe80210: testing memory
+ ffe80274: loop that goes wobbly and fails
+ ffe80dc4: switch off boot mode, MMU maps ROM to copy in RAM from here on
+ ffe82000: start of FORTH (?) interpreter once decompressed
text in decompressed area claims to be FORTH-83 FCode, but the opcodes
do not match the documented OpenFirmware FCode ones at all.
- 4/3xx ROM notes:
- sun4: CPU LEDs to 00 (PC=ffe92398) => ........
- sun4: CPU LEDs to 01 (PC=ffe92450) => *.......
- sun4: CPU LEDs to 02 (PC=ffe9246c) => .*......
- sun4: CPU LEDs to 03 (PC=ffe9aa54) => **......
- sun4: CPU LEDs to 04 (PC=ffe9aa54) => ..*.....
- sun4: CPU LEDs to 05 (PC=ffe9aa54) => *.*.....
- sun4: CPU LEDs to 06 (PC=ffe9aa54) => .**.....
- sun4: CPU LEDs to 07 (PC=ffe9aa54) => ***.....
+ 4/3xx ROM notes:
+ sun4: CPU LEDs to 00 (PC=ffe92398) => ........
+ sun4: CPU LEDs to 01 (PC=ffe92450) => *.......
+ sun4: CPU LEDs to 02 (PC=ffe9246c) => .*......
+ sun4: CPU LEDs to 03 (PC=ffe9aa54) => **......
+ sun4: CPU LEDs to 04 (PC=ffe9aa54) => ..*.....
+ sun4: CPU LEDs to 05 (PC=ffe9aa54) => *.*.....
+ sun4: CPU LEDs to 06 (PC=ffe9aa54) => .**.....
+ sun4: CPU LEDs to 07 (PC=ffe9aa54) => ***.....
****************************************************************************/
@@ -431,7 +431,7 @@
#include "debug/debugcmd.h"
#include "debugger.h"
-#define SUN4_LOG_FCODES (0)
+#define SUN4_LOG_FCODES (0)
#define TIMEKEEPER_TAG "timekpr"
#define SCC1_TAG "scc1"
@@ -439,56 +439,56 @@
#define KEYBOARD_TAG "keyboard"
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
-#define FDC_TAG "fdc"
+#define FDC_TAG "fdc"
-#define ENA_NOTBOOT (0x80)
-#define ENA_SDVMA (0x20)
-#define ENA_CACHE (0x10)
-#define ENA_RESET (0x04)
-#define ENA_DIAG (0x01)
+#define ENA_NOTBOOT (0x80)
+#define ENA_SDVMA (0x20)
+#define ENA_CACHE (0x10)
+#define ENA_RESET (0x04)
+#define ENA_DIAG (0x01)
// page table entry constants
-#define PM_VALID (0x80000000) // page is valid
-#define PM_WRITEMASK (0x40000000) // writable?
-#define PM_SYSMASK (0x20000000) // system use only?
-#define PM_CACHE (0x10000000) // cachable?
-#define PM_TYPEMASK (0x0c000000) // type mask
-#define PM_ACCESSED (0x02000000) // accessed flag
-#define PM_MODIFIED (0x01000000) // modified flag
+#define PM_VALID (0x80000000) // page is valid
+#define PM_WRITEMASK (0x40000000) // writable?
+#define PM_SYSMASK (0x20000000) // system use only?
+#define PM_CACHE (0x10000000) // cachable?
+#define PM_TYPEMASK (0x0c000000) // type mask
+#define PM_ACCESSED (0x02000000) // accessed flag
+#define PM_MODIFIED (0x01000000) // modified flag
-#define PAGE_SIZE (0x00000400)
+#define PAGE_SIZE (0x00000400)
// DMA controller constants
-#define DMA_DEV_ID (0x80000000)
-#define DMA_L (0x00008000) // use ILACC
-#define DMA_TC (0x00004000) // terminal count
-#define DMA_EN_CNT (0x00002000) // enable count
-#define DMA_BYTE_ADDR (0x00001800) // next byte number to be accessed
-#define DMA_BYTE_ADDR_SHIFT (11)
-#define DMA_REQ_PEND (0x00000400) // request pending
-#define DMA_EN_DMA (0x00000200) // enable DMA
-#define DMA_WRITE (0x00000100) // DMA device->mem if 1, otherwise mem->device
-#define DMA_RESET (0x00000080) // DMA hardware reset
-#define DMA_DRAIN (0x00000040) // force remaining pack bytes to memory
-#define DMA_FLUSH (0x00000020) // force PACK_CNT and ERR_PEND to 0
-#define DMA_INT_EN (0x00000010) // interrupt enable
-#define DMA_PACK_CNT (0x0000000c) // number of bytes in pack register
-#define DMA_PACK_CNT_SHIFT (2)
-#define DMA_ERR_PEND (0x00000002) // error pending, set when memory exception occurs
-#define DMA_INT_PEND (0x00000001) // interrupt pending, set when TC=1
-#define DMA_READ_ONLY (DMA_TC | DMA_BYTE_ADDR | DMA_REQ_PEND | DMA_PACK_CNT | DMA_ERR_PEND | DMA_INT_PEND)
-#define DMA_WRITE_ONLY (DMA_FLUSH)
-#define DMA_READ_WRITE (DMA_EN_CNT | DMA_EN_DMA | DMA_WRITE | DMA_RESET | DMA_INT_EN)
-#define DMA_CTRL (0)
-#define DMA_ADDR (1)
-#define DMA_BYTE_COUNT (2)
-#define DMA_XTAL (XTAL_25MHz)
+#define DMA_DEV_ID (0x80000000)
+#define DMA_L (0x00008000) // use ILACC
+#define DMA_TC (0x00004000) // terminal count
+#define DMA_EN_CNT (0x00002000) // enable count
+#define DMA_BYTE_ADDR (0x00001800) // next byte number to be accessed
+#define DMA_BYTE_ADDR_SHIFT (11)
+#define DMA_REQ_PEND (0x00000400) // request pending
+#define DMA_EN_DMA (0x00000200) // enable DMA
+#define DMA_WRITE (0x00000100) // DMA device->mem if 1, otherwise mem->device
+#define DMA_RESET (0x00000080) // DMA hardware reset
+#define DMA_DRAIN (0x00000040) // force remaining pack bytes to memory
+#define DMA_FLUSH (0x00000020) // force PACK_CNT and ERR_PEND to 0
+#define DMA_INT_EN (0x00000010) // interrupt enable
+#define DMA_PACK_CNT (0x0000000c) // number of bytes in pack register
+#define DMA_PACK_CNT_SHIFT (2)
+#define DMA_ERR_PEND (0x00000002) // error pending, set when memory exception occurs
+#define DMA_INT_PEND (0x00000001) // interrupt pending, set when TC=1
+#define DMA_READ_ONLY (DMA_TC | DMA_BYTE_ADDR | DMA_REQ_PEND | DMA_PACK_CNT | DMA_ERR_PEND | DMA_INT_PEND)
+#define DMA_WRITE_ONLY (DMA_FLUSH)
+#define DMA_READ_WRITE (DMA_EN_CNT | DMA_EN_DMA | DMA_WRITE | DMA_RESET | DMA_INT_EN)
+#define DMA_CTRL (0)
+#define DMA_ADDR (1)
+#define DMA_BYTE_COUNT (2)
+#define DMA_XTAL (XTAL_25MHz)
namespace
{
const sparc_disassembler::asi_desc_map::value_type sun4_asi_desc[] = {
- { 0x10, { nullptr, "Flush I-Cache (Segment)" } },
- { 0x11, { nullptr, "Flush I-Cache (Page)" } },
+ { 0x10, { nullptr, "Flush I-Cache (Segment)" } },
+ { 0x11, { nullptr, "Flush I-Cache (Page)" } },
{ 0x02, { nullptr, "System Space" } }, { 0x12, { nullptr, "Flush I-Cache (Context)" } },
{ 0x03, { nullptr, "Segment Map" } }, { 0x13, { nullptr, "Flush I-Cache (User)" } },
{ 0x04, { nullptr, "Page Map" } }, { 0x14, { nullptr, "Flush D-Cache (Segment)" } },
@@ -621,9 +621,9 @@ private:
UINT32 m_cachetags[0x4000];
UINT32 m_cachedata[0x4000];
UINT32 m_ram_size, m_ram_size_words;
- UINT8 m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8
- UINT8 m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192
- UINT8 m_irq_reg; // IRQ control
+ UINT8 m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8
+ UINT8 m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192
+ UINT8 m_irq_reg; // IRQ control
UINT8 m_scc1_int, m_scc2_int;
UINT8 m_diag;
int m_arch;
@@ -694,7 +694,7 @@ UINT32 sun4_state::read_insn_data_4c(UINT8 asi, address_space &space, UINT32 off
switch ((m_pagemap[entry] >> 26) & 3)
{
- case 0: // type 0 space
+ case 0: // type 0 space
return m_type0space->read32(space, tmp, mem_mask);
case 1: // type 1 space
@@ -717,7 +717,7 @@ UINT32 sun4_state::read_insn_data_4c(UINT8 asi, address_space &space, UINT32 off
{
printf("sun4c: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
//m_maincpu->trap(SPARC_DATA_ACCESS_EXCEPTION);
- //m_buserr[0] = 0x88; // read, invalid PTE
+ //m_buserr[0] = 0x88; // read, invalid PTE
//m_buserr[1] = offset<<2;
}
return 0;
@@ -735,7 +735,7 @@ void sun4_state::write_insn_data_4c(UINT8 asi, address_space &space, UINT32 offs
if ((!(m_pagemap[entry] & PM_WRITEMASK)) || ((m_pagemap[entry] & PM_SYSMASK) && !(asi & 1)))
{
printf("sun4c: write protect MMU error (PC=%x)\n", m_maincpu->pc());
- m_buserr[0] = 0x8040; // write, protection error
+ m_buserr[0] = 0x8040; // write, protection error
m_buserr[1] = offset<<2;
m_maincpu->set_input_line(SPARC_MAE, ASSERT_LINE);
return;
@@ -750,7 +750,7 @@ void sun4_state::write_insn_data_4c(UINT8 asi, address_space &space, UINT32 offs
switch ((m_pagemap[entry] >> 26) & 3)
{
- case 0: // type 0
+ case 0: // type 0
m_type0space->write32(space, tmp, data, mem_mask);
return;
@@ -767,7 +767,7 @@ void sun4_state::write_insn_data_4c(UINT8 asi, address_space &space, UINT32 offs
{
printf("sun4c: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
//m_maincpu->trap(SPARC_DATA_ACCESS_EXCEPTION);
- //m_buserr[0] = 0x8; // invalid PTE
+ //m_buserr[0] = 0x8; // invalid PTE
//m_buserr[1] = offset<<2;
}
}
@@ -790,7 +790,7 @@ READ32_MEMBER( sun4_state::sun4c_mmu_r )
switch (asi)
{
- case 2: // system space
+ case 2: // system space
switch (offset >> 26)
{
case 3: // context reg
@@ -804,7 +804,7 @@ READ32_MEMBER( sun4_state::sun4c_mmu_r )
printf("sun4c: read buserror, PC=%x (mask %08x)\n", m_maincpu->pc(), mem_mask);
m_maincpu->set_input_line(SPARC_MAE, CLEAR_LINE);
retval = m_buserr[offset & 0xf];
- m_buserr[offset & 0xf] = 0; // clear on reading
+ m_buserr[offset & 0xf] = 0; // clear on reading
return retval;
case 8: // (d-)cache tags
@@ -815,7 +815,7 @@ READ32_MEMBER( sun4_state::sun4c_mmu_r )
//logerror("sun4c: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc());
return m_cachedata[offset&0x3fff];
- case 0xf: // UART bypass
+ case 0xf: // UART bypass
//printf("read UART bypass @ %x mask %08x\n", offset<<2, mem_mask);
switch (offset & 3)
{
@@ -830,7 +830,7 @@ READ32_MEMBER( sun4_state::sun4c_mmu_r )
return 0;
}
break;
- case 3: // segment map
+ case 3: // segment map
//printf("sun4: read segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", offset << 2, m_context & m_ctx_mask, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc());
if (mem_mask == 0xffff0000)
{
@@ -842,7 +842,7 @@ READ32_MEMBER( sun4_state::sun4c_mmu_r )
}
else
{
- // printf("sun4: read segment map w/unk mask %08x\n", mem_mask);
+ // printf("sun4: read segment map w/unk mask %08x\n", mem_mask);
}
return 0x0;
@@ -918,7 +918,7 @@ WRITE32_MEMBER( sun4_state::sun4c_mmu_w )
m_cachedata[offset&0x3fff] = data;
return;
- case 0xf: // UART bypass
+ case 0xf: // UART bypass
//printf("%08x to UART bypass @ %x, mask %08x\n", data, offset<<2, mem_mask);
switch (offset & 3)
{
@@ -942,16 +942,16 @@ WRITE32_MEMBER( sun4_state::sun4c_mmu_w )
else logerror("sun4c: writing segment map with unknown mask %08x, PC=%x\n", mem_mask, m_maincpu->pc());
//printf("sun4: %08x to segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", segdata, offset << 2, m_context, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc());
- m_segmap[m_context & m_ctx_mask][(offset>>16) & 0xfff] = segdata; // only 7 bits of the segment are necessary
+ m_segmap[m_context & m_ctx_mask][(offset>>16) & 0xfff] = segdata; // only 7 bits of the segment are necessary
}
return;
case 4: // page map
- page = (m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask) << 6; // get the PMEG
- page += (offset >> 10) & 0x3f; // add the offset
+ page = (m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask) << 6; // get the PMEG
+ page += (offset >> 10) & 0x3f; // add the offset
//printf("sun4: %08x to page map @ %x (entry %d, mem_mask %08x, PC=%x)\n", data, offset << 2, page, mem_mask, m_maincpu->pc());
COMBINE_DATA(&m_pagemap[page]);
- m_pagemap[page] &= 0xff00ffff; // these 8 bits are cleared when written and tested as such
+ m_pagemap[page] &= 0xff00ffff; // these 8 bits are cleared when written and tested as such
return;
case 8:
@@ -985,7 +985,7 @@ UINT32 sun4_state::read_insn_data(UINT8 asi, address_space &space, UINT32 offset
switch ((m_pagemap[entry] >> 26) & 3)
{
- case 0: // type 0 space
+ case 0: // type 0 space
return m_type0space->read32(space, tmp, mem_mask);
case 1: // type 1 space
@@ -1008,7 +1008,7 @@ UINT32 sun4_state::read_insn_data(UINT8 asi, address_space &space, UINT32 offset
{
printf("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
//m_maincpu->trap(SPARC_DATA_ACCESS_EXCEPTION);
- //m_buserr[0] = 0x88; // read, invalid PTE
+ //m_buserr[0] = 0x88; // read, invalid PTE
//m_buserr[1] = offset<<2;
}
return 0;
@@ -1032,7 +1032,7 @@ void sun4_state::write_insn_data(UINT8 asi, address_space &space, UINT32 offset,
switch ((m_pagemap[entry] >> 26) & 3)
{
- case 0: // type 0
+ case 0: // type 0
m_type0space->write32(space, tmp, data, mem_mask);
return;
@@ -1050,7 +1050,7 @@ void sun4_state::write_insn_data(UINT8 asi, address_space &space, UINT32 offset,
{
printf("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
//m_maincpu->trap(SPARC_DATA_ACCESS_EXCEPTION);
- //m_buserr[0] = 0x8; // invalid PTE
+ //m_buserr[0] = 0x8; // invalid PTE
//m_buserr[1] = offset<<2;
}
}
@@ -1071,7 +1071,7 @@ READ32_MEMBER( sun4_state::sun4_mmu_r )
switch (asi)
{
- case 2: // system space
+ case 2: // system space
switch (offset >> 26)
{
case 3: // context reg
@@ -1093,7 +1093,7 @@ READ32_MEMBER( sun4_state::sun4_mmu_r )
logerror("sun4: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc());
return 0xffffffff;
- case 0xf: // UART bypass
+ case 0xf: // UART bypass
//printf("read UART bypass @ %x mask %08x (PC=%x)\n", offset<<2, mem_mask, m_maincpu->pc());
switch (offset & 3)
{
@@ -1108,7 +1108,7 @@ READ32_MEMBER( sun4_state::sun4_mmu_r )
return 0;
}
break;
- case 3: // segment map
+ case 3: // segment map
//printf("sun4: read segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", offset << 2, m_context & m_ctx_mask, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc());
if (mem_mask == 0xffff0000)
{
@@ -1120,7 +1120,7 @@ READ32_MEMBER( sun4_state::sun4_mmu_r )
}
else
{
- // printf("sun4: read segment map w/unk mask %08x\n", mem_mask);
+ // printf("sun4: read segment map w/unk mask %08x\n", mem_mask);
}
return 0x0;
@@ -1130,7 +1130,7 @@ READ32_MEMBER( sun4_state::sun4_mmu_r )
//printf("sun4: read page map @ %x (entry %d, seg %d, PMEG %d, mem_mask %08x, PC=%x)\n", offset << 2, page, (offset >> 16) & 0xfff, m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask, mem_mask, m_maincpu->pc());
return m_pagemap[page];
- case 6: // region map used in 4/4xx, I don't know anything about this
+ case 6: // region map used in 4/4xx, I don't know anything about this
return 0;
case 8:
@@ -1183,7 +1183,7 @@ WRITE32_MEMBER( sun4_state::sun4_mmu_w )
}
return;
- case 7: // diag reg
+ case 7: // diag reg
m_diag = data >> 24;
#if 1
printf("sun4: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc());
@@ -1211,7 +1211,7 @@ WRITE32_MEMBER( sun4_state::sun4_mmu_w )
logerror("sun4: %08x to cache data @ %x, PC = %x\n", data, offset, m_maincpu->pc());
return;
- case 0xf: // UART bypass
+ case 0xf: // UART bypass
//printf("%08x to UART bypass @ %x, mask %08x\n", data, offset<<2, mem_mask);
switch (offset & 3)
{
@@ -1240,11 +1240,11 @@ WRITE32_MEMBER( sun4_state::sun4_mmu_w )
return;
case 4: // page map
- page = (m_segmap[m_context][(offset >> 16) & 0xfff]) << 5; // get the PMEG
- page += (offset >> 11) & 0x1f; // add the offset
+ page = (m_segmap[m_context][(offset >> 16) & 0xfff]) << 5; // get the PMEG
+ page += (offset >> 11) & 0x1f; // add the offset
//printf("sun4: %08x to page map @ %x (entry %d, mem_mask %08x, PC=%x)\n", data, offset << 2, page, mem_mask, m_maincpu->pc());
COMBINE_DATA(&m_pagemap[page]);
- m_pagemap[page] &= 0xff07ffff; // these bits are cleared when written and tested as such
+ m_pagemap[page] &= 0xff07ffff; // these bits are cleared when written and tested as such
return;
case 6: // region map, used in 4/4xx
@@ -1464,10 +1464,10 @@ static ADDRESS_MAP_START(type1space_map, AS_PROGRAM, 32, sun4_state)
AM_RANGE(0x05000000, 0x05000003) AM_READWRITE8(irq_r, irq_w, 0xffffffff)
AM_RANGE(0x06000000, 0x0607ffff) AM_ROM AM_REGION("user1", 0)
AM_RANGE(0x07200000, 0x07200003) AM_READWRITE8(fdc_r, fdc_w, 0xffffffff)
- AM_RANGE(0x08000000, 0x08000003) AM_READ(ss1_sl0_id) // slot 0 contains SCSI/DMA/Ethernet
+ AM_RANGE(0x08000000, 0x08000003) AM_READ(ss1_sl0_id) // slot 0 contains SCSI/DMA/Ethernet
AM_RANGE(0x08400000, 0x0840000f) AM_READWRITE(dma_r, dma_w)
AM_RANGE(0x08800000, 0x0880001f) AM_DEVICE8("scsibus:7:ncr5390", ncr5390_device, map, 0xff0000)
- AM_RANGE(0x0e000000, 0x0e000003) AM_READ(ss1_sl3_id) // slot 3 contains video board
+ AM_RANGE(0x0e000000, 0x0e000003) AM_READ(ss1_sl3_id) // slot 3 contains video board
AM_RANGE(0x0e800000, 0x0e8fffff) AM_RAM AM_SHARE("bw2_vram")
ADDRESS_MAP_END
@@ -2350,7 +2350,7 @@ COMP( 1991, sun4_50, sun4_300,0, sun4c, sun4, sun4_state, ss2,
COMP( 199?, sun4_20, sun4_300,0, sun4c, sun4, sun4_state, sun4c, "Sun Microsystems", "SPARCstation SLC (Sun 4/20)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
COMP( 1989, sun4_60, sun4_300,0, sun4c, sun4, sun4_state, sun4c, "Sun Microsystems", "SPARCstation 1 (Sun 4/60)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
COMP( 1990, sun4_65, sun4_300,0, sun4c, sun4, sun4_state, sun4c, "Sun Microsystems", "SPARCstation 1+ (Sun 4/65)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
-COMP( 1990, sun4_75, sun4_300,0, sun4c, sun4, sun4_state, ss2, "Sun Microsystems", "SPARCstation 2 (Sun 4/75)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
+COMP( 1990, sun4_75, sun4_300,0, sun4c, sun4, sun4_state, ss2, "Sun Microsystems", "SPARCstation 2 (Sun 4/75)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
// sun4m (using the SPARC "reference MMU", probably will go to a separate driver)
COMP( 1992, sun_s10, sun4_300,0, sun4c, sun4, sun4_state, sun4c, "Sun Microsystems", "SPARCstation 10 (Sun S10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
diff --git a/src/mame/drivers/tiamc1.cpp b/src/mame/drivers/tiamc1.cpp
index 77449e61fc1..7b59b5be424 100644
--- a/src/mame/drivers/tiamc1.cpp
+++ b/src/mame/drivers/tiamc1.cpp
@@ -12,8 +12,8 @@
* Konek-Gorbunok (Little Humpbacked Horse)
* Snezhnaja Koroleva (Snow Queen)
* S.O.S.
- * Gorodki
- * Kot-Rybolov
+ * Gorodki
+ * Kot-Rybolov
Other games known to exist on this hardware (interchangeable by the ROM swap):
* Avtogonki
@@ -114,7 +114,7 @@
- Check sprites priorities on the real hardware
- Check vertical background scrolling on the real hardware
- What charset control is used for?
- - Kot Rybolov viewable area size likely controlled by pit8253 timers 0 and 1, used in test mode only
+ - Kot Rybolov viewable area size likely controlled by pit8253 timers 0 and 1, used in test mode only
*/
@@ -177,14 +177,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( kotrybolov_io_map, AS_IO, 8, tiamc1_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x0f) AM_WRITE(tiamc1_sprite_y_w) // sprites Y
- AM_RANGE(0x10, 0x1f) AM_WRITE(tiamc1_sprite_x_w) // sprites X
- AM_RANGE(0x20, 0x2f) AM_WRITE(tiamc1_sprite_n_w) // sprites #
- AM_RANGE(0x30, 0x3f) AM_WRITE(tiamc1_sprite_a_w) // sprites attributes
- AM_RANGE(0xe0, 0xef) AM_WRITE(tiamc1_palette_w) // color ram
- AM_RANGE(0xf0, 0xf0) AM_WRITE(tiamc1_bg_vshift_w) // background V scroll
- AM_RANGE(0xf4, 0xf4) AM_WRITE(tiamc1_bg_hshift_w) // background H scroll
- AM_RANGE(0xf8, 0xf8) AM_WRITE(kot_bankswitch_w) // character rom offset
+ AM_RANGE(0x00, 0x0f) AM_WRITE(tiamc1_sprite_y_w) // sprites Y
+ AM_RANGE(0x10, 0x1f) AM_WRITE(tiamc1_sprite_x_w) // sprites X
+ AM_RANGE(0x20, 0x2f) AM_WRITE(tiamc1_sprite_n_w) // sprites #
+ AM_RANGE(0x30, 0x3f) AM_WRITE(tiamc1_sprite_a_w) // sprites attributes
+ AM_RANGE(0xe0, 0xef) AM_WRITE(tiamc1_palette_w) // color ram
+ AM_RANGE(0xf0, 0xf0) AM_WRITE(tiamc1_bg_vshift_w) // background V scroll
+ AM_RANGE(0xf4, 0xf4) AM_WRITE(tiamc1_bg_hshift_w) // background H scroll
+ AM_RANGE(0xf8, 0xf8) AM_WRITE(kot_bankswitch_w) // character rom offset
AM_RANGE(0xc0, 0xc3) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
AM_RANGE(0xd0, 0xd3) AM_DEVREADWRITE("kr580vv55a", i8255_device, read, write) /* input ports + coin counters & lockout */
ADDRESS_MAP_END
@@ -269,7 +269,7 @@ static INPUT_PORTS_START( kot )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* RAZR ??? */
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // Punch / Right
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // Kick / Left
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // Kick / Left
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@@ -332,7 +332,7 @@ static MACHINE_CONFIG_START( tiamc1, tiamc1_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 336, 0, 256, 312, 0, 256) // pixel clock and htotal comes from docs/schematics, the rest is guess (determined by undumped PROM)
+ MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 336, 0, 256, 312, 0, 256) // pixel clock and htotal comes from docs/schematics, the rest is guess (determined by undumped PROM)
MCFG_SCREEN_UPDATE_DRIVER(tiamc1_state, screen_update_tiamc1)
MCFG_SCREEN_PALETTE("palette")
@@ -364,7 +364,7 @@ static MACHINE_CONFIG_DERIVED(kot, tiamc1)
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(PIXEL_CLOCK / 4)
- MCFG_PIT8253_CLK2(SND_CLOCK) // guess
+ MCFG_PIT8253_CLK2(SND_CLOCK) // guess
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(tiamc1_state, pit8253_2_w))
MACHINE_CONFIG_END
@@ -526,13 +526,13 @@ ROM_START( kot )
ROM_LOAD( "856.8", 0x04000, 0x2000, CRC(9180c98f) SHA1(4085180b9e9772e965c487e7b02d88fcae973e87) )
ROM_REGION( 0x8000, "gfx1", 0 )
- ROM_LOAD( "850.5", 0x00000, 0x2000, CRC(5dc3a102) SHA1(e97d219f7004291438b991435b7fe5d5be01d468) ) // sprite gfx
+ ROM_LOAD( "850.5", 0x00000, 0x2000, CRC(5dc3a102) SHA1(e97d219f7004291438b991435b7fe5d5be01d468) ) // sprite gfx
ROM_LOAD( "851.6", 0x02000, 0x2000, CRC(7db239a0) SHA1(af5772afff9009f63e2ab95c1cb00e047f3ed7e4) )
ROM_LOAD( "852.7", 0x04000, 0x2000, CRC(c7700f88) SHA1(1a20cc60b083259070e4f1687b09a31fc763d47e) )
ROM_LOAD( "853.8", 0x06000, 0x2000, CRC(b94bf1af) SHA1(da403c51fd78f99b82304c67f2197078f4ea0bf5) )
ROM_REGION( 0x8000, "gfx2", 0 )
- ROM_LOAD( "846.1", 0x00000, 0x2000, CRC(42447f4a) SHA1(bd35f2f5e468f9191680bf2c1800e09bb9ae1691) ) // tile gfx
+ ROM_LOAD( "846.1", 0x00000, 0x2000, CRC(42447f4a) SHA1(bd35f2f5e468f9191680bf2c1800e09bb9ae1691) ) // tile gfx
ROM_LOAD( "847.2", 0x02000, 0x2000, CRC(99ada5e8) SHA1(9425a515105ec9e9989aae736645b270e39420be) )
ROM_LOAD( "848.3", 0x04000, 0x2000, CRC(a124cff4) SHA1(d1d8e6f725a6f30058d52cdbe80b598149cd6052) )
ROM_LOAD( "849.4", 0x06000, 0x2000, CRC(5d27fda6) SHA1(f1afb39c7422caaa5eff53388f1b7241dd7c1cd7) )
diff --git a/src/mame/drivers/tv990.cpp b/src/mame/drivers/tv990.cpp
index 544765f2086..4f1b7b163c9 100644
--- a/src/mame/drivers/tv990.cpp
+++ b/src/mame/drivers/tv990.cpp
@@ -3,10 +3,10 @@
/***************************************************************************
TeleVideo 990/995 terminal
-
+
Driver by Carl and R. Belmont
Thanks to Al Kossow.
-
+
H/W:
68000-P16 CPU (clock unknown, above 10 MHz it outruns the AT keyboard controller)
16C452 dual 16450 (PC/AT standard) UART + PC-compatible Centronics (integrated into
@@ -14,7 +14,7 @@
AMI MEGA-KBD-H-Q PS/2 keyboard interface on 990, PS/2 8042 on 995
Televideo ASIC marked "134446-00 TVI1111-0 427"
3x AS7C256 (32K x 8 SRAM)
-
+
IRQs:
2 = PS/2 keyboard
3 = Centronics
@@ -24,7 +24,7 @@
Video modes include 80 or 132 wide by 24, 25, 42, 43, 48, or 49 lines high plus an
optional status bar
- Modes include TeleVideo 990, 950, and 955, Wyse WY-60, WY-150/120/50+/50, ANSI,
+ Modes include TeleVideo 990, 950, and 955, Wyse WY-60, WY-150/120/50+/50, ANSI,
DEC VT320/220, VT100/52, SCO Console, and PC TERM.
****************************************************************************/
@@ -37,8 +37,8 @@
#include "machine/nvram.h"
#include "sound/beep.h"
-#define UART0_TAG "ns16450_0"
-#define UART1_TAG "ns16450_1"
+#define UART0_TAG "ns16450_0"
+#define UART1_TAG "ns16450_1"
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
@@ -71,14 +71,14 @@ public:
virtual void machine_reset() override;
virtual void machine_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
-
+
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
-
+
DECLARE_READ16_MEMBER(tvi1111_r);
DECLARE_WRITE16_MEMBER(tvi1111_w);
DECLARE_READ8_MEMBER(kbdc_r);
DECLARE_WRITE8_MEMBER(kbdc_w);
-
+
WRITE_LINE_MEMBER(uart0_irq);
WRITE_LINE_MEMBER(uart1_irq);
@@ -100,7 +100,7 @@ INTERRUPT_GEN_MEMBER(tv990_state::vblank)
void tv990_state::machine_start()
{
m_rowtimer = timer_alloc();
-
+
save_item(NAME(tvi1111_regs));
save_item(NAME(m_rowh));
save_item(NAME(m_width));
@@ -128,7 +128,7 @@ READ16_MEMBER(tv990_state::tvi1111_r)
{
if (offset == (0x32/2))
{
- tvi1111_regs[offset] |= 8; // loop at 109ca wants this set
+ tvi1111_regs[offset] |= 8; // loop at 109ca wants this set
}
else if(offset == 0x1d)
{
@@ -230,7 +230,7 @@ UINT32 tv990_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c
attr ^= attrchg;
}
- if (attr & 0x4) // inverse video?
+ if (attr & 0x4) // inverse video?
{
palette[1] = m_palette->pen(0);
palette[0] = (attr & 0x10) ? m_palette->pen(1) : m_palette->pen(2);
@@ -295,13 +295,13 @@ WRITE8_MEMBER(tv990_state::kbdc_w)
static ADDRESS_MAP_START(tv990_mem, AS_PROGRAM, 16, tv990_state)
AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_REGION("maincpu", 0)
- AM_RANGE(0x060000, 0x06ffff) AM_RAM AM_SHARE("vram") // character/attribute RAM
- AM_RANGE(0X080000, 0X087fff) AM_RAM AM_SHARE("fontram") // font RAM
+ AM_RANGE(0x060000, 0x06ffff) AM_RAM AM_SHARE("vram") // character/attribute RAM
+ AM_RANGE(0X080000, 0X087fff) AM_RAM AM_SHARE("fontram") // font RAM
AM_RANGE(0x090000, 0x0900ff) AM_READWRITE(tvi1111_r, tvi1111_w)
AM_RANGE(0x0a0000, 0x0a000f) AM_DEVREADWRITE8(UART0_TAG, ns16450_device, ins8250_r, ins8250_w, 0x00ff)
AM_RANGE(0x0a0010, 0x0a001f) AM_DEVREADWRITE8(UART1_TAG, ns16450_device, ins8250_r, ins8250_w, 0x00ff)
AM_RANGE(0x0b0000, 0x0b0003) AM_READWRITE8(kbdc_r, kbdc_w, 0x00ff)
- AM_RANGE(0x0c0000, 0x0c7fff) AM_RAM AM_SHARE("nvram")// work RAM
+ AM_RANGE(0x0c0000, 0x0c7fff) AM_RAM AM_SHARE("nvram")// work RAM
ADDRESS_MAP_END
/* Input ports */
@@ -339,7 +339,7 @@ INPUT_CHANGED_MEMBER(tv990_state::color)
void tv990_state::machine_reset()
{
m_rowtimer->adjust(m_screen->time_until_pos(0));
-
+
memset(tvi1111_regs, 0, sizeof(tvi1111_regs));
m_rowh = 16;
m_width = 80;
@@ -348,10 +348,10 @@ void tv990_state::machine_reset()
static MACHINE_CONFIG_START( tv990, tv990_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 14967500) // verified (59.86992/4)
+ MCFG_CPU_ADD("maincpu", M68000, 14967500) // verified (59.86992/4)
MCFG_CPU_PROGRAM_MAP(tv990_mem)
MCFG_CPU_VBLANK_INT_DRIVER("screen", tv990_state, vblank)
-
+
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green)
MCFG_SCREEN_UPDATE_DRIVER(tv990_state, screen_update)
MCFG_SCREEN_SIZE(132*16, 50*16)
@@ -380,7 +380,7 @@ static MACHINE_CONFIG_START( tv990, tv990_state )
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, rx_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, dcd_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, cts_w))
-
+
MCFG_DEVICE_ADD("pc_kbdc", KBDC8042, 0)
MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_AT386)
MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(INPUTLINE("maincpu", M68K_IRQ_2))
@@ -395,14 +395,14 @@ MACHINE_CONFIG_END
/* ROM definition */
ROM_START( tv990 )
ROM_REGION( 0x40000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "180003-89_u3.bin", 0x000000, 0x010000, CRC(0465fc55) SHA1(b8874ce54bf2bf4f77664194d2f23c0e4e6ccbe9) )
- ROM_LOAD16_BYTE( "180003-90_u4.bin", 0x000001, 0x010000, CRC(fad7d77d) SHA1(f1114a4a07c8b4ffa0323a2e7ce03d82a386f7d3) )
+ ROM_LOAD16_BYTE( "180003-89_u3.bin", 0x000000, 0x010000, CRC(0465fc55) SHA1(b8874ce54bf2bf4f77664194d2f23c0e4e6ccbe9) )
+ ROM_LOAD16_BYTE( "180003-90_u4.bin", 0x000001, 0x010000, CRC(fad7d77d) SHA1(f1114a4a07c8b4ffa0323a2e7ce03d82a386f7d3) )
ROM_END
ROM_START( tv995 )
ROM_REGION( 0x40000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "995-65_u3.bin", 0x000000, 0x020000, CRC(2d71b6fe) SHA1(a2a3406c19308eb9232db319ea8f151949b2ac74) )
- ROM_LOAD16_BYTE( "995-65_u4.bin", 0x000001, 0x020000, CRC(dc002af2) SHA1(9608e7a729c5ac0fc58f673eaf441d2f4f591ec6) )
+ ROM_LOAD16_BYTE( "995-65_u3.bin", 0x000000, 0x020000, CRC(2d71b6fe) SHA1(a2a3406c19308eb9232db319ea8f151949b2ac74) )
+ ROM_LOAD16_BYTE( "995-65_u4.bin", 0x000001, 0x020000, CRC(dc002af2) SHA1(9608e7a729c5ac0fc58f673eaf441d2f4f591ec6) )
ROM_END
/* Driver */
diff --git a/src/mame/includes/bfm_sc4.h b/src/mame/includes/bfm_sc4.h
index 909325ea1ed..def6c17254a 100644
--- a/src/mame/includes/bfm_sc4.h
+++ b/src/mame/includes/bfm_sc4.h
@@ -59,19 +59,19 @@
#define SC45_BUTTON_MATRIX_20_0 IPT_SERVICE1 // green / test
-static const UINT8 SEGMENT_34_ENCODING_LOOKUP[16] =
+static const UINT8 SEGMENT_34_ENCODING_LOOKUP[16] =
{
- 63, // 0
- 6, // 1
- 91, // 2
- 79, // 3
+ 63, // 0
+ 6, // 1
+ 91, // 2
+ 79, // 3
102,// 4
109,// 5
125,// 6
- 7, // 7
+ 7, // 7
127,// 8
103,// 9
- 0, // 10
+ 0, // 10
121,// 11
121,// 12
121,// 13
diff --git a/src/mame/includes/legionna.h b/src/mame/includes/legionna.h
index 78c95cc17c8..068571f2a72 100644
--- a/src/mame/includes/legionna.h
+++ b/src/mame/includes/legionna.h
@@ -96,4 +96,3 @@ public:
required_device<palette_device> m_palette;
optional_device<raiden2cop_device> m_raiden2cop;
};
-
diff --git a/src/mame/includes/vendetta.h b/src/mame/includes/vendetta.h
index 497db3c2886..b68c15c214b 100644
--- a/src/mame/includes/vendetta.h
+++ b/src/mame/includes/vendetta.h
@@ -34,7 +34,7 @@ public:
m_videobank0(*this, "videobank0"),
m_videobank1(*this, "videobank1") { }
-
+
/* video-related */
int m_layer_colorbase[3];
int m_sprite_colorbase;
diff --git a/src/mame/machine/archimds.cpp b/src/mame/machine/archimds.cpp
index f451db8993e..b22ef889e37 100644
--- a/src/mame/machine/archimds.cpp
+++ b/src/mame/machine/archimds.cpp
@@ -71,7 +71,7 @@ void archimedes_state::archimedes_request_fiq(int mask)
m_ioc_regs[FIQ_STATUS] |= mask;
//printf("STATUS:%02x IRQ:%02x MASK:%02x\n",m_ioc_regs[FIQ_STATUS],mask,m_ioc_regs[FIQ_MASK]);
-
+
if (m_ioc_regs[FIQ_STATUS] & m_ioc_regs[FIQ_MASK])
{
generic_pulse_irq_line(m_maincpu, ARM_FIRQ_LINE, 1);
diff --git a/src/mame/machine/opwolf.cpp b/src/mame/machine/opwolf.cpp
index 9bb86e05f0c..5f738556857 100644
--- a/src/mame/machine/opwolf.cpp
+++ b/src/mame/machine/opwolf.cpp
@@ -95,11 +95,11 @@
Bootleg doesn't support service switch
If you die after round 6 then the bootleg fails to reset the difficulty
for the next game.
- The bootleg does not contain data for the 3 mini-levels ('Enemy has located you'),
- instead it prevents them running by writing 0 to location 70 in the shared memory.
- The bootleg does not play the special powder magazine (level 4) animation.
- The bootleg does not vertically scroll the screen when all men killed in level 5
- The bootleg does not update the enemy spawn tables at various points.
+ The bootleg does not contain data for the 3 mini-levels ('Enemy has located you'),
+ instead it prevents them running by writing 0 to location 70 in the shared memory.
+ The bootleg does not play the special powder magazine (level 4) animation.
+ The bootleg does not vertically scroll the screen when all men killed in level 5
+ The bootleg does not update the enemy spawn tables at various points.
Notes by bmcphail@vcmame.net
@@ -645,11 +645,11 @@ WRITE16_MEMBER(opwolf_state::opwolf_cchip_data_w)
{
//int logValue=1;
//if (offset==0x1c && offset==0x1d && offset==0x1e && offset==0x1f && offset==0x20) // Enemies, tanks, choppers, boats
- // logValue=0;
+ // logValue=0;
//if (offset==0x50 && offset==0x51 && offset==0x52 && offset==0x53) // Coins
- // logValue=0;
+ // logValue=0;
//if (logValue)
- // logerror("%08x: opwolf 68K writes c-chip %02x at %04x/%04x (bank %04x)\n", space.device().safe_pc(), data & 0xff, offset*2, offset, m_current_bank);
+ // logerror("%08x: opwolf 68K writes c-chip %02x at %04x/%04x (bank %04x)\n", space.device().safe_pc(), data & 0xff, offset*2, offset, m_current_bank);
m_cchip_ram[(m_current_bank * 0x400) + offset] = data & 0xff;
@@ -756,13 +756,13 @@ READ16_MEMBER(opwolf_state::opwolf_cchip_data_r)
//int logValue=1;
//if (offset==0x1c || offset==0x1d || offset==0x1e || offset==0x1f || offset==0x20) // Enemies, tanks, choppers, boats
- // logValue=0;
+ // logValue=0;
//if (offset==0x50 || offset==0x51 || offset==0x52 || offset==0x53) // Coins
- // logValue=0;
+ // logValue=0;
//if (space.device().safe_pc()==0xc18 && space.device().safe_pc()!=0xc2e && space.device().safe_pc()!=0xc9e)
- // logValue=0;
+ // logValue=0;
//if (logValue)
- // logerror("%08x: opwolf 68K reads c-chip at %04x/%04x (bank %04x)\n", space.device().safe_pc(), offset*2, offset, m_current_bank);
+ // logerror("%08x: opwolf 68K reads c-chip at %04x/%04x (bank %04x)\n", space.device().safe_pc(), offset*2, offset, m_current_bank);
return m_cchip_ram[(m_current_bank * 0x400) + offset];
}
@@ -782,7 +782,7 @@ TIMER_CALLBACK_MEMBER(opwolf_state::cchip_timer)
// Dev Cheat - kill all enemeies
//if ((ioport("IN1")->read()&0x10)!=0x10)
//{
- // m_cchip_ram[0x1c] = m_cchip_ram[0x1d] = m_cchip_ram[0x1e] = m_cchip_ram[0x1f] = m_cchip_ram[0x20] = 0;
+ // m_cchip_ram[0x1c] = m_cchip_ram[0x1d] = m_cchip_ram[0x1e] = m_cchip_ram[0x1f] = m_cchip_ram[0x20] = 0;
//}
// Coin slots
@@ -888,7 +888,7 @@ TIMER_CALLBACK_MEMBER(opwolf_state::cchip_timer)
// When level 4 (powder magazine) is complete the c-chip triggers an explosion animation.
if (m_triggeredLevel4==0 && m_cchip_ram[0x5f]==0) // Don't write unless 68K is ready (0 at 0x5f))
- {
+ {
m_cchip_ram[0x5f]=10;
m_triggeredLevel4=1;
}
diff --git a/src/mame/machine/seibucop/seibucop.cpp b/src/mame/machine/seibucop/seibucop.cpp
index 72594e43513..280093b0835 100644
--- a/src/mame/machine/seibucop/seibucop.cpp
+++ b/src/mame/machine/seibucop/seibucop.cpp
@@ -49,18 +49,18 @@
- stage 4: has sprite stuck on bottom-left of screen;
- palette dims too much on attract / continue screen.
It's known that the DMA data arrangement gives same results on a real Legionnaire board, so shrug?
- Seibu Cup Soccer
- - Handles collision detection via the 130e/3bb0 macros
- 130e version in this makes a sub instead of an add as last opcode, which in turn reflects with
- the distance (which we do know that is internally loaded somehow).
+ Seibu Cup Soccer
+ - Handles collision detection via the 130e/3bb0 macros
+ 130e version in this makes a sub instead of an add as last opcode, which in turn reflects with
+ the distance (which we do know that is internally loaded somehow).
d104 macro is called before this, it likely sets the range for the 130e snippets.
Example snippet (note: there are multiple calls to 130e)
013F3C: 3D7C 130E 0100 move.w #$130e, ($100,A6) // angle macro
013F42: 302E 01B4 move.w ($1b4,A6), D0 // take the angle
013F46: 082E 000F 01B0 btst #$f, ($1b0,A6) // is status exception flag raised?
013F4C: 6712 beq $13f60
-013F4E: 2228 0004 move.l ($4,A0), D1
-013F52: B2A8 0044 cmp.l ($44,A0), D1 // compares Y value against the next object (yes, cop_regs[1] + 0x40 = cop_regs[0])
+013F4E: 2228 0004 move.l ($4,A0), D1
+013F52: B2A8 0044 cmp.l ($44,A0), D1 // compares Y value against the next object (yes, cop_regs[1] + 0x40 = cop_regs[0])
013F56: 6708 beq $13f60 // if equal then check the distance
013F58: 6E04 bgt $13f5e
013F5A: 7040 moveq #$40, D0 // set angle direction left ...
@@ -69,12 +69,12 @@
013F60: 3D7C 3BB0 0100 move.w #$3bb0, ($100,A6) // dist macro
013F66: 1140 003D move.b D0, ($3d,A0) // move angle value to [0x3d]
013F6A: 4E75 rts
- Zero Team
- - Some faulty collision detection, e.g. crate in front of aquarium in stage 1
- - Bird Boss jumps to wrong direction
- the sequence called is:
- write to reg 4 then execute 0xfc84 and 0xf790, finally reads the distance.
-
+ Zero Team
+ - Some faulty collision detection, e.g. crate in front of aquarium in stage 1
+ - Bird Boss jumps to wrong direction
+ the sequence called is:
+ write to reg 4 then execute 0xfc84 and 0xf790, finally reads the distance.
+
Tech notes (to move into own file with doxy mainpage):
-----------
[0x6fc] DMA mode bit scheme:
@@ -83,16 +83,16 @@
---- ---- ---x ---- internal buffer selector
---- ---- ---- x--- size modifier? Bus transfer size actually?
---- ---- ---- -xxx select channel
-
- work RAM object structure (in seibu cup soccer)
- all object have a [0x40] boundary
- [0x04-0x07] Y position
- [0x08-0x0b] X position
- [0x10-0x13] Y offset (a.k.a. calculated sine)
- [0x14-0x17] X offset (a.k.a. calculated cosine)
- [0x37] angle direction
- TOC
- [0x11381c] ball object
+
+ work RAM object structure (in seibu cup soccer)
+ all object have a [0x40] boundary
+ [0x04-0x07] Y position
+ [0x08-0x0b] X position
+ [0x10-0x13] Y offset (a.k.a. calculated sine)
+ [0x14-0x17] X offset (a.k.a. calculated cosine)
+ [0x37] angle direction
+ TOC
+ [0x11381c] ball object
***************************************************************************/
@@ -316,7 +316,7 @@ WRITE16_MEMBER(raiden2cop_device::cop_pgm_data_w)
cop_func_value[idx] = cop_latch_value;
cop_func_mask[idx] = cop_latch_mask;
bool upper_regs = ((cop_latch_trigger >> 10) & 1) == 1; // f1
-
+
if(data) {
int off = data & 31;
int reg = ((data >> 5) & 3) + (upper_regs == true ? 4 : 0);
@@ -325,7 +325,7 @@ WRITE16_MEMBER(raiden2cop_device::cop_pgm_data_w)
logerror("COPDIS: %04x s=%02x f1=%x l=%x f2=%02x %x %04x %02x %03x %02x.%x.%02x ", cop_latch_trigger, (cop_latch_trigger >> 11) << 3, (cop_latch_trigger >> 10) & 1, ((cop_latch_trigger >> 7) & 7)+1, cop_latch_trigger & 0x7f, cop_latch_value, cop_latch_mask, cop_latch_addr, data, op, reg, off);
off *= 2;
-
+
// COPDIS: 0205 s=00 f1=0 l=5 f2=05 6 ffeb 00 188 03.0.08 read32 10(r0)
// COPDIS: 0205 s=00 f1=0 l=5 f2=05 6 ffeb 01 282 05.0.02 add32 4(r0)
// COPDIS: 0205 s=00 f1=0 l=5 f2=05 6 ffeb 02 082 01.0.02 write32 4(r0)
@@ -763,13 +763,13 @@ WRITE16_MEMBER(raiden2cop_device::cop_dma_trigger_w)
case 0x85:
case 0x86:
case 0x87:
- {
+ {
dma_palette_brightness();
break;
}
/********************************************************************************************************************/
- case 0x09:
+ case 0x09:
{
UINT32 src, dst, size;
int i;
@@ -1145,7 +1145,7 @@ WRITE16_MEMBER( raiden2cop_device::cop_cmd_w)
case 0x7e05:
execute_7e05(offset, data);
break;
-
+
case 0xa100:
case 0xa180:
execute_a100(offset, data); // collisions
@@ -1585,9 +1585,9 @@ WRITE16_MEMBER(raiden2cop_device::LEGACY_cop_cmd_w)
return;
}
/*
- [:raiden2cop] COPDIS: 5105 s=50 f1=0 l=3 f2=05 5 fefb 50 a80 15.0.00 [:raiden2cop] sub32 (r0)
- [:raiden2cop] COPDIS: 5105 s=50 f1=0 l=3 f2=05 5 fefb 51 984 13.0.04 [:raiden2cop] write16h 8(r0)
- [:raiden2cop] COPDIS: 5105 s=50 f1=0 l=3 f2=05 5 fefb 52 082 01.0.02 [:raiden2cop] addmem32 4(r0)
+ [:raiden2cop] COPDIS: 5105 s=50 f1=0 l=3 f2=05 5 fefb 50 a80 15.0.00 [:raiden2cop] sub32 (r0)
+ [:raiden2cop] COPDIS: 5105 s=50 f1=0 l=3 f2=05 5 fefb 51 984 13.0.04 [:raiden2cop] write16h 8(r0)
+ [:raiden2cop] COPDIS: 5105 s=50 f1=0 l=3 f2=05 5 fefb 52 082 01.0.02 [:raiden2cop] addmem32 4(r0)
*/
if (check_command_matches(command, 0xa80, 0x984, 0x082, 0x000, 0x000, 0x000, 0x000, 0x000, 5, 0xfefb))
@@ -1608,14 +1608,14 @@ WRITE16_MEMBER(raiden2cop_device::LEGACY_cop_cmd_w)
printf("5905\n");
return;
}
-
+
// player to ball collision
if (check_command_matches(command, 0xa88, 0x994, 0x088, 0x000, 0x000, 0x000, 0x000, 0x000, 5, 0xfefb))
{
execute_f105(offset,data);
return;
}
-
+
if (executed == 0)
{
printf("did not execute %04x\n", data); // cup soccer triggers this a lot (and others)
diff --git a/src/mame/machine/seibucop/seibucop.h b/src/mame/machine/seibucop/seibucop.h
index 88599840fc4..7802f791f3a 100644
--- a/src/mame/machine/seibucop/seibucop.h
+++ b/src/mame/machine/seibucop/seibucop.h
@@ -258,7 +258,7 @@ private:
void LEGACY_execute_d104(int offset, UINT16 data);
void LEGACY_execute_6980(int offset, UINT16 data);
void LEGACY_execute_c480(int offset, UINT16 data);
-
+
void cop_collision_update_hitbox(UINT16 data, int slot, UINT32 hitadr);
void bcd_update();
diff --git a/src/mame/machine/seicop.cpp b/src/mame/machine/seicop.cpp
index 5b1ba2b44a4..99e0a97daef 100644
--- a/src/mame/machine/seicop.cpp
+++ b/src/mame/machine/seicop.cpp
@@ -5,10 +5,10 @@
COPDX bootleg simulation
- Seibu Cup Soccer (bootleg)
- Notice that only the bare minimum is supported, which is what the bootleg device actually
+ Notice that only the bare minimum is supported, which is what the bootleg device actually
provides. Unlike the original device and many other Seibu customs, it has no DMA.
- Apparently it's an Actel PL84c FPGA programmed to be a Seibu COP clone.
- The internal operations are actually loaded via the ROMs, we use the original algorithm
+ Apparently it's an Actel PL84c FPGA programmed to be a Seibu COP clone.
+ The internal operations are actually loaded via the ROMs, we use the original algorithm
for the trigger until we find the proper hookup.
********************************************************************************************/
@@ -46,7 +46,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
UINT8 offs;
offs = (offset & 3) * 4;
-
+
switch(data)
{
default:
@@ -54,7 +54,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
break;
case 0x0000:
break;
-
+
case 0xf105:
break;
@@ -89,7 +89,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
int target_reg = data & 0x200 ? 2 : 1;
int dy = (m_host_space->read_dword(m_reg[target_reg]+4) >> 16) - (m_host_space->read_dword(m_reg[0]+4) >> 16);
int dx = (m_host_space->read_dword(m_reg[target_reg]+8) >> 16) - (m_host_space->read_dword(m_reg[0]+8) >> 16);
-
+
//m_status = 7;
if(!dy) {
m_status = 0x8000;
@@ -112,7 +112,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
break;
}
-
+
case 0x3bb0:
{
int dy = m_dy;
@@ -121,13 +121,13 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
dx >>= 16;
dy >>= 16;
m_dist = sqrt((double)(dx*dx+dy*dy));
-
+
// TODO: is this right?
m_host_space->write_word(m_reg[0]+(0x38), m_dist);
break;
}
-
+
// TODO: wrong
case 0x42c2:
{
@@ -143,18 +143,18 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
m_host_space->write_dword(m_reg[0] + (0x38), (m_dist << (5 - 1)) / div);
break;
}
-
+
/*
- 00000-0ffff:
- amp = x/256
- ang = x & 255
- s = sin(ang*2*pi/256)
- val = trunc(s*amp)
- if(s<0)
- val--
- if(s == 192)
- val = -2*amp
- */
+ 00000-0ffff:
+ amp = x/256
+ ang = x & 255
+ s = sin(ang*2*pi/256)
+ val = trunc(s*amp)
+ if(s<0)
+ val--
+ if(s == 192)
+ val = -2*amp
+ */
case 0x8100:
{
UINT16 sin_offs; //= m_host_space->read_dword(m_reg[0]+(0x34));
@@ -164,7 +164,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
double angle = raw_angle * M_PI / 128;
double amp = (65536 >> 5)*(m_host_space->read_word(m_reg[0]+(0x36^2)) & 0xff);
int res;
-
+
/* TODO: up direction, why? */
if(raw_angle == 0xc0)
@@ -176,7 +176,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
break;
}
-
+
case 0x8900:
{
int raw_angle = (m_host_space->read_word(m_reg[0]+(0x34^2)) & 0xff);
@@ -201,7 +201,7 @@ WRITE16_MEMBER(seibu_cop_bootleg_device::cmd_trigger_w)
break;
}
}
-
+
}
READ16_MEMBER(seibu_cop_bootleg_device::status_r)
@@ -227,9 +227,9 @@ READ16_MEMBER(seibu_cop_bootleg_device::d104_move_r)
WRITE16_MEMBER(seibu_cop_bootleg_device::d104_move_w)
{
if(offset == 1)
- m_d104_move_offset = (m_d104_move_offset & 0xffff0000) | (data & 0xffff);
+ m_d104_move_offset = (m_d104_move_offset & 0xffff0000) | (data & 0xffff);
else
- m_d104_move_offset = (m_d104_move_offset & 0xffff) | (data << 16);
+ m_d104_move_offset = (m_d104_move_offset & 0xffff) | (data << 16);
}
// anything that is read thru ROM range 0xc**** is replacement code, therefore on this HW they are latches.
@@ -247,8 +247,8 @@ ADDRESS_MAP_END
seibu_cop_bootleg_device::seibu_cop_bootleg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEIBU_COP_BOOTLEG, "Seibu COP (Bootleg)", tag, owner, clock, "seibu_cop_boot", __FILE__),
- device_memory_interface(mconfig, *this),
- m_space_config("regs", ENDIANNESS_LITTLE, 16, 9, 0, nullptr, *ADDRESS_MAP_NAME(seibucopbl_map))
+ device_memory_interface(mconfig, *this),
+ m_space_config("regs", ENDIANNESS_LITTLE, 16, 9, 0, nullptr, *ADDRESS_MAP_NAME(seibucopbl_map))
{
}
@@ -275,7 +275,7 @@ void seibu_cop_bootleg_device::device_config_complete()
void seibu_cop_bootleg_device::device_start()
{
-// m_cop_mcu_ram = reinterpret_cast<UINT16 *>(machine().root_device().memshare("cop_mcu_ram")->ptr());
+// m_cop_mcu_ram = reinterpret_cast<UINT16 *>(machine().root_device().memshare("cop_mcu_ram")->ptr());
}
diff --git a/src/mame/machine/seicop.h b/src/mame/machine/seicop.h
index eb15b497572..ec771f96edf 100644
--- a/src/mame/machine/seicop.h
+++ b/src/mame/machine/seicop.h
@@ -6,7 +6,7 @@
class seibu_cop_bootleg_device : public device_t,
- public device_memory_interface
+ public device_memory_interface
{
public:
seibu_cop_bootleg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -34,7 +34,7 @@ protected:
private:
cpu_device *m_host_cpu; /**< reference to the host cpu */
- address_space *m_host_space; /**< reference to the host cpu space */
+ address_space *m_host_space; /**< reference to the host cpu space */
const address_space_config m_space_config;
inline UINT16 read_word(offs_t address);
inline void write_word(offs_t address, UINT16 data);
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 2bcc0310c3d..8d4621155f7 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -28269,7 +28269,7 @@ ryuuha // (c) 1987
secolove // (c) 1986
seiha // (c) 1987
seiham // (c) 1987
-swinggal // (c) 1987 Digital Denshi
+swinggal // (c) 1987 Digital Denshi
vipclub // (c) 1988 Daiichi Denshi
@source:nbmj8891.cpp
@@ -34059,13 +34059,13 @@ sun3_460 //
sun_s10 //
sun_s20 //
sun4_20 //
-sun4_110 //
+sun4_110 //
sun4_300 //
-sun4_400 //
+sun4_400 //
sun4_40 //
sun4_50 //
sun4_60 //
-sun4_65 //
+sun4_65 //
sun4_75 //
@source:suna16.cpp
@@ -35736,8 +35736,8 @@ tutor // 1983? Tomy Tutor
tv950 //
@source:tv990.cpp
-tv990 // 1992? TeleVideo
-tv995 // 1994 TeleVideo
+tv990 // 1992? TeleVideo
+tv995 // 1994 TeleVideo
@source:tvc.cpp
tvc64 //
diff --git a/src/mame/video/epos.cpp b/src/mame/video/epos.cpp
index ecc350afd0a..d0096b4dd45 100644
--- a/src/mame/video/epos.cpp
+++ b/src/mame/video/epos.cpp
@@ -90,7 +90,7 @@ UINT32 epos_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co
int x = (offs % 136) * 2;
int y = (offs / 136);
-
+
if (flip_screen())
{
x = 270 - x; // wrong
diff --git a/src/mame/video/gime.cpp b/src/mame/video/gime.cpp
index 38fcbfd76f3..8a1c2debae5 100644
--- a/src/mame/video/gime.cpp
+++ b/src/mame/video/gime.cpp
@@ -240,7 +240,7 @@ inline gime_base_device::pixel_t gime_base_device::get_composite_color(int color
0xfd8ef1, 0xef8eff, 0xd895ff, 0xb9a1ff, 0x86c4ff, 0x78d4f2, 0x71e2b6, 0xffffff,
};
- // composite output with phase inverted
+ // composite output with phase inverted
static pixel_t composite_palette_180[64] = {
0x000000, 0x5a0e5a, 0x4f0c4f, 0x360f40, 0x0d213c, 0x003334, 0x004141, 0x004943,
0x005409, 0x005600, 0x114c00, 0x263700, 0x392500, 0x491d00, 0x4f0f3e, 0x590e59,
@@ -897,7 +897,7 @@ inline void gime_base_device::write_gime_register(offs_t offset, UINT8 data)
// Bits 0-2 LPR Lines per row
if (xorval & 0x20)
{
- // on phase invert re-load the alternate composite palette
+ // on phase invert re-load the alternate composite palette
m_composite_phase_invert = (data & 0x20);
update_composite_palette();
}
diff --git a/src/mame/video/itech32.cpp b/src/mame/video/itech32.cpp
index 712ff41a32c..da6a84f3f06 100644
--- a/src/mame/video/itech32.cpp
+++ b/src/mame/video/itech32.cpp
@@ -198,7 +198,7 @@ void itech32_state::video_start()
m_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(itech32_state::scanline_interrupt),this));
m_enable_latch[0] = 1;
m_enable_latch[1] = (m_planes > 1) ? 1 : 0;
-
+
save_item(NAME(m_xfer_xcount));
save_item(NAME(m_xfer_ycount));
save_item(NAME(m_xfer_xcur));
diff --git a/src/mame/video/legionna.cpp b/src/mame/video/legionna.cpp
index 95d6182e445..07b8cce83af 100644
--- a/src/mame/video/legionna.cpp
+++ b/src/mame/video/legionna.cpp
@@ -13,8 +13,8 @@
- MBK
- OBJ 3
- LBK
- TODO: Anything else doesn't match this scheme (most notably Denjin Makai),
- guess it's selectable by PROM, CRTC or COP ...
+ TODO: Anything else doesn't match this scheme (most notably Denjin Makai),
+ guess it's selectable by PROM, CRTC or COP ...
***************************************************************************/
@@ -224,13 +224,13 @@ void legionna_state::common_video_allocate_ptr()
m_scrollram16 = std::make_unique<UINT16[]>(0x60/2);
m_sprite_xoffs = 0;
m_sprite_yoffs = 0;
-
+
save_pointer(NAME(m_back_data.get()), 0x800/2);
save_pointer(NAME(m_fore_data.get()), 0x800/2);
save_pointer(NAME(m_mid_data.get()), 0x800/2);
save_pointer(NAME(m_textram.get()), 0x1000/2);
save_pointer(NAME(m_scrollram16.get()), 0x60/2);
-
+
save_item(NAME(m_back_gfx_bank));
save_item(NAME(m_mid_gfx_bank));
save_item(NAME(m_fore_gfx_bank));
@@ -258,7 +258,7 @@ void legionna_state::common_video_start()
VIDEO_START_MEMBER(legionna_state,legionna)
{
common_video_start();
-
+
m_sprite_pri_mask[0] = 0x0000;
m_sprite_pri_mask[1] = 0xfff0;
m_sprite_pri_mask[2] = 0xfffc;
@@ -282,7 +282,7 @@ VIDEO_START_MEMBER(legionna_state,godzilla)
m_has_extended_banking = 1;
m_has_extended_priority = 0;
-
+
m_sprite_pri_mask[0] = 0xfff0;
m_sprite_pri_mask[1] = 0xfffc;
m_sprite_pri_mask[2] = 0xfffe;
@@ -293,7 +293,7 @@ VIDEO_START_MEMBER(legionna_state,godzilla)
VIDEO_START_MEMBER(legionna_state,denjinmk)
{
common_video_allocate_ptr();
-
+
m_background_layer = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(legionna_state::get_back_tile_info),this),TILEMAP_SCAN_ROWS,16,16,32,32);
m_midground_layer = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(legionna_state::get_mid_tile_info_denji),this), TILEMAP_SCAN_ROWS,16,16,32,32);
m_foreground_layer = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(legionna_state::get_fore_tile_info_denji),this),TILEMAP_SCAN_ROWS,16,16,32,32);
@@ -301,13 +301,13 @@ VIDEO_START_MEMBER(legionna_state,denjinmk)
m_has_extended_banking = 1;
m_has_extended_priority = 0;
-
+
m_sprite_pri_mask[0] = 0xfff0; // normal sprites
m_sprite_pri_mask[1] = 0xfffc; // luna park horse rides
m_sprite_pri_mask[2] = 0xfffe; // door at the end of sewers part in level 1
m_sprite_pri_mask[3] = 0x0000; // briefing guy in pre-stage and portraits before a boss fight
-
-// m_background_layer->set_transparent_pen(15);
+
+// m_background_layer->set_transparent_pen(15);
m_midground_layer->set_transparent_pen(15);
m_foreground_layer->set_transparent_pen(15);
m_text_layer->set_transparent_pen(7);//?
@@ -420,21 +420,21 @@ void legionna_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap,co
pri_mask = m_sprite_pri_mask[cur_pri];
#if 0
static UINT8 pri_test;
-
+
if(machine().input().code_pressed_once(KEYCODE_A))
pri_test++;
-
+
if(machine().input().code_pressed_once(KEYCODE_A))
pri_test--;
pri_test&=3;
popmessage("%02x",pri_test);
-
+
// quick and dirty priority tester
if(cur_pri == pri_test)
{
static UINT16 test = 0xffff;
-
+
if(machine().input().code_pressed_once(KEYCODE_Q))
test^=1;
@@ -457,7 +457,7 @@ void legionna_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap,co
test^=0x40;
if(machine().input().code_pressed_once(KEYCODE_I))
- test^=0x80;
+ test^=0x80;
pri_mask = 0xffff & test;
data = (data & 0xffc0) | (machine().rand() & 0x3f);
@@ -592,7 +592,7 @@ UINT32 legionna_state::screen_update_heatbrl(screen_device &screen, bitmap_ind16
/* Setup the tilemaps */
screen.priority().fill(0, cliprect);
bitmap.fill(m_palette->black_pen(), cliprect); /* wrong color? */
-
+
// TODO: priority order is different than anything else?
if (!(m_layer_disable&0x0004)) m_foreground_layer->draw(screen, bitmap, cliprect, 0, 0);
if (!(m_layer_disable&0x0002)) m_midground_layer->draw(screen, bitmap, cliprect, 0, 1);
diff --git a/src/mame/video/pcd.cpp b/src/mame/video/pcd.cpp
index b8c868ac074..b192fd62ad2 100644
--- a/src/mame/video/pcd.cpp
+++ b/src/mame/video/pcd.cpp
@@ -149,7 +149,7 @@ static MACHINE_CONFIG_FRAGMENT( pcx_video )
MCFG_CPU_ADD("graphics", I8031, XTAL_24MHz/2)
MCFG_CPU_PROGRAM_MAP(pcx_vid_map)
MCFG_CPU_IO_MAP(pcx_vid_io)
-
+
MCFG_MCS51_SERIAL_TX_CB(WRITE8(pcx_video_device, tx_callback))
MCFG_MCS51_SERIAL_RX_CB(READ8(pcx_video_device, rx_callback))
diff --git a/src/mame/video/vtvideo.cpp b/src/mame/video/vtvideo.cpp
index 61e7f601c8e..cd08b30b6ef 100644
--- a/src/mame/video/vtvideo.cpp
+++ b/src/mame/video/vtvideo.cpp
@@ -238,16 +238,16 @@ WRITE8_MEMBER(vt100_video_device::dc012_w)
// - see 3.1.3.9.5 DC012 Programming Information (PC-100 spec)
if ((offset & 0x100) ) // MHFU is disabled by writing a value to port 010C.
{
-// if (MHFU_FLAG == true)
-// printf("MHFU *** DISABLED *** \n");
+// if (MHFU_FLAG == true)
+// printf("MHFU *** DISABLED *** \n");
MHFU_FLAG = false;
}
else
{
-// if (MHFU_FLAG == false)
-// printf("MHFU ___ENABLED___ %05x \n", space.device().safe_pc());
+// if (MHFU_FLAG == false)
+// printf("MHFU ___ENABLED___ %05x \n", space.device().safe_pc());
MHFU_FLAG = true;
- MHFU_counter = 0;
+ MHFU_counter = 0;
}
if (!(data & 0x08))
@@ -279,10 +279,10 @@ WRITE8_MEMBER(vt100_video_device::dc012_w)
// PDF: reverse field ON
m_reverse_field = 0;
break;
- case 0x0b:
- // PDF: reverse field OFF
- // SETUP: dark screen selected
- m_reverse_field = 1;
+ case 0x0b:
+ // PDF: reverse field OFF
+ // SETUP: dark screen selected
+ m_reverse_field = 1;
break;
// Writing a 11XX bit combination clears the blink-flip flop (valid for 0x0C - 0x0F):
@@ -845,10 +845,10 @@ int rainbow_video_device::MHFU(int ASK)
{
switch (ASK)
{
- case MHFU_IS_ENABLED: // "true": RETURN BOOLEAN (MHFU disabled or enabled?)
+ case MHFU_IS_ENABLED: // "true": RETURN BOOLEAN (MHFU disabled or enabled?)
return MHFU_FLAG;
- case MHFU_COUNT: // -1: increment IF ENABLED, return counter value (=> Rainbow.c)
+ case MHFU_COUNT: // -1: increment IF ENABLED, return counter value (=> Rainbow.c)
if (MHFU_FLAG == true)
if (MHFU_counter < 254)
MHFU_counter++;
@@ -856,17 +856,17 @@ int rainbow_video_device::MHFU(int ASK)
case MHFU_VALUE:
return MHFU_counter;
- case MHFU_RESET: // -250 : RESET counter (NOTHING ELSE!)
+ case MHFU_RESET: // -250 : RESET counter (NOTHING ELSE!)
MHFU_counter = 0;
return MHFU_FLAG;
- case MHFU_RESET_and_ENABLE: // -100 : RESET and ENABLE MHFU counter
+ case MHFU_RESET_and_ENABLE: // -100 : RESET and ENABLE MHFU counter
MHFU_counter = 0;
MHFU_FLAG = true;
return -100;
- case MHFU_RESET_and_DISABLE: // -200 : RESET and DISABLE MHFU
+ case MHFU_RESET_and_DISABLE: // -200 : RESET and DISABLE MHFU
MHFU_counter = 0;
MHFU_FLAG = false;