diff options
author | AJR <ajrhacker@users.noreply.github.com> | 2016-07-17 11:00:06 -0400 |
---|---|---|
committer | AJR <ajrhacker@users.noreply.github.com> | 2016-07-17 11:00:06 -0400 |
commit | 99472400240a0eb4373e92be202e928421789da5 (patch) | |
tree | 9e2cda3ebc0d5c938d41f5100069f5075958aac4 /src/mame/video/seibu_crtc.cpp | |
parent | fa86ed338d2bf111a8b6225d28b33c4471cc7d9f (diff) |
Hook up Seibu CRTC to SPI System
- Shuffle decryption code around a bit in preparation for SEI252 deviceification (nw)
- Various notes regarding Seibu video customs (nw)
Diffstat (limited to 'src/mame/video/seibu_crtc.cpp')
-rw-r--r-- | src/mame/video/seibu_crtc.cpp | 33 |
1 files changed, 29 insertions, 4 deletions
diff --git a/src/mame/video/seibu_crtc.cpp b/src/mame/video/seibu_crtc.cpp index 99200dae945..91a9bbd5292 100644 --- a/src/mame/video/seibu_crtc.cpp +++ b/src/mame/video/seibu_crtc.cpp @@ -54,6 +54,13 @@ preliminary memory map: [0x38]: Tilemap Screen 3 base scroll X [0x3a]: Tilemap Screen 3 base scroll Y [0x3e]: OBJ Y base +[0x40]: Semaphore for 0x4e register + +In later games using the SEI251, SEI252 and RISE sprite chips, registers +0x40 through 0x4e appear to be either nonexistent or overridden. The aberrant +mapping of these registers in some games is not unusual for Seibu customs, +but it should be noted that SD Gundam Psycho Salamander relegates the +initialization of these registers to a separate routine. =========================================================================================== @@ -125,12 +132,12 @@ List of default vregs (title screen): 0C0030: 01C2 01FF **** **** 00C0 01FF 0034 003F 0C0040: 0000 A8A8 0006 1830 0009 **** **** **** -*SD Gundam Psycho Salamander no Kyoui (320 x 224 -> 0 - 224 v res) +*SD Gundam Psycho Salamander no Kyoui (init routines at $4b56 and $13fc; 320 x 224 -> 0 - 224 v res) 0C0000: 000F 0013 009F 00BF 00FA 000F 00FA 00FF 0C0010: 0076 0006 0000 0002 0000 0000 0000 0000 0C0020: 0000 0000 0000 0000 0000 0000 0040 01FF 0C0030: 0040 01FF 0040 01FF 0040 01FF 0034 003F -0C0040: 0000 A8A8 0003 1C37 0009 0000 0000 0000 +0C0040: **** A8A8 0003 1C37 0009 **** **** **** *D-Con (320 x 224 -> 0 - 224 v res) 0C0000: 000F 0013 009F 00BF 00FA 000F 00FA 00FF @@ -193,7 +200,6 @@ List of default vregs (title screen): 00000414: related to decryption 00000418: fg layer bank, rowscroll enable, ... 0000041C-0000043F: same as other chips (layer enable, scrollregs, base) -00000440-0000044F: unused, not written to at all ***************************************************************************/ @@ -210,13 +216,20 @@ List of default vregs (title screen): const device_type SEIBU_CRTC = &device_creator<seibu_crtc_device>; static ADDRESS_MAP_START( seibu_crtc_vregs, AS_0, 16, seibu_crtc_device ) + AM_RANGE(0x0014, 0x0015) AM_WRITE(decrypt_key_w) + AM_RANGE(0x001a, 0x001b) AM_READWRITE(reg_1a_r, reg_1a_w) AM_RANGE(0x001c, 0x001d) AM_WRITE(layer_en_w) - AM_RANGE(0x001a, 0x001b) AM_WRITE(reg_1a_w) AM_RANGE(0x0020, 0x002b) AM_WRITE(layer_scroll_w) AM_RANGE(0x002c, 0x003b) AM_WRITE(layer_scroll_base_w) AM_RANGE(0x0000, 0x004f) AM_RAM // debug ADDRESS_MAP_END +WRITE16_MEMBER(seibu_crtc_device::decrypt_key_w) +{ + if (!m_decrypt_key_cb.isnull()) + m_decrypt_key_cb(0, data, mem_mask); +} + WRITE16_MEMBER( seibu_crtc_device::layer_en_w) { if (!m_layer_en_cb.isnull()) @@ -229,8 +242,15 @@ WRITE16_MEMBER( seibu_crtc_device::layer_scroll_w) m_layer_scroll_cb(offset,data,mem_mask); } +READ16_MEMBER(seibu_crtc_device::reg_1a_r) +{ + // SPI needs read/write access to this + return m_reg_1a; +} + WRITE16_MEMBER( seibu_crtc_device::reg_1a_w) { + COMBINE_DATA(&m_reg_1a); if (!m_reg_1a_cb.isnull()) m_reg_1a_cb(offset,data,mem_mask); } @@ -253,6 +273,7 @@ seibu_crtc_device::seibu_crtc_device(const machine_config &mconfig, const char * : device_t(mconfig, SEIBU_CRTC, "Seibu CRT Controller", tag, owner, clock, "seibu_crtc", __FILE__), device_memory_interface(mconfig, *this), device_video_interface(mconfig, *this), + m_decrypt_key_cb(*this), m_layer_en_cb(*this), m_layer_scroll_cb(*this), m_reg_1a_cb(*this), @@ -277,10 +298,13 @@ void seibu_crtc_device::device_validity_check(validity_checker &valid) const void seibu_crtc_device::device_start() { + m_decrypt_key_cb.resolve(); m_layer_en_cb.resolve(); m_layer_scroll_cb.resolve(); m_reg_1a_cb.resolve(); m_layer_scroll_base_cb.resolve(); + + save_item(NAME(m_reg_1a)); } @@ -290,6 +314,7 @@ void seibu_crtc_device::device_start() void seibu_crtc_device::device_reset() { + m_reg_1a = 0; } //------------------------------------------------- |