diff options
author | AJR <ajrhacker@users.noreply.github.com> | 2020-08-19 17:43:27 -0400 |
---|---|---|
committer | AJR <ajrhacker@users.noreply.github.com> | 2020-08-19 17:43:27 -0400 |
commit | efed2ea2c21c9ac4dec8b3682efce8d731623abb (patch) | |
tree | 6e9f393cf80305ec3d0db77156dd6e76ab42d9e4 /src/mame/machine | |
parent | 0ca0f8e385655ff362f32b4bb5fefca11dd622f0 (diff) |
TMS340X0 updates
- tms34020: Upgrade data bus to 32 bits and add preliminary masking for 16-bit operations
- tms34010, tms34020: Eliminate pure 8-bit read/write bus accesses (these are always read-modify-write, even if aligned)
- btoads, midxunit: Use 8-bit handlers for NVRAM, reducing size to 8192 bytes
- midwunit, midxunit: Eliminate dependencies on midtunit driver
Diffstat (limited to 'src/mame/machine')
-rw-r--r-- | src/mame/machine/midwunit.cpp | 12 | ||||
-rw-r--r-- | src/mame/machine/midxunit.cpp | 87 |
2 files changed, 36 insertions, 63 deletions
diff --git a/src/mame/machine/midwunit.cpp b/src/mame/machine/midwunit.cpp index 7cdbc9adda1..0bf37f9293d 100644 --- a/src/mame/machine/midwunit.cpp +++ b/src/mame/machine/midwunit.cpp @@ -7,10 +7,6 @@ **************************************************************************/ #include "emu.h" -#include "cpu/tms34010/tms34010.h" -#include "cpu/m6809/m6809.h" -#include "audio/dcs.h" -#include "includes/midtunit.h" #include "includes/midwunit.h" #define LOG_UNKNOWN (1 << 0) @@ -165,7 +161,7 @@ void midwunit_state::machine_start() /********************** Mortal Kombat 3 **********************/ -void midwunit_state::umk3_palette_hack_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask) +void midwunit_state::umk3_palette_hack_w(offs_t offset, uint16_t data, uint16_t mem_mask) { /* UMK3 uses a circular buffer to hold pending palette changes; the buffer holds 17 entries @@ -186,7 +182,7 @@ void midwunit_state::umk3_palette_hack_w(address_space &space, offs_t offset, ui without significantly impacting the rest of the system. */ COMBINE_DATA(&m_umk3_palette[offset]); - space.device().execute().adjust_icount(-100); + m_maincpu->adjust_icount(-100); /* printf("in=%04X%04X out=%04X%04X\n", m_umk3_palette[3], m_umk3_palette[2], m_umk3_palette[1], m_umk3_palette[0]); */ } @@ -214,14 +210,14 @@ void midwunit_state::init_mk3r10() void midwunit_state::init_umk3() { init_mk3_common(); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x0106a060, 0x0106a09f, write16_delegate(*this, FUNC(midwunit_state::umk3_palette_hack_w))); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x0106a060, 0x0106a09f, write16s_delegate(*this, FUNC(midwunit_state::umk3_palette_hack_w))); m_umk3_palette = m_mainram + (0x6a060>>4); } void midwunit_state::init_umk3r11() { init_mk3_common(); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x0106a060, 0x0106a09f, write16_delegate(*this, FUNC(midwunit_state::umk3_palette_hack_w))); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x0106a060, 0x0106a09f, write16s_delegate(*this, FUNC(midwunit_state::umk3_palette_hack_w))); m_umk3_palette = m_mainram + (0x6a060>>4); } diff --git a/src/mame/machine/midxunit.cpp b/src/mame/machine/midxunit.cpp index 2bcda95e389..23464c614c7 100644 --- a/src/mame/machine/midxunit.cpp +++ b/src/mame/machine/midxunit.cpp @@ -7,12 +7,7 @@ **************************************************************************/ #include "emu.h" -#include "cpu/tms34010/tms34010.h" -#include "cpu/m6809/m6809.h" -#include "audio/dcs.h" -#include "includes/midtunit.h" #include "includes/midxunit.h" -#include "midwayic.h" #define LOG_IO (1 << 0) #define LOG_UART (1 << 1) @@ -29,14 +24,14 @@ * *************************************/ -uint16_t midxunit_state::midxunit_cmos_r(offs_t offset) +uint8_t midxunit_state::midxunit_cmos_r(offs_t offset) { - return m_nvram[offset]; + return m_nvram_data[offset]; } -void midxunit_state::midxunit_cmos_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void midxunit_state::midxunit_cmos_w(offs_t offset, uint8_t data) { - COMBINE_DATA(m_nvram+offset); + m_nvram_data[offset] = data; } @@ -127,14 +122,9 @@ WRITE_LINE_MEMBER(midxunit_state::midxunit_dcs_output_full) } -uint16_t midxunit_state::midxunit_uart_r(offs_t offset) +uint8_t midxunit_state::midxunit_uart_r(offs_t offset) { - int result = 0; - - /* convert to a byte offset */ - if (offset & 1) - return 0; - offset /= 2; + uint8_t result = 0; /* switch off the offset */ switch (offset) @@ -152,7 +142,7 @@ uint16_t midxunit_state::midxunit_uart_r(offs_t offset) /* non-loopback case: bit 0 means data ready, bit 2 means ok to send */ else { - int temp = midxunit_sound_state_r(); + int temp = m_dcs->control_r(); result |= (temp & 0x800) >> 9; result |= (~temp & 0x400) >> 10; machine().scheduler().synchronize(); @@ -167,7 +157,11 @@ uint16_t midxunit_state::midxunit_uart_r(offs_t offset) /* non-loopback case: read from the DCS system */ else - result = midxunit_sound_r(); + { + LOGMASKED(LOG_SOUND, "%08X:Sound read\n", m_maincpu->pc()); + + result = m_dcs->data_r(); + } break; case 5: /* register 5 seems to be like 3, but with in/out swapped */ @@ -179,7 +173,7 @@ uint16_t midxunit_state::midxunit_uart_r(offs_t offset) /* non-loopback case: bit 0 means data ready, bit 2 means ok to send */ else { - int temp = midxunit_sound_state_r(); + int temp = m_dcs->control_r(); result |= (temp & 0x800) >> 11; result |= (~temp & 0x400) >> 8; machine().scheduler().synchronize(); @@ -196,14 +190,8 @@ uint16_t midxunit_state::midxunit_uart_r(offs_t offset) } -void midxunit_state::midxunit_uart_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void midxunit_state::midxunit_uart_w(offs_t offset, uint8_t data) { - /* convert to a byte offset, ignoring MSB writes */ - if ((offset & 1) || !ACCESSING_BITS_0_7) - return; - offset /= 2; - data &= 0xff; - /* switch off the offset */ switch (offset) { @@ -215,7 +203,7 @@ void midxunit_state::midxunit_uart_w(offs_t offset, uint16_t data, uint16_t mem_ /* non-loopback case: send to the DCS system */ else - midxunit_sound_w(0, data, mem_mask); + m_dcs->data_w(data); break; case 5: /* register 5 write seems to reset things */ @@ -253,12 +241,15 @@ void midxunit_state::machine_start() m_gun_recoil.resolve(); m_gun_led.resolve(); + m_nvram_data = std::make_unique<uint8_t[]>(0x2000); + m_nvram->set_base(m_nvram_data.get(), 0x2000); + save_item(NAME(m_cmos_write_enable)); save_item(NAME(m_iodata)); - save_item(NAME(m_ioshuffle)); save_item(NAME(m_uart)); save_item(NAME(m_security_bits)); save_item(NAME(m_adc_int)); + save_pointer(NAME(m_nvram_data), 0x2000); } void midxunit_state::machine_reset() @@ -269,10 +260,6 @@ void midxunit_state::machine_reset() m_security_bits = 0; - /* reset I/O shuffling */ - for (int i = 0; i < 16; i++) - m_ioshuffle[i] = i % 8; - m_dcs->set_io_callbacks(write_line_delegate(*this, FUNC(midxunit_state::midxunit_dcs_output_full)), write_line_delegate(*this)); } @@ -314,37 +301,27 @@ void midxunit_state::midxunit_security_clock_w(offs_t offset, uint16_t data, uin /************************************* * - * Sound write handlers + * DMA registers (inverted word select) * *************************************/ -uint16_t midxunit_state::midxunit_sound_r() +uint32_t midxunit_state::midxunit_dma_r(offs_t offset, uint32_t mem_mask) { - LOGMASKED(LOG_SOUND, "%08X:Sound read\n", m_maincpu->pc()); - - return m_dcs->data_r() & 0xff; -} + uint32_t result = 0; + if (ACCESSING_BITS_0_15) + result |= uint32_t(m_video->midtunit_dma_r(offset * 2 + 1)) << 16; + if (ACCESSING_BITS_16_31) + result |= m_video->midtunit_dma_r(offset * 2); -uint16_t midxunit_state::midxunit_sound_state_r() -{ - return m_dcs->control_r(); + return result; } -void midxunit_state::midxunit_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void midxunit_state::midxunit_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - /* check for out-of-bounds accesses */ - if (offset) - { - LOGMASKED(LOG_SOUND | LOG_UNKNOWN, "%s: Unexpected write to sound (hi) = %04X\n", machine().describe_context(), data); - return; - } - - /* call through based on the sound type */ - if (ACCESSING_BITS_0_7) - { - LOGMASKED(LOG_SOUND, "%s: Sound write = %04X\n", machine().describe_context(), data); - m_dcs->data_w(data & 0xff); - } + if (ACCESSING_BITS_0_15) + m_video->midtunit_dma_w(offset * 2 + 1, data >> 16); + if (ACCESSING_BITS_16_31) + m_video->midtunit_dma_w(offset * 2, data & 0xffff); } |