diff options
author | Robbbert <Robbbert@users.noreply.github.com> | 2020-08-19 20:58:04 +1000 |
---|---|---|
committer | Robbbert <Robbbert@users.noreply.github.com> | 2020-08-19 20:58:04 +1000 |
commit | d5b09f7cbfb830a6eacdeef8bd54eb7b773dbb3f (patch) | |
tree | bada22a335b14fe6a91a4c0b2f63bc59566c1483 /src/mame/machine | |
parent | a0c1a324296ad784e613e63988a1352dad3b9134 (diff) |
vtech2: added one waitstate to resolve MT 07094 and MT 07141.
Diffstat (limited to 'src/mame/machine')
-rw-r--r-- | src/mame/machine/vtech2.cpp | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/mame/machine/vtech2.cpp b/src/mame/machine/vtech2.cpp index 8b396dceccc..bfc74cd74cb 100644 --- a/src/mame/machine/vtech2.cpp +++ b/src/mame/machine/vtech2.cpp @@ -27,6 +27,8 @@ static const uint8_t laser_fdc_wrprot[2] = {0x80, 0x80}; void vtech2_state::init_laser() { + init_waitstates(); + uint8_t *gfx = memregion("gfx2")->base(); int i; @@ -99,6 +101,38 @@ uint8_t vtech2_state::cart_r(offs_t offset) return m_cart->read_rom(offset); } +// The ULA inserts one waitstate for every read and write in each space (MT 07094, MT 07141) +void vtech2_state::init_waitstates() +{ + address_space &mem = m_maincpu->space(AS_PROGRAM); + address_space &io = m_maincpu->space(AS_IO); + + mem.install_read_tap(0x0000, 0xffff, "mem_wait_r", [this](offs_t offset, u8 &data, u8 mem_mask) + { + if (!machine().side_effects_disabled()) + m_maincpu->adjust_icount(-1); + return data; + }); + mem.install_write_tap(0x0000, 0xffff, "mem_wait_w", [this](offs_t offset, u8 &data, u8 mem_mask) + { + if (!machine().side_effects_disabled()) + m_maincpu->adjust_icount(-1); + return data; + }); + io.install_read_tap(0x00, 0xff, "io_wait_r", [this](offs_t offset, u8 &data, u8 mem_mask) + { + if (!machine().side_effects_disabled()) + m_maincpu->adjust_icount(-1); + return data; + }); + io.install_write_tap(0x00, 0xff, "io_wait_w", [this](offs_t offset, u8 &data, u8 mem_mask) + { + if (!machine().side_effects_disabled()) + m_maincpu->adjust_icount(-1); + return data; + }); +} + /************************************************* * memory mapped I/O read |