diff options
author | Miodrag Milanovic <mmicko@gmail.com> | 2014-03-21 13:23:00 +0000 |
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committer | Miodrag Milanovic <mmicko@gmail.com> | 2014-03-21 13:23:00 +0000 |
commit | cac7437f8ed1f75927ddbfa944a8eddd832fefbb (patch) | |
tree | 5df7aae3c6a965641807a1468ebf317c2dccebc6 /src/mame/machine/namco06.h | |
parent | d1251c70f0753a465c929f4cae73bb856f67e9c3 (diff) |
namco to modern device + devcb2 (nw)
Diffstat (limited to 'src/mame/machine/namco06.h')
-rw-r--r-- | src/mame/machine/namco06.h | 100 |
1 files changed, 87 insertions, 13 deletions
diff --git a/src/mame/machine/namco06.h b/src/mame/machine/namco06.h index 32f547fbda7..94be8bfac2c 100644 --- a/src/mame/machine/namco06.h +++ b/src/mame/machine/namco06.h @@ -4,7 +4,6 @@ #define NAMCO06_H - struct namco_06xx_config { const char *nmicpu; @@ -15,33 +14,108 @@ struct namco_06xx_config }; -#define MCFG_NAMCO_06XX_ADD(_tag, _clock, _config) \ - MCFG_DEVICE_ADD(_tag, NAMCO_06XX, _clock) \ - MCFG_DEVICE_CONFIG(_config) +#define MCFG_NAMCO_06XX_ADD(_tag, _clock) \ + MCFG_DEVICE_ADD(_tag, NAMCO_06XX, _clock) + +#define MCFG_NAMCO_06XX_MAINCPU(_tag) \ + namco_06xx_device::set_maincpu(*device, "^" _tag); + +#define MCFG_NAMCO_06XX_READ_0_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_0_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_READ_1_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_1_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_READ_2_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_2_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_READ_3_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_3_callback(*device, DEVCB2_##_devcb); + + +#define MCFG_NAMCO_06XX_READ_REQUEST_0_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_request_0_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_READ_REQUEST_1_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_request_1_callback(*device, DEVCB2_##_devcb); +#define MCFG_NAMCO_06XX_READ_REQUEST_2_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_request_2_callback(*device, DEVCB2_##_devcb); -DECLARE_READ8_DEVICE_HANDLER( namco_06xx_data_r ); -DECLARE_WRITE8_DEVICE_HANDLER( namco_06xx_data_w ); -DECLARE_READ8_DEVICE_HANDLER( namco_06xx_ctrl_r ); -DECLARE_WRITE8_DEVICE_HANDLER( namco_06xx_ctrl_w ); +#define MCFG_NAMCO_06XX_READ_REQUEST_3_CB(_devcb) \ + devcb = &namco_06xx_device::set_read_request_3_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_WRITE_0_CB(_devcb) \ + devcb = &namco_06xx_device::set_write_0_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_WRITE_1_CB(_devcb) \ + devcb = &namco_06xx_device::set_write_1_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_WRITE_2_CB(_devcb) \ + devcb = &namco_06xx_device::set_write_2_callback(*device, DEVCB2_##_devcb); + +#define MCFG_NAMCO_06XX_WRITE_3_CB(_devcb) \ + devcb = &namco_06xx_device::set_write_3_callback(*device, DEVCB2_##_devcb); + /* device get info callback */ class namco_06xx_device : public device_t { public: namco_06xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); - ~namco_06xx_device(); - // access to legacy token - struct namco_06xx_state *token() const { assert(m_token != NULL); return m_token; } + static void set_maincpu(device_t &device, const char *tag) { downcast<namco_06xx_device &>(device).m_nmicpu.set_tag(tag); } + + template<class _Object> static devcb2_base &set_read_0_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_read_0.set_callback(object); } + template<class _Object> static devcb2_base &set_read_1_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_read_1.set_callback(object); } + template<class _Object> static devcb2_base &set_read_2_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_read_2.set_callback(object); } + template<class _Object> static devcb2_base &set_read_3_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_read_3.set_callback(object); } + + template<class _Object> static devcb2_base &set_read_request_0_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_readreq_0.set_callback(object); } + template<class _Object> static devcb2_base &set_read_request_1_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_readreq_1.set_callback(object); } + template<class _Object> static devcb2_base &set_read_request_2_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_readreq_2.set_callback(object); } + template<class _Object> static devcb2_base &set_read_request_3_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_readreq_3.set_callback(object); } + + + template<class _Object> static devcb2_base &set_write_0_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_write_0.set_callback(object); } + template<class _Object> static devcb2_base &set_write_1_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_write_1.set_callback(object); } + template<class _Object> static devcb2_base &set_write_2_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_write_2.set_callback(object); } + template<class _Object> static devcb2_base &set_write_3_callback(device_t &device, _Object object) { return downcast<namco_06xx_device &>(device).m_write_3.set_callback(object); } + + DECLARE_READ8_MEMBER( data_r ); + DECLARE_WRITE8_MEMBER( data_w ); + DECLARE_READ8_MEMBER( ctrl_r ); + DECLARE_WRITE8_MEMBER( ctrl_w ); + protected: // device-level overrides virtual void device_start(); virtual void device_reset(); private: - // internal state - struct namco_06xx_state *m_token; + + TIMER_CALLBACK_MEMBER( nmi_generate ); + + // internal state + UINT8 m_control; + emu_timer *m_nmi_timer; + + required_device<cpu_device> m_nmicpu; + + devcb2_read8 m_read_0; + devcb2_read8 m_read_1; + devcb2_read8 m_read_2; + devcb2_read8 m_read_3; + + devcb2_write_line m_readreq_0; + devcb2_write_line m_readreq_1; + devcb2_write_line m_readreq_2; + devcb2_write_line m_readreq_3; + + devcb2_write8 m_write_0; + devcb2_write8 m_write_1; + devcb2_write8 m_write_2; + devcb2_write8 m_write_3; }; extern const device_type NAMCO_06XX; |