summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame/machine/dec_lk201.h
diff options
context:
space:
mode:
author Miodrag Milanovic <mmicko@gmail.com>2016-06-29 08:34:30 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2016-06-29 08:34:30 +0200
commit63f9a01f8c5d43b9cfe68c2d401a84647d19c10e (patch)
treea1f1874aa84850bddbebd2b0e0bfc3e1c77ce8c4 /src/mame/machine/dec_lk201.h
parent1f6f1bfd6cfb748d9c5e159d6bd014bab8d30944 (diff)
Cleanup and version bumpmame0175
Diffstat (limited to 'src/mame/machine/dec_lk201.h')
-rw-r--r--src/mame/machine/dec_lk201.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mame/machine/dec_lk201.h b/src/mame/machine/dec_lk201.h
index 1df36577b7b..3185a0a139f 100644
--- a/src/mame/machine/dec_lk201.h
+++ b/src/mame/machine/dec_lk201.h
@@ -24,12 +24,12 @@
#define LK_CMD_ENB_BELL 0x23 /* enable the bell - 1st param: volume */
#define LK_CMD_BELL 0xa7 /* emit a bell - 1st param: volume */
-// TCR - Timer Compare Register
+// TCR - Timer Compare Register
#define TCR_OCIE 0x40 // Bit 6 (output compare IRQ enable)
-#define TCR_OLVL 0x01 // Bit 1 (output level)
+#define TCR_OLVL 0x01 // Bit 1 (output level)
-// TSR - Timer Status Register
-#define TSR_OCFL 0x40 // TSR (68HC05 output compare flag)
+// TSR - Timer Status Register
+#define TSR_OCFL 0x40 // TSR (68HC05 output compare flag)
//**************************************************************************
// INTERFACE CONFIGURATION MACROS