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author Ivan Vangelista <mesgnet@yahoo.it>2020-06-03 22:03:31 +0200
committer Ivan Vangelista <mesgnet@yahoo.it>2020-06-03 22:03:31 +0200
commitfa089b946849610cd153f2cc4851df7b111f1d87 (patch)
tree3e885e869d02db7ffdf829dacab65b6745e0c118 /src/mame/drivers
parent83e474aad4d930e5e3c79e80120ff936922b359e (diff)
some more drivers starting with s: a little more macro removal (nw)
Diffstat (limited to 'src/mame/drivers')
-rw-r--r--src/mame/drivers/studio2.cpp40
-rw-r--r--src/mame/drivers/stuntair.cpp24
-rw-r--r--src/mame/drivers/subsino.cpp40
-rw-r--r--src/mame/drivers/subsino2.cpp246
-rw-r--r--src/mame/drivers/sun2.cpp24
-rw-r--r--src/mame/drivers/sun3.cpp48
-rw-r--r--src/mame/drivers/sun3x.cpp92
-rw-r--r--src/mame/drivers/sun4.cpp56
-rw-r--r--src/mame/drivers/supdrapo.cpp24
-rw-r--r--src/mame/drivers/supduck.cpp28
-rw-r--r--src/mame/drivers/supercrd.cpp8
-rw-r--r--src/mame/drivers/superdq.cpp16
-rw-r--r--src/mame/drivers/superga2.cpp26
-rw-r--r--src/mame/drivers/superslave.cpp20
-rw-r--r--src/mame/drivers/supertnk.cpp8
-rw-r--r--src/mame/drivers/superwng.cpp56
-rw-r--r--src/mame/drivers/supracan.cpp64
-rw-r--r--src/mame/drivers/suprgolf.cpp28
-rw-r--r--src/mame/drivers/svmu.cpp20
-rw-r--r--src/mame/drivers/swyft.cpp20
-rw-r--r--src/mame/drivers/symbolics.cpp16
21 files changed, 450 insertions, 454 deletions
diff --git a/src/mame/drivers/studio2.cpp b/src/mame/drivers/studio2.cpp
index 5a356207306..3365c1005a2 100644
--- a/src/mame/drivers/studio2.cpp
+++ b/src/mame/drivers/studio2.cpp
@@ -246,10 +246,10 @@ public:
DECLARE_INPUT_CHANGED_MEMBER( reset_w );
- DECLARE_READ8_MEMBER( cart_400 );
- DECLARE_READ8_MEMBER( cart_c00 );
- DECLARE_READ8_MEMBER( rom_000 );
- DECLARE_READ8_MEMBER( rom_400 );
+ uint8_t cart_400(offs_t offset);
+ uint8_t cart_c00(offs_t offset);
+ uint8_t rom_000(offs_t offset);
+ uint8_t rom_400(offs_t offset);
protected:
required_device<cosmac_device> m_maincpu;
@@ -265,9 +265,9 @@ protected:
virtual void machine_start() override;
virtual void machine_reset() override;
- DECLARE_READ8_MEMBER( dispon_r );
- DECLARE_WRITE8_MEMBER( keylatch_w );
- DECLARE_WRITE8_MEMBER( dispon_w );
+ uint8_t dispon_r();
+ void keylatch_w(uint8_t data);
+ void dispon_w(uint8_t data);
DECLARE_READ_LINE_MEMBER( clear_r );
DECLARE_READ_LINE_MEMBER( ef3_r );
DECLARE_READ_LINE_MEMBER( ef4_r );
@@ -347,12 +347,12 @@ private:
/* Read/Write Handlers */
-WRITE8_MEMBER( studio2_state::keylatch_w )
+void studio2_state::keylatch_w(uint8_t data)
{
m_keylatch = data & 0x0f;
}
-READ8_MEMBER( studio2_state::dispon_r )
+uint8_t studio2_state::dispon_r()
{
m_vdc->disp_on_w(1);
m_vdc->disp_on_w(0);
@@ -360,7 +360,7 @@ READ8_MEMBER( studio2_state::dispon_r )
return 0xff;
}
-WRITE8_MEMBER( studio2_state::dispon_w )
+void studio2_state::dispon_w(uint8_t data)
{
m_vdc->disp_on_w(1);
m_vdc->disp_on_w(0);
@@ -537,10 +537,10 @@ void mpt02_state::dma_w(offs_t offset, uint8_t data)
/* Machine Initialization */
// trampolines to cartridge
-READ8_MEMBER( studio2_state::rom_000 ) { return m_rom[offset]; }
-READ8_MEMBER( studio2_state::rom_400 ) { return m_rom[offset+0x400]; }
-READ8_MEMBER( studio2_state::cart_400 ) { return m_cart->read_rom(offset); }
-READ8_MEMBER( studio2_state::cart_c00 ) { return m_cart->read_rom(offset + 0x800); }
+uint8_t studio2_state::rom_000(offs_t offset) { return m_rom[offset]; }
+uint8_t studio2_state::rom_400(offs_t offset) { return m_rom[offset+0x400]; }
+uint8_t studio2_state::cart_400(offs_t offset) { return m_cart->read_rom(offset); }
+uint8_t studio2_state::cart_c00(offs_t offset) { return m_cart->read_rom(offset + 0x800); }
void visicom_state::machine_start()
{
@@ -551,15 +551,15 @@ void visicom_state::machine_start()
void studio2_state::machine_start()
{
m_maincpu->space(AS_PROGRAM).unmap_readwrite(0x0000, 0x07ff);
- m_maincpu->space(AS_PROGRAM).install_read_handler(0x0000, 0x03ff, read8_delegate(*this, FUNC(studio2_state::rom_000)));
+ m_maincpu->space(AS_PROGRAM).install_read_handler(0x0000, 0x03ff, read8sm_delegate(*this, FUNC(studio2_state::rom_000)));
if (m_cart->exists())
{
// cart always overlaps the inbuilt game roms
- m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400, 0x07ff, read8_delegate(*this, FUNC(studio2_state::cart_400)));
+ m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400, 0x07ff, read8sm_delegate(*this, FUNC(studio2_state::cart_400)));
}
else
- m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400, 0x07ff, read8_delegate(*this, FUNC(studio2_state::rom_400)));
+ m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400, 0x07ff, read8sm_delegate(*this, FUNC(studio2_state::rom_400)));
// register for state saving
save_item(NAME(m_keylatch));
@@ -570,7 +570,7 @@ void mpt02_state::machine_start()
if (m_cart->exists())
{
// cart always overlaps the inbuilt game roms
- m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400, 0x07ff, read8_delegate(*this, FUNC(studio2_state::cart_400)));
+ m_maincpu->space(AS_PROGRAM).install_read_handler(0x0400, 0x07ff, read8sm_delegate(*this, FUNC(studio2_state::cart_400)));
}
// register for state saving
@@ -644,7 +644,7 @@ DEVICE_IMAGE_LOAD_MEMBER( studio2_state::cart_load )
{
logerror("ST2 Reading block %u to 0x%04x\n", block, offset);
if (pages[block] == 0xC)
- m_maincpu->space(AS_PROGRAM).install_read_handler(0x0c00, 0x0fff, read8_delegate(*this, FUNC(studio2_state::cart_c00)));
+ m_maincpu->space(AS_PROGRAM).install_read_handler(0x0c00, 0x0fff, read8sm_delegate(*this, FUNC(studio2_state::cart_c00)));
image.fread(m_cart->get_rom_base() + offset - 0x400, 0x100);
}
}
@@ -668,7 +668,7 @@ DEVICE_IMAGE_LOAD_MEMBER( studio2_state::cart_load )
memcpy(m_cart->get_rom_base() + 0x000, image.get_software_region("rom_400"), image.get_software_region_length("rom_400"));
if (image.get_software_region("rom_c00"))
{
- m_maincpu->space(AS_PROGRAM).install_read_handler(0x0c00, 0x0fff, read8_delegate(*this, FUNC(studio2_state::cart_c00)));
+ m_maincpu->space(AS_PROGRAM).install_read_handler(0x0c00, 0x0fff, read8sm_delegate(*this, FUNC(studio2_state::cart_c00)));
memcpy(m_cart->get_rom_base() + 0x800, image.get_software_region("rom_c00"), image.get_software_region_length("rom_c00"));
}
}
diff --git a/src/mame/drivers/stuntair.cpp b/src/mame/drivers/stuntair.cpp
index 4017cf800d8..2bf1fab0223 100644
--- a/src/mame/drivers/stuntair.cpp
+++ b/src/mame/drivers/stuntair.cpp
@@ -136,15 +136,15 @@ private:
TILE_GET_INFO_MEMBER(get_stuntair_fg_tile_info);
TILE_GET_INFO_MEMBER(get_stuntair_bg_tile_info);
- DECLARE_WRITE8_MEMBER(stuntair_fgram_w);
- DECLARE_WRITE8_MEMBER(stuntair_bgram_w);
- DECLARE_WRITE8_MEMBER(stuntair_bgattrram_w);
- DECLARE_WRITE8_MEMBER(stuntair_bgxscroll_w);
+ void stuntair_fgram_w(offs_t offset, uint8_t data);
+ void stuntair_bgram_w(offs_t offset, uint8_t data);
+ void stuntair_bgattrram_w(offs_t offset, uint8_t data);
+ void stuntair_bgxscroll_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(nmi_enable_w);
DECLARE_WRITE_LINE_MEMBER(spritebank0_w);
DECLARE_WRITE_LINE_MEMBER(spritebank1_w);
- DECLARE_WRITE8_MEMBER(stuntair_coin_w);
- DECLARE_WRITE8_MEMBER(stuntair_sound_w);
+ void stuntair_coin_w(uint8_t data);
+ void stuntair_sound_w(uint8_t data);
void ay8910_portb_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(stuntair_irq);
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -262,26 +262,26 @@ uint32_t stuntair_state::screen_update_stuntair(screen_device &screen, bitmap_in
***************************************************************************/
-WRITE8_MEMBER(stuntair_state::stuntair_bgattrram_w)
+void stuntair_state::stuntair_bgattrram_w(offs_t offset, uint8_t data)
{
m_bgattrram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(stuntair_state::stuntair_bgram_w)
+void stuntair_state::stuntair_bgram_w(offs_t offset, uint8_t data)
{
m_bgram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(stuntair_state::stuntair_fgram_w)
+void stuntair_state::stuntair_fgram_w(offs_t offset, uint8_t data)
{
m_fgram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER( stuntair_state::stuntair_bgxscroll_w )
+void stuntair_state::stuntair_bgxscroll_w(uint8_t data)
{
m_bg_xscroll = data;
}
@@ -305,7 +305,7 @@ WRITE_LINE_MEMBER(stuntair_state::nmi_enable_w)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
-WRITE8_MEMBER(stuntair_state::stuntair_coin_w)
+void stuntair_state::stuntair_coin_w(uint8_t data)
{
// lower 2 bits are coin counters, excluding 1st coin(?)
machine().bookkeeping().coin_counter_w(0, data >> 0 & 1);
@@ -317,7 +317,7 @@ WRITE8_MEMBER(stuntair_state::stuntair_coin_w)
}
-WRITE8_MEMBER(stuntair_state::stuntair_sound_w)
+void stuntair_state::stuntair_sound_w(uint8_t data)
{
// each command is written three times: with bit 7 set, then with bit 7 clear, then with bit 7 set again
// the 3 highest bits are ignored by the sound program
diff --git a/src/mame/drivers/subsino.cpp b/src/mame/drivers/subsino.cpp
index 86ce3a12a65..3c0ebb0fe22 100644
--- a/src/mame/drivers/subsino.cpp
+++ b/src/mame/drivers/subsino.cpp
@@ -311,18 +311,18 @@ private:
uint8_t m_flash_packet;
uint8_t m_flash_packet_start;
- DECLARE_WRITE8_MEMBER(tiles_offset_w);
- DECLARE_WRITE8_MEMBER(videoram_w);
- DECLARE_WRITE8_MEMBER(colorram_w);
- template<uint8_t Reel> DECLARE_WRITE8_MEMBER(reel_ram_w);
+ void tiles_offset_w(offs_t offset, uint8_t data);
+ void videoram_w(offs_t offset, uint8_t data);
+ void colorram_w(offs_t offset, uint8_t data);
+ template<uint8_t Reel> void reel_ram_w(offs_t offset, uint8_t data);
void out_a_w(uint8_t data);
void out_b_w(uint8_t data);
- DECLARE_READ8_MEMBER(flash_r);
- DECLARE_WRITE8_MEMBER(flash_w);
- DECLARE_READ8_MEMBER(hwcheck_r);
- DECLARE_WRITE8_MEMBER(out_c_w);
- DECLARE_WRITE8_MEMBER(reel_scrollattr_w);
- DECLARE_READ8_MEMBER(reel_scrollattr_r);
+ uint8_t flash_r();
+ void flash_w(uint8_t data);
+ uint8_t hwcheck_r();
+ void out_c_w(uint8_t data);
+ void reel_scrollattr_w(offs_t offset, uint8_t data);
+ uint8_t reel_scrollattr_r(offs_t offset);
TILE_GET_INFO_MEMBER(get_tile_info);
TILE_GET_INFO_MEMBER(get_stbsub_tile_info);
@@ -362,20 +362,20 @@ void subsino_state::machine_start()
***************************************************************************/
-WRITE8_MEMBER(subsino_state::tiles_offset_w)
+void subsino_state::tiles_offset_w(offs_t offset, uint8_t data)
{
m_tiles_offset = (data & 1) ? 0x1000: 0;
m_tmap->mark_tile_dirty(offset);
// popmessage("gfx %02x",data);
}
-WRITE8_MEMBER(subsino_state::videoram_w)
+void subsino_state::videoram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_tmap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(subsino_state::colorram_w)
+void subsino_state::colorram_w(offs_t offset, uint8_t data)
{
m_colorram[offset] = data;
m_tmap->mark_tile_dirty(offset);
@@ -407,7 +407,7 @@ VIDEO_START_MEMBER(subsino_state,subsino)
template<uint8_t Reel>
-WRITE8_MEMBER(subsino_state::reel_ram_w)
+void subsino_state::reel_ram_w(offs_t offset, uint8_t data)
{
m_reel_ram[Reel][offset] = data;
m_reel_tilemap[Reel]->mark_tile_dirty(offset);
@@ -856,7 +856,7 @@ what it is exactly and what it can possibly do.
*/
-READ8_MEMBER(subsino_state::flash_r)
+uint8_t subsino_state::flash_r()
{
// printf("R %02x\n",m_flash_val);
@@ -870,7 +870,7 @@ READ8_MEMBER(subsino_state::flash_r)
return 0xd9;
}
-WRITE8_MEMBER(subsino_state::flash_w)
+void subsino_state::flash_w(uint8_t data)
{
switch(m_flash_packet_start)
{
@@ -898,7 +898,7 @@ void subsino_state::victor5_map(address_map &map)
}
-READ8_MEMBER(subsino_state::hwcheck_r)
+uint8_t subsino_state::hwcheck_r()
{
/* Wants this at POST otherwise an "Hardware Error" occurs. */
return 0x55;
@@ -938,7 +938,7 @@ void subsino_state::crsbingo_map(address_map &map)
}
-WRITE8_MEMBER(subsino_state::out_c_w)
+void subsino_state::out_c_w(uint8_t data)
{
// not 100% sure on this
@@ -996,7 +996,7 @@ void subsino_state::ramdac_map(address_map &map)
// this stuff is banked..
// not 100% sure on the bank bits.. other bits are also set
-WRITE8_MEMBER(subsino_state::reel_scrollattr_w)
+void subsino_state::reel_scrollattr_w(offs_t offset, uint8_t data)
{
if (*m_stbsub_out_c & 0x20)
{
@@ -1040,7 +1040,7 @@ WRITE8_MEMBER(subsino_state::reel_scrollattr_w)
}
}
-READ8_MEMBER(subsino_state::reel_scrollattr_r)
+uint8_t subsino_state::reel_scrollattr_r(offs_t offset)
{
return m_reel_attr[0][offset];
}
diff --git a/src/mame/drivers/subsino2.cpp b/src/mame/drivers/subsino2.cpp
index 1fba689faff..028566d5396 100644
--- a/src/mame/drivers/subsino2.cpp
+++ b/src/mame/drivers/subsino2.cpp
@@ -142,59 +142,59 @@ protected:
virtual void video_start() override;
private:
- DECLARE_WRITE8_MEMBER(ss9601_byte_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_byte_lo2_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_0_hi_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_0_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_0_hi_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_0_hi_lo2_w);
- DECLARE_READ8_MEMBER(ss9601_videoram_0_hi_r);
- DECLARE_READ8_MEMBER(ss9601_videoram_0_lo_r);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_1_hi_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_1_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_1_hi_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_videoram_1_hi_lo2_w);
- DECLARE_READ8_MEMBER(ss9601_videoram_1_hi_r);
- DECLARE_READ8_MEMBER(ss9601_videoram_1_lo_r);
- DECLARE_WRITE8_MEMBER(ss9601_reelram_hi_lo_w);
- DECLARE_READ8_MEMBER(ss9601_reelram_hi_r);
- DECLARE_READ8_MEMBER(ss9601_reelram_lo_r);
- DECLARE_WRITE8_MEMBER(ss9601_scrollctrl_w);
- DECLARE_WRITE8_MEMBER(ss9601_tilesize_w);
- DECLARE_WRITE8_MEMBER(ss9601_scroll_w);
- DECLARE_WRITE8_MEMBER(ss9601_scrollram_0_hi_w);
- DECLARE_WRITE8_MEMBER(ss9601_scrollram_0_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_scrollram_0_hi_lo_w);
- DECLARE_READ8_MEMBER(ss9601_scrollram_0_hi_r);
- DECLARE_READ8_MEMBER(ss9601_scrollram_0_lo_r);
- DECLARE_WRITE8_MEMBER(ss9601_scrollram_1_hi_w);
- DECLARE_WRITE8_MEMBER(ss9601_scrollram_1_lo_w);
- DECLARE_WRITE8_MEMBER(ss9601_scrollram_1_hi_lo_w);
- DECLARE_READ8_MEMBER(ss9601_scrollram_1_hi_r);
- DECLARE_READ8_MEMBER(ss9601_scrollram_1_lo_r);
- DECLARE_WRITE8_MEMBER(ss9601_disable_w);
- DECLARE_WRITE8_MEMBER(dsw_mask_w);
- DECLARE_READ8_MEMBER(dsw_r);
- DECLARE_READ8_MEMBER(vblank_bit2_r);
- DECLARE_READ8_MEMBER(vblank_bit6_r);
- DECLARE_WRITE16_MEMBER(bishjan_sound_w);
- DECLARE_READ16_MEMBER(bishjan_serial_r);
- DECLARE_WRITE16_MEMBER(bishjan_input_w);
- DECLARE_READ16_MEMBER(bishjan_input_r);
- DECLARE_WRITE16_MEMBER(bishjan_outputs_w);
- DECLARE_WRITE16_MEMBER(new2001_outputs_w);
- DECLARE_WRITE16_MEMBER(humlan_outputs_w);
- DECLARE_WRITE8_MEMBER(expcard_outputs_w);
- DECLARE_WRITE8_MEMBER(mtrain_outputs_w);
- DECLARE_WRITE8_MEMBER(mtrain_videoram_w);
- DECLARE_WRITE8_MEMBER(mtrain_tilesize_w);
- DECLARE_READ8_MEMBER(mtrain_prot_r);
- DECLARE_WRITE8_MEMBER(saklove_outputs_w);
- DECLARE_WRITE8_MEMBER(xplan_outputs_w);
- DECLARE_WRITE8_MEMBER(xtrain_outputs_w);
- DECLARE_READ8_MEMBER(xtrain_subsino_r);
- DECLARE_WRITE8_MEMBER(oki_bank_bit0_w);
- DECLARE_WRITE8_MEMBER(oki_bank_bit4_w);
+ void ss9601_byte_lo_w(uint8_t data);
+ void ss9601_byte_lo2_w(uint8_t data);
+ void ss9601_videoram_0_hi_w(offs_t offset, uint8_t data);
+ void ss9601_videoram_0_lo_w(offs_t offset, uint8_t data);
+ void ss9601_videoram_0_hi_lo_w(offs_t offset, uint8_t data);
+ void ss9601_videoram_0_hi_lo2_w(offs_t offset, uint8_t data);
+ uint8_t ss9601_videoram_0_hi_r(offs_t offset);
+ uint8_t ss9601_videoram_0_lo_r(offs_t offset);
+ void ss9601_videoram_1_hi_w(offs_t offset, uint8_t data);
+ void ss9601_videoram_1_lo_w(offs_t offset, uint8_t data);
+ void ss9601_videoram_1_hi_lo_w(offs_t offset, uint8_t data);
+ void ss9601_videoram_1_hi_lo2_w(offs_t offset, uint8_t data);
+ uint8_t ss9601_videoram_1_hi_r(offs_t offset);
+ uint8_t ss9601_videoram_1_lo_r(offs_t offset);
+ void ss9601_reelram_hi_lo_w(offs_t offset, uint8_t data);
+ uint8_t ss9601_reelram_hi_r(offs_t offset);
+ uint8_t ss9601_reelram_lo_r(offs_t offset);
+ void ss9601_scrollctrl_w(uint8_t data);
+ void ss9601_tilesize_w(uint8_t data);
+ void ss9601_scroll_w(offs_t offset, uint8_t data);
+ void ss9601_scrollram_0_hi_w(offs_t offset, uint8_t data);
+ void ss9601_scrollram_0_lo_w(offs_t offset, uint8_t data);
+ void ss9601_scrollram_0_hi_lo_w(offs_t offset, uint8_t data);
+ uint8_t ss9601_scrollram_0_hi_r(offs_t offset);
+ uint8_t ss9601_scrollram_0_lo_r(offs_t offset);
+ void ss9601_scrollram_1_hi_w(offs_t offset, uint8_t data);
+ void ss9601_scrollram_1_lo_w(offs_t offset, uint8_t data);
+ void ss9601_scrollram_1_hi_lo_w(offs_t offset, uint8_t data);
+ uint8_t ss9601_scrollram_1_hi_r(offs_t offset);
+ uint8_t ss9601_scrollram_1_lo_r(offs_t offset);
+ void ss9601_disable_w(uint8_t data);
+ void dsw_mask_w(uint8_t data);
+ uint8_t dsw_r();
+ uint8_t vblank_bit2_r();
+ uint8_t vblank_bit6_r();
+ void bishjan_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t bishjan_serial_r();
+ void bishjan_input_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t bishjan_input_r();
+ void bishjan_outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void new2001_outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void humlan_outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void expcard_outputs_w(offs_t offset, uint8_t data);
+ void mtrain_outputs_w(offs_t offset, uint8_t data);
+ void mtrain_videoram_w(offs_t offset, uint8_t data);
+ void mtrain_tilesize_w(uint8_t data);
+ uint8_t mtrain_prot_r(offs_t offset);
+ void saklove_outputs_w(offs_t offset, uint8_t data);
+ void xplan_outputs_w(offs_t offset, uint8_t data);
+ void xtrain_outputs_w(offs_t offset, uint8_t data);
+ uint8_t xtrain_subsino_r(offs_t offset);
+ void oki_bank_bit0_w(uint8_t data);
+ void oki_bank_bit4_w(uint8_t data);
TILE_GET_INFO_MEMBER(ss9601_get_tile_info_0);
TILE_GET_INFO_MEMBER(ss9601_get_tile_info_1);
@@ -279,17 +279,17 @@ TILE_GET_INFO_MEMBER(subsino2_state::ss9601_get_tile_info_1)
}
-WRITE8_MEMBER(subsino2_state::ss9601_byte_lo_w)
+void subsino2_state::ss9601_byte_lo_w(uint8_t data)
{
m_ss9601_byte_lo = data;
}
-WRITE8_MEMBER(subsino2_state::ss9601_byte_lo2_w)
+void subsino2_state::ss9601_byte_lo2_w(uint8_t data)
{
m_ss9601_byte_lo2 = data;
}
-static inline void ss9601_videoram_w(layer_t *l, vram_t vram, address_space &space, offs_t offset, uint8_t data)
+static inline void ss9601_videoram_w(layer_t *l, vram_t vram, offs_t offset, uint8_t data)
{
switch (vram)
{
@@ -325,82 +325,82 @@ static inline void ss9601_videoram_w(layer_t *l, vram_t vram, address_space &spa
}
// Layer 0
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_hi_w)
+void subsino2_state::ss9601_videoram_0_hi_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[0], VRAM_HI, space, offset, data);
+ ss9601_videoram_w(&m_layers[0], VRAM_HI, offset, data);
}
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_lo_w)
+void subsino2_state::ss9601_videoram_0_lo_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[0], VRAM_LO, space, offset, data);
+ ss9601_videoram_w(&m_layers[0], VRAM_LO, offset, data);
}
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_hi_lo_w)
+void subsino2_state::ss9601_videoram_0_hi_lo_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[0], VRAM_HI, space, offset, data);
- ss9601_videoram_w(&m_layers[0], VRAM_LO, space, offset, m_ss9601_byte_lo);
+ ss9601_videoram_w(&m_layers[0], VRAM_HI, offset, data);
+ ss9601_videoram_w(&m_layers[0], VRAM_LO, offset, m_ss9601_byte_lo);
}
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_hi_lo2_w)
+void subsino2_state::ss9601_videoram_0_hi_lo2_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[0], VRAM_HI, space, offset, data);
- ss9601_videoram_w(&m_layers[0], VRAM_LO, space, offset, m_ss9601_byte_lo2);
+ ss9601_videoram_w(&m_layers[0], VRAM_HI, offset, data);
+ ss9601_videoram_w(&m_layers[0], VRAM_LO, offset, m_ss9601_byte_lo2);
}
-READ8_MEMBER(subsino2_state::ss9601_videoram_0_hi_r)
+uint8_t subsino2_state::ss9601_videoram_0_hi_r(offs_t offset)
{
return m_layers[0].videoram[offset] >> 8;
}
-READ8_MEMBER(subsino2_state::ss9601_videoram_0_lo_r)
+uint8_t subsino2_state::ss9601_videoram_0_lo_r(offs_t offset)
{
return m_layers[0].videoram[offset] & 0xff;
}
// Layer 1
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_hi_w)
+void subsino2_state::ss9601_videoram_1_hi_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[1], VRAM_HI, space, offset, data);
+ ss9601_videoram_w(&m_layers[1], VRAM_HI, offset, data);
}
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_lo_w)
+void subsino2_state::ss9601_videoram_1_lo_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[1], VRAM_LO, space, offset, data);
+ ss9601_videoram_w(&m_layers[1], VRAM_LO, offset, data);
}
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_hi_lo_w)
+void subsino2_state::ss9601_videoram_1_hi_lo_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[1], VRAM_HI, space, offset, data);
- ss9601_videoram_w(&m_layers[1], VRAM_LO, space, offset, m_ss9601_byte_lo);
+ ss9601_videoram_w(&m_layers[1], VRAM_HI, offset, data);
+ ss9601_videoram_w(&m_layers[1], VRAM_LO, offset, m_ss9601_byte_lo);
}
-WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_hi_lo2_w)
+void subsino2_state::ss9601_videoram_1_hi_lo2_w(offs_t offset, uint8_t data)
{
- ss9601_videoram_w(&m_layers[1], VRAM_HI, space, offset, data);
- ss9601_videoram_w(&m_layers[1], VRAM_LO, space, offset, m_ss9601_byte_lo2);
+ ss9601_videoram_w(&m_layers[1], VRAM_HI, offset, data);
+ ss9601_videoram_w(&m_layers[1], VRAM_LO, offset, m_ss9601_byte_lo2);
}
-READ8_MEMBER(subsino2_state::ss9601_videoram_1_hi_r)
+uint8_t subsino2_state::ss9601_videoram_1_hi_r(offs_t offset)
{
return m_layers[1].videoram[offset] >> 8;
}
-READ8_MEMBER(subsino2_state::ss9601_videoram_1_lo_r)
+uint8_t subsino2_state::ss9601_videoram_1_lo_r(offs_t offset)
{
return m_layers[1].videoram[offset] & 0xff;
}
// Layer 0 Reels
-WRITE8_MEMBER(subsino2_state::ss9601_reelram_hi_lo_w)
+void subsino2_state::ss9601_reelram_hi_lo_w(offs_t offset, uint8_t data)
{
m_ss9601_reelram[offset] = uint16_t(data) << 8 | m_ss9601_byte_lo;
}
-READ8_MEMBER(subsino2_state::ss9601_reelram_hi_r)
+uint8_t subsino2_state::ss9601_reelram_hi_r(offs_t offset)
{
return m_ss9601_reelram[offset] >> 8;
}
-READ8_MEMBER(subsino2_state::ss9601_reelram_lo_r)
+uint8_t subsino2_state::ss9601_reelram_lo_r(offs_t offset)
{
return m_ss9601_reelram[offset] & 0xff;
}
@@ -511,12 +511,12 @@ wtrnymph xplan
// These are written in sequence
-WRITE8_MEMBER(subsino2_state::ss9601_scrollctrl_w)
+void subsino2_state::ss9601_scrollctrl_w(uint8_t data)
{
m_ss9601_scrollctrl = data;
}
-WRITE8_MEMBER(subsino2_state::ss9601_tilesize_w)
+void subsino2_state::ss9601_tilesize_w(uint8_t data)
{
m_ss9601_tilesize = data;
@@ -582,7 +582,7 @@ WRITE8_MEMBER(subsino2_state::ss9601_tilesize_w)
Tilemaps Scroll
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::ss9601_scroll_w)
+void subsino2_state::ss9601_scroll_w(offs_t offset, uint8_t data)
{
layer_t *layers = m_layers;
switch ( offset )
@@ -602,53 +602,53 @@ WRITE8_MEMBER(subsino2_state::ss9601_scroll_w)
}
// Layer 0
-WRITE8_MEMBER(subsino2_state::ss9601_scrollram_0_hi_w)
+void subsino2_state::ss9601_scrollram_0_hi_w(offs_t offset, uint8_t data)
{
m_layers[0].scrollram[offset] = uint16_t(data) << 8 | (m_layers[0].scrollram[offset] & 0xff);
}
-WRITE8_MEMBER(subsino2_state::ss9601_scrollram_0_lo_w)
+void subsino2_state::ss9601_scrollram_0_lo_w(offs_t offset, uint8_t data)
{
m_layers[0].scrollram[offset] = data | (m_layers[0].scrollram[offset] & 0xff00);
}
-WRITE8_MEMBER(subsino2_state::ss9601_scrollram_0_hi_lo_w)
+void subsino2_state::ss9601_scrollram_0_hi_lo_w(offs_t offset, uint8_t data)
{
m_layers[0].scrollram[offset] = uint16_t(data) << 8 | m_ss9601_byte_lo;
}
-READ8_MEMBER(subsino2_state::ss9601_scrollram_0_hi_r)
+uint8_t subsino2_state::ss9601_scrollram_0_hi_r(offs_t offset)
{
return m_layers[0].scrollram[offset] >> 8;
}
-READ8_MEMBER(subsino2_state::ss9601_scrollram_0_lo_r)
+uint8_t subsino2_state::ss9601_scrollram_0_lo_r(offs_t offset)
{
return m_layers[0].scrollram[offset] & 0xff;
}
// Layer 1
-WRITE8_MEMBER(subsino2_state::ss9601_scrollram_1_hi_w)
+void subsino2_state::ss9601_scrollram_1_hi_w(offs_t offset, uint8_t data)
{
m_layers[1].scrollram[offset] = uint16_t(data) << 8 | (m_layers[1].scrollram[offset] & 0xff);
}
-WRITE8_MEMBER(subsino2_state::ss9601_scrollram_1_lo_w)
+void subsino2_state::ss9601_scrollram_1_lo_w(offs_t offset, uint8_t data)
{
m_layers[1].scrollram[offset] = data | (m_layers[1].scrollram[offset] & 0xff00);
}
-WRITE8_MEMBER(subsino2_state::ss9601_scrollram_1_hi_lo_w)
+void subsino2_state::ss9601_scrollram_1_hi_lo_w(offs_t offset, uint8_t data)
{
m_layers[1].scrollram[offset] = uint16_t(data) << 8 | m_ss9601_byte_lo;
}
-READ8_MEMBER(subsino2_state::ss9601_scrollram_1_hi_r)
+uint8_t subsino2_state::ss9601_scrollram_1_hi_r(offs_t offset)
{
return m_layers[1].scrollram[offset] >> 8;
}
-READ8_MEMBER(subsino2_state::ss9601_scrollram_1_lo_r)
+uint8_t subsino2_state::ss9601_scrollram_1_lo_r(offs_t offset)
{
return m_layers[1].scrollram[offset] & 0xff;
}
@@ -658,7 +658,7 @@ READ8_MEMBER(subsino2_state::ss9601_scrollram_1_lo_r)
Tilemaps Disable
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::ss9601_disable_w)
+void subsino2_state::ss9601_disable_w(uint8_t data)
{
m_ss9601_disable = data;
}
@@ -856,12 +856,12 @@ uint32_t subsino2_state::screen_update_subsino2(screen_device &screen, bitmap_in
Input / Output
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::dsw_mask_w)
+void subsino2_state::dsw_mask_w(uint8_t data)
{
m_dsw_mask = data;
}
-READ8_MEMBER(subsino2_state::dsw_r)
+uint8_t subsino2_state::dsw_r()
{
return ( (m_dsw[0]->read() & m_dsw_mask) ? 0x01 : 0 ) |
( (m_dsw[1]->read() & m_dsw_mask) ? 0x02 : 0 ) |
@@ -870,22 +870,22 @@ READ8_MEMBER(subsino2_state::dsw_r)
}
-READ8_MEMBER(subsino2_state::vblank_bit2_r)
+uint8_t subsino2_state::vblank_bit2_r()
{
return m_screen->vblank() ? 0x04 : 0x00;
}
-READ8_MEMBER(subsino2_state::vblank_bit6_r)
+uint8_t subsino2_state::vblank_bit6_r()
{
return m_screen->vblank() ? 0x40 : 0x00;
}
-WRITE8_MEMBER(subsino2_state::oki_bank_bit0_w)
+void subsino2_state::oki_bank_bit0_w(uint8_t data)
{
// it writes 0x32 or 0x33
m_oki->set_rom_bank(data & 1);
}
-WRITE8_MEMBER(subsino2_state::oki_bank_bit4_w)
+void subsino2_state::oki_bank_bit4_w(uint8_t data)
{
// it writes 0x23 or 0x33
m_oki->set_rom_bank((data >> 4) & 1);
@@ -900,7 +900,7 @@ WRITE8_MEMBER(subsino2_state::oki_bank_bit4_w)
Bishou Jan
***************************************************************************/
-WRITE16_MEMBER(subsino2_state::bishjan_sound_w)
+void subsino2_state::bishjan_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
/*
sound writes in service mode:
@@ -911,7 +911,7 @@ WRITE16_MEMBER(subsino2_state::bishjan_sound_w)
m_bishjan_sound = data >> 8;
}
-READ16_MEMBER(subsino2_state::bishjan_serial_r)
+uint16_t subsino2_state::bishjan_serial_r()
{
return
(machine().rand() & 0x9800) | // bit 7 - serial communication
@@ -921,13 +921,13 @@ READ16_MEMBER(subsino2_state::bishjan_serial_r)
0x18;
}
-WRITE16_MEMBER(subsino2_state::bishjan_input_w)
+void subsino2_state::bishjan_input_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if (ACCESSING_BITS_8_15)
m_bishjan_input = data >> 8;
}
-READ16_MEMBER(subsino2_state::bishjan_input_r)
+uint16_t subsino2_state::bishjan_input_r()
{
uint16_t res = 0xff;
@@ -939,7 +939,7 @@ READ16_MEMBER(subsino2_state::bishjan_input_r)
m_system->read(); // low byte
}
-WRITE16_MEMBER(subsino2_state::bishjan_outputs_w)
+void subsino2_state::bishjan_outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA( &m_outputs16[offset] );
@@ -1018,7 +1018,7 @@ void subsino2_state::ramdac_map(address_map &map)
New 2001
***************************************************************************/
-WRITE16_MEMBER(subsino2_state::new2001_outputs_w)
+void subsino2_state::new2001_outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA( &m_outputs16[offset] );
@@ -1113,7 +1113,7 @@ void subsino2_state::new2001_map(address_map &map)
Humlan's Lyckohjul
***************************************************************************/
-WRITE16_MEMBER(subsino2_state::humlan_outputs_w)
+void subsino2_state::humlan_outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA( &m_outputs16[offset] );
@@ -1150,7 +1150,7 @@ void subsino2_state::humlan_map(address_map &map)
Express Card / Top Card
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::expcard_outputs_w)
+void subsino2_state::expcard_outputs_w(offs_t offset, uint8_t data)
{
m_outputs[offset] = data;
@@ -1186,7 +1186,7 @@ WRITE8_MEMBER(subsino2_state::expcard_outputs_w)
Magic Train
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::mtrain_outputs_w)
+void subsino2_state::mtrain_outputs_w(offs_t offset, uint8_t data)
{
m_outputs[offset] = data;
@@ -1217,19 +1217,19 @@ WRITE8_MEMBER(subsino2_state::mtrain_outputs_w)
// popmessage("0: %02x - 1: %02x - 2: %02x - 3: %02x", m_outputs[0], m_outputs[1], m_outputs[2], m_outputs[3]);
}
-WRITE8_MEMBER(subsino2_state::mtrain_videoram_w)
+void subsino2_state::mtrain_videoram_w(offs_t offset, uint8_t data)
{
vram_t vram = (m_ss9601_byte_lo & 0x08) ? VRAM_HI : VRAM_LO;
switch (m_ss9601_byte_lo & (~0x08))
{
case 0x00:
- ss9601_videoram_w(&m_layers[1], vram, space, offset, data);
- ss9601_videoram_w(&m_layers[1], vram, space, offset+0x1000, data);
+ ss9601_videoram_w(&m_layers[1], vram, offset, data);
+ ss9601_videoram_w(&m_layers[1], vram, offset+0x1000, data);
break;
case 0x04:
- ss9601_videoram_w(&m_layers[0], vram, space, offset, data);
- ss9601_videoram_w(&m_layers[0], vram, space, offset+0x1000, data);
+ ss9601_videoram_w(&m_layers[0], vram, offset, data);
+ ss9601_videoram_w(&m_layers[0], vram, offset+0x1000, data);
break;
case 0x06:
@@ -1241,7 +1241,7 @@ WRITE8_MEMBER(subsino2_state::mtrain_videoram_w)
}
}
-WRITE8_MEMBER(subsino2_state::mtrain_tilesize_w)
+void subsino2_state::mtrain_tilesize_w(uint8_t data)
{
m_ss9601_tilesize = data;
@@ -1279,7 +1279,7 @@ WRITE8_MEMBER(subsino2_state::mtrain_tilesize_w)
}
}
-READ8_MEMBER(subsino2_state::mtrain_prot_r)
+uint8_t subsino2_state::mtrain_prot_r(offs_t offset)
{
return "SUBSION"[offset];
}
@@ -1329,7 +1329,7 @@ void subsino2_state::mtrain_io(address_map &map)
Sakura Love - Ying Hua Lian
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::saklove_outputs_w)
+void subsino2_state::saklove_outputs_w(offs_t offset, uint8_t data)
{
m_outputs[offset] = data;
@@ -1413,7 +1413,7 @@ void subsino2_state::saklove_io(address_map &map)
X-Plan
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::xplan_outputs_w)
+void subsino2_state::xplan_outputs_w(offs_t offset, uint8_t data)
{
m_outputs[offset] = data;
@@ -1522,7 +1522,7 @@ void subsino2_state::xplan_io(address_map &map)
X-Train
***************************************************************************/
-WRITE8_MEMBER(subsino2_state::xtrain_outputs_w)
+void subsino2_state::xtrain_outputs_w(offs_t offset, uint8_t data)
{
m_outputs[offset] = data;
@@ -1562,7 +1562,7 @@ WRITE8_MEMBER(subsino2_state::xtrain_outputs_w)
// popmessage("0: %02x - 1: %02x - 2: %02x - 3: %02x", m_outputs[0], m_outputs[1], m_outputs[2], m_outputs[3]);
}
-READ8_MEMBER(subsino2_state::xtrain_subsino_r)
+uint8_t subsino2_state::xtrain_subsino_r(offs_t offset)
{
static const char data[] = { "SUBSINO" };
return data[offset];
diff --git a/src/mame/drivers/sun2.cpp b/src/mame/drivers/sun2.cpp
index 318dfb4d39a..8f43b4249dd 100644
--- a/src/mame/drivers/sun2.cpp
+++ b/src/mame/drivers/sun2.cpp
@@ -174,14 +174,14 @@ private:
virtual void machine_start() override;
virtual void machine_reset() override;
- DECLARE_READ16_MEMBER( mmu_r );
- DECLARE_WRITE16_MEMBER( mmu_w );
+ uint16_t mmu_r(offs_t offset, uint16_t mem_mask = ~0);
+ void mmu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask);
void tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem_mask);
- DECLARE_READ16_MEMBER( video_ctrl_r );
- DECLARE_WRITE16_MEMBER( video_ctrl_w );
- DECLARE_READ16_MEMBER( ram_r );
- DECLARE_WRITE16_MEMBER( ram_w );
+ uint16_t video_ctrl_r();
+ void video_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t ram_r(offs_t offset);
+ void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint8_t ethernet_r();
void ethernet_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(ethernet_int_w);
@@ -212,18 +212,18 @@ private:
uint8_t m_ethernet_status;
};
-READ16_MEMBER( sun2_state::ram_r )
+uint16_t sun2_state::ram_r(offs_t offset)
{
if (offset < m_ram_size_words) return m_ram_ptr[offset];
return 0xffff;
}
-WRITE16_MEMBER( sun2_state::ram_w )
+void sun2_state::ram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if (offset < m_ram_size_words) COMBINE_DATA(&m_ram_ptr[offset]);
}
-READ16_MEMBER( sun2_state::mmu_r )
+uint16_t sun2_state::mmu_r(offs_t offset, uint16_t mem_mask)
{
return tl_mmu_r(m_maincpu->get_fc(), offset, mem_mask);
}
@@ -360,7 +360,7 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask)
return 0xffff;
}
-WRITE16_MEMBER( sun2_state::mmu_w )
+void sun2_state::mmu_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
tl_mmu_w(m_maincpu->get_fc(), offset, data, mem_mask);
}
@@ -489,12 +489,12 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem
}
// BW2 video control
-READ16_MEMBER( sun2_state::video_ctrl_r )
+uint16_t sun2_state::video_ctrl_r()
{
return m_bw2_ctrl;
}
-WRITE16_MEMBER( sun2_state::video_ctrl_w )
+void sun2_state::video_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
//printf("sun2: BW2: %x to video_ctrl\n", data);
COMBINE_DATA(&m_bw2_ctrl);
diff --git a/src/mame/drivers/sun3.cpp b/src/mame/drivers/sun3.cpp
index 520df9cbe3d..01418f6ca10 100644
--- a/src/mame/drivers/sun3.cpp
+++ b/src/mame/drivers/sun3.cpp
@@ -270,18 +270,18 @@ private:
required_device<ram_device> m_ram;
required_device<am79c90_device> m_lance;
- DECLARE_READ32_MEMBER( tl_mmu_r );
- DECLARE_WRITE32_MEMBER( tl_mmu_w );
- DECLARE_READ32_MEMBER( ram_r );
- DECLARE_WRITE32_MEMBER( ram_w );
- DECLARE_READ32_MEMBER( parity_r );
- DECLARE_WRITE32_MEMBER( parity_w );
- DECLARE_READ32_MEMBER( ecc_r );
- DECLARE_WRITE32_MEMBER( ecc_w );
- DECLARE_READ32_MEMBER( irqctrl_r );
- DECLARE_WRITE32_MEMBER( irqctrl_w );
- DECLARE_READ8_MEMBER( rtc7170_r );
- DECLARE_WRITE8_MEMBER( rtc7170_w );
+ uint32_t tl_mmu_r(offs_t offset, uint32_t mem_mask = ~0);
+ void tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t ram_r(offs_t offset);
+ void ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t parity_r(offs_t offset);
+ void parity_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t ecc_r(offs_t offset);
+ void ecc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t irqctrl_r();
+ void irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint8_t rtc7170_r(offs_t offset);
+ void rtc7170_w(offs_t offset, uint8_t data);
uint32_t bw2_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
uint32_t bw2_16x11_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -330,7 +330,7 @@ static void scsi_devices(device_slot_interface &device)
device.set_option_machine_config("cdrom", sun_cdrom);
}
-READ32_MEMBER( sun3_state::ram_r )
+uint32_t sun3_state::ram_r(offs_t offset)
{
if (m_ecc[0] == 0x10c00000)
{
@@ -366,7 +366,7 @@ READ32_MEMBER( sun3_state::ram_r )
return 0xffffffff;
}
-WRITE32_MEMBER( sun3_state::ram_w )
+void sun3_state::ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// if writing bad parity is enabled
if (((m_parregs[0] & 0x20000000) == 0x20000000) &&
@@ -437,7 +437,7 @@ WRITE32_MEMBER( sun3_state::ram_w )
}
}
-READ32_MEMBER( sun3_state::tl_mmu_r )
+uint32_t sun3_state::tl_mmu_r(offs_t offset, uint32_t mem_mask)
{
uint8_t fc = m_maincpu->get_fc();
@@ -574,7 +574,7 @@ READ32_MEMBER( sun3_state::tl_mmu_r )
return 0xffffffff;
}
-WRITE32_MEMBER( sun3_state::tl_mmu_w )
+void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
uint8_t fc = m_maincpu->get_fc();
@@ -722,7 +722,7 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w )
logerror("sun3: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<2);
}
-READ32_MEMBER(sun3_state::parity_r)
+uint32_t sun3_state::parity_r(offs_t offset)
{
uint32_t rv = m_parregs[offset];
@@ -735,7 +735,7 @@ READ32_MEMBER(sun3_state::parity_r)
return rv;
}
-WRITE32_MEMBER(sun3_state::parity_w)
+void sun3_state::parity_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
//printf("sun3: %08x to parity registers @ %x (mask %08x)\n", data, offset, mem_mask);
@@ -800,12 +800,12 @@ void sun3_state::vmetype3space_map(address_map &map)
{
}
-READ32_MEMBER(sun3_state::irqctrl_r)
+uint32_t sun3_state::irqctrl_r()
{
return m_irqctrl;
}
-WRITE32_MEMBER(sun3_state::irqctrl_w)
+void sun3_state::irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
//printf("sun3: %08x to interrupt control (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_irqctrl);
@@ -837,14 +837,14 @@ WRITE32_MEMBER(sun3_state::irqctrl_w)
}
}
-READ8_MEMBER(sun3_state::rtc7170_r)
+uint8_t sun3_state::rtc7170_r(offs_t offset)
{
//printf("read 7170 @ %x, PC=%x\n", offset, m_maincpu->pc());
return 0xff;
}
-WRITE8_MEMBER(sun3_state::rtc7170_w)
+void sun3_state::rtc7170_w(offs_t offset, uint8_t data)
{
//printf("%02x to 7170 @ %x\n", data, offset);
@@ -857,7 +857,7 @@ WRITE8_MEMBER(sun3_state::rtc7170_w)
}
}
-READ32_MEMBER(sun3_state::ecc_r)
+uint32_t sun3_state::ecc_r(offs_t offset)
{
//printf("read ECC @ %x, PC=%x\n", offset, m_maincpu->pc());
// fefc34a
@@ -880,7 +880,7 @@ READ32_MEMBER(sun3_state::ecc_r)
return rv;
}
-WRITE32_MEMBER(sun3_state::ecc_w)
+void sun3_state::ecc_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
//printf("%08x to ecc @ %x, mask %08x\n", data, offset, mem_mask);
diff --git a/src/mame/drivers/sun3x.cpp b/src/mame/drivers/sun3x.cpp
index 7f9f1af79c9..c79ca22c57f 100644
--- a/src/mame/drivers/sun3x.cpp
+++ b/src/mame/drivers/sun3x.cpp
@@ -188,29 +188,29 @@ private:
required_shared_ptr<uint32_t> m_p_ram;
optional_shared_ptr<uint32_t> m_bw2_vram;
- DECLARE_READ32_MEMBER(enable_r);
- DECLARE_WRITE32_MEMBER(enable_w);
- DECLARE_READ32_MEMBER(buserr_r);
- DECLARE_WRITE32_MEMBER(buserr_w);
- DECLARE_READ32_MEMBER(diag_r);
- DECLARE_WRITE32_MEMBER(diag_w);
- DECLARE_READ32_MEMBER(printer_r);
- DECLARE_WRITE32_MEMBER(printer_w);
- DECLARE_READ32_MEMBER(iommu_r);
- DECLARE_WRITE32_MEMBER(iommu_w);
- DECLARE_READ32_MEMBER(irqctrl_r);
- DECLARE_WRITE32_MEMBER(irqctrl_w);
- DECLARE_READ32_MEMBER(memreg_r);
- DECLARE_WRITE32_MEMBER(memreg_w);
- DECLARE_READ32_MEMBER(memrerraddr_r);
- DECLARE_WRITE32_MEMBER(memrerraddr_w);
- DECLARE_READ32_MEMBER(fdc_control_r);
- DECLARE_WRITE32_MEMBER(fdc_control_w);
- DECLARE_READ32_MEMBER(cause_buserr_r);
- DECLARE_WRITE32_MEMBER(cause_buserr_w);
- DECLARE_WRITE32_MEMBER(ramwrite_w);
- DECLARE_READ32_MEMBER(fpa_r);
- DECLARE_READ32_MEMBER(p4id_r);
+ uint32_t enable_r();
+ void enable_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t buserr_r();
+ void buserr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t diag_r();
+ void diag_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t printer_r();
+ void printer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t iommu_r(offs_t offset);
+ void iommu_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t irqctrl_r();
+ void irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t memreg_r();
+ void memreg_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t memrerraddr_r();
+ void memrerraddr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t fdc_control_r();
+ void fdc_control_w(uint32_t data);
+ uint32_t cause_buserr_r();
+ void cause_buserr_w(uint32_t data);
+ void ramwrite_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t fpa_r();
+ uint32_t p4id_r();
DECLARE_FLOPPY_FORMATS( floppy_formats );
@@ -272,17 +272,17 @@ void sun3x_state::sun3_460_mem(address_map &map)
map(0xfefe0000, 0xfefeffff).rom().region("user1", 0);
}
-READ32_MEMBER( sun3x_state::p4id_r )
+uint32_t sun3x_state::p4id_r()
{
return (1<<24); // 0 = hires bw2 1600x1280, 1 = bw2 1152x900, 0x45 is "Ibis" color, blt 0x68 is "Lego" color
}
-WRITE32_MEMBER( sun3x_state::fdc_control_w )
+void sun3x_state::fdc_control_w(uint32_t data)
{
logerror("FDC write %02x (%08x)\n", data >> 24, m_maincpu->pc());
}
-READ32_MEMBER( sun3x_state::fdc_control_r )
+uint32_t sun3x_state::fdc_control_r()
{
// Type of floppy present
// 0 = no floppy in drive
@@ -313,7 +313,7 @@ READ32_MEMBER( sun3x_state::fdc_control_r )
return 0 << 24;
}
-WRITE32_MEMBER(sun3x_state::ramwrite_w)
+void sun3x_state::ramwrite_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
uint32_t *pRAM = (uint32_t *)m_p_ram.target();
@@ -367,58 +367,58 @@ WRITE32_MEMBER(sun3x_state::ramwrite_w)
COMBINE_DATA(&pRAM[offset]);
}
-READ32_MEMBER(sun3x_state::enable_r)
+uint32_t sun3x_state::enable_r()
{
return m_enable;
}
-WRITE32_MEMBER(sun3x_state::enable_w)
+void sun3x_state::enable_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to enable (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_enable);
}
-READ32_MEMBER(sun3x_state::buserr_r)
+uint32_t sun3x_state::buserr_r()
{
uint32_t rv = m_buserr;
m_buserr = 0;
return rv;
}
-WRITE32_MEMBER(sun3x_state::buserr_w)
+void sun3x_state::buserr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to buserr (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_buserr);
}
-READ32_MEMBER(sun3x_state::diag_r)
+uint32_t sun3x_state::diag_r()
{
return m_diag;
}
-WRITE32_MEMBER(sun3x_state::diag_w)
+void sun3x_state::diag_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to diag (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_diag);
}
-READ32_MEMBER(sun3x_state::printer_r)
+uint32_t sun3x_state::printer_r()
{
return m_printer;
}
-WRITE32_MEMBER(sun3x_state::printer_w)
+void sun3x_state::printer_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to printer (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_printer);
}
-READ32_MEMBER(sun3x_state::irqctrl_r)
+uint32_t sun3x_state::irqctrl_r()
{
return m_irqctrl;
}
-WRITE32_MEMBER(sun3x_state::irqctrl_w)
+void sun3x_state::irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to interrupt control (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_irqctrl);
@@ -454,31 +454,31 @@ WRITE32_MEMBER(sun3x_state::irqctrl_w)
}
}
-READ32_MEMBER(sun3x_state::memreg_r)
+uint32_t sun3x_state::memreg_r()
{
return m_memreg;
}
-WRITE32_MEMBER(sun3x_state::memreg_w)
+void sun3x_state::memreg_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to memory control (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_memreg);
}
-READ32_MEMBER(sun3x_state::memrerraddr_r)
+uint32_t sun3x_state::memrerraddr_r()
{
m_bInBusErr = false;
m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);
return m_memerraddr;
}
-WRITE32_MEMBER(sun3x_state::memrerraddr_w)
+void sun3x_state::memrerraddr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// printf("sun3x: %08x to memory error address (mask %08x)\n", data, mem_mask);
COMBINE_DATA(&m_memerraddr);
}
-READ32_MEMBER(sun3x_state::iommu_r)
+uint32_t sun3x_state::iommu_r(offs_t offset)
{
return m_iommu[offset];
}
@@ -492,12 +492,12 @@ READ32_MEMBER(sun3x_state::iommu_r)
// write prot: 0x00000004
// bad: 0x00000002
// valid: 0x00000001
-WRITE32_MEMBER(sun3x_state::iommu_w)
+void sun3x_state::iommu_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_iommu[offset]);
}
-READ32_MEMBER(sun3x_state::fpa_r)
+uint32_t sun3x_state::fpa_r()
{
m_buserr |= 0x04000000;
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
@@ -505,7 +505,7 @@ READ32_MEMBER(sun3x_state::fpa_r)
return 0xffffffff;
}
-READ32_MEMBER(sun3x_state::cause_buserr_r)
+uint32_t sun3x_state::cause_buserr_r()
{
m_buserr |= 0x20000000;
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
@@ -513,7 +513,7 @@ READ32_MEMBER(sun3x_state::cause_buserr_r)
return 0xffffffff;
}
-WRITE32_MEMBER(sun3x_state::cause_buserr_w)
+void sun3x_state::cause_buserr_w(uint32_t data)
{
m_buserr |= 0x20000000;
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
diff --git a/src/mame/drivers/sun4.cpp b/src/mame/drivers/sun4.cpp
index c227436a98a..713d4d7c6ac 100644
--- a/src/mame/drivers/sun4.cpp
+++ b/src/mame/drivers/sun4.cpp
@@ -550,22 +550,20 @@ protected:
static const device_timer_id TIMER_0 = 0;
static const device_timer_id TIMER_1 = 1;
- DECLARE_READ32_MEMBER( debugger_r );
- DECLARE_WRITE32_MEMBER( debugger_w );
-
- DECLARE_READ32_MEMBER( sl0_id );
- DECLARE_READ32_MEMBER( async_timeout_r );
- DECLARE_WRITE32_MEMBER( async_timeout_w );
- DECLARE_READ32_MEMBER( timer_r );
- DECLARE_WRITE32_MEMBER( timer_w );
- DECLARE_READ8_MEMBER( irq_r );
- DECLARE_WRITE8_MEMBER( irq_w );
- DECLARE_READ8_MEMBER( fdc_r );
- DECLARE_WRITE8_MEMBER( fdc_w );
- DECLARE_READ8_MEMBER( auxio_r );
- DECLARE_WRITE8_MEMBER( auxio_w );
- DECLARE_READ32_MEMBER( dma_r );
- DECLARE_WRITE32_MEMBER( dma_w );
+ uint32_t debugger_r(offs_t offset, uint32_t mem_mask = ~0);
+ void debugger_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+
+ uint32_t sl0_id();
+ uint32_t timer_r(offs_t offset, uint32_t mem_mask = ~0);
+ void timer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint8_t irq_r();
+ void irq_w(uint8_t data);
+ uint8_t fdc_r(offs_t offset);
+ void fdc_w(offs_t offset, uint8_t data);
+ uint8_t auxio_r();
+ void auxio_w(uint8_t data);
+ uint32_t dma_r(offs_t offset);
+ void dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_WRITE_LINE_MEMBER( scsi_irq );
DECLARE_WRITE_LINE_MEMBER( scsi_drq );
@@ -684,12 +682,12 @@ private:
required_device_array<sbus_slot_device, 3> m_sbus_slot;
};
-READ32_MEMBER( sun4_base_state::debugger_r )
+uint32_t sun4_base_state::debugger_r(offs_t offset, uint32_t mem_mask)
{
return m_mmu->insn_data_r<sun4_mmu_base_device::SUPER_INSN>(offset, mem_mask);
}
-WRITE32_MEMBER( sun4_base_state::debugger_w )
+void sun4_base_state::debugger_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
m_mmu->insn_data_w<sun4_mmu_base_device::SUPER_INSN>(offset, data, mem_mask);
}
@@ -890,7 +888,7 @@ void sun4c_state::machine_reset()
sun4_base_state::machine_reset();
}
-READ8_MEMBER( sun4_base_state::fdc_r )
+uint8_t sun4_base_state::fdc_r(offs_t offset)
{
if (machine().side_effects_disabled())
return 0;
@@ -920,7 +918,7 @@ READ8_MEMBER( sun4_base_state::fdc_r )
return 0;
}
-WRITE8_MEMBER( sun4_base_state::fdc_w )
+void sun4_base_state::fdc_w(offs_t offset, uint8_t data)
{
switch(offset)
{
@@ -943,13 +941,13 @@ WRITE8_MEMBER( sun4_base_state::fdc_w )
}
}
-READ8_MEMBER( sun4_base_state::auxio_r )
+uint8_t sun4_base_state::auxio_r()
{
//logerror("%s: auxio_r: %02x\n", machine().describe_context(), m_auxio);
return m_auxio;
}
-WRITE8_MEMBER( sun4_base_state::auxio_w )
+void sun4_base_state::auxio_w(uint8_t data)
{
//logerror("%s: auxio_w: %02x, drive_sel:%d tc:%d eject:%d LED:%d\n", machine().describe_context(), data, BIT(data, 3), BIT(data, 2), BIT(data, 1), BIT(data, 0));
m_auxio = (m_auxio & 0xf0) | (data & 0x0f);
@@ -964,13 +962,13 @@ WRITE8_MEMBER( sun4_base_state::auxio_w )
}
}
-READ8_MEMBER( sun4_base_state::irq_r )
+uint8_t sun4_base_state::irq_r()
{
//logerror("%02x from IRQ\n", m_irq_reg);
return m_irq_reg;
}
-WRITE8_MEMBER( sun4_base_state::irq_w )
+void sun4_base_state::irq_w(uint8_t data)
{
const uint8_t old_irq = m_irq_reg;
m_irq_reg = data;
@@ -1068,7 +1066,7 @@ void sun4_base_state::device_timer(emu_timer &timer, device_timer_id id, int par
}
}
-READ32_MEMBER( sun4_base_state::timer_r )
+uint32_t sun4_base_state::timer_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t ret = m_counter[offset];
@@ -1099,7 +1097,7 @@ READ32_MEMBER( sun4_base_state::timer_r )
return ret;
}
-WRITE32_MEMBER( sun4_base_state::timer_w )
+void sun4_base_state::timer_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_counter[offset]);
@@ -1221,7 +1219,7 @@ void sun4_base_state::dma_transfer()
}
}
-READ32_MEMBER( sun4_base_state::dma_r )
+uint32_t sun4_base_state::dma_r(offs_t offset)
{
if (offset == DMA_CTRL && (m_dma[DMA_CTRL] & DMA_TC) != 0)
{
@@ -1231,7 +1229,7 @@ READ32_MEMBER( sun4_base_state::dma_r )
return m_dma[offset];
}
-WRITE32_MEMBER( sun4_base_state::dma_w )
+void sun4_base_state::dma_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
switch (offset)
{
@@ -1331,7 +1329,7 @@ WRITE_LINE_MEMBER( sun4_base_state::fdc_irq )
}
// indicate on-board SCSI/DMA/Ethernet card exists
-READ32_MEMBER( sun4_base_state::sl0_id )
+uint32_t sun4_base_state::sl0_id()
{
return 0xfe810101;
}
diff --git a/src/mame/drivers/supdrapo.cpp b/src/mame/drivers/supdrapo.cpp
index c9564aaf438..3bb1be1cef6 100644
--- a/src/mame/drivers/supdrapo.cpp
+++ b/src/mame/drivers/supdrapo.cpp
@@ -99,12 +99,12 @@ private:
uint8_t m_wdog;
- DECLARE_READ8_MEMBER(rng_r);
- DECLARE_WRITE8_MEMBER(wdog8000_w);
- DECLARE_WRITE8_MEMBER(debug8004_w);
- DECLARE_WRITE8_MEMBER(debug7c00_w);
- DECLARE_WRITE8_MEMBER(coinin_w);
- DECLARE_WRITE8_MEMBER(payout_w);
+ uint8_t rng_r();
+ void wdog8000_w(uint8_t data);
+ void debug8004_w(uint8_t data);
+ void debug7c00_w(uint8_t data);
+ void coinin_w(uint8_t data);
+ void payout_w(uint8_t data);
void ay8910_outputa_w(uint8_t data);
void ay8910_outputb_w(uint8_t data);
@@ -182,12 +182,12 @@ void supdrapo_state::supdrapo_palette(palette_device &palette) const
R/W Handlers
**********************************************************************/
-READ8_MEMBER(supdrapo_state::rng_r)
+uint8_t supdrapo_state::rng_r()
{
return machine().rand();
}
-WRITE8_MEMBER(supdrapo_state::wdog8000_w)
+void supdrapo_state::wdog8000_w(uint8_t data)
{
/* Kind of state watchdog alternating 0x00 & 0x01 writes.
Used when exit the test mode (writes 2 consecutive 0's).
@@ -226,7 +226,7 @@ WRITE8_MEMBER(supdrapo_state::wdog8000_w)
}
-WRITE8_MEMBER(supdrapo_state::debug8004_w)
+void supdrapo_state::debug8004_w(uint8_t data)
{
/* Writes 0x00 each time the machine is initialized */
@@ -234,7 +234,7 @@ WRITE8_MEMBER(supdrapo_state::debug8004_w)
// popmessage("written : %02X", data);
}
-WRITE8_MEMBER(supdrapo_state::debug7c00_w)
+void supdrapo_state::debug7c00_w(uint8_t data)
{
/* This one write 0's constantly when the input test mode is running */
logerror("debug7c00: %02X\n", data);
@@ -245,12 +245,12 @@ WRITE8_MEMBER(supdrapo_state::debug7c00_w)
Coin I/O Counters
**********************************************************************/
-WRITE8_MEMBER(supdrapo_state::coinin_w)
+void supdrapo_state::coinin_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 0x01); /* Coin In */
}
-WRITE8_MEMBER(supdrapo_state::payout_w)
+void supdrapo_state::payout_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(1, data & 0x01); /* Payout */
}
diff --git a/src/mame/drivers/supduck.cpp b/src/mame/drivers/supduck.cpp
index b8498633555..b2e87589d6f 100644
--- a/src/mame/drivers/supduck.cpp
+++ b/src/mame/drivers/supduck.cpp
@@ -74,17 +74,17 @@ private:
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
- DECLARE_WRITE16_MEMBER(text_videoram_w);
- DECLARE_WRITE16_MEMBER(fore_videoram_w);
- DECLARE_WRITE16_MEMBER(back_videoram_w);
- DECLARE_WRITE16_MEMBER(supduck_scroll_w);
+ void text_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void fore_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void back_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void supduck_scroll_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
- DECLARE_WRITE16_MEMBER(supduck_4000_w);
- DECLARE_WRITE16_MEMBER(supduck_4002_w);
+ void supduck_4000_w(uint16_t data);
+ void supduck_4002_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
TILEMAP_MAPPER_MEMBER(supduk_tilemap_scan);
- DECLARE_WRITE8_MEMBER(okibank_w);
+ void okibank_w(uint8_t data);
void main_map(address_map &map);
void oki_map(address_map &map);
@@ -147,19 +147,19 @@ uint32_t supduck_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
}
-WRITE16_MEMBER(supduck_state::text_videoram_w)
+void supduck_state::text_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_text_videoram[offset]);
m_text_tilemap->mark_tile_dirty(offset);
}
-WRITE16_MEMBER(supduck_state::fore_videoram_w)
+void supduck_state::fore_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_fore_videoram[offset]);
m_fore_tilemap->mark_tile_dirty(offset);
}
-WRITE16_MEMBER(supduck_state::back_videoram_w)
+void supduck_state::back_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_back_videoram[offset]);
m_back_tilemap->mark_tile_dirty(offset);
@@ -212,12 +212,12 @@ TILE_GET_INFO_MEMBER(supduck_state::get_back_tile_info)
-WRITE16_MEMBER(supduck_state::supduck_4000_w)
+void supduck_state::supduck_4000_w(uint16_t data)
{
}
-WRITE16_MEMBER(supduck_state::supduck_4002_w)
+void supduck_state::supduck_4002_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
data &= mem_mask;
@@ -226,7 +226,7 @@ WRITE16_MEMBER(supduck_state::supduck_4002_w)
}
-WRITE16_MEMBER(supduck_state::supduck_scroll_w)
+void supduck_state::supduck_scroll_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
data &= mem_mask;
@@ -283,7 +283,7 @@ void supduck_state::oki_map(address_map &map)
map(0x20000, 0x3ffff).bankr("okibank");
}
-WRITE8_MEMBER(supduck_state::okibank_w)
+void supduck_state::okibank_w(uint8_t data)
{
// bit 0x80 is written on startup?
diff --git a/src/mame/drivers/supercrd.cpp b/src/mame/drivers/supercrd.cpp
index 9acbc2a9a57..db5115fc1e5 100644
--- a/src/mame/drivers/supercrd.cpp
+++ b/src/mame/drivers/supercrd.cpp
@@ -198,8 +198,8 @@ private:
required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode;
- DECLARE_WRITE8_MEMBER(supercrd_videoram_w);
- DECLARE_WRITE8_MEMBER(supercrd_colorram_w);
+ void supercrd_videoram_w(offs_t offset, uint8_t data);
+ void supercrd_colorram_w(offs_t offset, uint8_t data);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
void supercrd_palette(palette_device &palette) const;
uint32_t screen_update_supercrd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -249,13 +249,13 @@ void supercrd_state::supercrd_palette(palette_device &palette) const
}
-WRITE8_MEMBER(supercrd_state::supercrd_videoram_w)
+void supercrd_state::supercrd_videoram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(supercrd_state::supercrd_colorram_w)
+void supercrd_state::supercrd_colorram_w(offs_t offset, uint8_t data)
{
m_colorram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
diff --git a/src/mame/drivers/superdq.cpp b/src/mame/drivers/superdq.cpp
index 744ca2295c4..b7a18d06bd6 100644
--- a/src/mame/drivers/superdq.cpp
+++ b/src/mame/drivers/superdq.cpp
@@ -64,10 +64,10 @@ private:
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
- DECLARE_WRITE8_MEMBER(superdq_videoram_w);
- DECLARE_WRITE8_MEMBER(superdq_io_w);
- DECLARE_READ8_MEMBER(superdq_ld_r);
- DECLARE_WRITE8_MEMBER(superdq_ld_w);
+ void superdq_videoram_w(offs_t offset, uint8_t data);
+ void superdq_io_w(uint8_t data);
+ uint8_t superdq_ld_r();
+ void superdq_ld_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_tile_info);
void superdq_palette(palette_device &palette) const;
uint32_t screen_update_superdq(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -162,13 +162,13 @@ INTERRUPT_GEN_MEMBER(superdq_state::superdq_vblank)
device.execute().set_input_line(0, ASSERT_LINE);
}
-WRITE8_MEMBER(superdq_state::superdq_videoram_w)
+void superdq_state::superdq_videoram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(superdq_state::superdq_io_w)
+void superdq_state::superdq_io_w(uint8_t data)
{
int i;
static const uint8_t black_color_entries[] = {7,15,16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31};
@@ -197,12 +197,12 @@ WRITE8_MEMBER(superdq_state::superdq_io_w)
*/
}
-READ8_MEMBER(superdq_state::superdq_ld_r)
+uint8_t superdq_state::superdq_ld_r()
{
return m_ld_in_latch;
}
-WRITE8_MEMBER(superdq_state::superdq_ld_w)
+void superdq_state::superdq_ld_w(uint8_t data)
{
m_ld_out_latch = data;
}
diff --git a/src/mame/drivers/superga2.cpp b/src/mame/drivers/superga2.cpp
index a60a1af2390..3a68fe46a43 100644
--- a/src/mame/drivers/superga2.cpp
+++ b/src/mame/drivers/superga2.cpp
@@ -64,12 +64,12 @@ public:
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
- DECLARE_READ8_MEMBER(ram_r);
- DECLARE_WRITE8_MEMBER(ram_w);
- DECLARE_READ8_MEMBER(speaker_toggle_r);
- DECLARE_WRITE8_MEMBER(speaker_toggle_w);
- DECLARE_READ8_MEMBER(switches_r);
- DECLARE_READ8_MEMBER(reset_r);
+ uint8_t ram_r(offs_t offset);
+ void ram_w(offs_t offset, uint8_t data);
+ uint8_t speaker_toggle_r();
+ void speaker_toggle_w(uint8_t data);
+ uint8_t switches_r(offs_t offset);
+ uint8_t reset_r(offs_t offset);
void kuzmich(machine_config &config);
void kuzmich_map(address_map &map);
@@ -127,27 +127,27 @@ uint32_t superga2_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
I/O
***************************************************************************/
-READ8_MEMBER(superga2_state::speaker_toggle_r)
+uint8_t superga2_state::speaker_toggle_r()
{
if (!machine().side_effects_disabled())
- speaker_toggle_w(space, offset, 0);
+ speaker_toggle_w(0);
return read_floatingbus();
}
-WRITE8_MEMBER(superga2_state::speaker_toggle_w)
+void superga2_state::speaker_toggle_w(uint8_t data)
{
m_speaker_state ^= 1;
m_speaker->level_w(m_speaker_state);
}
-READ8_MEMBER(superga2_state::switches_r)
+uint8_t superga2_state::switches_r(offs_t offset)
{
if (!machine().side_effects_disabled())
m_softlatch->write_bit((offset & 0x0e) >> 1, offset & 0x01);
return read_floatingbus();
}
-READ8_MEMBER(superga2_state::reset_r)
+uint8_t superga2_state::reset_r(offs_t offset)
{
switch (offset)
{
@@ -166,7 +166,7 @@ uint8_t superga2_state::read_floatingbus()
ADDRESS MAP
***************************************************************************/
-READ8_MEMBER(superga2_state::ram_r)
+uint8_t superga2_state::ram_r(offs_t offset)
{
if (offset < m_ram_size)
{
@@ -176,7 +176,7 @@ READ8_MEMBER(superga2_state::ram_r)
return 0xff;
}
-WRITE8_MEMBER(superga2_state::ram_w)
+void superga2_state::ram_w(offs_t offset, uint8_t data)
{
if (offset < m_ram_size)
{
diff --git a/src/mame/drivers/superslave.cpp b/src/mame/drivers/superslave.cpp
index fe9ff579d21..4a9785c5810 100644
--- a/src/mame/drivers/superslave.cpp
+++ b/src/mame/drivers/superslave.cpp
@@ -67,11 +67,11 @@ private:
void superslave_io(address_map &map);
void superslave_mem(address_map &map);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
- DECLARE_WRITE8_MEMBER( memctrl_w );
- DECLARE_READ8_MEMBER( status_r );
- DECLARE_WRITE8_MEMBER( cmd_w );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
+ void memctrl_w(uint8_t data);
+ uint8_t status_r();
+ void cmd_w(uint8_t data);
required_device<z80_device> m_maincpu;
required_device<com8116_device> m_dbrg;
@@ -96,7 +96,7 @@ private:
// read -
//-------------------------------------------------
-READ8_MEMBER( superslave_state::read )
+uint8_t superslave_state::read(offs_t offset)
{
uint8_t data = 0;
@@ -130,7 +130,7 @@ READ8_MEMBER( superslave_state::read )
// write -
//-------------------------------------------------
-WRITE8_MEMBER( superslave_state::write )
+void superslave_state::write(offs_t offset, uint8_t data)
{
offs_t boundary = 0xc000 | ((m_memctrl & 0xf0) << 6);
@@ -156,7 +156,7 @@ WRITE8_MEMBER( superslave_state::write )
// memctrl_w -
//-------------------------------------------------
-WRITE8_MEMBER( superslave_state::memctrl_w )
+void superslave_state::memctrl_w(uint8_t data)
{
/*
@@ -181,7 +181,7 @@ WRITE8_MEMBER( superslave_state::memctrl_w )
// status_r -
//-------------------------------------------------
-READ8_MEMBER( superslave_state::status_r)
+uint8_t superslave_state::status_r()
{
/*
@@ -214,7 +214,7 @@ READ8_MEMBER( superslave_state::status_r)
// cmd_w -
//-------------------------------------------------
-WRITE8_MEMBER( superslave_state::cmd_w )
+void superslave_state::cmd_w(uint8_t data)
{
/*
diff --git a/src/mame/drivers/supertnk.cpp b/src/mame/drivers/supertnk.cpp
index 92c009d8b86..400c9308617 100644
--- a/src/mame/drivers/supertnk.cpp
+++ b/src/mame/drivers/supertnk.cpp
@@ -132,8 +132,8 @@ private:
DECLARE_WRITE_LINE_MEMBER(bankswitch_1_w);
DECLARE_WRITE_LINE_MEMBER(interrupt_enable_w);
DECLARE_WRITE_LINE_MEMBER(watchdog_reset_w);
- DECLARE_WRITE8_MEMBER(videoram_w);
- DECLARE_READ8_MEMBER(videoram_r);
+ void videoram_w(offs_t offset, uint8_t data);
+ uint8_t videoram_r(offs_t offset);
DECLARE_WRITE_LINE_MEMBER(bitplane_select_0_w);
DECLARE_WRITE_LINE_MEMBER(bitplane_select_1_w);
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -234,7 +234,7 @@ void supertnk_state::video_start()
}
-WRITE8_MEMBER(supertnk_state::videoram_w)
+void supertnk_state::videoram_w(offs_t offset, uint8_t data)
{
if (m_bitplane_select > 2)
{
@@ -249,7 +249,7 @@ WRITE8_MEMBER(supertnk_state::videoram_w)
}
-READ8_MEMBER(supertnk_state::videoram_r)
+uint8_t supertnk_state::videoram_r(offs_t offset)
{
uint8_t ret = 0x00;
diff --git a/src/mame/drivers/superwng.cpp b/src/mame/drivers/superwng.cpp
index 885aa373bcd..78ea32eab9c 100644
--- a/src/mame/drivers/superwng.cpp
+++ b/src/mame/drivers/superwng.cpp
@@ -82,21 +82,21 @@ private:
tilemap_t * m_bg_tilemap;
tilemap_t * m_fg_tilemap;
- DECLARE_WRITE8_MEMBER(superwng_nmi_enable_w);
- DECLARE_WRITE8_MEMBER(superwng_sound_interrupt_w);
- DECLARE_WRITE8_MEMBER(superwng_sound_nmi_clear_w);
- DECLARE_WRITE8_MEMBER(superwng_bg_vram_w);
- DECLARE_WRITE8_MEMBER(superwng_bg_cram_w);
- DECLARE_WRITE8_MEMBER(superwng_fg_vram_w);
- DECLARE_WRITE8_MEMBER(superwng_fg_cram_w);
- DECLARE_WRITE8_MEMBER(superwng_tilebank_w);
- DECLARE_WRITE8_MEMBER(superwng_flip_screen_w);
- DECLARE_WRITE8_MEMBER(superwng_cointcnt1_w);
- DECLARE_WRITE8_MEMBER(superwng_cointcnt2_w);
- DECLARE_WRITE8_MEMBER(superwng_hopper_w);
+ void superwng_nmi_enable_w(uint8_t data);
+ void superwng_sound_interrupt_w(uint8_t data);
+ void superwng_sound_nmi_clear_w(uint8_t data);
+ void superwng_bg_vram_w(offs_t offset, uint8_t data);
+ void superwng_bg_cram_w(offs_t offset, uint8_t data);
+ void superwng_fg_vram_w(offs_t offset, uint8_t data);
+ void superwng_fg_cram_w(offs_t offset, uint8_t data);
+ void superwng_tilebank_w(uint8_t data);
+ void superwng_flip_screen_w(uint8_t data);
+ void superwng_cointcnt1_w(uint8_t data);
+ void superwng_cointcnt2_w(uint8_t data);
+ void superwng_hopper_w(uint8_t data);
uint8_t superwng_sound_byte_r();
- DECLARE_WRITE8_MEMBER(superwng_unk_a187_w);
- DECLARE_WRITE8_MEMBER(superwng_unk_a185_w);
+ void superwng_unk_a187_w(uint8_t data);
+ void superwng_unk_a185_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
TILE_GET_INFO_MEMBER(get_fg_tile_info);
@@ -109,12 +109,12 @@ private:
void superwng_sound_map(address_map &map);
};
-WRITE8_MEMBER(superwng_state::superwng_unk_a187_w)
+void superwng_state::superwng_unk_a187_w(uint8_t data)
{
membank("bank1")->set_entry(data&1);
}
-WRITE8_MEMBER(superwng_state::superwng_unk_a185_w)
+void superwng_state::superwng_unk_a185_w(uint8_t data)
{
// printf("superwng_unk_a185_w %02x\n", data);
}
@@ -237,7 +237,7 @@ void superwng_state::superwng_palette(palette_device &palette) const
}
}
-WRITE8_MEMBER(superwng_state::superwng_nmi_enable_w)
+void superwng_state::superwng_nmi_enable_w(uint8_t data)
{
m_nmi_enable = data;
}
@@ -248,7 +248,7 @@ WRITE_LINE_MEMBER(superwng_state::main_nmi_interrupt)
m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
-WRITE8_MEMBER(superwng_state::superwng_sound_interrupt_w)
+void superwng_state::superwng_sound_interrupt_w(uint8_t data)
{
m_sound_byte = data;
m_audiocpu->set_input_line(0, ASSERT_LINE);
@@ -260,7 +260,7 @@ uint8_t superwng_state::superwng_sound_byte_r()
return m_sound_byte;
}
-WRITE8_MEMBER(superwng_state::superwng_sound_nmi_clear_w)
+void superwng_state::superwng_sound_nmi_clear_w(uint8_t data)
{
m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
@@ -271,55 +271,55 @@ INTERRUPT_GEN_MEMBER(superwng_state::superwng_sound_nmi_assert)
device.execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
}
-WRITE8_MEMBER(superwng_state::superwng_bg_vram_w)
+void superwng_state::superwng_bg_vram_w(offs_t offset, uint8_t data)
{
m_videoram_bg[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(superwng_state::superwng_bg_cram_w)
+void superwng_state::superwng_bg_cram_w(offs_t offset, uint8_t data)
{
m_colorram_bg[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(superwng_state::superwng_fg_vram_w)
+void superwng_state::superwng_fg_vram_w(offs_t offset, uint8_t data)
{
m_videoram_fg[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(superwng_state::superwng_fg_cram_w)
+void superwng_state::superwng_fg_cram_w(offs_t offset, uint8_t data)
{
m_colorram_fg[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset);
}
-WRITE8_MEMBER(superwng_state::superwng_tilebank_w)
+void superwng_state::superwng_tilebank_w(uint8_t data)
{
m_tile_bank = data;
m_bg_tilemap->mark_all_dirty();
m_fg_tilemap->mark_all_dirty();
}
-WRITE8_MEMBER(superwng_state::superwng_flip_screen_w)
+void superwng_state::superwng_flip_screen_w(uint8_t data)
{
flip_screen_set(~data & 0x01);
m_bg_tilemap->mark_all_dirty();
m_fg_tilemap->mark_all_dirty();
}
-WRITE8_MEMBER(superwng_state::superwng_cointcnt1_w)
+void superwng_state::superwng_cointcnt1_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data);
}
-WRITE8_MEMBER(superwng_state::superwng_cointcnt2_w)
+void superwng_state::superwng_cointcnt2_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(1, data);
}
-WRITE8_MEMBER(superwng_state::superwng_hopper_w)
+void superwng_state::superwng_hopper_w(uint8_t data)
{
}
diff --git a/src/mame/drivers/supracan.cpp b/src/mame/drivers/supracan.cpp
index 083b862fb3c..3a75624bb61 100644
--- a/src/mame/drivers/supracan.cpp
+++ b/src/mame/drivers/supracan.cpp
@@ -139,20 +139,20 @@ private:
void supracan_mem(address_map &map);
void supracan_sound_mem(address_map &map);
- DECLARE_READ16_MEMBER(_68k_soundram_r);
- DECLARE_WRITE16_MEMBER(_68k_soundram_w);
- DECLARE_READ8_MEMBER(_6502_soundmem_r);
- DECLARE_WRITE8_MEMBER(_6502_soundmem_w);
+ uint16_t _68k_soundram_r(offs_t offset, uint16_t mem_mask = ~0);
+ void _68k_soundram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint8_t _6502_soundmem_r(offs_t offset);
+ void _6502_soundmem_w(offs_t offset, uint8_t data);
- void dma_w(address_space &space, int offset, uint16_t data, uint16_t mem_mask, int ch);
- DECLARE_WRITE16_MEMBER(dma_channel0_w);
- DECLARE_WRITE16_MEMBER(dma_channel1_w);
+ void dma_w(int offset, uint16_t data, uint16_t mem_mask, int ch);
+ void dma_channel0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void dma_channel1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
- DECLARE_READ16_MEMBER(sound_r);
- DECLARE_WRITE16_MEMBER(sound_w);
- DECLARE_READ16_MEMBER(video_r);
- DECLARE_WRITE16_MEMBER(video_w);
- DECLARE_WRITE16_MEMBER(vram_w);
+ uint16_t sound_r(offs_t offset, uint16_t mem_mask = 0);
+ void sound_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t video_r(offs_t offset, uint16_t mem_mask = 0);
+ void video_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
struct dma_regs_t
{
@@ -1184,7 +1184,7 @@ uint32_t supracan_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
}
-void supracan_state::dma_w(address_space &space, int offset, uint16_t data, uint16_t mem_mask, int ch)
+void supracan_state::dma_w(int offset, uint16_t data, uint16_t mem_mask, int ch)
{
address_space &mem = m_maincpu->space(AS_PROGRAM);
@@ -1253,19 +1253,19 @@ void supracan_state::dma_w(address_space &space, int offset, uint16_t data, uint
}
}
-WRITE16_MEMBER(supracan_state::dma_channel0_w)
+void supracan_state::dma_channel0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- dma_w(space, offset, data, mem_mask, 0);
+ dma_w(offset, data, mem_mask, 0);
}
-WRITE16_MEMBER(supracan_state::dma_channel1_w)
+void supracan_state::dma_channel1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- dma_w(space, offset, data, mem_mask, 1);
+ dma_w(offset, data, mem_mask, 1);
}
#if 0
-WRITE16_MEMBER(supracan_state::supracan_pram_w)
+void supracan_state::supracan_pram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
m_pram[offset] &= ~mem_mask;
m_pram[offset] |= data & mem_mask;
@@ -1280,7 +1280,7 @@ void supracan_state::write_swapped_byte(int offset, uint8_t byte)
m_vram_addr_swapped[swapped_offset] = byte;
}
-WRITE16_MEMBER(supracan_state::vram_w)
+void supracan_state::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_vram[offset]);
@@ -1322,7 +1322,7 @@ void supracan_state::set_sound_irq(uint8_t mask)
}
}
-READ8_MEMBER(supracan_state::_6502_soundmem_r)
+uint8_t supracan_state::_6502_soundmem_r(offs_t offset)
{
uint8_t data = m_soundram[offset];
@@ -1391,7 +1391,7 @@ READ8_MEMBER(supracan_state::_6502_soundmem_r)
return data;
}
-WRITE8_MEMBER(supracan_state::_6502_soundmem_w)
+void supracan_state::_6502_soundmem_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@@ -1491,9 +1491,8 @@ void supracan_state::palette_init(palette_device &palette) const
}
}
-WRITE16_MEMBER(supracan_state::_68k_soundram_w)
+void supracan_state::_68k_soundram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- address_space &mem = m_maincpu->space(AS_PROGRAM);
m_soundram[offset * 2 + 1] = data & 0xff;
m_soundram[offset * 2] = data >> 8;
@@ -1501,19 +1500,18 @@ WRITE16_MEMBER(supracan_state::_68k_soundram_w)
{
if (ACCESSING_BITS_8_15)
{
- _6502_soundmem_w(mem, offset * 2, data >> 8);
+ _6502_soundmem_w(offset * 2, data >> 8);
}
if (ACCESSING_BITS_0_7)
{
- _6502_soundmem_w(mem, offset * 2 + 1, data & 0xff);
+ _6502_soundmem_w(offset * 2 + 1, data & 0xff);
}
}
LOGMASKED(LOG_68K_SOUND, "%s: 68k sound RAM write: %04x & %04x = %04x\n", machine().describe_context(), offset << 1, mem_mask, (uint16_t)data);
}
-READ16_MEMBER(supracan_state::_68k_soundram_r)
+uint16_t supracan_state::_68k_soundram_r(offs_t offset, uint16_t mem_mask)
{
- address_space &mem = m_maincpu->space(AS_PROGRAM);
uint16_t data = m_soundram[offset * 2] << 8;
data |= m_soundram[offset * 2 + 1];
@@ -1522,11 +1520,11 @@ READ16_MEMBER(supracan_state::_68k_soundram_r)
data = 0;
if (ACCESSING_BITS_8_15)
{
- data |= _6502_soundmem_r(mem, offset * 2) << 8;
+ data |= _6502_soundmem_r(offset * 2) << 8;
}
if (ACCESSING_BITS_0_7)
{
- data |= _6502_soundmem_r(mem, offset * 2 + 1);
+ data |= _6502_soundmem_r(offset * 2 + 1);
}
}
//LOGMASKED(LOG_68K_SOUND, "%s: 68k sound RAM read: %04x & %04x (%04x)\n", machine().describe_context(), offset << 1, mem_mask, data);
@@ -1534,7 +1532,7 @@ READ16_MEMBER(supracan_state::_68k_soundram_r)
return data;
}
-READ16_MEMBER(supracan_state::sound_r)
+uint16_t supracan_state::sound_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = 0;
@@ -1548,7 +1546,7 @@ READ16_MEMBER(supracan_state::sound_r)
return data;
}
-WRITE16_MEMBER(supracan_state::sound_w)
+void supracan_state::sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
switch (offset)
{
@@ -1586,7 +1584,7 @@ WRITE16_MEMBER(supracan_state::sound_w)
}
-READ16_MEMBER(supracan_state::video_r)
+uint16_t supracan_state::video_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = m_video_regs[offset];
@@ -1692,7 +1690,7 @@ TIMER_CALLBACK_MEMBER(supracan_state::video_callback)
m_video_timer->adjust(m_screen->time_until_pos((vpos + 1) % 256, 0));
}
-WRITE16_MEMBER(supracan_state::video_w)
+void supracan_state::video_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
address_space &mem = m_maincpu->space(AS_PROGRAM);
diff --git a/src/mame/drivers/suprgolf.cpp b/src/mame/drivers/suprgolf.cpp
index cea6f3ed21b..41cabcb5380 100644
--- a/src/mame/drivers/suprgolf.cpp
+++ b/src/mame/drivers/suprgolf.cpp
@@ -72,13 +72,13 @@ private:
uint8_t m_bg_vreg_test;
uint8_t m_toggle;
- DECLARE_READ8_MEMBER(videoram_r);
- DECLARE_WRITE8_MEMBER(videoram_w);
- DECLARE_READ8_MEMBER(bg_vram_r);
- DECLARE_WRITE8_MEMBER(bg_vram_w);
- DECLARE_WRITE8_MEMBER(pen_w);
- DECLARE_WRITE8_MEMBER(adpcm_data_w);
- DECLARE_WRITE8_MEMBER(rom2_bank_select_w);
+ uint8_t videoram_r(offs_t offset);
+ void videoram_w(offs_t offset, uint8_t data);
+ uint8_t bg_vram_r(offs_t offset);
+ void bg_vram_w(offs_t offset, uint8_t data);
+ void pen_w(uint8_t data);
+ void adpcm_data_w(uint8_t data);
+ void rom2_bank_select_w(uint8_t data);
uint8_t vregs_r();
void vregs_w(uint8_t data);
uint8_t rom_bank_select_r();
@@ -177,7 +177,7 @@ uint32_t suprgolf_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
return 0;
}
-READ8_MEMBER(suprgolf_state::videoram_r)
+uint8_t suprgolf_state::videoram_r(offs_t offset)
{
if (m_palette_switch)
return m_paletteram[offset];
@@ -185,7 +185,7 @@ READ8_MEMBER(suprgolf_state::videoram_r)
return m_videoram[offset];
}
-WRITE8_MEMBER(suprgolf_state::videoram_w)
+void suprgolf_state::videoram_w(offs_t offset, uint8_t data)
{
if(m_palette_switch)
{
@@ -227,12 +227,12 @@ void suprgolf_state::vregs_w(uint8_t data)
// printf("Video regs with data %02x activated\n",data);
}
-READ8_MEMBER(suprgolf_state::bg_vram_r)
+uint8_t suprgolf_state::bg_vram_r(offs_t offset)
{
return m_bg_vram[offset+m_bg_bank*0x2000];
}
-WRITE8_MEMBER(suprgolf_state::bg_vram_w)
+void suprgolf_state::bg_vram_w(offs_t offset, uint8_t data)
{
uint8_t hi_nibble,lo_nibble;
uint8_t hi_dirty_dot,lo_dirty_dot; // helpers
@@ -288,12 +288,12 @@ void suprgolf_state::machine_start()
save_item(NAME(m_toggle));
}
-WRITE8_MEMBER(suprgolf_state::pen_w)
+void suprgolf_state::pen_w(uint8_t data)
{
m_vreg_pen = data;
}
-WRITE8_MEMBER(suprgolf_state::adpcm_data_w)
+void suprgolf_state::adpcm_data_w(uint8_t data)
{
m_msm5205next = data;
}
@@ -315,7 +315,7 @@ void suprgolf_state::rom_bank_select_w(uint8_t data)
flip_screen_set(data & 0x80);
}
-WRITE8_MEMBER(suprgolf_state::rom2_bank_select_w)
+void suprgolf_state::rom2_bank_select_w(uint8_t data)
{
//osd_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,m_maincpu->pcbase());
membank("bank1")->set_entry(data & 0x0f);
diff --git a/src/mame/drivers/svmu.cpp b/src/mame/drivers/svmu.cpp
index c8ad3c61672..08e2ee7dd90 100644
--- a/src/mame/drivers/svmu.cpp
+++ b/src/mame/drivers/svmu.cpp
@@ -48,11 +48,11 @@ private:
LC8670_LCD_UPDATE(svmu_lcd_update);
void svmu_palette(palette_device &palette) const;
void page_w(uint8_t data);
- DECLARE_READ8_MEMBER(prog_r);
- DECLARE_WRITE8_MEMBER(prog_w);
- DECLARE_READ8_MEMBER(p1_r);
- DECLARE_WRITE8_MEMBER(p1_w);
- DECLARE_READ8_MEMBER(p7_r);
+ uint8_t prog_r(offs_t offset);
+ void prog_w(offs_t offset, uint8_t data);
+ uint8_t p1_r();
+ void p1_w(uint8_t data);
+ uint8_t p7_r();
DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_cb);
void svmu_io_mem(address_map &map);
@@ -72,7 +72,7 @@ void svmu_state::page_w(uint8_t data)
m_page = data & 0x03;
}
-READ8_MEMBER(svmu_state::prog_r)
+uint8_t svmu_state::prog_r(offs_t offset)
{
if (m_page == 1)
return m_flash->read(offset);
@@ -82,7 +82,7 @@ READ8_MEMBER(svmu_state::prog_r)
return m_bios[offset];
}
-WRITE8_MEMBER(svmu_state::prog_w)
+void svmu_state::prog_w(offs_t offset, uint8_t data)
{
if (m_page == 1)
m_flash->write(offset, data);
@@ -104,12 +104,12 @@ WRITE8_MEMBER(svmu_state::prog_w)
*/
-READ8_MEMBER(svmu_state::p1_r)
+uint8_t svmu_state::p1_r()
{
return 0;
}
-WRITE8_MEMBER(svmu_state::p1_w)
+void svmu_state::p1_w(uint8_t data)
{
m_speaker->level_w(BIT(data, 7));
}
@@ -124,7 +124,7 @@ WRITE8_MEMBER(svmu_state::p1_w)
---- ---x 5V detection
*/
-READ8_MEMBER(svmu_state::p7_r)
+uint8_t svmu_state::p7_r()
{
return (ioport("BATTERY")->read()<<1);
}
diff --git a/src/mame/drivers/swyft.cpp b/src/mame/drivers/swyft.cpp
index f9e15d2791f..5030904123d 100644
--- a/src/mame/drivers/swyft.cpp
+++ b/src/mame/drivers/swyft.cpp
@@ -351,11 +351,11 @@ private:
uint32_t screen_update_swyft(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
- DECLARE_READ8_MEMBER(bitlatch_r);
+ uint8_t bitlatch_r(offs_t offset);
template<int B> DECLARE_WRITE_LINE_MEMBER(bitlatch_q_w);
- DECLARE_READ8_MEMBER(swyft_via0_r);
- DECLARE_WRITE8_MEMBER(swyft_via0_w);
+ uint8_t swyft_via0_r(offs_t offset);
+ void swyft_via0_w(offs_t offset, uint8_t data);
uint8_t via0_pa_r();
void via0_pa_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(via0_ca2_w);
@@ -364,8 +364,8 @@ private:
DECLARE_WRITE_LINE_MEMBER(via0_cb1_w);
DECLARE_WRITE_LINE_MEMBER(via0_cb2_w);
- DECLARE_READ8_MEMBER(swyft_via1_r);
- DECLARE_WRITE8_MEMBER(swyft_via1_w);
+ uint8_t swyft_via1_r(offs_t offset);
+ void swyft_via1_w(offs_t offset, uint8_t data);
uint8_t via1_pa_r();
void via1_pa_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(via1_ca2_w);
@@ -624,7 +624,7 @@ WRITE_LINE_MEMBER(swyft_state::bitlatch_q_w)
logerror("74HCT259: Q%d %s\n", B, state ? "on" : "off");
}
-READ8_MEMBER(swyft_state::bitlatch_r)
+uint8_t swyft_state::bitlatch_r(offs_t offset)
{
if (!machine().side_effects_disabled())
m_bitlatch->write_bit(offset >> 1, BIT(offset, 0));
@@ -640,7 +640,7 @@ READ8_MEMBER(swyft_state::bitlatch_r)
// ^ ^ ^ ^ <- these four bits address the VIA registers? is this correct?
static const char *const swyft_via_regnames[] = { "0: ORB/IRB", "1: ORA/IRA", "2: DDRB", "3: DDRA", "4: T1C-L", "5: T1C-H", "6: T1L-L", "7: T1L-H", "8: T2C-L", "9: T2C-H", "A: SR", "B: ACR", "C: PCR", "D: IFR", "E: IER", "F: ORA/IRA*" };
-READ8_MEMBER( swyft_state::swyft_via0_r )
+uint8_t swyft_state::swyft_via0_r(offs_t offset)
{
if (offset&0x000C3F) logerror("VIA0: read from invalid offset in 68k space: %06X!\n", offset);
uint8_t data = m_via[0]->read((offset>>6)&0xF);
@@ -648,14 +648,14 @@ READ8_MEMBER( swyft_state::swyft_via0_r )
return data;
}
-WRITE8_MEMBER( swyft_state::swyft_via0_w )
+void swyft_state::swyft_via0_w(offs_t offset, uint8_t data)
{
LOGMASKED(LOG_VIA0, "VIA0 register %s written by cpu with data %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
if (offset&0x000C3F) logerror("VIA0: write to invalid offset in 68k space: %06X, data: %02X!\n", offset, data);
m_via[1]->write((offset>>6)&0xF, data);
}
-READ8_MEMBER( swyft_state::swyft_via1_r )
+uint8_t swyft_state::swyft_via1_r(offs_t offset)
{
if (offset&0x000C3F) logerror("VIA1: read from invalid offset in 68k space: %06X!\n", offset);
uint8_t data = m_via[1]->read((offset>>6)&0xF);
@@ -663,7 +663,7 @@ READ8_MEMBER( swyft_state::swyft_via1_r )
return data;
}
-WRITE8_MEMBER( swyft_state::swyft_via1_w )
+void swyft_state::swyft_via1_w(offs_t offset, uint8_t data)
{
LOGMASKED(LOG_VIA1, "VIA1 register %s written by cpu with data %02x\n", swyft_via_regnames[(offset>>5)&0xF], data);
if (offset&0x000C3F) logerror("VIA1: write to invalid offset in 68k space: %06X, data: %02X!\n", offset, data);
diff --git a/src/mame/drivers/symbolics.cpp b/src/mame/drivers/symbolics.cpp
index 0bfd2db59a1..d8a39c6df7c 100644
--- a/src/mame/drivers/symbolics.cpp
+++ b/src/mame/drivers/symbolics.cpp
@@ -99,10 +99,10 @@ public:
private:
required_device<m68000_base_device> m_maincpu;
- DECLARE_READ16_MEMBER(buserror_r);
- DECLARE_READ16_MEMBER(fep_paddle_id_prom_r);
- //DECLARE_READ16_MEMBER(ram_parity_hack_r);
- //DECLARE_WRITE16_MEMBER(ram_parity_hack_w);
+ uint16_t buserror_r();
+ uint16_t fep_paddle_id_prom_r();
+ //uint16_t ram_parity_hack_r(offs_t offset);
+ //void ram_parity_hack_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
//bool m_parity_error_has_occurred[0x20000];
// overrides
@@ -114,7 +114,7 @@ private:
// virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
};
-READ16_MEMBER(symbolics_state::buserror_r)
+uint16_t symbolics_state::buserror_r()
{
if(!machine().side_effects_disabled())
{
@@ -124,12 +124,12 @@ READ16_MEMBER(symbolics_state::buserror_r)
return 0;
}
-READ16_MEMBER(symbolics_state::fep_paddle_id_prom_r) // bits 8 and 9 do something special if both are set.
+uint16_t symbolics_state::fep_paddle_id_prom_r() // bits 8 and 9 do something special if both are set.
{
return 0x0300;
}
/*
-READ16_MEMBER(symbolics_state::ram_parity_hack_r)
+uint16_t symbolics_state::ram_parity_hack_r(offs_t offset)
{
uint16_t *ram = (uint16_t *)(memregion("fepdram")->base());
//m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);
@@ -144,7 +144,7 @@ READ16_MEMBER(symbolics_state::ram_parity_hack_r)
return *ram;
}
-WRITE16_MEMBER(symbolics_state::ram_parity_hack_w)
+void symbolics_state::ram_parity_hack_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
uint16_t *ram = (uint16_t *)(memregion("fepdram")->base());
m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);