summaryrefslogtreecommitdiffstats
path: root/src/mame/drivers
diff options
context:
space:
mode:
authorGravatarGravatar Fabio Priuli <etabeta78@users.noreply.github.com>2009-11-27 00:30:00 +0000
committerGravatarGravatar Fabio Priuli <etabeta78@users.noreply.github.com>2009-11-27 00:30:00 +0000
commit330341d5e3a1dae698437d3ff71850099b0d3101 (patch)
treefdb1817bada65eca035bf4e4b911dbba9f1aa844 /src/mame/drivers
parentcdd9d7c75755992b00a51392b456b6cfcc2bdb60 (diff)
Added driver data struct and save states to the following drivers: chinagat.c, esd16.c, f-32.c, fcombat.c, finalizr.c.
Also, added driver data struct to ddragon.c, ddragon3.c and fgoal.c fgoal.c suffers of pending timers and hence no save state flag
Diffstat (limited to 'src/mame/drivers')
-rw-r--r--src/mame/drivers/chinagat.c217
-rw-r--r--src/mame/drivers/ddragon.c256
-rw-r--r--src/mame/drivers/ddragon3.c121
-rw-r--r--src/mame/drivers/esd16.c196
-rw-r--r--src/mame/drivers/f-32.c67
-rw-r--r--src/mame/drivers/fcombat.c237
-rw-r--r--src/mame/drivers/fgoal.c117
-rw-r--r--src/mame/drivers/finalizr.c106
8 files changed, 755 insertions, 562 deletions
diff --git a/src/mame/drivers/chinagat.c b/src/mame/drivers/chinagat.c
index f020b9cf03b..dcc8c3f9bce 100644
--- a/src/mame/drivers/chinagat.c
+++ b/src/mame/drivers/chinagat.c
@@ -78,37 +78,11 @@ Dip locations and factory settings verified with China Gate US manual.
#include "sound/2203intf.h"
#include "sound/okim6295.h"
#include "sound/msm5205.h"
+#include "ddragon.h"
#define MAIN_CLOCK XTAL_12MHz
#define PIXEL_CLOCK MAIN_CLOCK / 2
-/**************** Video stuff ******************/
-
-WRITE8_HANDLER( ddragon_bgvideoram_w );
-WRITE8_HANDLER( ddragon_fgvideoram_w );
-
-VIDEO_START( chinagat );
-VIDEO_UPDATE( ddragon );
-
-extern UINT8 technos_video_hw;
-extern UINT16 ddragon_scrollx_hi, ddragon_scrolly_hi;
-extern UINT8 *ddragon_scrollx_lo;
-extern UINT8 *ddragon_scrolly_lo;
-extern UINT8 *ddragon_bgvideoram,*ddragon_fgvideoram;
-
-/**************** Machine stuff ******************/
-static int sprite_irq, sound_irq, adpcm_sound_irq;
-static int saiyugb1_adpcm_addr;
-static int saiyugb1_i8748_P1;
-static int saiyugb1_i8748_P2;
-static int saiyugb1_pcm_shift;
-static int saiyugb1_pcm_nibble;
-static int saiyugb1_mcu_command;
-#if 0
-static int saiyugb1_m5205_clk;
-#endif
-
-
/*
Based on the Solar Warrior schematics, vertical timing counts as follows:
@@ -125,7 +99,7 @@ static int saiyugb1_m5205_clk;
Since MAME's video timing is 0-based, we need to convert this.
*/
/* based on ddragon.c driver */
-INLINE int scanline_to_vcount(int scanline)
+INLINE int scanline_to_vcount( int scanline )
{
int vcount = scanline + 8;
if (vcount < 0x100)
@@ -168,11 +142,13 @@ static TIMER_DEVICE_CALLBACK( chinagat_scanline )
static WRITE8_HANDLER( chinagat_interrupt_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+
switch (offset)
{
case 0: /* 3e00 - SND irq */
- soundlatch_w( space, 0, data );
- cputag_set_input_line(space->machine, "audiocpu", sound_irq, (sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
+ soundlatch_w(space, 0, data);
+ cputag_set_input_line(space->machine, "audiocpu", state->sound_irq, (state->sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
break;
case 1: /* 3e01 - NMI ack */
@@ -188,7 +164,7 @@ static WRITE8_HANDLER( chinagat_interrupt_w )
break;
case 4: /* 3e04 - sub CPU IRQ ack */
- cputag_set_input_line(space->machine, "sub", sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
+ cputag_set_input_line(space->machine, "sub", state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
break;
}
}
@@ -201,39 +177,40 @@ static WRITE8_HANDLER( chinagat_video_ctrl_w )
---- -x-- Flip screen
--x- ---- Enable video ???
****************************/
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
- ddragon_scrolly_hi = ( ( data & 0x02 ) << 7 );
- ddragon_scrollx_hi = ( ( data & 0x01 ) << 8 );
+ state->scrolly_hi = ((data & 0x02) >> 1);
+ state->scrollx_hi = data & 0x01;
flip_screen_set(space->machine, ~data & 0x04);
}
static WRITE8_HANDLER( chinagat_bankswitch_w )
{
- UINT8 *RAM = memory_region(space->machine, "maincpu");
- memory_set_bankptr(space->machine, 1,&RAM[ 0x10000 + (0x4000 * (data & 7)) ] );
+ memory_set_bank(space->machine, 1, data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
}
static WRITE8_HANDLER( chinagat_sub_bankswitch_w )
{
- UINT8 *RAM = memory_region( space->machine, "sub" );
- memory_set_bankptr(space->machine, 4,&RAM[ 0x10000 + (0x4000 * (data & 7)) ] );
+ memory_set_bank(space->machine, 4, data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
}
static READ8_HANDLER( saiyugb1_mcu_command_r )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
#if 0
- if (saiyugb1_mcu_command == 0x78)
+ if (state->mcu_command == 0x78)
{
cputag_suspend(space->machine, "mcu", SUSPEND_REASON_HALT, 1); /* Suspend (speed up) */
}
#endif
- return saiyugb1_mcu_command;
+ return state->mcu_command;
}
static WRITE8_HANDLER( saiyugb1_mcu_command_w )
{
- saiyugb1_mcu_command = data;
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ state->mcu_command = data;
#if 0
if (data != 0x78)
{
@@ -244,55 +221,57 @@ static WRITE8_HANDLER( saiyugb1_mcu_command_w )
static WRITE8_HANDLER( saiyugb1_adpcm_rom_addr_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
/* i8748 Port 1 write */
- saiyugb1_i8748_P1 = data;
+ state->i8748_P1 = data;
}
static WRITE8_DEVICE_HANDLER( saiyugb1_adpcm_control_w )
{
- /* i8748 Port 2 write */
+ ddragon_state *state = (ddragon_state *)device->machine->driver_data;
+ /* i8748 Port 2 write */
UINT8 *saiyugb1_adpcm_rom = memory_region(device->machine, "adpcm");
if (data & 0x80) /* Reset m5205 and disable ADPCM ROM outputs */
{
logerror("ADPCM output disabled\n");
- saiyugb1_pcm_nibble = 0x0f;
- msm5205_reset_w(device,1);
+ state->pcm_nibble = 0x0f;
+ msm5205_reset_w(device, 1);
}
else
{
- if ( (saiyugb1_i8748_P2 & 0xc) != (data & 0xc) )
+ if ((state->i8748_P2 & 0xc) != (data & 0xc))
{
- if ((saiyugb1_i8748_P2 & 0xc) == 0) /* Latch MSB Address */
+ if ((state->i8748_P2 & 0xc) == 0) /* Latch MSB Address */
{
/// logerror("Latching MSB\n");
- saiyugb1_adpcm_addr = (saiyugb1_adpcm_addr & 0x3807f) | (saiyugb1_i8748_P1 << 7);
+ state->adpcm_addr = (state->adpcm_addr & 0x3807f) | (state->i8748_P1 << 7);
}
- if ((saiyugb1_i8748_P2 & 0xc) == 4) /* Latch LSB Address */
+ if ((state->i8748_P2 & 0xc) == 4) /* Latch LSB Address */
{
/// logerror("Latching LSB\n");
- saiyugb1_adpcm_addr = (saiyugb1_adpcm_addr & 0x3ff80) | (saiyugb1_i8748_P1 >> 1);
- saiyugb1_pcm_shift = (saiyugb1_i8748_P1 & 1) * 4;
+ state->adpcm_addr = (state->adpcm_addr & 0x3ff80) | (state->i8748_P1 >> 1);
+ state->pcm_shift = (state->i8748_P1 & 1) * 4;
}
}
- saiyugb1_adpcm_addr = ((saiyugb1_adpcm_addr & 0x07fff) | (data & 0x70 << 11));
+ state->adpcm_addr = ((state->adpcm_addr & 0x07fff) | (data & 0x70 << 11));
- saiyugb1_pcm_nibble = saiyugb1_adpcm_rom[saiyugb1_adpcm_addr & 0x3ffff];
+ state->pcm_nibble = saiyugb1_adpcm_rom[state->adpcm_addr & 0x3ffff];
- saiyugb1_pcm_nibble = (saiyugb1_pcm_nibble >> saiyugb1_pcm_shift) & 0x0f;
+ state->pcm_nibble = (state->pcm_nibble >> state->pcm_shift) & 0x0f;
-/// logerror("Writing %02x to m5205. $ROM=%08x P1=%02x P2=%02x Prev_P2=%02x Nibble=%08x\n",saiyugb1_pcm_nibble,saiyugb1_adpcm_addr,saiyugb1_i8748_P1,data,saiyugb1_i8748_P2,saiyugb1_pcm_shift);
+/// logerror("Writing %02x to m5205. $ROM=%08x P1=%02x P2=%02x Prev_P2=%02x Nibble=%08x\n", state->pcm_nibble, state->adpcm_addr, state->i8748_P1, data, state->i8748_P2, state->pcm_shift);
- if ( ((saiyugb1_i8748_P2 & 0xc) >= 8) && ((data & 0xc) == 4) )
+ if (((state->i8748_P2 & 0xc) >= 8) && ((data & 0xc) == 4))
{
- msm5205_data_w (device, saiyugb1_pcm_nibble);
- logerror("Writing %02x to m5205\n",saiyugb1_pcm_nibble);
+ msm5205_data_w (device, state->pcm_nibble);
+ logerror("Writing %02x to m5205\n", state->pcm_nibble);
}
- logerror("$ROM=%08x P1=%02x P2=%02x Prev_P2=%02x Nibble=%1x PCM_data=%02x\n",saiyugb1_adpcm_addr,saiyugb1_i8748_P1,data,saiyugb1_i8748_P2,saiyugb1_pcm_shift,saiyugb1_pcm_nibble);
+ logerror("$ROM=%08x P1=%02x P2=%02x Prev_P2=%02x Nibble=%1x PCM_data=%02x\n", state->adpcm_addr, state->i8748_P1, data, state->i8748_P2, state->pcm_shift, state->pcm_nibble);
}
- saiyugb1_i8748_P2 = data;
+ state->i8748_P2 = data;
}
static WRITE8_DEVICE_HANDLER( saiyugb1_m5205_clk_w )
@@ -302,45 +281,47 @@ static WRITE8_DEVICE_HANDLER( saiyugb1_m5205_clk_w )
/* to the xtal pins of the MSM5205 */
/* Actually, T0 output clk mode is not supported by the i8048 core */
-
#if 0
- saiyugb1_m5205_clk++;
- if (saiyugb1_m5205_clk == 8)
- }
- msm5205_vclk_w (device, 1); /* ??? */
- saiyugb1_m5205_clk = 0;
+ ddragon_state *state = (ddragon_state *)device->machine->driver_data;
+
+ state->m5205_clk++;
+ if (state->m5205_clk == 8)
+ {
+ msm5205_vclk_w(device, 1); /* ??? */
+ state->m5205_clk = 0;
}
else
- }
- msm5205_vclk_w (device, 0); /* ??? */
- }
+ msm5205_vclk_w(device, 0); /* ??? */
#endif
}
static READ8_HANDLER( saiyugb1_m5205_irq_r )
{
- if (adpcm_sound_irq)
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ if (state->adpcm_sound_irq)
{
- adpcm_sound_irq = 0;
+ state->adpcm_sound_irq = 0;
return 1;
}
return 0;
}
-static void saiyugb1_m5205_irq_w(const device_config *device)
+
+static void saiyugb1_m5205_irq_w( const device_config *device )
{
- adpcm_sound_irq = 1;
+ ddragon_state *state = (ddragon_state *)device->machine->driver_data;
+ state->adpcm_sound_irq = 1;
}
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE(1)
- AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(ddragon_fgvideoram_w) AM_BASE(&ddragon_fgvideoram)
- AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE(&ddragon_bgvideoram)
+ AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(ddragon_fgvideoram_w) AM_BASE_MEMBER(ddragon_state, fgvideoram)
+ AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE_MEMBER(ddragon_state, bgvideoram)
AM_RANGE(0x3000, 0x317f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
AM_RANGE(0x3400, 0x357f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
- AM_RANGE(0x3800, 0x397f) AM_WRITE(SMH_BANK(3)) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
+ AM_RANGE(0x3800, 0x397f) AM_WRITE(SMH_BANK(3)) AM_BASE_MEMBER(ddragon_state, spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x3e00, 0x3e04) AM_WRITE(chinagat_interrupt_w)
- AM_RANGE(0x3e06, 0x3e06) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrolly_lo)
- AM_RANGE(0x3e07, 0x3e07) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrollx_lo)
+ AM_RANGE(0x3e06, 0x3e06) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(ddragon_state, scrolly_lo)
+ AM_RANGE(0x3e07, 0x3e07) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(ddragon_state, scrollx_lo)
AM_RANGE(0x3f00, 0x3f00) AM_WRITE(chinagat_video_ctrl_w)
AM_RANGE(0x3f01, 0x3f01) AM_WRITE(chinagat_bankswitch_w)
AM_RANGE(0x3f00, 0x3f00) AM_READ_PORT("SYSTEM")
@@ -439,8 +420,8 @@ static INPUT_PORTS_START( chinagat )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_5C ) )
/*PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )*/
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )*/
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
@@ -518,7 +499,7 @@ static GFXDECODE_START( chinagat )
GFXDECODE_END
-static void chinagat_irq_handler(const device_config *device, int irq)
+static void chinagat_irq_handler( const device_config *device, int irq )
{
cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE );
}
@@ -546,8 +527,54 @@ static const ym2203_interface ym2203_config =
chinagat_irq_handler
};
+
+static MACHINE_START( chinagat )
+{
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+
+ /* configure banks */
+ memory_configure_bank(machine, 1, 0, 8, memory_region(machine, "maincpu") + 0x10000, 0x4000);
+
+ /* register for save states */
+ state_save_register_global(machine, state->scrollx_hi);
+ state_save_register_global(machine, state->scrolly_hi);
+ state_save_register_global(machine, state->adpcm_sound_irq);
+ state_save_register_global(machine, state->adpcm_addr);
+ state_save_register_global(machine, state->pcm_shift);
+ state_save_register_global(machine, state->pcm_nibble);
+ state_save_register_global(machine, state->i8748_P1);
+ state_save_register_global(machine, state->i8748_P2);
+ state_save_register_global(machine, state->mcu_command);
+#if 0
+ state_save_register_global(machine, state->m5205_clk);
+#endif
+}
+
+
+static MACHINE_RESET( chinagat )
+{
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+
+ state->scrollx_hi = 0;
+ state->scrolly_hi = 0;
+ state->adpcm_sound_irq = 0;
+ state->adpcm_addr = 0;
+ state->pcm_shift = 0;
+ state->pcm_nibble = 0;
+ state->i8748_P1 = 0;
+ state->i8748_P2 = 0;
+ state->mcu_command = 0;
+#if 0
+ state->m5205_clk = 0;
+#endif
+}
+
+
static MACHINE_DRIVER_START( chinagat )
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK / 2) /* 1.5 MHz (12MHz oscillator / 4 internally) */
MDRV_CPU_PROGRAM_MAP(main_map)
@@ -561,6 +588,9 @@ static MACHINE_DRIVER_START( chinagat )
MDRV_QUANTUM_TIME(HZ(6000)) /* heavy interleaving to sync up sprite<->main cpu's */
+ MDRV_MACHINE_START(chinagat)
+ MDRV_MACHINE_RESET(chinagat)
+
/* video hardware */
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
@@ -587,6 +617,9 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( saiyugb1 )
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */
MDRV_CPU_PROGRAM_MAP(main_map)
@@ -630,6 +663,9 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( saiyugb2 )
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */
MDRV_CPU_PROGRAM_MAP(main_map)
@@ -884,14 +920,21 @@ ROM_END
static DRIVER_INIT( chinagat )
{
- technos_video_hw = 1;
- sprite_irq = M6809_IRQ_LINE;
- sound_irq = INPUT_LINE_NMI;
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+ UINT8 *MAIN = memory_region(machine, "maincpu");
+ UINT8 *SUB = memory_region(machine, "sub");
+
+ state->technos_video_hw = 1;
+ state->sprite_irq = M6809_IRQ_LINE;
+ state->sound_irq = INPUT_LINE_NMI;
+
+ memory_configure_bank(machine, 1, 0, 6, &MAIN[0x10000], 0x4000);
+ memory_configure_bank(machine, 4, 0, 6, &SUB[0x10000], 0x4000);
}
/* ( YEAR NAME PARENT MACHINE INPUT INIT MONITOR COMPANY FULLNAME FLAGS ) */
-GAME( 1988, chinagat, 0, chinagat, chinagat, chinagat, ROT0, "[Technos Japan] (Taito Romstar license)", "China Gate (US)", 0 )
-GAME( 1988, saiyugou, chinagat, chinagat, chinagat, chinagat, ROT0, "Technos Japan", "Sai Yu Gou Ma Roku (Japan)", 0 )
-GAME( 1988, saiyugoub1, chinagat, saiyugb1, chinagat, chinagat, ROT0, "bootleg", "Sai Yu Gou Ma Roku (Japan bootleg 1)", GAME_IMPERFECT_SOUND )
-GAME( 1988, saiyugoub2, chinagat, saiyugb2, chinagat, chinagat, ROT0, "bootleg", "Sai Yu Gou Ma Roku (Japan bootleg 2)", 0 )
+GAME( 1988, chinagat, 0, chinagat, chinagat, chinagat, ROT0, "[Technos Japan] (Taito Romstar license)", "China Gate (US)", GAME_SUPPORTS_SAVE )
+GAME( 1988, saiyugou, chinagat, chinagat, chinagat, chinagat, ROT0, "Technos Japan", "Sai Yu Gou Ma Roku (Japan)", GAME_SUPPORTS_SAVE )
+GAME( 1988, saiyugoub1, chinagat, saiyugb1, chinagat, chinagat, ROT0, "bootleg", "Sai Yu Gou Ma Roku (Japan bootleg 1)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
+GAME( 1988, saiyugoub2, chinagat, saiyugb2, chinagat, chinagat, ROT0, "bootleg", "Sai Yu Gou Ma Roku (Japan bootleg 2)", GAME_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/ddragon.c b/src/mame/drivers/ddragon.c
index 420c5a467b0..e55b5959a4d 100644
--- a/src/mame/drivers/ddragon.c
+++ b/src/mame/drivers/ddragon.c
@@ -77,6 +77,7 @@ Dip locations verified with manual for ddragon & ddragon2
#include "sound/2151intf.h"
#include "sound/okim6295.h"
#include "sound/msm5205.h"
+#include "ddragon.h"
#define MAIN_CLOCK XTAL_12MHz
@@ -85,31 +86,6 @@ Dip locations verified with manual for ddragon & ddragon2
#define PIXEL_CLOCK MAIN_CLOCK / 2
-/* from video */
-extern UINT8 *ddragon_bgvideoram,*ddragon_fgvideoram;
-extern UINT16 ddragon_scrollx_hi, ddragon_scrolly_hi;
-extern UINT8 *ddragon_scrollx_lo;
-extern UINT8 *ddragon_scrolly_lo;
-VIDEO_START( ddragon );
-VIDEO_UPDATE( ddragon );
-WRITE8_HANDLER( ddragon_bgvideoram_w );
-WRITE8_HANDLER( ddragon_fgvideoram_w );
-extern UINT8 *ddragon_spriteram;
-extern UINT8 technos_video_hw;
-/* end of extern code & data */
-
-/* private globals */
-static UINT8 dd_sub_cpu_busy;
-static UINT8 sprite_irq, sound_irq, ym_irq;
-static const device_config *snd_cpu;
-static UINT32 adpcm_pos[2], adpcm_end[2];
-static UINT8 adpcm_idle[2];
-static int adpcm_data[2];
-static UINT8 *darktowr_mcu_ports;
-static UINT8 *rambase;
-/* end of private globals */
-
-
/*************************************
*
* Video timing
@@ -131,7 +107,7 @@ static UINT8 *rambase;
Since MAME's video timing is 0-based, we need to convert this.
*/
-INLINE int scanline_to_vcount(int scanline)
+INLINE int scanline_to_vcount( int scanline )
{
int vcount = scanline + 8;
if (vcount < 0x100)
@@ -170,27 +146,38 @@ static TIMER_DEVICE_CALLBACK( ddragon_scanline )
static MACHINE_START( ddragon )
{
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+
/* configure banks */
memory_configure_bank(machine, 1, 0, 8, memory_region(machine, "maincpu") + 0x10000, 0x4000);
- /* determine the sound CPU index */
- snd_cpu = cputag_get_cpu(machine, "soundcpu");
+ state->sub_cpu = devtag_get_device(machine, "sub");
+ state->snd_cpu = devtag_get_device(machine, "soundcpu");
+ state->adpcm_1 = devtag_get_device(machine, "adpcm1");
+ state->adpcm_2 = devtag_get_device(machine, "adpcm2");
/* register for save states */
- state_save_register_global(machine, dd_sub_cpu_busy);
- state_save_register_global_array(machine, adpcm_pos);
- state_save_register_global_array(machine, adpcm_end);
- state_save_register_global_array(machine, adpcm_idle);
+ state_save_register_global(machine, state->dd_sub_cpu_busy);
+ state_save_register_global(machine, state->scrollx_hi);
+ state_save_register_global(machine, state->scrolly_hi);
+ state_save_register_global_array(machine, state->adpcm_pos);
+ state_save_register_global_array(machine, state->adpcm_end);
+ state_save_register_global_array(machine, state->adpcm_idle);
+ state_save_register_global_array(machine, state->adpcm_data);
}
static MACHINE_RESET( ddragon )
{
- dd_sub_cpu_busy = 1;
- adpcm_pos[0] = adpcm_pos[1] = 0;
- adpcm_end[0] = adpcm_end[1] = 0;
- adpcm_idle[0] = adpcm_idle[1] = 1;
- adpcm_data[0] = adpcm_data[1] = -1;
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+
+ state->dd_sub_cpu_busy = 1;
+ state->adpcm_pos[0] = state->adpcm_pos[1] = 0;
+ state->adpcm_end[0] = state->adpcm_end[1] = 0;
+ state->adpcm_idle[0] = state->adpcm_idle[1] = 1;
+ state->adpcm_data[0] = state->adpcm_data[1] = -1;
+ state->scrollx_hi = 0;
+ state->scrolly_hi = 0;
}
@@ -203,16 +190,17 @@ static MACHINE_RESET( ddragon )
static WRITE8_HANDLER( ddragon_bankswitch_w )
{
- ddragon_scrollx_hi = ((data & 0x01) << 8);
- ddragon_scrolly_hi = ((data & 0x02) << 7);
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ state->scrollx_hi = (data & 0x01);
+ state->scrolly_hi = ((data & 0x02) >> 1);
flip_screen_set(space->machine, ~data & 0x04);
/* bit 3 unknown */
if (data & 0x10)
- dd_sub_cpu_busy = 0;
- else if (dd_sub_cpu_busy == 0)
- cputag_set_input_line(space->machine, "sub", sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
+ state->dd_sub_cpu_busy = 0;
+ else if (state->dd_sub_cpu_busy == 0)
+ cputag_set_input_line(space->machine, "sub", state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
memory_set_bank(space->machine, 1, (data & 0xe0) >> 5);
}
@@ -220,8 +208,9 @@ static WRITE8_HANDLER( ddragon_bankswitch_w )
static WRITE8_HANDLER( toffy_bankswitch_w )
{
- ddragon_scrollx_hi = ((data & 0x01) << 8);
- ddragon_scrolly_hi = ((data & 0x02) << 7);
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ state->scrollx_hi = (data & 0x01);
+ state->scrolly_hi = ((data & 0x02) >> 1);
// flip_screen_set(space->machine, ~data & 0x04);
@@ -234,6 +223,7 @@ static WRITE8_HANDLER( toffy_bankswitch_w )
static READ8_HANDLER( darktowr_mcu_bank_r )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
// logerror("BankRead %05x %08x\n",cpu_get_pc(space->cpu),offset);
/* Horrible hack - the alternate TStrike set is mismatched against the MCU,
@@ -249,11 +239,11 @@ static READ8_HANDLER( darktowr_mcu_bank_r )
return 0x63;
/* Just return whatever the code is expecting */
- return rambase[0xbe1];
+ return state->rambase[0xbe1];
}
if (offset == 0x1401 || offset == 1)
- return darktowr_mcu_ports[0];
+ return state->darktowr_mcu_ports[0];
logerror("Unmapped mcu bank read %04x\n",offset);
return 0xff;
@@ -262,11 +252,12 @@ static READ8_HANDLER( darktowr_mcu_bank_r )
static WRITE8_HANDLER( darktowr_mcu_bank_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
logerror("BankWrite %05x %08x %08x\n", cpu_get_pc(space->cpu), offset, data);
if (offset == 0x1400 || offset == 0)
{
- darktowr_mcu_ports[1] = BITSWAP8(data,0,1,2,3,4,5,6,7);
+ state->darktowr_mcu_ports[1] = BITSWAP8(data,0,1,2,3,4,5,6,7);
logerror("MCU PORT 1 -> %04x (from %04x)\n", BITSWAP8(data,0,1,2,3,4,5,6,7), data);
}
}
@@ -274,20 +265,21 @@ static WRITE8_HANDLER( darktowr_mcu_bank_w )
static WRITE8_HANDLER( darktowr_bankswitch_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
int oldbank = memory_get_bank(space->machine, 1);
int newbank = (data & 0xe0) >> 5;
- ddragon_scrollx_hi = ((data & 0x01) << 8);
- ddragon_scrolly_hi = ((data & 0x02) << 7);
+ state->scrollx_hi = (data & 0x01);
+ state->scrolly_hi = ((data & 0x02) >> 1);
// flip_screen_set(space->machine, ~data & 0x04);
/* bit 3 unknown */
if (data & 0x10)
- dd_sub_cpu_busy = 0;
- else if (dd_sub_cpu_busy == 0)
- cputag_set_input_line(space->machine, "sub", sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
+ state->dd_sub_cpu_busy = 0;
+ else if (state->dd_sub_cpu_busy == 0)
+ cputag_set_input_line(space->machine, "sub", state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
memory_set_bank(space->machine, 1, newbank);
if (newbank == 4 && oldbank != 4)
@@ -306,6 +298,7 @@ static WRITE8_HANDLER( darktowr_bankswitch_w )
static WRITE8_HANDLER( ddragon_interrupt_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
switch (offset)
{
case 0: /* 380b - NMI ack */
@@ -322,7 +315,7 @@ static WRITE8_HANDLER( ddragon_interrupt_w )
case 3: /* 380e - SND irq */
soundlatch_w(space, 0, data);
- cpu_set_input_line(snd_cpu, sound_irq, (sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
+ cpu_set_input_line(state->snd_cpu, state->sound_irq, (state->sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
break;
case 4: /* 380f - ? */
@@ -334,7 +327,8 @@ static WRITE8_HANDLER( ddragon_interrupt_w )
static WRITE8_HANDLER( ddragon2_sub_irq_ack_w )
{
- cputag_set_input_line(space->machine, "sub", sprite_irq, CLEAR_LINE );
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ cputag_set_input_line(space->machine, "sub", state->sprite_irq, CLEAR_LINE );
}
@@ -344,9 +338,10 @@ static WRITE8_HANDLER( ddragon2_sub_irq_w )
}
-static void irq_handler(const device_config *device, int irq)
+static void irq_handler( const device_config *device, int irq )
{
- cpu_set_input_line(snd_cpu, ym_irq , irq ? ASSERT_LINE : CLEAR_LINE );
+ ddragon_state *state = (ddragon_state *)device->machine->driver_data;
+ cpu_set_input_line(state->snd_cpu, state->ym_irq , irq ? ASSERT_LINE : CLEAR_LINE );
}
@@ -359,14 +354,16 @@ static void irq_handler(const device_config *device, int irq)
static CUSTOM_INPUT( sub_cpu_busy )
{
- return dd_sub_cpu_busy;
+ ddragon_state *state = (ddragon_state *)field->port->machine->driver_data;
+ return state->dd_sub_cpu_busy;
}
static WRITE8_HANDLER( darktowr_mcu_w )
{
- logerror("McuWrite %05x %08x %08x\n",cpu_get_pc(space->cpu),offset,data);
- darktowr_mcu_ports[offset]=data;
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ logerror("McuWrite %05x %08x %08x\n",cpu_get_pc(space->cpu), offset, data);
+ state->darktowr_mcu_ports[offset] = data;
}
@@ -379,6 +376,8 @@ static READ8_HANDLER( ddragon_hd63701_internal_registers_r )
static WRITE8_HANDLER( ddragon_hd63701_internal_registers_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+
/* I don't know why port 0x17 is used.. Doesn't seem to be a standard MCU port */
if (offset == 0x17)
{
@@ -388,7 +387,7 @@ static WRITE8_HANDLER( ddragon_hd63701_internal_registers_w )
if (data & 3)
{
cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
- cputag_set_input_line(space->machine, "sub", sprite_irq, CLEAR_LINE);
+ cputag_set_input_line(space->machine, "sub", state->sprite_irq, CLEAR_LINE);
}
}
}
@@ -403,20 +402,24 @@ static WRITE8_HANDLER( ddragon_hd63701_internal_registers_w )
static READ8_HANDLER( ddragon_spriteram_r )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+
/* Double Dragon crash fix - see notes above */
- if (offset == 0x49 && cpu_get_pc(space->cpu) == 0x6261 && ddragon_spriteram[offset] == 0x1f)
+ if (offset == 0x49 && cpu_get_pc(space->cpu) == 0x6261 && state->spriteram[offset] == 0x1f)
return 0x1;
- return ddragon_spriteram[offset];
+ return state->spriteram[offset];
}
static WRITE8_HANDLER( ddragon_spriteram_w )
{
- if (space->cpu == cputag_get_cpu(space->machine, "sub") && offset == 0)
- dd_sub_cpu_busy = 1;
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
- ddragon_spriteram[offset] = data;
+ if (space->cpu == state->sub_cpu && offset == 0)
+ state->dd_sub_cpu_busy = 1;
+
+ state->spriteram[offset] = data;
}
@@ -429,58 +432,62 @@ static WRITE8_HANDLER( ddragon_spriteram_w )
static WRITE8_HANDLER( dd_adpcm_w )
{
- const device_config *adpcm = devtag_get_device(space->machine, (offset & 1) ? "adpcm2" : "adpcm1");
- int chip = (strcmp(adpcm->tag, "adpcm1") == 0) ? 0 : 1;
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ const device_config *adpcm = (offset & 1) ? state->adpcm_2 : state->adpcm_1;
+ int chip = (adpcm == state->adpcm_1) ? 0 : 1;
- switch (offset/2)
+ switch (offset / 2)
{
case 3:
- adpcm_idle[chip] = 1;
- msm5205_reset_w(adpcm,1);
+ state->adpcm_idle[chip] = 1;
+ msm5205_reset_w(adpcm, 1);
break;
case 2:
- adpcm_pos[chip] = (data & 0x7f) * 0x200;
+ state->adpcm_pos[chip] = (data & 0x7f) * 0x200;
break;
case 1:
- adpcm_end[chip] = (data & 0x7f) * 0x200;
+ state->adpcm_end[chip] = (data & 0x7f) * 0x200;
break;
case 0:
- adpcm_idle[chip] = 0;
- msm5205_reset_w(adpcm,0);
+ state->adpcm_idle[chip] = 0;
+ msm5205_reset_w(adpcm, 0);
break;
}
}
-static void dd_adpcm_int(const device_config *device)
+static void dd_adpcm_int( const device_config *device )
{
- int chip = (strcmp(device->tag, "adpcm1") == 0) ? 0 : 1;
- if (adpcm_pos[chip] >= adpcm_end[chip] || adpcm_pos[chip] >= 0x10000)
+ ddragon_state *state = (ddragon_state *)device->machine->driver_data;
+ int chip = (device == state->adpcm_1) ? 0 : 1;
+
+ if (state->adpcm_pos[chip] >= state->adpcm_end[chip] || state->adpcm_pos[chip] >= 0x10000)
{
- adpcm_idle[chip] = 1;
- msm5205_reset_w(device,1);
+ state->adpcm_idle[chip] = 1;
+ msm5205_reset_w(device, 1);
}
- else if (adpcm_data[chip] != -1)
+ else if (state->adpcm_data[chip] != -1)
{
- msm5205_data_w(device, adpcm_data[chip] & 0x0f);
- adpcm_data[chip] = -1;
+ msm5205_data_w(device, state->adpcm_data[chip] & 0x0f);
+ state->adpcm_data[chip] = -1;
}
else
{
UINT8 *ROM = memory_region(device->machine, "adpcm") + 0x10000 * chip;
- adpcm_data[chip] = ROM[adpcm_pos[chip]++];
- msm5205_data_w(device,adpcm_data[chip] >> 4);
+ state->adpcm_data[chip] = ROM[state->adpcm_pos[chip]++];
+ msm5205_data_w(device, state->adpcm_data[chip] >> 4);
}
}
static READ8_HANDLER( dd_adpcm_status_r )
{
- return adpcm_idle[0] + (adpcm_idle[1] << 1);
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
+ return state->adpcm_idle[0] + (state->adpcm_idle[1] << 1);
}
@@ -492,21 +499,21 @@ static READ8_HANDLER( dd_adpcm_status_r )
*************************************/
static ADDRESS_MAP_START( ddragon_map, ADDRESS_SPACE_PROGRAM, 8 )
- AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE(&rambase)
+ AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE_MEMBER(ddragon_state, rambase)
AM_RANGE(0x1000, 0x11ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
AM_RANGE(0x1200, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0x1400, 0x17ff) AM_RAM
- AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(ddragon_fgvideoram_w) AM_BASE(&ddragon_fgvideoram)
- AM_RANGE(0x2000, 0x2fff) AM_READWRITE(ddragon_spriteram_r, ddragon_spriteram_w) AM_BASE(&ddragon_spriteram)
- AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE(&ddragon_bgvideoram)
+ AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(ddragon_fgvideoram_w) AM_BASE_MEMBER(ddragon_state, fgvideoram)
+ AM_RANGE(0x2000, 0x2fff) AM_READWRITE(ddragon_spriteram_r, ddragon_spriteram_w) AM_BASE_MEMBER(ddragon_state, spriteram)
+ AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE_MEMBER(ddragon_state, bgvideoram)
AM_RANGE(0x3800, 0x3800) AM_READ_PORT("P1")
AM_RANGE(0x3801, 0x3801) AM_READ_PORT("P2")
AM_RANGE(0x3802, 0x3802) AM_READ_PORT("EXTRA")
AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW0")
AM_RANGE(0x3804, 0x3804) AM_READ_PORT("DSW1")
AM_RANGE(0x3808, 0x3808) AM_WRITE(ddragon_bankswitch_w)
- AM_RANGE(0x3809, 0x3809) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrollx_lo)
- AM_RANGE(0x380a, 0x380a) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrolly_lo)
+ AM_RANGE(0x3809, 0x3809) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(ddragon_state, scrollx_lo)
+ AM_RANGE(0x380a, 0x380a) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(ddragon_state, scrolly_lo)
AM_RANGE(0x380b, 0x380f) AM_WRITE(ddragon_interrupt_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
AM_RANGE(0x8000, 0xffff) AM_ROM
@@ -515,17 +522,17 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dd2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x17ff) AM_RAM
- AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(ddragon_fgvideoram_w) AM_BASE(&ddragon_fgvideoram)
- AM_RANGE(0x2000, 0x2fff) AM_READWRITE(ddragon_spriteram_r, ddragon_spriteram_w) AM_BASE(&ddragon_spriteram)
- AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE(&ddragon_bgvideoram)
+ AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(ddragon_fgvideoram_w) AM_BASE_MEMBER(ddragon_state, fgvideoram)
+ AM_RANGE(0x2000, 0x2fff) AM_READWRITE(ddragon_spriteram_r, ddragon_spriteram_w) AM_BASE_MEMBER(ddragon_state, spriteram)
+ AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE_MEMBER(ddragon_state, bgvideoram)
AM_RANGE(0x3800, 0x3800) AM_READ_PORT("P1")
AM_RANGE(0x3801, 0x3801) AM_READ_PORT("P2")
AM_RANGE(0x3802, 0x3802) AM_READ_PORT("EXTRA")
AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW0")
AM_RANGE(0x3804, 0x3804) AM_READ_PORT("DSW1")
AM_RANGE(0x3808, 0x3808) AM_WRITE(ddragon_bankswitch_w)
- AM_RANGE(0x3809, 0x3809) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrollx_lo)
- AM_RANGE(0x380a, 0x380a) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrolly_lo)
+ AM_RANGE(0x3809, 0x3809) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(ddragon_state, scrollx_lo)
+ AM_RANGE(0x380a, 0x380a) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(ddragon_state, scrolly_lo)
AM_RANGE(0x380b, 0x380f) AM_WRITE(ddragon_interrupt_w)
AM_RANGE(0x3c00, 0x3dff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
AM_RANGE(0x3e00, 0x3fff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
@@ -566,8 +573,9 @@ ADDRESS_MAP_END
/* might not be 100% accurate, check bits written */
static WRITE8_HANDLER( ddragnba_port_w )
{
+ ddragon_state *state = (ddragon_state *)space->machine->driver_data;
cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
- cputag_set_input_line(space->machine, "sub", sprite_irq, CLEAR_LINE );
+ cputag_set_input_line(space->machine, "sub", state->sprite_irq, CLEAR_LINE );
}
static ADDRESS_MAP_START( ddragnba_sub_portmap, ADDRESS_SPACE_IO, 8 )
@@ -610,7 +618,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
- AM_RANGE(0x0000, 0x0007) AM_RAM_WRITE(darktowr_mcu_w) AM_BASE(&darktowr_mcu_ports)
+ AM_RANGE(0x0000, 0x0007) AM_RAM_WRITE(darktowr_mcu_w) AM_BASE_MEMBER(ddragon_state, darktowr_mcu_ports)
AM_RANGE(0x0008, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x07ff) AM_ROM
ADDRESS_MAP_END
@@ -965,6 +973,9 @@ static const msm5205_interface msm5205_config =
static MACHINE_DRIVER_START( ddragon )
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK) /* 12 MHz / 4 internally */
MDRV_CPU_PROGRAM_MAP(ddragon_map)
@@ -1031,6 +1042,9 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( ddgn6809 )
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */
MDRV_CPU_PROGRAM_MAP(ddragon_map)
@@ -1078,6 +1092,9 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( ddragon2 )
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK) /* 12 MHz / 4 internally */
MDRV_CPU_PROGRAM_MAP(dd2_map)
@@ -1943,40 +1960,44 @@ ROM_END
static DRIVER_INIT( ddragon )
{
- sprite_irq = INPUT_LINE_NMI;
- sound_irq = M6809_IRQ_LINE;
- ym_irq = M6809_FIRQ_LINE;
- technos_video_hw = 0;
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+ state->sprite_irq = INPUT_LINE_NMI;
+ state->sound_irq = M6809_IRQ_LINE;
+ state->ym_irq = M6809_FIRQ_LINE;
+ state->technos_video_hw = 0;
}
static DRIVER_INIT( ddragon2 )
{
- sprite_irq = INPUT_LINE_NMI;
- sound_irq = INPUT_LINE_NMI;
- ym_irq = 0;
- technos_video_hw = 2;
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+ state->sprite_irq = INPUT_LINE_NMI;
+ state->sound_irq = INPUT_LINE_NMI;
+ state->ym_irq = 0;
+ state->technos_video_hw = 2;
}
static DRIVER_INIT( darktowr )
{
- sprite_irq = INPUT_LINE_NMI;
- sound_irq = M6809_IRQ_LINE;
- ym_irq = M6809_FIRQ_LINE;
- technos_video_hw = 0;
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
+ state->sprite_irq = INPUT_LINE_NMI;
+ state->sound_irq = M6809_IRQ_LINE;
+ state->ym_irq = M6809_FIRQ_LINE;
+ state->technos_video_hw = 0;
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3808, 0x3808, 0, 0, darktowr_bankswitch_w);
}
static DRIVER_INIT( toffy )
{
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
int i, length;
UINT8 *rom;
- sound_irq = M6809_IRQ_LINE;
- ym_irq = M6809_FIRQ_LINE;
- technos_video_hw = 0;
+ state->sound_irq = M6809_IRQ_LINE;
+ state->ym_irq = M6809_FIRQ_LINE;
+ state->technos_video_hw = 0;
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3808, 0x3808, 0, 0, toffy_bankswitch_w);
/* the program rom has a simple bitswap encryption */
@@ -2011,12 +2032,13 @@ static DRIVER_INIT( toffy )
static DRIVER_INIT( ddgn6809 )
{
+ ddragon_state *state = (ddragon_state *)machine->driver_data;
/* Descramble GFX here */
- sprite_irq = INPUT_LINE_NMI;
- sound_irq = M6809_IRQ_LINE;
- ym_irq = M6809_FIRQ_LINE;
- technos_video_hw = 0;
+ state->sprite_irq = INPUT_LINE_NMI;
+ state->sound_irq = M6809_IRQ_LINE;
+ state->ym_irq = M6809_FIRQ_LINE;
+ state->technos_video_hw = 0;
}
/*************************************
diff --git a/src/mame/drivers/ddragon3.c b/src/mame/drivers/ddragon3.c
index 7b133c5c926..2af7e4bd922 100644
--- a/src/mame/drivers/ddragon3.c
+++ b/src/mame/drivers/ddragon3.c
@@ -143,21 +143,10 @@ ROMs (All ROMs are 27C010 EPROM. - means not populated)
#include "cpu/m68000/m68000.h"
#include "sound/2151intf.h"
#include "sound/okim6295.h"
+#include "ddragon3.h"
#define PIXEL_CLOCK (XTAL_28MHz / 4)
-extern UINT16 *ddragon3_bg_videoram16;
-extern UINT16 *ddragon3_fg_videoram16;
-extern UINT16 ddragon3_vreg;
-
-extern WRITE16_HANDLER( ddragon3_bg_videoram16_w );
-extern WRITE16_HANDLER( ddragon3_fg_videoram16_w );
-extern WRITE16_HANDLER( ddragon3_scroll16_w );
-extern READ16_HANDLER( ddragon3_scroll16_r );
-
-extern VIDEO_START( ddragon3 );
-extern VIDEO_UPDATE( ddragon3 );
-extern VIDEO_UPDATE( ctribe );
/*************************************
*
@@ -170,44 +159,44 @@ static WRITE8_DEVICE_HANDLER( oki_bankswitch_w )
okim6295_set_bank_base(device, (data & 1) * 0x40000);
}
-static WRITE16_HANDLER( ddragon3_io16_w )
+static WRITE16_HANDLER( ddragon3_io_w )
{
- static UINT16 reg[8];
+ ddragon3_state *state = (ddragon3_state *)space->machine->driver_data;
- COMBINE_DATA(&reg[offset]);
+ COMBINE_DATA(&state->io_reg[offset]);
switch (offset)
{
case 0:
- ddragon3_vreg = reg[0];
- break;
+ state->vreg = state->io_reg[0];
+ break;
case 1: /* soundlatch_w */
- soundlatch_w(space, 1, reg[1] & 0xff);
- cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
+ soundlatch_w(space, 1, state->io_reg[1] & 0xff);
+ cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
break;
case 2:
- /* this gets written to on startup and at the end of IRQ6
- ** possibly trigger IRQ on sound CPU
- */
- cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
- break;
+ /* this gets written to on startup and at the end of IRQ6
+ ** possibly trigger IRQ on sound CPU
+ */
+ cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
+ break;
case 3:
- /* this gets written to on startup,
- ** and at the end of IRQ5 (input port read) */
- cputag_set_input_line(space->machine, "maincpu", 5, CLEAR_LINE);
- break;
+ /* this gets written to on startup,
+ ** and at the end of IRQ5 (input port read) */
+ cputag_set_input_line(space->machine, "maincpu", 5, CLEAR_LINE);
+ break;
case 4:
- /* this gets written to at the end of IRQ6 only */
- cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
- break;
+ /* this gets written to at the end of IRQ6 only */
+ cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
+ break;
default:
- logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, cpu_get_pc(space->cpu) );
- break;
+ logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, cpu_get_pc(space->cpu) );
+ break;
}
}
@@ -219,27 +208,27 @@ static WRITE16_HANDLER( ddragon3_io16_w )
static ADDRESS_MAP_START( ddragon3_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16) /* Foreground (32x32 Tiles - 4 by per tile) */
- AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16) /* Background (32x32 Tiles - 2 by per tile) */
- AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
+ AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram_w) AM_BASE_MEMBER(ddragon3_state, fg_videoram) /* Foreground (32x32 Tiles - 4 by per tile) */
+ AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram_w) AM_BASE_MEMBER(ddragon3_state, bg_videoram) /* Background (32x32 Tiles - 2 by per tile) */
+ AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll_w)
AM_RANGE(0x100000, 0x100001) AM_READ_PORT("P1_P2")
AM_RANGE(0x100002, 0x100003) AM_READ_PORT("SYSTEM")
AM_RANGE(0x100004, 0x100005) AM_READ_PORT("DSW")
AM_RANGE(0x100006, 0x100007) AM_READ_PORT("P3")
- AM_RANGE(0x100000, 0x10000f) AM_WRITE(ddragon3_io16_w)
+ AM_RANGE(0x100000, 0x10000f) AM_WRITE(ddragon3_io_w)
AM_RANGE(0x140000, 0x1405ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16) /* Palette RAM */
- AM_RANGE(0x180000, 0x180fff) AM_RAM AM_BASE(&spriteram16)
+ AM_RANGE(0x180000, 0x180fff) AM_RAM AM_BASE_MEMBER(ddragon3_state, spriteram)
AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM /* working RAM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( dd3b_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16) /* Foreground (32x32 Tiles - 4 by per tile) */
- AM_RANGE(0x081000, 0x081fff) AM_RAM AM_BASE(&spriteram16)
- AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16) /* Background (32x32 Tiles - 2 by per tile) */
- AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
+ AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram_w) AM_BASE_MEMBER(ddragon3_state, fg_videoram) /* Foreground (32x32 Tiles - 4 by per tile) */
+ AM_RANGE(0x081000, 0x081fff) AM_RAM AM_BASE_MEMBER(ddragon3_state, spriteram)
+ AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram_w) AM_BASE_MEMBER(ddragon3_state, bg_videoram) /* Background (32x32 Tiles - 2 by per tile) */
+ AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll_w)
AM_RANGE(0x100000, 0x1005ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16) /* Palette RAM */
- AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io16_w)
+ AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io_w)
AM_RANGE(0x180000, 0x180001) AM_READ_PORT("IN0")
AM_RANGE(0x180002, 0x180003) AM_READ_PORT("IN1")
AM_RANGE(0x180004, 0x180005) AM_READ_PORT("IN2")
@@ -249,13 +238,13 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ctribe_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16) /* Foreground (32x32 Tiles - 4 by per tile) */
- AM_RANGE(0x081000, 0x081fff) AM_RAM AM_BASE(&spriteram16)
- AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16) /* Background (32x32 Tiles - 2 by per tile) */
+ AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram_w) AM_BASE_MEMBER(ddragon3_state, fg_videoram) /* Foreground (32x32 Tiles - 4 by per tile) */
+ AM_RANGE(0x081000, 0x081fff) AM_RAM AM_BASE_MEMBER(ddragon3_state, spriteram)
+ AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram_w) AM_BASE_MEMBER(ddragon3_state, bg_videoram) /* Background (32x32 Tiles - 2 by per tile) */
AM_RANGE(0x082800, 0x082fff) AM_RAM
- AM_RANGE(0x0c0000, 0x0c000f) AM_READWRITE(ddragon3_scroll16_r, ddragon3_scroll16_w)
+ AM_RANGE(0x0c0000, 0x0c000f) AM_READWRITE(ddragon3_scroll_r, ddragon3_scroll_w)
AM_RANGE(0x100000, 0x1005ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16) /* Palette RAM */
- AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io16_w)
+ AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io_w)
AM_RANGE(0x180000, 0x180001) AM_READ_PORT("IN0")
AM_RANGE(0x180002, 0x180003) AM_READ_PORT("IN1")
AM_RANGE(0x180004, 0x180005) AM_READ_PORT("IN2")
@@ -566,7 +555,40 @@ static TIMER_DEVICE_CALLBACK( ddragon3_scanline )
*
*************************************/
+static MACHINE_START( ddragon3 )
+{
+ ddragon3_state *state = (ddragon3_state *)machine->driver_data;
+
+ state_save_register_global(machine, state->vreg);
+ state_save_register_global(machine, state->bg_scrollx);
+ state_save_register_global(machine, state->bg_scrolly);
+ state_save_register_global(machine, state->fg_scrollx);
+ state_save_register_global(machine, state->fg_scrolly);
+ state_save_register_global(machine, state->bg_tilebase);
+ state_save_register_global_array(machine, state->io_reg);
+}
+
+static MACHINE_RESET( ddragon3 )
+{
+ ddragon3_state *state = (ddragon3_state *)machine->driver_data;
+ int i;
+
+ state->vreg = 0;
+ state->bg_scrollx = 0;
+ state->bg_scrolly = 0;
+ state->fg_scrollx = 0;
+ state->fg_scrolly = 0;
+ state->bg_tilebase = 0;
+
+ for (i = 0; i < 8; i++)
+ state->io_reg[i] = 0;
+}
+
static MACHINE_DRIVER_START( ddragon3 )
+
+ /* driver data */
+ MDRV_DRIVER_DATA(ddragon3_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M68000, XTAL_20MHz / 2)
MDRV_CPU_PROGRAM_MAP(ddragon3_map)
@@ -575,6 +597,9 @@ static MACHINE_DRIVER_START( ddragon3 )
MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz)
MDRV_CPU_PROGRAM_MAP(sound_map)
+ MDRV_MACHINE_START(ddragon3)
+ MDRV_MACHINE_RESET(ddragon3)
+
/* video hardware */
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
diff --git a/src/mame/drivers/esd16.c b/src/mame/drivers/esd16.c
index f5dfc421ca8..73cb645f15c 100644
--- a/src/mame/drivers/esd16.c
+++ b/src/mame/drivers/esd16.c
@@ -44,30 +44,11 @@ Head Panic
#include "cpu/z80/z80.h"
#include "cpu/m68000/m68000.h"
#include "deprecat.h"
-#include "machine/eeprom.h"
+#include "machine/eepromdev.h"
#include "sound/okim6295.h"
#include "sound/3812intf.h"
+#include "esd16.h"
-/* Variables defined in video: */
-
-extern UINT16 *esd16_vram_0, *esd16_scroll_0;
-extern UINT16 *esd16_vram_1, *esd16_scroll_1;
-extern UINT16 *head_layersize;
-extern tilemap *esdtilemap_1_16x16;
-
-/* Functions defined in video: */
-
-WRITE16_HANDLER( esd16_vram_0_w );
-WRITE16_HANDLER( esd16_vram_1_w );
-WRITE16_HANDLER( esd16_tilemap0_color_w );
-
-VIDEO_START( esd16 );
-VIDEO_UPDATE( esd16 );
-VIDEO_UPDATE( hedpanic );
-VIDEO_UPDATE( hedpanio );
-
-static UINT16 *headpanic_platform_x;
-static UINT16 *headpanic_platform_y;
/***************************************************************************
@@ -77,14 +58,19 @@ static UINT16 *headpanic_platform_y;
***************************************************************************/
-static WRITE16_HANDLER( esd16_spriteram_w ) { COMBINE_DATA(&spriteram16[offset]); }
+static WRITE16_HANDLER( esd16_spriteram_w )
+{
+ esd16_state *state = (esd16_state *)space->machine->driver_data;
+ COMBINE_DATA(&state->spriteram16[offset]);
+}
static WRITE16_HANDLER( esd16_sound_command_w )
{
+ esd16_state *state = (esd16_state *)space->machine->driver_data;
if (ACCESSING_BITS_0_7)
{
soundlatch_w(space, 0, data & 0xff);
- cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE); // Generate an IRQ
+ cpu_set_input_line(state->audio_cpu, 0, ASSERT_LINE); // Generate an IRQ
cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50)); // Allow the other CPU to reply
}
}
@@ -99,12 +85,12 @@ static ADDRESS_MAP_START( multchmp_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16) // Palette
-/**/AM_RANGE(0x300000, 0x3007ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
+/**/AM_RANGE(0x300000, 0x3007ff) AM_RAM AM_BASE_MEMBER(esd16_state, spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x300800, 0x300807) AM_WRITE(esd16_spriteram_w) // Sprites (Mirrored)
-/**/AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0) // Layers
-/**/AM_RANGE(0x420000, 0x423fff) AM_RAM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) //
-/**/AM_RANGE(0x500000, 0x500003) AM_RAM AM_BASE(&esd16_scroll_0) // Scroll
-/**/AM_RANGE(0x500004, 0x500007) AM_RAM AM_BASE(&esd16_scroll_1) //
+/**/AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(esd16_vram_0_w) AM_BASE_MEMBER(esd16_state, vram_0) // Layers
+/**/AM_RANGE(0x420000, 0x423fff) AM_RAM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) //
+/**/AM_RANGE(0x500000, 0x500003) AM_RAM AM_BASE_MEMBER(esd16_state, scroll_0) // Scroll
+/**/AM_RANGE(0x500004, 0x500007) AM_RAM AM_BASE_MEMBER(esd16_state, scroll_1) //
/**/AM_RANGE(0x500008, 0x50000b) AM_RAM //
/**/AM_RANGE(0x50000c, 0x50000f) AM_RAM //
AM_RANGE(0x600000, 0x600001) AM_WRITE(SMH_NOP) // IRQ Ack
@@ -119,19 +105,20 @@ ADDRESS_MAP_END
static WRITE16_HANDLER(hedpanic_platform_w)
{
- int offsets = headpanic_platform_x[0]+0x40* headpanic_platform_y[0];
+ esd16_state *state = (esd16_state *)space->machine->driver_data;
+ int offsets = state->headpanic_platform_x[0] + 0x40 * state->headpanic_platform_y[0];
- esd16_vram_1[offsets] = data;
-
- tilemap_mark_tile_dirty(esdtilemap_1_16x16,offsets);
+ state->vram_1[offsets] = data;
+ tilemap_mark_tile_dirty(state->tilemap_1_16x16, offsets);
}
static READ16_HANDLER( esd_eeprom_r )
{
+ esd16_state *state = (esd16_state *)space->machine->driver_data;
if (ACCESSING_BITS_8_15)
{
- return ((eeprom_read_bit() & 0x01) << 15);
+ return ((eepromdev_read_bit(state->eeprom) & 0x01) << 15);
}
// logerror("(0x%06x) unk EEPROM read: %04x\n", cpu_get_pc(space->cpu), mem_mask);
@@ -141,16 +128,7 @@ static READ16_HANDLER( esd_eeprom_r )
static WRITE16_HANDLER( esd_eeprom_w )
{
if (ACCESSING_BITS_8_15)
- {
- // data line
- eeprom_write_bit((data & 0x0400) >> 6);
-
- // clock line asserted.
- eeprom_set_clock_line((data & 0x0200) ? ASSERT_LINE : CLEAR_LINE );
-
- // reset line asserted: reset.
- eeprom_set_cs_line((data & 0x0100) ? CLEAR_LINE : ASSERT_LINE );
- }
+ input_port_write(space->machine, "EEPROMOUT", data, 0xffff);
// logerror("(0x%06x) Unk EEPROM write: %04x %04x\n", cpu_get_pc(space->cpu), data, mem_mask);
}
@@ -159,24 +137,24 @@ static ADDRESS_MAP_START( hedpanic_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16) // Palette
- AM_RANGE(0x900000, 0x9007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
+ AM_RANGE(0x900000, 0x9007ff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x900800, 0x900807) AM_WRITE(esd16_spriteram_w) // Sprites (Mirrored)
- AM_RANGE(0xa00000, 0xa03fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0) // Layers
- AM_RANGE(0xa20000, 0xa23fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) //
- AM_RANGE(0xa24000, 0xa27fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) // mirror?
- AM_RANGE(0xb00000, 0xb00003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0) // Scroll
- AM_RANGE(0xb00004, 0xb00007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1) //
- AM_RANGE(0xb00008, 0xb00009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x)
- AM_RANGE(0xb0000a, 0xb0000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y)
+ AM_RANGE(0xa00000, 0xa03fff) AM_WRITE(esd16_vram_0_w) AM_BASE_MEMBER(esd16_state, vram_0) // Layers
+ AM_RANGE(0xa20000, 0xa23fff) AM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) //
+ AM_RANGE(0xa24000, 0xa27fff) AM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) // mirror?
+ AM_RANGE(0xb00000, 0xb00003) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, scroll_0) // Scroll
+ AM_RANGE(0xb00004, 0xb00007) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, scroll_1) //
+ AM_RANGE(0xb00008, 0xb00009) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, headpanic_platform_x)
+ AM_RANGE(0xb0000a, 0xb0000b) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, headpanic_platform_y)
AM_RANGE(0xb0000c, 0xb0000d) AM_WRITENOP // ??
- AM_RANGE(0xb0000e, 0xb0000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize) // ??
+ AM_RANGE(0xb0000e, 0xb0000f) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, head_layersize) // ??
AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP // IRQ Ack
AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("P1_P2")
AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("SYSTEM")
- AM_RANGE(0xc00006, 0xc00007) AM_READ(esd_eeprom_r )
+ AM_RANGE(0xc00006, 0xc00007) AM_READ(esd_eeprom_r)
AM_RANGE(0xc00008, 0xc00009) AM_WRITE(esd16_tilemap0_color_w) // Flip Screen + Tileamp0 palette banking
AM_RANGE(0xc0000a, 0xc0000b) AM_WRITENOP // ? 2 not checked
- AM_RANGE(0xc0000c, 0xc0000d) AM_WRITE(esd16_sound_command_w ) // To Sound CPU // ok
+ AM_RANGE(0xc0000c, 0xc0000d) AM_WRITE(esd16_sound_command_w) // To Sound CPU // ok
AM_RANGE(0xc0000e, 0xc0000f) AM_WRITE(esd_eeprom_w)
AM_RANGE(0xd00008, 0xd00009) AM_WRITE(hedpanic_platform_w)
ADDRESS_MAP_END
@@ -186,9 +164,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mchampdx_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
AM_RANGE(0x200000, 0x20ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0) // Layers
- AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) //
- AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) // mirror?
+ AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE_MEMBER(esd16_state, vram_0) // Layers
+ AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) //
+ AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) // mirror?
AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16) // Palette
AM_RANGE(0x500000, 0x500001) AM_WRITENOP // IRQ Ack
AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P1_P2")
@@ -198,14 +176,14 @@ static ADDRESS_MAP_START( mchampdx_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x50000a, 0x50000b) AM_WRITENOP // ? 2 not checked
AM_RANGE(0x50000c, 0x50000d) AM_WRITE(esd16_sound_command_w) // To Sound CPU // ok
AM_RANGE(0x50000e, 0x50000f) AM_WRITE(esd_eeprom_w)
- AM_RANGE(0x600000, 0x6007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
+ AM_RANGE(0x600000, 0x6007ff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x600800, 0x600807) AM_WRITE(esd16_spriteram_w) // Sprites (Mirrored)
- AM_RANGE(0x700000, 0x700003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0) // Scroll
- AM_RANGE(0x700004, 0x700007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1) //
- AM_RANGE(0x700008, 0x700009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x) // not used in mchampdx?
- AM_RANGE(0x70000a, 0x70000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y) // not used in mchampdx?
+ AM_RANGE(0x700000, 0x700003) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, scroll_0) // Scroll
+ AM_RANGE(0x700004, 0x700007) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, scroll_1) //
+ AM_RANGE(0x700008, 0x700009) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, headpanic_platform_x) // not used in mchampdx?
+ AM_RANGE(0x70000a, 0x70000b) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, headpanic_platform_y) // not used in mchampdx?
AM_RANGE(0x70000c, 0x70000d) AM_WRITENOP // ??
- AM_RANGE(0x70000e, 0x70000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize) // ??
+ AM_RANGE(0x70000e, 0x70000f) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, head_layersize) // ??
AM_RANGE(0xd00008, 0xd00009) AM_WRITE(hedpanic_platform_w) // not used in mchampdx?
ADDRESS_MAP_END
@@ -214,17 +192,17 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tangtang_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16) // RAM
- AM_RANGE(0x200000, 0x2007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
+ AM_RANGE(0x200000, 0x2007ff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x200800, 0x200807) AM_WRITE(esd16_spriteram_w) // Sprites (Mirrored)
- AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0) // Layers
- AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) //
- AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1) // mirror?
- AM_RANGE(0x400000, 0x400003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0) // Scroll
- AM_RANGE(0x400004, 0x400007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1) //
- AM_RANGE(0x400008, 0x400009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x) // not used in mchampdx?
- AM_RANGE(0x40000a, 0x40000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y) // not used in mchampdx?
+ AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE_MEMBER(esd16_state, vram_0) // Layers
+ AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) //
+ AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE_MEMBER(esd16_state, vram_1) // mirror?
+ AM_RANGE(0x400000, 0x400003) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, scroll_0) // Scroll
+ AM_RANGE(0x400004, 0x400007) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, scroll_1) //
+ AM_RANGE(0x400008, 0x400009) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, headpanic_platform_x) // not used in mchampdx?
+ AM_RANGE(0x40000a, 0x40000b) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, headpanic_platform_y) // not used in mchampdx?
AM_RANGE(0x40000c, 0x40000d) AM_WRITENOP // ??
- AM_RANGE(0x40000e, 0x40000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize) // ??
+ AM_RANGE(0x40000e, 0x40000f) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(esd16_state, head_layersize) // ??
AM_RANGE(0x500000, 0x500001) AM_WRITENOP // IRQ Ack
AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P1_P2")
AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
@@ -249,9 +227,9 @@ ADDRESS_MAP_END
static WRITE8_HANDLER( esd16_sound_rombank_w )
{
int bank = data & 0xf;
- if (data != bank) logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(space->cpu),data);
+ if (data != bank) logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(space->cpu), data);
if (bank >= 3) bank += 1;
- memory_set_bankptr(space->machine, 1, memory_region(space->machine, "audiocpu") + 0x4000 * bank);
+ memory_set_bank(space->machine, 1, bank);
}
static ADDRESS_MAP_START( multchmp_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
@@ -262,19 +240,21 @@ ADDRESS_MAP_END
static READ8_HANDLER( esd16_sound_command_r )
{
+ esd16_state *state = (esd16_state *)space->machine->driver_data;
+
/* Clear IRQ only after reading the command, or some get lost */
- cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
+ cpu_set_input_line(state->audio_cpu, 0, CLEAR_LINE);
return soundlatch_r(space, 0);
}
static ADDRESS_MAP_START( multchmp_sound_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x01) AM_DEVWRITE("ymsnd", ym3812_w ) // YM3812
+ AM_RANGE(0x00, 0x01) AM_DEVWRITE("ymsnd", ym3812_w) // YM3812
AM_RANGE(0x02, 0x02) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) // M6295
- AM_RANGE(0x03, 0x03) AM_READ(esd16_sound_command_r ) // From Main CPU
- AM_RANGE(0x04, 0x04) AM_WRITE(SMH_NOP ) // ? $00, $30
- AM_RANGE(0x05, 0x05) AM_WRITE(esd16_sound_rombank_w ) // ROM Bank
- AM_RANGE(0x06, 0x06) AM_READWRITE(SMH_NOP, SMH_NOP ) // ? At the start / ? 1 (End of NMI routine)
+ AM_RANGE(0x03, 0x03) AM_READ(esd16_sound_command_r) // From Main CPU
+ AM_RANGE(0x04, 0x04) AM_WRITE(SMH_NOP) // ? $00, $30
+ AM_RANGE(0x05, 0x05) AM_WRITE(esd16_sound_rombank_w) // ROM Bank
+ AM_RANGE(0x06, 0x06) AM_READWRITE(SMH_NOP, SMH_NOP) // ? At the start / ? 1 (End of NMI routine)
ADDRESS_MAP_END
@@ -395,6 +375,11 @@ static INPUT_PORTS_START( hedpanic )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE_NO_TOGGLE( 0x0040, IP_ACTIVE_LOW)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
+
+ PORT_START( "EEPROMOUT" )
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
+ PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
INPUT_PORTS_END
@@ -427,6 +412,11 @@ static INPUT_PORTS_START( swatpolc )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE_NO_TOGGLE( 0x0040, IP_ACTIVE_LOW)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
+
+ PORT_START( "EEPROMOUT" )
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
+ PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
INPUT_PORTS_END
/***************************************************************************
@@ -526,8 +516,31 @@ GFXDECODE_END
***************************************************************************/
+static MACHINE_START( esd16 )
+{
+ esd16_state *state = (esd16_state *)machine->driver_data;
+ UINT8 *AUDIO = memory_region(machine, "audiocpu");
+
+ memory_configure_bank(machine, 1, 0, 9, &AUDIO[0x0000], 0x4000);
+
+ state->audio_cpu = devtag_get_device(machine, "audiocpu");
+ state->eeprom = devtag_get_device(machine, "eeprom");
+
+ state_save_register_global(machine, state->tilemap0_color);
+}
+
+static MACHINE_RESET( esd16 )
+{
+ esd16_state *state = (esd16_state *)machine->driver_data;
+
+ state->tilemap0_color = 0;
+}
+
static MACHINE_DRIVER_START( multchmp )
+ /* driver data */
+ MDRV_DRIVER_DATA(esd16_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu",M68000, 16000000)
MDRV_CPU_PROGRAM_MAP(multchmp_map)
@@ -538,6 +551,9 @@ static MACHINE_DRIVER_START( multchmp )
MDRV_CPU_IO_MAP(multchmp_sound_io_map)
MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,32) /* IRQ By Main CPU */
+ MDRV_MACHINE_START(esd16)
+ MDRV_MACHINE_RESET(esd16)
+
/* video hardware */
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
@@ -571,7 +587,7 @@ static MACHINE_DRIVER_START( hedpanic )
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(hedpanic_map)
- MDRV_NVRAM_HANDLER(93C46)
+ MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
MDRV_PALETTE_LENGTH(0x1000/2)
@@ -1128,17 +1144,17 @@ ROM_END
***************************************************************************/
/* ESD 11-09-98 */
-GAME( 1999, multchmp, 0, multchmp, multchmp, 0, ROT0, "ESD", "Multi Champ (World)", 0 )
-GAME( 1998, multchmpk,multchmp, multchmp, multchmp, 0, ROT0, "ESD", "Multi Champ (Korea)", 0 )
+GAME( 1999, multchmp, 0, multchmp, multchmp, 0, ROT0, "ESD", "Multi Champ (World)", GAME_SUPPORTS_SAVE )
+GAME( 1998, multchmpk,multchmp, multchmp, multchmp, 0, ROT0, "ESD", "Multi Champ (Korea)", GAME_SUPPORTS_SAVE )
/* ESD 08-26-1999 */
-GAME( 2000, mchampdx, 0, mchampdx, hedpanic, 0, ROT0, "ESD", "Multi Champ Deluxe (ver. 0106, 06/01/2000)", 0 ) // 06/01/2000 ?
-GAME( 1999, mchampdxa,mchampdx, mchampdx, hedpanic, 0, ROT0, "ESD", "Multi Champ Deluxe (ver. 1126, 26/11/1999)", 0 ) // 26/11/1999 ?
-GAME( 2000, hedpanic, 0, hedpanic, hedpanic, 0, ROT0, "ESD", "Head Panic (ver. 0117, 17/01/2000)", 0 ) // 17/01/2000 ?
-GAME( 2000, hedpanicf,hedpanic, hedpanic, hedpanic, 0, ROT0, "ESD / Fuuki", "Head Panic (ver. 0315, 15/03/2000)", 0 ) // 15/03/2000 ?
-GAME( 1999, hedpanico,hedpanic, hedpanio, hedpanic, 0, ROT0, "ESD", "Head Panic (ver. 0615, 15/06/1999)", 0 ) // 15/06/1999 ?
+GAME( 2000, mchampdx, 0, mchampdx, hedpanic, 0, ROT0, "ESD", "Multi Champ Deluxe (ver. 0106, 06/01/2000)", GAME_SUPPORTS_SAVE ) // 06/01/2000 ?
+GAME( 1999, mchampdxa,mchampdx, mchampdx, hedpanic, 0, ROT0, "ESD", "Multi Champ Deluxe (ver. 1126, 26/11/1999)", GAME_SUPPORTS_SAVE ) // 26/11/1999 ?
+GAME( 2000, hedpanic, 0, hedpanic, hedpanic, 0, ROT0, "ESD", "Head Panic (ver. 0117, 17/01/2000)", GAME_SUPPORTS_SAVE ) // 17/01/2000 ?
+GAME( 2000, hedpanicf,hedpanic, hedpanic, hedpanic, 0, ROT0, "ESD / Fuuki", "Head Panic (ver. 0315, 15/03/2000)", GAME_SUPPORTS_SAVE ) // 15/03/2000 ?
+GAME( 1999, hedpanico,hedpanic, hedpanio, hedpanic, 0, ROT0, "ESD", "Head Panic (ver. 0615, 15/06/1999)", GAME_SUPPORTS_SAVE ) // 15/06/1999 ?
/* ESD - This PCB looks identical to the ESD 08-26-1999 PCB */
-GAME( 2000, tangtang, 0, tangtang, hedpanic, 0, ROT0, "ESD", "Tang Tang (ver. 0526, 26/05/2000)", 0 ) // 26/05/2000 ?
-GAME( 2001, swatpolc, 0, swatpolc, swatpolc, 0, ROT0, "ESD", "SWAT Police ", 0 )
+GAME( 2000, tangtang, 0, tangtang, hedpanic, 0, ROT0, "ESD", "Tang Tang (ver. 0526, 26/05/2000)", GAME_SUPPORTS_SAVE ) // 26/05/2000 ?
+GAME( 2001, swatpolc, 0, swatpolc, swatpolc, 0, ROT0, "ESD", "SWAT Police ", GAME_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/f-32.c b/src/mame/drivers/f-32.c
index 1295652937b..a950b8acafd 100644
--- a/src/mame/drivers/f-32.c
+++ b/src/mame/drivers/f-32.c
@@ -13,46 +13,32 @@
#include "driver.h"
#include "cpu/e132xs/e132xs.h"
-#include "machine/eeprom.h"
+#include "machine/eepromdev.h"
#include "sound/2151intf.h"
#include "sound/okim6295.h"
-static UINT32 *mosaicf2_videoram;
-
-static READ32_HANDLER( eeprom_r )
+typedef struct _mosaicf2_state mosaicf2_state;
+struct _mosaicf2_state
{
- return eeprom_read_bit();
-}
-
-static WRITE32_HANDLER( eeprom_bit_w )
-{
- eeprom_write_bit(data & 0x01);
-}
-
-static WRITE32_HANDLER( eeprom_cs_line_w )
-{
- eeprom_set_cs_line( (data & 0x01) ? CLEAR_LINE : ASSERT_LINE );
-}
-
-static WRITE32_HANDLER( eeprom_clock_line_w )
-{
- eeprom_set_clock_line( (~data & 0x01) ? ASSERT_LINE : CLEAR_LINE );
-}
+ /* memory pointers */
+ UINT32 * videoram;
+};
static VIDEO_UPDATE( mosaicf2 )
{
+ mosaicf2_state *state = (mosaicf2_state *)screen->machine->driver_data;
offs_t offs;
for (offs = 0; offs < 0x10000; offs++)
{
- int y = offs >> 8;
+ int y = offs >> 8;
int x = offs & 0xff;
if ((x < 0xa0) && (y < 0xe0))
{
- *BITMAP_ADDR16(bitmap, y, (x * 2) + 0) = (mosaicf2_videoram[offs] >> 16) & 0x7fff;
- *BITMAP_ADDR16(bitmap, y, (x * 2) + 1) = (mosaicf2_videoram[offs] >> 0) & 0x7fff;
+ *BITMAP_ADDR16(bitmap, y, (x * 2) + 0) = (state->videoram[offs] >> 16) & 0x7fff;
+ *BITMAP_ADDR16(bitmap, y, (x * 2) + 1) = (state->videoram[offs] >> 0) & 0x7fff;
}
}
@@ -63,7 +49,7 @@ static VIDEO_UPDATE( mosaicf2 )
static ADDRESS_MAP_START( common_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM
- AM_RANGE(0x40000000, 0x4003ffff) AM_RAM AM_BASE(&mosaicf2_videoram)
+ AM_RANGE(0x40000000, 0x4003ffff) AM_RAM AM_BASE_MEMBER(mosaicf2_state, videoram)
AM_RANGE(0x80000000, 0x80ffffff) AM_ROM AM_REGION("user2",0)
AM_RANGE(0xfff00000, 0xffffffff) AM_ROM AM_REGION("user1",0)
ADDRESS_MAP_END
@@ -71,8 +57,8 @@ ADDRESS_MAP_END
static READ32_HANDLER( f32_input_port_1_r )
{
/* burn a bunch of cycles because this is polled frequently during busy loops */
- if ((cpu_get_pc(space->cpu) == 0x000379de) ||
- (cpu_get_pc(space->cpu) == 0x000379cc) ) cpu_eat_cycles(space->cpu, 100);
+ if ((cpu_get_pc(space->cpu) == 0x000379de) || (cpu_get_pc(space->cpu) == 0x000379cc) )
+ cpu_eat_cycles(space->cpu, 100);
//else printf("PC %08x\n", cpu_get_pc(space->cpu) );
return input_port_read(space->machine, "SYSTEM_P2");
}
@@ -83,13 +69,13 @@ static ADDRESS_MAP_START( mosaicf2_io, ADDRESS_SPACE_IO, 32 )
AM_RANGE(0x4810, 0x4813) AM_DEVREAD8("ymsnd", ym2151_status_port_r, 0x000000ff)
AM_RANGE(0x5000, 0x5003) AM_READ_PORT("P1")
AM_RANGE(0x5200, 0x5203) AM_READ(f32_input_port_1_r)
- AM_RANGE(0x5400, 0x5403) AM_READ(eeprom_r)
+ AM_RANGE(0x5400, 0x5403) AM_READ_PORT("EEPROMIN")
AM_RANGE(0x6000, 0x6003) AM_DEVWRITE8("oki", okim6295_w, 0x000000ff)
AM_RANGE(0x6800, 0x6803) AM_DEVWRITE8("ymsnd", ym2151_data_port_w, 0x000000ff)
AM_RANGE(0x6810, 0x6813) AM_DEVWRITE8("ymsnd", ym2151_register_port_w, 0x000000ff)
- AM_RANGE(0x7000, 0x7003) AM_WRITE(eeprom_clock_line_w)
- AM_RANGE(0x7200, 0x7203) AM_WRITE(eeprom_cs_line_w)
- AM_RANGE(0x7400, 0x7403) AM_WRITE(eeprom_bit_w)
+ AM_RANGE(0x7000, 0x7003) AM_WRITE_PORT("EEPROMCLK")
+ AM_RANGE(0x7200, 0x7203) AM_WRITE_PORT("EEPROMCS")
+ AM_RANGE(0x7400, 0x7403) AM_WRITE_PORT("EEPROMOUT")
ADDRESS_MAP_END
@@ -122,15 +108,32 @@ static INPUT_PORTS_START( mosaicf2 )
PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_START( "EEPROMIN" )
+ PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
+
+ PORT_START( "EEPROMOUT" )
+ PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
+
+ PORT_START( "EEPROMCLK" )
+ PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
+
+ PORT_START( "EEPROMCS" )
+ PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
INPUT_PORTS_END
static MACHINE_DRIVER_START( mosaicf2 )
+
+ /* driver data */
+ MDRV_DRIVER_DATA(mosaicf2_state)
+
+ /* basic machine hardware */
MDRV_CPU_ADD("maincpu", E132XN, 20000000*4) /* 4x internal multiplier */
MDRV_CPU_PROGRAM_MAP(common_map)
MDRV_CPU_IO_MAP(mosaicf2_io)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
- MDRV_NVRAM_HANDLER(93C46)
+ MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
/* video hardware */
MDRV_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/fcombat.c b/src/mame/drivers/fcombat.c
index a72f9777643..48f5e2b6ce8 100644
--- a/src/mame/drivers/fcombat.c
+++ b/src/mame/drivers/fcombat.c
@@ -31,104 +31,20 @@ inputs + notes by stephh
#include "driver.h"
#include "cpu/z80/z80.h"
#include "sound/ay8910.h"
-
-
-/* this is compied from Exerion, but it should be correct */
-#define FCOMBAT_MASTER_CLOCK (20000000)
-#define FCOMBAT_CPU_CLOCK (FCOMBAT_MASTER_CLOCK / 6)
-#define FCOMBAT_AY8910_CLOCK (FCOMBAT_CPU_CLOCK / 2)
-#define FCOMBAT_PIXEL_CLOCK (FCOMBAT_MASTER_CLOCK / 3)
-#define FCOMBAT_HCOUNT_START (0x58)
-#define FCOMBAT_HTOTAL (512-FCOMBAT_HCOUNT_START)
-#define FCOMBAT_HBEND (12*8) /* ?? */
-#define FCOMBAT_HBSTART (52*8) /* ?? */
-#define FCOMBAT_VTOTAL (256)
-#define FCOMBAT_VBEND (16)
-#define FCOMBAT_VBSTART (240)
-
-
-PALETTE_INIT( fcombat );
-VIDEO_START( fcombat );
-VIDEO_UPDATE( fcombat );
-
-WRITE8_HANDLER( fcombat_videoreg_w );
-
-extern UINT8 fcombat_cocktail_flip;
-extern int fcombat_sh;
-extern int fcombat_sv;
+#include "fcombat.h"
static INPUT_CHANGED( coin_inserted )
{
+ fcombat_state *state = (fcombat_state *)field->port->machine->driver_data;
+
/* coin insertion causes an NMI */
- cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
+ cpu_set_input_line(state->maincpu, INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
}
-static INPUT_PORTS_START( fcombat )
- PORT_START("IN0") /* player 1 inputs (muxed on 0xe000) */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
-
- PORT_START("IN1") /* player 2 inputs (muxed on 0xe000) */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
-
- PORT_START("DSW0") /* dip switches (0xe100) */
- PORT_DIPNAME( 0x07, 0x02, DEF_STR( Lives ) )
- PORT_DIPSETTING( 0x00, "1" )
- PORT_DIPSETTING( 0x01, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x03, "4" )
- PORT_DIPSETTING( 0x04, "5" )
- PORT_DIPSETTING( 0x07, "Infinite (Cheat)")
- PORT_DIPNAME( 0x18, 0x00, DEF_STR( Bonus_Life ) )
- PORT_DIPSETTING( 0x00, "10000" )
- PORT_DIPSETTING( 0x08, "20000" )
- PORT_DIPSETTING( 0x10, "30000" )
- PORT_DIPSETTING( 0x18, "40000" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
-
- PORT_START("DSW1") /* dip switches/VBLANK (0xe200) */
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) // related to vblank
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x02, DEF_STR( On ) )
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coinage ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
- PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
- PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
-
- PORT_START("COIN")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_CHANGED(coin_inserted, 0)
-INPUT_PORTS_END
-
-
/* is it protection? */
-
static READ8_HANDLER( fcombat_protection_r )
{
/* Must match ONE of these values after a "and $3E" intruction :
@@ -145,8 +61,9 @@ static READ8_HANDLER( fcombat_protection_r )
static READ8_HANDLER( fcombat_port01_r )
{
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
/* the cocktail flip bit muxes between ports 0 and 1 */
- return fcombat_cocktail_flip ? input_port_read(space->machine, "IN1") : input_port_read(space->machine, "IN0");
+ return state->cocktail_flip ? input_port_read(space->machine, "IN1") : input_port_read(space->machine, "IN0");
}
@@ -154,40 +71,44 @@ static READ8_HANDLER( fcombat_port01_r )
static WRITE8_HANDLER(e900_w)
{
- fcombat_sh=data;
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
+ state->fcombat_sh = data;
}
static WRITE8_HANDLER(ea00_w)
{
- fcombat_sv=(fcombat_sv&0xff00)|data;
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
+ state->fcombat_sv = (state->fcombat_sv & 0xff00) | data;
}
static WRITE8_HANDLER(eb00_w)
{
- fcombat_sv=(fcombat_sv&0xff)|(data<<8);
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
+ state->fcombat_sv = (state->fcombat_sv & 0xff) | (data << 8);
}
// terrain info (ec00=x, ed00=y, return val in e300
-static int tx=0,ty=0;
-
static WRITE8_HANDLER(ec00_w)
{
- tx=data;
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
+ state->tx = data;
}
static WRITE8_HANDLER(ed00_w)
{
- ty=data;
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
+ state->ty = data;
}
static READ8_HANDLER(e300_r)
{
- int wx=(tx+fcombat_sh)/16;
- int wy=(ty*2+fcombat_sv)/16;
+ fcombat_state *state = (fcombat_state *)space->machine->driver_data;
+ int wx = (state->tx + state->fcombat_sh) / 16;
+ int wy = (state->ty * 2 + state->fcombat_sv) / 16;
- return memory_region(space->machine, "user2")[wx*32*16+wy];
+ return memory_region(space->machine, "user2")[wx * 32 * 16 + wy];
}
static WRITE8_HANDLER(ee00_w)
@@ -198,8 +119,8 @@ static WRITE8_HANDLER(ee00_w)
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_RAM
- AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
- AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
+ AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE_MEMBER(fcombat_state, videoram) AM_SIZE(&videoram_size)
+ AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_BASE_MEMBER(fcombat_state, spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0xe000, 0xe000) AM_READ(fcombat_port01_r)
AM_RANGE(0xe100, 0xe100) AM_READ_PORT("DSW0")
AM_RANGE(0xe200, 0xe200) AM_READ_PORT("DSW1")
@@ -232,6 +153,73 @@ ADDRESS_MAP_END
/*************************************
*
+ * Input ports
+ *
+ *************************************/
+
+static INPUT_PORTS_START( fcombat )
+ PORT_START("IN0") /* player 1 inputs (muxed on 0xe000) */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
+
+ PORT_START("IN1") /* player 2 inputs (muxed on 0xe000) */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
+
+ PORT_START("DSW0") /* dip switches (0xe100) */
+ PORT_DIPNAME( 0x07, 0x02, DEF_STR( Lives ) )
+ PORT_DIPSETTING( 0x00, "1" )
+ PORT_DIPSETTING( 0x01, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x03, "4" )
+ PORT_DIPSETTING( 0x04, "5" )
+ PORT_DIPSETTING( 0x07, "Infinite (Cheat)")
+ PORT_DIPNAME( 0x18, 0x00, DEF_STR( Bonus_Life ) )
+ PORT_DIPSETTING( 0x00, "10000" )
+ PORT_DIPSETTING( 0x08, "20000" )
+ PORT_DIPSETTING( 0x10, "30000" )
+ PORT_DIPSETTING( 0x18, "40000" )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
+
+ PORT_START("DSW1") /* dip switches/VBLANK (0xe200) */
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
+ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) // related to vblank
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coinage ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
+ PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
+ PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_START("COIN")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_CHANGED(coin_inserted, 0)
+INPUT_PORTS_END
+
+
+/*************************************
+ *
* Graphics layouts
*
*************************************/
@@ -277,14 +265,51 @@ GFXDECODE_END
*
*************************************/
+static MACHINE_START( fcombat )
+{
+ fcombat_state *state = (fcombat_state *)machine->driver_data;
+
+ state->maincpu = devtag_get_device(machine, "maincpu");
+
+ state_save_register_global(machine, state->cocktail_flip);
+ state_save_register_global(machine, state->char_palette);
+ state_save_register_global(machine, state->sprite_palette);
+ state_save_register_global(machine, state->char_bank);
+ state_save_register_global(machine, state->fcombat_sh);
+ state_save_register_global(machine, state->fcombat_sv);
+ state_save_register_global(machine, state->tx);
+ state_save_register_global(machine, state->ty);
+}
+
+static MACHINE_RESET( fcombat )
+{
+ fcombat_state *state = (fcombat_state *)machine->driver_data;
+
+ state->cocktail_flip = 0;
+ state->char_palette = 0;
+ state->sprite_palette = 0;
+ state->char_bank = 0;
+ state->fcombat_sh = 0;
+ state->fcombat_sv = 0;
+ state->tx = 0;
+ state->ty = 0;
+}
+
static MACHINE_DRIVER_START( fcombat )
+ /* driver data */
+ MDRV_DRIVER_DATA(fcombat_state)
+
+ /* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80, 10000000/3)
MDRV_CPU_PROGRAM_MAP(main_map)
MDRV_CPU_ADD("audiocpu", Z80, 10000000/3)
MDRV_CPU_PROGRAM_MAP(audio_map)
+ MDRV_MACHINE_START(fcombat)
+ MDRV_MACHINE_RESET(fcombat)
+
/* video hardware */
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
@@ -390,8 +415,8 @@ static DRIVER_INIT( fcombat )
for (oldaddr = 0; oldaddr < 32; oldaddr++)
{
- memcpy(&dst[oldaddr*32*8*2],&src[oldaddr*32*8],32*8);
- memcpy(&dst[oldaddr*32*8*2+32*8],&src[oldaddr*32*8+0x2000],32*8);
+ memcpy(&dst[oldaddr * 32 * 8 * 2], &src[oldaddr * 32 * 8], 32 * 8);
+ memcpy(&dst[oldaddr * 32 * 8 * 2 + 32 * 8], &src[oldaddr * 32 * 8 + 0x2000], 32 * 8);
}
@@ -402,8 +427,8 @@ static DRIVER_INIT( fcombat )
for (oldaddr = 0; oldaddr < 32; oldaddr++)
{
- memcpy(&dst[oldaddr*32*8*2],&src[oldaddr*32*8],32*8);
- memcpy(&dst[oldaddr*32*8*2+32*8],&src[oldaddr*32*8+0x2000],32*8);
+ memcpy(&dst[oldaddr * 32 * 8 * 2], &src[oldaddr * 32 * 8], 32 * 8);
+ memcpy(&dst[oldaddr * 32 * 8 * 2 + 32 * 8], &src[oldaddr * 32 * 8 + 0x2000], 32 * 8);
}
free(temp);
@@ -441,4 +466,4 @@ ROM_START( fcombat )
ROM_LOAD( "fcprom_c.a9", 0x0220, 0x0100, CRC(768ac120) SHA1(ceede1d6cbeae08da96ef52bdca2718a839d88ab) ) /* bg char mixer */
ROM_END
-GAME( 1985, fcombat, 0, fcombat, fcombat, fcombat, ROT90, "Jaleco", "Field Combat", GAME_WRONG_COLORS )
+GAME( 1985, fcombat, 0, fcombat, fcombat, fcombat, ROT90, "Jaleco", "Field Combat", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/fgoal.c b/src/mame/drivers/fgoal.c
index 596ea2464a6..a55089cea07 100644
--- a/src/mame/drivers/fgoal.c
+++ b/src/mame/drivers/fgoal.c
@@ -20,18 +20,6 @@ Differences between these sets include
#include "cpu/m6800/m6800.h"
#include "includes/fgoal.h"
-UINT8* fgoal_video_ram;
-
-static UINT8 row;
-static UINT8 col;
-
-int fgoal_player;
-
-static unsigned shift_data;
-static unsigned shift_bits;
-
-static int prev_coin;
-
static int intensity(int bits)
{
@@ -81,15 +69,16 @@ static PALETTE_INIT( fgoal )
static TIMER_CALLBACK( interrupt_callback )
{
+ fgoal_state *state = (fgoal_state *)machine->driver_data;
int scanline;
int coin = (input_port_read(machine, "IN1") & 2);
- cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
+ cpu_set_input_line(state->maincpu, 0, ASSERT_LINE);
- if (!coin && prev_coin)
- cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
+ if (!coin && state->prev_coin)
+ cpu_set_input_line(state->maincpu, INPUT_LINE_NMI, ASSERT_LINE);
- prev_coin = coin;
+ state->prev_coin = coin;
scanline = video_screen_get_vpos(machine->primary_screen) + 128;
@@ -100,21 +89,17 @@ static TIMER_CALLBACK( interrupt_callback )
}
-static MACHINE_RESET( fgoal )
+static unsigned video_ram_address( running_machine *machine )
{
- timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, interrupt_callback);
-}
-
-
-static unsigned video_ram_address(void)
-{
- return 0x4000 | (row << 5) | (col >> 3);
+ fgoal_state *state = (fgoal_state *)machine->driver_data;
+ return 0x4000 | (state->row << 5) | (state->col >> 3);
}
static READ8_HANDLER( fgoal_analog_r )
{
- return input_port_read(space->machine, fgoal_player ? "PADDLE1" : "PADDLE0"); /* PCB can be jumpered to use a single dial */
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ return input_port_read(space->machine, state->fgoal_player ? "PADDLE1" : "PADDLE0"); /* PCB can be jumpered to use a single dial */
}
@@ -127,7 +112,8 @@ static CUSTOM_INPUT( fgoal_80_r )
static READ8_HANDLER( fgoal_nmi_reset_r )
{
- cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ cpu_set_input_line(state->maincpu, INPUT_LINE_NMI, CLEAR_LINE);
return 0;
}
@@ -135,7 +121,8 @@ static READ8_HANDLER( fgoal_nmi_reset_r )
static READ8_HANDLER( fgoal_irq_reset_r )
{
- cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ cpu_set_input_line(state->maincpu, 0, CLEAR_LINE);
return 0;
}
@@ -143,49 +130,56 @@ static READ8_HANDLER( fgoal_irq_reset_r )
static READ8_HANDLER( fgoal_row_r )
{
- return row;
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ return state->row;
}
static WRITE8_HANDLER( fgoal_row_w )
{
- row = data;
-
- shift_data = shift_data >> 8;
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ state->row = data;
+ state->shift_data = state->shift_data >> 8;
}
+
static WRITE8_HANDLER( fgoal_col_w )
{
- col = data;
-
- shift_bits = data & 7;
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ state->col = data;
+ state->shift_bits = data & 7;
}
static WRITE8_HANDLER( fgoal_shifter_w )
{
- shift_data = (shift_data >> 8) | (data << 8); /* MB14241 custom chip */
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ state->shift_data = (state->shift_data >> 8) | (data << 8); /* MB14241 custom chip */
}
static READ8_HANDLER( fgoal_address_hi_r )
{
- return video_ram_address() >> 8;
+ return video_ram_address(space->machine) >> 8;
}
+
static READ8_HANDLER( fgoal_address_lo_r )
{
- return video_ram_address() & 0xff;
+ return video_ram_address(space->machine) & 0xff;
}
static READ8_HANDLER( fgoal_shifter_r )
{
- UINT8 v = shift_data >> (8 - shift_bits);
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ UINT8 v = state->shift_data >> (8 - state->shift_bits);
return BITSWAP8(v, 7, 6, 5, 4, 3, 2, 1, 0);
}
+
static READ8_HANDLER( fgoal_shifter_reverse_r )
{
- UINT8 v = shift_data >> (8 - shift_bits);
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ UINT8 v = state->shift_data >> (8 - state->shift_bits);
return BITSWAP8(v, 0, 1, 2, 3, 4, 5, 6, 7);
}
@@ -212,8 +206,8 @@ static WRITE8_HANDLER( fgoal_sound2_w )
/* BIT3 => SX5 */
/* BIT4 => SX4 */
/* BIT5 => SX3 */
-
- fgoal_player = data & 1;
+ fgoal_state *state = (fgoal_state *)space->machine->driver_data;
+ state->fgoal_player = data & 1;
}
@@ -241,7 +235,7 @@ static ADDRESS_MAP_START( cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x00fc, 0x00ff) AM_WRITE(fgoal_sound2_w)
AM_RANGE(0x0100, 0x03ff) AM_RAM
- AM_RANGE(0x4000, 0x7fff) AM_RAM AM_BASE(&fgoal_video_ram)
+ AM_RANGE(0x4000, 0x7fff) AM_RAM AM_BASE_MEMBER(fgoal_state, video_ram)
AM_RANGE(0x8000, 0x8000) AM_WRITE(fgoal_ypos_w)
AM_RANGE(0x8001, 0x8001) AM_WRITE(fgoal_xpos_w)
@@ -347,12 +341,51 @@ static GFXDECODE_START( fgoal )
GFXDECODE_END
+
+static MACHINE_START( fgoal )
+{
+ fgoal_state *state = (fgoal_state *)machine->driver_data;
+
+ state->maincpu = devtag_get_device(machine, "maincpu");
+
+ state_save_register_global(machine, state->xpos);
+ state_save_register_global(machine, state->ypos);
+ state_save_register_global(machine, state->current_color);
+ state_save_register_global(machine, state->fgoal_player);
+ state_save_register_global(machine, state->row);
+ state_save_register_global(machine, state->col);
+ state_save_register_global(machine, state->shift_data);
+ state_save_register_global(machine, state->shift_bits);
+ state_save_register_global(machine, state->prev_coin);
+}
+
+static MACHINE_RESET( fgoal )
+{
+ fgoal_state *state = (fgoal_state *)machine->driver_data;
+
+ timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, interrupt_callback);
+
+ state->xpos = 0;
+ state->ypos = 0;
+ state->current_color = 0;
+ state->fgoal_player = 0;
+ state->row = 0;
+ state->col = 0;
+ state->shift_data = 0;
+ state->shift_bits = 0;
+ state->prev_coin = 0;
+}
+
static MACHINE_DRIVER_START( fgoal )
+ /* driver data */
+ MDRV_DRIVER_DATA(fgoal_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6800, 10065000 / 10) /* ? */
MDRV_CPU_PROGRAM_MAP(cpu_map)
+ MDRV_MACHINE_START(fgoal)
MDRV_MACHINE_RESET(fgoal)
/* video hardware */
diff --git a/src/mame/drivers/finalizr.c b/src/mame/drivers/finalizr.c
index b0e6304c35e..e07bd3f3872 100644
--- a/src/mame/drivers/finalizr.c
+++ b/src/mame/drivers/finalizr.c
@@ -1,12 +1,12 @@
/***************************************************************************
-Finalizer (GX523) (c) 1985 Konami
+ Finalizer (GX523) (c) 1985 Konami
-driver by Nicola Salmoria
+ driver by Nicola Salmoria
-2009-03:
-Added dsw locations and verified factory setting based on Guru's notes
-(actually for finalizr only, finalizb locations assumed to be the same)
+ 2009-03:
+ Added dsw locations and verified factory setting based on Guru's notes
+ (actually for finalizr only, finalizb locations assumed to be the same)
***************************************************************************/
@@ -18,67 +18,63 @@ Added dsw locations and verified factory setting based on Guru's notes
#include "sound/sn76496.h"
#include "sound/dac.h"
#include "konamipt.h"
-
-extern UINT8 *finalizr_scroll;
-extern UINT8 *finalizr_videoram2,*finalizr_colorram2;
-static UINT8 nmi_enable,irq_enable;
-
-
-static int finalizr_T1_line;
-
-PALETTE_INIT( finalizr );
-VIDEO_START( finalizr );
-WRITE8_HANDLER( finalizr_videoctrl_w );
-VIDEO_UPDATE( finalizr );
-
+#include "finalizr.h"
static INTERRUPT_GEN( finalizr_interrupt )
{
+ finalizr_state *state = (finalizr_state *)device->machine->driver_data;
+
if (cpu_getiloops(device) == 0)
{
- if (irq_enable)
+ if (state->irq_enable)
cpu_set_input_line(device, M6809_IRQ_LINE, HOLD_LINE);
}
else if (cpu_getiloops(device) % 2)
{
- if (nmi_enable)
+ if (state->nmi_enable)
cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
}
}
static WRITE8_HANDLER( finalizr_coin_w )
{
- coin_counter_w(space->machine, 0,data & 0x01);
- coin_counter_w(space->machine, 1,data & 0x02);
+ coin_counter_w(space->machine, 0, data & 0x01);
+ coin_counter_w(space->machine, 1, data & 0x02);
}
static WRITE8_HANDLER( finalizr_flipscreen_w )
{
- nmi_enable = data & 0x01;
- irq_enable = data & 0x02;
+ finalizr_state *state = (finalizr_state *)space->machine->driver_data;
+ state->nmi_enable = data & 0x01;
+ state->irq_enable = data & 0x02;
flip_screen_set(space->machine, ~data & 0x08);
}
static WRITE8_HANDLER( finalizr_i8039_irq_w )
{
- cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
+ finalizr_state *state = (finalizr_state *)space->machine->driver_data;
+ cpu_set_input_line(state->audio_cpu, 0, ASSERT_LINE);
}
static WRITE8_HANDLER( i8039_irqen_w )
{
+ finalizr_state *state = (finalizr_state *)space->machine->driver_data;
+
/* bit 0x80 goes active low, indicating that the
external IRQ being serviced is complete
bit 0x40 goes active high to enable the DAC ?
*/
if ((data & 0x80) == 0)
- cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
+ cpu_set_input_line(state->audio_cpu, 0, CLEAR_LINE);
}
static READ8_HANDLER( i8039_T1_r )
{
+ finalizr_state *state = (finalizr_state *)space->machine->driver_data;
+
/* I suspect the clock-out from the I8039 T0 line should be connected
here (See the i8039_T0_w handler below).
The frequency of this clock cannot be greater than I8039 CLKIN / 45
@@ -89,9 +85,9 @@ static READ8_HANDLER( i8039_T1_r )
based on the I8039 main xtal clock input frequency of 9.216MHz
*/
- finalizr_T1_line++;
- finalizr_T1_line %= 16;
- return (!(finalizr_T1_line % 3) && (finalizr_T1_line > 0));
+ state->T1_line++;
+ state->T1_line %= 16;
+ return (!(state->T1_line % 3) && (state->T1_line > 0));
}
static WRITE8_HANDLER( i8039_T0_w )
@@ -105,10 +101,10 @@ static WRITE8_HANDLER( i8039_T0_w )
}
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
- AM_RANGE(0x0001, 0x0001) AM_WRITE(SMH_RAM) AM_BASE(&finalizr_scroll)
+ AM_RANGE(0x0001, 0x0001) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(finalizr_state, scroll)
AM_RANGE(0x0003, 0x0003) AM_WRITE(finalizr_videoctrl_w)
AM_RANGE(0x0004, 0x0004) AM_WRITE(finalizr_flipscreen_w)
-// AM_RANGE(0x0020, 0x003f) AM_WRITE(SMH_RAM) AM_BASE(&finalizr_scroll)
+// AM_RANGE(0x0020, 0x003f) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(finalizr_state, scroll)
AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW3")
AM_RANGE(0x0808, 0x0808) AM_READ_PORT("DSW2")
AM_RANGE(0x0810, 0x0810) AM_READ_PORT("SYSTEM")
@@ -121,13 +117,13 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x081b, 0x081b) AM_WRITENOP /* Loads the snd command into the snd latch */
AM_RANGE(0x081c, 0x081c) AM_WRITE(finalizr_i8039_irq_w) /* custom sound chip */
AM_RANGE(0x081d, 0x081d) AM_WRITE(soundlatch_w) /* custom sound chip */
- AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE(&colorram)
- AM_RANGE(0x2400, 0x27ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
- AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE(&finalizr_colorram2)
- AM_RANGE(0x2c00, 0x2fff) AM_RAM AM_BASE(&finalizr_videoram2)
- AM_RANGE(0x3000, 0x31ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
+ AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE_MEMBER(finalizr_state, colorram)
+ AM_RANGE(0x2400, 0x27ff) AM_RAM AM_BASE_MEMBER(finalizr_state, videoram) AM_SIZE(&videoram_size)
+ AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE_MEMBER(finalizr_state, colorram2)
+ AM_RANGE(0x2c00, 0x2fff) AM_RAM AM_BASE_MEMBER(finalizr_state, videoram2)
+ AM_RANGE(0x3000, 0x31ff) AM_RAM AM_BASE_MEMBER(finalizr_state, spriteram) AM_SIZE(&spriteram_size)
AM_RANGE(0x3200, 0x37ff) AM_RAM
- AM_RANGE(0x3800, 0x39ff) AM_RAM AM_BASE(&spriteram_2)
+ AM_RANGE(0x3800, 0x39ff) AM_RAM AM_BASE_MEMBER(finalizr_state, spriteram_2)
AM_RANGE(0x3a00, 0x3fff) AM_RAM
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
@@ -137,7 +133,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
- AM_RANGE(0x00, 0xff) AM_READ(soundlatch_r)
+ AM_RANGE(0x00, 0xff) AM_READ(soundlatch_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_WRITE(i8039_T0_w)
@@ -247,8 +243,35 @@ GFXDECODE_END
+static MACHINE_START( finalizr )
+{
+ finalizr_state *state = (finalizr_state *)machine->driver_data;
+
+ state->audio_cpu = devtag_get_device(machine, "audiocpu");
+
+ state_save_register_global(machine, state->spriterambank);
+ state_save_register_global(machine, state->charbank);
+ state_save_register_global(machine, state->T1_line);
+ state_save_register_global(machine, state->nmi_enable);
+ state_save_register_global(machine, state->irq_enable);
+}
+
+static MACHINE_RESET( finalizr )
+{
+ finalizr_state *state = (finalizr_state *)machine->driver_data;
+
+ state->spriterambank = 0;
+ state->charbank = 0;
+ state->T1_line = 0;
+ state->nmi_enable = 0;
+ state->irq_enable = 0;
+}
+
static MACHINE_DRIVER_START( finalizr )
+ /* driver data */
+ MDRV_DRIVER_DATA(finalizr_state)
+
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M6809,XTAL_18_432MHz/6) /* ??? */
MDRV_CPU_PROGRAM_MAP(main_map)
@@ -258,6 +281,9 @@ static MACHINE_DRIVER_START( finalizr )
MDRV_CPU_PROGRAM_MAP(sound_map)
MDRV_CPU_IO_MAP(sound_io_map)
+ MDRV_MACHINE_START(finalizr)
+ MDRV_MACHINE_RESET(finalizr)
+
/* video hardware */
MDRV_SCREEN_ADD("screen", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
@@ -348,5 +374,5 @@ static DRIVER_INIT( finalizr )
}
-GAME( 1985, finalizr, 0, finalizr, finalizr, finalizr, ROT90, "Konami", "Finalizer - Super Transformation", GAME_IMPERFECT_SOUND )
-GAME( 1985, finalizrb,finalizr, finalizr, finalizb, finalizr, ROT90, "bootleg", "Finalizer - Super Transformation (bootleg)", GAME_IMPERFECT_SOUND )
+GAME( 1985, finalizr, 0, finalizr, finalizr, finalizr, ROT90, "Konami", "Finalizer - Super Transformation", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
+GAME( 1985, finalizrb, finalizr, finalizr, finalizb, finalizr, ROT90, "bootleg", "Finalizer - Super Transformation (bootleg)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )