diff options
author | Miodrag Milanovic <mmicko@gmail.com> | 2012-04-10 14:06:51 +0000 |
---|---|---|
committer | Miodrag Milanovic <mmicko@gmail.com> | 2012-04-10 14:06:51 +0000 |
commit | 1c23311d1a964ea37d112b3ddee700a0f76c1270 (patch) | |
tree | d40cfb298b7b2df9984f165e756e46f3fabef544 /src/mame/drivers | |
parent | 562d8191358374418e48bb78299fc5eee2ead634 (diff) |
more modernization (no whatsnew)
Diffstat (limited to 'src/mame/drivers')
32 files changed, 2345 insertions, 2229 deletions
diff --git a/src/mame/drivers/bfm_sc4h.c b/src/mame/drivers/bfm_sc4h.c index fca7902a38f..10feb3e5516 100644 --- a/src/mame/drivers/bfm_sc4h.c +++ b/src/mame/drivers/bfm_sc4h.c @@ -57,6 +57,8 @@ public: UINT8 vfd_ser_value; int vfd_ser_count; + DECLARE_READ16_MEMBER(sc4_mem_r); + DECLARE_WRITE16_MEMBER(sc4_mem_w); }; class sc4_adder4_state : public sc4_state @@ -71,19 +73,18 @@ public: required_device<cpu_device> m_adder4cpu; }; -static READ16_HANDLER( sc4_mem_r ) +READ16_MEMBER(sc4_state::sc4_mem_r) { - sc4_state *state = space->machine().driver_data<sc4_state>(); - int pc = cpu_get_pc(&space->device()); - int cs = m68307_get_cs(state->m_maincpu, offset * 2); + int pc = cpu_get_pc(&space.device()); + int cs = m68307_get_cs(m_maincpu, offset * 2); int base = 0, end = 0, base2 = 0, end2 = 0; -// if (!(space->debugger_access())) printf("cs is %d\n", cs); +// if (!(debugger_access())) printf("cs is %d\n", cs); switch ( cs ) { case 1: if (offset<0x100000/2) - return state->m_cpuregion[offset]; + return m_cpuregion[offset]; else logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d\n", pc, offset*2, mem_mask, cs); break; @@ -99,7 +100,7 @@ static READ16_HANDLER( sc4_mem_r ) if ((offset>=base) && (offset<end)) { offset-=base; - return(state->m_mainram[offset]); + return(m_mainram[offset]); } else if ((offset>=base2) && (offset<end2)) { @@ -135,10 +136,10 @@ static READ16_HANDLER( sc4_mem_r ) return 0x0000; case 0x1244: - return ymz280b_r(state->m_ymz,0); + return ymz280b_r(m_ymz,0); case 0x1246: - return ymz280b_r(state->m_ymz,1); + return ymz280b_r(m_ymz,1); default: logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d (LAMPS etc.)\n", pc, offset*2, mem_mask, cs); @@ -157,7 +158,7 @@ static READ16_HANDLER( sc4_mem_r ) if ((offset>=base) && (offset<end)) { offset-=base; - return duart68681_r(state->m_duart,offset); + return duart68681_r(m_duart,offset); } else { @@ -180,11 +181,10 @@ static READ16_HANDLER( sc4_mem_r ) return 0x0000; } -static WRITE16_HANDLER( sc4_mem_w ) +WRITE16_MEMBER(sc4_state::sc4_mem_w) { - sc4_state *state = space->machine().driver_data<sc4_state>(); - int pc = cpu_get_pc(&space->device()); - int cs = m68307_get_cs(state->m_maincpu, offset * 2); + int pc = cpu_get_pc(&space.device()); + int cs = m68307_get_cs(m_maincpu, offset * 2); int base = 0, end = 0, base2 = 0, end2 = 0; switch ( cs ) @@ -206,7 +206,7 @@ static WRITE16_HANDLER( sc4_mem_w ) if ((offset>=base) && (offset<end)) { offset-=base; - COMBINE_DATA(&state->m_mainram[offset]); + COMBINE_DATA(&m_mainram[offset]); } else if ((offset>=base2) && (offset<end2)) { @@ -215,11 +215,11 @@ static WRITE16_HANDLER( sc4_mem_w ) switch (offset << 1) { case 0x1248: - ymz280b_w(state->m_ymz,0, data & 0xff); + ymz280b_w(m_ymz,0, data & 0xff); break; case 0x124a: - ymz280b_w(state->m_ymz,1, data & 0xff); + ymz280b_w(m_ymz,1, data & 0xff); break; @@ -240,7 +240,7 @@ static WRITE16_HANDLER( sc4_mem_w ) if ((offset>=base) && (offset<end)) { offset-=base; - duart68681_w(state->m_duart,offset,data&0x00ff); + duart68681_w(m_duart,offset,data&0x00ff); } else { @@ -258,8 +258,8 @@ static WRITE16_HANDLER( sc4_mem_w ) } } -static ADDRESS_MAP_START( sc4_map, AS_PROGRAM, 16, sc4_adder4_state ) - AM_RANGE(0x0000000, 0xffffff) AM_READWRITE_LEGACY(sc4_mem_r, sc4_mem_w) +static ADDRESS_MAP_START( sc4_map, AS_PROGRAM, 16, sc4_state ) + AM_RANGE(0x0000000, 0xffffff) AM_READWRITE(sc4_mem_r, sc4_mem_w) ADDRESS_MAP_END static ADDRESS_MAP_START( sc4_adder4_map, AS_PROGRAM, 32, sc4_adder4_state ) diff --git a/src/mame/drivers/calchase.c b/src/mame/drivers/calchase.c index 92f5c8d4659..2dc86671606 100644 --- a/src/mame/drivers/calchase.c +++ b/src/mame/drivers/calchase.c @@ -147,6 +147,18 @@ public: UINT32 m_idle_skip_ram; required_device<cpu_device> m_maincpu; + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); + DECLARE_WRITE32_MEMBER(bios_ram_w); + DECLARE_READ16_MEMBER(calchase_iocard1_r); + DECLARE_READ16_MEMBER(calchase_iocard2_r); + DECLARE_READ16_MEMBER(calchase_iocard3_r); + DECLARE_READ16_MEMBER(calchase_iocard4_r); + DECLARE_READ16_MEMBER(calchase_iocard5_r); + DECLARE_READ32_MEMBER(calchase_idle_skip_r); + DECLARE_WRITE32_MEMBER(calchase_idle_skip_w); }; @@ -175,46 +187,44 @@ static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w) -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(calchase_state::at_page8_r) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(calchase_state::at_page8_w) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } @@ -229,23 +239,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(calchase_state::pc_dma_read_byte) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(calchase_state::pc_dma_write_byte) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -263,8 +271,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(calchase_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(calchase_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -281,17 +289,6 @@ static I8237_INTERFACE( dma8237_2_config ) { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } }; -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} - static READ32_DEVICE_HANDLER( ide_r ) { return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask); @@ -485,40 +482,39 @@ static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int functi } } -static WRITE32_HANDLER(bios_ram_w) +WRITE32_MEMBER(calchase_state::bios_ram_w) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - //if (state->m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled - if (state->m_mxtc_config_reg[0x63] & 0x50) + //if (m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled + if (m_mxtc_config_reg[0x63] & 0x50) { - COMBINE_DATA(state->m_bios_ram + offset); + COMBINE_DATA(m_bios_ram + offset); } } -static READ16_HANDLER( calchase_iocard1_r ) +READ16_MEMBER(calchase_state::calchase_iocard1_r) { - return input_port_read(space->machine(), "IOCARD1"); + return input_port_read(machine(), "IOCARD1"); } -static READ16_HANDLER( calchase_iocard2_r ) +READ16_MEMBER(calchase_state::calchase_iocard2_r) { - return input_port_read(space->machine(), "IOCARD2"); + return input_port_read(machine(), "IOCARD2"); } -static READ16_HANDLER( calchase_iocard3_r ) +READ16_MEMBER(calchase_state::calchase_iocard3_r) { - return input_port_read(space->machine(), "IOCARD3"); + return input_port_read(machine(), "IOCARD3"); } /* These two controls wheel pot or whatever this game uses ... */ -static READ16_HANDLER( calchase_iocard4_r ) +READ16_MEMBER(calchase_state::calchase_iocard4_r) { - return input_port_read(space->machine(), "IOCARD4"); + return input_port_read(machine(), "IOCARD4"); } -static READ16_HANDLER( calchase_iocard5_r ) +READ16_MEMBER(calchase_state::calchase_iocard5_r) { - return input_port_read(space->machine(), "IOCARD5"); + return input_port_read(machine(), "IOCARD5"); } @@ -533,11 +529,11 @@ static ADDRESS_MAP_START( calchase_map, AS_PROGRAM, 32, calchase_state ) AM_RANGE(0x000c0000, 0x000c7fff) AM_RAM AM_REGION("video_bios", 0) AM_RANGE(0x000c8000, 0x000cffff) AM_NOP //AM_RANGE(0x000d0000, 0x000d0003) AM_RAM // XYLINX - Sincronus serial communication - AM_RANGE(0x000d0004, 0x000d0007) AM_READ16_LEGACY(calchase_iocard1_r, 0x0000ffff) - AM_RANGE(0x000d000c, 0x000d000f) AM_READ16_LEGACY(calchase_iocard2_r, 0x0000ffff) - AM_RANGE(0x000d0030, 0x000d0033) AM_READ16_LEGACY(calchase_iocard3_r, 0xffff0000) - AM_RANGE(0x000d0030, 0x000d0033) AM_READ16_LEGACY(calchase_iocard4_r, 0x0000ffff) - AM_RANGE(0x000d0034, 0x000d0037) AM_READ16_LEGACY(calchase_iocard5_r, 0x0000ffff) + AM_RANGE(0x000d0004, 0x000d0007) AM_READ16(calchase_iocard1_r, 0x0000ffff) + AM_RANGE(0x000d000c, 0x000d000f) AM_READ16(calchase_iocard2_r, 0x0000ffff) + AM_RANGE(0x000d0030, 0x000d0033) AM_READ16(calchase_iocard3_r, 0xffff0000) + AM_RANGE(0x000d0030, 0x000d0033) AM_READ16(calchase_iocard4_r, 0x0000ffff) + AM_RANGE(0x000d0034, 0x000d0037) AM_READ16(calchase_iocard5_r, 0x0000ffff) AM_RANGE(0x000d0008, 0x000d000b) AM_WRITENOP // ??? AM_RANGE(0x000d0024, 0x000d0027) AM_DEVWRITE16_LEGACY("dac_l",calchase_dac_w,0x0000ffff) AM_RANGE(0x000d0028, 0x000d002b) AM_DEVWRITE16_LEGACY("dac_r",calchase_dac_w,0x0000ffff) @@ -546,9 +542,9 @@ static ADDRESS_MAP_START( calchase_map, AS_PROGRAM, 32, calchase_state ) //GRULL AM_RANGE(0x000e0000, 0x000effff) AM_RAM //GRULL-AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1") - //GRULL AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE_LEGACY(bios_ram_w) + //GRULL AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w) AM_RANGE(0x000e0000, 0x000fffff) AM_ROMBANK("bank1") - AM_RANGE(0x000e0000, 0x000fffff) AM_WRITE_LEGACY(bios_ram_w) + AM_RANGE(0x000e0000, 0x000fffff) AM_WRITE(bios_ram_w) AM_RANGE(0x00100000, 0x03ffffff) AM_RAM // 64MB AM_RANGE(0x02000000, 0x28ffffff) AM_NOP //AM_RANGE(0x04000000, 0x040001ff) AM_RAM @@ -568,7 +564,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state ) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) //AM_RANGE(0x00e8, 0x00eb) AM_NOP @@ -941,21 +937,19 @@ static MACHINE_CONFIG_START( calchase, calchase_state ) MACHINE_CONFIG_END -static READ32_HANDLER( calchase_idle_skip_r ) +READ32_MEMBER(calchase_state::calchase_idle_skip_r) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - if(cpu_get_pc(&space->device())==0x1406f48) - device_spin_until_interrupt(state->m_maincpu); + if(cpu_get_pc(&space.device())==0x1406f48) + device_spin_until_interrupt(m_maincpu); - return state->m_idle_skip_ram; + return m_idle_skip_ram; } -static WRITE32_HANDLER( calchase_idle_skip_w ) +WRITE32_MEMBER(calchase_state::calchase_idle_skip_w) { - calchase_state *state = space->machine().driver_data<calchase_state>(); - COMBINE_DATA(&state->m_idle_skip_ram); + COMBINE_DATA(&m_idle_skip_ram); } static DRIVER_INIT( calchase ) @@ -971,7 +965,7 @@ static DRIVER_INIT( calchase ) kbdc8042_init(machine, &at8042); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x3f0b160, 0x3f0b163, FUNC(calchase_idle_skip_r), FUNC(calchase_idle_skip_w)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x3f0b160, 0x3f0b163, read32_delegate(FUNC(calchase_state::calchase_idle_skip_r),state), write32_delegate(FUNC(calchase_state::calchase_idle_skip_w),state)); } ROM_START( calchase ) diff --git a/src/mame/drivers/cb2001.c b/src/mame/drivers/cb2001.c index f8926b957d4..6b562445cac 100644 --- a/src/mame/drivers/cb2001.c +++ b/src/mame/drivers/cb2001.c @@ -61,6 +61,9 @@ public: tilemap_t *m_reel3_tilemap; int m_other1; int m_other2; + DECLARE_WRITE16_MEMBER(cb2001_vidctrl_w); + DECLARE_WRITE16_MEMBER(cb2001_vidctrl2_w); + DECLARE_WRITE16_MEMBER(cb2001_bg_w); }; @@ -426,28 +429,26 @@ static SCREEN_UPDATE_RGB32(cb2001) /* these ports sometimes get written with similar values - they could be hooked up wrong, or subject to change it the code is being executed incorrectly */ -WRITE16_HANDLER( cb2001_vidctrl_w ) +WRITE16_MEMBER(cb2001_state::cb2001_vidctrl_w) { - cb2001_state *state = space->machine().driver_data<cb2001_state>(); if (mem_mask&0xff00) // video control? { printf("cb2001_vidctrl_w %04x %04x\n", data, mem_mask); - state->m_videobank = (data & 0x0800)>>11; + m_videobank = (data & 0x0800)>>11; } else // something else - state->m_other1 = data & 0x00ff; + m_other1 = data & 0x00ff; } -WRITE16_HANDLER( cb2001_vidctrl2_w ) +WRITE16_MEMBER(cb2001_state::cb2001_vidctrl2_w) { - cb2001_state *state = space->machine().driver_data<cb2001_state>(); if (mem_mask&0xff00) // video control? { printf("cb2001_vidctrl2_w %04x %04x\n", data, mem_mask); // i think this switches to 'reels' mode - state->m_videomode = (data>>8) & 0x03; // which bit?? + m_videomode = (data>>8) & 0x03; // which bit?? } else // something else - state->m_other2 = data & 0x00ff; + m_other2 = data & 0x00ff; // printf("cb2001_vidctrl2_w %04x %04x\n", data, mem_mask); // bank could be here instead } @@ -523,33 +524,32 @@ static VIDEO_START(cb2001) state->m_reel3_tilemap->set_scroll_cols(64); } -WRITE16_HANDLER( cb2001_bg_w ) +WRITE16_MEMBER(cb2001_state::cb2001_bg_w) { - cb2001_state *state = space->machine().driver_data<cb2001_state>(); - COMBINE_DATA(&state->m_vram_bg[offset]); + COMBINE_DATA(&m_vram_bg[offset]); // also used for the reel tilemaps in a different mode /* if (offset<0x200/2) { - state->m_reel1_tilemap->mark_tile_dirty((offset&0xff)/2); + m_reel1_tilemap->mark_tile_dirty((offset&0xff)/2); } else if (offset<0x400/2) { - state->m_reel2_tilemap->mark_tile_dirty((offset&0xff)/2); + m_reel2_tilemap->mark_tile_dirty((offset&0xff)/2); } else if (offset<0x600/2) { - state->m_reel3_tilemap->mark_tile_dirty((offset&0xff)/2); + m_reel3_tilemap->mark_tile_dirty((offset&0xff)/2); } else if (offset<0x800/2) { // reel4_tilemap->mark_tile_dirty((offset&0xff)/2); } */ - state->m_reel1_tilemap->mark_all_dirty(); - state->m_reel2_tilemap->mark_all_dirty(); - state->m_reel3_tilemap->mark_all_dirty(); + m_reel1_tilemap->mark_all_dirty(); + m_reel2_tilemap->mark_all_dirty(); + m_reel3_tilemap->mark_all_dirty(); } @@ -557,7 +557,7 @@ WRITE16_HANDLER( cb2001_bg_w ) static ADDRESS_MAP_START( cb2001_map, AS_PROGRAM, 16, cb2001_state ) AM_RANGE(0x00000, 0x1ffff) AM_RAM AM_RANGE(0x20000, 0x20fff) AM_RAM AM_BASE(m_vram_fg) - AM_RANGE(0x21000, 0x21fff) AM_RAM_WRITE_LEGACY(&cb2001_bg_w) AM_BASE(m_vram_bg) + AM_RANGE(0x21000, 0x21fff) AM_RAM_WRITE(cb2001_bg_w) AM_BASE(m_vram_bg) AM_RANGE(0xc0000, 0xfffff) AM_ROM AM_REGION("boot_prg",0) ADDRESS_MAP_END @@ -567,8 +567,8 @@ static ADDRESS_MAP_START( cb2001_io, AS_IO, 16, cb2001_state ) AM_RANGE(0x20, 0x21) AM_DEVREAD8_LEGACY("aysnd", ay8910_r, 0xff00) AM_RANGE(0x22, 0x23) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_address_w, 0xffff) - AM_RANGE(0x30, 0x31) AM_WRITE_LEGACY(cb2001_vidctrl_w) - AM_RANGE(0x32, 0x33) AM_WRITE_LEGACY(cb2001_vidctrl2_w) + AM_RANGE(0x30, 0x31) AM_WRITE(cb2001_vidctrl_w) + AM_RANGE(0x32, 0x33) AM_WRITE(cb2001_vidctrl2_w) ADDRESS_MAP_END static INPUT_PORTS_START( cb2001 ) diff --git a/src/mame/drivers/champbwl.c b/src/mame/drivers/champbwl.c index 378db37e169..9c8215e4f8d 100644 --- a/src/mame/drivers/champbwl.c +++ b/src/mame/drivers/champbwl.c @@ -165,37 +165,39 @@ public: : tnzs_state(mconfig, type, tag) { } UINT8 m_last_trackball_val[2]; + DECLARE_READ8_MEMBER(trackball_r); + DECLARE_WRITE8_MEMBER(champbwl_misc_w); + DECLARE_WRITE8_MEMBER(doraemon_outputs_w); }; -static READ8_HANDLER( trackball_r ) +READ8_MEMBER(champbwl_state::trackball_r) { - champbwl_state *state = space->machine().driver_data<champbwl_state>(); UINT8 ret; - UINT8 port4 = input_port_read(space->machine(), "FAKEX"); - UINT8 port5 = input_port_read(space->machine(), "FAKEY"); + UINT8 port4 = input_port_read(machine(), "FAKEX"); + UINT8 port5 = input_port_read(machine(), "FAKEY"); - ret = (((port4 - state->m_last_trackball_val[0]) & 0x0f)<<4) | ((port5 - state->m_last_trackball_val[1]) & 0x0f); + ret = (((port4 - m_last_trackball_val[0]) & 0x0f)<<4) | ((port5 - m_last_trackball_val[1]) & 0x0f); - state->m_last_trackball_val[0] = port4; - state->m_last_trackball_val[1] = port5; + m_last_trackball_val[0] = port4; + m_last_trackball_val[1] = port5; return ret; } -static WRITE8_HANDLER( champbwl_misc_w ) +WRITE8_MEMBER(champbwl_state::champbwl_misc_w) { - coin_counter_w(space->machine(), 0, data & 1); - coin_counter_w(space->machine(), 1, data & 2); + coin_counter_w(machine(), 0, data & 1); + coin_counter_w(machine(), 1, data & 2); - coin_lockout_w(space->machine(), 0, ~data & 8); - coin_lockout_w(space->machine(), 1, ~data & 4); + coin_lockout_w(machine(), 0, ~data & 8); + coin_lockout_w(machine(), 1, ~data & 4); - memory_set_bank(space->machine(), "bank1", (data & 0x30) >> 4); + memory_set_bank(machine(), "bank1", (data & 0x30) >> 4); } -static ADDRESS_MAP_START( champbwl_map, AS_PROGRAM, 8, tnzs_state ) +static ADDRESS_MAP_START( champbwl_map, AS_PROGRAM, 8, champbwl_state ) AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("maincpu", 0x10000) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE("nvram") @@ -206,13 +208,13 @@ static ADDRESS_MAP_START( champbwl_map, AS_PROGRAM, 8, tnzs_state ) AM_RANGE(0xe300, 0xe303) AM_MIRROR(0xfc) AM_DEVWRITE_LEGACY("spritegen", spritectrl_w8) /* control registers (0x80 mirror used by Arkanoid 2) */ AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */ - AM_RANGE(0xf000, 0xf000) AM_READ_LEGACY(trackball_r) + AM_RANGE(0xf000, 0xf000) AM_READ(trackball_r) AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN0") AM_RANGE(0xf004, 0xf004) AM_READ_PORT("IN1") AM_RANGE(0xf006, 0xf006) AM_READ_PORT("IN2") AM_RANGE(0xf007, 0xf007) AM_READ_PORT("IN3") - AM_RANGE(0xf000, 0xf000) AM_WRITE_LEGACY(champbwl_misc_w) + AM_RANGE(0xf000, 0xf000) AM_WRITE(champbwl_misc_w) AM_RANGE(0xf002, 0xf002) AM_WRITENOP //buttons light? AM_RANGE(0xf004, 0xf004) AM_WRITENOP //buttons light? AM_RANGE(0xf006, 0xf006) AM_WRITENOP //buttons light? @@ -221,20 +223,20 @@ ADDRESS_MAP_END -static WRITE8_HANDLER( doraemon_outputs_w ) +WRITE8_MEMBER(champbwl_state::doraemon_outputs_w) { - coin_counter_w(space->machine(), 0, data & 1); // coin in counter - coin_counter_w(space->machine(), 1, data & 2); // gift out counter + coin_counter_w(machine(), 0, data & 1); // coin in counter + coin_counter_w(machine(), 1, data & 2); // gift out counter - coin_lockout_w(space->machine(), 0, ~data & 8); // coin lockout - space->machine().device<ticket_dispenser_device>("hopper")->write(*space, 0, (data & 0x04) ? 0x00 : 0x80); // gift out motor + coin_lockout_w(machine(), 0, ~data & 8); // coin lockout + machine().device<ticket_dispenser_device>("hopper")->write(*&space, 0, (data & 0x04) ? 0x00 : 0x80); // gift out motor - memory_set_bank(space->machine(), "bank1", (data & 0x30) >> 4); + memory_set_bank(machine(), "bank1", (data & 0x30) >> 4); // popmessage("%02x", data); } -static ADDRESS_MAP_START( doraemon, AS_PROGRAM, 8, tnzs_state ) +static ADDRESS_MAP_START( doraemon, AS_PROGRAM, 8, champbwl_state ) AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE("nvram") @@ -244,7 +246,7 @@ static ADDRESS_MAP_START( doraemon, AS_PROGRAM, 8, tnzs_state ) AM_RANGE(0xe000, 0xe2ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r8, spriteylow_w8) AM_RANGE(0xe300, 0xe303) AM_DEVWRITE_LEGACY("spritegen", spritectrl_w8) AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */ - AM_RANGE(0xf000, 0xf000) AM_READ_PORT("IN0") AM_WRITE_LEGACY(doraemon_outputs_w) + AM_RANGE(0xf000, 0xf000) AM_READ_PORT("IN0") AM_WRITE(doraemon_outputs_w) AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN1") AM_WRITENOP // Ack? AM_RANGE(0xf004, 0xf004) AM_WRITENOP // Ack? AM_RANGE(0xf006, 0xf006) AM_READ_PORT("DSW") AM_WRITENOP // Ack? diff --git a/src/mame/drivers/funkball.c b/src/mame/drivers/funkball.c index 99f5aed4c82..7cdd4eb18db 100644 --- a/src/mame/drivers/funkball.c +++ b/src/mame/drivers/funkball.c @@ -142,6 +142,13 @@ public: UINT32 init_enable; } m_voodoo_pci_regs; + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); + DECLARE_READ32_MEMBER(biu_ctrl_r); + DECLARE_WRITE32_MEMBER(biu_ctrl_w); + DECLARE_WRITE8_MEMBER(bios_ram_w); }; void funkball_state::video_start() @@ -265,60 +272,48 @@ WRITE8_MEMBER( funkball_state::fdc_w ) } -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(funkball_state::at_page8_r) { - funkball_state *state = space->machine().driver_data<funkball_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(funkball_state::at_page8_w) { - funkball_state *state = space->machine().driver_data<funkball_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} static READ8_DEVICE_HANDLER(at_dma8237_2_r) { @@ -352,23 +347,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(funkball_state::pc_dma_read_byte) { - funkball_state *state = space->machine().driver_data<funkball_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(funkball_state::pc_dma_write_byte) { - funkball_state *state = space->machine().driver_data<funkball_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -386,8 +379,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(funkball_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(funkball_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -516,23 +509,21 @@ WRITE8_MEMBER( funkball_state::flash_data_w ) printf("%08x %02x FLASH DATA W %08x\n",offset,data,m_flash_addr << 16); } -static READ32_HANDLER( biu_ctrl_r ) +READ32_MEMBER(funkball_state::biu_ctrl_r) { - funkball_state *state = space->machine().driver_data<funkball_state>(); if (offset == 0) { return 0xffffff; } - return state->m_biu_ctrl_reg[offset]; + return m_biu_ctrl_reg[offset]; } -static WRITE32_HANDLER( biu_ctrl_w ) +WRITE32_MEMBER(funkball_state::biu_ctrl_w) { - funkball_state *state = space->machine().driver_data<funkball_state>(); //mame_printf_debug("biu_ctrl_w %08X, %08X, %08X\n", data, offset, mem_mask); - COMBINE_DATA(state->m_biu_ctrl_reg + offset); + COMBINE_DATA(m_biu_ctrl_reg + offset); if (offset == 0x0c/4) // BC_XMAP_3 register { @@ -542,20 +533,19 @@ static WRITE32_HANDLER( biu_ctrl_w ) for(i=0;i<8;i++) { if (data & 0x1 << i*4) // enable RAM access to region 0xe0000 - 0xfffff - memory_set_bankptr(space->machine(), banknames[i], state->m_bios_ram + (0x4000 * i)); + memory_set_bankptr(machine(), banknames[i], m_bios_ram + (0x4000 * i)); else // disable RAM access (reads go to BIOS ROM) - memory_set_bankptr(space->machine(), banknames[i], space->machine().region("bios")->base() + (0x4000 * i)); + memory_set_bankptr(machine(), banknames[i], machine().region("bios")->base() + (0x4000 * i)); } } } -static WRITE8_HANDLER( bios_ram_w ) +WRITE8_MEMBER(funkball_state::bios_ram_w) { - funkball_state *state = space->machine().driver_data<funkball_state>(); - if(state->m_biu_ctrl_reg[0x0c/4] & (2 << ((offset & 0x4000)>>14)*4)) // memory is write-able + if(m_biu_ctrl_reg[0x0c/4] & (2 << ((offset & 0x4000)>>14)*4)) // memory is write-able { - state->m_bios_ram[offset] = data; + m_bios_ram[offset] = data; } } @@ -581,10 +571,10 @@ static ADDRESS_MAP_START(funkball_map, AS_PROGRAM, 32, funkball_state) AM_RANGE(0x000f4000, 0x000f7fff) AM_ROMBANK("bios_bank2") AM_RANGE(0x000f8000, 0x000fbfff) AM_ROMBANK("bios_bank3") AM_RANGE(0x000fc000, 0x000fffff) AM_ROMBANK("bios_bank4") - AM_RANGE(0x000e0000, 0x000fffff) AM_WRITE8_LEGACY(bios_ram_w,0xffffffff) + AM_RANGE(0x000e0000, 0x000fffff) AM_WRITE8(bios_ram_w,0xffffffff) AM_RANGE(0x00100000, 0x07ffffff) AM_RAM // AM_RANGE(0x08000000, 0x0fffffff) AM_NOP - AM_RANGE(0x40008000, 0x400080ff) AM_READWRITE_LEGACY(biu_ctrl_r, biu_ctrl_w) + AM_RANGE(0x40008000, 0x400080ff) AM_READWRITE(biu_ctrl_r, biu_ctrl_w) AM_RANGE(0x40010e00, 0x40010eff) AM_RAM AM_BASE(m_unk_ram) AM_RANGE(0xff000000, 0xffffdfff) AM_DEVREADWRITE_LEGACY("voodoo_0", voodoo_r, voodoo_w) AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */ @@ -596,7 +586,7 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00ef) AM_NOP diff --git a/src/mame/drivers/gamecstl.c b/src/mame/drivers/gamecstl.c index 692bb8c664a..200aacaf61f 100644 --- a/src/mame/drivers/gamecstl.c +++ b/src/mame/drivers/gamecstl.c @@ -96,6 +96,13 @@ public: device_t *m_pic8259_2; device_t *m_dma8237_1; device_t *m_dma8237_2; + DECLARE_WRITE32_MEMBER(pnp_config_w); + DECLARE_WRITE32_MEMBER(pnp_data_w); + DECLARE_WRITE32_MEMBER(bios_ram_w); + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); }; @@ -333,7 +340,7 @@ static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int functi } // ISA Plug-n-Play -static WRITE32_HANDLER( pnp_config_w ) +WRITE32_MEMBER(gamecstl_state::pnp_config_w) { if (ACCESSING_BITS_8_15) { @@ -341,7 +348,7 @@ static WRITE32_HANDLER( pnp_config_w ) } } -static WRITE32_HANDLER( pnp_data_w ) +WRITE32_MEMBER(gamecstl_state::pnp_data_w) { if (ACCESSING_BITS_8_15) { @@ -374,12 +381,11 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) -static WRITE32_HANDLER(bios_ram_w) +WRITE32_MEMBER(gamecstl_state::bios_ram_w) { - gamecstl_state *state = space->machine().driver_data<gamecstl_state>(); - if (state->m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled + if (m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled { - COMBINE_DATA(state->m_bios_ram + offset); + COMBINE_DATA(m_bios_ram + offset); } } @@ -392,48 +398,46 @@ static WRITE32_HANDLER(bios_ram_w) -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(gamecstl_state::at_page8_r) { - gamecstl_state *state = space->machine().driver_data<gamecstl_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(gamecstl_state::at_page8_w) { - gamecstl_state *state = space->machine().driver_data<gamecstl_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } @@ -448,23 +452,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(gamecstl_state::pc_dma_read_byte) { - gamecstl_state *state = space->machine().driver_data<gamecstl_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(gamecstl_state::pc_dma_write_byte) { - gamecstl_state *state = space->machine().driver_data<gamecstl_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -482,8 +484,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(gamecstl_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(gamecstl_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -500,16 +502,6 @@ static I8237_INTERFACE( dma8237_2_config ) { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } }; -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} /*****************************************************************************/ @@ -520,7 +512,7 @@ static ADDRESS_MAP_START( gamecstl_map, AS_PROGRAM, 32, gamecstl_state ) AM_RANGE(0x000b0000, 0x000b7fff) AM_RAM AM_BASE(m_cga_ram) AM_RANGE(0x000e0000, 0x000effff) AM_RAM AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1") - AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE_LEGACY(bios_ram_w) + AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w) AM_RANGE(0x00100000, 0x01ffffff) AM_RAM AM_RANGE(0xfffc0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */ ADDRESS_MAP_END @@ -531,7 +523,7 @@ static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state ) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00eb) AM_NOP @@ -539,9 +531,9 @@ static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state ) AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w) AM_RANGE(0x0300, 0x03af) AM_NOP AM_RANGE(0x03b0, 0x03df) AM_NOP - AM_RANGE(0x0278, 0x027b) AM_WRITE_LEGACY(pnp_config_w) + AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w) AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w) - AM_RANGE(0x0a78, 0x0a7b) AM_WRITE_LEGACY(pnp_data_w) + AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w) ADDRESS_MAP_END diff --git a/src/mame/drivers/gamtor.c b/src/mame/drivers/gamtor.c index ae694ca2f12..5785ea2a4ec 100644 --- a/src/mame/drivers/gamtor.c +++ b/src/mame/drivers/gamtor.c @@ -33,9 +33,10 @@ class gaminator_state : public driver_device public: gaminator_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) { } + DECLARE_WRITE32_MEMBER(gamtor_unk_w); }; -static WRITE32_HANDLER( gamtor_unk_w ) +WRITE32_MEMBER(gaminator_state::gamtor_unk_w) { } @@ -45,7 +46,7 @@ static WRITE32_HANDLER( gamtor_unk_w ) static ADDRESS_MAP_START( gaminator_map, AS_PROGRAM, 32, gaminator_state ) AM_RANGE(0x00000000, 0x07ffffff) AM_ROM AM_RANGE(0x08000000, 0x0bffffff) AM_RAM - AM_RANGE(0x1e040008, 0x1e04000b) AM_WRITE_LEGACY(gamtor_unk_w ) + AM_RANGE(0x1e040008, 0x1e04000b) AM_WRITE(gamtor_unk_w ) AM_RANGE(0x20000000, 0x2003ffff) AM_RAM diff --git a/src/mame/drivers/jaguar.c b/src/mame/drivers/jaguar.c index 59af326ea7e..0f4ad99b006 100644 --- a/src/mame/drivers/jaguar.c +++ b/src/mame/drivers/jaguar.c @@ -373,6 +373,69 @@ public: UINT64 m_main_speedup_last_cycles; UINT64 m_main_speedup_max_cycles; UINT32 *m_main_gpu_wait; + DECLARE_WRITE32_MEMBER(jaguar_eeprom_w); + DECLARE_READ32_MEMBER(jaguar_eeprom_clk); + DECLARE_READ32_MEMBER(jaguar_eeprom_cs); + DECLARE_READ32_MEMBER(misc_control_r); + DECLARE_WRITE32_MEMBER(misc_control_w); + DECLARE_READ32_MEMBER(gpuctrl_r); + DECLARE_WRITE32_MEMBER(gpuctrl_w); + DECLARE_READ32_MEMBER(dspctrl_r); + DECLARE_WRITE32_MEMBER(dspctrl_w); + DECLARE_READ32_MEMBER(jaguar_wave_rom_r); + DECLARE_READ32_MEMBER(joystick_r); + DECLARE_WRITE32_MEMBER(joystick_w); + DECLARE_WRITE32_MEMBER(latch_w); + DECLARE_READ32_MEMBER(eeprom_data_r); + DECLARE_WRITE32_MEMBER(eeprom_enable_w); + DECLARE_WRITE32_MEMBER(eeprom_data_w); + DECLARE_WRITE32_MEMBER(gpu_jump_w); + DECLARE_READ32_MEMBER(gpu_jump_r); + DECLARE_READ32_MEMBER(cojagr3k_main_speedup_r); + DECLARE_READ32_MEMBER(main_gpu_wait_r); + DECLARE_WRITE32_MEMBER(area51_main_speedup_w); + DECLARE_WRITE32_MEMBER(area51mx_main_speedup_w); + DECLARE_READ16_MEMBER(gpuctrl_r16); + DECLARE_WRITE16_MEMBER(gpuctrl_w16); + DECLARE_READ16_MEMBER(jaguar_blitter_r16); + DECLARE_WRITE16_MEMBER(jaguar_blitter_w16); + DECLARE_READ16_MEMBER(jaguar_serial_r16); + DECLARE_WRITE16_MEMBER(jaguar_serial_w16); + DECLARE_READ16_MEMBER(dspctrl_r16); + DECLARE_WRITE16_MEMBER(dspctrl_w16); + DECLARE_READ16_MEMBER(jaguar_eeprom_cs16); + DECLARE_READ16_MEMBER(jaguar_eeprom_clk16); + DECLARE_WRITE16_MEMBER(jaguar_eeprom_w16); + DECLARE_READ16_MEMBER(joystick_r16); + DECLARE_WRITE16_MEMBER(joystick_w16); + DECLARE_READ32_MEMBER(jaguar_shared_ram_r); + DECLARE_WRITE32_MEMBER(jaguar_shared_ram_w); + DECLARE_READ32_MEMBER(jaguar_rom_base_r); + DECLARE_WRITE32_MEMBER(jaguar_rom_base_w); + DECLARE_READ32_MEMBER(jaguar_cart_base_r); + DECLARE_WRITE32_MEMBER(jaguar_cart_base_w); + DECLARE_READ32_MEMBER(high_rom_base_r); + DECLARE_WRITE32_MEMBER(high_rom_base_w); + DECLARE_READ32_MEMBER(jaguar_dsp_ram_r); + DECLARE_WRITE32_MEMBER(jaguar_dsp_ram_w); + DECLARE_READ32_MEMBER(jaguar_gpu_clut_r); + DECLARE_WRITE32_MEMBER(jaguar_gpu_clut_w); + DECLARE_READ32_MEMBER(jaguar_gpu_ram_r); + DECLARE_WRITE32_MEMBER(jaguar_gpu_ram_w); + DECLARE_READ16_MEMBER(jaguar_shared_ram_r16); + DECLARE_WRITE16_MEMBER(jaguar_shared_ram_w16); + DECLARE_READ16_MEMBER(jaguar_rom_base_r16); + DECLARE_WRITE16_MEMBER(jaguar_rom_base_w16); + DECLARE_READ16_MEMBER(jaguar_cart_base_r16); + DECLARE_WRITE16_MEMBER(jaguar_cart_base_w16); + DECLARE_READ16_MEMBER(high_rom_base_r16); + DECLARE_WRITE16_MEMBER(high_rom_base_w16); + DECLARE_READ16_MEMBER(jaguar_dsp_ram_r16); + DECLARE_WRITE16_MEMBER(jaguar_dsp_ram_w16); + DECLARE_READ16_MEMBER(jaguar_gpu_clut_r16); + DECLARE_WRITE16_MEMBER(jaguar_gpu_clut_w16); + DECLARE_READ16_MEMBER(jaguar_gpu_ram_r16); + DECLARE_WRITE16_MEMBER(jaguar_gpu_ram_w16); }; @@ -581,9 +644,9 @@ static NVRAM_HANDLER( jaguar ) } } */ -static WRITE32_HANDLER( jaguar_eeprom_w ) +WRITE32_MEMBER(cojag_state::jaguar_eeprom_w) { - eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom"); + eeprom_device *eeprom = machine().device<eeprom_device>("eeprom"); eeprom_bit_count++; if (eeprom_bit_count != 9) /* kill extra bit at end of address */ { @@ -592,16 +655,16 @@ static WRITE32_HANDLER( jaguar_eeprom_w ) } } -static READ32_HANDLER( jaguar_eeprom_clk ) +READ32_MEMBER(cojag_state::jaguar_eeprom_clk) { - eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom"); + eeprom_device *eeprom = machine().device<eeprom_device>("eeprom"); eeprom->set_clock_line(PULSE_LINE); /* get next bit when reading */ return 0; } -static READ32_HANDLER( jaguar_eeprom_cs ) +READ32_MEMBER(cojag_state::jaguar_eeprom_cs) { - eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom"); + eeprom_device *eeprom = machine().device<eeprom_device>("eeprom"); eeprom->set_cs_line(ASSERT_LINE); /* must do at end of an operation */ eeprom->set_cs_line(CLEAR_LINE); /* enable chip for next operation */ eeprom->write_bit(1); /* write a start bit */ @@ -618,9 +681,8 @@ static READ32_HANDLER( jaguar_eeprom_cs ) * *************************************/ -static READ32_HANDLER( misc_control_r ) +READ32_MEMBER(cojag_state::misc_control_r) { - cojag_state *state = space->machine().driver_data<cojag_state>(); /* D7 = board reset (low) D6 = audio must & reset (high) D5 = volume control data (invert on write) @@ -628,14 +690,13 @@ static READ32_HANDLER( misc_control_r ) D3-D1 = audio bank 2-0 D0 = shared memory select (0=XBUS) */ - return state->m_misc_control_data ^ 0x20; + return m_misc_control_data ^ 0x20; } -static WRITE32_HANDLER( misc_control_w ) +WRITE32_MEMBER(cojag_state::misc_control_w) { - cojag_state *state = space->machine().driver_data<cojag_state>(); - logerror("%08X:misc_control_w(%02X)\n", cpu_get_previouspc(&space->device()), data); + logerror("%08X:misc_control_w(%02X)\n", cpu_get_previouspc(&space.device()), data); /* D7 = board reset (low) D6 = audio must & reset (high) @@ -648,22 +709,22 @@ static WRITE32_HANDLER( misc_control_w ) if (!(data & 0x80)) { /* clear any spinuntil stuff */ - jaguar_gpu_resume(space->machine()); - jaguar_dsp_resume(space->machine()); + jaguar_gpu_resume(machine()); + jaguar_dsp_resume(machine()); /* halt the CPUs */ - jaguargpu_ctrl_w(space->machine().device("gpu"), G_CTRL, 0, 0xffffffff); - jaguardsp_ctrl_w(space->machine().device("audiocpu"), D_CTRL, 0, 0xffffffff); + jaguargpu_ctrl_w(machine().device("gpu"), G_CTRL, 0, 0xffffffff); + jaguardsp_ctrl_w(machine().device("audiocpu"), D_CTRL, 0, 0xffffffff); } /* adjust banking */ - if (space->machine().region("user2")->base()) + if (machine().region("user2")->base()) { - memory_set_bank(space->machine(), "bank2", (data >> 1) & 7); - memory_set_bank(space->machine(), "bank9", (data >> 1) & 7); + memory_set_bank(machine(), "bank2", (data >> 1) & 7); + memory_set_bank(machine(), "bank9", (data >> 1) & 7); } - COMBINE_DATA(&state->m_misc_control_data); + COMBINE_DATA(&m_misc_control_data); } @@ -674,9 +735,9 @@ static WRITE32_HANDLER( misc_control_w ) *************************************/ // shouldn't the DSPs be doing this calc, why is this needed for Jaguar? -static READ32_HANDLER( gpuctrl_r ) +READ32_MEMBER(cojag_state::gpuctrl_r) { - UINT32 result = jaguargpu_ctrl_r(space->machine().device("gpu"), offset); + UINT32 result = jaguargpu_ctrl_r(machine().device("gpu"), offset); if (is_jaguar) { @@ -691,12 +752,12 @@ static READ32_HANDLER( gpuctrl_r ) } -static WRITE32_HANDLER( gpuctrl_w ) +WRITE32_MEMBER(cojag_state::gpuctrl_w) { if (is_jaguar) if ((!protection_check) && (offset == 5) && (data == 1)) protection_check++; - jaguargpu_ctrl_w(space->machine().device("gpu"), offset, data, mem_mask); + jaguargpu_ctrl_w(machine().device("gpu"), offset, data, mem_mask); } @@ -707,19 +768,19 @@ static WRITE32_HANDLER( gpuctrl_w ) * *************************************/ -static READ32_HANDLER( dspctrl_r ) +READ32_MEMBER(cojag_state::dspctrl_r) { - return jaguardsp_ctrl_r(space->machine().device("audiocpu"), offset); + return jaguardsp_ctrl_r(machine().device("audiocpu"), offset); } -static WRITE32_HANDLER( dspctrl_w ) +WRITE32_MEMBER(cojag_state::dspctrl_w) { - jaguardsp_ctrl_w(space->machine().device("audiocpu"), offset, data, mem_mask); + jaguardsp_ctrl_w(machine().device("audiocpu"), offset, data, mem_mask); } -static READ32_HANDLER( jaguar_wave_rom_r ) +READ32_MEMBER(cojag_state::jaguar_wave_rom_r) { return jaguar_wave_rom[offset]; } @@ -734,7 +795,7 @@ static READ32_HANDLER( jaguar_wave_rom_r ) * *************************************/ -static READ32_HANDLER( joystick_r ) +READ32_MEMBER(cojag_state::joystick_r) { UINT16 joystick_result = 0xfffe; UINT16 joybuts_result = 0xffef; @@ -763,18 +824,18 @@ static READ32_HANDLER( joystick_r ) { if ((joystick_data & (0x10000 << i)) == 0) { - joystick_result &= input_port_read(space->machine(), keynames[0][i]); - joybuts_result &= input_port_read(space->machine(), keynames[1][i]); + joystick_result &= input_port_read(machine(), keynames[0][i]); + joybuts_result &= input_port_read(machine(), keynames[1][i]); } } - joystick_result |= space->machine().device<eeprom_device>("eeprom")->read_bit(); - joybuts_result |= (input_port_read(space->machine(), "CONFIG") & 0x10); + joystick_result |= machine().device<eeprom_device>("eeprom")->read_bit(); + joybuts_result |= (input_port_read(machine(), "CONFIG") & 0x10); return (joystick_result << 16) | joybuts_result; } -static WRITE32_HANDLER( joystick_w ) +WRITE32_MEMBER(cojag_state::joystick_w) { /* * 16 12 8 4 0 @@ -832,16 +893,16 @@ static WRITE32_HANDLER( joystick_w ) * *************************************/ -static WRITE32_HANDLER( latch_w ) +WRITE32_MEMBER(cojag_state::latch_w) { - logerror("%08X:latch_w(%X)\n", cpu_get_previouspc(&space->device()), data); + logerror("%08X:latch_w(%X)\n", cpu_get_previouspc(&space.device()), data); /* adjust banking */ - if (space->machine().region("user2")->base()) + if (machine().region("user2")->base()) { if (cojag_is_r3000) - memory_set_bank(space->machine(), "bank1", data & 1); - memory_set_bank(space->machine(), "bank8", data & 1); + memory_set_bank(machine(), "bank1", data & 1); + memory_set_bank(machine(), "bank8", data & 1); } } @@ -853,36 +914,33 @@ static WRITE32_HANDLER( latch_w ) * *************************************/ -static READ32_HANDLER( eeprom_data_r ) +READ32_MEMBER(cojag_state::eeprom_data_r) { - cojag_state *state = space->machine().driver_data<cojag_state>(); if (cojag_is_r3000) - return state->m_nvram[offset] | 0xffffff00; + return m_nvram[offset] | 0xffffff00; else - return state->m_nvram[offset] | 0x00ffffff; + return m_nvram[offset] | 0x00ffffff; } -static WRITE32_HANDLER( eeprom_enable_w ) +WRITE32_MEMBER(cojag_state::eeprom_enable_w) { - cojag_state *state = space->machine().driver_data<cojag_state>(); - state->m_eeprom_enable = 1; + m_eeprom_enable = 1; } -static WRITE32_HANDLER( eeprom_data_w ) +WRITE32_MEMBER(cojag_state::eeprom_data_w) { - cojag_state *state = space->machine().driver_data<cojag_state>(); -// if (state->m_eeprom_enable) +// if (m_eeprom_enable) { if (cojag_is_r3000) - state->m_nvram[offset] = data & 0x000000ff; + m_nvram[offset] = data & 0x000000ff; else - state->m_nvram[offset] = data & 0xff000000; + m_nvram[offset] = data & 0xff000000; } // else -// logerror("%08X:error writing to disabled EEPROM\n", cpu_get_previouspc(&space->device())); - state->m_eeprom_enable = 0; +// logerror("%08X:error writing to disabled EEPROM\n", cpu_get_previouspc(&space.device())); + m_eeprom_enable = 0; } @@ -924,40 +982,38 @@ static TIMER_CALLBACK( gpu_sync_timer ) } -static WRITE32_HANDLER( gpu_jump_w ) +WRITE32_MEMBER(cojag_state::gpu_jump_w) { - cojag_state *state = space->machine().driver_data<cojag_state>(); /* update the data in memory */ - COMBINE_DATA(state->m_gpu_jump_address); - logerror("%08X:GPU jump address = %08X\n", cpu_get_previouspc(&space->device()), *state->m_gpu_jump_address); + COMBINE_DATA(m_gpu_jump_address); + logerror("%08X:GPU jump address = %08X\n", cpu_get_previouspc(&space.device()), *m_gpu_jump_address); /* if the GPU is suspended, release it now */ - jaguar_gpu_resume(space->machine()); + jaguar_gpu_resume(machine()); /* start the sync timer going, and note that there is a command pending */ - space->machine().scheduler().synchronize(FUNC(gpu_sync_timer)); - state->m_gpu_command_pending = 1; + machine().scheduler().synchronize(FUNC(gpu_sync_timer)); + m_gpu_command_pending = 1; } -static READ32_HANDLER( gpu_jump_r ) +READ32_MEMBER(cojag_state::gpu_jump_r) { - cojag_state *state = space->machine().driver_data<cojag_state>(); /* if the current GPU command is just pointing back to the spin loop, and */ /* we're reading it from the spin loop, we can optimize */ - if (*state->m_gpu_jump_address == state->m_gpu_spin_pc && cpu_get_previouspc(&space->device()) == state->m_gpu_spin_pc) + if (*m_gpu_jump_address == m_gpu_spin_pc && cpu_get_previouspc(&space.device()) == m_gpu_spin_pc) { #if ENABLE_SPEEDUP_HACKS /* spin if we're allowed */ - if (jaguar_hacks_enabled) jaguar_gpu_suspend(space->machine()); + if (jaguar_hacks_enabled) jaguar_gpu_suspend(machine()); #endif /* no command is pending */ - state->m_gpu_command_pending = 0; + m_gpu_command_pending = 0; } /* return the current value */ - return *state->m_gpu_jump_address; + return *m_gpu_jump_address; } @@ -982,31 +1038,30 @@ static READ32_HANDLER( gpu_jump_r ) #if ENABLE_SPEEDUP_HACKS -static READ32_HANDLER( cojagr3k_main_speedup_r ) +READ32_MEMBER(cojag_state::cojagr3k_main_speedup_r) { - cojag_state *state = space->machine().driver_data<cojag_state>(); - UINT64 curcycles = state->m_main_cpu->total_cycles(); + UINT64 curcycles = m_main_cpu->total_cycles(); /* if it's been less than main_speedup_max_cycles cycles since the last time */ - if (curcycles - state->m_main_speedup_last_cycles < state->m_main_speedup_max_cycles) + if (curcycles - m_main_speedup_last_cycles < m_main_speedup_max_cycles) { /* increment the count; if we hit 5, we can spin until an interrupt comes */ - if (state->m_main_speedup_hits++ > 5) + if (m_main_speedup_hits++ > 5) { - device_spin_until_interrupt(&space->device()); - state->m_main_speedup_hits = 0; + device_spin_until_interrupt(&space.device()); + m_main_speedup_hits = 0; } } /* if it's been more than main_speedup_max_cycles cycles, reset our count */ else - state->m_main_speedup_hits = 0; + m_main_speedup_hits = 0; /* remember the last cycle count */ - state->m_main_speedup_last_cycles = curcycles; + m_main_speedup_last_cycles = curcycles; /* return the real value */ - return *state->m_main_speedup; + return *m_main_speedup; } #endif @@ -1031,12 +1086,11 @@ static READ32_HANDLER( cojagr3k_main_speedup_r ) #if ENABLE_SPEEDUP_HACKS -static READ32_HANDLER( main_gpu_wait_r ) +READ32_MEMBER(cojag_state::main_gpu_wait_r) { - cojag_state *state = space->machine().driver_data<cojag_state>(); - if (state->m_gpu_command_pending) - device_spin_until_interrupt(&space->device()); - return *state->m_main_gpu_wait; + if (m_gpu_command_pending) + device_spin_until_interrupt(&space.device()); + return *m_main_gpu_wait; } #endif @@ -1058,31 +1112,30 @@ static READ32_HANDLER( main_gpu_wait_r ) #if ENABLE_SPEEDUP_HACKS -static WRITE32_HANDLER( area51_main_speedup_w ) +WRITE32_MEMBER(cojag_state::area51_main_speedup_w) { - cojag_state *state = space->machine().driver_data<cojag_state>(); - UINT64 curcycles = state->m_main_cpu->total_cycles(); + UINT64 curcycles = m_main_cpu->total_cycles(); /* store the data */ - COMBINE_DATA(state->m_main_speedup); + COMBINE_DATA(m_main_speedup); /* if it's been less than 400 cycles since the last time */ - if (*state->m_main_speedup == 0 && curcycles - state->m_main_speedup_last_cycles < 400) + if (*m_main_speedup == 0 && curcycles - m_main_speedup_last_cycles < 400) { /* increment the count; if we hit 5, we can spin until an interrupt comes */ - if (state->m_main_speedup_hits++ > 5) + if (m_main_speedup_hits++ > 5) { - device_spin_until_interrupt(&space->device()); - state->m_main_speedup_hits = 0; + device_spin_until_interrupt(&space.device()); + m_main_speedup_hits = 0; } } /* if it's been more than 400 cycles, reset our count */ else - state->m_main_speedup_hits = 0; + m_main_speedup_hits = 0; /* remember the last cycle count */ - state->m_main_speedup_last_cycles = curcycles; + m_main_speedup_last_cycles = curcycles; } @@ -1093,31 +1146,30 @@ static WRITE32_HANDLER( area51_main_speedup_w ) against 0 must handle that explicitly. */ -static WRITE32_HANDLER( area51mx_main_speedup_w ) +WRITE32_MEMBER(cojag_state::area51mx_main_speedup_w) { - cojag_state *state = space->machine().driver_data<cojag_state>(); - UINT64 curcycles = state->m_main_cpu->total_cycles(); + UINT64 curcycles = m_main_cpu->total_cycles(); /* store the data */ - COMBINE_DATA(&state->m_main_speedup[offset]); + COMBINE_DATA(&m_main_speedup[offset]); /* if it's been less than 450 cycles since the last time */ - if (((state->m_main_speedup[0] << 16) | (state->m_main_speedup[1] >> 16)) == 0 && curcycles - state->m_main_speedup_last_cycles < 450) + if (((m_main_speedup[0] << 16) | (m_main_speedup[1] >> 16)) == 0 && curcycles - m_main_speedup_last_cycles < 450) { /* increment the count; if we hit 5, we can spin until an interrupt comes */ - if (state->m_main_speedup_hits++ > 10) + if (m_main_speedup_hits++ > 10) { - device_spin_until_interrupt(&space->device()); - state->m_main_speedup_hits = 0; + device_spin_until_interrupt(&space.device()); + m_main_speedup_hits = 0; } } /* if it's been more than 450 cycles, reset our count */ else - state->m_main_speedup_hits = 0; + m_main_speedup_hits = 0; /* remember the last cycle count */ - state->m_main_speedup_last_cycles = curcycles; + m_main_speedup_last_cycles = curcycles; } #endif @@ -1136,69 +1188,69 @@ static WRITE32_HANDLER( area51mx_main_speedup_w ) // surely these should be 16-bit natively if the standard Jaguar is driven by a plain 68k? // all these trampolines are not good for performance ;-) -static READ16_HANDLER( gpuctrl_r16 ) { if (!(offset&1)) { return gpuctrl_r(space, offset>>1, mem_mask<<16) >> 16; } else { return gpuctrl_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( gpuctrl_w16 ) { if (!(offset&1)) { gpuctrl_w(space, offset>>1, data << 16, mem_mask << 16); } else { gpuctrl_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_blitter_r16 ) { if (!(offset&1)) { return jaguar_blitter_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_blitter_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_blitter_w16 ) { if (!(offset&1)) { jaguar_blitter_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_blitter_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_serial_r16 ) { if (!(offset&1)) { return jaguar_serial_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_serial_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_serial_w16 ) { if (!(offset&1)) { jaguar_serial_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_serial_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( dspctrl_r16 ) { if (!(offset&1)) { return dspctrl_r(space, offset>>1, mem_mask<<16) >> 16; } else { return dspctrl_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( dspctrl_w16 ) { if (!(offset&1)) { dspctrl_w(space, offset>>1, data << 16, mem_mask << 16); } else { dspctrl_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_eeprom_cs16 ) { if (!(offset&1)) { return jaguar_eeprom_cs(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_eeprom_cs(space, offset>>1, mem_mask); } } -static READ16_HANDLER( jaguar_eeprom_clk16 ) { if (!(offset&1)) { return jaguar_eeprom_clk(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_eeprom_clk(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_eeprom_w16 ) { if (!(offset&1)) { jaguar_eeprom_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_eeprom_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( joystick_r16 ) { if (!(offset&1)) { return joystick_r(space, offset>>1, mem_mask<<16) >> 16; } else { return joystick_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( joystick_w16 ) { if (!(offset&1)) { joystick_w(space, offset>>1, data << 16, mem_mask << 16); } else { joystick_w(space, offset>>1, data, mem_mask); } } - -static READ32_HANDLER( jaguar_shared_ram_r ) { return jaguar_shared_ram[offset]; } -static WRITE32_HANDLER( jaguar_shared_ram_w ) { COMBINE_DATA(&jaguar_shared_ram[offset]); } -static READ32_HANDLER( jaguar_rom_base_r ) { return rom_base[offset]; } -static WRITE32_HANDLER( jaguar_rom_base_w ) { /*ROM!*/ } -static READ32_HANDLER( jaguar_cart_base_r ) { return cart_base[offset]; } -static WRITE32_HANDLER( jaguar_cart_base_w ) { /*ROM!*/ } -static READ32_HANDLER( high_rom_base_r ) { return high_rom_base[offset]; } -static WRITE32_HANDLER( high_rom_base_w ) { /*ROM!*/ } -static READ32_HANDLER( jaguar_dsp_ram_r ) { return jaguar_dsp_ram[offset]; } -static WRITE32_HANDLER( jaguar_dsp_ram_w ) { COMBINE_DATA(&jaguar_dsp_ram[offset]); } -static READ32_HANDLER( jaguar_gpu_clut_r ) { return jaguar_gpu_clut[offset]; } -static WRITE32_HANDLER( jaguar_gpu_clut_w ) { COMBINE_DATA(&jaguar_gpu_clut[offset]); } -static READ32_HANDLER( jaguar_gpu_ram_r ) { return jaguar_gpu_ram[offset]; } -static WRITE32_HANDLER( jaguar_gpu_ram_w ) { COMBINE_DATA(&jaguar_gpu_ram[offset]); } - -static READ16_HANDLER( jaguar_shared_ram_r16 ) { if (!(offset&1)) { return jaguar_shared_ram_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_shared_ram_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_shared_ram_w16 ) { if (!(offset&1)) { jaguar_shared_ram_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_shared_ram_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_rom_base_r16 ) { if (!(offset&1)) { return jaguar_rom_base_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_rom_base_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_rom_base_w16 ) { if (!(offset&1)) { jaguar_rom_base_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_rom_base_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_cart_base_r16 ) { if (!(offset&1)) { return jaguar_cart_base_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_cart_base_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_cart_base_w16 ) { if (!(offset&1)) { jaguar_cart_base_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_cart_base_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( high_rom_base_r16 ) { if (!(offset&1)) { return high_rom_base_r(space, offset>>1, mem_mask<<16) >> 16; } else { return high_rom_base_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( high_rom_base_w16 ) { if (!(offset&1)) { high_rom_base_w(space, offset>>1, data << 16, mem_mask << 16); } else { high_rom_base_w(space, offset>>1, data, mem_mask); } } - -static READ16_HANDLER( jaguar_dsp_ram_r16 ) { if (!(offset&1)) { return jaguar_dsp_ram_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_dsp_ram_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_dsp_ram_w16 ) { if (!(offset&1)) { jaguar_dsp_ram_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_dsp_ram_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_gpu_clut_r16 ) { if (!(offset&1)) { return jaguar_gpu_clut_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_gpu_clut_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_gpu_clut_w16 ) { if (!(offset&1)) { jaguar_gpu_clut_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_gpu_clut_w(space, offset>>1, data, mem_mask); } } -static READ16_HANDLER( jaguar_gpu_ram_r16 ) { if (!(offset&1)) { return jaguar_gpu_ram_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_gpu_ram_r(space, offset>>1, mem_mask); } } -static WRITE16_HANDLER( jaguar_gpu_ram_w16 ) { if (!(offset&1)) { jaguar_gpu_ram_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_gpu_ram_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::gpuctrl_r16){ if (!(offset&1)) { return gpuctrl_r(space, offset>>1, mem_mask<<16) >> 16; } else { return gpuctrl_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::gpuctrl_w16){ if (!(offset&1)) { gpuctrl_w(space, offset>>1, data << 16, mem_mask << 16); } else { gpuctrl_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_blitter_r16){ if (!(offset&1)) { return jaguar_blitter_r(&space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_blitter_r(&space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_blitter_w16){ if (!(offset&1)) { jaguar_blitter_w(&space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_blitter_w(&space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_serial_r16){ if (!(offset&1)) { return jaguar_serial_r(&space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_serial_r(&space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_serial_w16){ if (!(offset&1)) { jaguar_serial_w(&space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_serial_w(&space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::dspctrl_r16){ if (!(offset&1)) { return dspctrl_r(space, offset>>1, mem_mask<<16) >> 16; } else { return dspctrl_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::dspctrl_w16){ if (!(offset&1)) { dspctrl_w(space, offset>>1, data << 16, mem_mask << 16); } else { dspctrl_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_eeprom_cs16){ if (!(offset&1)) { return jaguar_eeprom_cs(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_eeprom_cs(space, offset>>1, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_eeprom_clk16){ if (!(offset&1)) { return jaguar_eeprom_clk(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_eeprom_clk(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_eeprom_w16){ if (!(offset&1)) { jaguar_eeprom_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_eeprom_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::joystick_r16){ if (!(offset&1)) { return joystick_r(space, offset>>1, mem_mask<<16) >> 16; } else { return joystick_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::joystick_w16){ if (!(offset&1)) { joystick_w(space, offset>>1, data << 16, mem_mask << 16); } else { joystick_w(space, offset>>1, data, mem_mask); } } + +READ32_MEMBER(cojag_state::jaguar_shared_ram_r){ return jaguar_shared_ram[offset]; } +WRITE32_MEMBER(cojag_state::jaguar_shared_ram_w){ COMBINE_DATA(&jaguar_shared_ram[offset]); } +READ32_MEMBER(cojag_state::jaguar_rom_base_r){ return rom_base[offset]; } +WRITE32_MEMBER(cojag_state::jaguar_rom_base_w){ /*ROM!*/ } +READ32_MEMBER(cojag_state::jaguar_cart_base_r){ return cart_base[offset]; } +WRITE32_MEMBER(cojag_state::jaguar_cart_base_w){ /*ROM!*/ } +READ32_MEMBER(cojag_state::high_rom_base_r){ return high_rom_base[offset]; } +WRITE32_MEMBER(cojag_state::high_rom_base_w){ /*ROM!*/ } +READ32_MEMBER(cojag_state::jaguar_dsp_ram_r){ return jaguar_dsp_ram[offset]; } +WRITE32_MEMBER(cojag_state::jaguar_dsp_ram_w){ COMBINE_DATA(&jaguar_dsp_ram[offset]); } +READ32_MEMBER(cojag_state::jaguar_gpu_clut_r){ return jaguar_gpu_clut[offset]; } +WRITE32_MEMBER(cojag_state::jaguar_gpu_clut_w){ COMBINE_DATA(&jaguar_gpu_clut[offset]); } +READ32_MEMBER(cojag_state::jaguar_gpu_ram_r){ return jaguar_gpu_ram[offset]; } +WRITE32_MEMBER(cojag_state::jaguar_gpu_ram_w){ COMBINE_DATA(&jaguar_gpu_ram[offset]); } + +READ16_MEMBER(cojag_state::jaguar_shared_ram_r16){ if (!(offset&1)) { return jaguar_shared_ram_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_shared_ram_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_shared_ram_w16){ if (!(offset&1)) { jaguar_shared_ram_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_shared_ram_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_rom_base_r16){ if (!(offset&1)) { return jaguar_rom_base_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_rom_base_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_rom_base_w16){ if (!(offset&1)) { jaguar_rom_base_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_rom_base_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_cart_base_r16){ if (!(offset&1)) { return jaguar_cart_base_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_cart_base_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_cart_base_w16){ if (!(offset&1)) { jaguar_cart_base_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_cart_base_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::high_rom_base_r16){ if (!(offset&1)) { return high_rom_base_r(space, offset>>1, mem_mask<<16) >> 16; } else { return high_rom_base_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::high_rom_base_w16){ if (!(offset&1)) { high_rom_base_w(space, offset>>1, data << 16, mem_mask << 16); } else { high_rom_base_w(space, offset>>1, data, mem_mask); } } + +READ16_MEMBER(cojag_state::jaguar_dsp_ram_r16){ if (!(offset&1)) { return jaguar_dsp_ram_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_dsp_ram_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_dsp_ram_w16){ if (!(offset&1)) { jaguar_dsp_ram_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_dsp_ram_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_gpu_clut_r16){ if (!(offset&1)) { return jaguar_gpu_clut_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_gpu_clut_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_gpu_clut_w16){ if (!(offset&1)) { jaguar_gpu_clut_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_gpu_clut_w(space, offset>>1, data, mem_mask); } } +READ16_MEMBER(cojag_state::jaguar_gpu_ram_r16){ if (!(offset&1)) { return jaguar_gpu_ram_r(space, offset>>1, mem_mask<<16) >> 16; } else { return jaguar_gpu_ram_r(space, offset>>1, mem_mask); } } +WRITE16_MEMBER(cojag_state::jaguar_gpu_ram_w16){ if (!(offset&1)) { jaguar_gpu_ram_w(space, offset>>1, data << 16, mem_mask << 16); } else { jaguar_gpu_ram_w(space, offset>>1, data, mem_mask); } } static ADDRESS_MAP_START( jaguar_map, AS_PROGRAM, 16, cojag_state ) ADDRESS_MAP_GLOBAL_MASK(0xffffff) - AM_RANGE(0x000000, 0x1fffff) AM_MIRROR(0x200000) AM_READWRITE_LEGACY(jaguar_shared_ram_r16, jaguar_shared_ram_w16 ); - AM_RANGE(0x800000, 0xdfffff) AM_READWRITE_LEGACY(jaguar_cart_base_r16, jaguar_cart_base_w16 ) - AM_RANGE(0xe00000, 0xe1ffff) AM_READWRITE_LEGACY(jaguar_rom_base_r16, jaguar_rom_base_w16 ) + AM_RANGE(0x000000, 0x1fffff) AM_MIRROR(0x200000) AM_READWRITE(jaguar_shared_ram_r16, jaguar_shared_ram_w16 ); + AM_RANGE(0x800000, 0xdfffff) AM_READWRITE(jaguar_cart_base_r16, jaguar_cart_base_w16 ) + AM_RANGE(0xe00000, 0xe1ffff) AM_READWRITE(jaguar_rom_base_r16, jaguar_rom_base_w16 ) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE_LEGACY(jaguar_tom_regs_r, jaguar_tom_regs_w) // might be reversed endian of the others.. - AM_RANGE(0xf00400, 0xf005ff) AM_MIRROR(0x000200) AM_READWRITE_LEGACY(jaguar_gpu_clut_r16, jaguar_gpu_clut_w16 ) - AM_RANGE(0xf02100, 0xf021ff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(gpuctrl_r16, gpuctrl_w16) - AM_RANGE(0xf02200, 0xf022ff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(jaguar_blitter_r16, jaguar_blitter_w16) - AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(jaguar_gpu_ram_r16, jaguar_gpu_ram_w16 ) + AM_RANGE(0xf00400, 0xf005ff) AM_MIRROR(0x000200) AM_READWRITE(jaguar_gpu_clut_r16, jaguar_gpu_clut_w16 ) + AM_RANGE(0xf02100, 0xf021ff) AM_MIRROR(0x008000) AM_READWRITE(gpuctrl_r16, gpuctrl_w16) + AM_RANGE(0xf02200, 0xf022ff) AM_MIRROR(0x008000) AM_READWRITE(jaguar_blitter_r16, jaguar_blitter_w16) + AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_READWRITE(jaguar_gpu_ram_r16, jaguar_gpu_ram_w16 ) AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs_r, jaguar_jerry_regs_w) // might be reversed endian of the others.. - AM_RANGE(0xf14000, 0xf14003) AM_READWRITE_LEGACY(joystick_r16, joystick_w16) - AM_RANGE(0xf14800, 0xf14803) AM_READWRITE_LEGACY(jaguar_eeprom_clk16,jaguar_eeprom_w16) // GPI00 - AM_RANGE(0xf15000, 0xf15003) AM_READ_LEGACY(jaguar_eeprom_cs16) // GPI01 - AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE_LEGACY(dspctrl_r16, dspctrl_w16) - AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE_LEGACY(jaguar_serial_r16, jaguar_serial_w16) - AM_RANGE(0xf1b000, 0xf1cfff) AM_READWRITE_LEGACY(jaguar_dsp_ram_r16, jaguar_dsp_ram_w16) - AM_RANGE(0xf1d000, 0xf1dfff) AM_READWRITE_LEGACY(high_rom_base_r16, high_rom_base_w16 ) + AM_RANGE(0xf14000, 0xf14003) AM_READWRITE(joystick_r16, joystick_w16) + AM_RANGE(0xf14800, 0xf14803) AM_READWRITE(jaguar_eeprom_clk16,jaguar_eeprom_w16) // GPI00 + AM_RANGE(0xf15000, 0xf15003) AM_READ(jaguar_eeprom_cs16) // GPI01 + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r16, dspctrl_w16) + AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r16, jaguar_serial_w16) + AM_RANGE(0xf1b000, 0xf1cfff) AM_READWRITE(jaguar_dsp_ram_r16, jaguar_dsp_ram_w16) + AM_RANGE(0xf1d000, 0xf1dfff) AM_READWRITE(high_rom_base_r16, high_rom_base_w16 ) ADDRESS_MAP_END @@ -1216,24 +1268,24 @@ static ADDRESS_MAP_START( r3000_map, AS_PROGRAM, 32, cojag_state ) AM_RANGE(0x04e00000, 0x04e003ff) AM_DEVREADWRITE_LEGACY("ide", ide_controller32_r, ide_controller32_w) AM_RANGE(0x04f00000, 0x04f003ff) AM_READWRITE_LEGACY(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0x04f00400, 0x04f007ff) AM_RAM AM_BASE_LEGACY(&jaguar_gpu_clut) AM_SHARE("share2") - AM_RANGE(0x04f02100, 0x04f021ff) AM_READWRITE_LEGACY(gpuctrl_r, gpuctrl_w) + AM_RANGE(0x04f02100, 0x04f021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w) AM_RANGE(0x04f02200, 0x04f022ff) AM_READWRITE_LEGACY(jaguar_blitter_r, jaguar_blitter_w) AM_RANGE(0x04f03000, 0x04f03fff) AM_MIRROR(0x00008000) AM_RAM AM_BASE_LEGACY(&jaguar_gpu_ram) AM_SHARE("share3") AM_RANGE(0x04f10000, 0x04f103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) AM_RANGE(0x04f16000, 0x04f1600b) AM_READ_LEGACY(cojag_gun_input_r) // GPI02 AM_RANGE(0x04f17000, 0x04f17003) AM_READ_PORT("SYSTEM") // GPI03 - AM_RANGE(0x04f17800, 0x04f17803) AM_WRITE_LEGACY(latch_w) // GPI04 + AM_RANGE(0x04f17800, 0x04f17803) AM_WRITE(latch_w) // GPI04 AM_RANGE(0x04f17c00, 0x04f17c03) AM_READ_PORT("P1_P2") // GPI05 - AM_RANGE(0x04f1a100, 0x04f1a13f) AM_READWRITE_LEGACY(dspctrl_r, dspctrl_w) + AM_RANGE(0x04f1a100, 0x04f1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) AM_RANGE(0x04f1a140, 0x04f1a17f) AM_READWRITE_LEGACY(jaguar_serial_r, jaguar_serial_w) AM_RANGE(0x04f1b000, 0x04f1cfff) AM_RAM AM_BASE_LEGACY(&jaguar_dsp_ram) AM_SHARE("share4") - AM_RANGE(0x06000000, 0x06000003) AM_READWRITE_LEGACY(misc_control_r, misc_control_w) + AM_RANGE(0x06000000, 0x06000003) AM_READWRITE(misc_control_r, misc_control_w) AM_RANGE(0x10000000, 0x1007ffff) AM_RAM AM_RANGE(0x12000000, 0x120fffff) AM_RAM // tested in self-test only? AM_RANGE(0x14000004, 0x14000007) AM_WRITE(watchdog_reset32_w) - AM_RANGE(0x16000000, 0x16000003) AM_WRITE_LEGACY(eeprom_enable_w) - AM_RANGE(0x18000000, 0x18001fff) AM_READWRITE_LEGACY(eeprom_data_r, eeprom_data_w) AM_SHARE("nvram") + AM_RANGE(0x16000000, 0x16000003) AM_WRITE(eeprom_enable_w) + AM_RANGE(0x18000000, 0x18001fff) AM_READWRITE(eeprom_data_r, eeprom_data_w) AM_SHARE("nvram") AM_RANGE(0x1fc00000, 0x1fdfffff) AM_ROM AM_REGION("user1", 0) AM_BASE(m_rom_base) ADDRESS_MAP_END @@ -1242,23 +1294,23 @@ static ADDRESS_MAP_START( m68020_map, AS_PROGRAM, 32, cojag_state ) AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_BASE_LEGACY(&jaguar_shared_ram) AM_SHARE("share1") AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION("user1", 0) AM_BASE(m_rom_base) AM_RANGE(0xa00000, 0xa1ffff) AM_RAM - AM_RANGE(0xa20000, 0xa21fff) AM_READWRITE_LEGACY(eeprom_data_r, eeprom_data_w) AM_SHARE("nvram") + AM_RANGE(0xa20000, 0xa21fff) AM_READWRITE(eeprom_data_r, eeprom_data_w) AM_SHARE("nvram") AM_RANGE(0xa30000, 0xa30003) AM_WRITE(watchdog_reset32_w) - AM_RANGE(0xa40000, 0xa40003) AM_WRITE_LEGACY(eeprom_enable_w) - AM_RANGE(0xb70000, 0xb70003) AM_READWRITE_LEGACY(misc_control_r, misc_control_w) + AM_RANGE(0xa40000, 0xa40003) AM_WRITE(eeprom_enable_w) + AM_RANGE(0xb70000, 0xb70003) AM_READWRITE(misc_control_r, misc_control_w) AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK("bank2") AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE_LEGACY("ide", ide_controller32_r, ide_controller32_w) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE_LEGACY(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_BASE_LEGACY(&jaguar_gpu_clut) AM_SHARE("share2") - AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE_LEGACY(gpuctrl_r, gpuctrl_w) + AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w) AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE_LEGACY(jaguar_blitter_r, jaguar_blitter_w) AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_RAM AM_BASE_LEGACY(&jaguar_gpu_ram) AM_SHARE("share3") AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) AM_RANGE(0xf16000, 0xf1600b) AM_READ_LEGACY(cojag_gun_input_r) // GPI02 AM_RANGE(0xf17000, 0xf17003) AM_READ_PORT("SYSTEM") // GPI03 -// AM_RANGE(0xf17800, 0xf17803) AM_WRITE_LEGACY(latch_w) // GPI04 +// AM_RANGE(0xf17800, 0xf17803) AM_WRITE(latch_w) // GPI04 AM_RANGE(0xf17c00, 0xf17c03) AM_READ_PORT("P1_P2") // GPI05 - AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE_LEGACY(dspctrl_r, dspctrl_w) + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE_LEGACY(jaguar_serial_r, jaguar_serial_w) AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_BASE_LEGACY(&jaguar_dsp_ram) AM_SHARE("share4") ADDRESS_MAP_END @@ -1278,7 +1330,7 @@ static ADDRESS_MAP_START( gpu_map, AS_PROGRAM, 32, cojag_state ) AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE_LEGACY("ide", ide_controller32_r, ide_controller32_w) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE_LEGACY(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_SHARE("share2") - AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE_LEGACY(gpuctrl_r, gpuctrl_w) + AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w) AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE_LEGACY(jaguar_blitter_r, jaguar_blitter_w) AM_RANGE(0xf03000, 0xf03fff) AM_RAM AM_SHARE("share3") AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) @@ -1297,10 +1349,10 @@ static ADDRESS_MAP_START( dsp_map, AS_PROGRAM, 32, cojag_state ) AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK("bank8") AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK("bank9") AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) - AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE_LEGACY(dspctrl_r, dspctrl_w) + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE_LEGACY(jaguar_serial_r, jaguar_serial_w) AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_SHARE("share4") - AM_RANGE(0xf1d000, 0xf1dfff) AM_READ_LEGACY(jaguar_wave_rom_r) AM_BASE_LEGACY(&jaguar_wave_rom) + AM_RANGE(0xf1d000, 0xf1dfff) AM_READ(jaguar_wave_rom_r) AM_BASE_LEGACY(&jaguar_wave_rom) ADDRESS_MAP_END /* ToDo, these maps SHOULD be merged with the ones above */ @@ -1312,12 +1364,12 @@ static ADDRESS_MAP_START( jag_gpu_map, AS_PROGRAM, 32, cojag_state ) AM_RANGE(0xe00000, 0xe1ffff) AM_ROM AM_BASE_LEGACY(&rom_base) AM_SIZE_LEGACY(&rom_size) AM_SHARE("share16") AM_REGION("maincpu", 0xe00000) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE_LEGACY(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0xf00400, 0xf005ff) AM_BASE_LEGACY(&jaguar_gpu_clut) AM_MIRROR(0x000200) AM_RAM AM_SHARE("share2") - AM_RANGE(0xf02100, 0xf021ff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(gpuctrl_r, gpuctrl_w) + AM_RANGE(0xf02100, 0xf021ff) AM_MIRROR(0x008000) AM_READWRITE(gpuctrl_r, gpuctrl_w) AM_RANGE(0xf02200, 0xf022ff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(jaguar_blitter_r, jaguar_blitter_w) AM_RANGE(0xf03000, 0xf03fff) AM_BASE_LEGACY(&jaguar_gpu_ram) AM_MIRROR(0x008000) AM_RAM AM_SHARE("share3") AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) - AM_RANGE(0xf14000, 0xf14003) AM_READWRITE_LEGACY(joystick_r, joystick_w) - AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE_LEGACY(dspctrl_r, dspctrl_w) + AM_RANGE(0xf14000, 0xf14003) AM_READWRITE(joystick_r, joystick_w) + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE_LEGACY(jaguar_serial_r, jaguar_serial_w) AM_RANGE(0xf1b000, 0xf1cfff) AM_BASE_LEGACY(&jaguar_dsp_ram) AM_RAM AM_SHARE("share4") AM_RANGE(0xf1d000, 0xf1dfff) AM_ROM AM_BASE_LEGACY(&high_rom_base) AM_REGION("maincpu", 0xf1d000) @@ -1330,12 +1382,12 @@ static ADDRESS_MAP_START( jag_dsp_map, AS_PROGRAM, 32, cojag_state ) AM_RANGE(0xe00000, 0xe1ffff) AM_ROM AM_SHARE("share16") AM_REGION("maincpu", 0xe00000) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE_LEGACY(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0xf00400, 0xf005ff) AM_MIRROR(0x000200) AM_RAM AM_SHARE("share2") - AM_RANGE(0xf02100, 0xf021ff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(gpuctrl_r, gpuctrl_w) + AM_RANGE(0xf02100, 0xf021ff) AM_MIRROR(0x008000) AM_READWRITE(gpuctrl_r, gpuctrl_w) AM_RANGE(0xf02200, 0xf022ff) AM_MIRROR(0x008000) AM_READWRITE_LEGACY(jaguar_blitter_r, jaguar_blitter_w) AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_RAM AM_SHARE("share3") AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE_LEGACY(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) - AM_RANGE(0xf14000, 0xf14003) AM_READWRITE_LEGACY(joystick_r, joystick_w) - AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE_LEGACY(dspctrl_r, dspctrl_w) + AM_RANGE(0xf14000, 0xf14003) AM_READWRITE(joystick_r, joystick_w) + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE_LEGACY(jaguar_serial_r, jaguar_serial_w) AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_SHARE("share4") AM_RANGE(0xf1d000, 0xf1dfff) AM_ROM AM_REGION("maincpu", 0xf1d000) @@ -2301,10 +2353,10 @@ static void cojag_common_init(running_machine &machine, UINT16 gpu_jump_offs, UI /* install synchronization hooks for GPU */ if (cojag_is_r3000) - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x04f0b000 + gpu_jump_offs, 0x04f0b003 + gpu_jump_offs, FUNC(gpu_jump_w)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x04f0b000 + gpu_jump_offs, 0x04f0b003 + gpu_jump_offs, write32_delegate(FUNC(cojag_state::gpu_jump_w),state)); else - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xf0b000 + gpu_jump_offs, 0xf0b003 + gpu_jump_offs, FUNC(gpu_jump_w)); - machine.device("gpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0xf03000 + gpu_jump_offs, 0xf03003 + gpu_jump_offs, FUNC(gpu_jump_r)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xf0b000 + gpu_jump_offs, 0xf0b003 + gpu_jump_offs, write32_delegate(FUNC(cojag_state::gpu_jump_w),state)); + machine.device("gpu")->memory().space(AS_PROGRAM)->install_read_handler(0xf03000 + gpu_jump_offs, 0xf03003 + gpu_jump_offs, read32_delegate(FUNC(cojag_state::gpu_jump_r),state)); state->m_gpu_jump_address = &jaguar_gpu_ram[gpu_jump_offs/4]; state->m_gpu_spin_pc = 0xf03000 + spin_pc; @@ -2323,7 +2375,7 @@ static DRIVER_INIT( area51a ) cojag_state *state = machine.driver_data<cojag_state>(); /* install speedup for main CPU */ - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xa02030, 0xa02033, FUNC(area51_main_speedup_w)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xa02030, 0xa02033, write32_delegate(FUNC(cojag_state::area51_main_speedup_w),state)); } #endif } @@ -2340,7 +2392,7 @@ static DRIVER_INIT( area51 ) /* install speedup for main CPU */ state->m_main_speedup_max_cycles = 120; - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x100062e8, 0x100062eb, FUNC(cojagr3k_main_speedup_r)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x100062e8, 0x100062eb, read32_delegate(FUNC(cojag_state::cojagr3k_main_speedup_r),state)); } #endif } @@ -2357,7 +2409,7 @@ static DRIVER_INIT( maxforce ) #if ENABLE_SPEEDUP_HACKS /* install speedup for main CPU */ state->m_main_speedup_max_cycles = 120; - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x1000865c, 0x1000865f, FUNC(cojagr3k_main_speedup_r)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x1000865c, 0x1000865f, read32_delegate(FUNC(cojag_state::cojagr3k_main_speedup_r),state)); #endif } @@ -2373,7 +2425,7 @@ static DRIVER_INIT( area51mx ) #if ENABLE_SPEEDUP_HACKS /* install speedup for main CPU */ - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xa19550, 0xa19557, FUNC(area51mx_main_speedup_w)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xa19550, 0xa19557, write32_delegate(FUNC(cojag_state::area51mx_main_speedup_w),state)); #endif } @@ -2390,7 +2442,7 @@ static DRIVER_INIT( a51mxr3k ) #if ENABLE_SPEEDUP_HACKS /* install speedup for main CPU */ state->m_main_speedup_max_cycles = 120; - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x10006f0c, 0x10006f0f, FUNC(cojagr3k_main_speedup_r)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x10006f0c, 0x10006f0f, read32_delegate(FUNC(cojag_state::cojagr3k_main_speedup_r),state)); #endif } @@ -2406,7 +2458,7 @@ static DRIVER_INIT( fishfren ) /* install speedup for main CPU */ state->m_main_speedup_max_cycles = 200; - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x10021b60, 0x10021b63, FUNC(cojagr3k_main_speedup_r)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x10021b60, 0x10021b63, read32_delegate(FUNC(cojag_state::cojagr3k_main_speedup_r),state)); } #endif } @@ -2423,8 +2475,8 @@ static void init_freeze_common(running_machine &machine, offs_t main_speedup_add /* install speedup for main CPU */ state->m_main_speedup_max_cycles = 200; if (main_speedup_addr != 0) - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(main_speedup_addr, main_speedup_addr + 3, FUNC(cojagr3k_main_speedup_r)); - state->m_main_gpu_wait = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x0400d900, 0x0400d900 + 3, FUNC(main_gpu_wait_r)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(main_speedup_addr, main_speedup_addr + 3, read32_delegate(FUNC(cojag_state::cojagr3k_main_speedup_r),state)); + state->m_main_gpu_wait = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x0400d900, 0x0400d900 + 3, read32_delegate(FUNC(cojag_state::main_gpu_wait_r),state)); } #endif } @@ -2448,7 +2500,7 @@ static DRIVER_INIT( vcircle ) /* install speedup for main CPU */ state->m_main_speedup_max_cycles = 50; - state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x12005b34, 0x12005b37, FUNC(cojagr3k_main_speedup_r)); + state->m_main_speedup = machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x12005b34, 0x12005b37, read32_delegate(FUNC(cojag_state::cojagr3k_main_speedup_r),state)); } #endif } diff --git a/src/mame/drivers/konamigv.c b/src/mame/drivers/konamigv.c index 6f3ab4e3a6c..3cc9edec010 100644 --- a/src/mame/drivers/konamigv.c +++ b/src/mame/drivers/konamigv.c @@ -145,6 +145,19 @@ public: sharp_lh28f400_device *m_flash16[4]; UINT8 m_sector_buffer[ 4096 ]; + DECLARE_WRITE32_MEMBER(mb89371_w); + DECLARE_READ32_MEMBER(mb89371_r); + DECLARE_READ32_MEMBER(flash_r); + DECLARE_WRITE32_MEMBER(flash_w); + DECLARE_READ32_MEMBER(trackball_r); + DECLARE_READ32_MEMBER(unknown_r); + DECLARE_READ32_MEMBER(btcflash_r); + DECLARE_WRITE32_MEMBER(btcflash_w); + DECLARE_READ32_MEMBER(btc_trackball_r); + DECLARE_WRITE32_MEMBER(btc_trackball_w); + DECLARE_READ32_MEMBER(tokimeki_serial_r); + DECLARE_WRITE32_MEMBER(tokimeki_serial_w); + DECLARE_WRITE32_MEMBER(kdeadeye_0_w); }; /* EEPROM handlers */ @@ -157,11 +170,11 @@ static WRITE32_DEVICE_HANDLER( eeprom_w ) eeprom->set_cs_line((data&0x02) ? CLEAR_LINE : ASSERT_LINE); } -static WRITE32_HANDLER( mb89371_w ) +WRITE32_MEMBER(konamigv_state::mb89371_w) { } -static READ32_HANDLER( mb89371_r ) +READ32_MEMBER(konamigv_state::mb89371_r) { return 0xffffffff; } @@ -173,7 +186,7 @@ static ADDRESS_MAP_START( konamigv_map, AS_PROGRAM, 32, konamigv_state ) AM_RANGE(0x1f100004, 0x1f100007) AM_READ_PORT("P2") AM_RANGE(0x1f100008, 0x1f10000b) AM_READ_PORT("P3_P4") AM_RANGE(0x1f180000, 0x1f180003) AM_DEVWRITE_LEGACY("eeprom", eeprom_w) - AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE_LEGACY(mb89371_r, mb89371_w) + AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE(mb89371_r, mb89371_w) AM_RANGE(0x1f780000, 0x1f780003) AM_WRITENOP /* watchdog? */ AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */ AM_RANGE(0x80000000, 0x801fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ @@ -414,9 +427,8 @@ INPUT_PORTS_END /* Simpsons Bowling */ -static READ32_HANDLER( flash_r ) +READ32_MEMBER(konamigv_state::flash_r) { - konamigv_state *state = space->machine().driver_data<konamigv_state>(); int reg = offset*2; //int shift = 0; @@ -428,26 +440,25 @@ static READ32_HANDLER( flash_r ) if (reg == 4) // set odd address { - state->m_flash_address |= 1; + m_flash_address |= 1; } if (reg == 0) { - int chip = (state->m_flash_address >= 0x200000) ? 2 : 0; + int chip = (m_flash_address >= 0x200000) ? 2 : 0; int ret; - ret = state->m_flash8[chip]->read(state->m_flash_address & 0x1fffff) & 0xff; - ret |= state->m_flash8[chip+1]->read(state->m_flash_address & 0x1fffff)<<8; - state->m_flash_address++; + ret = m_flash8[chip]->read(m_flash_address & 0x1fffff) & 0xff; + ret |= m_flash8[chip+1]->read(m_flash_address & 0x1fffff)<<8; + m_flash_address++; return ret; } return 0; } -static WRITE32_HANDLER( flash_w ) +WRITE32_MEMBER(konamigv_state::flash_w) { - konamigv_state *state = space->machine().driver_data<konamigv_state>(); int reg = offset*2; int chip; @@ -460,29 +471,28 @@ static WRITE32_HANDLER( flash_w ) switch (reg) { case 0: - chip = (state->m_flash_address >= 0x200000) ? 2 : 0; - state->m_flash8[chip]->write(state->m_flash_address & 0x1fffff, data&0xff); - state->m_flash8[chip+1]->write(state->m_flash_address & 0x1fffff, (data>>8)&0xff); + chip = (m_flash_address >= 0x200000) ? 2 : 0; + m_flash8[chip]->write(m_flash_address & 0x1fffff, data&0xff); + m_flash8[chip+1]->write(m_flash_address & 0x1fffff, (data>>8)&0xff); break; case 1: - state->m_flash_address = 0; - state->m_flash_address |= (data<<1); + m_flash_address = 0; + m_flash_address |= (data<<1); break; case 2: - state->m_flash_address &= 0xff00ff; - state->m_flash_address |= (data<<8); + m_flash_address &= 0xff00ff; + m_flash_address |= (data<<8); break; case 3: - state->m_flash_address &= 0x00ffff; - state->m_flash_address |= (data<<15); + m_flash_address &= 0x00ffff; + m_flash_address |= (data<<15); break; } } -static READ32_HANDLER( trackball_r ) +READ32_MEMBER(konamigv_state::trackball_r) { - konamigv_state *state = space->machine().driver_data<konamigv_state>(); if( offset == 0 && mem_mask == 0x0000ffff ) { @@ -493,16 +503,16 @@ static READ32_HANDLER( trackball_r ) for( axis = 0; axis < 2; axis++ ) { - value = input_port_read(space->machine(), axisnames[axis]); - diff = value - state->m_trackball_prev[ axis ]; - state->m_trackball_prev[ axis ] = value; - state->m_trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 ); + value = input_port_read(machine(), axisnames[axis]); + diff = value - m_trackball_prev[ axis ]; + m_trackball_prev[ axis ] = value; + m_trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 ); } } - return state->m_trackball_data[ offset ]; + return m_trackball_data[ offset ]; } -static READ32_HANDLER( unknown_r ) +READ32_MEMBER(konamigv_state::unknown_r) { return 0xffffffff; } @@ -516,9 +526,9 @@ static DRIVER_INIT( simpbowl ) state->m_flash8[2] = machine.device<fujitsu_29f016a_device>("flash2"); state->m_flash8[3] = machine.device<fujitsu_29f016a_device>("flash3"); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f680080, 0x1f68008f, FUNC(flash_r), FUNC(flash_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1f6800c0, 0x1f6800c7, FUNC(trackball_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1f6800c8, 0x1f6800cb, FUNC(unknown_r) ); /* ?? */ + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f680080, 0x1f68008f, read32_delegate(FUNC(konamigv_state::flash_r),state), write32_delegate(FUNC(konamigv_state::flash_w),state) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1f6800c0, 0x1f6800c7, read32_delegate(FUNC(konamigv_state::trackball_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1f6800c8, 0x1f6800cb, read32_delegate(FUNC(konamigv_state::unknown_r),state)); /* ?? */ DRIVER_INIT_CALL(konamigv); } @@ -543,41 +553,38 @@ INPUT_PORTS_END /* Beat the Champ */ -static READ32_HANDLER( btcflash_r ) +READ32_MEMBER(konamigv_state::btcflash_r) { - konamigv_state *state = space->machine().driver_data<konamigv_state>(); if (mem_mask == 0x0000ffff) { - return state->m_flash16[0]->read(offset*2); + return m_flash16[0]->read(offset*2); } else if (mem_mask == 0xffff0000) { - return state->m_flash16[0]->read((offset*2)+1)<<16; + return m_flash16[0]->read((offset*2)+1)<<16; } return 0; } -static WRITE32_HANDLER( btcflash_w ) +WRITE32_MEMBER(konamigv_state::btcflash_w) { - konamigv_state *state = space->machine().driver_data<konamigv_state>(); if (mem_mask == 0x0000ffff) { - state->m_flash16[0]->write(offset*2, data&0xffff); + m_flash16[0]->write(offset*2, data&0xffff); } else if (mem_mask == 0xffff0000) { - state->m_flash16[0]->write((offset*2)+1, (data>>16)&0xffff); + m_flash16[0]->write((offset*2)+1, (data>>16)&0xffff); } } -static READ32_HANDLER( btc_trackball_r ) +READ32_MEMBER(konamigv_state::btc_trackball_r) { - konamigv_state *state = space->machine().driver_data<konamigv_state>(); -// mame_printf_debug( "r %08x %08x %08x\n", cpu_get_pc(&space->device()), offset, mem_mask ); +// mame_printf_debug( "r %08x %08x %08x\n", cpu_get_pc(&space.device()), offset, mem_mask ); if( offset == 1 && mem_mask == 0xffff0000 ) { @@ -588,19 +595,19 @@ static READ32_HANDLER( btc_trackball_r ) for( axis = 0; axis < 4; axis++ ) { - value = input_port_read(space->machine(), axisnames[axis]); - diff = value - state->m_btc_trackball_prev[ axis ]; - state->m_btc_trackball_prev[ axis ] = value; - state->m_btc_trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 ); + value = input_port_read(machine(), axisnames[axis]); + diff = value - m_btc_trackball_prev[ axis ]; + m_btc_trackball_prev[ axis ] = value; + m_btc_trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 ); } } - return state->m_btc_trackball_data[ offset ] | ( state->m_btc_trackball_data[ offset + 2 ] >> 8 ); + return m_btc_trackball_data[ offset ] | ( m_btc_trackball_data[ offset + 2 ] >> 8 ); } -static WRITE32_HANDLER( btc_trackball_w ) +WRITE32_MEMBER(konamigv_state::btc_trackball_w) { -// mame_printf_debug( "w %08x %08x %08x %08x\n", cpu_get_pc(&space->device()), offset, data, mem_mask ); +// mame_printf_debug( "w %08x %08x %08x %08x\n", cpu_get_pc(&space.device()), offset, data, mem_mask ); } static DRIVER_INIT( btchamp ) @@ -609,9 +616,9 @@ static DRIVER_INIT( btchamp ) state->m_flash16[0] = machine.device<sharp_lh28f400_device>("flash"); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f680080, 0x1f68008f, FUNC(btc_trackball_r), FUNC(btc_trackball_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f680080, 0x1f68008f, read32_delegate(FUNC(konamigv_state::btc_trackball_r),state), write32_delegate(FUNC(konamigv_state::btc_trackball_w),state)); machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write ( 0x1f6800e0, 0x1f6800e3); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f380000, 0x1f3fffff, FUNC(btcflash_r), FUNC(btcflash_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f380000, 0x1f3fffff, read32_delegate(FUNC(konamigv_state::btcflash_r),state), write32_delegate(FUNC(konamigv_state::btcflash_w),state) ); DRIVER_INIT_CALL(konamigv); } @@ -638,7 +645,7 @@ INPUT_PORTS_END /* Tokimeki Memorial games - have a mouse and printer and who knows what else */ -static READ32_HANDLER( tokimeki_serial_r ) +READ32_MEMBER(konamigv_state::tokimeki_serial_r) { // bits checked: 0x80 and 0x20 for periodic status (800b6968 and 800b69e0 in tokimosh) // 0x08 for reading the serial device (8005e624) @@ -646,7 +653,7 @@ static READ32_HANDLER( tokimeki_serial_r ) return 0xffffffff; } -static WRITE32_HANDLER( tokimeki_serial_w ) +WRITE32_MEMBER(konamigv_state::tokimeki_serial_w) { /* serial EEPROM-like device here: when mem_mask == 0x000000ff only, @@ -664,8 +671,9 @@ static WRITE32_HANDLER( tokimeki_serial_w ) static DRIVER_INIT( tokimosh ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1f680080, 0x1f680083, FUNC(tokimeki_serial_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1f680090, 0x1f680093, FUNC(tokimeki_serial_w) ); + konamigv_state *state = machine.driver_data<konamigv_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1f680080, 0x1f680083, read32_delegate(FUNC(konamigv_state::tokimeki_serial_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1f680090, 0x1f680093, write32_delegate(FUNC(konamigv_state::tokimeki_serial_w),state)); DRIVER_INIT_CALL(konamigv); } @@ -680,7 +688,7 @@ CD: A01 */ -static WRITE32_HANDLER( kdeadeye_0_w ) +WRITE32_MEMBER(konamigv_state::kdeadeye_0_w) { } @@ -695,8 +703,8 @@ static DRIVER_INIT( kdeadeye ) machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_port ( 0x1f6800a0, 0x1f6800a3, "GUNX2" ); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_port ( 0x1f6800b0, 0x1f6800b3, "GUNY2" ); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_port ( 0x1f6800c0, 0x1f6800c3, "BUTTONS" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler ( 0x1f6800e0, 0x1f6800e3, FUNC(kdeadeye_0_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f380000, 0x1f3fffff, FUNC(btcflash_r), FUNC(btcflash_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler ( 0x1f6800e0, 0x1f6800e3, write32_delegate(FUNC(konamigv_state::kdeadeye_0_w),state) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f380000, 0x1f3fffff, read32_delegate(FUNC(konamigv_state::btcflash_r),state), write32_delegate(FUNC(konamigv_state::btcflash_w),state)); DRIVER_INIT_CALL(konamigv); } diff --git a/src/mame/drivers/ksys573.c b/src/mame/drivers/ksys573.c index 0964b0e6de7..a6e0f98e2b2 100644 --- a/src/mame/drivers/ksys573.c +++ b/src/mame/drivers/ksys573.c @@ -468,6 +468,30 @@ public: DECLARE_CUSTOM_INPUT_MEMBER(gn845pwbb_read); DECLARE_CUSTOM_INPUT_MEMBER(gunmania_tank_shutter_sensor); DECLARE_CUSTOM_INPUT_MEMBER(gunmania_cable_holder_sensor); + DECLARE_WRITE32_MEMBER(mb89371_w); + DECLARE_READ32_MEMBER(mb89371_r); + DECLARE_READ32_MEMBER(jamma_r); + DECLARE_READ32_MEMBER(control_r); + DECLARE_WRITE32_MEMBER(control_w); + DECLARE_READ32_MEMBER(atapi_r); + DECLARE_WRITE32_MEMBER(atapi_w); + DECLARE_WRITE32_MEMBER(atapi_reset_w); + DECLARE_WRITE32_MEMBER(security_w); + DECLARE_READ32_MEMBER(security_r); + DECLARE_READ32_MEMBER(flash_r); + DECLARE_WRITE32_MEMBER(flash_w); + DECLARE_READ32_MEMBER(ge765pwbba_r); + DECLARE_WRITE32_MEMBER(ge765pwbba_w); + DECLARE_READ32_MEMBER(gx700pwbf_io_r); + DECLARE_WRITE32_MEMBER(gx700pwbf_io_w); + DECLARE_READ32_MEMBER(gtrfrks_io_r); + DECLARE_WRITE32_MEMBER(gtrfrks_io_w); + DECLARE_READ32_MEMBER(gx894pwbba_r); + DECLARE_WRITE32_MEMBER(gx894pwbba_w); + DECLARE_WRITE32_MEMBER(dmx_io_w); + DECLARE_WRITE32_MEMBER(mamboagg_io_w); + DECLARE_WRITE32_MEMBER(gunmania_w); + DECLARE_READ32_MEMBER(gunmania_r); }; INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... ) @@ -485,28 +509,26 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, static const char *const diskregions[] = { ":cdrom0", ":cdrom1" }; -static WRITE32_HANDLER( mb89371_w ) +WRITE32_MEMBER(ksys573_state::mb89371_w) { - verboselog( space->machine(), 2, "mb89371_w %08x %08x %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "mb89371_w %08x %08x %08x\n", offset, mem_mask, data ); } -static READ32_HANDLER( mb89371_r ) +READ32_MEMBER(ksys573_state::mb89371_r) { UINT32 data = 0xffffffff; - verboselog( space->machine(), 2, "mb89371_r %08x %08x %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "mb89371_r %08x %08x %08x\n", offset, mem_mask, data ); return data; } -static READ32_HANDLER( jamma_r ) +READ32_MEMBER(ksys573_state::jamma_r) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - running_machine &machine = space->machine(); - int security_cart_number = state->m_security_cart_number; - UINT32 data = input_port_read(machine, "IN1"); + int security_cart_number = m_security_cart_number; + UINT32 data = input_port_read(machine(), "IN1"); data |= 0x000000c0; - ds2401_device *ds2401 = space->machine().device<ds2401_device>(security_cart_number ? "game_id" : "install_id"); - device_secure_serial_flash *secflash = space->machine().device<device_secure_serial_flash>(security_cart_number ? "game_eeprom" : "install_eeprom"); + ds2401_device *ds2401 = machine().device<ds2401_device>(security_cart_number ? "game_id" : "install_id"); + device_secure_serial_flash *secflash = machine().device<device_secure_serial_flash>(security_cart_number ? "game_eeprom" : "install_eeprom"); if( ds2401 ) { @@ -516,71 +538,69 @@ static READ32_HANDLER( jamma_r ) if( secflash ) data |= secflash->sda_r() << 18; - if( state->m_flash_device[1][0] == NULL ) + if( m_flash_device[1][0] == NULL ) { data |= ( 1 << 26 ); } - if( state->m_flash_device[2][0] == NULL ) + if( m_flash_device[2][0] == NULL ) { data |= ( 1 << 27 ); } - verboselog( machine, 2, "jamma_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "jamma_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } -static READ32_HANDLER( control_r ) +READ32_MEMBER(ksys573_state::control_r) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - verboselog( space->machine(), 2, "control_r( %08x, %08x ) %08x\n", offset, mem_mask, state->m_control ); + verboselog( machine(), 2, "control_r( %08x, %08x ) %08x\n", offset, mem_mask, m_control ); - return state->m_control; + return m_control; } -static WRITE32_HANDLER( control_w ) +WRITE32_MEMBER(ksys573_state::control_w) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); UINT32 control; - int old_bank = state->m_flash_bank; + int old_bank = m_flash_bank; - COMBINE_DATA(&state->m_control); - control = state->m_control; + COMBINE_DATA(&m_control); + control = m_control; - verboselog( space->machine(), 2, "control_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); + verboselog( machine(), 2, "control_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); - state->m_flash_bank = -1; + m_flash_bank = -1; // zs01 only, others are reached through security_w - device_secure_serial_flash *secflash = space->machine().device<device_secure_serial_flash>(state->m_security_cart_number ? "game_eeprom" : "install_eeprom"); + device_secure_serial_flash *secflash = machine().device<device_secure_serial_flash>(m_security_cart_number ? "game_eeprom" : "install_eeprom"); if( dynamic_cast<zs01_device *>(secflash) ) secflash->sda_w( !( ( control >> 6 ) & 1 ) ); /* 0x40 */ - if( state->m_flash_device[0][0] != NULL && ( control & ~0x43 ) == 0x00 ) + if( m_flash_device[0][0] != NULL && ( control & ~0x43 ) == 0x00 ) { - state->m_flash_bank = (0 << 8) + ( ( control & 3 ) * 2 ); - if( state->m_flash_bank != old_bank ) verboselog( space->machine(), 1, "onboard %d\n", control & 3 ); + m_flash_bank = (0 << 8) + ( ( control & 3 ) * 2 ); + if( m_flash_bank != old_bank ) verboselog( machine(), 1, "onboard %d\n", control & 3 ); } - else if( state->m_flash_device[1][0] != NULL && ( control & ~0x47 ) == 0x10 ) + else if( m_flash_device[1][0] != NULL && ( control & ~0x47 ) == 0x10 ) { - state->m_flash_bank = (1 << 8) + ( ( control & 7 ) * 2 ); - if( state->m_flash_bank != old_bank ) verboselog( space->machine(), 1, "pccard1 %d\n", control & 7 ); + m_flash_bank = (1 << 8) + ( ( control & 7 ) * 2 ); + if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard1 %d\n", control & 7 ); } - else if( state->m_flash_device[2][0] != NULL && ( control & ~0x47 ) == 0x20 ) + else if( m_flash_device[2][0] != NULL && ( control & ~0x47 ) == 0x20 ) { - state->m_flash_bank = (2 << 8) + ( ( control & 7 ) * 2 ); - if( state->m_flash_bank != old_bank ) verboselog( space->machine(), 1, "pccard2 %d\n", control & 7 ); + m_flash_bank = (2 << 8) + ( ( control & 7 ) * 2 ); + if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard2 %d\n", control & 7 ); } - else if( state->m_flash_device[3][0] != NULL && ( control & ~0x47 ) == 0x20 ) + else if( m_flash_device[3][0] != NULL && ( control & ~0x47 ) == 0x20 ) { - state->m_flash_bank = (3 << 8) + ( ( control & 7 ) * 2 ); - if( state->m_flash_bank != old_bank ) verboselog( space->machine(), 1, "pccard3 %d\n", control & 7 ); + m_flash_bank = (3 << 8) + ( ( control & 7 ) * 2 ); + if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard3 %d\n", control & 7 ); } - else if( state->m_flash_device[4][0] != NULL && ( control & ~0x47 ) == 0x28 ) + else if( m_flash_device[4][0] != NULL && ( control & ~0x47 ) == 0x28 ) { - state->m_flash_bank = (4 << 8) + ( ( control & 7 ) * 2 ); - if( state->m_flash_bank != old_bank ) verboselog( space->machine(), 1, "pccard4 %d\n", control & 7 ); + m_flash_bank = (4 << 8) + ( ( control & 7 ) * 2 ); + if( m_flash_bank != old_bank ) verboselog( machine(), 1, "pccard4 %d\n", control & 7 ); } } @@ -652,11 +672,9 @@ static TIMER_CALLBACK( atapi_xfer_end ) verboselog( machine, 2, "atapi_xfer_end: %d %d\n", state->m_atapi_xferlen, state->m_atapi_xfermod ); } -static READ32_HANDLER( atapi_r ) +READ32_MEMBER(ksys573_state::atapi_r) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - UINT8 *atapi_regs = state->m_atapi_regs; - running_machine &machine = space->machine(); + UINT8 *atapi_regs = m_atapi_regs; int reg, data; if (mem_mask == 0x0000ffff) // word-wide command read @@ -664,28 +682,28 @@ static READ32_HANDLER( atapi_r ) // mame_printf_debug("ATAPI: packet read = %04x\n", atapi_data[atapi_data_ptr]); // assert IRQ and drop DRQ - if (state->m_atapi_data_ptr == 0 && state->m_atapi_data_len == 0) + if (m_atapi_data_ptr == 0 && m_atapi_data_len == 0) { // get the data from the device - if( state->m_atapi_xferlen > 0 ) + if( m_atapi_xferlen > 0 ) { - SCSIReadData( state->m_inserted_cdrom, state->m_atapi_data, state->m_atapi_xferlen ); - state->m_atapi_data_len = state->m_atapi_xferlen; + SCSIReadData( m_inserted_cdrom, m_atapi_data, m_atapi_xferlen ); + m_atapi_data_len = m_atapi_xferlen; } - if (state->m_atapi_xfermod > MAX_TRANSFER_SIZE) + if (m_atapi_xfermod > MAX_TRANSFER_SIZE) { - state->m_atapi_xferlen = MAX_TRANSFER_SIZE; - state->m_atapi_xfermod = state->m_atapi_xfermod - MAX_TRANSFER_SIZE; + m_atapi_xferlen = MAX_TRANSFER_SIZE; + m_atapi_xfermod = m_atapi_xfermod - MAX_TRANSFER_SIZE; } else { - state->m_atapi_xferlen = state->m_atapi_xfermod; - state->m_atapi_xfermod = 0; + m_atapi_xferlen = m_atapi_xfermod; + m_atapi_xfermod = 0; } - verboselog( machine, 2, "atapi_r: atapi_xferlen=%d\n", state->m_atapi_xferlen ); - if( state->m_atapi_xferlen != 0 ) + verboselog( machine(), 2, "atapi_r: atapi_xferlen=%d\n", m_atapi_xferlen ); + if( m_atapi_xferlen != 0 ) { atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC; atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO; @@ -697,27 +715,27 @@ static READ32_HANDLER( atapi_r ) atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO; } - atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff; - atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff; + atapi_regs[ATAPI_REG_COUNTLOW] = m_atapi_xferlen & 0xff; + atapi_regs[ATAPI_REG_COUNTHIGH] = (m_atapi_xferlen>>8)&0xff; - psx_irq_set(space->machine(), 0x400); + psx_irq_set(machine(), 0x400); } - if( state->m_atapi_data_ptr < state->m_atapi_data_len ) + if( m_atapi_data_ptr < m_atapi_data_len ) { - data = state->m_atapi_data[state->m_atapi_data_ptr++]; - data |= ( state->m_atapi_data[state->m_atapi_data_ptr++] << 8 ); - if( state->m_atapi_data_ptr >= state->m_atapi_data_len ) + data = m_atapi_data[m_atapi_data_ptr++]; + data |= ( m_atapi_data[m_atapi_data_ptr++] << 8 ); + if( m_atapi_data_ptr >= m_atapi_data_len ) { -// verboselog( machine, 2, "atapi_r: read all bytes\n" ); - state->m_atapi_data_ptr = 0; - state->m_atapi_data_len = 0; +// verboselog( machine(), 2, "atapi_r: read all bytes\n" ); + m_atapi_data_ptr = 0; + m_atapi_data_len = 0; - if( state->m_atapi_xferlen == 0 ) + if( m_atapi_xferlen == 0 ) { atapi_regs[ATAPI_REG_CMDSTATUS] = 0; atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO; - psx_irq_set(space->machine(), 0x400); + psx_irq_set(machine(), 0x400); } } } @@ -742,106 +760,104 @@ static READ32_HANDLER( atapi_r ) switch( reg ) { case ATAPI_REG_DATA: - verboselog( machine, 1, "atapi_r: data=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: data=%02x\n", data ); break; case ATAPI_REG_ERRFEAT: - verboselog( machine, 1, "atapi_r: errfeat=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: errfeat=%02x\n", data ); break; case ATAPI_REG_INTREASON: - verboselog( machine, 1, "atapi_r: intreason=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: intreason=%02x\n", data ); break; case ATAPI_REG_SAMTAG: - verboselog( machine, 1, "atapi_r: samtag=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: samtag=%02x\n", data ); break; case ATAPI_REG_COUNTLOW: - verboselog( machine, 1, "atapi_r: countlow=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: countlow=%02x\n", data ); break; case ATAPI_REG_COUNTHIGH: - verboselog( machine, 1, "atapi_r: counthigh=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: counthigh=%02x\n", data ); break; case ATAPI_REG_DRIVESEL: - verboselog( machine, 1, "atapi_r: drivesel=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: drivesel=%02x\n", data ); break; case ATAPI_REG_CMDSTATUS: - verboselog( machine, 1, "atapi_r: cmdstatus=%02x\n", data ); + verboselog( machine(), 1, "atapi_r: cmdstatus=%02x\n", data ); break; } -// mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, cpu_get_pc(&space->device())); +// mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, cpu_get_pc(&space.device())); data <<= shift; } - verboselog( machine, 2, "atapi_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "atapi_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } -static WRITE32_HANDLER( atapi_w ) +WRITE32_MEMBER(ksys573_state::atapi_w) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - UINT8 *atapi_regs = state->m_atapi_regs; - UINT8 *atapi_data = state->m_atapi_data; - running_machine &machine = space->machine(); + UINT8 *atapi_regs = m_atapi_regs; + UINT8 *atapi_data = m_atapi_data; int reg; - verboselog( machine, 2, "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); + verboselog( machine(), 2, "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); if (mem_mask == 0x0000ffff) // word-wide command write { - verboselog( machine, 2, "atapi_w: data=%04x\n", data ); + verboselog( machine(), 2, "atapi_w: data=%04x\n", data ); // mame_printf_debug("ATAPI: packet write %04x\n", data); - atapi_data[state->m_atapi_data_ptr++] = data & 0xff; - atapi_data[state->m_atapi_data_ptr++] = data >> 8; + atapi_data[m_atapi_data_ptr++] = data & 0xff; + atapi_data[m_atapi_data_ptr++] = data >> 8; - if (state->m_atapi_cdata_wait) + if (m_atapi_cdata_wait) { -// mame_printf_debug("ATAPI: waiting, ptr %d wait %d\n", state->m_atapi_data_ptr, state->m_atapi_cdata_wait); - if (state->m_atapi_data_ptr == state->m_atapi_cdata_wait) +// mame_printf_debug("ATAPI: waiting, ptr %d wait %d\n", m_atapi_data_ptr, m_atapi_cdata_wait); + if (m_atapi_data_ptr == m_atapi_cdata_wait) { // send it to the device - SCSIWriteData( state->m_inserted_cdrom, atapi_data, state->m_atapi_cdata_wait ); + SCSIWriteData( m_inserted_cdrom, atapi_data, m_atapi_cdata_wait ); // assert IRQ - psx_irq_set(space->machine(), 0x400); + psx_irq_set(machine(), 0x400); // not sure here, but clear DRQ at least? atapi_regs[ATAPI_REG_CMDSTATUS] = 0; } } - else if ( state->m_atapi_data_ptr == 12 ) + else if ( m_atapi_data_ptr == 12 ) { int phase; - verboselog( machine, 2, "atapi_w: command %02x\n", atapi_data[0]&0xff ); + verboselog( machine(), 2, "atapi_w: command %02x\n", atapi_data[0]&0xff ); // reset data pointer for reading SCSI results - state->m_atapi_data_ptr = 0; - state->m_atapi_data_len = 0; + m_atapi_data_ptr = 0; + m_atapi_data_len = 0; // send it to the SCSI device - SCSISetCommand( state->m_inserted_cdrom, state->m_atapi_data, 12 ); - SCSIExecCommand( state->m_inserted_cdrom, &state->m_atapi_xferlen ); - SCSIGetPhase( state->m_inserted_cdrom, &phase ); + SCSISetCommand( m_inserted_cdrom, m_atapi_data, 12 ); + SCSIExecCommand( m_inserted_cdrom, &m_atapi_xferlen ); + SCSIGetPhase( m_inserted_cdrom, &phase ); - if (state->m_atapi_xferlen != -1) + if (m_atapi_xferlen != -1) { -// mame_printf_debug("ATAPI: SCSI command %02x returned %d bytes from the device\n", atapi_data[0]&0xff, state->m_atapi_xferlen); +// mame_printf_debug("ATAPI: SCSI command %02x returned %d bytes from the device\n", atapi_data[0]&0xff, m_atapi_xferlen); // store the returned command length in the ATAPI regs, splitting into // multiple transfers if necessary - state->m_atapi_xfermod = 0; - if (state->m_atapi_xferlen > MAX_TRANSFER_SIZE) + m_atapi_xfermod = 0; + if (m_atapi_xferlen > MAX_TRANSFER_SIZE) { - state->m_atapi_xfermod = state->m_atapi_xferlen - MAX_TRANSFER_SIZE; - state->m_atapi_xferlen = MAX_TRANSFER_SIZE; + m_atapi_xfermod = m_atapi_xferlen - MAX_TRANSFER_SIZE; + m_atapi_xferlen = MAX_TRANSFER_SIZE; } - atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff; - atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff; + atapi_regs[ATAPI_REG_COUNTLOW] = m_atapi_xferlen & 0xff; + atapi_regs[ATAPI_REG_COUNTHIGH] = (m_atapi_xferlen>>8)&0xff; - if (state->m_atapi_xferlen == 0) + if (m_atapi_xferlen == 0) { // if no data to return, set the registers properly atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRDY; @@ -857,7 +873,7 @@ static WRITE32_HANDLER( atapi_w ) switch( phase ) { case SCSI_PHASE_DATAOUT: - state->m_atapi_cdata_wait = state->m_atapi_xferlen; + m_atapi_cdata_wait = m_atapi_xferlen; break; } @@ -871,12 +887,12 @@ static WRITE32_HANDLER( atapi_w ) case 0x45: // PLAY atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY; - state->m_atapi_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( ATAPI_CYCLES_PER_SECTOR ) ); + m_atapi_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime( ATAPI_CYCLES_PER_SECTOR ) ); break; } // assert IRQ - psx_irq_set(space->machine(), 0x400); + psx_irq_set(machine(), 0x400); } else { @@ -901,37 +917,37 @@ static WRITE32_HANDLER( atapi_w ) switch( reg ) { case ATAPI_REG_DATA: - verboselog( machine, 1, "atapi_w: data=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: data=%02x\n", data ); break; case ATAPI_REG_ERRFEAT: - verboselog( machine, 1, "atapi_w: errfeat=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: errfeat=%02x\n", data ); break; case ATAPI_REG_INTREASON: - verboselog( machine, 1, "atapi_w: intreason=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: intreason=%02x\n", data ); break; case ATAPI_REG_SAMTAG: - verboselog( machine, 1, "atapi_w: samtag=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: samtag=%02x\n", data ); break; case ATAPI_REG_COUNTLOW: - verboselog( machine, 1, "atapi_w: countlow=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: countlow=%02x\n", data ); break; case ATAPI_REG_COUNTHIGH: - verboselog( machine, 1, "atapi_w: counthigh=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: counthigh=%02x\n", data ); break; case ATAPI_REG_DRIVESEL: - verboselog( machine, 1, "atapi_w: drivesel=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: drivesel=%02x\n", data ); break; case ATAPI_REG_CMDSTATUS: - verboselog( machine, 1, "atapi_w: cmdstatus=%02x\n", data ); + verboselog( machine(), 1, "atapi_w: cmdstatus=%02x\n", data ); break; } atapi_regs[reg] = data; -// mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, cpu_get_pc(&space->device())); +// mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, cpu_get_pc(&space.device())); if (reg == ATAPI_REG_CMDSTATUS) { -// mame_printf_debug("ATAPI command %x issued! (PC=%x)\n", data, cpu_get_pc(&space->device())); +// mame_printf_debug("ATAPI command %x issued! (PC=%x)\n", data, cpu_get_pc(&space.device())); switch (data) { @@ -939,27 +955,27 @@ static WRITE32_HANDLER( atapi_w ) atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ; atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND; - state->m_atapi_data_ptr = 0; - state->m_atapi_data_len = 0; + m_atapi_data_ptr = 0; + m_atapi_data_len = 0; /* we have no data */ - state->m_atapi_xferlen = 0; - state->m_atapi_xfermod = 0; + m_atapi_xferlen = 0; + m_atapi_xfermod = 0; - state->m_atapi_cdata_wait = 0; + m_atapi_cdata_wait = 0; break; case 0xa1: // IDENTIFY PACKET DEVICE atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ; - state->m_atapi_data_ptr = 0; - state->m_atapi_data_len = 512; + m_atapi_data_ptr = 0; + m_atapi_data_len = 512; /* we have no data */ - state->m_atapi_xferlen = 0; - state->m_atapi_xfermod = 0; + m_atapi_xferlen = 0; + m_atapi_xfermod = 0; - memset( atapi_data, 0, state->m_atapi_data_len ); + memset( atapi_data, 0, m_atapi_data_len ); atapi_data[ 0 ^ 1 ] = 0x85; // ATAPI device, cmd set 5 compliant, DRQ within 3 ms of PACKET command atapi_data[ 1 ^ 1 ] = 0x00; @@ -993,16 +1009,16 @@ static WRITE32_HANDLER( atapi_w ) atapi_regs[ATAPI_REG_COUNTLOW] = 0; atapi_regs[ATAPI_REG_COUNTHIGH] = 2; - psx_irq_set(space->machine(), 0x400); + psx_irq_set(machine(), 0x400); break; case 0xef: // SET FEATURES atapi_regs[ATAPI_REG_CMDSTATUS] = 0; - state->m_atapi_data_ptr = 0; - state->m_atapi_data_len = 0; + m_atapi_data_ptr = 0; + m_atapi_data_len = 0; - psx_irq_set(space->machine(), 0x400); + psx_irq_set(machine(), 0x400); break; default: @@ -1068,16 +1084,15 @@ static void atapi_init(running_machine &machine) state->save_item( NAME(state->m_atapi_xfermod) ); } -static WRITE32_HANDLER( atapi_reset_w ) +WRITE32_MEMBER(ksys573_state::atapi_reset_w) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - UINT8 *atapi_regs = state->m_atapi_regs; + UINT8 *atapi_regs = m_atapi_regs; - verboselog( space->machine(), 2, "atapi_reset_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); + verboselog( machine(), 2, "atapi_reset_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); if (data) { - verboselog( space->machine(), 2, "atapi_reset_w: reset\n" ); + verboselog( machine(), 2, "atapi_reset_w: reset\n" ); // mame_printf_debug("ATAPI reset\n"); @@ -1086,12 +1101,12 @@ static WRITE32_HANDLER( atapi_reset_w ) atapi_regs[ATAPI_REG_COUNTLOW] = 0x14; atapi_regs[ATAPI_REG_COUNTHIGH] = 0xeb; - state->m_atapi_data_ptr = 0; - state->m_atapi_data_len = 0; - state->m_atapi_cdata_wait = 0; + m_atapi_data_ptr = 0; + m_atapi_data_len = 0; + m_atapi_cdata_wait = 0; - state->m_atapi_xferlen = 0; - state->m_atapi_xfermod = 0; + m_atapi_xferlen = 0; + m_atapi_xfermod = 0; } } @@ -1114,19 +1129,17 @@ static void cdrom_dma_write( ksys573_state *state, UINT32 n_address, INT32 n_siz state->m_atapi_timer->adjust(state->machine().device<cpu_device>("maincpu")->cycles_to_attotime((ATAPI_CYCLES_PER_SECTOR * (state->m_atapi_xferlen/2048)))); } -static WRITE32_HANDLER( security_w ) +WRITE32_MEMBER(ksys573_state::security_w) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - int security_cart_number = state->m_security_cart_number; - running_machine &machine = space->machine(); - COMBINE_DATA( &state->m_n_security_control ); + int security_cart_number = m_security_cart_number; + COMBINE_DATA( &m_n_security_control ); - verboselog( space->machine(), 2, "security_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); + verboselog( machine(), 2, "security_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); if( ACCESSING_BITS_0_15 ) { - ds2401_device *ds2401 = space->machine().device<ds2401_device>(security_cart_number ? "game_id" : "install_id"); - device_secure_serial_flash *secflash = space->machine().device<device_secure_serial_flash>(security_cart_number ? "game_eeprom" : "install_eeprom"); + ds2401_device *ds2401 = machine().device<ds2401_device>(security_cart_number ? "game_id" : "install_id"); + device_secure_serial_flash *secflash = machine().device<device_secure_serial_flash>(security_cart_number ? "game_eeprom" : "install_eeprom"); if( secflash ) { if( !dynamic_cast<zs01_device *>(secflash) ) @@ -1141,37 +1154,35 @@ static WRITE32_HANDLER( security_w ) ds2401->write(!( ( data >> 4 ) & 1 )); } - if( state->m_security_callback != NULL ) + if( m_security_callback != NULL ) { - (*state->m_security_callback)( machine, data & 0xff ); + (*m_security_callback)( machine(), data & 0xff ); } } - input_port_write_safe( machine, "OUT1", data, mem_mask ); + input_port_write_safe( machine(), "OUT1", data, mem_mask ); } -static READ32_HANDLER( security_r ) +READ32_MEMBER(ksys573_state::security_r) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - UINT32 data = state->m_n_security_control; - verboselog( space->machine(), 2, "security_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + UINT32 data = m_n_security_control; + verboselog( machine(), 2, "security_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } -static READ32_HANDLER( flash_r ) +READ32_MEMBER(ksys573_state::flash_r) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); UINT32 data = 0; - if( state->m_flash_bank < 0 ) + if( m_flash_bank < 0 ) { - mame_printf_debug( "%08x: flash_r( %08x, %08x ) no bank selected %08x\n", cpu_get_pc(&space->device()), offset, mem_mask, state->m_control ); + mame_printf_debug( "%08x: flash_r( %08x, %08x ) no bank selected %08x\n", cpu_get_pc(&space.device()), offset, mem_mask, m_control ); data = 0xffffffff; } else { - fujitsu_29f016a_device **flash_base = &state->m_flash_device[state->m_flash_bank >> 8][state->m_flash_bank & 0xff]; + fujitsu_29f016a_device **flash_base = &m_flash_device[m_flash_bank >> 8][m_flash_bank & 0xff]; int adr = offset * 2; if( ACCESSING_BITS_0_7 ) @@ -1192,24 +1203,23 @@ static READ32_HANDLER( flash_r ) } } - verboselog( space->machine(), 2, "flash_r( %08x, %08x, %08x) bank = %08x\n", offset, mem_mask, data, state->m_flash_bank ); + verboselog( machine(), 2, "flash_r( %08x, %08x, %08x) bank = %08x\n", offset, mem_mask, data, m_flash_bank ); return data; } -static WRITE32_HANDLER( flash_w ) +WRITE32_MEMBER(ksys573_state::flash_w) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - verboselog( space->machine(), 2, "flash_w( %08x, %08x, %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "flash_w( %08x, %08x, %08x\n", offset, mem_mask, data ); - if( state->m_flash_bank < 0 ) + if( m_flash_bank < 0 ) { - mame_printf_debug( "%08x: flash_w( %08x, %08x, %08x ) no bank selected %08x\n", cpu_get_pc(&space->device()), offset, mem_mask, data, state->m_control ); + mame_printf_debug( "%08x: flash_w( %08x, %08x, %08x ) no bank selected %08x\n", cpu_get_pc(&space.device()), offset, mem_mask, data, m_control ); } else { - fujitsu_29f016a_device **flash_base = &state->m_flash_device[state->m_flash_bank >> 8][state->m_flash_bank & 0xff]; + fujitsu_29f016a_device **flash_base = &m_flash_device[m_flash_bank >> 8][m_flash_bank & 0xff]; int adr = offset * 2; if( ACCESSING_BITS_0_7 ) @@ -1233,18 +1243,18 @@ static WRITE32_HANDLER( flash_w ) static ADDRESS_MAP_START( konami573_map, AS_PROGRAM, 32, ksys573_state ) AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */ - AM_RANGE(0x1f000000, 0x1f3fffff) AM_READWRITE_LEGACY(flash_r, flash_w ) + AM_RANGE(0x1f000000, 0x1f3fffff) AM_READWRITE(flash_r, flash_w ) AM_RANGE(0x1f400000, 0x1f400003) AM_READ_PORT( "IN0" ) AM_WRITE_PORT( "OUT0" ) - AM_RANGE(0x1f400004, 0x1f400007) AM_READ_LEGACY(jamma_r ) + AM_RANGE(0x1f400004, 0x1f400007) AM_READ(jamma_r ) AM_RANGE(0x1f400008, 0x1f40000b) AM_READ_PORT( "IN2" ) AM_RANGE(0x1f40000c, 0x1f40000f) AM_READ_PORT( "IN3" ) - AM_RANGE(0x1f480000, 0x1f48000f) AM_READWRITE_LEGACY(atapi_r, atapi_w ) // IDE controller, used mostly in ATAPI mode (only 3 pure IDE commands seen so far) - AM_RANGE(0x1f500000, 0x1f500003) AM_READWRITE_LEGACY(control_r, control_w ) // Konami can't make a game without a "control" register. - AM_RANGE(0x1f560000, 0x1f560003) AM_WRITE_LEGACY(atapi_reset_w ) + AM_RANGE(0x1f480000, 0x1f48000f) AM_READWRITE(atapi_r, atapi_w ) // IDE controller, used mostly in ATAPI mode (only 3 pure IDE commands seen so far) + AM_RANGE(0x1f500000, 0x1f500003) AM_READWRITE(control_r, control_w ) // Konami can't make a game without a "control" register. + AM_RANGE(0x1f560000, 0x1f560003) AM_WRITE(atapi_reset_w ) AM_RANGE(0x1f5c0000, 0x1f5c0003) AM_WRITENOP // watchdog? AM_RANGE(0x1f620000, 0x1f623fff) AM_DEVREADWRITE8_LEGACY("m48t58", timekeeper_r, timekeeper_w, 0x00ff00ff) - AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE_LEGACY(mb89371_r, mb89371_w) - AM_RANGE(0x1f6a0000, 0x1f6a0003) AM_READWRITE_LEGACY(security_r, security_w ) + AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE(mb89371_r, mb89371_w) + AM_RANGE(0x1f6a0000, 0x1f6a0003) AM_READWRITE(security_r, security_w ) AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("bios", 0) AM_RANGE(0x80000000, 0x803fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */ @@ -1398,16 +1408,16 @@ todo: */ -static READ32_HANDLER( ge765pwbba_r ) +READ32_MEMBER(ksys573_state::ge765pwbba_r) { - device_t *upd4701 = space->machine().device("upd4701"); + device_t *upd4701 = machine().device("upd4701"); UINT32 data = 0; switch (offset) { case 0x26: - upd4701_y_add(upd4701, 0, input_port_read_safe(space->machine(), "uPD4701_y", 0), 0xffff); - upd4701_switches_set(upd4701, 0, input_port_read_safe(space->machine(), "uPD4701_switches", 0)); + upd4701_y_add(upd4701, 0, input_port_read_safe(machine(), "uPD4701_y", 0), 0xffff); + upd4701_switches_set(upd4701, 0, input_port_read_safe(machine(), "uPD4701_switches", 0)); upd4701_cs_w(upd4701, 0, 0); upd4701_xy_w(upd4701, 0, 1); @@ -1428,17 +1438,17 @@ static READ32_HANDLER( ge765pwbba_r ) break; default: - verboselog(space->machine(), 0, "ge765pwbba_r: unhandled offset %08x %08x\n", offset, mem_mask); + verboselog(machine(), 0, "ge765pwbba_r: unhandled offset %08x %08x\n", offset, mem_mask); break; } - verboselog(space->machine(), 2, "ge765pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data); + verboselog(machine(), 2, "ge765pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data); return data; } -static WRITE32_HANDLER( ge765pwbba_w ) +WRITE32_MEMBER(ksys573_state::ge765pwbba_w) { - device_t *upd4701 = space->machine().device("upd4701"); + device_t *upd4701 = machine().device("upd4701"); switch (offset) { case 0x04: @@ -1467,17 +1477,18 @@ static WRITE32_HANDLER( ge765pwbba_w ) break; default: - verboselog(space->machine(), 0, "ge765pwbba_w: unhandled offset %08x %08x %08x\n", offset, mem_mask, data); + verboselog(machine(), 0, "ge765pwbba_w: unhandled offset %08x %08x %08x\n", offset, mem_mask, data); break; } - verboselog(space->machine(), 2, "ge765pwbba_w( %08x, %08x, %08x )\n", offset, mem_mask, data); + verboselog(machine(), 2, "ge765pwbba_w( %08x, %08x, %08x )\n", offset, mem_mask, data); } static DRIVER_INIT( ge765pwbba ) { + ksys573_state *state = machine.driver_data<ksys573_state>(); DRIVER_INIT_CALL(konami573); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f640000, 0x1f6400ff, FUNC(ge765pwbba_r), FUNC(ge765pwbba_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::ge765pwbba_r),state), write32_delegate(FUNC(ksys573_state::ge765pwbba_w),state)); } /* @@ -1488,7 +1499,7 @@ Analogue I/O board */ -static READ32_HANDLER( gx700pwbf_io_r ) +READ32_MEMBER(ksys573_state::gx700pwbf_io_r) { UINT32 data = 0; switch( offset ) @@ -1514,7 +1525,7 @@ static READ32_HANDLER( gx700pwbf_io_r ) break; } - verboselog( space->machine(), 2, "gx700pwbf_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "gx700pwbf_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } @@ -1540,9 +1551,9 @@ static void gx700pwbf_output( running_machine &machine, int offset, UINT8 data ) state->m_gx700pwbf_output_data[ offset ] = data; } -static WRITE32_HANDLER( gx700pwbf_io_w ) +WRITE32_MEMBER(ksys573_state::gx700pwbf_io_w) { - verboselog( space->machine(), 2, "gx700pwbf_io_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); + verboselog( machine(), 2, "gx700pwbf_io_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); switch( offset ) { @@ -1550,28 +1561,28 @@ static WRITE32_HANDLER( gx700pwbf_io_w ) if( ACCESSING_BITS_0_15 ) { - gx700pwbf_output( space->machine(), 0, data & 0xff ); + gx700pwbf_output( machine(), 0, data & 0xff ); } break; case 0x22: if( ACCESSING_BITS_0_15 ) { - gx700pwbf_output( space->machine(), 1, data & 0xff ); + gx700pwbf_output( machine(), 1, data & 0xff ); } break; case 0x24: if( ACCESSING_BITS_0_15 ) { - gx700pwbf_output( space->machine(), 2, data & 0xff ); + gx700pwbf_output( machine(), 2, data & 0xff ); } break; case 0x26: if( ACCESSING_BITS_0_15 ) { - gx700pwbf_output( space->machine(), 3, data & 0xff ); + gx700pwbf_output( machine(), 3, data & 0xff ); } break; @@ -1589,7 +1600,7 @@ static void gx700pwfbf_init( running_machine &machine, void (*output_callback_fu state->m_gx700pwfbf_output_callback = output_callback_func; - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f640000, 0x1f6400ff, FUNC(gx700pwbf_io_r), FUNC(gx700pwbf_io_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gx700pwbf_io_r),state), write32_delegate(FUNC(ksys573_state::gx700pwbf_io_w),state)); state->save_item( NAME(state->m_gx700pwbf_output_data) ); } @@ -1786,7 +1797,7 @@ todo: */ -static READ32_HANDLER( gtrfrks_io_r ) +READ32_MEMBER(ksys573_state::gtrfrks_io_r) { UINT32 data = 0; switch( offset ) @@ -1795,17 +1806,17 @@ static READ32_HANDLER( gtrfrks_io_r ) break; default: - verboselog( space->machine(), 0, "gtrfrks_io_r: unhandled offset %08x, %08x\n", offset, mem_mask ); + verboselog( machine(), 0, "gtrfrks_io_r: unhandled offset %08x, %08x\n", offset, mem_mask ); break; } - verboselog( space->machine(), 2, "gtrfrks_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "gtrfrks_io_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } -static WRITE32_HANDLER( gtrfrks_io_w ) +WRITE32_MEMBER(ksys573_state::gtrfrks_io_w) { - verboselog( space->machine(), 2, "gtrfrks_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "gtrfrks_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data ); switch( offset ) { @@ -1820,7 +1831,7 @@ static WRITE32_HANDLER( gtrfrks_io_w ) break; default: - verboselog( space->machine(), 0, "gtrfrks_io_w: unhandled offset %08x, %08x\n", offset, mem_mask ); + verboselog( machine(), 0, "gtrfrks_io_w: unhandled offset %08x, %08x\n", offset, mem_mask ); break; } } @@ -1828,15 +1839,14 @@ static WRITE32_HANDLER( gtrfrks_io_w ) static DRIVER_INIT( gtrfrks ) { DRIVER_INIT_CALL(konami573); - - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f600000, 0x1f6000ff, FUNC(gtrfrks_io_r), FUNC(gtrfrks_io_w) ); + ksys573_state *state = machine.driver_data<ksys573_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f600000, 0x1f6000ff, read32_delegate(FUNC(ksys573_state::gtrfrks_io_r),state), write32_delegate(FUNC(ksys573_state::gtrfrks_io_w),state)); } /* GX894 digital i/o */ -static READ32_HANDLER( gx894pwbba_r ) +READ32_MEMBER(ksys573_state::gx894pwbba_r) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); UINT32 data = 0; switch( offset ) @@ -1853,7 +1863,7 @@ static READ32_HANDLER( gx894pwbba_r ) case 0x2b: if( ACCESSING_BITS_0_15 ) { - mas3507d_device *mas3507d = space->machine().device<mas3507d_device>("mpeg"); + mas3507d_device *mas3507d = machine().device<mas3507d_device>("mpeg"); data |= mas3507d->i2c_scl_r() << 13; data |= mas3507d->i2c_sda_r() << 12; } @@ -1865,8 +1875,8 @@ static READ32_HANDLER( gx894pwbba_r ) case 0x2d: if( ACCESSING_BITS_0_15 ) { - data |= state->m_gx894_ram[ state->m_gx894_ram_read_offset / 2 ]; - state->m_gx894_ram_read_offset += 2; + data |= m_gx894_ram[ m_gx894_ram_read_offset / 2 ]; + m_gx894_ram_read_offset += 2; } if( ACCESSING_BITS_16_31 ) { @@ -1914,7 +1924,7 @@ static READ32_HANDLER( gx894pwbba_r ) case 0x3b: if( ACCESSING_BITS_16_31 ) { - data |= space->machine().device<ds2401_device>("digital_id")->read() << 28; + data |= machine().device<ds2401_device>("digital_id")->read() << 28; } break; case 0x3d: @@ -1937,8 +1947,8 @@ static READ32_HANDLER( gx894pwbba_r ) break; } - verboselog( space->machine(), 2, "gx894pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); -// printf( "%08x: gx894pwbba_r( %08x, %08x ) %08x\n", cpu_get_pc(&space->device()), offset, mem_mask, data ); + verboselog( machine(), 2, "gx894pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); +// printf( "%08x: gx894pwbba_r( %08x, %08x ) %08x\n", cpu_get_pc(&space.device()), offset, mem_mask, data ); return data; } @@ -1974,11 +1984,10 @@ static void gx894pwbba_output( running_machine &machine, int offset, UINT8 data state->m_gx894pwbba_output_data[ offset ] = data; } -static WRITE32_HANDLER( gx894pwbba_w ) +WRITE32_MEMBER(ksys573_state::gx894pwbba_w) { - ksys573_state *state = space->machine().driver_data<ksys573_state>(); char buff[33]; - UINT32 olda=state->m_a,oldb=state->m_b,oldc=state->m_c,oldd=state->m_d; + UINT32 olda=m_a,oldb=m_b,oldc=m_c,oldd=m_d; // printf( "gx894pwbba_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); @@ -1987,7 +1996,7 @@ static WRITE32_HANDLER( gx894pwbba_w ) return; } - verboselog( space->machine(), 2, "gx894pwbba_w( %08x, %08x, %08x) %s\n", offset, mem_mask, data, binary( buff, data ) ); + verboselog( machine(), 2, "gx894pwbba_w( %08x, %08x, %08x) %s\n", offset, mem_mask, data, binary( buff, data ) ); switch( offset ) { @@ -2009,7 +2018,7 @@ static WRITE32_HANDLER( gx894pwbba_w ) break; case 0x2b: if(ACCESSING_BITS_0_15) { - mas3507d_device *mas3507d = space->machine().device<mas3507d_device>("mpeg"); + mas3507d_device *mas3507d = machine().device<mas3507d_device>("mpeg"); mas3507d->i2c_scl_w(data & 0x2000); mas3507d->i2c_sda_w(data & 0x1000); } @@ -2024,32 +2033,32 @@ static WRITE32_HANDLER( gx894pwbba_w ) case 0x2c: if( ACCESSING_BITS_0_15 ) { - state->m_gx894_ram_write_offset &= 0x0000ffff; - state->m_gx894_ram_write_offset |= ( data & 0x0000ffff ) << 16; + m_gx894_ram_write_offset &= 0x0000ffff; + m_gx894_ram_write_offset |= ( data & 0x0000ffff ) << 16; } if( ACCESSING_BITS_16_31 ) { - state->m_gx894_ram_write_offset &= 0xffff0000; - state->m_gx894_ram_write_offset |= ( data & 0xffff0000 ) >> 16; + m_gx894_ram_write_offset &= 0xffff0000; + m_gx894_ram_write_offset |= ( data & 0xffff0000 ) >> 16; } break; case 0x2d: if( ACCESSING_BITS_0_15 ) { - state->m_gx894_ram[ state->m_gx894_ram_write_offset / 2 ] = data & 0xffff; - state->m_gx894_ram_write_offset += 2; + m_gx894_ram[ m_gx894_ram_write_offset / 2 ] = data & 0xffff; + m_gx894_ram_write_offset += 2; } if( ACCESSING_BITS_16_31 ) { - state->m_gx894_ram_read_offset &= 0x0000ffff; - state->m_gx894_ram_read_offset |= ( data & 0xffff0000 ) << 0; + m_gx894_ram_read_offset &= 0x0000ffff; + m_gx894_ram_read_offset |= ( data & 0xffff0000 ) << 0; } break; case 0x2e: if( ACCESSING_BITS_0_15 ) { - state->m_gx894_ram_read_offset &= 0xffff0000; - state->m_gx894_ram_read_offset |= ( data & 0x0000ffff ) >> 0; + m_gx894_ram_read_offset &= 0xffff0000; + m_gx894_ram_read_offset |= ( data & 0x0000ffff ) >> 0; } if( ACCESSING_BITS_16_31 ) { @@ -2059,24 +2068,24 @@ static WRITE32_HANDLER( gx894pwbba_w ) case 0x38: if( ACCESSING_BITS_16_31 ) { - gx894pwbba_output( space->machine(), 0, ( data >> 28 ) & 0xf ); + gx894pwbba_output( machine(), 0, ( data >> 28 ) & 0xf ); } if( ACCESSING_BITS_0_15 ) { - gx894pwbba_output( space->machine(), 1, ( data >> 12 ) & 0xf ); + gx894pwbba_output( machine(), 1, ( data >> 12 ) & 0xf ); } - COMBINE_DATA( &state->m_a ); + COMBINE_DATA( &m_a ); break; case 0x39: if( ACCESSING_BITS_16_31 ) { - gx894pwbba_output( space->machine(), 7, ( data >> 28 ) & 0xf ); + gx894pwbba_output( machine(), 7, ( data >> 28 ) & 0xf ); } if( ACCESSING_BITS_0_15 ) { - gx894pwbba_output( space->machine(), 3, ( data >> 12 ) & 0xf ); + gx894pwbba_output( machine(), 3, ( data >> 12 ) & 0xf ); } - COMBINE_DATA( &state->m_b ); + COMBINE_DATA( &m_b ); break; case 0x3a: if( ACCESSING_BITS_16_31 ) @@ -2087,7 +2096,7 @@ static WRITE32_HANDLER( gx894pwbba_w ) logerror("FPGA MPEG key 3/3 %02x\n", data & 0xff); if( ACCESSING_BITS_16_31 ) { - space->machine().device<ds2401_device>("digital_id")->write( !( ( data >> 28 ) & 1 ) ); + machine().device<ds2401_device>("digital_id")->write( !( ( data >> 28 ) & 1 ) ); } break; case 0x3e: @@ -2099,39 +2108,39 @@ static WRITE32_HANDLER( gx894pwbba_w ) /* 15 */ /* fpga */ - state->m_s = ( state->m_s >> 1 ) | ( ( data & 0x8000 ) >> 8 ); - state->m_f++; - if( state->m_f == 8 ) + m_s = ( m_s >> 1 ) | ( ( data & 0x8000 ) >> 8 ); + m_f++; + if( m_f == 8 ) { // printf( "%04x %02x\n", o, s ); - state->m_c = 0; - state->m_f = 0; - state->m_o++; + m_c = 0; + m_f = 0; + m_o++; } } if( ACCESSING_BITS_16_31 ) { - gx894pwbba_output( space->machine(), 4, ( data >> 28 ) & 0xf ); + gx894pwbba_output( machine(), 4, ( data >> 28 ) & 0xf ); } - COMBINE_DATA( &state->m_c ); + COMBINE_DATA( &m_c ); break; case 0x3f: if( ACCESSING_BITS_16_31 ) { - gx894pwbba_output( space->machine(), 2, ( data >> 28 ) & 0xf ); + gx894pwbba_output( machine(), 2, ( data >> 28 ) & 0xf ); } if( ACCESSING_BITS_0_15 ) { - gx894pwbba_output( space->machine(), 5, ( data >> 12 ) & 0xf ); + gx894pwbba_output( machine(), 5, ( data >> 12 ) & 0xf ); } - COMBINE_DATA( &state->m_d ); + COMBINE_DATA( &m_d ); break; default: // printf( "write offset %08x\n", offset ); break; } - if( state->m_a != olda || state->m_b != oldb || state->m_c != oldc || state->m_d != oldd ) + if( m_a != olda || m_b != oldb || m_c != oldc || m_d != oldd ) { // printf( "%08x %08x %08x %08x\n", a, b, c, d ); } @@ -2144,7 +2153,7 @@ static void gx894pwbba_init( running_machine &machine, void (*output_callback_fu state->m_gx894pwbba_output_callback = output_callback_func; - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f640000, 0x1f6400ff, FUNC(gx894pwbba_r), FUNC(gx894pwbba_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gx894pwbba_r),state), write32_delegate(FUNC(ksys573_state::gx894pwbba_w),state)); state->m_gx894_ram_write_offset = 0; state->m_gx894_ram_read_offset = 0; @@ -2170,8 +2179,8 @@ static DRIVER_INIT( gtrfrkdigital ) DRIVER_INIT_CALL(konami573); gx894pwbba_init( machine, NULL ); - - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f600000, 0x1f6000ff, FUNC(gtrfrks_io_r), FUNC(gtrfrks_io_w) ); + ksys573_state *state = machine.driver_data<ksys573_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f600000, 0x1f6000ff, read32_delegate(FUNC(ksys573_state::gtrfrks_io_r),state), write32_delegate(FUNC(ksys573_state::gtrfrks_io_w),state) ); } /* ddr solo */ @@ -2436,9 +2445,9 @@ static void dmx_output_callback( running_machine &machine, int offset, int data } } -static WRITE32_HANDLER( dmx_io_w ) +WRITE32_MEMBER(ksys573_state::dmx_io_w) { - verboselog( space->machine(), 2, "dmx_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "dmx_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data ); switch( offset ) { @@ -2453,7 +2462,7 @@ static WRITE32_HANDLER( dmx_io_w ) break; default: - verboselog( space->machine(), 0, "dmx_io_w: unhandled offset %08x, %08x\n", offset, mem_mask ); + verboselog( machine(), 0, "dmx_io_w: unhandled offset %08x, %08x\n", offset, mem_mask ); break; } } @@ -2463,8 +2472,8 @@ static DRIVER_INIT( dmx ) DRIVER_INIT_CALL(konami573); gx894pwbba_init( machine, dmx_output_callback ); - - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1f600000, 0x1f6000ff, FUNC(dmx_io_w) ); + ksys573_state *state = machine.driver_data<ksys573_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1f600000, 0x1f6000ff, write32_delegate(FUNC(ksys573_state::dmx_io_w),state) ); } /* salary man champ */ @@ -2600,9 +2609,9 @@ static void mamboagg_output_callback( running_machine &machine, int offset, int } } -static WRITE32_HANDLER( mamboagg_io_w ) +WRITE32_MEMBER(ksys573_state::mamboagg_io_w) { - verboselog( space->machine(), 2, "mamboagg_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "mamboagg_io_w( %08x, %08x ) %08x\n", offset, mem_mask, data ); switch( offset ) { @@ -2613,7 +2622,7 @@ static WRITE32_HANDLER( mamboagg_io_w ) break; default: - verboselog( space->machine(), 0, "mamboagg_io_w: unhandled offset %08x, %08x\n", offset, mem_mask ); + verboselog( machine(), 0, "mamboagg_io_w: unhandled offset %08x, %08x\n", offset, mem_mask ); break; } } @@ -2623,8 +2632,8 @@ static DRIVER_INIT( mamboagg ) DRIVER_INIT_CALL(konami573); gx894pwbba_init( machine, mamboagg_output_callback ); - - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1f600000, 0x1f6000ff, FUNC(mamboagg_io_w) ); + ksys573_state *state = machine.driver_data<ksys573_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1f600000, 0x1f6000ff, write32_delegate(FUNC(ksys573_state::mamboagg_io_w),state)); } @@ -2806,11 +2815,10 @@ static DRIVER_INIT( punchmania ) /* GunMania */ -static WRITE32_HANDLER( gunmania_w ) +WRITE32_MEMBER(ksys573_state::gunmania_w) { char s[ 1024 ] = ""; - ksys573_state *state = space->machine().driver_data<ksys573_state>(); - ds2401_device *ds2401 = space->machine().device<ds2401_device>("gunmania_id"); + ds2401_device *ds2401 = machine().device<ds2401_device>("gunmania_id"); switch( offset ) { @@ -2824,13 +2832,13 @@ static WRITE32_HANDLER( gunmania_w ) case 0x20: strcat( s, "cable holder motor release " ); - state->m_cable_holder_release = 1; + m_cable_holder_release = 1; break; case 0x80: strcat( s, "cable holder motor catch " ); - state->m_cable_holder_release = 0; + m_cable_holder_release = 0; break; case 0xa0: @@ -2858,9 +2866,9 @@ static WRITE32_HANDLER( gunmania_w ) case 0x02: strcat( s, "tank shutter motor close " ); - if( state->m_tank_shutter_position > 0 ) + if( m_tank_shutter_position > 0 ) { - state->m_tank_shutter_position--; + m_tank_shutter_position--; } break; @@ -2868,9 +2876,9 @@ static WRITE32_HANDLER( gunmania_w ) case 0x08: strcat( s, "tank shutter motor open " ); - if( state->m_tank_shutter_position < 100 ) + if( m_tank_shutter_position < 100 ) { - state->m_tank_shutter_position++; + m_tank_shutter_position++; } break; @@ -2895,7 +2903,7 @@ static WRITE32_HANDLER( gunmania_w ) break; } - verboselog( space->machine(), 2, "gunmania_w %08x %08x %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "gunmania_w %08x %08x %08x\n", offset, mem_mask, data ); } CUSTOM_INPUT_MEMBER(ksys573_state::gunmania_tank_shutter_sensor) @@ -2915,35 +2923,36 @@ CUSTOM_INPUT_MEMBER(ksys573_state::gunmania_cable_holder_sensor) return m_cable_holder_release; } -static READ32_HANDLER( gunmania_r ) +READ32_MEMBER(ksys573_state::gunmania_r) { UINT32 data = 0; - ds2401_device *ds2401 = space->machine().device<ds2401_device>("gunmania_id"); + ds2401_device *ds2401 = machine().device<ds2401_device>("gunmania_id"); switch( offset ) { case 0x20: - data = input_port_read( space->machine(), "GUNX" ) | ds2401->read() << 7; + data = input_port_read( machine(), "GUNX" ) | ds2401->read() << 7; break; case 0x22: - data = input_port_read( space->machine(), "GUNY" ) | input_port_read( space->machine(), "SENSOR" ); + data = input_port_read( machine(), "GUNY" ) | input_port_read( machine(), "SENSOR" ); break; case 0x34: - data = input_port_read( space->machine(), "ENCODER" ); + data = input_port_read( machine(), "ENCODER" ); popmessage( "encoder %04x", data ); break; } - verboselog( space->machine(), 2, "gunmania_r %08x %08x %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "gunmania_r %08x %08x %08x\n", offset, mem_mask, data ); return data; } static DRIVER_INIT( gunmania ) { DRIVER_INIT_CALL(konami573); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1f640000, 0x1f6400ff, FUNC(gunmania_r), FUNC(gunmania_w) ); + ksys573_state *state = machine.driver_data<ksys573_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1f640000, 0x1f6400ff, read32_delegate(FUNC(ksys573_state::gunmania_r),state), write32_delegate(FUNC(ksys573_state::gunmania_w),state)); } /* ADC0834 Interface */ diff --git a/src/mame/drivers/magtouch.c b/src/mame/drivers/magtouch.c index 6e33263e1f6..38506352bea 100644 --- a/src/mame/drivers/magtouch.c +++ b/src/mame/drivers/magtouch.c @@ -95,6 +95,8 @@ public: DECLARE_WRITE_LINE_MEMBER(microtouch_out); DECLARE_WRITE_LINE_MEMBER(microtouch_in); + DECLARE_READ8_MEMBER(magtouch_io_r); + DECLARE_WRITE8_MEMBER(magtouch_io_w); }; @@ -140,23 +142,23 @@ static const microtouch_serial_interface magtouch_microtouch_interface = * *************************************/ -static READ8_HANDLER(magtouch_io_r) +READ8_MEMBER(magtouch_state::magtouch_io_r) { switch(offset) { case 1: - return input_port_read(space->machine(), "IN0"); + return input_port_read(machine(), "IN0"); default: return 0; } } -static WRITE8_HANDLER(magtouch_io_w) +WRITE8_MEMBER(magtouch_state::magtouch_io_w) { switch(offset) { case 6: - memory_set_bank(space->machine(), "rombank", data & 0x7f ); + memory_set_bank(machine(), "rombank", data & 0x7f ); break; } } @@ -173,7 +175,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( magtouch_io, AS_IO, 32, magtouch_state ) AM_IMPORT_FROM(pcat32_io_common) - AM_RANGE(0x02e0, 0x02e7) AM_READWRITE8_LEGACY(magtouch_io_r, magtouch_io_w, 0xffffffff) + AM_RANGE(0x02e0, 0x02e7) AM_READWRITE8(magtouch_io_r, magtouch_io_w, 0xffffffff) AM_RANGE(0x03f8, 0x03ff) AM_DEVREADWRITE8("ns16450_0", ns16450_device, ins8250_r, ins8250_w, 0xffffffff) ADDRESS_MAP_END diff --git a/src/mame/drivers/mediagx.c b/src/mame/drivers/mediagx.c index e7ee42ac4dd..91fbc43d9b5 100644 --- a/src/mame/drivers/mediagx.c +++ b/src/mame/drivers/mediagx.c @@ -149,6 +149,21 @@ public: UINT32 m_speedup_hits[12]; int m_speedup_count; #endif + DECLARE_READ32_MEMBER(disp_ctrl_r); + DECLARE_WRITE32_MEMBER(disp_ctrl_w); + DECLARE_READ32_MEMBER(memory_ctrl_r); + DECLARE_WRITE32_MEMBER(memory_ctrl_w); + DECLARE_READ32_MEMBER(biu_ctrl_r); + DECLARE_WRITE32_MEMBER(biu_ctrl_w); + DECLARE_WRITE32_MEMBER(bios_ram_w); + DECLARE_READ32_MEMBER(parallel_port_r); + DECLARE_WRITE32_MEMBER(parallel_port_w); + DECLARE_READ32_MEMBER(ad1847_r); + DECLARE_WRITE32_MEMBER(ad1847_w); + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); }; // Display controller registers @@ -357,22 +372,21 @@ static SCREEN_UPDATE_RGB32(mediagx) return 0; } -static READ32_HANDLER( disp_ctrl_r ) +READ32_MEMBER(mediagx_state::disp_ctrl_r) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); - UINT32 r = state->m_disp_ctrl_reg[offset]; + UINT32 r = m_disp_ctrl_reg[offset]; switch (offset) { case DC_TIMING_CFG: r |= 0x40000000; - if (space->machine().primary_screen->vpos() >= state->m_frame_height) + if (machine().primary_screen->vpos() >= m_frame_height) r &= ~0x40000000; #if SPEEDUP_HACKS // wait for vblank speedup - device_spin_until_interrupt(&space->device()); + device_spin_until_interrupt(&space.device()); #endif break; } @@ -380,12 +394,11 @@ static READ32_HANDLER( disp_ctrl_r ) return r; } -static WRITE32_HANDLER( disp_ctrl_w ) +WRITE32_MEMBER(mediagx_state::disp_ctrl_w) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); // printf("disp_ctrl_w %08X, %08X, %08X\n", data, offset*4, mem_mask); - COMBINE_DATA(state->m_disp_ctrl_reg + offset); + COMBINE_DATA(m_disp_ctrl_reg + offset); } @@ -422,68 +435,64 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) -static READ32_HANDLER( memory_ctrl_r ) +READ32_MEMBER(mediagx_state::memory_ctrl_r) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); - return state->m_memory_ctrl_reg[offset]; + return m_memory_ctrl_reg[offset]; } -static WRITE32_HANDLER( memory_ctrl_w ) +WRITE32_MEMBER(mediagx_state::memory_ctrl_w) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); // printf("memory_ctrl_w %08X, %08X, %08X\n", data, offset*4, mem_mask); if (offset == 0x20/4) { - ramdac_device *ramdac = space->machine().device<ramdac_device>("ramdac"); + ramdac_device *ramdac = machine().device<ramdac_device>("ramdac"); - if((state->m_disp_ctrl_reg[DC_GENERAL_CFG] & 0x00e00000) == 0x00400000) + if((m_disp_ctrl_reg[DC_GENERAL_CFG] & 0x00e00000) == 0x00400000) { // guess: crtc params? // ... } - else if((state->m_disp_ctrl_reg[DC_GENERAL_CFG] & 0x00f00000) == 0x00000000) + else if((m_disp_ctrl_reg[DC_GENERAL_CFG] & 0x00f00000) == 0x00000000) { - state->m_pal_index = data; - ramdac->index_w( *space, 0, data ); + m_pal_index = data; + ramdac->index_w( *&space, 0, data ); } - else if((state->m_disp_ctrl_reg[DC_GENERAL_CFG] & 0x00f00000) == 0x00100000) + else if((m_disp_ctrl_reg[DC_GENERAL_CFG] & 0x00f00000) == 0x00100000) { - state->m_pal[state->m_pal_index] = data & 0xff; - state->m_pal_index++; - if (state->m_pal_index >= 768) + m_pal[m_pal_index] = data & 0xff; + m_pal_index++; + if (m_pal_index >= 768) { - state->m_pal_index = 0; + m_pal_index = 0; } - ramdac->pal_w( *space, 0, data ); + ramdac->pal_w( *&space, 0, data ); } } else { - COMBINE_DATA(state->m_memory_ctrl_reg + offset); + COMBINE_DATA(m_memory_ctrl_reg + offset); } } -static READ32_HANDLER( biu_ctrl_r ) +READ32_MEMBER(mediagx_state::biu_ctrl_r) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); if (offset == 0) { return 0xffffff; } - return state->m_biu_ctrl_reg[offset]; + return m_biu_ctrl_reg[offset]; } -static WRITE32_HANDLER( biu_ctrl_w ) +WRITE32_MEMBER(mediagx_state::biu_ctrl_w) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); //mame_printf_debug("biu_ctrl_w %08X, %08X, %08X\n", data, offset, mem_mask); - COMBINE_DATA(state->m_biu_ctrl_reg + offset); + COMBINE_DATA(m_biu_ctrl_reg + offset); if (offset == 3) // BC_XMAP_3 register { @@ -492,7 +501,7 @@ static WRITE32_HANDLER( biu_ctrl_w ) } #ifdef UNUSED_FUNCTION -static WRITE32_HANDLER(bios_ram_w) +WRITE32_MEMBER(mediagx_state::bios_ram_w) { } @@ -552,48 +561,46 @@ static WRITE8_DEVICE_HANDLER( io20_w ) } } -static READ32_HANDLER( parallel_port_r ) +READ32_MEMBER(mediagx_state::parallel_port_r) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); UINT32 r = 0; //static const char *const portnames[] = { "IN0", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6", "IN7", "IN8" }; // but parallel_pointer takes values 0 -> 23 if (ACCESSING_BITS_8_15) { - UINT8 nibble = state->m_parallel_latched;//(input_port_read_safe(space->machine(), state->m_portnames[state->m_parallel_pointer / 3], 0) >> (4 * (state->m_parallel_pointer % 3))) & 15; + UINT8 nibble = m_parallel_latched;//(input_port_read_safe(machine(), m_portnames[m_parallel_pointer / 3], 0) >> (4 * (m_parallel_pointer % 3))) & 15; r |= ((~nibble & 0x08) << 12) | ((nibble & 0x07) << 11); - logerror("%08X:parallel_port_r()\n", cpu_get_pc(&space->device())); + logerror("%08X:parallel_port_r()\n", cpu_get_pc(&space.device())); #if 0 - if (state->m_controls_data == 0x18) + if (m_controls_data == 0x18) { - r |= input_port_read(space->machine(), "IN0") << 8; + r |= input_port_read(machine(), "IN0") << 8; } - else if (state->m_controls_data == 0x60) + else if (m_controls_data == 0x60) { - r |= input_port_read(space->machine(), "IN1") << 8; + r |= input_port_read(machine(), "IN1") << 8; } - else if (state->m_controls_data == 0xff || state->m_controls_data == 0x50) + else if (m_controls_data == 0xff || m_controls_data == 0x50) { - r |= input_port_read(space->machine(), "IN2") << 8; + r |= input_port_read(machine(), "IN2") << 8; } - //r |= state->m_control_read << 8; + //r |= m_control_read << 8; #endif } if (ACCESSING_BITS_16_23) { - r |= state->m_parport & 0xff0000; + r |= m_parport & 0xff0000; } return r; } -static WRITE32_HANDLER( parallel_port_w ) +WRITE32_MEMBER(mediagx_state::parallel_port_w) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); static const char *const portnames[] = { "IN0", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6", "IN7", "IN8" }; // but parallel_pointer takes values 0 -> 23 - COMBINE_DATA( &state->m_parport ); + COMBINE_DATA( &m_parport ); if (ACCESSING_BITS_0_7) { @@ -612,16 +619,16 @@ static WRITE32_HANDLER( parallel_port_w ) 7x..ff = advance pointer */ - logerror("%08X:", cpu_get_pc(&space->device())); + logerror("%08X:", cpu_get_pc(&space.device())); - state->m_parallel_latched = (input_port_read_safe(space->machine(), portnames[state->m_parallel_pointer / 3], 0) >> (4 * (state->m_parallel_pointer % 3))) & 15; + m_parallel_latched = (input_port_read_safe(machine(), portnames[m_parallel_pointer / 3], 0) >> (4 * (m_parallel_pointer % 3))) & 15; //parallel_pointer++; //logerror("[%02X] Advance pointer to %d\n", data, parallel_pointer); switch (data & 0xfc) { case 0x18: - state->m_parallel_pointer = data & 3; - logerror("[%02X] Reset pointer to %d\n", data, state->m_parallel_pointer); + m_parallel_pointer = data & 3; + logerror("[%02X] Reset pointer to %d\n", data, m_parallel_pointer); break; case 0x20: @@ -662,8 +669,8 @@ static WRITE32_HANDLER( parallel_port_w ) default: if (data >= 0x70) { - state->m_parallel_pointer++; - logerror("[%02X] Advance pointer to %d\n", data, state->m_parallel_pointer); + m_parallel_pointer++; + logerror("[%02X] Advance pointer to %d\n", data, m_parallel_pointer); } else logerror("[%02X] Unknown write\n", data); @@ -748,41 +755,39 @@ static void ad1847_reg_write(running_machine &machine, int reg, UINT8 data) } } -static READ32_HANDLER( ad1847_r ) +READ32_MEMBER(mediagx_state::ad1847_r) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); switch (offset) { case 0x14/4: - return ((state->m_ad1847_sample_rate) / 100) - state->m_ad1847_sample_counter; + return ((m_ad1847_sample_rate) / 100) - m_ad1847_sample_counter; } return 0; } -static WRITE32_HANDLER( ad1847_w ) +WRITE32_MEMBER(mediagx_state::ad1847_w) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); if (offset == 0) { if (ACCESSING_BITS_16_31) { UINT16 ldata = (data >> 16) & 0xffff; - state->m_dacl[state->m_dacl_ptr++] = ldata; + m_dacl[m_dacl_ptr++] = ldata; } if (ACCESSING_BITS_0_15) { UINT16 rdata = data & 0xffff; - state->m_dacr[state->m_dacr_ptr++] = rdata; + m_dacr[m_dacr_ptr++] = rdata; } - state->m_ad1847_sample_counter++; + m_ad1847_sample_counter++; } else if (offset == 3) { int reg = (data >> 8) & 0xf; - ad1847_reg_write(space->machine(), reg, data & 0xff); + ad1847_reg_write(machine(), reg, data & 0xff); } } @@ -794,49 +799,47 @@ static WRITE32_HANDLER( ad1847_w ) *************************************************************************/ -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(mediagx_state::at_page8_r) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(mediagx_state::at_page8_w) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } @@ -851,23 +854,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(mediagx_state::pc_dma_read_byte) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(mediagx_state::pc_dma_write_byte) { - mediagx_state *state = space->machine().driver_data<mediagx_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int _state) @@ -886,8 +887,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(mediagx_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(mediagx_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -913,9 +914,9 @@ static ADDRESS_MAP_START( mediagx_map, AS_PROGRAM, 32, mediagx_state ) AM_RANGE(0x000b0000, 0x000b7fff) AM_RAM AM_BASE(m_cga_ram) AM_RANGE(0x000c0000, 0x000fffff) AM_RAM AM_BASE(m_bios_ram) AM_RANGE(0x00100000, 0x00ffffff) AM_RAM - AM_RANGE(0x40008000, 0x400080ff) AM_READWRITE_LEGACY(biu_ctrl_r, biu_ctrl_w) - AM_RANGE(0x40008300, 0x400083ff) AM_READWRITE_LEGACY(disp_ctrl_r, disp_ctrl_w) - AM_RANGE(0x40008400, 0x400084ff) AM_READWRITE_LEGACY(memory_ctrl_r, memory_ctrl_w) + AM_RANGE(0x40008000, 0x400080ff) AM_READWRITE(biu_ctrl_r, biu_ctrl_w) + AM_RANGE(0x40008300, 0x400083ff) AM_READWRITE(disp_ctrl_r, disp_ctrl_w) + AM_RANGE(0x40008400, 0x400084ff) AM_READWRITE(memory_ctrl_r, memory_ctrl_w) AM_RANGE(0x40800000, 0x40bfffff) AM_RAM AM_BASE(m_vram) AM_RANGE(0xfffc0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */ ADDRESS_MAP_END @@ -926,14 +927,14 @@ static ADDRESS_MAP_START(mediagx_io, AS_IO, 32, mediagx_state ) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8_LEGACY(at_page8_r, at_page8_w, 0xffffffff) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_slave", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff) AM_RANGE(0x00e8, 0x00eb) AM_NOP // I/O delay port AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w) - AM_RANGE(0x0378, 0x037b) AM_READWRITE_LEGACY(parallel_port_r, parallel_port_w) + AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w) AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w) - AM_RANGE(0x0400, 0x04ff) AM_READWRITE_LEGACY(ad1847_r, ad1847_w) + AM_RANGE(0x0400, 0x04ff) AM_READWRITE(ad1847_r, ad1847_w) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w) ADDRESS_MAP_END diff --git a/src/mame/drivers/midqslvr.c b/src/mame/drivers/midqslvr.c index 2dc2264980d..699afe7d148 100644 --- a/src/mame/drivers/midqslvr.c +++ b/src/mame/drivers/midqslvr.c @@ -82,6 +82,10 @@ public: DECLARE_WRITE32_MEMBER( bios_ext4_ram_w ); DECLARE_WRITE32_MEMBER( bios_ram_w ); + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); }; @@ -398,61 +402,48 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask); } -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(midqslvr_state::at_page8_r) { - midqslvr_state *state = space->machine().driver_data<midqslvr_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(midqslvr_state::at_page8_w) { - midqslvr_state *state = space->machine().driver_data<midqslvr_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} - static READ8_DEVICE_HANDLER(at_dma8237_2_r) { return i8237_r(device, offset / 2); @@ -485,23 +476,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(midqslvr_state::pc_dma_read_byte) { - midqslvr_state *state = space->machine().driver_data<midqslvr_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(midqslvr_state::pc_dma_write_byte) { - midqslvr_state *state = space->machine().driver_data<midqslvr_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -519,8 +508,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(midqslvr_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(midqslvr_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -558,7 +547,7 @@ static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w,0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00ef) AM_NOP diff --git a/src/mame/drivers/multigam.c b/src/mame/drivers/multigam.c index 325bc523359..57755e6b13e 100644 --- a/src/mame/drivers/multigam.c +++ b/src/mame/drivers/multigam.c @@ -113,6 +113,24 @@ public: UINT8 m_supergm3_prg_bank; UINT8 m_supergm3_chr_bank; DECLARE_CUSTOM_INPUT_MEMBER(multigam_inputs_r); + DECLARE_WRITE8_MEMBER(multigam_nt_w); + DECLARE_READ8_MEMBER(multigam_nt_r); + DECLARE_WRITE8_MEMBER(sprite_dma_w); + DECLARE_READ8_MEMBER(multigam_IN0_r); + DECLARE_WRITE8_MEMBER(multigam_IN0_w); + DECLARE_READ8_MEMBER(multigam_IN1_r); + DECLARE_WRITE8_MEMBER(multigam_switch_prg_rom); + DECLARE_WRITE8_MEMBER(multigam_switch_gfx_rom); + DECLARE_WRITE8_MEMBER(multigam_mapper2_w); + DECLARE_WRITE8_MEMBER(multigam3_mmc3_rom_switch_w); + DECLARE_WRITE8_MEMBER(multigm3_mapper2_w); + DECLARE_WRITE8_MEMBER(multigm3_switch_gfx_rom); + DECLARE_WRITE8_MEMBER(multigm3_switch_prg_rom); + DECLARE_WRITE8_MEMBER(multigam3_mapper02_rom_switch_w); + DECLARE_WRITE8_MEMBER(mmc1_rom_switch_w); + DECLARE_WRITE8_MEMBER(supergm3_prg_bank_w); + DECLARE_WRITE8_MEMBER(supergm3_chr_bank_w); + void set_mirroring(int mirroring); }; @@ -123,51 +141,49 @@ public: *******************************************************/ -static void set_mirroring(multigam_state *state, int mirroring) +void multigam_state::set_mirroring(int mirroring) { switch(mirroring) { case PPU_MIRROR_LOW: - state->m_nt_page[0] = state->m_nt_page[1] = state->m_nt_page[2] = state->m_nt_page[3] = state->m_nt_ram; + m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram; break; case PPU_MIRROR_HIGH: - state->m_nt_page[0] = state->m_nt_page[1] = state->m_nt_page[2] = state->m_nt_page[3] = state->m_nt_ram + 0x400; + m_nt_page[0] = m_nt_page[1] = m_nt_page[2] = m_nt_page[3] = m_nt_ram + 0x400; break; case PPU_MIRROR_HORZ: - state->m_nt_page[0] = state->m_nt_ram; - state->m_nt_page[1] = state->m_nt_ram; - state->m_nt_page[2] = state->m_nt_ram + 0x400; - state->m_nt_page[3] = state->m_nt_ram + 0x400; + m_nt_page[0] = m_nt_ram; + m_nt_page[1] = m_nt_ram; + m_nt_page[2] = m_nt_ram + 0x400; + m_nt_page[3] = m_nt_ram + 0x400; break; case PPU_MIRROR_VERT: - state->m_nt_page[0] = state->m_nt_ram; - state->m_nt_page[1] = state->m_nt_ram + 0x400; - state->m_nt_page[2] = state->m_nt_ram; - state->m_nt_page[3] = state->m_nt_ram + 0x400; + m_nt_page[0] = m_nt_ram; + m_nt_page[1] = m_nt_ram + 0x400; + m_nt_page[2] = m_nt_ram; + m_nt_page[3] = m_nt_ram + 0x400; break; case PPU_MIRROR_NONE: default: - state->m_nt_page[0] = state->m_nt_ram; - state->m_nt_page[1] = state->m_nt_ram + 0x400; - state->m_nt_page[2] = state->m_nt_ram + 0x800; - state->m_nt_page[3] = state->m_nt_ram + 0xc00; + m_nt_page[0] = m_nt_ram; + m_nt_page[1] = m_nt_ram + 0x400; + m_nt_page[2] = m_nt_ram + 0x800; + m_nt_page[3] = m_nt_ram + 0xc00; break; } } -static WRITE8_HANDLER (multigam_nt_w) +WRITE8_MEMBER(multigam_state::multigam_nt_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); int page = ((offset & 0xc00) >> 10); - state->m_nt_page[page][offset & 0x3ff] = data; + m_nt_page[page][offset & 0x3ff] = data; } -static READ8_HANDLER (multigam_nt_r) +READ8_MEMBER(multigam_state::multigam_nt_r) { - multigam_state *state = space->machine().driver_data<multigam_state>(); int page = ((offset & 0xc00) >> 10); - return state->m_nt_page[page][offset & 0x3ff]; + return m_nt_page[page][offset & 0x3ff]; } static const char * const banknames[] = { "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8", "bank9" }; @@ -203,11 +219,11 @@ static void set_videoram_bank(running_machine& machine, int start, int count, in *******************************************************/ -static WRITE8_HANDLER( sprite_dma_w ) +WRITE8_MEMBER(multigam_state::sprite_dma_w) { int source = (data & 7); - ppu2c0x_device *ppu = space->machine().device<ppu2c0x_device>("ppu"); - ppu->spriteram_dma(space, source); + ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu"); + ppu->spriteram_dma(&space, source); } static READ8_DEVICE_HANDLER( psg_4015_r ) @@ -232,34 +248,31 @@ static WRITE8_DEVICE_HANDLER( psg_4017_w ) *******************************************************/ -static READ8_HANDLER( multigam_IN0_r ) +READ8_MEMBER(multigam_state::multigam_IN0_r) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - return ((state->m_in_0 >> state->m_in_0_shift++) & 0x01) | 0x40; + return ((m_in_0 >> m_in_0_shift++) & 0x01) | 0x40; } -static WRITE8_HANDLER( multigam_IN0_w ) +WRITE8_MEMBER(multigam_state::multigam_IN0_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); if (data & 0x01) { return; } - state->m_in_0_shift = 0; - state->m_in_1_shift = 0; + m_in_0_shift = 0; + m_in_1_shift = 0; - state->m_in_0 = input_port_read(space->machine(), "P1"); - state->m_in_1 = input_port_read(space->machine(), "P2"); + m_in_0 = input_port_read(machine(), "P1"); + m_in_1 = input_port_read(machine(), "P2"); - state->m_in_dsw_shift = 0; - state->m_in_dsw = input_port_read_safe(space->machine(), "DSW", 0); + m_in_dsw_shift = 0; + m_in_dsw = input_port_read_safe(machine(), "DSW", 0); } -static READ8_HANDLER( multigam_IN1_r ) +READ8_MEMBER(multigam_state::multigam_IN1_r) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - return ((state->m_in_1 >> state->m_in_1_shift++) & 0x01) | 0x40; + return ((m_in_1 >> m_in_1_shift++) & 0x01) | 0x40; } CUSTOM_INPUT_MEMBER(multigam_state::multigam_inputs_r) @@ -277,11 +290,11 @@ CUSTOM_INPUT_MEMBER(multigam_state::multigam_inputs_r) *******************************************************/ -static WRITE8_HANDLER(multigam_switch_prg_rom) +WRITE8_MEMBER(multigam_state::multigam_switch_prg_rom) { /* switch PRG rom */ - UINT8* dst = space->machine().region("maincpu")->base(); - UINT8* src = space->machine().region("user1")->base(); + UINT8* dst = machine().region("maincpu")->base(); + UINT8* src = machine().region("user1")->base(); if (data & 0x80) { @@ -298,21 +311,19 @@ static WRITE8_HANDLER(multigam_switch_prg_rom) } }; -static WRITE8_HANDLER(multigam_switch_gfx_rom) +WRITE8_MEMBER(multigam_state::multigam_switch_gfx_rom) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - memory_set_bankptr(space->machine(), "bank1", space->machine().region("gfx1")->base() + (0x2000 * (data & 0x3f))); - set_mirroring(state, data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - state->m_game_gfx_bank = data; + memory_set_bankptr(machine(), "bank1", machine().region("gfx1")->base() + (0x2000 * (data & 0x3f))); + set_mirroring(data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_game_gfx_bank = data; }; -static WRITE8_HANDLER(multigam_mapper2_w) +WRITE8_MEMBER(multigam_state::multigam_mapper2_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - if (state->m_game_gfx_bank & 0x80) + if (m_game_gfx_bank & 0x80) { - memory_set_bankptr(space->machine(), "bank1", space->machine().region("gfx1")->base() + (0x2000 * ((data & 0x3) + (state->m_game_gfx_bank & 0x3c)))); + memory_set_bankptr(machine(), "bank1", machine().region("gfx1")->base() + (0x2000 * ((data & 0x3) + (m_game_gfx_bank & 0x3c)))); } else { @@ -331,35 +342,35 @@ static ADDRESS_MAP_START( multigam_map, AS_PROGRAM, 8, multigam_state ) AM_RANGE(0x0800, 0x0fff) AM_RAM /* additional RAM */ AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nes", nes_psg_r, nes_psg_w) /* PSG primary registers */ - AM_RANGE(0x4014, 0x4014) AM_WRITE_LEGACY(sprite_dma_w) + AM_RANGE(0x4014, 0x4014) AM_WRITE(sprite_dma_w) AM_RANGE(0x4015, 0x4015) AM_DEVREADWRITE_LEGACY("nes", psg_4015_r, psg_4015_w) /* PSG status / first control register */ - AM_RANGE(0x4016, 0x4016) AM_READWRITE_LEGACY(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ - AM_RANGE(0x4017, 0x4017) AM_READ_LEGACY(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ + AM_RANGE(0x4016, 0x4016) AM_READWRITE(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ + AM_RANGE(0x4017, 0x4017) AM_READ(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ AM_RANGE(0x5002, 0x5002) AM_WRITENOP AM_RANGE(0x5000, 0x5ffe) AM_ROM AM_RANGE(0x5fff, 0x5fff) AM_READ_PORT("IN0") AM_RANGE(0x6000, 0x7fff) AM_ROM - AM_RANGE(0x6fff, 0x6fff) AM_WRITE_LEGACY(multigam_switch_prg_rom) - AM_RANGE(0x7fff, 0x7fff) AM_WRITE_LEGACY(multigam_switch_gfx_rom) - AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE_LEGACY(multigam_mapper2_w) + AM_RANGE(0x6fff, 0x6fff) AM_WRITE(multigam_switch_prg_rom) + AM_RANGE(0x7fff, 0x7fff) AM_WRITE(multigam_switch_gfx_rom) + AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE(multigam_mapper2_w) ADDRESS_MAP_END static ADDRESS_MAP_START( multigmt_map, AS_PROGRAM, 8, multigam_state ) AM_RANGE(0x0000, 0x07ff) AM_RAM /* NES RAM */ AM_RANGE(0x0800, 0x0fff) AM_RAM /* additional RAM */ - AM_RANGE(0x3000, 0x3000) AM_WRITE_LEGACY(multigam_switch_prg_rom) - AM_RANGE(0x3fff, 0x3fff) AM_WRITE_LEGACY(multigam_switch_gfx_rom) + AM_RANGE(0x3000, 0x3000) AM_WRITE(multigam_switch_prg_rom) + AM_RANGE(0x3fff, 0x3fff) AM_WRITE(multigam_switch_gfx_rom) AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nes", nes_psg_r, nes_psg_w) /* PSG primary registers */ - AM_RANGE(0x4014, 0x4014) AM_WRITE_LEGACY(sprite_dma_w) + AM_RANGE(0x4014, 0x4014) AM_WRITE(sprite_dma_w) AM_RANGE(0x4015, 0x4015) AM_DEVREADWRITE_LEGACY("nes", psg_4015_r, psg_4015_w) /* PSG status / first control register */ - AM_RANGE(0x4016, 0x4016) AM_READWRITE_LEGACY(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ - AM_RANGE(0x4017, 0x4017) AM_READ_LEGACY(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ + AM_RANGE(0x4016, 0x4016) AM_READWRITE(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ + AM_RANGE(0x4017, 0x4017) AM_READ(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ AM_RANGE(0x5002, 0x5002) AM_WRITENOP AM_RANGE(0x5000, 0x5ffe) AM_ROM AM_RANGE(0x5fff, 0x5fff) AM_READ_PORT("IN0") AM_RANGE(0x6000, 0x7fff) AM_ROM - AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE_LEGACY(multigam_mapper2_w) + AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE(multigam_mapper2_w) ADDRESS_MAP_END /****************************************************** @@ -382,54 +393,53 @@ static void multigam3_mmc3_scanline_cb( device_t *device, int scanline, int vbla } } -static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w ) +WRITE8_MEMBER(multigam_state::multigam3_mmc3_rom_switch_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - ppu2c0x_device *ppu = space->machine().device<ppu2c0x_device>("ppu"); + ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu"); /* basically, a MMC3 mapper from the nes */ - int bankmask = state->m_multigam3_mmc3_prg_size == 0x40000 ? 0x1f : 0x0f; + int bankmask = m_multigam3_mmc3_prg_size == 0x40000 ? 0x1f : 0x0f; switch(offset & 0x7001) { case 0x0000: - state->m_multigam3_mmc3_command = data; + m_multigam3_mmc3_command = data; - if (state->m_multigam3_mmc3_last_bank != (data & 0xc0)) + if (m_multigam3_mmc3_last_bank != (data & 0xc0)) { int bank; - UINT8 *prg = space->machine().region("maincpu")->base(); + UINT8 *prg = machine().region("maincpu")->base(); /* reset the banks */ - if (state->m_multigam3_mmc3_command & 0x40) + if (m_multigam3_mmc3_command & 0x40) { /* high bank */ - bank = (state->m_multigam3_mmc3_banks[0] & bankmask) * 0x2000; + bank = (m_multigam3_mmc3_banks[0] & bankmask) * 0x2000; - memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000); - memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000); + memcpy(&prg[0x0c000], &m_multigam3_mmc3_prg_base[bank], 0x2000); + memcpy(&prg[0x08000], &m_multigam3_mmc3_prg_base[m_multigam3_mmc3_prg_size - 0x4000], 0x2000); } else { /* low bank */ - bank = (state->m_multigam3_mmc3_banks[0] & bankmask) * 0x2000; + bank = (m_multigam3_mmc3_banks[0] & bankmask) * 0x2000; - memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000); - memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000); + memcpy(&prg[0x08000], &m_multigam3_mmc3_prg_base[bank], 0x2000); + memcpy(&prg[0x0c000], &m_multigam3_mmc3_prg_base[m_multigam3_mmc3_prg_size - 0x4000], 0x2000); } /* mid bank */ - bank = (state->m_multigam3_mmc3_banks[1] & bankmask) * 0x2000; - memcpy(&prg[0x0a000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000); + bank = (m_multigam3_mmc3_banks[1] & bankmask) * 0x2000; + memcpy(&prg[0x0a000], &m_multigam3_mmc3_prg_base[bank], 0x2000); - state->m_multigam3_mmc3_last_bank = data & 0xc0; + m_multigam3_mmc3_last_bank = data & 0xc0; } break; case 0x0001: { - UINT8 cmd = state->m_multigam3_mmc3_command & 0x07; - int page = (state->m_multigam3_mmc3_command & 0x80) >> 5; + UINT8 cmd = m_multigam3_mmc3_command & 0x07; + int page = (m_multigam3_mmc3_command & 0x80) >> 5; int bank; switch (cmd) @@ -438,7 +448,7 @@ static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w ) case 1: /* char banking */ data &= 0xfe; page ^= (cmd << 1); - set_videorom_bank(space->machine(), page, 2, state->m_multigam3_mmc3_chr_bank_base + data, 1); + set_videorom_bank(machine(), page, 2, m_multigam3_mmc3_chr_bank_base + data, 1); break; case 2: /* char banking */ @@ -446,29 +456,29 @@ static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w ) case 4: /* char banking */ case 5: /* char banking */ page ^= cmd + 2; - set_videorom_bank(space->machine(), page, 1, state->m_multigam3_mmc3_chr_bank_base + data, 1); + set_videorom_bank(machine(), page, 1, m_multigam3_mmc3_chr_bank_base + data, 1); break; case 6: /* program banking */ { - UINT8 *prg = space->machine().region("maincpu")->base(); - if (state->m_multigam3_mmc3_command & 0x40) + UINT8 *prg = machine().region("maincpu")->base(); + if (m_multigam3_mmc3_command & 0x40) { /* high bank */ - state->m_multigam3_mmc3_banks[0] = data & bankmask; - bank = (state->m_multigam3_mmc3_banks[0]) * 0x2000; + m_multigam3_mmc3_banks[0] = data & bankmask; + bank = (m_multigam3_mmc3_banks[0]) * 0x2000; - memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000); - memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000); + memcpy(&prg[0x0c000], &m_multigam3_mmc3_prg_base[bank], 0x2000); + memcpy(&prg[0x08000], &m_multigam3_mmc3_prg_base[m_multigam3_mmc3_prg_size - 0x4000], 0x2000); } else { /* low bank */ - state->m_multigam3_mmc3_banks[0] = data & bankmask; - bank = (state->m_multigam3_mmc3_banks[0]) * 0x2000; + m_multigam3_mmc3_banks[0] = data & bankmask; + bank = (m_multigam3_mmc3_banks[0]) * 0x2000; - memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000); - memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000); + memcpy(&prg[0x08000], &m_multigam3_mmc3_prg_base[bank], 0x2000); + memcpy(&prg[0x0c000], &m_multigam3_mmc3_prg_base[m_multigam3_mmc3_prg_size - 0x4000], 0x2000); } } break; @@ -476,12 +486,12 @@ static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w ) case 7: /* program banking */ { /* mid bank */ - UINT8 *prg = space->machine().region("maincpu")->base(); + UINT8 *prg = machine().region("maincpu")->base(); - state->m_multigam3_mmc3_banks[1] = data & bankmask; - bank = state->m_multigam3_mmc3_banks[1] * 0x2000; + m_multigam3_mmc3_banks[1] = data & bankmask; + bank = m_multigam3_mmc3_banks[1] * 0x2000; - memcpy(&prg[0x0a000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000); + memcpy(&prg[0x0a000], &m_multigam3_mmc3_prg_base[bank], 0x2000); } break; } @@ -489,23 +499,23 @@ static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w ) break; case 0x2000: /* mirroring */ - if (!state->m_multigam3_mmc3_4screen) + if (!m_multigam3_mmc3_4screen) { if (data & 0x40) - set_mirroring(state, PPU_MIRROR_HIGH); + set_mirroring(PPU_MIRROR_HIGH); else - set_mirroring(state, (data & 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_mirroring((data & 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); } break; case 0x2001: /* enable ram at $6000 */ if (data & 0x80) { - memory_set_bankptr(space->machine(), "bank10", state->m_multigmc_mmc3_6000_ram); + memory_set_bankptr(machine(), "bank10", m_multigmc_mmc3_6000_ram); } else { - memory_set_bankptr(space->machine(), "bank10", space->machine().region("maincpu")->base() + 0x6000); + memory_set_bankptr(machine(), "bank10", machine().region("maincpu")->base() + 0x6000); } if (data & 0x40) { @@ -514,11 +524,11 @@ static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w ) break; case 0x4000: /* scanline counter */ - state->m_multigam3_mmc3_scanline_counter = data; + m_multigam3_mmc3_scanline_counter = data; break; case 0x4001: /* scanline latch */ - state->m_multigam3_mmc3_scanline_latch = data; + m_multigam3_mmc3_scanline_latch = data; break; case 0x6000: /* disable irqs */ @@ -543,7 +553,7 @@ static void multigam_init_mmc3(running_machine &machine, UINT8 *prg_base, int pr memcpy(&dst[0x8000], prg_base + (prg_size - 0x4000), 0x4000); memcpy(&dst[0xc000], prg_base + (prg_size - 0x4000), 0x4000); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x8000, 0xffff, FUNC(multigam3_mmc3_rom_switch_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mmc3_rom_switch_w),state)); state->m_multigam3_mmc3_banks[0] = 0x1e; state->m_multigam3_mmc3_banks[1] = 0x1f; @@ -556,12 +566,11 @@ static void multigam_init_mmc3(running_machine &machine, UINT8 *prg_base, int pr state->m_multigam3_mmc3_prg_size = prg_size; }; -static WRITE8_HANDLER(multigm3_mapper2_w) +WRITE8_MEMBER(multigam_state::multigm3_mapper2_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - if (state->m_game_gfx_bank & 0x80) + if (m_game_gfx_bank & 0x80) { - set_videorom_bank(space->machine(), 0, 8, (state->m_game_gfx_bank & 0x3c) + (data & 0x3), 8); + set_videorom_bank(machine(), 0, 8, (m_game_gfx_bank & 0x3c) + (data & 0x3), 8); } else { @@ -569,29 +578,28 @@ static WRITE8_HANDLER(multigm3_mapper2_w) } }; -static WRITE8_HANDLER(multigm3_switch_gfx_rom) +WRITE8_MEMBER(multigam_state::multigm3_switch_gfx_rom) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - set_videorom_bank(space->machine(), 0, 8, data & 0x3f, 8); - set_mirroring(state, data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); - state->m_game_gfx_bank = data; + set_videorom_bank(machine(), 0, 8, data & 0x3f, 8); + set_mirroring(data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + m_game_gfx_bank = data; }; -static WRITE8_HANDLER(multigm3_switch_prg_rom) +WRITE8_MEMBER(multigam_state::multigm3_switch_prg_rom) { /* switch PRG rom */ - UINT8* dst = space->machine().region("maincpu")->base(); - UINT8* src = space->machine().region("user1")->base(); + UINT8* dst = machine().region("maincpu")->base(); + UINT8* src = machine().region("user1")->base(); if (data == 0xa8) { - multigam_init_mmc3(space->machine(), src + 0xa0000, 0x40000, 0x180); + multigam_init_mmc3(machine(), src + 0xa0000, 0x40000, 0x180); return; } else { - space->install_legacy_write_handler(0x8000, 0xffff, FUNC(multigm3_mapper2_w) ); - memory_set_bankptr(space->machine(), "bank10", space->machine().region("maincpu")->base() + 0x6000); + space.install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigm3_mapper2_w),this) ); + memory_set_bankptr(machine(), "bank10", machine().region("maincpu")->base() + 0x6000); } if (data & 0x80) @@ -620,18 +628,18 @@ static ADDRESS_MAP_START( multigm3_map, AS_PROGRAM, 8, multigam_state ) AM_RANGE(0x0800, 0x0fff) AM_RAM /* additional RAM */ AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nes", nes_psg_r, nes_psg_w) /* PSG primary registers */ - AM_RANGE(0x4014, 0x4014) AM_WRITE_LEGACY(sprite_dma_w) + AM_RANGE(0x4014, 0x4014) AM_WRITE(sprite_dma_w) AM_RANGE(0x4015, 0x4015) AM_DEVREADWRITE_LEGACY("nes", psg_4015_r, psg_4015_w) /* PSG status / first control register */ - AM_RANGE(0x4016, 0x4016) AM_READWRITE_LEGACY(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ - AM_RANGE(0x4017, 0x4017) AM_READ_LEGACY(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ - AM_RANGE(0x5001, 0x5001) AM_WRITE_LEGACY(multigm3_switch_prg_rom) + AM_RANGE(0x4016, 0x4016) AM_READWRITE(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ + AM_RANGE(0x4017, 0x4017) AM_READ(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ + AM_RANGE(0x5001, 0x5001) AM_WRITE(multigm3_switch_prg_rom) AM_RANGE(0x5002, 0x5002) AM_WRITENOP - AM_RANGE(0x5003, 0x5003) AM_WRITE_LEGACY(multigm3_switch_gfx_rom) + AM_RANGE(0x5003, 0x5003) AM_WRITE(multigm3_switch_gfx_rom) AM_RANGE(0x5000, 0x5ffe) AM_ROM AM_RANGE(0x5fff, 0x5fff) AM_READ_PORT("IN0") AM_RANGE(0x6000, 0x7fff) AM_RAMBANK("bank10") AM_RANGE(0x6fff, 0x6fff) AM_WRITENOP /* 0x00 in attract mode, 0xff during play */ - AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE_LEGACY(multigm3_mapper2_w) + AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE(multigm3_mapper2_w) ADDRESS_MAP_END /****************************************************** @@ -641,12 +649,11 @@ ADDRESS_MAP_END *******************************************************/ -static WRITE8_HANDLER(multigam3_mapper02_rom_switch_w) +WRITE8_MEMBER(multigam_state::multigam3_mapper02_rom_switch_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - UINT8* mem = space->machine().region("maincpu")->base(); - int bankmask = (state->m_mapper02_prg_size/0x4000) - 1; - memcpy(mem + 0x8000, state->m_mapper02_prg_base + 0x4000*(data & bankmask), 0x4000); + UINT8* mem = machine().region("maincpu")->base(); + int bankmask = (m_mapper02_prg_size/0x4000) - 1; + memcpy(mem + 0x8000, m_mapper02_prg_base + 0x4000*(data & bankmask), 0x4000); } static void multigam_init_mapper02(running_machine &machine, UINT8* prg_base, int prg_size) @@ -655,7 +662,7 @@ static void multigam_init_mapper02(running_machine &machine, UINT8* prg_base, in ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu"); UINT8* mem = machine.region("maincpu")->base(); memcpy(mem + 0x8000, prg_base + prg_size - 0x8000, 0x8000); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x8000, 0xffff, FUNC(multigam3_mapper02_rom_switch_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mapper02_rom_switch_w),state)); state->m_mapper02_prg_base = prg_base; state->m_mapper02_prg_size = prg_size; @@ -675,19 +682,18 @@ static TIMER_CALLBACK( mmc1_resync_callback ) state->m_mmc1_reg_write_enable = 1; } -static WRITE8_HANDLER( mmc1_rom_switch_w ) +WRITE8_MEMBER(multigam_state::mmc1_rom_switch_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); /* basically, a MMC1 mapper from the nes */ - if ( state->m_mmc1_reg_write_enable == 0 ) + if ( m_mmc1_reg_write_enable == 0 ) { return; } else { - state->m_mmc1_reg_write_enable = 0; - space->machine().scheduler().synchronize(FUNC(mmc1_resync_callback)); + m_mmc1_reg_write_enable = 0; + machine().scheduler().synchronize(FUNC(mmc1_resync_callback)); } int reg = (offset >> 13); @@ -695,28 +701,28 @@ static WRITE8_HANDLER( mmc1_rom_switch_w ) /* reset mapper */ if (data & 0x80) { - state->m_mmc1_shiftreg = state->m_mmc1_shiftcount = 0; + m_mmc1_shiftreg = m_mmc1_shiftcount = 0; - state->m_size16k = 1; - state->m_switchlow = 1; - state->m_vrom4k = 0; + m_size16k = 1; + m_switchlow = 1; + m_vrom4k = 0; return; } /* see if we need to clock in data */ - if (state->m_mmc1_shiftcount < 5) + if (m_mmc1_shiftcount < 5) { - state->m_mmc1_shiftreg >>= 1; - state->m_mmc1_shiftreg |= (data & 1) << 4; - state->m_mmc1_shiftcount++; + m_mmc1_shiftreg >>= 1; + m_mmc1_shiftreg |= (data & 1) << 4; + m_mmc1_shiftcount++; } /* are we done shifting? */ - if (state->m_mmc1_shiftcount == 5) + if (m_mmc1_shiftcount == 5) { /* reset count */ - state->m_mmc1_shiftcount = 0; + m_mmc1_shiftcount = 0; /* apply data to registers */ switch (reg) @@ -725,11 +731,11 @@ static WRITE8_HANDLER( mmc1_rom_switch_w ) { int _mirroring; - state->m_vrom4k = state->m_mmc1_shiftreg & 0x10; - state->m_size16k = state->m_mmc1_shiftreg & 0x08; - state->m_switchlow = state->m_mmc1_shiftreg & 0x04; + m_vrom4k = m_mmc1_shiftreg & 0x10; + m_size16k = m_mmc1_shiftreg & 0x08; + m_switchlow = m_mmc1_shiftreg & 0x04; - switch (state->m_mmc1_shiftreg & 3) + switch (m_mmc1_shiftreg & 3) { case 0: _mirroring = PPU_MIRROR_LOW; @@ -750,52 +756,52 @@ static WRITE8_HANDLER( mmc1_rom_switch_w ) } /* apply mirroring */ - set_mirroring(state, _mirroring); + set_mirroring(_mirroring); } break; case 1: /* video rom banking - bank 0 - 4k or 8k */ - if (state->m_mmc1_chr_bank_base == 0) - set_videoram_bank(space->machine(), 0, (state->m_vrom4k) ? 4 : 8, (state->m_mmc1_shiftreg & 0x1f), 4); + if (m_mmc1_chr_bank_base == 0) + set_videoram_bank(machine(), 0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4); else - set_videorom_bank(space->machine(), 0, (state->m_vrom4k) ? 4 : 8, state->m_mmc1_chr_bank_base + (state->m_mmc1_shiftreg & 0x1f), 4); + set_videorom_bank(machine(), 0, (m_vrom4k) ? 4 : 8, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4); break; case 2: /* video rom banking - bank 1 - 4k only */ - if (state->m_vrom4k) + if (m_vrom4k) { - if (state->m_mmc1_chr_bank_base == 0) - set_videoram_bank(space->machine(), 0, (state->m_vrom4k) ? 4 : 8, (state->m_mmc1_shiftreg & 0x1f), 4); + if (m_mmc1_chr_bank_base == 0) + set_videoram_bank(machine(), 0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4); else - set_videorom_bank(space->machine(), 4, 4, state->m_mmc1_chr_bank_base + (state->m_mmc1_shiftreg & 0x1f), 4); + set_videorom_bank(machine(), 4, 4, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4); } break; case 3: /* program banking */ { - int bank = (state->m_mmc1_shiftreg & state->m_mmc1_rom_mask) * 0x4000; - UINT8 *prg = space->machine().region("maincpu")->base(); + int bank = (m_mmc1_shiftreg & m_mmc1_rom_mask) * 0x4000; + UINT8 *prg = machine().region("maincpu")->base(); - if (!state->m_size16k) + if (!m_size16k) { - bank = ((state->m_mmc1_shiftreg >> 1) & state->m_mmc1_rom_mask) * 0x4000; + bank = ((m_mmc1_shiftreg >> 1) & m_mmc1_rom_mask) * 0x4000; /* switch 32k */ - memcpy(&prg[0x08000], state->m_mmc1_prg_base + bank, 0x8000); + memcpy(&prg[0x08000], m_mmc1_prg_base + bank, 0x8000); } else { /* switch 16k */ - if (state->m_switchlow) + if (m_switchlow) { /* low */ - memcpy(&prg[0x08000], state->m_mmc1_prg_base + bank, 0x4000); - memcpy(&prg[0x0c000], state->m_mmc1_prg_base + (0x0f & state->m_mmc1_rom_mask) * 0x4000, 0x4000); + memcpy(&prg[0x08000], m_mmc1_prg_base + bank, 0x4000); + memcpy(&prg[0x0c000], m_mmc1_prg_base + (0x0f & m_mmc1_rom_mask) * 0x4000, 0x4000); } else { /* high */ - memcpy(&prg[0x08000], state->m_mmc1_prg_base + (0x00 & state->m_mmc1_rom_mask) * 0x4000, 0x4000); - memcpy(&prg[0x0c000], state->m_mmc1_prg_base + bank, 0x4000); + memcpy(&prg[0x08000], m_mmc1_prg_base + (0x00 & m_mmc1_rom_mask) * 0x4000, 0x4000); + memcpy(&prg[0x0c000], m_mmc1_prg_base + bank, 0x4000); } } } @@ -812,7 +818,7 @@ static void multigam_init_mmc1(running_machine &machine, UINT8 *prg_base, int pr memcpy(&dst[0x8000], prg_base + (prg_size - 0x8000), 0x8000); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x8000, 0xffff, FUNC(mmc1_rom_switch_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::mmc1_rom_switch_w),state)); state->m_mmc1_reg_write_enable = 1; state->m_mmc1_rom_mask = (prg_size / 0x4000) - 1; @@ -862,7 +868,7 @@ static void supergm3_set_bank(running_machine &machine) memory_set_bankptr(machine, "bank1", state->m_vram); if (state->m_supergm3_chr_bank == 0x40) - set_mirroring(state, PPU_MIRROR_VERT); + state->set_mirroring(PPU_MIRROR_VERT); } else { @@ -912,17 +918,15 @@ static void supergm3_set_bank(running_machine &machine) } } -static WRITE8_HANDLER(supergm3_prg_bank_w) +WRITE8_MEMBER(multigam_state::supergm3_prg_bank_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - state->m_supergm3_prg_bank = data; + m_supergm3_prg_bank = data; } -static WRITE8_HANDLER(supergm3_chr_bank_w) +WRITE8_MEMBER(multigam_state::supergm3_chr_bank_w) { - multigam_state *state = space->machine().driver_data<multigam_state>(); - state->m_supergm3_chr_bank = data; - supergm3_set_bank(space->machine()); + m_supergm3_chr_bank = data; + supergm3_set_bank(machine()); } /****************************************************** @@ -936,15 +940,15 @@ static ADDRESS_MAP_START( supergm3_map, AS_PROGRAM, 8, multigam_state ) AM_RANGE(0x0800, 0x0fff) AM_RAM /* additional RAM */ AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nes", nes_psg_r, nes_psg_w) /* PSG primary registers */ - AM_RANGE(0x4014, 0x4014) AM_WRITE_LEGACY(sprite_dma_w) + AM_RANGE(0x4014, 0x4014) AM_WRITE(sprite_dma_w) AM_RANGE(0x4015, 0x4015) AM_DEVREADWRITE_LEGACY("nes", psg_4015_r, psg_4015_w) /* PSG status / first control register */ - AM_RANGE(0x4016, 0x4016) AM_READWRITE_LEGACY(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ - AM_RANGE(0x4017, 0x4017) AM_READ_LEGACY(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ + AM_RANGE(0x4016, 0x4016) AM_READWRITE(multigam_IN0_r, multigam_IN0_w) /* IN0 - input port 1 */ + AM_RANGE(0x4017, 0x4017) AM_READ(multigam_IN1_r) AM_DEVWRITE_LEGACY("nes", psg_4017_w) /* IN1 - input port 2 / PSG second control register */ AM_RANGE(0x4fff, 0x4fff) AM_READ_PORT("IN0") AM_RANGE(0x5000, 0x5fff) AM_ROM AM_RANGE(0x5000, 0x5000) AM_WRITENOP - AM_RANGE(0x5001, 0x5001) AM_WRITE_LEGACY(supergm3_prg_bank_w) - AM_RANGE(0x5002, 0x5002) AM_WRITE_LEGACY(supergm3_chr_bank_w) + AM_RANGE(0x5001, 0x5001) AM_WRITE(supergm3_prg_bank_w) + AM_RANGE(0x5002, 0x5002) AM_WRITE(supergm3_chr_bank_w) AM_RANGE(0x5fff, 0x5fff) AM_WRITENOP AM_RANGE(0x6000, 0x7fff) AM_RAMBANK("bank10") AM_RANGE(0x8000, 0xffff) AM_ROM @@ -1120,7 +1124,8 @@ static MACHINE_RESET( multigm3 ) { address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM); /* reset the ppu */ - multigm3_switch_prg_rom(space, 0, 0x01 ); + multigam_state *state = machine.driver_data<multigam_state>(); + state->multigm3_switch_prg_rom(*space, 0, 0x01 ); }; static MACHINE_START( multigam ) @@ -1132,7 +1137,7 @@ static MACHINE_START( multigam ) state->m_nt_page[2] = state->m_nt_ram + 0x800; state->m_nt_page[3] = state->m_nt_ram + 0xc00; - machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x2000, 0x3eff, FUNC(multigam_nt_r), FUNC(multigam_nt_w)); + machine.device("ppu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(multigam_state::multigam_nt_r),state), write8_delegate(FUNC(multigam_state::multigam_nt_w),state)); machine.device("ppu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank1"); memory_set_bankptr(machine, "bank1", machine.region("gfx1")->base()); } @@ -1146,7 +1151,7 @@ static MACHINE_START( multigm3 ) state->m_nt_page[2] = state->m_nt_ram + 0x800; state->m_nt_page[3] = state->m_nt_ram + 0xc00; - machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x2000, 0x3eff, FUNC(multigam_nt_r), FUNC(multigam_nt_w)); + machine.device("ppu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(multigam_state::multigam_nt_r),state), write8_delegate(FUNC(multigam_state::multigam_nt_w),state)); machine.device("ppu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x03ff, "bank2"); machine.device("ppu")->memory().space(AS_PROGRAM)->install_read_bank(0x0400, 0x07ff, "bank3"); @@ -1169,7 +1174,7 @@ static MACHINE_START( supergm3 ) state->m_nt_page[2] = state->m_nt_ram + 0x800; state->m_nt_page[3] = state->m_nt_ram + 0xc00; - machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x2000, 0x3eff, FUNC(multigam_nt_r), FUNC(multigam_nt_w)); + machine.device("ppu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(multigam_state::multigam_nt_r),state), write8_delegate(FUNC(multigam_state::multigam_nt_w),state)); state->m_vram = auto_alloc_array(machine, UINT8, 0x2000); state->m_multigmc_mmc3_6000_ram = auto_alloc_array(machine, UINT8, 0x2000); @@ -1347,8 +1352,9 @@ ROM_END static DRIVER_INIT( multigam ) { + multigam_state *state = machine.driver_data<multigam_state>(); address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM); - multigam_switch_prg_rom(space, 0x0, 0x01); + state->multigam_switch_prg_rom(*space, 0x0, 0x01); } static void multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble) @@ -1372,7 +1378,7 @@ static DRIVER_INIT(multigm3) state->m_multigmc_mmc3_6000_ram = auto_alloc_array(machine, UINT8, 0x2000); - multigam_switch_prg_rom(space, 0x0, 0x01); + state->multigam_switch_prg_rom(*space, 0x0, 0x01); } static DRIVER_INIT(multigmt) @@ -1413,8 +1419,8 @@ static DRIVER_INIT(multigmt) } auto_free(machine, buf); - - multigam_switch_prg_rom(space, 0x0, 0x01); + multigam_state *state = machine.driver_data<multigam_state>(); + state->multigam_switch_prg_rom(*space, 0x0, 0x01); }; GAME( 1992, multigam, 0, multigam, multigam, multigam, ROT0, "<unknown>", "Multi Game (set 1)", 0 ) diff --git a/src/mame/drivers/namcos11.c b/src/mame/drivers/namcos11.c index 6f32963f625..1a30c12655d 100644 --- a/src/mame/drivers/namcos11.c +++ b/src/mame/drivers/namcos11.c @@ -297,6 +297,36 @@ public: required_device<cpu_device> m_maincpu; required_device<cpu_device> m_mcu; + DECLARE_WRITE32_MEMBER(keycus_w); + DECLARE_READ32_MEMBER(keycus_c406_r); + DECLARE_READ32_MEMBER(keycus_c409_r); + DECLARE_READ32_MEMBER(keycus_c410_r); + DECLARE_READ32_MEMBER(keycus_c411_r); + DECLARE_READ32_MEMBER(keycus_c430_r); + DECLARE_READ32_MEMBER(keycus_c431_r); + DECLARE_READ32_MEMBER(keycus_c432_r); + DECLARE_READ32_MEMBER(keycus_c442_r); + DECLARE_READ32_MEMBER(keycus_c443_r); + DECLARE_WRITE32_MEMBER(bankswitch_rom32_w); + DECLARE_WRITE32_MEMBER(bankswitch_rom64_upper_w); + DECLARE_WRITE32_MEMBER(bankswitch_rom64_w); + DECLARE_WRITE32_MEMBER(lightgun_w); + DECLARE_READ32_MEMBER(lightgun_r); + DECLARE_READ16_MEMBER(c76_shared_r); + DECLARE_WRITE16_MEMBER(c76_shared_w); + DECLARE_READ16_MEMBER(c76_inputs_r); + DECLARE_READ8_MEMBER(dac7_r); + DECLARE_READ8_MEMBER(dac6_r); + DECLARE_READ8_MEMBER(dac5_r); + DECLARE_READ8_MEMBER(dac4_r); + DECLARE_READ8_MEMBER(dac3_r); + DECLARE_READ8_MEMBER(dac2_r); + DECLARE_READ8_MEMBER(dac1_r); + DECLARE_READ8_MEMBER(dac0_r); + DECLARE_READ8_MEMBER(pocketrc_gas_r); + DECLARE_READ8_MEMBER(pocketrc_steer_r); + DECLARE_READ16_MEMBER(c76_speedup_r); + DECLARE_WRITE16_MEMBER(c76_speedup_w); }; INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... ) @@ -312,20 +342,18 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, } } -static WRITE32_HANDLER( keycus_w ) +WRITE32_MEMBER(namcos11_state::keycus_w) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - verboselog( space->machine(), 1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - COMBINE_DATA( &state->m_keycus[ offset ] ); + verboselog( machine(), 1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + COMBINE_DATA( &m_keycus[ offset ] ); } /* tekken 2 */ -static READ32_HANDLER( keycus_c406_r ) +READ32_MEMBER(namcos11_state::keycus_c406_r) { /* todo: verify behaviour */ - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT32 *namcos11_keycus = state->m_keycus; + UINT32 *namcos11_keycus = m_keycus; UINT32 data; data = namcos11_keycus[ offset ]; @@ -339,33 +367,31 @@ static READ32_HANDLER( keycus_c406_r ) ( ( namcos11_keycus[ 1 ] >> 8 ) & 0xf ); break; } - verboselog( space->machine(), 1, "keycus_c406_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c406_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* soul edge */ -static READ32_HANDLER( keycus_c409_r ) +READ32_MEMBER(namcos11_state::keycus_c409_r) { /* todo: verify behaviour */ - namcos11_state *state = space->machine().driver_data<namcos11_state>(); UINT32 data; - data = state->m_keycus[ offset ]; + data = m_keycus[ offset ]; switch( offset ) { case 3: data = ( data & 0x0000ffff ) | 0x000f0000; break; } - verboselog( space->machine(), 1, "keycus_c409_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c409_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* dunk mania */ -static READ32_HANDLER( keycus_c410_r ) +READ32_MEMBER(namcos11_state::keycus_c410_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT32 *namcos11_keycus = state->m_keycus; + UINT32 *namcos11_keycus = m_keycus; UINT32 data; UINT32 n_value; @@ -393,15 +419,14 @@ static READ32_HANDLER( keycus_c410_r ) ( ( ( n_value / 10000 ) % 10 ) << 16 ); break; } - verboselog( space->machine(), 1, "keycus_c410_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c410_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* prime goal ex */ -static READ32_HANDLER( keycus_c411_r ) +READ32_MEMBER(namcos11_state::keycus_c411_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT32 *namcos11_keycus = state->m_keycus; + UINT32 *namcos11_keycus = m_keycus; UINT32 data; UINT32 n_value; @@ -428,15 +453,14 @@ static READ32_HANDLER( keycus_c411_r ) break; } - verboselog( space->machine(), 1, "keycus_c411_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c411_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* xevious 3d/g */ -static READ32_HANDLER( keycus_c430_r ) +READ32_MEMBER(namcos11_state::keycus_c430_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT32 *namcos11_keycus = state->m_keycus; + UINT32 *namcos11_keycus = m_keycus; UINT32 data; UINT16 n_value; @@ -464,15 +488,14 @@ static READ32_HANDLER( keycus_c430_r ) ( ( ( n_value / 1 ) % 10 ) << 16 ); break; } - verboselog( space->machine(), 1, "keycus_c430_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c430_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* dancing eyes */ -static READ32_HANDLER( keycus_c431_r ) +READ32_MEMBER(namcos11_state::keycus_c431_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT32 *namcos11_keycus = state->m_keycus; + UINT32 *namcos11_keycus = m_keycus; UINT32 data; UINT16 n_value; @@ -498,15 +521,14 @@ static READ32_HANDLER( keycus_c431_r ) data = ( data & 0xffff0000 ) | ( ( n_value / 10000 ) % 10 ); break; } - verboselog( space->machine(), 1, "keycus_c431_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c431_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* pocket racer */ -static READ32_HANDLER( keycus_c432_r ) +READ32_MEMBER(namcos11_state::keycus_c432_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT32 *namcos11_keycus = state->m_keycus; + UINT32 *namcos11_keycus = m_keycus; UINT32 data; UINT16 n_value; @@ -533,18 +555,17 @@ static READ32_HANDLER( keycus_c432_r ) break; } - verboselog( space->machine(), 1, "keycus_c432_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c432_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* star sweep */ -static READ32_HANDLER( keycus_c442_r ) +READ32_MEMBER(namcos11_state::keycus_c442_r) { /* todo: verify behaviour */ - namcos11_state *state = space->machine().driver_data<namcos11_state>(); UINT32 data; - data = state->m_keycus[ offset ]; + data = m_keycus[ offset ]; switch( offset ) { @@ -555,18 +576,17 @@ static READ32_HANDLER( keycus_c442_r ) } break; } - verboselog( space->machine(), 1, "keycus_c442_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c442_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } /* kosodate quiz my angel 3 / point blank 2 */ -static READ32_HANDLER( keycus_c443_r ) +READ32_MEMBER(namcos11_state::keycus_c443_r) { /* todo: verify behaviour */ - namcos11_state *state = space->machine().driver_data<namcos11_state>(); UINT32 data; - data = state->m_keycus[ offset ]; + data = m_keycus[ offset ]; switch( offset ) { @@ -589,7 +609,7 @@ static READ32_HANDLER( keycus_c443_r ) } break; } - verboselog( space->machine(), 1, "keycus_c443_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "keycus_c443_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } @@ -600,33 +620,32 @@ INLINE void bankswitch_rom8( address_space *space, const char *bank, int n_data static const char * const bankname[] = { "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8" }; -static WRITE32_HANDLER( bankswitch_rom32_w ) +WRITE32_MEMBER(namcos11_state::bankswitch_rom32_w) { - verboselog( space->machine(), 2, "bankswitch_rom32_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 2, "bankswitch_rom32_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); if( ACCESSING_BITS_0_15 ) { - bankswitch_rom8( space, bankname[offset * 2], data & 0xffff ); + bankswitch_rom8( &space, bankname[offset * 2], data & 0xffff ); } if( ACCESSING_BITS_16_31 ) { - bankswitch_rom8( space, bankname[offset * 2 + 1], data >> 16 ); + bankswitch_rom8( &space, bankname[offset * 2 + 1], data >> 16 ); } } -static WRITE32_HANDLER( bankswitch_rom64_upper_w ) +WRITE32_MEMBER(namcos11_state::bankswitch_rom64_upper_w) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - verboselog( space->machine(), 2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); if( ACCESSING_BITS_0_15 ) { - state->m_n_bankoffset = 0; + m_n_bankoffset = 0; } if( ACCESSING_BITS_16_31 ) { - state->m_n_bankoffset = 16; + m_n_bankoffset = 16; } } @@ -638,21 +657,21 @@ INLINE void bankswitch_rom64( address_space *space, const char *bank, int n_data memory_set_bank( space->machine(), bank, ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) ); } -static WRITE32_HANDLER( bankswitch_rom64_w ) +WRITE32_MEMBER(namcos11_state::bankswitch_rom64_w) { - verboselog( space->machine(), 2, "bankswitch_rom64_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 2, "bankswitch_rom64_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); if( ACCESSING_BITS_0_15 ) { - bankswitch_rom64( space, bankname[offset * 2], data & 0xffff ); + bankswitch_rom64( &space, bankname[offset * 2], data & 0xffff ); } if( ACCESSING_BITS_16_31 ) { - bankswitch_rom64( space, bankname[offset * 2 + 1], data >> 16 ); + bankswitch_rom64( &space, bankname[offset * 2 + 1], data >> 16 ); } } -static WRITE32_HANDLER( lightgun_w ) +WRITE32_MEMBER(namcos11_state::lightgun_w) { if( ACCESSING_BITS_0_15 ) { @@ -661,40 +680,40 @@ static WRITE32_HANDLER( lightgun_w ) output_set_value( "recoil0", !( data & 0x02 ) ); output_set_value( "recoil1", !( data & 0x01 ) ); - verboselog( space->machine(), 1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask ); + verboselog( machine(), 1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask ); } if( ACCESSING_BITS_16_31 ) { - verboselog( space->machine(), 2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask ); + verboselog( machine(), 2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask ); } } -static READ32_HANDLER( lightgun_r ) +READ32_MEMBER(namcos11_state::lightgun_r) { UINT32 data = 0; switch( offset ) { case 0: - data = input_port_read( space->machine(), "GUN1X" ); + data = input_port_read( machine(), "GUN1X" ); break; case 1: - data = ( input_port_read( space->machine(), "GUN1Y" ) ) | ( ( input_port_read( space->machine(), "GUN1Y" ) + 1 ) << 16 ); + data = ( input_port_read( machine(), "GUN1Y" ) ) | ( ( input_port_read( machine(), "GUN1Y" ) + 1 ) << 16 ); break; case 2: - data = input_port_read( space->machine(), "GUN2X" ); + data = input_port_read( machine(), "GUN2X" ); break; case 3: - data = ( input_port_read( space->machine(), "GUN2Y" ) ) | ( ( input_port_read( space->machine(), "GUN2Y" ) + 1 ) << 16 ); + data = ( input_port_read( machine(), "GUN2Y" ) ) | ( ( input_port_read( machine(), "GUN2Y" ) + 1 ) << 16 ); break; } - verboselog( space->machine(), 2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } static ADDRESS_MAP_START( namcos11_map, AS_PROGRAM, 32, namcos11_state ) AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */ AM_RANGE(0x1fa04000, 0x1fa0ffff) AM_RAM AM_BASE(m_sharedram) /* shared ram with C76 */ - AM_RANGE(0x1fa20000, 0x1fa2ffff) AM_WRITE_LEGACY(keycus_w) AM_BASE_SIZE(m_keycus, m_keycus_size) /* keycus */ + AM_RANGE(0x1fa20000, 0x1fa2ffff) AM_WRITE(keycus_w) AM_BASE_SIZE(m_keycus, m_keycus_size) /* keycus */ AM_RANGE(0x1fa30000, 0x1fa30fff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0x00ff00ff) /* eeprom */ AM_RANGE(0x1fb00000, 0x1fb00003) AM_WRITENOP /* ?? */ AM_RANGE(0x1fbf6000, 0x1fbf6003) AM_WRITENOP /* ?? */ @@ -706,39 +725,37 @@ static ADDRESS_MAP_START( namcos11_map, AS_PROGRAM, 32, namcos11_state ) AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP ADDRESS_MAP_END -static READ16_HANDLER( c76_shared_r ) +READ16_MEMBER(namcos11_state::c76_shared_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT16 *share16 = (UINT16 *)state->m_sharedram; + UINT16 *share16 = (UINT16 *)m_sharedram; return share16[offset]; } -static WRITE16_HANDLER( c76_shared_w ) +WRITE16_MEMBER(namcos11_state::c76_shared_w) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - UINT16 *share16 = (UINT16 *)state->m_sharedram; + UINT16 *share16 = (UINT16 *)m_sharedram; COMBINE_DATA(&share16[offset]); } -static READ16_HANDLER( c76_inputs_r ) +READ16_MEMBER(namcos11_state::c76_inputs_r) { -// logerror("'c76' Read port %d @ %06X\n", offset, cpu_get_pc(&space->device())); +// logerror("'c76' Read port %d @ %06X\n", offset, cpu_get_pc(&space.device())); switch (offset) { case 0: - return input_port_read(space->machine(), "PLAYER4"); + return input_port_read(machine(), "PLAYER4"); case 1: - return input_port_read(space->machine(), "SWITCH"); + return input_port_read(machine(), "SWITCH"); case 2: - return input_port_read(space->machine(), "PLAYER1"); + return input_port_read(machine(), "PLAYER1"); case 3: - return input_port_read(space->machine(), "PLAYER2"); + return input_port_read(machine(), "PLAYER2"); } return 0xff; @@ -746,8 +763,8 @@ static READ16_HANDLER( c76_inputs_r ) ADDRESS_MAP_START( c76_map, AS_PROGRAM, 16, namcos11_state ) AM_RANGE(0x002000, 0x002fff) AM_DEVREADWRITE("c352", c352_device, read, write) - AM_RANGE(0x001000, 0x001007) AM_READ_LEGACY(c76_inputs_r ) - AM_RANGE(0x004000, 0x00bfff) AM_READWRITE_LEGACY(c76_shared_r, c76_shared_w ) + AM_RANGE(0x001000, 0x001007) AM_READ(c76_inputs_r ) + AM_RANGE(0x004000, 0x00bfff) AM_READWRITE(c76_shared_r, c76_shared_w ) AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c76", 0x40000) AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("c76", 0) AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c76", 0) @@ -756,86 +773,84 @@ ADDRESS_MAP_START( c76_map, AS_PROGRAM, 16, namcos11_state ) AM_RANGE(0x301000, 0x301001) AM_WRITENOP ADDRESS_MAP_END -static READ8_HANDLER(dac7_r) // bit 7 +READ8_MEMBER(namcos11_state::dac7_r)// bit 7 { - return input_port_read_safe(space->machine(), "PLAYER3", 0xff)&0x80; + return input_port_read_safe(machine(), "PLAYER3", 0xff)&0x80; } -static READ8_HANDLER(dac6_r) // bit 3 +READ8_MEMBER(namcos11_state::dac6_r)// bit 3 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<4)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<4)&0x80; } -static READ8_HANDLER(dac5_r) // bit 2 +READ8_MEMBER(namcos11_state::dac5_r)// bit 2 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<5)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<5)&0x80; } -static READ8_HANDLER(dac4_r) // bit 1 +READ8_MEMBER(namcos11_state::dac4_r)// bit 1 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<6)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<6)&0x80; } -static READ8_HANDLER(dac3_r) // bit 0 +READ8_MEMBER(namcos11_state::dac3_r)// bit 0 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<7)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<7)&0x80; } -static READ8_HANDLER(dac2_r) // bit 4 +READ8_MEMBER(namcos11_state::dac2_r)// bit 4 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<3)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<3)&0x80; } -static READ8_HANDLER(dac1_r) // bit 5 +READ8_MEMBER(namcos11_state::dac1_r)// bit 5 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<2)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<2)&0x80; } -static READ8_HANDLER(dac0_r) // bit 6 +READ8_MEMBER(namcos11_state::dac0_r)// bit 6 { - return (input_port_read_safe(space->machine(), "PLAYER3", 0xff)<<1)&0x80; + return (input_port_read_safe(machine(), "PLAYER3", 0xff)<<1)&0x80; } -static READ8_HANDLER(pocketrc_gas_r) +READ8_MEMBER(namcos11_state::pocketrc_gas_r) { - return input_port_read(space->machine(), "GAS"); + return input_port_read(machine(), "GAS"); } -static READ8_HANDLER(pocketrc_steer_r) +READ8_MEMBER(namcos11_state::pocketrc_steer_r) { - return input_port_read(space->machine(), "STEERING"); + return input_port_read(machine(), "STEERING"); } ADDRESS_MAP_START( c76_io_map, AS_IO, 8, namcos11_state ) - AM_RANGE(M37710_ADC7_L, M37710_ADC7_L) AM_READ_LEGACY(dac7_r) - AM_RANGE(M37710_ADC6_L, M37710_ADC6_L) AM_READ_LEGACY(dac6_r) - AM_RANGE(M37710_ADC5_L, M37710_ADC5_L) AM_READ_LEGACY(dac5_r) - AM_RANGE(M37710_ADC4_L, M37710_ADC4_L) AM_READ_LEGACY(dac4_r) - AM_RANGE(M37710_ADC3_L, M37710_ADC3_L) AM_READ_LEGACY(dac3_r) - AM_RANGE(M37710_ADC2_L, M37710_ADC2_L) AM_READ_LEGACY(dac2_r) - AM_RANGE(M37710_ADC1_L, M37710_ADC1_L) AM_READ_LEGACY(dac1_r) - AM_RANGE(M37710_ADC0_L, M37710_ADC0_L) AM_READ_LEGACY(dac0_r) + AM_RANGE(M37710_ADC7_L, M37710_ADC7_L) AM_READ(dac7_r) + AM_RANGE(M37710_ADC6_L, M37710_ADC6_L) AM_READ(dac6_r) + AM_RANGE(M37710_ADC5_L, M37710_ADC5_L) AM_READ(dac5_r) + AM_RANGE(M37710_ADC4_L, M37710_ADC4_L) AM_READ(dac4_r) + AM_RANGE(M37710_ADC3_L, M37710_ADC3_L) AM_READ(dac3_r) + AM_RANGE(M37710_ADC2_L, M37710_ADC2_L) AM_READ(dac2_r) + AM_RANGE(M37710_ADC1_L, M37710_ADC1_L) AM_READ(dac1_r) + AM_RANGE(M37710_ADC0_L, M37710_ADC0_L) AM_READ(dac0_r) AM_RANGE(M37710_ADC0_H, M37710_ADC7_H) AM_READNOP ADDRESS_MAP_END -static READ16_HANDLER( c76_speedup_r ) +READ16_MEMBER(namcos11_state::c76_speedup_r) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - if ((cpu_get_pc(&space->device()) == 0xc153) && (!(state->m_su_83 & 0xff00))) + if ((cpu_get_pc(&space.device()) == 0xc153) && (!(m_su_83 & 0xff00))) { - device_spin_until_interrupt(&space->device()); + device_spin_until_interrupt(&space.device()); } - return state->m_su_83; + return m_su_83; } -static WRITE16_HANDLER( c76_speedup_w ) +WRITE16_MEMBER(namcos11_state::c76_speedup_w) { - namcos11_state *state = space->machine().driver_data<namcos11_state>(); - COMBINE_DATA(&state->m_su_83); + COMBINE_DATA(&m_su_83); } static void namcos11_init_common(running_machine &machine, int n_daughterboard) @@ -847,7 +862,7 @@ static void namcos11_init_common(running_machine &machine, int n_daughterboard) if (C76_SPEEDUP) { state->save_item( NAME(state->m_su_83) ); - machine.device("c76")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x82, 0x83, FUNC(c76_speedup_r), FUNC(c76_speedup_w)); + machine.device("c76")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),state), write16_delegate(FUNC(namcos11_state::c76_speedup_w),state)); } if (!n_daughterboard) @@ -878,14 +893,14 @@ static void namcos11_init_common(running_machine &machine, int n_daughterboard) if (n_daughterboard == 32) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1fa10020, 0x1fa1002f, FUNC(bankswitch_rom32_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom32_w),state)); } if (n_daughterboard == 64) { state->m_n_bankoffset = 0; - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1f080000, 0x1f080003, FUNC(bankswitch_rom64_upper_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1f080000, 0x1f080003, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_upper_w),state)); machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_read(0x1fa10020, 0x1fa1002f); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1fa10020, 0x1fa1002f, FUNC(bankswitch_rom64_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_w),state)); state->save_item( NAME(state->m_n_bankoffset) ); } } @@ -897,68 +912,78 @@ static DRIVER_INIT( tekken ) static DRIVER_INIT( tekken2 ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c406_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c406_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( souledge ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c409_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c409_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( dunkmnia ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c410_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c410_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( primglex ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c411_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c411_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( xevi3dg ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c430_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c430_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( danceyes ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c431_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c431_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( pocketrc ) { - machine.device("c76")->memory().space(AS_IO)->install_legacy_read_handler(M37710_ADC0_L, M37710_ADC0_L, FUNC(pocketrc_steer_r)); - machine.device("c76")->memory().space(AS_IO)->install_legacy_read_handler(M37710_ADC1_L, M37710_ADC1_L, FUNC(pocketrc_gas_r)); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("c76")->memory().space(AS_IO)->install_read_handler(M37710_ADC0_L, M37710_ADC0_L, read8_delegate(FUNC(namcos11_state::pocketrc_steer_r),state)); + machine.device("c76")->memory().space(AS_IO)->install_read_handler(M37710_ADC1_L, M37710_ADC1_L, read8_delegate(FUNC(namcos11_state::pocketrc_gas_r),state)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c432_r) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c432_r),state)); namcos11_init_common(machine, 32); } static DRIVER_INIT( starswep ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c442_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c442_r),state)); namcos11_init_common(machine, 0); } static DRIVER_INIT( myangel3 ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c443_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c443_r),state)); namcos11_init_common(machine, 64); } static DRIVER_INIT( ptblank2ua ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler( 0x1fa20000, 0x1fa2ffff, FUNC(keycus_c443_r) ); + namcos11_state *state = machine.driver_data<namcos11_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c443_r),state)); namcos11_init_common(machine, 64); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1f788000, 0x1f788003, FUNC(lightgun_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler (0x1f780000, 0x1f78000f, FUNC(lightgun_r) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos11_state::lightgun_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos11_state::lightgun_r),state)); } static MACHINE_RESET( namcos11 ) diff --git a/src/mame/drivers/namcos12.c b/src/mame/drivers/namcos12.c index a5ea59bce37..e188164b54b 100644 --- a/src/mame/drivers/namcos12.c +++ b/src/mame/drivers/namcos12.c @@ -1067,6 +1067,31 @@ public: int m_s12_setstate; int m_s12_setnum; int m_s12_settings[8]; + DECLARE_WRITE32_MEMBER(sharedram_w); + DECLARE_READ32_MEMBER(sharedram_r); + DECLARE_WRITE16_MEMBER(sharedram_sub_w); + DECLARE_READ16_MEMBER(sharedram_sub_r); + DECLARE_WRITE32_MEMBER(bankoffset_w); + DECLARE_WRITE32_MEMBER(dmaoffset_w); + DECLARE_WRITE32_MEMBER(s12_dma_bias_w); + DECLARE_WRITE32_MEMBER(system11gun_w); + DECLARE_READ32_MEMBER(system11gun_r); + DECLARE_WRITE32_MEMBER(kcoff_w); + DECLARE_WRITE32_MEMBER(kcon_w); + DECLARE_WRITE32_MEMBER(tektagt_protection_1_w); + DECLARE_READ32_MEMBER(tektagt_protection_1_r); + DECLARE_WRITE32_MEMBER(tektagt_protection_2_w); + DECLARE_READ32_MEMBER(tektagt_protection_2_r); + DECLARE_READ32_MEMBER(tektagt_protection_3_r); + DECLARE_READ8_MEMBER(s12_mcu_p8_r); + DECLARE_READ8_MEMBER(s12_mcu_pa_r); + DECLARE_WRITE8_MEMBER(s12_mcu_pa_w); + DECLARE_READ8_MEMBER(s12_mcu_rtc_r); + DECLARE_READ8_MEMBER(s12_mcu_portB_r); + DECLARE_WRITE8_MEMBER(s12_mcu_portB_w); + DECLARE_WRITE8_MEMBER(s12_mcu_settings_w); + DECLARE_READ8_MEMBER(s12_mcu_gun_h_r); + DECLARE_READ8_MEMBER(s12_mcu_gun_v_r); }; INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... ) @@ -1082,80 +1107,74 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, } } -static WRITE32_HANDLER( sharedram_w ) +WRITE32_MEMBER(namcos12_state::sharedram_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - verboselog( space->machine(), 1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask ); - COMBINE_DATA( &state->m_sharedram[ offset ] ); + verboselog( machine(), 1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask ); + COMBINE_DATA( &m_sharedram[ offset ] ); } -static READ32_HANDLER( sharedram_r ) +READ32_MEMBER(namcos12_state::sharedram_r) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - verboselog( space->machine(), 1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, state->m_sharedram[ offset ] ); - return state->m_sharedram[ offset ]; + verboselog( machine(), 1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, m_sharedram[ offset ] ); + return m_sharedram[ offset ]; } -static WRITE16_HANDLER( sharedram_sub_w ) +WRITE16_MEMBER(namcos12_state::sharedram_sub_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - UINT16 *shared16 = (UINT16 *)state->m_sharedram; + UINT16 *shared16 = (UINT16 *)m_sharedram; COMBINE_DATA(&shared16[BYTE_XOR_LE(offset)]); } -static READ16_HANDLER( sharedram_sub_r ) +READ16_MEMBER(namcos12_state::sharedram_sub_r) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - UINT16 *shared16 = (UINT16 *)state->m_sharedram; + UINT16 *shared16 = (UINT16 *)m_sharedram; return shared16[BYTE_XOR_LE(offset)]; } -static WRITE32_HANDLER( bankoffset_w ) +WRITE32_MEMBER(namcos12_state::bankoffset_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); // Golgo 13 has different banking (maybe the keycus controls it?) - if( strcmp( space->machine().system().name, "golgo13" ) == 0 || - strcmp( space->machine().system().name, "g13knd" ) == 0 ) + if( strcmp( machine().system().name, "golgo13" ) == 0 || + strcmp( machine().system().name, "g13knd" ) == 0 ) { if( ( data & 8 ) != 0 ) { - state->m_n_bankoffset = ( data & 0x6 ) << 2; + m_n_bankoffset = ( data & 0x6 ) << 2; } else { - state->m_n_bankoffset = ( state->m_n_bankoffset & ~0x7 ) | ( data & 0x7 ); + m_n_bankoffset = ( m_n_bankoffset & ~0x7 ) | ( data & 0x7 ); } } else { - state->m_n_bankoffset = data; + m_n_bankoffset = data; } - memory_set_bank( space->machine(), "bank1", state->m_n_bankoffset ); + memory_set_bank( machine(), "bank1", m_n_bankoffset ); - verboselog( space->machine(), 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, state->m_n_bankoffset ); + verboselog( machine(), 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset ); } -static WRITE32_HANDLER( dmaoffset_w ) +WRITE32_MEMBER(namcos12_state::dmaoffset_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); if( ACCESSING_BITS_0_15 ) { - state->m_n_dmaoffset = ( offset * 4 ) | ( data << 16 ); + m_n_dmaoffset = ( offset * 4 ) | ( data << 16 ); } if( ACCESSING_BITS_16_31 ) { - state->m_n_dmaoffset = ( ( offset * 4 ) + 2 ) | ( data & 0xffff0000 ); + m_n_dmaoffset = ( ( offset * 4 ) + 2 ) | ( data & 0xffff0000 ); } - verboselog( space->machine(), 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, state->m_n_dmaoffset ); + verboselog( machine(), 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset ); } static void namcos12_rom_read( namcos12_state *state, UINT32 n_address, INT32 n_size ) @@ -1222,21 +1241,20 @@ static void namcos12_sub_irq( namcos12_state *state, screen_device &screen, bool irq1_line_pulse( state->machine().device( "sub" ) ); } -static WRITE32_HANDLER( s12_dma_bias_w ) +WRITE32_MEMBER(namcos12_state::s12_dma_bias_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - state->m_n_dmabias = data; + m_n_dmabias = data; } static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state ) AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */ - AM_RANGE(0x1f000000, 0x1f000003) AM_READNOP AM_WRITE_LEGACY(bankoffset_w) /* banking */ - AM_RANGE(0x1f080000, 0x1f083fff) AM_READWRITE_LEGACY(sharedram_r, sharedram_w) AM_BASE(m_sharedram) /* shared ram?? */ + AM_RANGE(0x1f000000, 0x1f000003) AM_READNOP AM_WRITE(bankoffset_w) /* banking */ + AM_RANGE(0x1f080000, 0x1f083fff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(m_sharedram) /* shared ram?? */ AM_RANGE(0x1f140000, 0x1f140fff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0x00ff00ff) /* eeprom */ AM_RANGE(0x1f1bff08, 0x1f1bff0f) AM_WRITENOP /* ?? */ - AM_RANGE(0x1f700000, 0x1f70ffff) AM_WRITE_LEGACY(dmaoffset_w) /* dma */ - AM_RANGE(0x1f801000, 0x1f801003) AM_WRITE_LEGACY(s12_dma_bias_w) + AM_RANGE(0x1f700000, 0x1f70ffff) AM_WRITE(dmaoffset_w) /* dma */ + AM_RANGE(0x1f801000, 0x1f801003) AM_WRITE(s12_dma_bias_w) AM_RANGE(0x1fa00000, 0x1fbfffff) AM_ROMBANK("bank1") /* banked roms */ AM_RANGE(0x1fc00000, 0x1fffffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */ AM_RANGE(0x80000000, 0x803fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ @@ -1246,7 +1264,7 @@ static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state ) AM_RANGE(0xfffe0130, 0xfffe0133) AM_WRITENOP ADDRESS_MAP_END -static WRITE32_HANDLER( system11gun_w ) +WRITE32_MEMBER(namcos12_state::system11gun_w) { if( ACCESSING_BITS_0_15 ) { @@ -1263,82 +1281,79 @@ static WRITE32_HANDLER( system11gun_w ) output_set_value("P2_Start_lamp", (~data & 0x04)>>2); - verboselog( space->machine(), 1, "system11gun_w: outputs (%08x %08x)\n", data, mem_mask ); + verboselog( machine(), 1, "system11gun_w: outputs (%08x %08x)\n", data, mem_mask ); } if( ACCESSING_BITS_16_31 ) { - verboselog( space->machine(), 2, "system11gun_w: start reading (%08x %08x)\n", data, mem_mask ); + verboselog( machine(), 2, "system11gun_w: start reading (%08x %08x)\n", data, mem_mask ); } } -static READ32_HANDLER( system11gun_r ) +READ32_MEMBER(namcos12_state::system11gun_r) { UINT32 data = 0; switch( offset ) { case 0: - data = input_port_read(space->machine(), "LIGHT0_X"); + data = input_port_read(machine(), "LIGHT0_X"); break; case 1: - data = ( input_port_read(space->machine(), "LIGHT0_Y") ) | ( ( input_port_read(space->machine(), "LIGHT0_Y") + 1 ) << 16 ); + data = ( input_port_read(machine(), "LIGHT0_Y") ) | ( ( input_port_read(machine(), "LIGHT0_Y") + 1 ) << 16 ); break; case 2: - data = input_port_read(space->machine(), "LIGHT1_X"); + data = input_port_read(machine(), "LIGHT1_X"); break; case 3: - data = ( input_port_read(space->machine(), "LIGHT1_Y") ) | ( ( input_port_read(space->machine(), "LIGHT1_Y") + 1 ) << 16 ); + data = ( input_port_read(machine(), "LIGHT1_Y") ) | ( ( input_port_read(machine(), "LIGHT1_Y") + 1 ) << 16 ); break; } - verboselog( space->machine(), 2, "system11gun_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); + verboselog( machine(), 2, "system11gun_r( %08x, %08x ) %08x\n", offset, mem_mask, data ); return data; } static void system11gun_install( running_machine &machine ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x1f788000, 0x1f788003, FUNC(system11gun_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler (0x1f780000, 0x1f78000f, FUNC(system11gun_r) ); + namcos12_state *state = machine.driver_data<namcos12_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos12_state::system11gun_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos12_state::system11gun_r),state)); } -static WRITE32_HANDLER( kcoff_w ) +WRITE32_MEMBER(namcos12_state::kcoff_w) { - memory_set_bankptr( space->machine(), "bank2", space->machine().region( "user1" )->base() + 0x20280 ); + memory_set_bankptr( machine(), "bank2", machine().region( "user1" )->base() + 0x20280 ); } -static WRITE32_HANDLER( kcon_w ) +WRITE32_MEMBER(namcos12_state::kcon_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - memory_set_bankptr( space->machine(), "bank2", state->m_kcram ); + memory_set_bankptr( machine(), "bank2", m_kcram ); } -static WRITE32_HANDLER( tektagt_protection_1_w ) +WRITE32_MEMBER(namcos12_state::tektagt_protection_1_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); // Second dma offset or protection ref values write - state->m_n_tektagdmaoffset = data; - if(state->m_ttt_cnt != 2) - state->m_ttt_val[state->m_ttt_cnt++] = data; + m_n_tektagdmaoffset = data; + if(m_ttt_cnt != 2) + m_ttt_val[m_ttt_cnt++] = data; } -static READ32_HANDLER( tektagt_protection_1_r ) +READ32_MEMBER(namcos12_state::tektagt_protection_1_r) { // Reads are either ignored or bit 15 is tested for a busy flag return 0x8000; } -static WRITE32_HANDLER( tektagt_protection_2_w ) +WRITE32_MEMBER(namcos12_state::tektagt_protection_2_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); // Writes are 0 or rand(), only used as a "start prot value write" trigger - state->m_ttt_cnt = 0; + m_ttt_cnt = 0; } -static READ32_HANDLER( tektagt_protection_2_r ) +READ32_MEMBER(namcos12_state::tektagt_protection_2_r) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - UINT32 *ttt_val = state->m_ttt_val; + UINT32 *ttt_val = m_ttt_val; UINT32 data = 0; if(((ttt_val[0] >> 16) & 0xff) == 0x6d) @@ -1359,7 +1374,7 @@ static READ32_HANDLER( tektagt_protection_2_r ) return data; } -static READ32_HANDLER( tektagt_protection_3_r ) +READ32_MEMBER(namcos12_state::tektagt_protection_3_r) { // Always ignored return 0; @@ -1369,7 +1384,7 @@ static MACHINE_RESET( namcos12 ) { namcos12_state *state = machine.driver_data<namcos12_state>(); address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM); - bankoffset_w(space,0,0,0xffffffff); + state->bankoffset_w(*space,0,0,0xffffffff); state->m_has_tektagt_dma = 0; if( strcmp( machine.system().name, "tektagt" ) == 0 || @@ -1380,9 +1395,9 @@ static MACHINE_RESET( namcos12 ) strcmp( machine.system().name, "tektagtja" ) == 0 ) { state->m_has_tektagt_dma = 1; - space->install_legacy_readwrite_handler(0x1fb00000, 0x1fb00003, FUNC(tektagt_protection_1_r), FUNC(tektagt_protection_1_w) ); - space->install_legacy_readwrite_handler(0x1fb80000, 0x1fb80003, FUNC(tektagt_protection_2_r), FUNC(tektagt_protection_2_w) ); - space->install_legacy_read_handler(0x1f700000, 0x1f700003, FUNC(tektagt_protection_3_r) ); + space->install_readwrite_handler(0x1fb00000, 0x1fb00003, read32_delegate(FUNC(namcos12_state::tektagt_protection_1_r),state), write32_delegate(FUNC(namcos12_state::tektagt_protection_1_w),state)); + space->install_readwrite_handler(0x1fb80000, 0x1fb80003, read32_delegate(FUNC(namcos12_state::tektagt_protection_2_r),state), write32_delegate(FUNC(namcos12_state::tektagt_protection_2_w),state)); + space->install_read_handler(0x1f700000, 0x1f700003, read32_delegate(FUNC(namcos12_state::tektagt_protection_3_r),state)); } if( strcmp( machine.system().name, "tektagt" ) == 0 || @@ -1409,8 +1424,8 @@ static MACHINE_RESET( namcos12 ) { /* this is based on guesswork, it might not even be keycus. */ space->install_read_bank (0x1fc20280, 0x1fc2028b, "bank2" ); - space->install_legacy_write_handler(0x1f008000, 0x1f008003, FUNC(kcon_w) ); - space->install_legacy_write_handler(0x1f018000, 0x1f018003, FUNC(kcoff_w) ); + space->install_write_handler(0x1f008000, 0x1f008003, write32_delegate(FUNC(namcos12_state::kcon_w),state)); + space->install_write_handler(0x1f018000, 0x1f018003, write32_delegate(FUNC(namcos12_state::kcoff_w),state)); memset( state->m_kcram, 0, sizeof( state->m_kcram ) ); memory_set_bankptr( space->machine(), "bank2", state->m_kcram ); @@ -1420,7 +1435,7 @@ static MACHINE_RESET( namcos12 ) /* H8/3002 MCU stuff */ static ADDRESS_MAP_START( s12h8rwmap, AS_PROGRAM, 16, namcos12_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM - AM_RANGE(0x080000, 0x08ffff) AM_READWRITE_LEGACY(sharedram_sub_r, sharedram_sub_w ) + AM_RANGE(0x080000, 0x08ffff) AM_READWRITE(sharedram_sub_r, sharedram_sub_w ) AM_RANGE(0x280000, 0x287fff) AM_DEVREADWRITE("c352", c352_device, read, write) AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0") AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1") @@ -1428,7 +1443,7 @@ static ADDRESS_MAP_START( s12h8rwmap, AS_PROGRAM, 16, namcos12_state ) AM_RANGE(0x300030, 0x300031) AM_NOP // most S12 bioses write here simply to generate a wait state. there is no deeper meaning. ADDRESS_MAP_END -static READ8_HANDLER( s12_mcu_p8_r ) +READ8_MEMBER(namcos12_state::s12_mcu_p8_r) { return 0x02; } @@ -1437,25 +1452,23 @@ static READ8_HANDLER( s12_mcu_p8_r ) // in System 12, bit 0 of H8/3002 port A is connected to it's chip enable // the actual I/O takes place through the H8/3002's serial port B. -static READ8_HANDLER( s12_mcu_pa_r ) +READ8_MEMBER(namcos12_state::s12_mcu_pa_r) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - return state->m_s12_porta; + return m_s12_porta; } -static WRITE8_HANDLER( s12_mcu_pa_w ) +WRITE8_MEMBER(namcos12_state::s12_mcu_pa_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); // bit 0 = chip enable for the RTC // reset the state on the rising edge of the bit - if ((!(state->m_s12_porta & 1)) && (data & 1)) + if ((!(m_s12_porta & 1)) && (data & 1)) { - state->m_s12_rtcstate = 0; + m_s12_rtcstate = 0; } - state->m_s12_porta = data; + m_s12_porta = data; } INLINE UINT8 make_bcd(UINT8 data) @@ -1463,16 +1476,15 @@ INLINE UINT8 make_bcd(UINT8 data) return ((data / 10) << 4) | (data % 10); } -static READ8_HANDLER( s12_mcu_rtc_r ) +READ8_MEMBER(namcos12_state::s12_mcu_rtc_r) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); UINT8 ret = 0; system_time systime; static const int weekday[7] = { 7, 1, 2, 3, 4, 5, 6 }; - space->machine().current_datetime(systime); + machine().current_datetime(systime); - switch (state->m_s12_rtcstate) + switch (m_s12_rtcstate) { case 0: ret = make_bcd(systime.local_time.second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low @@ -1500,44 +1512,41 @@ static READ8_HANDLER( s12_mcu_rtc_r ) break; } - state->m_s12_rtcstate++; + m_s12_rtcstate++; return ret; } -static READ8_HANDLER( s12_mcu_portB_r ) +READ8_MEMBER(namcos12_state::s12_mcu_portB_r) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); // golgo13 won't boot if this doesn't toggle every read - state->m_s12_lastpB ^= 0x80; - return state->m_s12_lastpB; + m_s12_lastpB ^= 0x80; + return m_s12_lastpB; } -static WRITE8_HANDLER( s12_mcu_portB_w ) +WRITE8_MEMBER(namcos12_state::s12_mcu_portB_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); // bit 7 = chip enable for the video settings controller if (data & 0x80) { - state->m_s12_setstate = 0; + m_s12_setstate = 0; } - state->m_s12_lastpB = data; + m_s12_lastpB = data; } -static WRITE8_HANDLER( s12_mcu_settings_w ) +WRITE8_MEMBER(namcos12_state::s12_mcu_settings_w) { - namcos12_state *state = space->machine().driver_data<namcos12_state>(); - int *s12_settings = state->m_s12_settings; + int *s12_settings = m_s12_settings; - if (state->m_s12_setstate) + if (m_s12_setstate) { // data - s12_settings[state->m_s12_setnum] = data; + s12_settings[m_s12_setnum] = data; - if (state->m_s12_setnum == 7) + if (m_s12_setnum == 7) { logerror("S12 video settings: Contrast: %02x R: %02x G: %02x B: %02x\n", BITSWAP8(s12_settings[0], 0, 1, 2, 3, 4, 5, 6, 7), @@ -1548,10 +1557,10 @@ static WRITE8_HANDLER( s12_mcu_settings_w ) } else { // setting number - state->m_s12_setnum = (data >> 4)-1; + m_s12_setnum = (data >> 4)-1; } - state->m_s12_setstate ^= 1; + m_s12_setstate ^= 1; } /* Golgo 13 lightgun inputs @@ -1561,9 +1570,9 @@ static WRITE8_HANDLER( s12_mcu_settings_w ) * within the 16-bit word. */ -static READ8_HANDLER( s12_mcu_gun_h_r ) +READ8_MEMBER(namcos12_state::s12_mcu_gun_h_r) { - const input_port_config *port = space->machine().port("LIGHT0_X"); + const input_port_config *port = machine().port("LIGHT0_X"); if( port != NULL ) { int rv = input_port_read_direct( port ) << 6; @@ -1580,9 +1589,9 @@ static READ8_HANDLER( s12_mcu_gun_h_r ) return 0; } -static READ8_HANDLER( s12_mcu_gun_v_r ) +READ8_MEMBER(namcos12_state::s12_mcu_gun_v_r) { - const input_port_config *port = space->machine().port("LIGHT0_Y"); + const input_port_config *port = machine().port("LIGHT0_Y"); if( port != NULL ) { int rv = input_port_read_direct( port ) << 6; @@ -1601,13 +1610,13 @@ static READ8_HANDLER( s12_mcu_gun_v_r ) static ADDRESS_MAP_START( s12h8iomap, AS_IO, 8, namcos12_state ) AM_RANGE(H8_PORT_7, H8_PORT_7) AM_READ_PORT("DSW") - AM_RANGE(H8_PORT_8, H8_PORT_8) AM_READ_LEGACY(s12_mcu_p8_r ) AM_WRITENOP - AM_RANGE(H8_PORT_A, H8_PORT_A) AM_READWRITE_LEGACY(s12_mcu_pa_r, s12_mcu_pa_w ) - AM_RANGE(H8_PORT_B, H8_PORT_B) AM_READWRITE_LEGACY(s12_mcu_portB_r, s12_mcu_portB_w ) - AM_RANGE(H8_SERIAL_1, H8_SERIAL_1) AM_READ_LEGACY(s12_mcu_rtc_r ) AM_WRITE_LEGACY(s12_mcu_settings_w ) + AM_RANGE(H8_PORT_8, H8_PORT_8) AM_READ(s12_mcu_p8_r ) AM_WRITENOP + AM_RANGE(H8_PORT_A, H8_PORT_A) AM_READWRITE(s12_mcu_pa_r, s12_mcu_pa_w ) + AM_RANGE(H8_PORT_B, H8_PORT_B) AM_READWRITE(s12_mcu_portB_r, s12_mcu_portB_w ) + AM_RANGE(H8_SERIAL_1, H8_SERIAL_1) AM_READ(s12_mcu_rtc_r ) AM_WRITE(s12_mcu_settings_w ) AM_RANGE(H8_ADC_0_H, H8_ADC_0_L) AM_NOP - AM_RANGE(H8_ADC_1_H, H8_ADC_1_L) AM_READ_LEGACY(s12_mcu_gun_h_r ) // golgo 13 gun X-axis - AM_RANGE(H8_ADC_2_H, H8_ADC_2_L) AM_READ_LEGACY(s12_mcu_gun_v_r ) // golgo 13 gun Y-axis + AM_RANGE(H8_ADC_1_H, H8_ADC_1_L) AM_READ(s12_mcu_gun_h_r ) // golgo 13 gun X-axis + AM_RANGE(H8_ADC_2_H, H8_ADC_2_L) AM_READ(s12_mcu_gun_v_r ) // golgo 13 gun Y-axis AM_RANGE(H8_ADC_3_H, H8_ADC_3_L) AM_NOP ADDRESS_MAP_END diff --git a/src/mame/drivers/nexus3d.c b/src/mame/drivers/nexus3d.c index 14a483e8a12..e5ada2aba8d 100644 --- a/src/mame/drivers/nexus3d.c +++ b/src/mame/drivers/nexus3d.c @@ -43,6 +43,9 @@ public: // DECLARE_READ32_MEMBER(nexus3d_unk3_r); // DECLARE_WRITE32_MEMBER(nexus3d_unk2_w); // DECLARE_WRITE32_MEMBER(nexus3d_unk3_w); + DECLARE_READ8_MEMBER(n3d_flash_r); + DECLARE_WRITE8_MEMBER(n3d_flash_cmd_w); + DECLARE_WRITE8_MEMBER(n3d_flash_addr_w); }; @@ -63,19 +66,18 @@ void nexus3d_flash_reset(running_machine& machine) state->m_flash_page_addr = 0; } -READ8_HANDLER( n3d_flash_r ) +READ8_MEMBER(nexus3d_state::n3d_flash_r) { - nexus3d_state *state = space->machine().driver_data<nexus3d_state>(); - if (state->m_last_flash_cmd==0x70) return 0xe0; + if (m_last_flash_cmd==0x70) return 0xe0; - if (state->m_last_flash_cmd==0x00) + if (m_last_flash_cmd==0x00) { - UINT8 retdat = state->flash_page_data[state->m_flash_page_addr]; + UINT8 retdat = flash_page_data[m_flash_page_addr]; - //logerror("n3d_flash_r %02x %04x\n", offset, state->m_flash_page_addr); + //logerror("n3d_flash_r %02x %04x\n", offset, m_flash_page_addr); - state->m_flash_page_addr++; + m_flash_page_addr++; return retdat; } @@ -86,41 +88,39 @@ READ8_HANDLER( n3d_flash_r ) } -WRITE8_HANDLER( n3d_flash_cmd_w ) +WRITE8_MEMBER(nexus3d_state::n3d_flash_cmd_w) { - nexus3d_state *state = space->machine().driver_data<nexus3d_state>(); logerror("n3d_flash_cmd_w %02x %02x\n", offset, data); - state->m_last_flash_cmd = data; + m_last_flash_cmd = data; if (data==0x00) { - memcpy(state->flash_page_data, state->m_flash_region + state->m_flash_addr * FLASH_PAGE_SIZE, FLASH_PAGE_SIZE); + memcpy(flash_page_data, m_flash_region + m_flash_addr * FLASH_PAGE_SIZE, FLASH_PAGE_SIZE); } } -WRITE8_HANDLER( n3d_flash_addr_w ) +WRITE8_MEMBER(nexus3d_state::n3d_flash_addr_w) { - nexus3d_state *state = space->machine().driver_data<nexus3d_state>(); // logerror("n3d_flash_addr_w %02x %02x\n", offset, data); - state->m_flash_addr_seq++; + m_flash_addr_seq++; - if (state->m_flash_addr_seq==3) - state->m_flash_addr = (state->m_flash_addr & 0xffff00) | data; + if (m_flash_addr_seq==3) + m_flash_addr = (m_flash_addr & 0xffff00) | data; - if (state->m_flash_addr_seq==4) - state->m_flash_addr = (state->m_flash_addr & 0xff00ff) | data << 8; + if (m_flash_addr_seq==4) + m_flash_addr = (m_flash_addr & 0xff00ff) | data << 8; - if (state->m_flash_addr_seq==5) - state->m_flash_addr = (state->m_flash_addr & 0x00ffff) | data << 16; + if (m_flash_addr_seq==5) + m_flash_addr = (m_flash_addr & 0x00ffff) | data << 16; - if (state->m_flash_addr_seq==5) + if (m_flash_addr_seq==5) { - state->m_flash_addr_seq = 0; - state->m_flash_page_addr = 0; - logerror("set flash block to %08x\n", state->m_flash_addr); + m_flash_addr_seq = 0; + m_flash_page_addr = 0; + logerror("set flash block to %08x\n", m_flash_addr); } } @@ -156,9 +156,9 @@ static ADDRESS_MAP_START( nexus3d_map, AS_PROGRAM, 32, nexus3d_state ) AM_RANGE(0x00400000, 0x01ffffff) AM_RAM // ?? uploads various data, + pointers to data in the 0x01ffxxxx range, might be video system related // flash - AM_RANGE(0x9C000000, 0x9C000003) AM_WRITE8_LEGACY(n3d_flash_r, 0xffffffff) - AM_RANGE(0x9C000010, 0x9C000013) AM_WRITE8_LEGACY(n3d_flash_cmd_w, 0xffffffff) - AM_RANGE(0x9C000018, 0x9C00001b) AM_WRITE8_LEGACY(n3d_flash_addr_w, 0xffffffff) + AM_RANGE(0x9C000000, 0x9C000003) AM_READ8(n3d_flash_r, 0xffffffff) + AM_RANGE(0x9C000010, 0x9C000013) AM_WRITE8(n3d_flash_cmd_w, 0xffffffff) + AM_RANGE(0x9C000018, 0x9C00001b) AM_WRITE8(n3d_flash_addr_w, 0xffffffff) // lots of accesses in this range // AM_RANGE(0xC0000F44, 0xC0000F47) AM_READWRITE(nexus3d_unk2_r, nexus3d_unk2_w ) // often diff --git a/src/mame/drivers/pcat_nit.c b/src/mame/drivers/pcat_nit.c index 3c121b9511f..c9bbb121606 100644 --- a/src/mame/drivers/pcat_nit.c +++ b/src/mame/drivers/pcat_nit.c @@ -107,6 +107,8 @@ public: DECLARE_WRITE_LINE_MEMBER(microtouch_out); DECLARE_WRITE_LINE_MEMBER(microtouch_in); + DECLARE_WRITE8_MEMBER(pcat_nit_rombank_w); + DECLARE_READ8_MEMBER(pcat_nit_io_r); }; WRITE_LINE_MEMBER(pcat_nit_state::microtouch_out) @@ -145,33 +147,32 @@ static const microtouch_serial_interface pcat_nit_microtouch_interface = * *************************************/ -static WRITE8_HANDLER(pcat_nit_rombank_w) +WRITE8_MEMBER(pcat_nit_state::pcat_nit_rombank_w) { - pcat_nit_state *state = space->machine().driver_data<pcat_nit_state>(); - logerror( "rom bank #%02x at PC=%08X\n", data, cpu_get_pc(&space->device()) ); + logerror( "rom bank #%02x at PC=%08X\n", data, cpu_get_pc(&space.device()) ); if ( data & 0x40 ) { // rom bank - space->install_read_bank(0x000d8000, 0x000dffff, "rombank" ); - space->unmap_write(0x000d8000, 0x000dffff); + space.install_read_bank(0x000d8000, 0x000dffff, "rombank" ); + space.unmap_write(0x000d8000, 0x000dffff); if ( data & 0x80 ) { - memory_set_bank(space->machine(), "rombank", (data & 0x3f) | 0x40 ); + memory_set_bank(machine(), "rombank", (data & 0x3f) | 0x40 ); } else { - memory_set_bank(space->machine(), "rombank", data & 0x3f ); + memory_set_bank(machine(), "rombank", data & 0x3f ); } } else { // nvram bank - space->unmap_readwrite(0x000d8000, 0x000dffff); + space.unmap_readwrite(0x000d8000, 0x000dffff); - space->install_readwrite_bank(0x000d8000, 0x000d9fff, "nvrambank" ); + space.install_readwrite_bank(0x000d8000, 0x000d9fff, "nvrambank" ); - memory_set_bankptr(space->machine(), "nvrambank", state->m_banked_nvram); + memory_set_bankptr(machine(), "nvrambank", m_banked_nvram); } } @@ -181,20 +182,20 @@ static ADDRESS_MAP_START( pcat_map, AS_PROGRAM, 32, pcat_nit_state ) AM_RANGE(0x000a0000, 0x000bffff) AM_RAM AM_RANGE(0x000c0000, 0x000c7fff) AM_ROM AM_REGION("video_bios", 0) AM_WRITENOP AM_RANGE(0x000d0000, 0x000d3fff) AM_RAM AM_REGION("disk_bios", 0) - AM_RANGE(0x000d7000, 0x000d7003) AM_WRITE8_LEGACY(pcat_nit_rombank_w, 0xff) + AM_RANGE(0x000d7000, 0x000d7003) AM_WRITE8(pcat_nit_rombank_w, 0xff) AM_RANGE(0x000d8000, 0x000dffff) AM_ROMBANK("rombank") AM_RANGE(0x000f0000, 0x000fffff) AM_RAM AM_REGION("bios", 0 ) AM_RANGE(0xffff0000, 0xffffffff) AM_ROM AM_REGION("bios", 0 ) ADDRESS_MAP_END -static READ8_HANDLER(pcat_nit_io_r) +READ8_MEMBER(pcat_nit_state::pcat_nit_io_r) { switch(offset) { case 0: /* 278 */ return 0xff; case 1: /* 279 */ - return input_port_read(space->machine(), "IN0"); + return input_port_read(machine(), "IN0"); case 7: /* 27f dips */ return 0xff; default: @@ -204,7 +205,7 @@ static READ8_HANDLER(pcat_nit_io_r) static ADDRESS_MAP_START( pcat_nit_io, AS_IO, 32, pcat_nit_state ) AM_IMPORT_FROM(pcat32_io_common) - AM_RANGE(0x0278, 0x027f) AM_READ8_LEGACY(pcat_nit_io_r, 0xffffffff) AM_WRITENOP + AM_RANGE(0x0278, 0x027f) AM_READ8(pcat_nit_io_r, 0xffffffff) AM_WRITENOP AM_RANGE(0x0280, 0x0283) AM_READNOP AM_RANGE(0x03f8, 0x03ff) AM_DEVREADWRITE8("ns16450_0", ns16450_device, ins8250_r, ins8250_w, 0xffffffff) ADDRESS_MAP_END diff --git a/src/mame/drivers/pcxt.c b/src/mame/drivers/pcxt.c index f13fe9d097f..eddc79b893e 100644 --- a/src/mame/drivers/pcxt.c +++ b/src/mame/drivers/pcxt.c @@ -91,6 +91,17 @@ public: device_t *m_pic8259_2; device_t *m_dma8237_1; device_t *m_dma8237_2; + DECLARE_READ8_MEMBER(disk_iobank_r); + DECLARE_WRITE8_MEMBER(disk_iobank_w); + DECLARE_READ8_MEMBER(fdc765_status_r); + DECLARE_READ8_MEMBER(fdc765_data_r); + DECLARE_WRITE8_MEMBER(fdc765_data_w); + DECLARE_WRITE8_MEMBER(drive_selection_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); + DECLARE_READ8_MEMBER(dma_page_select_r); + DECLARE_WRITE8_MEMBER(dma_page_select_w); + DECLARE_WRITE8_MEMBER(tetriskr_bg_bank_w); }; static SCREEN_UPDATE_RGB32( tetriskr ) @@ -132,19 +143,17 @@ static SCREEN_UPDATE_RGB32( tetriskr ) } -static READ8_HANDLER( disk_iobank_r ) +READ8_MEMBER(pcxt_state::disk_iobank_r) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - //printf("Read Prototyping card [%02x] @ PC=%05x\n",offset,cpu_get_pc(&space->device())); - //if(offset == 0) return input_port_read(space->machine(), "DSW"); - if(offset == 1) return input_port_read(space->machine(), "IN1"); + //printf("Read Prototyping card [%02x] @ PC=%05x\n",offset,cpu_get_pc(&space.device())); + //if(offset == 0) return input_port_read(machine(), "DSW"); + if(offset == 1) return input_port_read(machine(), "IN1"); - return state->m_disk_data[offset]; + return m_disk_data[offset]; } -static WRITE8_HANDLER( disk_iobank_w ) +WRITE8_MEMBER(pcxt_state::disk_iobank_w) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); /* BIOS does a single out $0310,$F0 on reset @@ -175,27 +184,27 @@ static WRITE8_HANDLER( disk_iobank_w ) } else { - if((state->m_lastvalue == 0xF0) && (data == 0xF2)) + if((m_lastvalue == 0xF0) && (data == 0xF2)) newbank = 0; - else if ((state->m_lastvalue == 0xF1) && (data == 0xF2)) + else if ((m_lastvalue == 0xF1) && (data == 0xF2)) newbank = 1; - else if ((state->m_lastvalue == 0xF0) && (data == 0xF3)) + else if ((m_lastvalue == 0xF0) && (data == 0xF3)) newbank = 2; - else if ((state->m_lastvalue == 0xF1) && (data == 0xF3)) + else if ((m_lastvalue == 0xF1) && (data == 0xF3)) newbank = 3; } // printf("newbank = %d\n", newbank); - if (newbank != state->m_bank) + if (newbank != m_bank) { - state->m_bank = newbank; - memory_set_bankptr(space->machine(), "bank1",space->machine().region("game_prg")->base() + 0x10000 * state->m_bank ); + m_bank = newbank; + memory_set_bankptr(machine(), "bank1",machine().region("game_prg")->base() + 0x10000 * m_bank ); } - state->m_lastvalue = data; + m_lastvalue = data; - state->m_disk_data[offset] = data; + m_disk_data[offset] = data; } /********************************* @@ -359,41 +368,37 @@ static const ppi8255_interface filetto_ppi8255_intf[2] = #define FDC_WRITE 0x40 #define FDC_READ 0x00 /*~0x40*/ -static READ8_HANDLER( fdc765_status_r ) +READ8_MEMBER(pcxt_state::fdc765_status_r) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); UINT8 tmp; -// popmessage("Read FDC status @ PC=%05x",cpu_get_pc(&space->device())); - tmp = state->m_status | 0x80; - state->m_clr_status++; - if(state->m_clr_status == 0x10) +// popmessage("Read FDC status @ PC=%05x",cpu_get_pc(&space.device())); + tmp = m_status | 0x80; + m_clr_status++; + if(m_clr_status == 0x10) { - state->m_status = 0; - state->m_clr_status = 0; + m_status = 0; + m_clr_status = 0; } return tmp; } -static READ8_HANDLER( fdc765_data_r ) +READ8_MEMBER(pcxt_state::fdc765_data_r) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - state->m_status = (FDC_READ); + m_status = (FDC_READ); return 0xc0; } -static WRITE8_HANDLER( fdc765_data_w ) +WRITE8_MEMBER(pcxt_state::fdc765_data_w) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - state->m_status = (FDC_WRITE); + m_status = (FDC_WRITE); } -static WRITE8_HANDLER( drive_selection_w ) +WRITE8_MEMBER(pcxt_state::drive_selection_w) { -// pcxt_state *state = space->machine().driver_data<pcxt_state>(); /* TODO: properly hook-up upd765 FDC there */ - pic8259_ir6_w(space->machine().device("pic8259_1"), 1); + pic8259_ir6_w(machine().device("pic8259_1"), 1); } /****************** @@ -410,65 +415,61 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(pcxt_state::pc_dma_read_byte) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(pcxt_state::pc_dma_write_byte) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } -static READ8_HANDLER(dma_page_select_r) +READ8_MEMBER(pcxt_state::dma_page_select_r) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(dma_page_select_w) +WRITE8_MEMBER(pcxt_state::dma_page_select_w) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } @@ -488,8 +489,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(pcxt_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(pcxt_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -549,15 +550,15 @@ static ADDRESS_MAP_START( pcxt_io_common, AS_IO, 8, pcxt_state ) AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE_LEGACY("ppi8255_0", ppi8255_r, ppi8255_w) //PPI 8255 AM_RANGE(0x0064, 0x0066) AM_DEVREADWRITE_LEGACY("ppi8255_1", ppi8255_r, ppi8255_w) //PPI 8255 AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE("rtc", mc146818_device, read, write) - AM_RANGE(0x0080, 0x0087) AM_READWRITE_LEGACY(dma_page_select_r,dma_page_select_w) + AM_RANGE(0x0080, 0x0087) AM_READWRITE(dma_page_select_r,dma_page_select_w) AM_RANGE(0x00a0, 0x00af) AM_DEVREADWRITE_LEGACY("pic8259_2", pic8259_r, pic8259_w ) AM_RANGE(0x0278, 0x027f) AM_RAM //printer (parallel) port latch AM_RANGE(0x02f8, 0x02ff) AM_RAM //Modem port AM_RANGE(0x0378, 0x037f) AM_RAM //printer (parallel) port AM_RANGE(0x03bc, 0x03bf) AM_RAM //printer port - AM_RANGE(0x03f2, 0x03f2) AM_WRITE_LEGACY(drive_selection_w) - AM_RANGE(0x03f4, 0x03f4) AM_READ_LEGACY(fdc765_status_r) //765 Floppy Disk Controller (FDC) Status - AM_RANGE(0x03f5, 0x03f5) AM_READWRITE_LEGACY(fdc765_data_r,fdc765_data_w)//FDC Data + AM_RANGE(0x03f2, 0x03f2) AM_WRITE(drive_selection_w) + AM_RANGE(0x03f4, 0x03f4) AM_READ(fdc765_status_r) //765 Floppy Disk Controller (FDC) Status + AM_RANGE(0x03f5, 0x03f5) AM_READWRITE(fdc765_data_r,fdc765_data_w)//FDC Data AM_RANGE(0x03f8, 0x03ff) AM_RAM //rs232c (serial) port ADDRESS_MAP_END @@ -566,22 +567,21 @@ static ADDRESS_MAP_START( filetto_io, AS_IO, 8, pcxt_state ) AM_IMPORT_FROM( pcxt_io_common ) // AM_RANGE(0x0200, 0x020f) AM_RAM //game port AM_RANGE(0x0201, 0x0201) AM_READ_PORT("COIN") //game port - AM_RANGE(0x0310, 0x0311) AM_READWRITE_LEGACY(disk_iobank_r,disk_iobank_w) //Prototyping card + AM_RANGE(0x0310, 0x0311) AM_READWRITE(disk_iobank_r,disk_iobank_w) //Prototyping card AM_RANGE(0x0312, 0x0312) AM_READ_PORT("IN0") //Prototyping card,read only ADDRESS_MAP_END -static WRITE8_HANDLER( tetriskr_bg_bank_w ) +WRITE8_MEMBER(pcxt_state::tetriskr_bg_bank_w) { - pcxt_state *state = space->machine().driver_data<pcxt_state>(); - state->m_bg_bank = (data & 0x0f) ^ 8; + m_bg_bank = (data & 0x0f) ^ 8; } static ADDRESS_MAP_START( tetriskr_io, AS_IO, 8, pcxt_state ) ADDRESS_MAP_GLOBAL_MASK(0x3ff) AM_IMPORT_FROM( pcxt_io_common ) AM_RANGE(0x0200, 0x020f) AM_RAM //game port - AM_RANGE(0x03c0, 0x03c0) AM_WRITE_LEGACY(tetriskr_bg_bank_w) + AM_RANGE(0x03c0, 0x03c0) AM_WRITE(tetriskr_bg_bank_w) AM_RANGE(0x03c8, 0x03c8) AM_READ_PORT("IN0") AM_RANGE(0x03c9, 0x03c9) AM_READ_PORT("IN1") // AM_RANGE(0x03ce, 0x03ce) AM_READ_PORT("IN1") //read then discarded? diff --git a/src/mame/drivers/photoply.c b/src/mame/drivers/photoply.c index c133939c185..5e9b9c6554b 100644 --- a/src/mame/drivers/photoply.c +++ b/src/mame/drivers/photoply.c @@ -40,6 +40,10 @@ public: device_t *m_pic8259_2; device_t *m_dma8237_1; device_t *m_dma8237_2; + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); + DECLARE_READ8_MEMBER(dma_page_select_r); + DECLARE_WRITE8_MEMBER(dma_page_select_w); }; @@ -58,67 +62,63 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(photoply_state::pc_dma_read_byte) { - photoply_state *state = space->machine().driver_data<photoply_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(photoply_state::pc_dma_write_byte) { - photoply_state *state = space->machine().driver_data<photoply_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } -static READ8_HANDLER(dma_page_select_r) +READ8_MEMBER(photoply_state::dma_page_select_r) { - photoply_state *state = space->machine().driver_data<photoply_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(dma_page_select_w) +WRITE8_MEMBER(photoply_state::dma_page_select_w) { - photoply_state *state = space->machine().driver_data<photoply_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } @@ -138,8 +138,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(photoply_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(photoply_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -248,7 +248,7 @@ static ADDRESS_MAP_START( photoply_io, AS_IO, 32, photoply_state ) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_RAM//DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE8_LEGACY(dma_page_select_r,dma_page_select_w, 0xffffffff)//TODO + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(dma_page_select_r,dma_page_select_w, 0xffffffff)//TODO AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", i8237_r, i8237_w, 0xffff) AM_RANGE(0x00e8, 0x00eb) AM_NOP diff --git a/src/mame/drivers/pntnpuzl.c b/src/mame/drivers/pntnpuzl.c index 8704061d57a..9f212d8ba7d 100644 --- a/src/mame/drivers/pntnpuzl.c +++ b/src/mame/drivers/pntnpuzl.c @@ -142,6 +142,13 @@ public: int m_touchscr[5]; required_device<cpu_device> m_maincpu; + DECLARE_WRITE16_MEMBER(pntnpuzl_200000_w); + DECLARE_WRITE16_MEMBER(pntnpuzl_280018_w); + DECLARE_READ16_MEMBER(pntnpuzl_280014_r); + DECLARE_READ16_MEMBER(pntnpuzl_28001a_r); + DECLARE_READ16_MEMBER(irq1_ack_r); + DECLARE_READ16_MEMBER(irq2_ack_r); + DECLARE_READ16_MEMBER(irq4_ack_r); }; @@ -204,94 +211,88 @@ write read 01 03 46 31 38 0d ---> 80 0c */ -static WRITE16_HANDLER( pntnpuzl_200000_w ) +WRITE16_MEMBER(pntnpuzl_state::pntnpuzl_200000_w) { - pntnpuzl_state *state = space->machine().driver_data<pntnpuzl_state>(); // logerror("200000: %04x\n",data); // bit 12: set to 1 when going to serial output to 280018 - if ((state->m_pntpzl_200000 & 0x1000) && !(data & 0x1000)) + if ((m_pntpzl_200000 & 0x1000) && !(data & 0x1000)) { - state->m_serial_out = (state->m_serial>>1) & 0xff; - state->m_read_count = 0; - logerror("serial out: %02x\n",state->m_serial_out); + m_serial_out = (m_serial>>1) & 0xff; + m_read_count = 0; + logerror("serial out: %02x\n",m_serial_out); } - state->m_pntpzl_200000 = data; + m_pntpzl_200000 = data; } -static WRITE16_HANDLER( pntnpuzl_280018_w ) +WRITE16_MEMBER(pntnpuzl_state::pntnpuzl_280018_w) { - pntnpuzl_state *state = space->machine().driver_data<pntnpuzl_state>(); -// logerror("%04x: 280018: %04x\n",cpu_get_pc(&space->device()),data); - state->m_serial >>= 1; +// logerror("%04x: 280018: %04x\n",cpu_get_pc(&space.device()),data); + m_serial >>= 1; if (data & 0x2000) - state->m_serial |= 0x400; + m_serial |= 0x400; } -static READ16_HANDLER( pntnpuzl_280014_r ) +READ16_MEMBER(pntnpuzl_state::pntnpuzl_280014_r) { - pntnpuzl_state *state = space->machine().driver_data<pntnpuzl_state>(); static const int startup[3] = { 0x80, 0x0c, 0x00 }; int res; - if (state->m_serial_out == 0x11) + if (m_serial_out == 0x11) { - if (input_port_read(space->machine(), "IN0") & 0x10) + if (input_port_read(machine(), "IN0") & 0x10) { - state->m_touchscr[0] = 0x1b; - state->m_touchscr[2] = BITSWAP8(input_port_read(space->machine(), "TOUCHX"),0,1,2,3,4,5,6,7); - state->m_touchscr[4] = BITSWAP8(input_port_read(space->machine(), "TOUCHY"),0,1,2,3,4,5,6,7); + m_touchscr[0] = 0x1b; + m_touchscr[2] = BITSWAP8(input_port_read(machine(), "TOUCHX"),0,1,2,3,4,5,6,7); + m_touchscr[4] = BITSWAP8(input_port_read(machine(), "TOUCHY"),0,1,2,3,4,5,6,7); } else - state->m_touchscr[0] = 0; + m_touchscr[0] = 0; - if (state->m_read_count >= 10) state->m_read_count = 0; - res = state->m_touchscr[state->m_read_count/2]; - state->m_read_count++; + if (m_read_count >= 10) m_read_count = 0; + res = m_touchscr[m_read_count/2]; + m_read_count++; } else { - if (state->m_read_count >= 6) state->m_read_count = 0; - res = startup[state->m_read_count/2]; - state->m_read_count++; + if (m_read_count >= 6) m_read_count = 0; + res = startup[m_read_count/2]; + m_read_count++; } logerror("read 280014: %02x\n",res); return res << 8; } -static READ16_HANDLER( pntnpuzl_28001a_r ) +READ16_MEMBER(pntnpuzl_state::pntnpuzl_28001a_r) { return 0x4c00; } -static READ16_HANDLER( irq1_ack_r ) +READ16_MEMBER(pntnpuzl_state::irq1_ack_r) { -// pntnpuzl_state *state = space->machine().driver_data<pntnpuzl_state>(); -// device_set_input_line(state->m_maincpu, 1, CLEAR_LINE); +// device_set_input_line(m_maincpu, 1, CLEAR_LINE); return 0; } -static READ16_HANDLER( irq2_ack_r ) +READ16_MEMBER(pntnpuzl_state::irq2_ack_r) { -// pntnpuzl_state *state = space->machine().driver_data<pntnpuzl_state>(); -// device_set_input_line(state->m_maincpu, 2, CLEAR_LINE); +// device_set_input_line(m_maincpu, 2, CLEAR_LINE); return 0; } -static READ16_HANDLER( irq4_ack_r ) +READ16_MEMBER(pntnpuzl_state::irq4_ack_r) { -// pntnpuzl_state *state = space->machine().driver_data<pntnpuzl_state>(); -// device_set_input_line(state->m_maincpu, 4, CLEAR_LINE); +// device_set_input_line(m_maincpu, 4, CLEAR_LINE); return 0; } static ADDRESS_MAP_START( pntnpuzl_map, AS_PROGRAM, 16, pntnpuzl_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM - AM_RANGE(0x080000, 0x080001) AM_READ_LEGACY(irq1_ack_r) - AM_RANGE(0x100000, 0x100001) AM_READ_LEGACY(irq2_ack_r) - AM_RANGE(0x180000, 0x180001) AM_READ_LEGACY(irq4_ack_r) - AM_RANGE(0x200000, 0x200001) AM_WRITE_LEGACY(pntnpuzl_200000_w) + AM_RANGE(0x080000, 0x080001) AM_READ(irq1_ack_r) + AM_RANGE(0x100000, 0x100001) AM_READ(irq2_ack_r) + AM_RANGE(0x180000, 0x180001) AM_READ(irq4_ack_r) + AM_RANGE(0x200000, 0x200001) AM_WRITE(pntnpuzl_200000_w) AM_RANGE(0x280000, 0x280001) AM_DEVREAD_LEGACY("eeprom", pntnpuzl_eeprom_r) AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN2") AM_RANGE(0x280000, 0x280001) AM_DEVWRITE_LEGACY("eeprom", pntnpuzl_eeprom_w) @@ -299,10 +300,10 @@ static ADDRESS_MAP_START( pntnpuzl_map, AS_PROGRAM, 16, pntnpuzl_state ) AM_RANGE(0x28000a, 0x28000b) AM_WRITENOP AM_RANGE(0x280010, 0x280011) AM_WRITENOP AM_RANGE(0x280012, 0x280013) AM_WRITENOP - AM_RANGE(0x280014, 0x280015) AM_READ_LEGACY(pntnpuzl_280014_r) + AM_RANGE(0x280014, 0x280015) AM_READ(pntnpuzl_280014_r) AM_RANGE(0x280016, 0x280017) AM_WRITENOP - AM_RANGE(0x280018, 0x280019) AM_WRITE_LEGACY(pntnpuzl_280018_w) - AM_RANGE(0x28001a, 0x28001b) AM_READ_LEGACY(pntnpuzl_28001a_r) + AM_RANGE(0x280018, 0x280019) AM_WRITE(pntnpuzl_280018_w) + AM_RANGE(0x28001a, 0x28001b) AM_READ(pntnpuzl_28001a_r) AM_RANGE(0x28001a, 0x28001b) AM_WRITENOP /* standard VGA */ diff --git a/src/mame/drivers/queen.c b/src/mame/drivers/queen.c index 538e0664975..970bdbd8664 100644 --- a/src/mame/drivers/queen.c +++ b/src/mame/drivers/queen.c @@ -93,6 +93,11 @@ public: DECLARE_WRITE32_MEMBER( bios_ext4_ram_w ); DECLARE_WRITE32_MEMBER( bios_ram_w ); + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); + DECLARE_READ8_MEMBER(vga_setting); }; @@ -381,60 +386,48 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask); } -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(queen_state::at_page8_r) { - queen_state *state = space->machine().driver_data<queen_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(queen_state::at_page8_w) { - queen_state *state = space->machine().driver_data<queen_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} static READ8_DEVICE_HANDLER(at_dma8237_2_r) { @@ -468,23 +461,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(queen_state::pc_dma_read_byte) { - queen_state *state = space->machine().driver_data<queen_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(queen_state::pc_dma_write_byte) { - queen_state *state = space->machine().driver_data<queen_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -502,8 +493,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(queen_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(queen_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -540,7 +531,7 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state ) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00ef) AM_NOP diff --git a/src/mame/drivers/savquest.c b/src/mame/drivers/savquest.c index 13132aa5081..f81e6115408 100644 --- a/src/mame/drivers/savquest.c +++ b/src/mame/drivers/savquest.c @@ -77,6 +77,11 @@ protected: // driver_device overrides // virtual void video_start(); +public: + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); }; // Intel 82439TX System Controller (MXTC) @@ -258,60 +263,48 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask); } -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(savquest_state::at_page8_r) { - savquest_state *state = space->machine().driver_data<savquest_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(savquest_state::at_page8_w) { - savquest_state *state = space->machine().driver_data<savquest_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} static READ8_DEVICE_HANDLER(at_dma8237_2_r) { @@ -345,23 +338,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(savquest_state::pc_dma_read_byte) { - savquest_state *state = space->machine().driver_data<savquest_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(savquest_state::pc_dma_write_byte) { - savquest_state *state = space->machine().driver_data<savquest_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -379,8 +370,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(savquest_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(savquest_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -415,7 +406,7 @@ static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00ef) AM_NOP diff --git a/src/mame/drivers/seattle.c b/src/mame/drivers/seattle.c index f3bd24e0091..1639a56645a 100644 --- a/src/mame/drivers/seattle.c +++ b/src/mame/drivers/seattle.c @@ -451,6 +451,27 @@ public: UINT8 m_pending_analog_read; UINT8 m_status_leds; UINT32 m_cmos_write_enabled; + DECLARE_READ32_MEMBER(interrupt_state_r); + DECLARE_READ32_MEMBER(interrupt_state2_r); + DECLARE_WRITE32_MEMBER(interrupt_config_w); + DECLARE_WRITE32_MEMBER(seattle_interrupt_enable_w); + DECLARE_WRITE32_MEMBER(vblank_clear_w); + DECLARE_READ32_MEMBER(galileo_r); + DECLARE_WRITE32_MEMBER(galileo_w); + DECLARE_WRITE32_MEMBER(seattle_voodoo_w); + DECLARE_READ32_MEMBER(analog_port_r); + DECLARE_WRITE32_MEMBER(analog_port_w); + DECLARE_READ32_MEMBER(carnevil_gun_r); + DECLARE_WRITE32_MEMBER(carnevil_gun_w); + DECLARE_WRITE32_MEMBER(cmos_w); + DECLARE_READ32_MEMBER(cmos_r); + DECLARE_WRITE32_MEMBER(cmos_protect_w); + DECLARE_READ32_MEMBER(cmos_protect_r); + DECLARE_WRITE32_MEMBER(seattle_watchdog_w); + DECLARE_WRITE32_MEMBER(asic_reset_w); + DECLARE_WRITE32_MEMBER(asic_fifo_w); + DECLARE_READ32_MEMBER(status_leds_r); + DECLARE_WRITE32_MEMBER(status_leds_w); }; @@ -631,80 +652,76 @@ static void ioasic_irq(running_machine &machine, int state) * *************************************/ -static READ32_HANDLER( interrupt_state_r ) +READ32_MEMBER(seattle_state::interrupt_state_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); UINT32 result = 0; - result |= state->m_ethernet_irq_state << ETHERNET_IRQ_SHIFT; - result |= state->m_vblank_latch << VBLANK_IRQ_SHIFT; + result |= m_ethernet_irq_state << ETHERNET_IRQ_SHIFT; + result |= m_vblank_latch << VBLANK_IRQ_SHIFT; return result; } -static READ32_HANDLER( interrupt_state2_r ) +READ32_MEMBER(seattle_state::interrupt_state2_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); UINT32 result = interrupt_state_r(space, offset, mem_mask); - result |= state->m_vblank_state << 8; + result |= m_vblank_state << 8; return result; } -static WRITE32_HANDLER( interrupt_config_w ) +WRITE32_MEMBER(seattle_state::interrupt_config_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); int irq; - COMBINE_DATA(state->m_interrupt_config); + COMBINE_DATA(m_interrupt_config); /* VBLANK: clear anything pending on the old IRQ */ - if (state->m_vblank_irq_num != 0) - cputag_set_input_line(space->machine(), "maincpu", state->m_vblank_irq_num, CLEAR_LINE); + if (m_vblank_irq_num != 0) + cputag_set_input_line(machine(), "maincpu", m_vblank_irq_num, CLEAR_LINE); /* VBLANK: compute the new IRQ vector */ - irq = (*state->m_interrupt_config >> (2*VBLANK_IRQ_SHIFT)) & 3; - state->m_vblank_irq_num = (irq != 0) ? (2 + irq) : 0; + irq = (*m_interrupt_config >> (2*VBLANK_IRQ_SHIFT)) & 3; + m_vblank_irq_num = (irq != 0) ? (2 + irq) : 0; /* Widget board case */ - if (state->m_board_config == SEATTLE_WIDGET_CONFIG) + if (m_board_config == SEATTLE_WIDGET_CONFIG) { /* Widget: clear anything pending on the old IRQ */ - if (state->m_widget.irq_num != 0) - cputag_set_input_line(space->machine(), "maincpu", state->m_widget.irq_num, CLEAR_LINE); + if (m_widget.irq_num != 0) + cputag_set_input_line(machine(), "maincpu", m_widget.irq_num, CLEAR_LINE); /* Widget: compute the new IRQ vector */ - irq = (*state->m_interrupt_config >> (2*WIDGET_IRQ_SHIFT)) & 3; - state->m_widget.irq_num = (irq != 0) ? (2 + irq) : 0; + irq = (*m_interrupt_config >> (2*WIDGET_IRQ_SHIFT)) & 3; + m_widget.irq_num = (irq != 0) ? (2 + irq) : 0; } /* Flagstaff board case */ - if (state->m_board_config == FLAGSTAFF_CONFIG) + if (m_board_config == FLAGSTAFF_CONFIG) { /* Ethernet: clear anything pending on the old IRQ */ - if (state->m_ethernet_irq_num != 0) - cputag_set_input_line(space->machine(), "maincpu", state->m_ethernet_irq_num, CLEAR_LINE); + if (m_ethernet_irq_num != 0) + cputag_set_input_line(machine(), "maincpu", m_ethernet_irq_num, CLEAR_LINE); /* Ethernet: compute the new IRQ vector */ - irq = (*state->m_interrupt_config >> (2*ETHERNET_IRQ_SHIFT)) & 3; - state->m_ethernet_irq_num = (irq != 0) ? (2 + irq) : 0; + irq = (*m_interrupt_config >> (2*ETHERNET_IRQ_SHIFT)) & 3; + m_ethernet_irq_num = (irq != 0) ? (2 + irq) : 0; } /* update the states */ - update_vblank_irq(space->machine()); - ethernet_interrupt_machine(space->machine(), state->m_ethernet_irq_state); + update_vblank_irq(machine()); + ethernet_interrupt_machine(machine(), m_ethernet_irq_state); } -static WRITE32_HANDLER( seattle_interrupt_enable_w ) +WRITE32_MEMBER(seattle_state::seattle_interrupt_enable_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - UINT32 old = *state->m_interrupt_enable; - COMBINE_DATA(state->m_interrupt_enable); - if (old != *state->m_interrupt_enable) + UINT32 old = *m_interrupt_enable; + COMBINE_DATA(m_interrupt_enable); + if (old != *m_interrupt_enable) { - if (state->m_vblank_latch) - update_vblank_irq(space->machine()); - if (state->m_ethernet_irq_state) - ethernet_interrupt_machine(space->machine(), state->m_ethernet_irq_state); + if (m_vblank_latch) + update_vblank_irq(machine()); + if (m_ethernet_irq_state) + ethernet_interrupt_machine(machine(), m_ethernet_irq_state); } } @@ -732,12 +749,11 @@ static void update_vblank_irq(running_machine &machine) } -static WRITE32_HANDLER( vblank_clear_w ) +WRITE32_MEMBER(seattle_state::vblank_clear_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); /* clear the latch and update the IRQ */ - state->m_vblank_latch = 0; - update_vblank_irq(space->machine()); + m_vblank_latch = 0; + update_vblank_irq(machine()); } @@ -1088,10 +1104,9 @@ static void galileo_reset(running_machine &machine) } -static READ32_HANDLER( galileo_r ) +READ32_MEMBER(seattle_state::galileo_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - galileo_data &galileo = state->m_galileo; + galileo_data &galileo = m_galileo; UINT32 result = galileo.reg[offset]; /* switch off the offset for special cases */ @@ -1113,10 +1128,10 @@ static READ32_HANDLER( galileo_r ) } /* eat some time for those which poll this register */ - device_eat_cycles(&space->device(), 100); + device_eat_cycles(&space.device(), 100); if (LOG_TIMERS) - logerror("%08X:hires_timer_r = %08X\n", cpu_get_pc(&space->device()), result); + logerror("%08X:hires_timer_r = %08X\n", cpu_get_pc(&space.device()), result); break; } @@ -1135,21 +1150,21 @@ static READ32_HANDLER( galileo_r ) /* unit 0 is the PCI bridge */ if (unit == 0 && func == 0) - result = pci_bridge_r(space, reg, type); + result = pci_bridge_r(&space, reg, type); /* unit 8 is the 3dfx card */ else if (unit == 8 && func == 0) - result = pci_3dfx_r(space, reg, type); + result = pci_3dfx_r(&space, reg, type); /* unit 9 is the IDE controller */ else if (unit == 9 && func == 0) - result = pci_ide_r(space, reg, type); + result = pci_ide_r(&space, reg, type); /* anything else, just log */ else { result = ~0; - logerror("%08X:PCIBus read: bus %d unit %d func %d reg %d type %d = %08X\n", cpu_get_pc(&space->device()), bus, unit, func, reg, type, result); + logerror("%08X:PCIBus read: bus %d unit %d func %d reg %d type %d = %08X\n", cpu_get_pc(&space.device()), bus, unit, func, reg, type, result); } break; } @@ -1159,11 +1174,11 @@ static READ32_HANDLER( galileo_r ) case GREG_INT_MASK: case GREG_TIMER_CONTROL: // if (LOG_GALILEO) -// logerror("%08X:Galileo read from offset %03X = %08X\n", cpu_get_pc(&space->device()), offset*4, result); +// logerror("%08X:Galileo read from offset %03X = %08X\n", cpu_get_pc(&space.device()), offset*4, result); break; default: - logerror("%08X:Galileo read from offset %03X = %08X\n", cpu_get_pc(&space->device()), offset*4, result); + logerror("%08X:Galileo read from offset %03X = %08X\n", cpu_get_pc(&space.device()), offset*4, result); break; } @@ -1171,10 +1186,9 @@ static READ32_HANDLER( galileo_r ) } -static WRITE32_HANDLER( galileo_w ) +WRITE32_MEMBER(seattle_state::galileo_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - galileo_data &galileo = state->m_galileo; + galileo_data &galileo = m_galileo; UINT32 oldata = galileo.reg[offset]; COMBINE_DATA(&galileo.reg[offset]); @@ -1189,7 +1203,7 @@ static WRITE32_HANDLER( galileo_w ) int which = offset % 4; if (LOG_DMA) - logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask); + logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space.device()), offset*4, data, mem_mask); /* keep the read only activity bit */ galileo.reg[offset] &= ~0x4000; @@ -1197,12 +1211,12 @@ static WRITE32_HANDLER( galileo_w ) /* fetch next record */ if (data & 0x2000) - galileo_dma_fetch_next(space, which); + galileo_dma_fetch_next(&space, which); galileo.reg[offset] &= ~0x2000; /* if enabling, start the DMA */ if (!(oldata & 0x1000) && (data & 0x1000)) - galileo_perform_dma(space, which); + galileo_perform_dma(&space, which); break; } @@ -1219,7 +1233,7 @@ static WRITE32_HANDLER( galileo_w ) if (!timer->active) timer->count = data; if (LOG_TIMERS) - logerror("%08X:timer/counter %d count = %08X [start=%08X]\n", cpu_get_pc(&space->device()), offset % 4, data, timer->count); + logerror("%08X:timer/counter %d count = %08X [start=%08X]\n", cpu_get_pc(&space.device()), offset % 4, data, timer->count); break; } @@ -1228,7 +1242,7 @@ static WRITE32_HANDLER( galileo_w ) int which, mask; if (LOG_TIMERS) - logerror("%08X:timer/counter control = %08X\n", cpu_get_pc(&space->device()), data); + logerror("%08X:timer/counter control = %08X\n", cpu_get_pc(&space.device()), data); for (which = 0, mask = 0x01; which < 4; which++, mask <<= 2) { galileo_timer *timer = &galileo.timer[which]; @@ -1262,7 +1276,7 @@ static WRITE32_HANDLER( galileo_w ) if (LOG_GALILEO) logerror("%08X:Galileo write to IRQ clear = %08X & %08X\n", offset*4, data, mem_mask); galileo.reg[offset] = oldata & data; - update_galileo_irqs(space->machine()); + update_galileo_irqs(machine()); break; case GREG_CONFIG_DATA: @@ -1275,19 +1289,19 @@ static WRITE32_HANDLER( galileo_w ) /* unit 0 is the PCI bridge */ if (unit == 0 && func == 0) - pci_bridge_w(space, reg, type, data); + pci_bridge_w(&space, reg, type, data); /* unit 8 is the 3dfx card */ else if (unit == 8 && func == 0) - pci_3dfx_w(space, reg, type, data); + pci_3dfx_w(&space, reg, type, data); /* unit 9 is the IDE controller */ else if (unit == 9 && func == 0) - pci_ide_w(space, reg, type, data); + pci_ide_w(&space, reg, type, data); /* anything else, just log */ else - logerror("%08X:PCIBus write: bus %d unit %d func %d reg %d type %d = %08X\n", cpu_get_pc(&space->device()), bus, unit, func, reg, type, data); + logerror("%08X:PCIBus write: bus %d unit %d func %d reg %d type %d = %08X\n", cpu_get_pc(&space.device()), bus, unit, func, reg, type, data); break; } @@ -1298,11 +1312,11 @@ static WRITE32_HANDLER( galileo_w ) case GREG_CONFIG_ADDRESS: case GREG_INT_MASK: if (LOG_GALILEO) - logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask); + logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space.device()), offset*4, data, mem_mask); break; default: - logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask); + logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space.device()), offset*4, data, mem_mask); break; } } @@ -1315,29 +1329,28 @@ static WRITE32_HANDLER( galileo_w ) * *************************************/ -static WRITE32_HANDLER( seattle_voodoo_w ) +WRITE32_MEMBER(seattle_state::seattle_voodoo_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); /* if we're not stalled, just write and get out */ - if (!state->m_voodoo_stalled) + if (!m_voodoo_stalled) { - voodoo_w(state->m_voodoo, offset, data, mem_mask); + voodoo_w(m_voodoo, offset, data, mem_mask); return; } /* shouldn't get here if the CPU is already stalled */ - if (state->m_cpu_stalled_on_voodoo) + if (m_cpu_stalled_on_voodoo) fatalerror("seattle_voodoo_w while CPU is stalled"); /* remember all the info about this access for later */ - state->m_cpu_stalled_on_voodoo = TRUE; - state->m_cpu_stalled_offset = offset; - state->m_cpu_stalled_data = data; - state->m_cpu_stalled_mem_mask = mem_mask; + m_cpu_stalled_on_voodoo = TRUE; + m_cpu_stalled_offset = offset; + m_cpu_stalled_data = data; + m_cpu_stalled_mem_mask = mem_mask; /* spin until we send the magic trigger */ - device_spin_until_trigger(&space->device(), 45678); - if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo (already stalled)\n", cpu_get_pc(&space->device())); + device_spin_until_trigger(&space.device(), 45678); + if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo (already stalled)\n", cpu_get_pc(&space.device())); } @@ -1405,21 +1418,19 @@ static void voodoo_stall(device_t *device, int stall) * *************************************/ -static READ32_HANDLER( analog_port_r ) +READ32_MEMBER(seattle_state::analog_port_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - return state->m_pending_analog_read; + return m_pending_analog_read; } -static WRITE32_HANDLER( analog_port_w ) +WRITE32_MEMBER(seattle_state::analog_port_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); static const char *const portnames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" }; if (data < 8 || data > 15) - logerror("%08X:Unexpected analog port select = %08X\n", cpu_get_pc(&space->device()), data); - state->m_pending_analog_read = input_port_read(space->machine(), portnames[data & 7]); + logerror("%08X:Unexpected analog port select = %08X\n", cpu_get_pc(&space.device()), data); + m_pending_analog_read = input_port_read(machine(), portnames[data & 7]); } @@ -1430,53 +1441,53 @@ static WRITE32_HANDLER( analog_port_w ) * *************************************/ -static READ32_HANDLER( carnevil_gun_r ) +READ32_MEMBER(seattle_state::carnevil_gun_r) { UINT32 result = 0; switch (offset) { case 0: /* low 8 bits of X */ - result = (input_port_read(space->machine(), "LIGHT0_X") << 4) & 0xff; + result = (input_port_read(machine(), "LIGHT0_X") << 4) & 0xff; break; case 1: /* upper 4 bits of X */ - result = (input_port_read(space->machine(), "LIGHT0_X") >> 4) & 0x0f; - result |= (input_port_read(space->machine(), "FAKE") & 0x03) << 4; + result = (input_port_read(machine(), "LIGHT0_X") >> 4) & 0x0f; + result |= (input_port_read(machine(), "FAKE") & 0x03) << 4; result |= 0x40; break; case 2: /* low 8 bits of Y */ - result = (input_port_read(space->machine(), "LIGHT0_Y") << 2) & 0xff; + result = (input_port_read(machine(), "LIGHT0_Y") << 2) & 0xff; break; case 3: /* upper 4 bits of Y */ - result = (input_port_read(space->machine(), "LIGHT0_Y") >> 6) & 0x03; + result = (input_port_read(machine(), "LIGHT0_Y") >> 6) & 0x03; break; case 4: /* low 8 bits of X */ - result = (input_port_read(space->machine(), "LIGHT1_X") << 4) & 0xff; + result = (input_port_read(machine(), "LIGHT1_X") << 4) & 0xff; break; case 5: /* upper 4 bits of X */ - result = (input_port_read(space->machine(), "LIGHT1_X") >> 4) & 0x0f; - result |= (input_port_read(space->machine(), "FAKE") & 0x30); + result = (input_port_read(machine(), "LIGHT1_X") >> 4) & 0x0f; + result |= (input_port_read(machine(), "FAKE") & 0x30); result |= 0x40; break; case 6: /* low 8 bits of Y */ - result = (input_port_read(space->machine(), "LIGHT1_Y") << 2) & 0xff; + result = (input_port_read(machine(), "LIGHT1_Y") << 2) & 0xff; break; case 7: /* upper 4 bits of Y */ - result = (input_port_read(space->machine(), "LIGHT1_Y") >> 6) & 0x03; + result = (input_port_read(machine(), "LIGHT1_Y") >> 6) & 0x03; break; } return result; } -static WRITE32_HANDLER( carnevil_gun_w ) +WRITE32_MEMBER(seattle_state::carnevil_gun_w) { logerror("carnevil_gun_w(%d) = %02X\n", offset, data); } @@ -1553,7 +1564,7 @@ static READ32_DEVICE_HANDLER( widget_r ) break; case WREG_ANALOG: - result = analog_port_r(device->machine().device("maincpu")->memory().space(AS_PROGRAM), 0, mem_mask); + result = state->analog_port_r(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), 0, mem_mask); break; case WREG_ETHER_DATA: @@ -1585,7 +1596,7 @@ static WRITE32_DEVICE_HANDLER( widget_w ) break; case WREG_ANALOG: - analog_port_w(device->machine().device("maincpu")->memory().space(AS_PROGRAM), 0, data, mem_mask); + state->analog_port_w(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), 0, data, mem_mask); break; case WREG_ETHER_DATA: @@ -1602,33 +1613,29 @@ static WRITE32_DEVICE_HANDLER( widget_w ) * *************************************/ -static WRITE32_HANDLER( cmos_w ) +WRITE32_MEMBER(seattle_state::cmos_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - if (state->m_cmos_write_enabled) - COMBINE_DATA(state->m_nvram + offset); - state->m_cmos_write_enabled = FALSE; + if (m_cmos_write_enabled) + COMBINE_DATA(m_nvram + offset); + m_cmos_write_enabled = FALSE; } -static READ32_HANDLER( cmos_r ) +READ32_MEMBER(seattle_state::cmos_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - return state->m_nvram[offset]; + return m_nvram[offset]; } -static WRITE32_HANDLER( cmos_protect_w ) +WRITE32_MEMBER(seattle_state::cmos_protect_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - state->m_cmos_write_enabled = TRUE; + m_cmos_write_enabled = TRUE; } -static READ32_HANDLER( cmos_protect_r ) +READ32_MEMBER(seattle_state::cmos_protect_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - return state->m_cmos_write_enabled; + return m_cmos_write_enabled; } @@ -1639,39 +1646,36 @@ static READ32_HANDLER( cmos_protect_r ) * *************************************/ -static WRITE32_HANDLER( seattle_watchdog_w ) +WRITE32_MEMBER(seattle_state::seattle_watchdog_w) { - device_eat_cycles(&space->device(), 100); + device_eat_cycles(&space.device(), 100); } -static WRITE32_HANDLER( asic_reset_w ) +WRITE32_MEMBER(seattle_state::asic_reset_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - COMBINE_DATA(state->m_asic_reset); - if (!(*state->m_asic_reset & 0x0002)) - midway_ioasic_reset(space->machine()); + COMBINE_DATA(m_asic_reset); + if (!(*m_asic_reset & 0x0002)) + midway_ioasic_reset(machine()); } -static WRITE32_HANDLER( asic_fifo_w ) +WRITE32_MEMBER(seattle_state::asic_fifo_w) { - midway_ioasic_fifo_w(space->machine(), data); + midway_ioasic_fifo_w(machine(), data); } -static READ32_HANDLER( status_leds_r ) +READ32_MEMBER(seattle_state::status_leds_r) { - seattle_state *state = space->machine().driver_data<seattle_state>(); - return state->m_status_leds | 0xffffff00; + return m_status_leds | 0xffffff00; } -static WRITE32_HANDLER( status_leds_w ) +WRITE32_MEMBER(seattle_state::status_leds_w) { - seattle_state *state = space->machine().driver_data<seattle_state>(); if (ACCESSING_BITS_0_7) - state->m_status_leds = data; + m_status_leds = data; } @@ -1764,24 +1768,24 @@ static READ32_DEVICE_HANDLER( seattle_ide_r ) static ADDRESS_MAP_START( seattle_map, AS_PROGRAM, 32, seattle_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE(m_rambase) // wg3dh only has 4MB; sfrush, blitz99 8MB - AM_RANGE(0x08000000, 0x08ffffff) AM_DEVREAD_LEGACY("voodoo", voodoo_r) AM_WRITE_LEGACY(seattle_voodoo_w) + AM_RANGE(0x08000000, 0x08ffffff) AM_DEVREAD_LEGACY("voodoo", voodoo_r) AM_WRITE(seattle_voodoo_w) AM_RANGE(0x0a000000, 0x0a0003ff) AM_DEVREADWRITE_LEGACY("ide", seattle_ide_r, ide_controller32_w) AM_RANGE(0x0a00040c, 0x0a00040f) AM_NOP // IDE-related, but annoying AM_RANGE(0x0a000f00, 0x0a000f07) AM_DEVREADWRITE_LEGACY("ide", ide_bus_master32_r, ide_bus_master32_w) - AM_RANGE(0x0c000000, 0x0c000fff) AM_READWRITE_LEGACY(galileo_r, galileo_w) - AM_RANGE(0x13000000, 0x13000003) AM_WRITE_LEGACY(asic_fifo_w) + AM_RANGE(0x0c000000, 0x0c000fff) AM_READWRITE(galileo_r, galileo_w) + AM_RANGE(0x13000000, 0x13000003) AM_WRITE(asic_fifo_w) AM_RANGE(0x16000000, 0x1600003f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w) - AM_RANGE(0x16100000, 0x1611ffff) AM_READWRITE_LEGACY(cmos_r, cmos_w) AM_SHARE("nvram") - AM_RANGE(0x17000000, 0x17000003) AM_READWRITE_LEGACY(cmos_protect_r, cmos_protect_w) - AM_RANGE(0x17100000, 0x17100003) AM_WRITE_LEGACY(seattle_watchdog_w) - AM_RANGE(0x17300000, 0x17300003) AM_RAM_WRITE_LEGACY(seattle_interrupt_enable_w) AM_BASE(m_interrupt_enable) - AM_RANGE(0x17400000, 0x17400003) AM_RAM_WRITE_LEGACY(interrupt_config_w) AM_BASE(m_interrupt_config) - AM_RANGE(0x17500000, 0x17500003) AM_READ_LEGACY(interrupt_state_r) - AM_RANGE(0x17600000, 0x17600003) AM_READ_LEGACY(interrupt_state2_r) - AM_RANGE(0x17700000, 0x17700003) AM_WRITE_LEGACY(vblank_clear_w) + AM_RANGE(0x16100000, 0x1611ffff) AM_READWRITE(cmos_r, cmos_w) AM_SHARE("nvram") + AM_RANGE(0x17000000, 0x17000003) AM_READWRITE(cmos_protect_r, cmos_protect_w) + AM_RANGE(0x17100000, 0x17100003) AM_WRITE(seattle_watchdog_w) + AM_RANGE(0x17300000, 0x17300003) AM_RAM_WRITE(seattle_interrupt_enable_w) AM_BASE(m_interrupt_enable) + AM_RANGE(0x17400000, 0x17400003) AM_RAM_WRITE(interrupt_config_w) AM_BASE(m_interrupt_config) + AM_RANGE(0x17500000, 0x17500003) AM_READ(interrupt_state_r) + AM_RANGE(0x17600000, 0x17600003) AM_READ(interrupt_state2_r) + AM_RANGE(0x17700000, 0x17700003) AM_WRITE(vblank_clear_w) AM_RANGE(0x17800000, 0x17800003) AM_NOP - AM_RANGE(0x17900000, 0x17900003) AM_READWRITE_LEGACY(status_leds_r, status_leds_w) - AM_RANGE(0x17f00000, 0x17f00003) AM_RAM_WRITE_LEGACY(asic_reset_w) AM_BASE(m_asic_reset) + AM_RANGE(0x17900000, 0x17900003) AM_READWRITE(status_leds_r, status_leds_w) + AM_RANGE(0x17f00000, 0x17f00003) AM_RAM_WRITE(asic_reset_w) AM_BASE(m_asic_reset) AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_REGION("user1", 0) AM_BASE(m_rombase) ADDRESS_MAP_END @@ -2831,7 +2835,7 @@ static void init_common(running_machine &machine, int ioasic, int serialnum, int case FLAGSTAFF_CONFIG: /* set up the analog inputs */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x14000000, 0x14000003, FUNC(analog_port_r), FUNC(analog_port_w)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x14000000, 0x14000003, read32_delegate(FUNC(seattle_state::analog_port_r),state), write32_delegate(FUNC(seattle_state::analog_port_w),state)); /* set up the ethernet controller */ device = machine.device("ethernet"); @@ -2964,7 +2968,8 @@ static DRIVER_INIT( carnevil ) init_common(machine, MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG); /* set up the gun */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x16800000, 0x1680001f, FUNC(carnevil_gun_r), FUNC(carnevil_gun_w)); + seattle_state *state = machine.driver_data<seattle_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x16800000, 0x1680001f, read32_delegate(FUNC(seattle_state::carnevil_gun_r),state), write32_delegate(FUNC(seattle_state::carnevil_gun_w),state)); /* speedups */ mips3drc_add_hotspot(machine.device("maincpu"), 0x8015176C, 0x3C03801A, 250); /* confirmed */ diff --git a/src/mame/drivers/snesb.c b/src/mame/drivers/snesb.c index 7ae33f9f826..77b3638812d 100644 --- a/src/mame/drivers/snesb.c +++ b/src/mame/drivers/snesb.c @@ -156,31 +156,36 @@ public: INT8 *m_shared_ram; UINT8 m_cnt; + DECLARE_READ8_MEMBER(sharedram_r); + DECLARE_WRITE8_MEMBER(sharedram_w); + DECLARE_READ8_MEMBER(sb2b_75bd37_r); + DECLARE_READ8_MEMBER(sb2b_6a6xxx_r); + DECLARE_READ8_MEMBER(sb2b_7xxx_r); + DECLARE_READ8_MEMBER(snesb_dsw1_r); + DECLARE_READ8_MEMBER(snesb_dsw2_r); + DECLARE_READ8_MEMBER(snesb_coin_r); }; /* Killer Instinct */ -static READ8_HANDLER(sharedram_r) +READ8_MEMBER(snesb_state::sharedram_r) { - snesb_state *state = space->machine().driver_data<snesb_state>(); - return state->m_shared_ram[offset]; + return m_shared_ram[offset]; } -static WRITE8_HANDLER(sharedram_w) +WRITE8_MEMBER(snesb_state::sharedram_w) { - snesb_state *state = space->machine().driver_data<snesb_state>(); - state->m_shared_ram[offset]=data; + m_shared_ram[offset]=data; } /* Sonic Blast Man 2 Special Turbo */ -static READ8_HANDLER(sb2b_75bd37_r) +READ8_MEMBER(snesb_state::sb2b_75bd37_r) { - snesb_state *state = space->machine().driver_data<snesb_state>(); /* protection check */ - return ++state->m_cnt; + return ++m_cnt; } -static READ8_HANDLER(sb2b_6a6xxx_r) +READ8_MEMBER(snesb_state::sb2b_6a6xxx_r) { /* protection checks */ switch(offset) @@ -193,31 +198,31 @@ static READ8_HANDLER(sb2b_6a6xxx_r) case 0xfb7: return 0x47; } - logerror("Unknown protection read read %x @ %x\n",offset, cpu_get_pc(&space->device())); + logerror("Unknown protection read read %x @ %x\n",offset, cpu_get_pc(&space.device())); return 0; } -static READ8_HANDLER(sb2b_7xxx_r) +READ8_MEMBER(snesb_state::sb2b_7xxx_r) { return snes_ram[0xc07000 + offset]; } /* Generic read handlers for Dip Switches and coins inputs */ -static READ8_HANDLER(snesb_dsw1_r) +READ8_MEMBER(snesb_state::snesb_dsw1_r) { - return input_port_read(space->machine(), "DSW1"); + return input_port_read(machine(), "DSW1"); } -static READ8_HANDLER(snesb_dsw2_r) +READ8_MEMBER(snesb_state::snesb_dsw2_r) { - return input_port_read(space->machine(), "DSW2"); + return input_port_read(machine(), "DSW2"); } -static READ8_HANDLER(snesb_coin_r) +READ8_MEMBER(snesb_state::snesb_coin_r) { - return input_port_read(space->machine(), "COIN"); + return input_port_read(machine(), "COIN"); } @@ -653,12 +658,12 @@ static DRIVER_INIT(kinstb) } state->m_shared_ram = auto_alloc_array(machine, INT8, 0x100); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x781000, 0x7810ff, FUNC(sharedram_r), FUNC(sharedram_w)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x781000, 0x7810ff, read8_delegate(FUNC(snesb_state::sharedram_r),state), write8_delegate(FUNC(snesb_state::sharedram_w),state)); /* extra inputs */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770071, 0x770071, FUNC(snesb_dsw1_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770073, 0x770073, FUNC(snesb_dsw2_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770079, 0x770079, FUNC(snesb_coin_r)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770071, 0x770071, read8_delegate(FUNC(snesb_state::snesb_dsw1_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770073, 0x770073, read8_delegate(FUNC(snesb_state::snesb_dsw2_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770079, 0x770079, read8_delegate(FUNC(snesb_state::snesb_coin_r),state)); DRIVER_INIT_CALL(snes_hirom); } @@ -699,9 +704,10 @@ static DRIVER_INIT( ffight2b ) rom[0x7ffc] = 0x54; /* extra inputs */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770071, 0x770071, FUNC(snesb_dsw1_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770073, 0x770073, FUNC(snesb_dsw2_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770079, 0x770079, FUNC(snesb_coin_r)); + snesb_state *state = machine.driver_data<snesb_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770071, 0x770071, read8_delegate(FUNC(snesb_state::snesb_dsw1_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770073, 0x770073, read8_delegate(FUNC(snesb_state::snesb_dsw2_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770079, 0x770079, read8_delegate(FUNC(snesb_state::snesb_coin_r),state)); DRIVER_INIT_CALL(snes); } @@ -724,9 +730,10 @@ static DRIVER_INIT( iron ) } /* extra inputs */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770071, 0x770071, FUNC(snesb_dsw1_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770073, 0x770073, FUNC(snesb_dsw2_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770079, 0x770079, FUNC(snesb_coin_r)); + snesb_state *state = machine.driver_data<snesb_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770071, 0x770071, read8_delegate(FUNC(snesb_state::snesb_dsw1_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770073, 0x770073, read8_delegate(FUNC(snesb_state::snesb_dsw2_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770079, 0x770079, read8_delegate(FUNC(snesb_state::snesb_coin_r),state)); DRIVER_INIT_CALL(snes); } @@ -755,9 +762,10 @@ static DRIVER_INIT( denseib ) rom[0xfffd] = 0xf7; /* extra inputs */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770071, 0x770071, FUNC(snesb_dsw1_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770073, 0x770073, FUNC(snesb_dsw2_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770079, 0x770079, FUNC(snesb_coin_r)); + snesb_state *state = machine.driver_data<snesb_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770071, 0x770071, read8_delegate(FUNC(snesb_state::snesb_dsw1_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770073, 0x770073, read8_delegate(FUNC(snesb_state::snesb_dsw2_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770079, 0x770079, read8_delegate(FUNC(snesb_state::snesb_coin_r),state)); DRIVER_INIT_CALL(snes_hirom); } @@ -815,16 +823,17 @@ static DRIVER_INIT( sblast2b ) dst[0xfffd] = 0x7a; /* protection checks */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x75bd37, 0x75bd37, FUNC(sb2b_75bd37_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x6a6000, 0x6a6fff, FUNC(sb2b_6a6xxx_r)); + snesb_state *state = machine.driver_data<snesb_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x75bd37, 0x75bd37, read8_delegate(FUNC(snesb_state::sb2b_75bd37_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x6a6000, 0x6a6fff, read8_delegate(FUNC(snesb_state::sb2b_6a6xxx_r),state)); /* handler to read boot code */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x007000, 0x007fff, FUNC(sb2b_7xxx_r)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x007000, 0x007fff, read8_delegate(FUNC(snesb_state::sb2b_7xxx_r),state)); /* extra inputs */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770071, 0x770071, FUNC(snesb_dsw1_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770073, 0x770073, FUNC(snesb_dsw2_r)); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770079, 0x770079, FUNC(snesb_coin_r)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770071, 0x770071, read8_delegate(FUNC(snesb_state::snesb_dsw1_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770073, 0x770073, read8_delegate(FUNC(snesb_state::snesb_dsw2_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x770079, 0x770079, read8_delegate(FUNC(snesb_state::snesb_coin_r),state)); DRIVER_INIT_CALL(snes_hirom); } diff --git a/src/mame/drivers/taito_x.c b/src/mame/drivers/taito_x.c index d33670184ff..ba3b1b74acf 100644 --- a/src/mame/drivers/taito_x.c +++ b/src/mame/drivers/taito_x.c @@ -328,36 +328,41 @@ public: : seta_state(mconfig, type, tag) { } int m_banknum; + DECLARE_READ16_MEMBER(superman_dsw_input_r); + DECLARE_READ16_MEMBER(daisenpu_input_r); + DECLARE_WRITE16_MEMBER(daisenpu_input_w); + DECLARE_WRITE16_MEMBER(kyustrkr_input_w); + DECLARE_WRITE8_MEMBER(sound_bankswitch_w); }; -static READ16_HANDLER( superman_dsw_input_r ) +READ16_MEMBER(taitox_state::superman_dsw_input_r) { switch (offset) { case 0x00: - return input_port_read(space->machine(), "DSWA") & 0x0f; + return input_port_read(machine(), "DSWA") & 0x0f; case 0x01: - return (input_port_read(space->machine(), "DSWA") & 0xf0) >> 4; + return (input_port_read(machine(), "DSWA") & 0xf0) >> 4; case 0x02: - return input_port_read(space->machine(), "DSWB") & 0x0f; + return input_port_read(machine(), "DSWB") & 0x0f; case 0x03: - return (input_port_read(space->machine(), "DSWB") & 0xf0) >> 4; + return (input_port_read(machine(), "DSWB") & 0xf0) >> 4; default: logerror("taitox unknown dsw read offset: %04x\n", offset); return 0x00; } } -static READ16_HANDLER( daisenpu_input_r ) +READ16_MEMBER(taitox_state::daisenpu_input_r) { switch (offset) { case 0x00: - return input_port_read(space->machine(), "IN0"); /* Player 1 controls + START1 */ + return input_port_read(machine(), "IN0"); /* Player 1 controls + START1 */ case 0x01: - return input_port_read(space->machine(), "IN1"); /* Player 2 controls + START2 */ + return input_port_read(machine(), "IN1"); /* Player 2 controls + START2 */ case 0x02: - return input_port_read(space->machine(), "IN2"); /* COINn + SERVICE1 + TILT */ + return input_port_read(machine(), "IN2"); /* COINn + SERVICE1 + TILT */ default: logerror("taitox unknown input read offset: %04x\n", offset); @@ -365,15 +370,15 @@ static READ16_HANDLER( daisenpu_input_r ) } } -static WRITE16_HANDLER( daisenpu_input_w ) +WRITE16_MEMBER(taitox_state::daisenpu_input_w) { switch (offset) { case 0x04: /* coin counters and lockout */ - coin_counter_w(space->machine(), 0,data & 0x01); - coin_counter_w(space->machine(), 1,data & 0x02); - coin_lockout_w(space->machine(), 0,~data & 0x04); - coin_lockout_w(space->machine(), 1,~data & 0x08); + coin_counter_w(machine(), 0,data & 0x01); + coin_counter_w(machine(), 1,data & 0x02); + coin_lockout_w(machine(), 0,~data & 0x04); + coin_lockout_w(machine(), 1,~data & 0x08); //logerror("taitox coin control %04x to offset %04x\n",data,offset); break; @@ -383,15 +388,15 @@ static WRITE16_HANDLER( daisenpu_input_w ) } -static WRITE16_HANDLER( kyustrkr_input_w ) +WRITE16_MEMBER(taitox_state::kyustrkr_input_w) { switch (offset) { case 0x04: /* coin counters and lockout */ - coin_counter_w(space->machine(), 0,data & 0x01); - coin_counter_w(space->machine(), 1,data & 0x02); - coin_lockout_w(space->machine(), 0,data & 0x04); - coin_lockout_w(space->machine(), 1,data & 0x08); + coin_counter_w(machine(), 0,data & 0x01); + coin_counter_w(machine(), 1,data & 0x02); + coin_lockout_w(machine(), 0,data & 0x04); + coin_lockout_w(machine(), 1,data & 0x08); //logerror("taitox coin control %04x to offset %04x\n",data,offset); break; @@ -410,12 +415,11 @@ static void reset_sound_region(running_machine &machine) memory_set_bankptr(machine, "bank2", machine.region("audiocpu")->base() + (state->m_banknum * 0x4000) + 0x10000 ); } -static WRITE8_HANDLER( sound_bankswitch_w ) +WRITE8_MEMBER(taitox_state::sound_bankswitch_w) { - taitox_state *state = space->machine().driver_data<taitox_state>(); - state->m_banknum = (data - 1) & 3; - reset_sound_region(space->machine()); + m_banknum = (data - 1) & 3; + reset_sound_region(machine()); } @@ -425,7 +429,7 @@ static ADDRESS_MAP_START( superman_map, AS_PROGRAM, 16, taitox_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM AM_RANGE(0x300000, 0x300001) AM_WRITENOP /* written each frame at $3a9c, mostly 0x10 */ AM_RANGE(0x400000, 0x400001) AM_WRITENOP /* written each frame at $3aa2, mostly 0x10 */ - AM_RANGE(0x500000, 0x500007) AM_READ_LEGACY(superman_dsw_input_r) + AM_RANGE(0x500000, 0x500007) AM_READ(superman_dsw_input_r) AM_RANGE(0x600000, 0x600001) AM_WRITENOP /* written each frame at $3ab0, mostly 0x10 */ AM_RANGE(0x800000, 0x800001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff) AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff) @@ -442,11 +446,11 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( daisenpu_map, AS_PROGRAM, 16, taitox_state ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // AM_RANGE(0x400000, 0x400001) AM_WRITENOP /* written each frame at $2ac, values change */ - AM_RANGE(0x500000, 0x50000f) AM_READ_LEGACY(superman_dsw_input_r) + AM_RANGE(0x500000, 0x50000f) AM_READ(superman_dsw_input_r) // AM_RANGE(0x600000, 0x600001) AM_WRITENOP /* written each frame at $2a2, values change */ AM_RANGE(0x800000, 0x800001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff) AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff) - AM_RANGE(0x900000, 0x90000f) AM_READWRITE_LEGACY(daisenpu_input_r, daisenpu_input_w) + AM_RANGE(0x900000, 0x90000f) AM_READWRITE(daisenpu_input_r, daisenpu_input_w) AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram") AM_RANGE(0xd00000, 0xd005ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r16, spriteylow_w16) // Sprites Y AM_RANGE(0xd00600, 0xd00607) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spritectrl_r16, spritectrl_w16) @@ -457,11 +461,11 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( gigandes_map, AS_PROGRAM, 16, taitox_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM AM_RANGE(0x400000, 0x400001) AM_WRITENOP /* 0x1 written each frame at $d42, watchdog? */ - AM_RANGE(0x500000, 0x500007) AM_READ_LEGACY(superman_dsw_input_r) + AM_RANGE(0x500000, 0x500007) AM_READ(superman_dsw_input_r) AM_RANGE(0x600000, 0x600001) AM_WRITENOP /* 0x1 written each frame at $d3c, watchdog? */ AM_RANGE(0x800000, 0x800001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff) AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff) - AM_RANGE(0x900000, 0x90000f) AM_READWRITE_LEGACY(daisenpu_input_r, daisenpu_input_w) + AM_RANGE(0x900000, 0x90000f) AM_READWRITE(daisenpu_input_r, daisenpu_input_w) AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram") AM_RANGE(0xd00000, 0xd005ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r16, spriteylow_w16) // Sprites Y AM_RANGE(0xd00600, 0xd00607) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spritectrl_r16, spritectrl_w16) @@ -472,11 +476,11 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( ballbros_map, AS_PROGRAM, 16, taitox_state ) AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_RANGE(0x400000, 0x400001) AM_WRITENOP /* 0x1 written each frame at $c56, watchdog? */ - AM_RANGE(0x500000, 0x50000f) AM_READ_LEGACY(superman_dsw_input_r) + AM_RANGE(0x500000, 0x50000f) AM_READ(superman_dsw_input_r) AM_RANGE(0x600000, 0x600001) AM_WRITENOP /* 0x1 written each frame at $c4e, watchdog? */ AM_RANGE(0x800000, 0x800001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff) AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff) - AM_RANGE(0x900000, 0x90000f) AM_READWRITE_LEGACY(daisenpu_input_r, daisenpu_input_w) + AM_RANGE(0x900000, 0x90000f) AM_READWRITE(daisenpu_input_r, daisenpu_input_w) AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram") AM_RANGE(0xd00000, 0xd005ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r16, spriteylow_w16) // Sprites Y AM_RANGE(0xd00600, 0xd00607) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spritectrl_r16, spritectrl_w16) @@ -498,7 +502,7 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, taitox_state ) AM_RANGE(0xea00, 0xea00) AM_READNOP AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */ AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */ - AM_RANGE(0xf200, 0xf200) AM_WRITE_LEGACY(sound_bankswitch_w) /* bankswitch ? */ + AM_RANGE(0xf200, 0xf200) AM_WRITE(sound_bankswitch_w) /* bankswitch ? */ ADDRESS_MAP_END static ADDRESS_MAP_START( daisenpu_sound_map, AS_PROGRAM, 8, taitox_state ) @@ -512,7 +516,7 @@ static ADDRESS_MAP_START( daisenpu_sound_map, AS_PROGRAM, 8, taitox_state ) AM_RANGE(0xea00, 0xea00) AM_READNOP AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */ AM_RANGE(0xf000, 0xf000) AM_WRITENOP - AM_RANGE(0xf200, 0xf200) AM_WRITE_LEGACY(sound_bankswitch_w) + AM_RANGE(0xf200, 0xf200) AM_WRITE(sound_bankswitch_w) ADDRESS_MAP_END @@ -1221,7 +1225,8 @@ ROM_END static DRIVER_INIT( kyustrkr ) { - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x900000, 0x90000f, FUNC(kyustrkr_input_w)); + taitox_state *state = machine.driver_data<taitox_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x900000, 0x90000f, write16_delegate(FUNC(taitox_state::kyustrkr_input_w),state)); } diff --git a/src/mame/drivers/taitogn.c b/src/mame/drivers/taitogn.c index e5dcfefc113..24f24a6231d 100644 --- a/src/mame/drivers/taitogn.c +++ b/src/mame/drivers/taitogn.c @@ -357,6 +357,34 @@ public: UINT32 m_coin_info; UINT32 m_mux_data; + DECLARE_WRITE32_MEMBER(rf5c296_io_w); + DECLARE_READ32_MEMBER(rf5c296_io_r); + DECLARE_READ32_MEMBER(rf5c296_mem_r); + DECLARE_WRITE32_MEMBER(rf5c296_mem_w); + DECLARE_READ32_MEMBER(flash_subbios_r); + DECLARE_WRITE32_MEMBER(flash_subbios_w); + DECLARE_READ32_MEMBER(flash_mn102_r); + DECLARE_WRITE32_MEMBER(flash_mn102_w); + DECLARE_READ32_MEMBER(flash_s1_r); + DECLARE_WRITE32_MEMBER(flash_s1_w); + DECLARE_READ32_MEMBER(flash_s2_r); + DECLARE_WRITE32_MEMBER(flash_s2_w); + DECLARE_READ32_MEMBER(flash_s3_r); + DECLARE_WRITE32_MEMBER(flash_s3_w); + DECLARE_READ32_MEMBER(control_r); + DECLARE_WRITE32_MEMBER(control_w); + DECLARE_WRITE32_MEMBER(control2_w); + DECLARE_READ32_MEMBER(control3_r); + DECLARE_WRITE32_MEMBER(control3_w); + DECLARE_READ32_MEMBER(gn_1fb70000_r); + DECLARE_WRITE32_MEMBER(gn_1fb70000_w); + DECLARE_READ32_MEMBER(hack1_r); + DECLARE_READ32_MEMBER(znsecsel_r); + DECLARE_WRITE32_MEMBER(znsecsel_w); + DECLARE_READ32_MEMBER(boardconfig_r); + DECLARE_WRITE32_MEMBER(coin_w); + DECLARE_READ32_MEMBER(coin_r); + DECLARE_READ32_MEMBER(gnet_mahjong_panel_r); }; @@ -390,38 +418,36 @@ static UINT8 rf5c296_reg_r(ATTR_UNUSED running_machine &machine, UINT8 reg) return 0x00; } -static WRITE32_HANDLER(rf5c296_io_w) +WRITE32_MEMBER(taitogn_state::rf5c296_io_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); if(offset < 2) { - ide_controller32_pcmcia_w(space->machine().device(":card"), offset, data, mem_mask); + ide_controller32_pcmcia_w(machine().device(":card"), offset, data, mem_mask); return; } if(offset == 0x3e0/4) { if(ACCESSING_BITS_0_7) - state->m_rf5c296_reg = data; + m_rf5c296_reg = data; if(ACCESSING_BITS_8_15) - rf5c296_reg_w(space->machine(), state->m_rf5c296_reg, data >> 8); + rf5c296_reg_w(machine(), m_rf5c296_reg, data >> 8); } } -static READ32_HANDLER(rf5c296_io_r) +READ32_MEMBER(taitogn_state::rf5c296_io_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); if(offset < 2) - return ide_controller32_pcmcia_r(space->machine().device(":card"), offset, mem_mask); + return ide_controller32_pcmcia_r(machine().device(":card"), offset, mem_mask); offset *= 4; if(offset == 0x3e0/4) { UINT32 res = 0xffff0000; if(ACCESSING_BITS_0_7) - res |= state->m_rf5c296_reg; + res |= m_rf5c296_reg; if(ACCESSING_BITS_8_15) - res |= rf5c296_reg_r(space->machine(), state->m_rf5c296_reg) << 8; + res |= rf5c296_reg_r(machine(), m_rf5c296_reg) << 8; return res; } @@ -430,25 +456,23 @@ static READ32_HANDLER(rf5c296_io_r) // Hardcoded to reach the pcmcia CIS -static READ32_HANDLER(rf5c296_mem_r) +READ32_MEMBER(taitogn_state::rf5c296_mem_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); if(offset < 0x80) - return (state->m_cis[offset*2+1] << 16) | state->m_cis[offset*2]; + return (m_cis[offset*2+1] << 16) | m_cis[offset*2]; switch(offset) { case 0x080: return 0x00800041; case 0x081: return 0x0000002e; - case 0x100: return state->m_locked ? 0x00010000 : 0; + case 0x100: return m_locked ? 0x00010000 : 0; default: return 0; } } -static WRITE32_HANDLER(rf5c296_mem_w) +WRITE32_MEMBER(taitogn_state::rf5c296_mem_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); if(offset >= 0x140 && offset <= 0x144) { dynamic_buffer key; @@ -460,14 +484,14 @@ static WRITE32_HANDLER(rf5c296_mem_w) pos++; } else v = data; - get_disk_handle(space->machine(), ":drive_0")->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, key); + get_disk_handle(machine(), ":drive_0")->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, key); k = pos < key.count() ? key[pos] : 0; if(v == k) - state->m_locked &= ~(1 << pos); + m_locked &= ~(1 << pos); else - state->m_locked |= 1 << pos; - if (!state->m_locked) { - ide_set_gnet_readlock (space->machine().device(":card"), 0); + m_locked |= 1 << pos; + if (!m_locked) { + ide_set_gnet_readlock (machine().device(":card"), 0); } } } @@ -496,107 +520,96 @@ static void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, U } -static READ32_HANDLER(flash_subbios_r) +READ32_MEMBER(taitogn_state::flash_subbios_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return gen_flash_r(state->m_biosflash, offset, mem_mask); + return gen_flash_r(m_biosflash, offset, mem_mask); } -static WRITE32_HANDLER(flash_subbios_w) +WRITE32_MEMBER(taitogn_state::flash_subbios_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - gen_flash_w(state->m_biosflash, offset, data, mem_mask); + gen_flash_w(m_biosflash, offset, data, mem_mask); } -static READ32_HANDLER(flash_mn102_r) +READ32_MEMBER(taitogn_state::flash_mn102_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return gen_flash_r(state->m_pgmflash, offset, mem_mask); + return gen_flash_r(m_pgmflash, offset, mem_mask); } -static WRITE32_HANDLER(flash_mn102_w) +WRITE32_MEMBER(taitogn_state::flash_mn102_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - gen_flash_w(state->m_pgmflash, offset, data, mem_mask); + gen_flash_w(m_pgmflash, offset, data, mem_mask); } -static READ32_HANDLER(flash_s1_r) +READ32_MEMBER(taitogn_state::flash_s1_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return gen_flash_r(state->m_sndflash[0], offset, mem_mask); + return gen_flash_r(m_sndflash[0], offset, mem_mask); } -static WRITE32_HANDLER(flash_s1_w) +WRITE32_MEMBER(taitogn_state::flash_s1_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - gen_flash_w(state->m_sndflash[0], offset, data, mem_mask); + gen_flash_w(m_sndflash[0], offset, data, mem_mask); } -static READ32_HANDLER(flash_s2_r) +READ32_MEMBER(taitogn_state::flash_s2_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return gen_flash_r(state->m_sndflash[1], offset, mem_mask); + return gen_flash_r(m_sndflash[1], offset, mem_mask); } -static WRITE32_HANDLER(flash_s2_w) +WRITE32_MEMBER(taitogn_state::flash_s2_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - gen_flash_w(state->m_sndflash[1], offset, data, mem_mask); + gen_flash_w(m_sndflash[1], offset, data, mem_mask); } -static READ32_HANDLER(flash_s3_r) +READ32_MEMBER(taitogn_state::flash_s3_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return gen_flash_r(state->m_sndflash[2], offset, mem_mask); + return gen_flash_r(m_sndflash[2], offset, mem_mask); } -static WRITE32_HANDLER(flash_s3_w) +WRITE32_MEMBER(taitogn_state::flash_s3_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - gen_flash_w(state->m_sndflash[2], offset, data, mem_mask); + gen_flash_w(m_sndflash[2], offset, data, mem_mask); } static void install_handlers(running_machine &machine, int mode) { + taitogn_state *state = machine.driver_data<taitogn_state>(); address_space *a = machine.device("maincpu")->memory().space(AS_PROGRAM); if(mode == 0) { // Mode 0 has access to the subbios, the mn102 flash and the rf5c296 mem zone - a->install_legacy_readwrite_handler(0x1f000000, 0x1f1fffff, FUNC(flash_subbios_r), FUNC(flash_subbios_w)); - a->install_legacy_readwrite_handler(0x1f200000, 0x1f2fffff, FUNC(rf5c296_mem_r), FUNC(rf5c296_mem_w)); - a->install_legacy_readwrite_handler(0x1f300000, 0x1f37ffff, FUNC(flash_mn102_r), FUNC(flash_mn102_w)); + a->install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_subbios_r),state), write32_delegate(FUNC(taitogn_state::flash_subbios_w),state)); + a->install_readwrite_handler(0x1f200000, 0x1f2fffff, read32_delegate(FUNC(taitogn_state::rf5c296_mem_r),state), write32_delegate(FUNC(taitogn_state::rf5c296_mem_w),state)); + a->install_readwrite_handler(0x1f300000, 0x1f37ffff, read32_delegate(FUNC(taitogn_state::flash_mn102_r),state), write32_delegate(FUNC(taitogn_state::flash_mn102_w),state)); a->nop_readwrite(0x1f380000, 0x1f5fffff); } else { // Mode 1 has access to the 3 samples flashes - a->install_legacy_readwrite_handler(0x1f000000, 0x1f1fffff, FUNC(flash_s1_r), FUNC(flash_s1_w)); - a->install_legacy_readwrite_handler(0x1f200000, 0x1f3fffff, FUNC(flash_s2_r), FUNC(flash_s2_w)); - a->install_legacy_readwrite_handler(0x1f400000, 0x1f5fffff, FUNC(flash_s3_r), FUNC(flash_s3_w)); + a->install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_s1_r),state), write32_delegate(FUNC(taitogn_state::flash_s1_w),state)); + a->install_readwrite_handler(0x1f200000, 0x1f3fffff, read32_delegate(FUNC(taitogn_state::flash_s2_r),state), write32_delegate(FUNC(taitogn_state::flash_s2_w),state)); + a->install_readwrite_handler(0x1f400000, 0x1f5fffff, read32_delegate(FUNC(taitogn_state::flash_s3_r),state), write32_delegate(FUNC(taitogn_state::flash_s3_w),state)); } } // Misc. controls -static READ32_HANDLER(control_r) +READ32_MEMBER(taitogn_state::control_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - // fprintf(stderr, "gn_r %08x @ %08x (%s)\n", 0x1fb00000+4*offset, mem_mask, space->machine().describe_context()); - return state->m_control; + // fprintf(stderr, "gn_r %08x @ %08x (%s)\n", 0x1fb00000+4*offset, mem_mask, machine().describe_context()); + return m_control; } -static WRITE32_HANDLER(control_w) +WRITE32_MEMBER(taitogn_state::control_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); // 20 = watchdog // 04 = select bank @@ -604,12 +617,12 @@ static WRITE32_HANDLER(control_w) // According to the rom code, bits 1-0 may be part of the bank // selection too, but they're always 0. - UINT32 p = state->m_control; - device_t *mb3773 = space->machine().device("mb3773"); + UINT32 p = m_control; + device_t *mb3773 = machine().device("mb3773"); - COMBINE_DATA(&state->m_control); + COMBINE_DATA(&m_control); - mb3773_set_ck(mb3773, (state->m_control & 0x20) >> 5); + mb3773_set_ck(mb3773, (m_control & 0x20) >> 5); #if 0 if((p ^ control) & ~0x20) @@ -621,35 +634,32 @@ static WRITE32_HANDLER(control_w) control & 0x04 ? 'f' : '-', control & 0x02 ? '1' : '0', control & 0x01 ? '1' : '0', - space->machine().describe_context()); + machine().describe_context()); #endif - if((p ^ state->m_control) & 0x04) - install_handlers(space->machine(), state->m_control & 4 ? 1 : 0); + if((p ^ m_control) & 0x04) + install_handlers(machine(), m_control & 4 ? 1 : 0); } -static WRITE32_HANDLER(control2_w) +WRITE32_MEMBER(taitogn_state::control2_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - COMBINE_DATA(&state->m_control2); + COMBINE_DATA(&m_control2); } -static READ32_HANDLER(control3_r) +READ32_MEMBER(taitogn_state::control3_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return state->m_control3; + return m_control3; } -static WRITE32_HANDLER(control3_w) +WRITE32_MEMBER(taitogn_state::control3_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - COMBINE_DATA(&state->m_control3); + COMBINE_DATA(&m_control3); } -static READ32_HANDLER(gn_1fb70000_r) +READ32_MEMBER(taitogn_state::gn_1fb70000_r) { // (1328) 1348 tests mask 0002, 8 times. // Called by 1434, exit at 143c @@ -661,19 +671,18 @@ static READ32_HANDLER(gn_1fb70000_r) return 2; } -static WRITE32_HANDLER(gn_1fb70000_w) +WRITE32_MEMBER(taitogn_state::gn_1fb70000_w) { // Writes 0 or 1 all the time, it *may* have somthing to do with // i/o port width, but then maybe not } -static READ32_HANDLER(hack1_r) +READ32_MEMBER(taitogn_state::hack1_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - state->m_v = state->m_v ^ 8; + m_v = m_v ^ 8; // Probably something to do with sound - return state->m_v; + return m_v; } @@ -683,11 +692,10 @@ static READ32_HANDLER(hack1_r) static const UINT8 tt10[ 8 ] = { 0x80, 0x20, 0x38, 0x08, 0xf1, 0x03, 0xfe, 0xfc }; static const UINT8 tt16[ 8 ] = { 0xc0, 0x04, 0xf9, 0xe1, 0x60, 0x70, 0xf2, 0x02 }; -static READ32_HANDLER( znsecsel_r ) +READ32_MEMBER(taitogn_state::znsecsel_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return state->m_n_znsecsel; + return m_n_znsecsel; } static void sio_znsec0_handler( running_machine &machine, int n_data ) @@ -759,38 +767,37 @@ static void sio_dip_handler( running_machine &machine, int n_data ) } } -static WRITE32_HANDLER( znsecsel_w ) +WRITE32_MEMBER(taitogn_state::znsecsel_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - COMBINE_DATA( &state->m_n_znsecsel ); + COMBINE_DATA( &m_n_znsecsel ); - if( ( state->m_n_znsecsel & 0x80 ) == 0 ) + if( ( m_n_znsecsel & 0x80 ) == 0 ) { - psx_sio_install_handler( space->machine(), 0, sio_pad_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_pad_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); } - else if( ( state->m_n_znsecsel & 0x08 ) == 0 ) + else if( ( m_n_znsecsel & 0x08 ) == 0 ) { znsec_start( 1 ); - psx_sio_install_handler( space->machine(), 0, sio_znsec1_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_znsec1_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); } - else if( ( state->m_n_znsecsel & 0x04 ) == 0 ) + else if( ( m_n_znsecsel & 0x04 ) == 0 ) { znsec_start( 0 ); - psx_sio_install_handler( space->machine(), 0, sio_znsec0_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_znsec0_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); } else { - state->m_n_dip_bit = 0; - state->m_b_lastclock = 1; + m_n_dip_bit = 0; + m_b_lastclock = 1; - psx_sio_install_handler( space->machine(), 0, sio_dip_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_dip_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); - state->m_dip_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( 100 ), 1 ); + m_dip_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime( 100 ), 1 ); } } @@ -807,7 +814,7 @@ static TIMER_CALLBACK( dip_timer_fired ) } -static READ32_HANDLER( boardconfig_r ) +READ32_MEMBER(taitogn_state::boardconfig_r) { /* ------00 mem=4M @@ -832,9 +839,8 @@ static READ32_HANDLER( boardconfig_r ) } -static WRITE32_HANDLER( coin_w ) +WRITE32_MEMBER(taitogn_state::coin_w) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); /* 0x01=counter 0x02=coin lock 1 @@ -842,34 +848,32 @@ static WRITE32_HANDLER( coin_w ) 0x20=coin lock 2 0x80=?? */ - COMBINE_DATA (&state->m_coin_info); + COMBINE_DATA (&m_coin_info); } -static READ32_HANDLER( coin_r ) +READ32_MEMBER(taitogn_state::coin_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - return state->m_coin_info; + return m_coin_info; } /* mahjong panel handler (for Usagi & Mahjong Oh) */ -static READ32_HANDLER( gnet_mahjong_panel_r ) +READ32_MEMBER(taitogn_state::gnet_mahjong_panel_r) { - taitogn_state *state = space->machine().driver_data<taitogn_state>(); - state->m_mux_data = state->m_coin_info; - state->m_mux_data &= 0xcc; + m_mux_data = m_coin_info; + m_mux_data &= 0xcc; - switch(state->m_mux_data) + switch(m_mux_data) { - case 0x04: return input_port_read(space->machine(), "KEY0"); - case 0x08: return input_port_read(space->machine(), "KEY1"); - case 0x40: return input_port_read(space->machine(), "KEY2"); - case 0x80: return input_port_read(space->machine(), "KEY3"); + case 0x04: return input_port_read(machine(), "KEY0"); + case 0x08: return input_port_read(machine(), "KEY1"); + case 0x40: return input_port_read(machine(), "KEY2"); + case 0x80: return input_port_read(machine(), "KEY3"); } /* mux disabled */ - return input_port_read(space->machine(), "P4"); + return input_port_read(machine(), "P4"); } // Init and reset @@ -899,7 +903,8 @@ static DRIVER_INIT( coh3002t ) static DRIVER_INIT( coh3002t_mp ) { DRIVER_INIT_CALL(coh3002t); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x1fa10100, 0x1fa10103, FUNC(gnet_mahjong_panel_r) ); + taitogn_state *state = machine.driver_data<taitogn_state>(); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x1fa10100, 0x1fa10103, read32_delegate(FUNC(taitogn_state::gnet_mahjong_panel_r),state)); } static MACHINE_RESET( coh3002t ) @@ -920,26 +925,26 @@ static MACHINE_RESET( coh3002t ) static ADDRESS_MAP_START( taitogn_map, AS_PROGRAM, 32, taitogn_state ) AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */ AM_RANGE(0x00400000, 0x007fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ - AM_RANGE(0x1f000000, 0x1f1fffff) AM_READWRITE_LEGACY(flash_s1_r, flash_s1_w) - AM_RANGE(0x1f200000, 0x1f3fffff) AM_READWRITE_LEGACY(flash_s2_r, flash_s2_w) - AM_RANGE(0x1f400000, 0x1f5fffff) AM_READWRITE_LEGACY(flash_s3_r, flash_s3_w) + AM_RANGE(0x1f000000, 0x1f1fffff) AM_READWRITE(flash_s1_r, flash_s1_w) + AM_RANGE(0x1f200000, 0x1f3fffff) AM_READWRITE(flash_s2_r, flash_s2_w) + AM_RANGE(0x1f400000, 0x1f5fffff) AM_READWRITE(flash_s3_r, flash_s3_w) AM_RANGE(0x1fa00000, 0x1fa00003) AM_READ_PORT("P1") AM_RANGE(0x1fa00100, 0x1fa00103) AM_READ_PORT("P2") AM_RANGE(0x1fa00200, 0x1fa00203) AM_READ_PORT("SERVICE") AM_RANGE(0x1fa00300, 0x1fa00303) AM_READ_PORT("SYSTEM") AM_RANGE(0x1fa10000, 0x1fa10003) AM_READ_PORT("P3") AM_RANGE(0x1fa10100, 0x1fa10103) AM_READ_PORT("P4") - AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ_LEGACY(boardconfig_r) - AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE_LEGACY(znsecsel_r, znsecsel_w) - AM_RANGE(0x1fa20000, 0x1fa20003) AM_READWRITE_LEGACY(coin_r, coin_w) - AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE_LEGACY(control3_r, control3_w) + AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ(boardconfig_r) + AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE(znsecsel_r, znsecsel_w) + AM_RANGE(0x1fa20000, 0x1fa20003) AM_READWRITE(coin_r, coin_w) + AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE(control3_r, control3_w) AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READWRITE16_LEGACY(spu_r, spu_w, 0xffffffff) // systematic read at spu_address + 250000, result dropped, maybe other accesses - AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ_LEGACY(hack1_r) + AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ(hack1_r) AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xffffffff) /* eeprom */ - AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE_LEGACY(rf5c296_io_r, rf5c296_io_w) - AM_RANGE(0x1fb40000, 0x1fb40003) AM_READWRITE_LEGACY(control_r, control_w) - AM_RANGE(0x1fb60000, 0x1fb60003) AM_WRITE_LEGACY(control2_w) - AM_RANGE(0x1fb70000, 0x1fb70003) AM_READWRITE_LEGACY(gn_1fb70000_r, gn_1fb70000_w) + AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE(rf5c296_io_r, rf5c296_io_w) + AM_RANGE(0x1fb40000, 0x1fb40003) AM_READWRITE(control_r, control_w) + AM_RANGE(0x1fb60000, 0x1fb60003) AM_WRITE(control2_w) + AM_RANGE(0x1fb70000, 0x1fb70003) AM_READWRITE(gn_1fb70000_r, gn_1fb70000_w) AM_RANGE(0x1fbe0000, 0x1fbe01ff) AM_RAM // 256 bytes com zone with the mn102, low bytes of words only, with additional comm at 1fb80000 AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("mainbios", 0) /* bios */ AM_RANGE(0x80000000, 0x803fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ diff --git a/src/mame/drivers/taitowlf.c b/src/mame/drivers/taitowlf.c index 7b5d010e664..15edd551ee9 100644 --- a/src/mame/drivers/taitowlf.c +++ b/src/mame/drivers/taitowlf.c @@ -60,6 +60,13 @@ public: device_t *m_pic8259_2; device_t *m_dma8237_1; device_t *m_dma8237_2; + DECLARE_WRITE32_MEMBER(pnp_config_w); + DECLARE_WRITE32_MEMBER(pnp_data_w); + DECLARE_WRITE32_MEMBER(bios_ram_w); + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); }; #if !ENABLE_VGA @@ -262,7 +269,7 @@ static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int functi } // ISA Plug-n-Play -static WRITE32_HANDLER( pnp_config_w ) +WRITE32_MEMBER(taitowlf_state::pnp_config_w) { if (ACCESSING_BITS_8_15) { @@ -270,7 +277,7 @@ static WRITE32_HANDLER( pnp_config_w ) } } -static WRITE32_HANDLER( pnp_data_w ) +WRITE32_MEMBER(taitowlf_state::pnp_data_w) { if (ACCESSING_BITS_8_15) { @@ -303,12 +310,11 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) -static WRITE32_HANDLER(bios_ram_w) +WRITE32_MEMBER(taitowlf_state::bios_ram_w) { - taitowlf_state *state = space->machine().driver_data<taitowlf_state>(); - if (state->m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled + if (m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled { - COMBINE_DATA(state->m_bios_ram + offset); + COMBINE_DATA(m_bios_ram + offset); } } @@ -321,48 +327,46 @@ static WRITE32_HANDLER(bios_ram_w) -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(taitowlf_state::at_page8_r) { - taitowlf_state *state = space->machine().driver_data<taitowlf_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(taitowlf_state::at_page8_w) { - taitowlf_state *state = space->machine().driver_data<taitowlf_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } @@ -377,23 +381,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(taitowlf_state::pc_dma_read_byte) { - taitowlf_state *state = space->machine().driver_data<taitowlf_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(taitowlf_state::pc_dma_write_byte) { - taitowlf_state *state = space->machine().driver_data<taitowlf_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } @@ -425,8 +427,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(taitowlf_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(taitowlf_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -443,18 +445,6 @@ static I8237_INTERFACE( dma8237_2_config ) { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL } }; -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} - - /*****************************************************************************/ static ADDRESS_MAP_START( taitowlf_map, AS_PROGRAM, 32, taitowlf_state ) @@ -467,7 +457,7 @@ static ADDRESS_MAP_START( taitowlf_map, AS_PROGRAM, 32, taitowlf_state ) #endif AM_RANGE(0x000e0000, 0x000effff) AM_RAM AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1") - AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE_LEGACY(bios_ram_w) + AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w) AM_RANGE(0x00100000, 0x01ffffff) AM_RAM AM_RANGE(0xfffc0000, 0xffffffff) AM_ROM AM_REGION("user1", 0) /* System BIOS */ ADDRESS_MAP_END @@ -478,16 +468,16 @@ static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state ) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w) AM_RANGE(0x0300, 0x03af) AM_NOP AM_RANGE(0x03b0, 0x03df) AM_NOP - AM_RANGE(0x0278, 0x027b) AM_WRITE_LEGACY(pnp_config_w) + AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w) AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w) - AM_RANGE(0x0a78, 0x0a7b) AM_WRITE_LEGACY(pnp_data_w) + AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w) AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w) ADDRESS_MAP_END diff --git a/src/mame/drivers/viper.c b/src/mame/drivers/viper.c index 63866f8a539..f59e6c71b8c 100644 --- a/src/mame/drivers/viper.c +++ b/src/mame/drivers/viper.c @@ -322,6 +322,23 @@ public: int m_unk1_bit; UINT32 m_voodoo3_pci_reg[0x100]; + DECLARE_READ32_MEMBER(epic_r); + DECLARE_WRITE32_MEMBER(epic_w); + DECLARE_WRITE64_MEMBER(unk2_w); + DECLARE_READ64_MEMBER(voodoo3_io_r); + DECLARE_WRITE64_MEMBER(voodoo3_io_w); + DECLARE_READ64_MEMBER(voodoo3_r); + DECLARE_WRITE64_MEMBER(voodoo3_w); + DECLARE_READ64_MEMBER(voodoo3_lfb_r); + DECLARE_WRITE64_MEMBER(voodoo3_lfb_w); + DECLARE_READ64_MEMBER(unk1_r); + DECLARE_READ64_MEMBER(e70000_r); + DECLARE_WRITE64_MEMBER(e70000_w); + DECLARE_WRITE64_MEMBER(unk1a_w); + DECLARE_WRITE64_MEMBER(unk1b_w); + DECLARE_READ64_MEMBER(e00008_r); + DECLARE_WRITE64_MEMBER(e00008_w); + DECLARE_READ64_MEMBER(e00000_r); }; UINT32 m_mpc8240_regs[256/4]; @@ -641,7 +658,7 @@ static void epic_update_interrupts(running_machine &machine) } } -static READ32_HANDLER( epic_r ) +READ32_MEMBER(viper_state::epic_r) { int reg; reg = offset * 4; @@ -651,11 +668,11 @@ static READ32_HANDLER( epic_r ) const char *regname = epic_get_register_name(reg); if (regname) { - printf("EPIC: read %08X (%s) at %08X\n", reg, regname, cpu_get_pc(&space->device())); + printf("EPIC: read %08X (%s) at %08X\n", reg, regname, cpu_get_pc(&space.device())); } else { - printf("EPIC: read %08X at %08X\n", reg, cpu_get_pc(&space->device())); + printf("EPIC: read %08X at %08X\n", reg, cpu_get_pc(&space.device())); } } @@ -699,7 +716,7 @@ static READ32_HANDLER( epic_r ) if (epic.i2c_cr & 0x40) { printf("I2C interrupt\n"); - mpc8240_interrupt(space->machine(), MPC8240_I2C_IRQ); + mpc8240_interrupt(machine(), MPC8240_I2C_IRQ); // set interrupt flag in status register epic.i2c_sr |= 0x2; @@ -718,7 +735,7 @@ static READ32_HANDLER( epic_r ) /*if (epic.i2c_cr & 0x40) { printf("I2C interrupt\n"); - mpc8240_interrupt(space->machine, MPC8240_I2C_IRQ); + mpc8240_interrupt(machine, MPC8240_I2C_IRQ); // set interrupt flag in status register epic.i2c_sr |= 0x2; @@ -805,7 +822,7 @@ static READ32_HANDLER( epic_r ) { case 0x00a0: // Offset 0x600A0 - IACK { - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); if (epic.active_irq >= 0) { @@ -826,7 +843,7 @@ static READ32_HANDLER( epic_r ) return 0; } -static WRITE32_HANDLER( epic_w ) +WRITE32_MEMBER(viper_state::epic_w) { int reg; reg = offset * 4; @@ -836,11 +853,11 @@ static WRITE32_HANDLER( epic_w ) const char *regname = epic_get_register_name(reg); if (regname) { - printf("EPIC: write %08X, %08X (%s) at %08X\n", data, reg, regname, cpu_get_pc(&space->device())); + printf("EPIC: write %08X, %08X (%s) at %08X\n", data, reg, regname, cpu_get_pc(&space.device())); } else { - printf("EPIC: write %08X, %08X at %08X\n", data, reg, cpu_get_pc(&space->device())); + printf("EPIC: write %08X, %08X at %08X\n", data, reg, cpu_get_pc(&space.device())); } } @@ -898,7 +915,7 @@ static WRITE32_HANDLER( epic_w ) if (epic.i2c_cr & 0x40) { printf("I2C interrupt\n"); - mpc8240_interrupt(space->machine(), MPC8240_I2C_IRQ); + mpc8240_interrupt(machine(), MPC8240_I2C_IRQ); // set interrupt flag in status register epic.i2c_sr |= 0x2; @@ -916,7 +933,7 @@ static WRITE32_HANDLER( epic_w ) if (epic.i2c_cr & 0x40) { printf("I2C interrupt\n"); - mpc8240_interrupt(space->machine(), MPC8240_I2C_IRQ); + mpc8240_interrupt(machine(), MPC8240_I2C_IRQ); // set interrupt flag in status register epic.i2c_sr |= 0x2; @@ -957,7 +974,7 @@ static WRITE32_HANDLER( epic_w ) epic.irq[MPC8240_GTIMER0_IRQ + timer_num].priority = (data >> 16) & 0xf; epic.irq[MPC8240_GTIMER0_IRQ + timer_num].vector = data & 0xff; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } case 0x1130: // Offset 0x41130 - Global timer 0 destination register @@ -969,7 +986,7 @@ static WRITE32_HANDLER( epic_w ) epic.irq[MPC8240_GTIMER0_IRQ + timer_num].destination = data & 0x1; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } case 0x1110: // Offset 0x41110 - Global timer 0 base count register @@ -1029,7 +1046,7 @@ static WRITE32_HANDLER( epic_w ) epic.irq[MPC8240_IRQ0 + irq].priority = (data >> 16) & 0xf; epic.irq[MPC8240_IRQ0 + irq].vector = data & 0xff; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } case 0x1020: // Offset 0x51020 - I2C IRQ vector/priority register @@ -1038,7 +1055,7 @@ static WRITE32_HANDLER( epic_w ) epic.irq[MPC8240_I2C_IRQ].priority = (data >> 16) & 0xf; epic.irq[MPC8240_I2C_IRQ].vector = data & 0xff; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } case 0x0210: // Offset 0x50210 - IRQ0 destination register @@ -1062,13 +1079,13 @@ static WRITE32_HANDLER( epic_w ) epic.irq[MPC8240_IRQ0 + irq].destination = data & 0x1; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } case 0x1030: // Offset 0x51030 - I2C IRQ destination register { epic.irq[MPC8240_I2C_IRQ].destination = data & 0x1; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } } @@ -1088,23 +1105,23 @@ static WRITE32_HANDLER( epic_w ) epic.irq[epic.active_irq].active = 0; epic.active_irq = -1; - epic_update_interrupts(space->machine()); + epic_update_interrupts(machine()); break; } break; } } } - -static READ64_HANDLER(epic_64be_r) +/* +READ64_MEMBER(viper_state::epic_64be_r) { - return read64be_with_32le_handler(epic_r, space, offset, mem_mask); + return read64be_with_32le_handler(epic_r, &space, offset, mem_mask); } -static WRITE64_HANDLER(epic_64be_w) +WRITE64_MEMBER(viper_state::epic_64be_w) { - write64be_with_32le_handler(epic_w, space, offset, data, mem_mask); + write64be_with_32le_handler(epic_w, &space, offset, data, mem_mask); } - +*/ static void mpc8240_interrupt(running_machine &machine, int irq) { @@ -1341,13 +1358,12 @@ static WRITE64_DEVICE_HANDLER(cf_card_w) } } -static WRITE64_HANDLER(unk2_w) +WRITE64_MEMBER(viper_state::unk2_w) { - viper_state *state = space->machine().driver_data<viper_state>(); if (ACCESSING_BITS_56_63) { - state->m_cf_card_ide = 0; + m_cf_card_ide = 0; } } @@ -1488,42 +1504,42 @@ static void voodoo3_pci_w(device_t *busdevice, device_t *device, int function, i } } -static READ64_HANDLER(voodoo3_io_r) +READ64_MEMBER(viper_state::voodoo3_io_r) { - device_t *device = space->machine().device("voodoo"); + device_t *device = machine().device("voodoo"); return read64be_with_32le_device_handler(banshee_io_r, device, offset, mem_mask); } -static WRITE64_HANDLER(voodoo3_io_w) +WRITE64_MEMBER(viper_state::voodoo3_io_w) { -// printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space->device())); +// printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space.device())); - device_t *device = space->machine().device("voodoo"); + device_t *device = machine().device("voodoo"); write64be_with_32le_device_handler(banshee_io_w, device, offset, data, mem_mask); } -static READ64_HANDLER(voodoo3_r) +READ64_MEMBER(viper_state::voodoo3_r) { - device_t *device = space->machine().device("voodoo"); + device_t *device = machine().device("voodoo"); return read64be_with_32le_device_handler(banshee_r, device, offset, mem_mask); } -static WRITE64_HANDLER(voodoo3_w) +WRITE64_MEMBER(viper_state::voodoo3_w) { -// printf("voodoo3_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space->device())); +// printf("voodoo3_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space.device())); - device_t *device = space->machine().device("voodoo"); + device_t *device = machine().device("voodoo"); write64be_with_32le_device_handler(banshee_w, device, offset, data, mem_mask); } -static READ64_HANDLER(voodoo3_lfb_r) +READ64_MEMBER(viper_state::voodoo3_lfb_r) { - device_t *device = space->machine().device("voodoo"); + device_t *device = machine().device("voodoo"); return read64be_with_32le_device_handler(banshee_fb_r, device, offset, mem_mask); } -static WRITE64_HANDLER(voodoo3_lfb_w) +WRITE64_MEMBER(viper_state::voodoo3_lfb_w) { -// printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space->device())); +// printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space.device())); - device_t *device = space->machine().device("voodoo"); + device_t *device = machine().device("voodoo"); write64be_with_32le_device_handler(banshee_fb_w, device, offset, data, mem_mask); } @@ -1563,7 +1579,7 @@ static TIMER_CALLBACK(ds2430_timer_callback) } } -static READ64_HANDLER(unk1_r) +READ64_MEMBER(viper_state::unk1_r) { UINT64 r = 0; //return 0;//U64(0x0000400000000000); @@ -1588,12 +1604,12 @@ static READ64_HANDLER(unk1_r) } if (ACCESSING_BITS_32_39) { - UINT64 reg = input_port_read(space->machine(), "IN0"); + UINT64 reg = input_port_read(machine(), "IN0"); r |= reg << 32; } if (ACCESSING_BITS_24_31) { - UINT64 reg = input_port_read(space->machine(), "IN1"); + UINT64 reg = input_port_read(machine(), "IN1"); r |= reg << 24; } if (ACCESSING_BITS_16_23) @@ -1711,20 +1727,20 @@ static void DS2430_w(int bit) } -static READ64_HANDLER(e70000_r) +READ64_MEMBER(viper_state::e70000_r) { if (ACCESSING_BITS_56_63) { ds2430_bit_timer->reset(); ds2430_bit_timer->start_time(); -// printf("e70000_r: %08X (mask %08X%08X) at %08X\n", offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(space->cpu)); +// printf("e70000_r: %08X (mask %08X%08X) at %08X\n", offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(cpu)); } return 0; } -static WRITE64_HANDLER(e70000_w) +WRITE64_MEMBER(viper_state::e70000_w) { if (ACCESSING_BITS_56_63) { @@ -1733,7 +1749,7 @@ static WRITE64_HANDLER(e70000_w) ds2430_timer->adjust(attotime::from_usec(40), 1); // presence pulse for 240 microsecs unk1_bit = 1; -// printf("e70000_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(&space->device())); +// printf("e70000_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(&space.device())); } else { @@ -1754,26 +1770,26 @@ static WRITE64_HANDLER(e70000_w) } } -static WRITE64_HANDLER(unk1a_w) +WRITE64_MEMBER(viper_state::unk1a_w) { if (ACCESSING_BITS_56_63) { - // printf("unk1a_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(space->cpu)); + // printf("unk1a_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(cpu)); } } -static WRITE64_HANDLER(unk1b_w) +WRITE64_MEMBER(viper_state::unk1b_w) { if (ACCESSING_BITS_56_63) { unk1_bit = 0; - // printf("unk1b_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(space->cpu)); + // printf("unk1b_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(cpu)); } } static UINT64 e00008_data; -static READ64_HANDLER(e00008_r) +READ64_MEMBER(viper_state::e00008_r) { UINT64 r = 0; if (ACCESSING_BITS_0_7) @@ -1784,7 +1800,7 @@ static READ64_HANDLER(e00008_r) return r; } -static WRITE64_HANDLER(e00008_w) +WRITE64_MEMBER(viper_state::e00008_w) { if (ACCESSING_BITS_0_7) { @@ -1792,7 +1808,7 @@ static WRITE64_HANDLER(e00008_w) } } -static READ64_HANDLER(e00000_r) +READ64_MEMBER(viper_state::e00000_r) { UINT64 r = 0;//U64(0xffffffffffffffff); return r; @@ -1804,24 +1820,24 @@ static READ64_HANDLER(e00000_r) static ADDRESS_MAP_START(viper_map, AS_PROGRAM, 64, viper_state ) AM_RANGE(0x00000000, 0x00ffffff) AM_MIRROR(0x1000000) AM_RAM - AM_RANGE(0x80000000, 0x800fffff) AM_READWRITE_LEGACY(epic_64be_r, epic_64be_w) - AM_RANGE(0x82000000, 0x83ffffff) AM_READWRITE_LEGACY(voodoo3_r, voodoo3_w) - AM_RANGE(0x84000000, 0x85ffffff) AM_READWRITE_LEGACY(voodoo3_lfb_r, voodoo3_lfb_w) - AM_RANGE(0xfe800000, 0xfe8000ff) AM_READWRITE_LEGACY(voodoo3_io_r, voodoo3_io_w) + AM_RANGE(0x80000000, 0x800fffff) AM_READWRITE32(epic_r, epic_w,0xffffffffffffffff) + AM_RANGE(0x82000000, 0x83ffffff) AM_READWRITE(voodoo3_r, voodoo3_w) + AM_RANGE(0x84000000, 0x85ffffff) AM_READWRITE(voodoo3_lfb_r, voodoo3_lfb_w) + AM_RANGE(0xfe800000, 0xfe8000ff) AM_READWRITE(voodoo3_io_r, voodoo3_io_w) AM_RANGE(0xfec00000, 0xfedfffff) AM_DEVREADWRITE_LEGACY("pcibus", pci_config_addr_r, pci_config_addr_w) AM_RANGE(0xfee00000, 0xfeefffff) AM_DEVREADWRITE_LEGACY("pcibus", pci_config_data_r, pci_config_data_w) // 0xff000000, 0xff000fff - cf_card_data_r/w (installed in DRIVER_INIT(vipercf)) // 0xff200000, 0xff200fff - cf_card_r/w (installed in DRIVER_INIT(vipercf)) AM_RANGE(0xff300000, 0xff300fff) AM_DEVREADWRITE_LEGACY("ide", ata_r, ata_w) - AM_RANGE(0xffe00000, 0xffe00007) AM_READ_LEGACY(e00000_r) - AM_RANGE(0xffe00008, 0xffe0000f) AM_READWRITE_LEGACY(e00008_r, e00008_w) - AM_RANGE(0xffe10000, 0xffe10007) AM_READ_LEGACY(unk1_r) + AM_RANGE(0xffe00000, 0xffe00007) AM_READ(e00000_r) + AM_RANGE(0xffe00008, 0xffe0000f) AM_READWRITE(e00008_r, e00008_w) + AM_RANGE(0xffe10000, 0xffe10007) AM_READ(unk1_r) AM_RANGE(0xffe30000, 0xffe31fff) AM_DEVREADWRITE8_LEGACY("m48t58", timekeeper_r, timekeeper_w, U64(0xffffffffffffffff)) AM_RANGE(0xffe40000, 0xffe4000f) AM_NOP - AM_RANGE(0xffe50000, 0xffe50007) AM_WRITE_LEGACY(unk2_w) - AM_RANGE(0xffe70000, 0xffe7000f) AM_READWRITE_LEGACY(e70000_r, e70000_w) - AM_RANGE(0xffe80000, 0xffe80007) AM_WRITE_LEGACY(unk1a_w) - AM_RANGE(0xffe88000, 0xffe88007) AM_WRITE_LEGACY(unk1b_w) + AM_RANGE(0xffe50000, 0xffe50007) AM_WRITE(unk2_w) + AM_RANGE(0xffe70000, 0xffe7000f) AM_READWRITE(e70000_r, e70000_w) + AM_RANGE(0xffe80000, 0xffe80007) AM_WRITE(unk1a_w) + AM_RANGE(0xffe88000, 0xffe88007) AM_WRITE(unk1b_w) AM_RANGE(0xffe9a000, 0xffe9bfff) AM_RAM // World Combat uses this AM_RANGE(0xfff00000, 0xfff3ffff) AM_ROM AM_REGION("user1", 0) // Boot ROM ADDRESS_MAP_END diff --git a/src/mame/drivers/wardner.c b/src/mame/drivers/wardner.c index 95f9c78def4..1fdf3951e05 100644 --- a/src/mame/drivers/wardner.c +++ b/src/mame/drivers/wardner.c @@ -140,20 +140,20 @@ public: UINT8 *m_rambase_ae00; UINT8 *m_rambase_c000; + DECLARE_WRITE8_MEMBER(wardner_ramrom_bank_sw); }; -static WRITE8_HANDLER( wardner_ramrom_bank_sw ) +WRITE8_MEMBER(wardner_state::wardner_ramrom_bank_sw) { - wardner_state *state = space->machine().driver_data<wardner_state>(); - if (state->m_wardner_membank != data) { + if (m_wardner_membank != data) { int bankaddress = 0; address_space *mainspace; - UINT8 *RAM = space->machine().region("maincpu")->base(); + UINT8 *RAM = machine().region("maincpu")->base(); - mainspace = space->machine().device("maincpu")->memory().space(AS_PROGRAM); - state->m_wardner_membank = data; + mainspace = machine().device("maincpu")->memory().space(AS_PROGRAM); + m_wardner_membank = data; if (data) { @@ -169,18 +169,18 @@ static WRITE8_HANDLER( wardner_ramrom_bank_sw ) case 6: bankaddress = 0x30000; break; /* not used */ default: bankaddress = 0x00000; break; /* not used */ } - memory_set_bankptr(space->machine(), "bank1",&RAM[bankaddress]); + memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]); } else { - mainspace->install_read_handler(0x8000, 0x8fff, read8_delegate(FUNC(wardner_state::wardner_sprite_r),state)); + mainspace->install_read_handler(0x8000, 0x8fff, read8_delegate(FUNC(wardner_state::wardner_sprite_r),this)); mainspace->install_read_bank(0xa000, 0xadff, "bank4"); mainspace->install_read_bank(0xae00, 0xafff, "bank2"); mainspace->install_read_bank(0xc000, 0xc7ff, "bank3"); - memory_set_bankptr(space->machine(), "bank1", &RAM[0x0000]); - memory_set_bankptr(space->machine(), "bank2", state->m_rambase_ae00); - memory_set_bankptr(space->machine(), "bank3", state->m_rambase_c000); - memory_set_bankptr(space->machine(), "bank4", state->m_generic_paletteram_8); + memory_set_bankptr(machine(), "bank1", &RAM[0x0000]); + memory_set_bankptr(machine(), "bank2", m_rambase_ae00); + memory_set_bankptr(machine(), "bank3", m_rambase_c000); + memory_set_bankptr(machine(), "bank4", m_generic_paletteram_8); } } } @@ -190,8 +190,8 @@ void wardner_restore_bank(running_machine &machine) wardner_state *state = machine.driver_data<wardner_state>(); address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM); - wardner_ramrom_bank_sw(space,0,1); /* Dummy value to ensure restoration */ - wardner_ramrom_bank_sw(space,0,state->m_wardner_membank); + state->wardner_ramrom_bank_sw(*space,0,1); /* Dummy value to ensure restoration */ + state->wardner_ramrom_bank_sw(*space,0,state->m_wardner_membank); } @@ -231,7 +231,7 @@ static ADDRESS_MAP_START( main_io_map, AS_IO, 8, wardner_state ) AM_RANGE(0x5a, 0x5a) AM_WRITE(wardner_coin_dsp_w) /* Machine system control */ AM_RANGE(0x5c, 0x5c) AM_WRITE(wardner_control_w) /* Machine system control */ AM_RANGE(0x60, 0x65) AM_READWRITE(wardner_videoram_r, wardner_videoram_w) /* data from video layer RAM */ - AM_RANGE(0x70, 0x70) AM_WRITE_LEGACY(wardner_ramrom_bank_sw) /* ROM bank select */ + AM_RANGE(0x70, 0x70) AM_WRITE(wardner_ramrom_bank_sw) /* ROM bank select */ ADDRESS_MAP_END diff --git a/src/mame/drivers/xtom3d.c b/src/mame/drivers/xtom3d.c index 83feb80b7bb..a4eb7cfc7c0 100644 --- a/src/mame/drivers/xtom3d.c +++ b/src/mame/drivers/xtom3d.c @@ -99,6 +99,10 @@ public: DECLARE_WRITE32_MEMBER( bios_ext4_ram_w ); DECLARE_WRITE32_MEMBER( bios_ram_w ); + DECLARE_READ8_MEMBER(at_page8_r); + DECLARE_WRITE8_MEMBER(at_page8_w); + DECLARE_READ8_MEMBER(pc_dma_read_byte); + DECLARE_WRITE8_MEMBER(pc_dma_write_byte); }; // Intel 82439TX System Controller (MXTC) @@ -389,60 +393,48 @@ static WRITE32_DEVICE_HANDLER( fdc_w ) ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask); } -static READ8_HANDLER(at_page8_r) +READ8_MEMBER(xtom3d_state::at_page8_r) { - xtom3d_state *state = space->machine().driver_data<xtom3d_state>(); - UINT8 data = state->m_at_pages[offset % 0x10]; + UINT8 data = m_at_pages[offset % 0x10]; switch(offset % 8) { case 1: - data = state->m_dma_offset[(offset / 8) & 1][2]; + data = m_dma_offset[(offset / 8) & 1][2]; break; case 2: - data = state->m_dma_offset[(offset / 8) & 1][3]; + data = m_dma_offset[(offset / 8) & 1][3]; break; case 3: - data = state->m_dma_offset[(offset / 8) & 1][1]; + data = m_dma_offset[(offset / 8) & 1][1]; break; case 7: - data = state->m_dma_offset[(offset / 8) & 1][0]; + data = m_dma_offset[(offset / 8) & 1][0]; break; } return data; } -static WRITE8_HANDLER(at_page8_w) +WRITE8_MEMBER(xtom3d_state::at_page8_w) { - xtom3d_state *state = space->machine().driver_data<xtom3d_state>(); - state->m_at_pages[offset % 0x10] = data; + m_at_pages[offset % 0x10] = data; switch(offset % 8) { case 1: - state->m_dma_offset[(offset / 8) & 1][2] = data; + m_dma_offset[(offset / 8) & 1][2] = data; break; case 2: - state->m_dma_offset[(offset / 8) & 1][3] = data; + m_dma_offset[(offset / 8) & 1][3] = data; break; case 3: - state->m_dma_offset[(offset / 8) & 1][1] = data; + m_dma_offset[(offset / 8) & 1][1] = data; break; case 7: - state->m_dma_offset[(offset / 8) & 1][0] = data; + m_dma_offset[(offset / 8) & 1][0] = data; break; } } -static READ32_HANDLER(at_page32_r) -{ - return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask); -} - - -static WRITE32_HANDLER(at_page32_w) -{ - write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask); -} static READ8_DEVICE_HANDLER(at_dma8237_2_r) { @@ -476,23 +468,21 @@ static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed ) } -static READ8_HANDLER( pc_dma_read_byte ) +READ8_MEMBER(xtom3d_state::pc_dma_read_byte) { - xtom3d_state *state = space->machine().driver_data<xtom3d_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - return space->read_byte(page_offset + offset); + return space.read_byte(page_offset + offset); } -static WRITE8_HANDLER( pc_dma_write_byte ) +WRITE8_MEMBER(xtom3d_state::pc_dma_write_byte) { - xtom3d_state *state = space->machine().driver_data<xtom3d_state>(); - offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16) + offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16) & 0xFF0000; - space->write_byte(page_offset + offset, data); + space.write_byte(page_offset + offset, data); } static void set_dma_channel(device_t *device, int channel, int state) @@ -510,8 +500,8 @@ static I8237_INTERFACE( dma8237_1_config ) { DEVCB_LINE(pc_dma_hrq_changed), DEVCB_NULL, - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_read_byte), - DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, pc_dma_write_byte), + DEVCB_DRIVER_MEMBER(xtom3d_state, pc_dma_read_byte), + DEVCB_DRIVER_MEMBER(xtom3d_state, pc_dma_write_byte), { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }, { DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) } @@ -548,7 +538,7 @@ static ADDRESS_MAP_START(xtom3d_io, AS_IO, 32, xtom3d_state) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff) AM_RANGE(0x0060, 0x006f) AM_READWRITE_LEGACY(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/ - AM_RANGE(0x0080, 0x009f) AM_READWRITE_LEGACY(at_page32_r, at_page32_w) + AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00e8, 0x00ef) AM_NOP diff --git a/src/mame/drivers/zn.c b/src/mame/drivers/zn.c index afc12505a88..c8dace0e687 100644 --- a/src/mame/drivers/zn.c +++ b/src/mame/drivers/zn.c @@ -56,6 +56,42 @@ public: int m_cbaj_to_r3k; int m_latch_to_z80; DECLARE_CUSTOM_INPUT_MEMBER(jdredd_gun_mux_read); + DECLARE_READ32_MEMBER(znsecsel_r); + DECLARE_WRITE32_MEMBER(znsecsel_w); + DECLARE_READ32_MEMBER(boardconfig_r); + DECLARE_READ32_MEMBER(unknown_r); + DECLARE_WRITE32_MEMBER(coin_w); + DECLARE_READ32_MEMBER(capcom_kickharness_r); + DECLARE_WRITE32_MEMBER(bank_coh1000c_w); + DECLARE_WRITE8_MEMBER(qsound_bankswitch_w); + DECLARE_WRITE32_MEMBER(zn_qsound_w); + DECLARE_WRITE32_MEMBER(bank_coh3002c_w); + DECLARE_WRITE32_MEMBER(bank_coh1000t_w); + DECLARE_WRITE8_MEMBER(fx1a_sound_bankswitch_w); + DECLARE_READ32_MEMBER(taitofx1a_ymsound_r); + DECLARE_WRITE32_MEMBER(taitofx1a_ymsound_w); + DECLARE_WRITE32_MEMBER(taitofx1b_volume_w); + DECLARE_WRITE32_MEMBER(taitofx1b_sound_w); + DECLARE_READ32_MEMBER(taitofx1b_sound_r); + DECLARE_WRITE32_MEMBER(coh1002e_bank_w); + DECLARE_WRITE32_MEMBER(coh1002e_latch_w); + DECLARE_WRITE32_MEMBER(bam2_sec_w); + DECLARE_WRITE32_MEMBER(bam2_mcu_w); + DECLARE_READ32_MEMBER(bam2_mcu_r); + DECLARE_READ32_MEMBER(bam2_unk_r); + DECLARE_WRITE32_MEMBER(acpsx_00_w); + DECLARE_WRITE32_MEMBER(acpsx_10_w); + DECLARE_WRITE32_MEMBER(nbajamex_80_w); + DECLARE_READ32_MEMBER(nbajamex_08_r); + DECLARE_READ32_MEMBER(nbajamex_80_r); + DECLARE_WRITE32_MEMBER(coh1001l_bnk_w); + DECLARE_WRITE32_MEMBER(coh1002v_bnk_w); + DECLARE_WRITE32_MEMBER(coh1002m_bank_w); + DECLARE_READ32_MEMBER(cbaj_z80_r); + DECLARE_WRITE32_MEMBER(cbaj_z80_w); + DECLARE_READ8_MEMBER(cbaj_z80_latch_r); + DECLARE_WRITE8_MEMBER(cbaj_z80_latch_w); + DECLARE_READ8_MEMBER(cbaj_z80_ready_r); }; INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... ) @@ -238,12 +274,11 @@ static const struct { NULL, NULL, NULL } }; -static READ32_HANDLER( znsecsel_r ) +READ32_MEMBER(zn_state::znsecsel_r) { - zn_state *state = space->machine().driver_data<zn_state>(); - verboselog( space->machine(), 2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask ); - return state->m_n_znsecsel; + verboselog( machine(), 2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask ); + return m_n_znsecsel; } static void sio_znsec0_handler( running_machine &machine, int n_data ) @@ -321,41 +356,40 @@ static void sio_dip_handler( running_machine &machine, int n_data ) } } -static WRITE32_HANDLER( znsecsel_w ) +WRITE32_MEMBER(zn_state::znsecsel_w) { - zn_state *state = space->machine().driver_data<zn_state>(); - COMBINE_DATA( &state->m_n_znsecsel ); + COMBINE_DATA( &m_n_znsecsel ); - if( ( state->m_n_znsecsel & 0x80 ) == 0 ) + if( ( m_n_znsecsel & 0x80 ) == 0 ) { - psx_sio_install_handler( space->machine(), 0, sio_pad_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_pad_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); } - else if( ( state->m_n_znsecsel & 0x08 ) == 0 ) + else if( ( m_n_znsecsel & 0x08 ) == 0 ) { znsec_start( 1 ); - psx_sio_install_handler( space->machine(), 0, sio_znsec1_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_znsec1_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); } - else if( ( state->m_n_znsecsel & 0x04 ) == 0 ) + else if( ( m_n_znsecsel & 0x04 ) == 0 ) { znsec_start( 0 ); - psx_sio_install_handler( space->machine(), 0, sio_znsec0_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_znsec0_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); } else { - state->m_n_dip_bit = 0; - state->m_b_lastclock = 1; + m_n_dip_bit = 0; + m_b_lastclock = 1; - psx_sio_install_handler( space->machine(), 0, sio_dip_handler ); - psx_sio_input( space->machine(), 0, PSX_SIO_IN_DSR, 0 ); + psx_sio_install_handler( machine(), 0, sio_dip_handler ); + psx_sio_input( machine(), 0, PSX_SIO_IN_DSR, 0 ); - state->m_dip_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( 100 ), 1 ); + m_dip_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime( 100 ), 1 ); } - verboselog( space->machine(), 2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); } static TIMER_CALLBACK( dip_timer_fired ) @@ -369,7 +403,7 @@ static TIMER_CALLBACK( dip_timer_fired ) } } -static READ32_HANDLER( boardconfig_r ) +READ32_MEMBER(zn_state::boardconfig_r) { /* ------00 mem=4M @@ -390,7 +424,7 @@ static READ32_HANDLER( boardconfig_r ) 111----- rev=5 */ - if( space->machine().primary_screen->height() == 1024 ) + if( machine().primary_screen->height() == 1024 ) { return 64|32|8; } @@ -400,13 +434,13 @@ static READ32_HANDLER( boardconfig_r ) } } -static READ32_HANDLER( unknown_r ) +READ32_MEMBER(zn_state::unknown_r) { - verboselog( space->machine(), 0, "unknown_r( %08x, %08x )\n", offset, mem_mask ); + verboselog( machine(), 0, "unknown_r( %08x, %08x )\n", offset, mem_mask ); return 0xffffffff; } -static WRITE32_HANDLER( coin_w ) +WRITE32_MEMBER(zn_state::coin_w) { /* 0x01=counter 0x02=coin lock 1 @@ -416,7 +450,7 @@ static WRITE32_HANDLER( coin_w ) */ if( ( data & ~0x23 ) != 0 ) { - verboselog( space->machine(), 0, "coin_w %08x\n", data ); + verboselog( machine(), 0, "coin_w %08x\n", data ); } } @@ -429,14 +463,14 @@ static ADDRESS_MAP_START( zn_map, AS_PROGRAM, 32, zn_state ) AM_RANGE(0x1fa00300, 0x1fa00303) AM_READ_PORT("SYSTEM") AM_RANGE(0x1fa10000, 0x1fa10003) AM_READ_PORT("P3") AM_RANGE(0x1fa10100, 0x1fa10103) AM_READ_PORT("P4") - AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ_LEGACY(boardconfig_r) - AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE_LEGACY(znsecsel_r, znsecsel_w) - AM_RANGE(0x1fa20000, 0x1fa20003) AM_WRITE_LEGACY(coin_w) + AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ(boardconfig_r) + AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE(znsecsel_r, znsecsel_w) + AM_RANGE(0x1fa20000, 0x1fa20003) AM_WRITE(coin_w) AM_RANGE(0x1fa30000, 0x1fa30003) AM_NOP /* ?? */ AM_RANGE(0x1fa40000, 0x1fa40003) AM_READNOP /* ?? */ AM_RANGE(0x1fa60000, 0x1fa60003) AM_READNOP /* ?? */ AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xffffffff) /* eeprom */ - AM_RANGE(0x1fb20000, 0x1fb20007) AM_READ_LEGACY(unknown_r) + AM_RANGE(0x1fb20000, 0x1fb20007) AM_READ(unknown_r) AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */ AM_RANGE(0x80000000, 0x803fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ AM_RANGE(0x80400000, 0x807fffff) AM_RAM AM_SHARE("share1") /* ram mirror */ @@ -641,21 +675,21 @@ Notes: Unpopulated sockets - 1.3B, 2.2E, 3.3E, 8.2K, 9.3K, 10.4K, 11.5K, 12.6K & 13.7K */ -static READ32_HANDLER( capcom_kickharness_r ) +READ32_MEMBER(zn_state::capcom_kickharness_r) { /* required for buttons 4,5&6 */ - verboselog( space->machine(), 2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask ); + verboselog( machine(), 2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask ); return 0xffffffff; } -static WRITE32_HANDLER( bank_coh1000c_w ) +WRITE32_MEMBER(zn_state::bank_coh1000c_w) { - memory_set_bankptr( space->machine(), "bank2", space->machine().region( "user2" )->base() + 0x400000 + ( data * 0x400000 ) ); + memory_set_bankptr( machine(), "bank2", machine().region( "user2" )->base() + 0x400000 + ( data * 0x400000 ) ); } -static WRITE8_HANDLER( qsound_bankswitch_w ) +WRITE8_MEMBER(zn_state::qsound_bankswitch_w) { - memory_set_bankptr( space->machine(), "bank10", space->machine().region( "audiocpu" )->base() + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) ); + memory_set_bankptr( machine(), "bank10", machine().region( "audiocpu" )->base() + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) ); } static INTERRUPT_GEN( qsound_interrupt ) @@ -663,22 +697,22 @@ static INTERRUPT_GEN( qsound_interrupt ) device_set_input_line(device, 0, HOLD_LINE); } -static WRITE32_HANDLER( zn_qsound_w ) +WRITE32_MEMBER(zn_state::zn_qsound_w) { - zn_state *state = space->machine().driver_data<zn_state>(); - state->soundlatch_byte_w(*space, 0, data); - cputag_set_input_line(space->machine(), "audiocpu", INPUT_LINE_NMI, PULSE_LINE); + soundlatch_byte_w(*&space, 0, data); + cputag_set_input_line(machine(), "audiocpu", INPUT_LINE_NMI, PULSE_LINE); } static DRIVER_INIT( coh1000c ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f3fffff, "bank1" ); /* fixed game rom */ machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f400000, 0x1f7fffff, "bank2" ); /* banked game rom */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb00000, 0x1fb00003, FUNC(bank_coh1000c_w) ); /* bankswitch */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fb40010, 0x1fb40013, FUNC(capcom_kickharness_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fb40020, 0x1fb40023, FUNC(capcom_kickharness_r) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::bank_coh1000c_w),state)); /* bankswitch */ + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fb40010, 0x1fb40013, read32_delegate(FUNC(zn_state::capcom_kickharness_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fb40020, 0x1fb40023, read32_delegate(FUNC(zn_state::capcom_kickharness_r),state)); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1fb80000, 0x1fbfffff, "bank3" ); /* country rom */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb60000, 0x1fb60003, FUNC(zn_qsound_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb60000, 0x1fb60003, write32_delegate(FUNC(zn_state::zn_qsound_w),state)); zn_driver_init(machine); @@ -704,7 +738,7 @@ static ADDRESS_MAP_START( qsound_map, AS_PROGRAM, 8, zn_state ) AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank10") /* banked (contains music data) */ AM_RANGE(0xd000, 0xd002) AM_DEVWRITE_LEGACY("qsound", qsound_w) - AM_RANGE(0xd003, 0xd003) AM_WRITE_LEGACY(qsound_bankswitch_w) + AM_RANGE(0xd003, 0xd003) AM_WRITE(qsound_bankswitch_w) AM_RANGE(0xd007, 0xd007) AM_DEVREAD_LEGACY("qsound", qsound_r) AM_RANGE(0xf000, 0xffff) AM_RAM ADDRESS_MAP_END @@ -882,20 +916,21 @@ Notes: Unpopulated sockets on Rival Schools - None */ -static WRITE32_HANDLER( bank_coh3002c_w ) +WRITE32_MEMBER(zn_state::bank_coh3002c_w) { - memory_set_bankptr( space->machine(), "bank2", space->machine().region( "user2" )->base() + 0x400000 + ( data * 0x400000 ) ); + memory_set_bankptr( machine(), "bank2", machine().region( "user2" )->base() + 0x400000 + ( data * 0x400000 ) ); } static DRIVER_INIT( coh3002c ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f3fffff, "bank1" ); /* fixed game rom */ machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f400000, 0x1f7fffff, "bank2" ); /* banked game rom */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fb40010, 0x1fb40013, FUNC(capcom_kickharness_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fb40020, 0x1fb40023, FUNC(capcom_kickharness_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb00000, 0x1fb00003, FUNC(bank_coh3002c_w) ); /* bankswitch */ + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fb40010, 0x1fb40013, read32_delegate(FUNC(zn_state::capcom_kickharness_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fb40020, 0x1fb40023, read32_delegate(FUNC(zn_state::capcom_kickharness_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::bank_coh3002c_w),state)); /* bankswitch */ machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1fb80000, 0x1fbfffff, "bank3" ); /* country rom */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb60000, 0x1fb60003, FUNC(zn_qsound_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb60000, 0x1fb60003, write32_delegate(FUNC(zn_state::zn_qsound_w),state)); zn_driver_init(machine); } @@ -1140,28 +1175,28 @@ Notes: FM1208S - RAMTRON 4096bit Nonvolatile Ferroelectric RAM (512w x 8b) */ -static WRITE32_HANDLER( bank_coh1000t_w ) +WRITE32_MEMBER(zn_state::bank_coh1000t_w) { - device_t *mb3773 = space->machine().device("mb3773"); + device_t *mb3773 = machine().device("mb3773"); mb3773_set_ck(mb3773, (data & 0x20) >> 5); - verboselog( space->machine(), 1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - memory_set_bankptr( space->machine(), "bank1", space->machine().region( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) ); + verboselog( machine(), 1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) ); } -static WRITE8_HANDLER( fx1a_sound_bankswitch_w ) +WRITE8_MEMBER(zn_state::fx1a_sound_bankswitch_w) { - memory_set_bankptr( space->machine(), "bank10", space->machine().region( "audiocpu" )->base() + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) ); + memory_set_bankptr( machine(), "bank10", machine().region( "audiocpu" )->base() + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) ); } -static READ32_HANDLER( taitofx1a_ymsound_r ) +READ32_MEMBER(zn_state::taitofx1a_ymsound_r) { - device_t *tc0140syt = space->machine().device("tc0140syt"); + device_t *tc0140syt = machine().device("tc0140syt"); return tc0140syt_comm_r(tc0140syt, 0) << 16; } -static WRITE32_HANDLER( taitofx1a_ymsound_w ) +WRITE32_MEMBER(zn_state::taitofx1a_ymsound_w) { - device_t *tc0140syt = space->machine().device("tc0140syt"); + device_t *tc0140syt = machine().device("tc0140syt"); if (mem_mask == 0x0000ffff) { @@ -1180,8 +1215,8 @@ static DRIVER_INIT( coh1000ta ) machine.device<nvram_device>("eeprom1")->set_base(state->m_taitofx1_eeprom1, state->m_taitofx1_eeprom_size1); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); /* banked game rom */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler ( 0x1fb40000, 0x1fb40003, FUNC(bank_coh1000t_w) ); /* bankswitch */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1fb80000, 0x1fb80003, FUNC(taitofx1a_ymsound_r), FUNC(taitofx1a_ymsound_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler ( 0x1fb40000, 0x1fb40003, write32_delegate(FUNC(zn_state::bank_coh1000t_w),state)); /* bankswitch */ + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1fb80000, 0x1fb80003, read32_delegate(FUNC(zn_state::taitofx1a_ymsound_r),state), write32_delegate(FUNC(zn_state::taitofx1a_ymsound_w),state)); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank( 0x1fbe0000, 0x1fbe0000 + ( state->m_taitofx1_eeprom_size1 - 1 ), "bank2" ); zn_driver_init(machine); @@ -1205,7 +1240,7 @@ static ADDRESS_MAP_START( fx1a_sound_map, AS_PROGRAM, 8, zn_state ) AM_RANGE(0xe400, 0xe403) AM_WRITENOP /* pan */ AM_RANGE(0xee00, 0xee00) AM_NOP /* ? */ AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */ - AM_RANGE(0xf200, 0xf200) AM_WRITE_LEGACY(fx1a_sound_bankswitch_w) + AM_RANGE(0xf200, 0xf200) AM_WRITE(fx1a_sound_bankswitch_w) ADDRESS_MAP_END /* handler called by the YM2610 emulator when the internal timers cause an IRQ */ @@ -1243,20 +1278,20 @@ static MACHINE_CONFIG_DERIVED( coh1000ta, zn1_1mb_vram ) MCFG_TC0140SYT_ADD("tc0140syt", coh1000ta_tc0140syt_intf) MACHINE_CONFIG_END -static WRITE32_HANDLER( taitofx1b_volume_w ) +WRITE32_MEMBER(zn_state::taitofx1b_volume_w) { - verboselog( space->machine(), 1, "taitofx1_volume_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "taitofx1_volume_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); } -static WRITE32_HANDLER( taitofx1b_sound_w ) +WRITE32_MEMBER(zn_state::taitofx1b_sound_w) { - verboselog( space->machine(), 1, "taitofx1_sound_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "taitofx1_sound_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); } -static READ32_HANDLER( taitofx1b_sound_r ) +READ32_MEMBER(zn_state::taitofx1b_sound_r) { UINT32 data = 0; // bit 0 = busy? - verboselog( space->machine(), 1, "taitofx1_sound_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 1, "taitofx1_sound_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } @@ -1272,10 +1307,10 @@ static DRIVER_INIT( coh1000tb ) machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); /* banked game rom */ machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank( 0x1fb00000, 0x1fb00000 + ( state->m_taitofx1_eeprom_size1 - 1 ), "bank2" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler ( 0x1fb40000, 0x1fb40003, FUNC(bank_coh1000t_w) ); /* bankswitch */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler ( 0x1fb80000, 0x1fb8ffff, FUNC(taitofx1b_volume_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler ( 0x1fba0000, 0x1fbaffff, FUNC(taitofx1b_sound_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fbc0000, 0x1fbc0003, FUNC(taitofx1b_sound_r) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler ( 0x1fb40000, 0x1fb40003, write32_delegate(FUNC(zn_state::bank_coh1000t_w),state)); /* bankswitch */ + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler ( 0x1fb80000, 0x1fb8ffff, write32_delegate(FUNC(zn_state::taitofx1b_volume_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler ( 0x1fba0000, 0x1fbaffff, write32_delegate(FUNC(zn_state::taitofx1b_sound_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fbc0000, 0x1fbc0003, read32_delegate(FUNC(zn_state::taitofx1b_sound_r),state)); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank( 0x1fbe0000, 0x1fbe0000 + ( state->m_taitofx1_eeprom_size2 - 1 ), "bank3" ); zn_driver_init(machine); @@ -1631,27 +1666,27 @@ Notes: */ -static WRITE32_HANDLER( coh1002e_bank_w ) +WRITE32_MEMBER(zn_state::coh1002e_bank_w) { znsecsel_w( space, offset, data, mem_mask ); - memory_set_bankptr( space->machine(), "bank1", space->machine().region( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) ); + memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) ); } -static WRITE32_HANDLER( coh1002e_latch_w ) +WRITE32_MEMBER(zn_state::coh1002e_latch_w) { - zn_state *state = space->machine().driver_data<zn_state>(); if (offset) - cputag_set_input_line(space->machine(), "audiocpu", 2, HOLD_LINE); // irq 2 on the 68k + cputag_set_input_line(machine(), "audiocpu", 2, HOLD_LINE); // irq 2 on the 68k else - state->soundlatch_byte_w(*space, 0, data); + soundlatch_byte_w(*&space, 0, data); } static DRIVER_INIT( coh1002e ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fa10300, 0x1fa10303, FUNC(coh1002e_bank_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb00000, 0x1fb00007, FUNC(coh1002e_latch_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fa10300, 0x1fa10303, write32_delegate(FUNC(zn_state::coh1002e_bank_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb00000, 0x1fb00007, write32_delegate(FUNC(zn_state::coh1002e_latch_w),state)); zn_driver_init(machine); } @@ -1721,7 +1756,7 @@ MTR-BAM* - DIP42 32MBit maskROMs */ -static WRITE32_HANDLER( bam2_sec_w ) +WRITE32_MEMBER(zn_state::bam2_sec_w) { znsecsel_w( space, offset, data, mem_mask ); } @@ -1742,38 +1777,36 @@ static WRITE32_HANDLER( bam2_sec_w ) */ -static WRITE32_HANDLER( bam2_mcu_w ) +WRITE32_MEMBER(zn_state::bam2_mcu_w) { - zn_state *state = space->machine().driver_data<zn_state>(); if (offset == 0) { if (ACCESSING_BITS_0_15) { - memory_set_bankptr( space->machine(), "bank2", space->machine().region( "user2" )->base() + ( ( data & 0xf ) * 0x400000 ) ); + memory_set_bankptr( machine(), "bank2", machine().region( "user2" )->base() + ( ( data & 0xf ) * 0x400000 ) ); } else if (ACCESSING_BITS_16_31) { - state->m_bam2_mcu_command = data>>16; - logerror("MCU command: %04x (PC %08x)\n", state->m_bam2_mcu_command, cpu_get_pc(&space->device())); + m_bam2_mcu_command = data>>16; + logerror("MCU command: %04x (PC %08x)\n", m_bam2_mcu_command, cpu_get_pc(&space.device())); } } } -static READ32_HANDLER( bam2_mcu_r ) +READ32_MEMBER(zn_state::bam2_mcu_r) { - zn_state *state = space->machine().driver_data<zn_state>(); switch (offset) { case 0: - logerror("MCU port 0 read @ PC %08x mask %08x\n", cpu_get_pc(&space->device()), mem_mask); + logerror("MCU port 0 read @ PC %08x mask %08x\n", cpu_get_pc(&space.device()), mem_mask); break; case 1: - logerror("MCU status read @ PC %08x mask %08x\n", cpu_get_pc(&space->device()), mem_mask); + logerror("MCU status read @ PC %08x mask %08x\n", cpu_get_pc(&space.device()), mem_mask); - switch (state->m_bam2_mcu_command) + switch (m_bam2_mcu_command) { case 0x7f: // first drive check case 0x1c: // second drive check (causes HDD detected) @@ -1786,19 +1819,20 @@ static READ32_HANDLER( bam2_mcu_r ) return 0; } -static READ32_HANDLER( bam2_unk_r ) +READ32_MEMBER(zn_state::bam2_unk_r) { return 0; } static DRIVER_INIT( bam2 ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f3fffff, "bank1" ); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f400000, 0x1f7fffff, "bank2" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fb00000, 0x1fb00007, FUNC(bam2_mcu_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fa20000, 0x1fa20003, FUNC(bam2_unk_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fa10300, 0x1fa10303, FUNC(bam2_sec_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb00000, 0x1fb00007, FUNC(bam2_mcu_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fb00000, 0x1fb00007, read32_delegate(FUNC(zn_state::bam2_mcu_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fa20000, 0x1fa20003, read32_delegate(FUNC(zn_state::bam2_unk_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fa10300, 0x1fa10303, write32_delegate(FUNC(zn_state::bam2_sec_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb00000, 0x1fb00007, write32_delegate(FUNC(zn_state::bam2_mcu_w),state)); zn_driver_init(machine); } @@ -2077,33 +2111,33 @@ void jdredd_vblank(zn_state *state, screen_device &screen, bool vblank_state) } } -static WRITE32_HANDLER( acpsx_00_w ) +WRITE32_MEMBER(zn_state::acpsx_00_w) { - verboselog( space->machine(), 0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); } -static WRITE32_HANDLER( acpsx_10_w ) +WRITE32_MEMBER(zn_state::acpsx_10_w) { - verboselog( space->machine(), 0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); } -static WRITE32_HANDLER( nbajamex_80_w ) +WRITE32_MEMBER(zn_state::nbajamex_80_w) { - verboselog( space->machine(), 0, "nbajamex_80_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - psx_irq_set(space->machine(), 0x400); + verboselog( machine(), 0, "nbajamex_80_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + psx_irq_set(machine(), 0x400); } -static READ32_HANDLER( nbajamex_08_r ) +READ32_MEMBER(zn_state::nbajamex_08_r) { UINT32 data = 0xffffffff; - verboselog( space->machine(), 0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } -static READ32_HANDLER( nbajamex_80_r ) +READ32_MEMBER(zn_state::nbajamex_80_r) { UINT32 data = 0xffffffff; - verboselog( space->machine(), 0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); + verboselog( machine(), 0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, data, mem_mask ); return data; } @@ -2112,8 +2146,8 @@ static DRIVER_INIT( coh1000a ) zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f1fffff, "bank1" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fbfff00, 0x1fbfff03, FUNC(acpsx_00_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fbfff10, 0x1fbfff13, FUNC(acpsx_10_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fbfff00, 0x1fbfff03, write32_delegate(FUNC(zn_state::acpsx_00_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fbfff10, 0x1fbfff13, write32_delegate(FUNC(zn_state::acpsx_10_w),state)); if( strcmp( machine.system().name, "nbajamex" ) == 0 ) { @@ -2121,8 +2155,8 @@ static DRIVER_INIT( coh1000a ) state->m_nbajamex_eeprom = auto_alloc_array( machine, UINT8, state->m_nbajamex_eeprom_size ); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank( 0x1f200000, 0x1f200000 + ( state->m_nbajamex_eeprom_size - 1 ), "bank2" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler ( 0x1fbfff08, 0x1fbfff0b, FUNC(nbajamex_08_r) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1fbfff80, 0x1fbfff83, FUNC(nbajamex_80_r), FUNC(nbajamex_80_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler ( 0x1fbfff08, 0x1fbfff0b, read32_delegate(FUNC(zn_state::nbajamex_08_r),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1fbfff80, 0x1fbfff83, read32_delegate(FUNC(zn_state::nbajamex_80_r),state), write32_delegate(FUNC(zn_state::nbajamex_80_w),state)); memory_set_bankptr( machine, "bank2", state->m_nbajamex_eeprom ); /* ram/eeprom/?? */ } @@ -2282,15 +2316,16 @@ Notes: VSync - 60Hz */ -static WRITE32_HANDLER( coh1001l_bnk_w ) +WRITE32_MEMBER(zn_state::coh1001l_bnk_w) { - memory_set_bankptr( space->machine(), "bank1", space->machine().region( "user2" )->base() + ( ( ( data >> 16 ) & 3 ) * 0x800000 ) ); + memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ( ( ( data >> 16 ) & 3 ) * 0x800000 ) ); } static DRIVER_INIT( coh1001l ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); /* banked rom */ - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb00000, 0x1fb00003, FUNC(coh1001l_bnk_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::coh1001l_bnk_w),state) ); zn_driver_init(machine); } @@ -2324,16 +2359,17 @@ Key: Mother KN01 */ -static WRITE32_HANDLER( coh1002v_bnk_w ) +WRITE32_MEMBER(zn_state::coh1002v_bnk_w) { - memory_set_bankptr( space->machine(), "bank2", space->machine().region( "user3" )->base() + ( data * 0x100000 ) ); + memory_set_bankptr( machine(), "bank2", machine().region( "user3" )->base() + ( data * 0x100000 ) ); } static DRIVER_INIT( coh1002v ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f27ffff, "bank1" ); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1fb00000, 0x1fbfffff, "bank2" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler( 0x1fb00000, 0x1fb00003, FUNC(coh1002v_bnk_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::coh1002v_bnk_w),state)); zn_driver_init(machine); } @@ -2507,38 +2543,37 @@ Notes: for 11 more 32MBit smt SOP44 MASKROMs. */ -static WRITE32_HANDLER( coh1002m_bank_w ) +WRITE32_MEMBER(zn_state::coh1002m_bank_w) { - verboselog( space->machine(), 1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - memory_set_bankptr( space->machine(), "bank1", space->machine().region( "user2" )->base() + ((data>>16) * 0x800000) ); + verboselog( machine(), 1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); + memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ((data>>16) * 0x800000) ); } -static READ32_HANDLER( cbaj_z80_r ) +READ32_MEMBER(zn_state::cbaj_z80_r) { - zn_state *state = space->machine().driver_data<zn_state>(); int ready; - space->machine().scheduler().synchronize(); + machine().scheduler().synchronize(); - ready = state->m_cbaj_to_r3k; - state->m_cbaj_to_r3k &= ~2; - return state->soundlatch2_byte_r(*space,0) | ready<<24; + ready = m_cbaj_to_r3k; + m_cbaj_to_r3k &= ~2; + return soundlatch2_byte_r(*&space,0) | ready<<24; } -static WRITE32_HANDLER( cbaj_z80_w ) +WRITE32_MEMBER(zn_state::cbaj_z80_w) { - zn_state *state = space->machine().driver_data<zn_state>(); - space->machine().scheduler().synchronize(); + machine().scheduler().synchronize(); - state->m_cbaj_to_z80 |= 2; - state->m_latch_to_z80 = data; + m_cbaj_to_z80 |= 2; + m_latch_to_z80 = data; } static DRIVER_INIT( coh1002m ) { + zn_state *state = machine.driver_data<zn_state>(); machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler( 0x1fb00000, 0x1fb00003, FUNC(cbaj_z80_r), FUNC(cbaj_z80_w) ); - machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler ( 0x1fb00004, 0x1fb00007, FUNC(coh1002m_bank_w) ); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1fb00000, 0x1fb00003, read32_delegate(FUNC(zn_state::cbaj_z80_r),state), write32_delegate(FUNC(zn_state::cbaj_z80_w),state)); + machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler ( 0x1fb00004, 0x1fb00007, write32_delegate(FUNC(zn_state::coh1002m_bank_w),state)); zn_driver_init(machine); } @@ -2549,29 +2584,26 @@ static MACHINE_RESET( coh1002m ) zn_machine_init(machine); } -static READ8_HANDLER( cbaj_z80_latch_r ) +READ8_MEMBER(zn_state::cbaj_z80_latch_r) { - zn_state *state = space->machine().driver_data<zn_state>(); - state->m_cbaj_to_z80 &= ~2; - return state->m_latch_to_z80; + m_cbaj_to_z80 &= ~2; + return m_latch_to_z80; } -static WRITE8_HANDLER( cbaj_z80_latch_w ) +WRITE8_MEMBER(zn_state::cbaj_z80_latch_w) { - zn_state *state = space->machine().driver_data<zn_state>(); - state->m_cbaj_to_r3k |= 2; - state->soundlatch2_byte_w(*space, 0, data); + m_cbaj_to_r3k |= 2; + soundlatch2_byte_w(*&space, 0, data); } -static READ8_HANDLER( cbaj_z80_ready_r ) +READ8_MEMBER(zn_state::cbaj_z80_ready_r) { - zn_state *state = space->machine().driver_data<zn_state>(); - int ret = state->m_cbaj_to_z80; + int ret = m_cbaj_to_z80; - state->m_cbaj_to_z80 &= ~2; + m_cbaj_to_z80 &= ~2; return ret; } @@ -2584,8 +2616,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( cbaj_z80_port_map, AS_IO, 8, zn_state ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE( 0x84, 0x85 ) AM_DEVREADWRITE_LEGACY("ymz", ymz280b_r, ymz280b_w ) - AM_RANGE( 0x90, 0x90 ) AM_READWRITE_LEGACY(cbaj_z80_latch_r, cbaj_z80_latch_w ) - AM_RANGE( 0x91, 0x91 ) AM_READ_LEGACY(cbaj_z80_ready_r ) + AM_RANGE( 0x90, 0x90 ) AM_READWRITE(cbaj_z80_latch_r, cbaj_z80_latch_w ) + AM_RANGE( 0x91, 0x91 ) AM_READ(cbaj_z80_ready_r ) ADDRESS_MAP_END |