summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame/drivers/vaportra.cpp
diff options
context:
space:
mode:
author cam900 <dbtlrchl@naver.com>2020-04-04 05:10:41 +0900
committer GitHub <noreply@github.com>2020-04-03 16:10:41 -0400
commitcd72f1d5b600f03d5ba72336c426e6648059c9de (patch)
tree92879dbd4c7515f2163f711db741114a98599039 /src/mame/drivers/vaportra.cpp
parent1f764371b4e8fd8ce6821a920ee9e8e2df9bedbe (diff)
deco16ic.cpp Drawing behavior updates (#6514)
* deco16ic.cpp : Fix transparency/transmask handling in custom draw case Use callback for tile info and 8bpp mixing, Fix sshangha regression, Reduce unnecessary values cninja.cpp : Correct 8bpp tilemap drawing behavior in robocop2 (Same data in both tilemap RAM for tilegen[1], only tile bank is different in 8bpp tile) darkseal.cpp, sshangha.cpp : Cleanup gfxdecode layout, Correct palette entries sshangha.cpp : Both chip and PCB hasn't any stereo sound output, Correct sound output routes cninja.cpp : Correct sound routes for PCBs without stereo sound output mirage.cpp : Use pri_callback for sprite priority * cninja.cpp : Reduce unused gfx layout
Diffstat (limited to 'src/mame/drivers/vaportra.cpp')
-rw-r--r--src/mame/drivers/vaportra.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mame/drivers/vaportra.cpp b/src/mame/drivers/vaportra.cpp
index a6f593ce1df..80881936c23 100644
--- a/src/mame/drivers/vaportra.cpp
+++ b/src/mame/drivers/vaportra.cpp
@@ -236,8 +236,6 @@ void vaportra_state::vaportra(machine_config &config)
DECO16IC(config, m_deco_tilegen[0], 0);
m_deco_tilegen[0]->set_pf1_size(DECO_64x32);
m_deco_tilegen[0]->set_pf2_size(DECO_64x32);
- m_deco_tilegen[0]->set_pf1_trans_mask(0x0f);
- m_deco_tilegen[0]->set_pf2_trans_mask(0x0f);
m_deco_tilegen[0]->set_pf1_col_bank(0x00);
m_deco_tilegen[0]->set_pf2_col_bank(0x20);
m_deco_tilegen[0]->set_pf1_col_mask(0x0f);
@@ -251,8 +249,6 @@ void vaportra_state::vaportra(machine_config &config)
DECO16IC(config, m_deco_tilegen[1], 0);
m_deco_tilegen[1]->set_pf1_size(DECO_64x32);
m_deco_tilegen[1]->set_pf2_size(DECO_64x32);
- m_deco_tilegen[1]->set_pf1_trans_mask(0x0f);
- m_deco_tilegen[1]->set_pf2_trans_mask(0x0f);
m_deco_tilegen[1]->set_pf1_col_bank(0x30);
m_deco_tilegen[1]->set_pf2_col_bank(0x40);
m_deco_tilegen[1]->set_pf1_col_mask(0x0f);