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author 68bit <info@68bit.org>2019-11-08 11:08:20 +1100
committer Vas Crabb <cuavas@users.noreply.github.com>2019-11-08 19:22:15 +1100
commitffe5c0772c036b037a688826fd6d0307005a8949 (patch)
treeb51cb834758d681ab66281e02b77e05d29c62c4d /src/mame/drivers/swtpc.cpp
parentd039a575ca94817ba7249581fc2c032fd1b4c14a (diff)
swtpc, swtpc09: save state, port change, cleanups
Diffstat (limited to 'src/mame/drivers/swtpc.cpp')
-rw-r--r--src/mame/drivers/swtpc.cpp21
1 files changed, 14 insertions, 7 deletions
diff --git a/src/mame/drivers/swtpc.cpp b/src/mame/drivers/swtpc.cpp
index a1ca20ecef5..fc00330f8c0 100644
--- a/src/mame/drivers/swtpc.cpp
+++ b/src/mame/drivers/swtpc.cpp
@@ -109,14 +109,16 @@ public:
, m_maincpu(*this, "maincpu")
, m_ram(*this, "ram")
, m_brg(*this, "brg")
- , m_maincpu_clock(*this, "maincpu_clock")
- , m_swtbug_ready_wait(*this, "swtbug_ready_wait")
- , m_swtbug_load_at_a100(*this, "swtbug_load_at_a100")
+ , m_maincpu_clock(*this, "MAINCPU_CLOCK")
+ , m_swtbug_ready_wait(*this, "SWTBUG_READY_WAIT")
+ , m_swtbug_load_at_a100(*this, "SWTBUG_LOAD_AT_A100")
{ }
void swtpcm(machine_config &config);
void swtpc(machine_config &config);
+ DECLARE_INPUT_CHANGED_MEMBER(maincpu_clock_change);
+
private:
virtual void machine_reset() override;
virtual void machine_start() override;
@@ -158,8 +160,8 @@ static INPUT_PORTS_START( swtpc )
// the CPU clock and the frequency was variable. The 6800 was
// available at speeds up to 2MHz so that might not have been
// impossible. An overclock option of 4MHz is also implemented.
- PORT_START("maincpu_clock")
- PORT_CONFNAME(0xffffff, 1000000, "CPU clock")
+ PORT_START("MAINCPU_CLOCK")
+ PORT_CONFNAME(0xffffff, 1000000, "CPU clock") PORT_CHANGED_MEMBER(DEVICE_SELF, swtpc_state, maincpu_clock_change, 0)
PORT_CONFSETTING( 898550, "0.89855 MHz") // MIKBUG
PORT_CONFSETTING( 921600, "0.92160 MHz") // SWTPC
PORT_CONFSETTING(1000000, "1.0 MHz")
@@ -172,7 +174,7 @@ static INPUT_PORTS_START( swtpc )
// the motor when accessing the control register, the drive does not
// have time to become ready before commands are issued and the boot
// fails. This workaround is necessary in practice.
- PORT_START("swtbug_ready_wait")
+ PORT_START("SWTBUG_READY_WAIT")
PORT_CONFNAME(0x1, 1, "SWTBUG ready wait patch")
PORT_CONFSETTING(0, "No")
PORT_CONFSETTING(1, "Yes - apply patch")
@@ -184,7 +186,7 @@ static INPUT_PORTS_START( swtpc )
// 0xa100 or perhaps better implement support for the high PROM to
// allow custom code to be used which is needed anyway as even NEWBUG
// appears to have issues and is not optimized for the DC5 FDC.
- PORT_START("swtbug_load_at_a100")
+ PORT_START("SWTBUG_LOAD_AT_A100")
PORT_CONFNAME(0x1, 1, "SWTBUG disk boot patch, to load at 0xa100")
PORT_CONFSETTING(0, "No")
PORT_CONFSETTING(1, "Yes - apply patch")
@@ -195,6 +197,11 @@ static DEVICE_INPUT_DEFAULTS_START( dc5 )
DEVICE_INPUT_DEFAULTS("address_mode", 0xf, 0)
DEVICE_INPUT_DEFAULTS_END
+INPUT_CHANGED_MEMBER(swtpc_state::maincpu_clock_change)
+{
+ m_maincpu->set_clock(newval);
+}
+
void swtpc_state::machine_reset()
{
uint32_t maincpu_clock = m_maincpu_clock->read();