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author braintro <briantro@users.noreply.github.com>2018-08-25 18:33:35 -0500
committer braintro <briantro@users.noreply.github.com>2018-08-25 18:33:35 -0500
commitde1637512bee15c715c2e0bf70d0f3923e6b833e (patch)
tree4b4f5fa84c0ec7ff632b0245804fd3c60fe1a31a /src/mame/drivers/sshangha.cpp
parentb83c31c7b900d2f6afeba2517a6d5d2fea4bf014 (diff)
midwunit.cpp: Document alternate style rom labels which show dates of roms for MK3 (nw)
Diffstat (limited to 'src/mame/drivers/sshangha.cpp')
-rw-r--r--src/mame/drivers/sshangha.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mame/drivers/sshangha.cpp b/src/mame/drivers/sshangha.cpp
index 8055ba6bf24..d00f968f60e 100644
--- a/src/mame/drivers/sshangha.cpp
+++ b/src/mame/drivers/sshangha.cpp
@@ -60,7 +60,7 @@ HB-PCB-A5 M6100691A (distributed by Taito)
| MCM2018 GAL.U94 |
| MCM2018 GAL.U63 SS002.U7 |
| +-----+ GAL.U66 |
-| |DE146| MC86000P12F-16MHZ SS001.U8 |
+| |DE146| MC68000P12F-16MHZ SS001.U8 |
| SW2 SW1 +-----+ |
+-----------------------------------------------------------+
@@ -68,7 +68,7 @@ HB-PCB-A5 M6100691A (distributed by Taito)
U9 & U10 are 28pin 27C512
U36 & U38 are 42pin 8/16Meg mask
- CPU: MC86000P12F 16 MHZ
+ CPU: MC68000P12F 16 MHZ
Sound: Z80B, YM2203C, Y3014B, OKI M6295
OSC: 28.0000MHz, 16.0000MHz
DSW: 8 position dipswitch x 2