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author Vas Crabb <vas@vastheman.com>2016-10-23 22:35:45 +1100
committer Vas Crabb <vas@vastheman.com>2016-10-23 22:36:24 +1100
commit129c0feeed5e3d66e489f3445f4390cd139658aa (patch)
treeffb0dac37430c2dc1e005b4f9e66d5911337e882 /src/mame/drivers/rainbow.cpp
parentf1fefd70559e5ce405ddf74f387e372727c34963 (diff)
srcclean (nw)
Diffstat (limited to 'src/mame/drivers/rainbow.cpp')
-rw-r--r--src/mame/drivers/rainbow.cpp374
1 files changed, 187 insertions, 187 deletions
diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp
index 68fb0017f75..db5af057872 100644
--- a/src/mame/drivers/rainbow.cpp
+++ b/src/mame/drivers/rainbow.cpp
@@ -1,4 +1,4 @@
-// Define suppresses costly smooth scroll / updates when debugging:
+// Define suppresses costly smooth scroll / updates when debugging:
// ENABLE BY UNCOMMENTING. ADDITIONALLY, SET SMOOTH SCROLL IN EMULATION (DISABLE BY SETTING JUMP SCROLL. To enter SETUP hit ScrollLock)-
//#define BOOST_DEBUG_PERFORMANCE
@@ -13,7 +13,7 @@
// Two modes: highres and medres mode (different bank length..?)
// - MEDRES: palette of 16 colors out of 4096. 384 x 240
// - HIGRES: palette of 4 colors out of 4096. 800 x 240
-// Palette takes 2 byte per palette entry. CLUT ("color map") is 32 byte long.
+// Palette takes 2 byte per palette entry. CLUT ("color map") is 32 byte long.
------------------------------------------------------------------------------------------------
THE DEC 'R-M-B' COLOR CABLE VS. THE UNOFFICIAL 'R-G-B' MODE (A BIT OF HISTORY)
@@ -25,10 +25,10 @@ THE DEC 'R-M-B' COLOR CABLE VS. THE UNOFFICIAL 'R-G-B' MODE (A BIT OF HISTORY)
// A patch from one of the archives corrects the GWBASIC palette problem when using 2 monitors [Bavarese].
EMULATION SPECIFIC
-// If a program disables text output (via port $0A), a log message is given.
+// If a program disables text output (via port $0A), a log message is given.
-// DUAL MONITOR enables both screens, even if onboard graphics has been accidently shut off
-// (helps debugging semi broken programs, for example Doodle).
+// DUAL MONITOR enables both screens, even if onboard graphics has been accidently shut off
+// (helps debugging semi broken programs, for example Doodle).
SCREEN 1 vs. SCREEN 2 IN EMULATION
// All GDC 7220 output is displayed on the right. Be it color or monochrome, Option Graphics output is on screen 2.
@@ -36,8 +36,8 @@ SCREEN 1 vs. SCREEN 2 IN EMULATION
// The type of monochrome monitor (VR-210 A, B or C) is selectable via another DIP (coarsly simulates a phosphor color).
BUGS
-- MEDRES LOOKS CORRECT
-- HIRES-MODE UNTESTED.
+- MEDRES LOOKS CORRECT
+- HIRES-MODE UNTESTED.
- VECTOR MODE SEEMS TO DISPLAY NOTHING AT ALL (16 bit access botched?) Examples: MMIND (MasterMind, after BMP logo), SOLIT (Solitair).
- GDC diagnostic disk bails out on 11 of 13 low level tests. SCROLL CHECK crashes CPU.
@@ -51,18 +51,18 @@ UNKNOWN IMPLEMENTATION DETAILS:
// b. SCROLL BUFFER initialization (details) unclear. What happens when a programs does not write all 256 bytes? Value of uninitialized areas?
Play, then retry (y) SCRAM to see the effect. Scram doesn't seem to write all (256) bytes, a GDC RESET is only executed at startup...
(PAGE 48 OF PDF HAS A SUPERFICIAL DESCRIPTION OF THE SCROLL BUFFER)
-
+
// c. UNVERIFIED XTAL / CLOCK:
// There is a 31.188 Mhz crystal in DUELL's hand written Option Graphics circuit (31.188 possibly measured, as it cannot be found in XTAL).
// According to the datasheet, the NEC 7220 was certified for 4.0 , 5.0, and 5.5 Mhz and the 7220A for 6.0, 7.0, and 8.0 Mhz
// d. UPD7220 oddities: * refresh rate much too fast at 32Mhz/4 (Upd7220 LOG says 492 Mhz?!).
-// * 7220 pixel stretch / visible area looks odd (pixels stretched out too wide at 384 x 240. Compare the real SCRAM screenshot online)
+// * 7220 pixel stretch / visible area looks odd (pixels stretched out too wide at 384 x 240. Compare the real SCRAM screenshot online)
// e. FIXME (MAME/MESS): what happens when the left screen is at 50 Hz and the right at 60 Hz?
-// According to Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
-// (the partial update system gets very confused because it expects both the screens to end at the same time
-// and if that isn't the case large parts of one screen end up not updating at all)
+// According to Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
+// (the partial update system gets very confused because it expects both the screens to end at the same time
+// and if that isn't the case large parts of one screen end up not updating at all)
*/
// license:GPL-2.0+
@@ -159,7 +159,7 @@ Can't be added if RD51 hard disk controller present (J4 + J5). For programming i
* ( NO DUMP YET ) PC CHARACTER SET (Suitable Solutions?). Supported by IBM PC software emulator named CodeBlue (see 3.1 patch)
* ( NO DUMP YET ) TECHNICAL CHARACTER SET (TCS; available for Rainbow 100, 100B, 100+; $95 from DEC)
-Source: price list of a DEC reseller.
+Source: price list of a DEC reseller.
Contains 94 graphic characters from $A1 - $FE, including symbols and characters used in technical applications,
see http://support.attachmate.com/techdocs/1184.html and http://vt100.net/charsets/technical.html
@@ -269,7 +269,7 @@ DIAGNOSTIC-LEDs |J3 | |J2 | |J1 |
| ROM (4K) ...J7... | ...J9 = RX50 |
| |
|-------------PCB# 5416206 / 5016205-01C1-------------|
-
+
CONNECTORS ("J"):
...J5... ...J4... both: RD51 controller (hard disk)
...J5... ...J4... both: EXTENDED COMM. controller
@@ -351,29 +351,29 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
#define GDC_SELECT_WRITE_BUFFER 0x01 // 0xFE
#define GDC_SELECT_PATTERN_MULTIPLIER 0x02 // 0xFD
#define GDC_SELECT_PATTERN 0x04 // 0xFB
-#define GDC_SELECT_FG_BG 0x08 // 0xF7
+#define GDC_SELECT_FG_BG 0x08 // 0xF7
#define GDC_SELECT_ALU_PS 0x10 // 0xEF
#define GDC_SELECT_COLOR_MAP 0x20 // 0xDF
#define GDC_SELECT_MODE_REGISTER 0x40 // 0xBF
#define GDC_SELECT_SCROLL_MAP 0x80 // 0x7F
-// MODE REGISTER
-#define GDC_MODE_HIGHRES 0x01
-#define GDC_MODE_VECTOR 0x02
+// MODE REGISTER
+#define GDC_MODE_HIGHRES 0x01
+#define GDC_MODE_VECTOR 0x02
// ( " ) READBACK OPERATION (if ENABLE_WRITES = 0):
-#define GDC_MODE_ENABLE_WRITES 0x10
+#define GDC_MODE_ENABLE_WRITES 0x10
#define GDC_MODE_READONLY_SCROLL_MAP 0x20
// ( " ) READBACK OPERATION (plane select = bit mask in bits 2 + 3 of MODE register):
#define GDC_MODE_READBACK_PLANE_MASK 12
-#define GDC_MODE_READBACK_PLANE_00 0x00
-#define GDC_MODE_READBACK_PLANE_01 0x04
-#define GDC_MODE_READBACK_PLANE_02 0x08
-#define GDC_MODE_READBACK_PLANE_03 0x0c
+#define GDC_MODE_READBACK_PLANE_00 0x00
+#define GDC_MODE_READBACK_PLANE_01 0x04
+#define GDC_MODE_READBACK_PLANE_02 0x08
+#define GDC_MODE_READBACK_PLANE_03 0x0c
#define GDC_MODE_ENABLE_VSYNC_IRQ 0x40
-#define GDC_MODE_ENABLE_VIDEO 0x80
+#define GDC_MODE_ENABLE_VIDEO 0x80
// ALU_PS REGISTER (bits 5 + 4):
#define ALU_PS_MODE_MASK 48
@@ -452,7 +452,7 @@ public:
m_mpsc(*this, "upd7201"),
m_dbrg(*this, "com8116"),
-
+
m_kbd8251(*this, "kbdser"),
m_lk201(*this, LK201_TAG),
@@ -548,7 +548,7 @@ public:
DECLARE_FLOPPY_FORMATS(floppy_formats);
- UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
+ UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
DECLARE_READ16_MEMBER(vram_r);
DECLARE_WRITE16_MEMBER(vram_w);
DECLARE_WRITE_LINE_MEMBER(GDC_vblank_irq);
@@ -556,7 +556,7 @@ public:
protected:
virtual void machine_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
-
+
private:
enum
{ // LOWEST PRIORITY
@@ -603,7 +603,7 @@ private:
required_shared_ptr<uint8_t> m_shared;
optional_device<ds1315_device> m_rtc;
-
+
required_device<upd7220_device> m_hgdc; // GDC-NEW
required_device<screen_device> m_screen2;
required_device<palette_device> m_palette2;
@@ -623,7 +623,7 @@ private:
hard_disk_file *rainbow_hdc_file(int ref);
- uint8_t m_GDC_WRITE_BUFFER[16]; // 16 x 8 bits for CPU, 8 x 16 for GDC
+ uint8_t m_GDC_WRITE_BUFFER[16]; // 16 x 8 bits for CPU, 8 x 16 for GDC
uint8_t m_GDC_COLOR_MAP[32];
uint8_t m_GDC_SCROLL_BUFFER_PRELOAD[256];
uint8_t m_GDC_SCROLL_BUFFER[256];
@@ -631,11 +631,11 @@ private:
uint8_t m_GDC_INDIRECT_REGISTER, m_GDC_MODE_REGISTER, m_GDC_scroll_index, m_GDC_color_map_index, m_GDC_write_buffer_index;
uint8_t m_GDC_ALU_PS_REGISTER, m_GDC_FG_BG;
uint8_t m_vpat, m_patmult, m_patcnt, m_patidx;
-
+
uint16_t m_GDC_WRITE_MASK;
bool m_scroll_buffer_changed, m_color_map_changed;
bool m_ONBOARD_GRAPHICS_SELECTED; // (internal switch, on board video to mono out)
-
+
bool m_SCREEN_BLANK;
int INT88, INTZ80;
@@ -680,34 +680,34 @@ private:
emu_timer *cmd_timer;
const int vectors[9] = { 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x02 };
-};
+};
// GDC RESET MACRO - used in "machine_reset" & GDC_EXTRA_REGISTER_w !
-#define GDC_RESET_MACRO \
-m_GDC_INDIRECT_REGISTER = 0; \
-m_GDC_MODE_REGISTER = 0; \
-m_GDC_WRITE_MASK = 0; \
-m_GDC_write_buffer_index = 0; \
-m_GDC_scroll_index = 0; \
-m_GDC_color_map_index = 0; \
-m_GDC_ALU_PS_REGISTER = 0; \
-m_vpat = 0; \
-m_patmult = 0; \
-m_patcnt = 0; \
-m_patidx = 7; \
-m_GDC_FG_BG = 0; \
+#define GDC_RESET_MACRO \
+m_GDC_INDIRECT_REGISTER = 0; \
+m_GDC_MODE_REGISTER = 0; \
+m_GDC_WRITE_MASK = 0; \
+m_GDC_write_buffer_index = 0; \
+m_GDC_scroll_index = 0; \
+m_GDC_color_map_index = 0; \
+m_GDC_ALU_PS_REGISTER = 0; \
+m_vpat = 0; \
+m_patmult = 0; \
+m_patcnt = 0; \
+m_patidx = 7; \
+m_GDC_FG_BG = 0; \
m_color_map_changed = true; \
for(int i=0; i <256; i++) { m_GDC_SCROLL_BUFFER[i] = m_GDC_SCROLL_BUFFER_PRELOAD[i] = i; };\
-m_scroll_buffer_changed = true; \
+m_scroll_buffer_changed = true; \
printf("\n** NEC 7220 GDC RESET **\n");
UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
{
#ifdef BOOST_DEBUG_PERFORMANCE
uint8_t *ram = memregion("maincpu")->base();
- if( !(m_p_vol_ram[0x84] == 0x00) )
- {
+ if( !(m_p_vol_ram[0x84] == 0x00) )
+ {
if( (MOTOR_DISABLE_counter) || (ram[0xEFFFE] & 16) ) // if HDD/FDD ACTIVITY -OR- SMOOTH SCROLL IN PROGRESS
return;
}
@@ -716,27 +716,27 @@ UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
const rgb_t *paletteX = m_palette2->palette()->entry_list_raw();
int xi;
- uint16_t plane0, plane1, plane2, plane3;
+ uint16_t plane0, plane1, plane2, plane3;
uint8_t pen;
if(!(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VIDEO))
- return; // no output from graphics option
+ return; // no output from graphics option
// ********************* GET BITMAP DATA FOR 4 PLANES ***************************************
- // _READ_ BIT MAP from 2 or 4 planes (plane 0 is least, plane 3 most significant). See page 42 / 43
- if(m_GDC_MODE_REGISTER & GDC_MODE_HIGHRES)
- {
+ // _READ_ BIT MAP from 2 or 4 planes (plane 0 is least, plane 3 most significant). See page 42 / 43
+ if(m_GDC_MODE_REGISTER & GDC_MODE_HIGHRES)
+ {
// HIGH RES (2 planes, 2 color bits, 4 color map entries / 4 MONOCHROME SHADES)
// MANUAL: (GDC "sees" 2 planes X 16 bits X 16K words)!
- // !!! m_video_ram is defined as uint16_t !!!
+ // !!! m_video_ram is defined as uint16_t !!!
plane0 = m_video_ram[ ((address & 0x7fff) + 0x00000) >> 1 ]; // Video Ram is defined as LITTLE_ENDIAN, 16 (?):
plane1 = m_video_ram[ ((address & 0x7fff) + 0x20000) >> 1 ]; // 8 x 32 K is 0x40000, see page 16
plane2 = 0;
plane3 = 0;
}
- else
- {
+ else
+ {
// MED.RESOLUTION (4 planes, 4 color bits, 16 color map entries / 16 (4) MONOCHROME SHADES)
// MANUAL SAYS: (GDC "sees" 4 planes X 16 bits X 8K words)!
plane0 = m_video_ram[((address & 0x3fff) + 0x00000) >> 1];
@@ -746,17 +746,17 @@ UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
}
// ********************* GET BITMAP DATA per PLANE ***************************************
- bool mono = (m_inp13->read() == MONO_MONITOR) ? true : false; // 1 = MONO, 2 = COLOR, 3 = DUAL MONITOR
+ bool mono = (m_inp13->read() == MONO_MONITOR) ? true : false; // 1 = MONO, 2 = COLOR, 3 = DUAL MONITOR
for(xi=0;xi<16;xi++)
{
- pen = BIT(plane0 , xi) |
- ( BIT(plane1 , xi) << 1 ) |
+ pen = BIT(plane0 , xi) |
+ ( BIT(plane1 , xi) << 1 ) |
( BIT(plane2 , xi) << 2 ) |
( BIT(plane3 , xi) << 3 );
-
+
if (bitmap.cliprect().contains(x + xi, y))
- bitmap.pix32(y, x + xi) = paletteX[mono ? (pen + 16) : pen];
+ bitmap.pix32(y, x + xi) = paletteX[mono ? (pen + 16) : pen];
}
}
@@ -871,7 +871,7 @@ AM_RANGE(0x11, 0x11) AM_DEVREADWRITE("kbdser", i8251_device, status_r, control_w
// * Color graphics option (uses NEC upd7220 GDC). REFERENCE: Programmer's Reference: AA-AE36A-TV.
// Either 384 x 240 x 16 or 800 x 240 x 4 colors (out of 4096). 8 x 64 K video RAM.
-// Color graphics independent from text output if 8088 port $0a (bit 2) is zero.
+// Color graphics independent from text output if 8088 port $0a (bit 2) is zero.
// This driver offers a DIP switch to enable or disable COLOR GRAPHICS altogether (affects "system_parameter_r" ...)
@@ -1030,12 +1030,12 @@ PORT_DIPSETTING(0x00, DEF_STR(Off))
PORT_DIPSETTING(0x01, DEF_STR(On))
PORT_START("MONITOR CONFIGURATION") // GDC-NEW
-PORT_DIPNAME(0x03, 0x03, "MONITOR CONFIGURATION")
+PORT_DIPNAME(0x03, 0x03, "MONITOR CONFIGURATION")
PORT_DIPSETTING(0x01, "MONO ONLY (SCREEN 2: 16 monochrome shades)")
PORT_DIPSETTING(0x02, "COLOR ONLY (SCREEN 2: R-G-B; mono -> green)")
PORT_DIPSETTING(0x03, "DUAL MONITOR (SCREEN 1: TEXT; SCREEN 2: R-G-B)")
INPUT_PORTS_END
-
+
void rainbow_state::machine_reset()
{
// Configure RAM
@@ -1196,35 +1196,35 @@ uint32_t rainbow_state::screen_update_rainbow(screen_device &screen, bitmap_ind1
#ifdef BOOST_DEBUG_PERFORMANCE
uint8_t *ram = memregion("maincpu")->base();
- if( !(m_p_vol_ram[0x84] == 0x00) )
- {
+ if( !(m_p_vol_ram[0x84] == 0x00) )
+ {
if( (MOTOR_DISABLE_counter) || (ram[0xEFFFE] & 16) ) // if HDD/FDD ACTIVITY -OR- SMOOTH SCROLL IN PROGRESS
return 0;
}
#endif
- int monitor_selected = m_inp13->read();
- if(monitor_selected != old_monitor)
- {
+ int monitor_selected = m_inp13->read();
+ if(monitor_selected != old_monitor)
+ {
old_monitor = monitor_selected;
m_color_map_changed = true;
}
int palette_selected = m_inp9->read();
- if(palette_selected != old_palette)
- {
+ if(palette_selected != old_palette)
+ {
old_palette = palette_selected;
m_color_map_changed = true;
}
m_crtc->palette_select(palette_selected);
- // GDC-NEW
+ // GDC-NEW
// NEC 7220 output (MONO or COLOR) can only be shown on the RIGHT hand side,
// so disable TEXT out if 'dual monitor' is unselected.
// BLANK SCREEN : ONLY IF 1) graphics option output selected AND 2) no multi monitor setup selected
- if( m_SCREEN_BLANK ||
- ( (!m_ONBOARD_GRAPHICS_SELECTED) && (monitor_selected != 3))
+ if( m_SCREEN_BLANK ||
+ ( (!m_ONBOARD_GRAPHICS_SELECTED) && (monitor_selected != 3))
)
m_crtc->video_blanking(bitmap, cliprect);
else
@@ -2352,70 +2352,70 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
const uint8_t v_levels[16] = { 255, 217, 201,186, 171, 156, 140, 125, 110, 97, 79, 66, 54, 31, 18, 0 };
if(m_scroll_buffer_changed)
- {
+ {
m_scroll_buffer_changed = false;
- for(xi = 0; xi < 256; xi++) // LOAD REAL SCROLL BUFFER FROM PRELOAD BUFFER:
- m_GDC_SCROLL_BUFFER[xi] = m_GDC_SCROLL_BUFFER_PRELOAD[xi];
+ for(xi = 0; xi < 256; xi++) // LOAD REAL SCROLL BUFFER FROM PRELOAD BUFFER:
+ m_GDC_SCROLL_BUFFER[xi] = m_GDC_SCROLL_BUFFER_PRELOAD[xi];
}
if(m_color_map_changed)
- {
+ {
m_color_map_changed = false;
- for(xi=0;xi<16;xi++) // DELAYED LOAD OF PALETTE ...
- {
+ for(xi=0;xi<16;xi++) // DELAYED LOAD OF PALETTE ...
+ {
uint8_t colordata1 = m_GDC_COLOR_MAP[xi];
- uint8_t colordata2 = m_GDC_COLOR_MAP[xi + 16]; // Does it matter if the palette is incomplete...?
+ uint8_t colordata2 = m_GDC_COLOR_MAP[xi + 16]; // Does it matter if the palette is incomplete...?
- // Color map: 32 x 8
- // 2nd 16 Byte 1st 16 Bytes (colordata1)
- // ----------- ------------
- // 7..4 3..0 7..4 3..0
- // Mono Blue Red Green
+ // Color map: 32 x 8
+ // 2nd 16 Byte 1st 16 Bytes (colordata1)
+ // ----------- ------------
+ // 7..4 3..0 7..4 3..0
+ // Mono Blue Red Green
mono = (colordata2 & 0xF0) >> 4; // FIXME: limit palette in appropriate modes on 100-A
blue = (colordata2 & 0x0F);
red = (colordata1 & 0xF0) >> 4;
green =(colordata1 & 0x0F);
- // NOTE: SECOND 16 BYTES ARE MONO PALETTE, _FIRST_ 16 ARE COLOR PALETTE * HERE * (on the VT240 driver, it is the other way round)
+ // NOTE: SECOND 16 BYTES ARE MONO PALETTE, _FIRST_ 16 ARE COLOR PALETTE * HERE * (on the VT240 driver, it is the other way round)
switch( m_inp13->read())
- {
- case MONO_MONITOR: // FIXME: bad colors!
- {
+ {
+ case MONO_MONITOR: // FIXME: bad colors!
+ {
switch( m_inp9->read() ) // - monochrome monitor (phosphor) type (1,2,3)
- {
+ {
case 1: // BLACK & WHITE
- m_palette2->set_pen_color(xi + 16, pal4bit(mono), pal4bit(mono), pal4bit(mono) );
+ m_palette2->set_pen_color(xi + 16, pal4bit(mono), pal4bit(mono), pal4bit(mono) );
break;
- case 2: // SHADES OF GREEN
- // For now, a hand picked value from VTVIDEO * is coarsly transformed into a RGB value.
+ case 2: // SHADES OF GREEN
+ // For now, a hand picked value from VTVIDEO * is coarsly transformed into a RGB value.
red = uint8_t( ( 35.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) ); // 80 % = NORMAL *
green = uint8_t( (145.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
blue = uint8_t( ( 75.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
- m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
+ m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
break;
case 3: // AMBER. Assumption: "normal" value at 80 % is 213, 146, 82 (decimal)
red = uint8_t( (213.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) ); // 80 % = NORMAL * is 3.19f (100 % would be 2.55f)
green = uint8_t( (146.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
blue = uint8_t( ( 82.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
- m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
+ m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
break;
}
// 255 durch 2.55 ist 100 255 durch x ist 80
}
- case COLOR_MONITOR: // w.official COLOR CABLE (mono out wired to green gun)
- m_palette2->set_pen_color(xi, pal4bit( red ) , pal4bit( mono ) , pal4bit( blue ) );
+ case COLOR_MONITOR: // w.official COLOR CABLE (mono out wired to green gun)
+ m_palette2->set_pen_color(xi, pal4bit( red ) , pal4bit( mono ) , pal4bit( blue ) );
break;
case DUAL_MONITOR: // Dual monitor configuration with homebrew cable (R G B, separate onboard circuit is mono)
- m_palette2->set_pen_color(xi, pal4bit( red ), pal4bit( green ), pal4bit( blue ) );
+ m_palette2->set_pen_color(xi, pal4bit( red ), pal4bit( green ), pal4bit( blue ) );
break;
}
-
+
} // palette (loop)
} // color map changed?
@@ -2426,7 +2426,7 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VSYNC_IRQ) // 0x40
raise_8088_irq(IRQ_GRF_INTR_L);
}
-
+
INTERRUPT_GEN_MEMBER(rainbow_state::vblank_irq)
{
raise_8088_irq(IRQ_8088_VBL);
@@ -2496,23 +2496,23 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
m_SCREEN_BLANK = (data & 2) ? false : true;
// Switch determines how the monochrome output pin is taken from:
- // 0 = M(ono) out from system module (DC011/DC012). Default, also used to setup dual monitors.
+ // 0 = M(ono) out from system module (DC011/DC012). Default, also used to setup dual monitors.
// 1 = M(ono) output from GRAPHICS OPTION. (G)reen remains unused with a single COLOR monitor.
- m_ONBOARD_GRAPHICS_SELECTED = (data & 0x04) ? false : true;
- if(!m_ONBOARD_GRAPHICS_SELECTED)
- {
+ m_ONBOARD_GRAPHICS_SELECTED = (data & 0x04) ? false : true;
+ if(!m_ONBOARD_GRAPHICS_SELECTED)
+ {
if(m_inp7->read() == 1)
printf("\nHINT: GRAPHICS OPTION ON. TEXT ONLY (DC011/DC012) OUTPUT NOW DISABLED.\n");
else
- { printf("\nALARM: GRAPHICS OPTION * SWITCHED OFF * VIA DIP. TEXT OUTPUT STILL ENABLED!\n");
+ { printf("\nALARM: GRAPHICS OPTION * SWITCHED OFF * VIA DIP. TEXT OUTPUT STILL ENABLED!\n");
m_ONBOARD_GRAPHICS_SELECTED = true;
}
printf("DATA: %x (PC=%x)\n", data, machine().device("maincpu")->safe_pc());
}
-
+
// BIT 3: PARITY TEST (1 = enables parity test on memory option board).
if(data & 0x08)
- {
+ {
printf("\n*** UNEMULATED PARITY TEST [on RAM EXTENSION] - (bit 3 in diagnostic_w) ");
// FIXME: parity test = NMI? When should NMI fire? Per RAM bank?
// m_i8088->set_input_line_and_vector(INPUT_LINE_NMI, ASSERT_LINE, 0x02);
@@ -2645,36 +2645,36 @@ WRITE_LINE_MEMBER(rainbow_state::irq_hi_w)
// ********************************* NEC UPD7220 ***********************************************
// Readback mode: correct place? Not for vector mode (really)...?
-// NOTE: "More than one plane at a time can be enabled for a write operation; however,
+// NOTE: "More than one plane at a time can be enabled for a write operation; however,
// only one plane can be enabled for a read operation at anyone time."
READ16_MEMBER(rainbow_state::vram_r)
-{
+{
if((!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) || space.debugger_access()) // (NOT VECTOR MODE)
{
//offset = ((offset & 0x18000) >> 1) | (offset & 0x3fff); // VT 240
//*******************************************************************************************************************************
-// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
+// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
// SEE PAGE 48 OF PDF FOR A DESCRIPTION OF THE SCROLL_MAP / SCROLL BUFFER:
- offset = ( m_GDC_SCROLL_BUFFER[ ( (offset & 0x3FC0) >> 6 ) ] << 6) | (offset & 0x3F);
+ offset = ( m_GDC_SCROLL_BUFFER[ ( (offset & 0x3FC0) >> 6 ) ] << 6) | (offset & 0x3F);
//*******************************************************************************************************************************
int readback_plane = 0;
// READBACK CODE DISABLED, FOR BETTER DEBUGGING (CANT SEE ANYTHING...):
- if( !(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) ) // 0x10 // READBACK OPERATION - if ENABLE_WRITES NOT SET
+ if( !(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) ) // 0x10 // READBACK OPERATION - if ENABLE_WRITES NOT SET
{
- readback_plane = (m_GDC_MODE_REGISTER & GDC_MODE_READBACK_PLANE_MASK) >> 2; // READBACK PLANE 00..02, mask in bits 2+3
-// printf(" READBACK MODE * ON *; plane selected: %02x ", readback_plane);
- }
+ readback_plane = (m_GDC_MODE_REGISTER & GDC_MODE_READBACK_PLANE_MASK) >> 2; // READBACK PLANE 00..02, mask in bits 2+3
+// printf(" READBACK MODE * ON *; plane selected: %02x ", readback_plane);
+ }
return m_video_ram[ (offset & 0xffff) + (0x8000 * readback_plane)];
- //return m_video_ram[(offset & 0x7fff) + (0x8000 * readback_plane)]; // VT240
- }
+ //return m_video_ram[(offset & 0x7fff) + (0x8000 * readback_plane)]; // VT240
+ }
return 0;
}
-
-// NOT PRESENT: enable line erase (10) / DMA scroll (11)
+
+// NOT PRESENT: enable line erase (10) / DMA scroll (11)
// ??? VT 240 ???: LOGIC UNIT SELECT
// SELECT_VECTOR_PATTERN_REGISTER -> IS_VECTOR_MODE !
@@ -2687,7 +2687,7 @@ WRITE16_MEMBER(rainbow_state::vram_w)
{
//*******************************************************************************************************************************
-// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
+// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
// SEE PAGE 48 OF PDF FOR A DESCRIPTION OF THE SCROLL_MAP / SCROLL BUFFER:
offset = ( m_GDC_SCROLL_BUFFER[ ( (offset & 0x3FC0) >> 6 ) ] << 6) | (offset & 0x3F);
//*******************************************************************************************************************************
@@ -2706,9 +2706,9 @@ WRITE16_MEMBER(rainbow_state::vram_w)
}
offset &= 0xffff; // same as in VT240?
- uint16_t chr = data; // VT240 : uint8_t
+ uint16_t chr = data; // VT240 : uint8_t
- if(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR) // VT240 : if(SELECT_VECTOR_PATTERN_REGISTER)
+ if(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR) // VT240 : if(SELECT_VECTOR_PATTERN_REGISTER)
{
chr = BITSWAP8(m_vpat, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx);
chr |= (chr << 8);
@@ -2721,34 +2721,34 @@ WRITE16_MEMBER(rainbow_state::vram_w)
}
else
{
- chr = m_GDC_WRITE_BUFFER[ m_GDC_write_buffer_index++ ];
+ chr = m_GDC_WRITE_BUFFER[ m_GDC_write_buffer_index++ ];
m_GDC_write_buffer_index &= 0xf;
chr |= (m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] << 8);
m_GDC_write_buffer_index &= 0xf;
}
-
- if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) // 0x10
+
+ if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) // 0x10
{
// ALU_PS register: controls logic used in writing to the bitmap / inhibiting of writing to specified planes.
// plane select and logic operations on write buffer... (and more) **** SEE PAGE 36 ****
int ps = m_GDC_ALU_PS_REGISTER & 0x0F; // PLANE SELECT 0..3 // VT 240 : ~m_GDC_ALU_PS_REGISTER & 3;
- uint8_t fore = ( (m_GDC_FG_BG & 0xf0) ) >> 4;
- uint8_t back = (m_GDC_FG_BG & 0x0f); // background : 0..3 confirmed, see p.39 AA-AE36A (PDF)
+ uint8_t fore = ( (m_GDC_FG_BG & 0xf0) ) >> 4;
+ uint8_t back = (m_GDC_FG_BG & 0x0f); // background : 0..3 confirmed, see p.39 AA-AE36A (PDF)
for(int i = 0; i <= 3; i++)
{
if( BIT(ps,i ) )
{
- uint16_t mem = m_video_ram[(offset & 0xffff) + (0x8000 * i)]; // VT240
+ uint16_t mem = m_video_ram[(offset & 0xffff) + (0x8000 * i)]; // VT240
uint16_t out = 0; // VT240 : uint8_t
for(int j = 0; j <= 15; j++) // REPLACE MODE : one replaced by FG, zero by BG ( 16 instead of 8 bit on VT240 )
out |= BIT(chr, j) ? ((fore & 1) << j) : ((back & 1) << j);
-
+
switch (m_GDC_ALU_PS_REGISTER & ALU_PS_MODE_MASK)
- {
- case OVERLAY_MODE: // (OR)
+ {
+ case OVERLAY_MODE: // (OR)
out |= mem;
break;
@@ -2756,17 +2756,17 @@ WRITE16_MEMBER(rainbow_state::vram_w)
out ^= ~mem;
break;
- default: // ALL ELSE
+ default: // ALL ELSE
break;
}
- if(!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) // 0 : (NOT VECTOR MODE) Text Mode and Write Mask Batch
+ if(!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) // 0 : (NOT VECTOR MODE) Text Mode and Write Mask Batch
out = (out & ~m_GDC_WRITE_MASK) | (mem & m_GDC_WRITE_MASK); // // M_MASK (1st use)
else
out = (out & data) | (mem & ~data); // VECTOR MODE !
if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) // 0x10
- m_video_ram[(offset & 0xffff) + (0x8000 * i)] = out;
+ m_video_ram[(offset & 0xffff) + (0x8000 * i)] = out;
} // if plane selected
fore >>= 1;
@@ -2793,10 +2793,10 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
{
static int last_message, last_mode, last_readback, last_scroll_index;
- if(offset > 0) // Port $50 reset done @ boot ROM 1EB4/8 regardless if option present.
- if (m_inp7->read() != 1)
- {
- if(last_message != 1)
+ if(offset > 0) // Port $50 reset done @ boot ROM 1EB4/8 regardless if option present.
+ if (m_inp7->read() != 1)
+ {
+ if(last_message != 1)
{
printf("\nCOLOR GRAPHICS ADAPTER INVOKED. PLEASE TURN ON THE APPROPRIATE DIP SWITCH, THEN RESTART.\n");
printf("OFFSET: %x (PC=%x)\n", 0x50 +offset , machine().device("maincpu")->safe_pc());
@@ -2807,21 +2807,21 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
switch(offset)
{
- case 0: // Mode Register must be reloaded following any write to port 50 (software reset).
- // Graphics option software reset. Any write to this port also resynchronizes the
- // read/modify/write memory cycles of the Graphics Option to those of the GDC.
+ case 0: // Mode Register must be reloaded following any write to port 50 (software reset).
+ // Graphics option software reset. Any write to this port also resynchronizes the
+ // read/modify/write memory cycles of the Graphics Option to those of the GDC.
GDC_RESET_MACRO
break;
-
+
case 1: // 51h - DATA loaded into register previously written to 53h.
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_WRITE_BUFFER) // 0x01
- {
- m_GDC_write_buffer_index = 0; // (writing to 51h CLEARS the index counter)
+ {
+ m_GDC_write_buffer_index = 0; // (writing to 51h CLEARS the index counter)
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_COLOR_MAP ) // 0x20
- {
+ {
m_color_map_changed = true;
m_GDC_COLOR_MAP[m_GDC_color_map_index++] = ~data; // tilde data verified by DIAGNOSTIC!
@@ -2831,7 +2831,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
printf("\n * COLOR MAP FULLY LOADED *");
for(int zi =0; zi <16; zi++)
- {
+ {
int g = m_GDC_COLOR_MAP[zi] & 0x0F;
int r = (m_GDC_COLOR_MAP[zi] & 0xF0) >> 4;
@@ -2845,11 +2845,11 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_SCROLL_MAP ) // 0x80
- {
+ {
if(!( m_GDC_MODE_REGISTER & GDC_MODE_READONLY_SCROLL_MAP)) // ? READONLY / WRITE logic correct...?
- {
- m_GDC_SCROLL_BUFFER_PRELOAD[m_GDC_scroll_index] = data; // // WRITE TO SCROLL_MAP ( 256 x 8 )
-
+ {
+ m_GDC_SCROLL_BUFFER_PRELOAD[m_GDC_scroll_index] = data; // // WRITE TO SCROLL_MAP ( 256 x 8 )
+
if(m_GDC_scroll_index == 255)
printf("\n ---- SCROLL MAP FULLY LOADED ---*");
m_GDC_scroll_index++;
@@ -2864,41 +2864,41 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
// SEE PAGE 37 OF AA-AE36A (PDF).
// NOTE : Pattern Multiplier MUST BE LOADED before loading PATTERN.
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_PATTERN_MULTIPLIER)
- {
+ {
// On a Rainbow, 12 indicates a multiplier of 16-12 = 4 (example)
- m_patmult = 16 - (data & 15); // 4 bit register // VT240: "patmult_w"
+ m_patmult = 16 - (data & 15); // 4 bit register // VT240: "patmult_w"
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_PATTERN)
- {
- m_vpat = data;
+ {
+ m_vpat = data;
m_patcnt = m_patmult;
m_patidx = 7; // correct...?
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_FG_BG) // 2 x 4
- {
+ {
m_GDC_FG_BG = data; // Neither bitswap nor negated (and also not both)...
- break; // Next: prepare FG / BG and PLANE in ALU - PLANE_SELECT register.
+ break; // Next: prepare FG / BG and PLANE in ALU - PLANE_SELECT register.
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_ALU_PS)
- {
+ {
m_GDC_ALU_PS_REGISTER = ~data; // Negated...
break;
}
-
+
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_MODE_REGISTER)
{
m_GDC_MODE_REGISTER = data; // Neither bitswap nor negated (and also not both)...
-
+
if(last_message != 2)
{
last_message = 2;
- if(data & GDC_MODE_HIGHRES)
+ if(data & GDC_MODE_HIGHRES)
printf(" * HIGH RESOLUTION * ");
else
printf(" MEDIUM RESOLUTION ");
@@ -2907,7 +2907,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
if(last_mode != (data & GDC_MODE_VECTOR))
{
last_mode = data & GDC_MODE_VECTOR;
- if(data & GDC_MODE_VECTOR)
+ if(data & GDC_MODE_VECTOR)
printf(" VECTOR MODE ");
else
printf(" WORD MODE ");
@@ -2918,7 +2918,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
last_readback = data & GDC_MODE_ENABLE_WRITES;
if(data & GDC_MODE_ENABLE_WRITES) // 0x10
printf(" READBACK: OFF - ENABLE_WRITES ");
- else // READBACK PLANE 00..02 - mask in bits 2+3:
+ else // READBACK PLANE 00..02 - mask in bits 2+3:
printf(" READBACK MODE; plane = %02x ", m_GDC_MODE_REGISTER & GDC_MODE_READBACK_PLANE_MASK); // unsure if PLANE is set... already?!
}
@@ -2926,9 +2926,9 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
{
last_scroll_index = m_GDC_scroll_index;
if(data & GDC_MODE_READONLY_SCROLL_MAP) // 0x20
- { //printf(" SCROLL MAP READ_ONLY. Index : %02x ", m_GDC_scroll_index);
- } else
- { printf(" SCROLL MAP IS WRITABLE. Index : %02x ", m_GDC_scroll_index);
+ { //printf(" SCROLL MAP READ_ONLY. Index : %02x ", m_GDC_scroll_index);
+ } else
+ { printf(" SCROLL MAP IS WRITABLE. Index : %02x ", m_GDC_scroll_index);
}
}
@@ -2939,45 +2939,45 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
} // GDC_SELECT_MODE_REGISTER
printf("\n* UNIMPLEMENTED CASE. MODE = %02x / m_GDC_INDIRECT_REGISTER = %02x\n",m_GDC_MODE_REGISTER, m_GDC_INDIRECT_REGISTER);
- break;
-
- case 2:
+ break;
+
+ case 2:
// 52h Data written to this port is loaded into the Write Buffer
- // While the CPU accesses the Write Buffer as sixteen 8-bit bytes,
- // the GDC accesses the buffer as eight 16-bit words.
+ // While the CPU accesses the Write Buffer as sixteen 8-bit bytes,
+ // the GDC accesses the buffer as eight 16-bit words.
// A 16-bit Write Mask gives the GDC control over individual bits of a word.
- // -------------------- WRITE BUFFER USED IN WORD MODE ONLY !
+ // -------------------- WRITE BUFFER USED IN WORD MODE ONLY !
// "OUTPUT WRITE BUFFER IS THE INVERSE OF THE INPUT" (quote from 4-3 of the PDF)
- // BITSWAP SEEMS NECESSARY (see digits in DOODLE)... !
- m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] = ~BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); // see BITSWAP on VT240;
- m_GDC_write_buffer_index &= 0xf; // write up to 16 bytes to port 52h.
+ // BITSWAP SEEMS NECESSARY (see digits in DOODLE)... !
+ m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] = ~BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); // see BITSWAP on VT240;
+ m_GDC_write_buffer_index &= 0xf; // write up to 16 bytes to port 52h.
break;
- case 3: // 53h Indirect Register; address selection for indirect addressing. See 51h.
- m_GDC_INDIRECT_REGISTER = data ^ 0xff;
+ case 3: // 53h Indirect Register; address selection for indirect addressing. See 51h.
+ m_GDC_INDIRECT_REGISTER = data ^ 0xff;
// Index to WRITE_BUFFER is reset via dummy write to port 51h (not here!).
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_COLOR_MAP ) // 0x20
- m_GDC_color_map_index = 0; // (also clears the index counter)
+ m_GDC_color_map_index = 0; // (also clears the index counter)
// NEXT: 32 BYTE COLOR MAP, LOADED TO $51
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_SCROLL_MAP ) // 0x80
- {
+ {
if(last_scroll_index != m_GDC_scroll_index)
{
last_scroll_index = m_GDC_scroll_index;
printf(" *** SCROLL INDEX COUNTER RESET, old value = %d", m_GDC_scroll_index);
}
- m_GDC_scroll_index = 0; // (also clears the index counter)
- } // NEXT: LOAD 256 BYTE SCROLL MAP INTO $51
+ m_GDC_scroll_index = 0; // (also clears the index counter)
+ } // NEXT: LOAD 256 BYTE SCROLL MAP INTO $51
break;
// --------- WRITE MASK (2 x 8 = 16 bits) USED IN WORD MODE ONLY !
- // NOTE: there is NO specific order for the WRITE_MASK (according to txt/code samples in PDF)!
+ // NOTE: there is NO specific order for the WRITE_MASK (according to txt/code samples in PDF)!
// !! NEW: LOW... HI JUXTAPOSITION...!!
case 4: // 54h Write Mask LOW
- m_GDC_WRITE_MASK = ( BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF );
+ m_GDC_WRITE_MASK = ( BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF );
break;
case 5: // 55h Write Mask HIGH
m_GDC_WRITE_MASK = ( m_GDC_WRITE_MASK & 0xFF00 ) | BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7);
@@ -3041,20 +3041,20 @@ MCFG_VT_VIDEO_RAM_CALLBACK(READ8(rainbow_state, read_video_ram_r))
MCFG_VT_VIDEO_CLEAR_VIDEO_INTERRUPT_CALLBACK(WRITELINE(rainbow_state, clear_video_interrupt))
// *************************** COLOR GRAPHICS (OPTION) **************************************
-MCFG_DEVICE_ADD("upd7220", UPD7220, XTAL_32MHz / 4) // WAR: 31188000 / 4 TO BE VERIFIED. Duell schematics shows 31.188 (?) Mhz (/ 4 = 7.797 Mhz)
+MCFG_DEVICE_ADD("upd7220", UPD7220, XTAL_32MHz / 4) // WAR: 31188000 / 4 TO BE VERIFIED. Duell schematics shows 31.188 (?) Mhz (/ 4 = 7.797 Mhz)
MCFG_UPD7220_VSYNC_CALLBACK(WRITELINE(rainbow_state, GDC_vblank_irq)) // "The vsync callback line needs to be below the 7220 DEVICE_ADD line."
MCFG_DEVICE_ADDRESS_MAP(AS_0, upd7220_map)
MCFG_UPD7220_DISPLAY_PIXELS_CALLBACK_OWNER(rainbow_state, hgdc_display_pixels)
MCFG_VIDEO_SET_SCREEN("screen2") // SET_SCREEN needs to be added after 7720 device in the machine config, not after the screen.
-MCFG_PALETTE_ADD("palette2", 32)
-
+MCFG_PALETTE_ADD("palette2", 32)
+
MCFG_SCREEN_ADD("screen2", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
-MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate
+MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate
MCFG_SCREEN_SIZE(800, 256) // should be 240
MCFG_SCREEN_VISIBLE_AREA(0, 800-1, 0, 256-1) // should be 240