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author Olivier Galibert <galibert@pobox.com>2018-02-01 10:04:01 +0100
committer Olivier Galibert <galibert@pobox.com>2018-02-12 10:04:52 +0100
commitc5219643162cb7d2a8688425a09008d28c8e2437 (patch)
treef2775ca3b1770ab0d3fb568f0bdd6d9212c68bf6 /src/mame/drivers/mcr.cpp
parent09b6ce46873b38de9030a3c0378ff327f17af881 (diff)
API change: Memory maps are now methods of the owner class [O. Galibert]
Also, a lot more freedom happened, that's going to be more visible soon.
Diffstat (limited to 'src/mame/drivers/mcr.cpp')
-rw-r--r--src/mame/drivers/mcr.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mame/drivers/mcr.cpp b/src/mame/drivers/mcr.cpp
index 5fc07e1a87b..8b001a50b87 100644
--- a/src/mame/drivers/mcr.cpp
+++ b/src/mame/drivers/mcr.cpp
@@ -691,7 +691,7 @@ WRITE8_MEMBER(mcr_state::demoderb_op4_w)
*************************************/
/* address map verified from schematics */
-static ADDRESS_MAP_START( cpu_90009_map, AS_PROGRAM, 8, mcr_state )
+ADDRESS_MAP_START(mcr_state::cpu_90009_map)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x6fff) AM_ROM
AM_RANGE(0x7000, 0x77ff) AM_MIRROR(0x0800) AM_RAM AM_SHARE("nvram")
@@ -702,7 +702,7 @@ static ADDRESS_MAP_START( cpu_90009_map, AS_PROGRAM, 8, mcr_state )
ADDRESS_MAP_END
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */
-static ADDRESS_MAP_START( cpu_90009_portmap, AS_IO, 8, mcr_state )
+ADDRESS_MAP_START(mcr_state::cpu_90009_portmap)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
SSIO_INPUT_PORTS("ssio")
@@ -720,7 +720,7 @@ ADDRESS_MAP_END
*************************************/
/* address map verified from schematics */
-static ADDRESS_MAP_START( cpu_90010_map, AS_PROGRAM, 8, mcr_state )
+ADDRESS_MAP_START(mcr_state::cpu_90010_map)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_MIRROR(0x1800) AM_RAM AM_SHARE("nvram")
@@ -729,7 +729,7 @@ static ADDRESS_MAP_START( cpu_90010_map, AS_PROGRAM, 8, mcr_state )
ADDRESS_MAP_END
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */
-static ADDRESS_MAP_START( cpu_90010_portmap, AS_IO, 8, mcr_state )
+ADDRESS_MAP_START(mcr_state::cpu_90010_portmap)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
SSIO_INPUT_PORTS("ssio")
@@ -747,7 +747,7 @@ ADDRESS_MAP_END
*************************************/
/* address map verified from schematics */
-static ADDRESS_MAP_START( cpu_91490_map, AS_PROGRAM, 8, mcr_state )
+ADDRESS_MAP_START(mcr_state::cpu_91490_map)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0xdfff) AM_ROM
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram")
@@ -757,7 +757,7 @@ static ADDRESS_MAP_START( cpu_91490_map, AS_PROGRAM, 8, mcr_state )
ADDRESS_MAP_END
/* upper I/O map determined by PAL; only SSIO ports are verified from schematics */
-static ADDRESS_MAP_START( cpu_91490_portmap, AS_IO, 8, mcr_state )
+ADDRESS_MAP_START(mcr_state::cpu_91490_portmap)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
SSIO_INPUT_PORTS("ssio")
@@ -775,14 +775,14 @@ ADDRESS_MAP_END
*************************************/
/* address map verified from schematics */
-static ADDRESS_MAP_START( ipu_91695_map, AS_PROGRAM, 8, mcr_nflfoot_state )
+ADDRESS_MAP_START(mcr_nflfoot_state::ipu_91695_map)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0xe000, 0xffff) AM_RAM
ADDRESS_MAP_END
/* I/O verified from schematics */
-static ADDRESS_MAP_START( ipu_91695_portmap, AS_IO, 8, mcr_nflfoot_state )
+ADDRESS_MAP_START(mcr_nflfoot_state::ipu_91695_portmap)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio0", z80pio_device, read, write)