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author David Haywood <hazemamewip@hotmail.com>2018-07-26 01:58:31 +0100
committer Vas Crabb <cuavas@users.noreply.github.com>2018-07-26 10:58:31 +1000
commitf3537b3b307cc6aae3ea62133420f636cce3fcf4 (patch)
treeff124e70cb9c7384b08bc26ef41a330aa5e11ecf /src/mame/drivers/hng64.cpp
parentcdee90b1a37e98bf8ca11d9971994df4b4fe1441 (diff)
tlcs870 updates (#3787)
* tlcs870 updates * basic devcb3 stuff to make a start on the ports (nw)
Diffstat (limited to 'src/mame/drivers/hng64.cpp')
-rw-r--r--src/mame/drivers/hng64.cpp37
1 files changed, 36 insertions, 1 deletions
diff --git a/src/mame/drivers/hng64.cpp b/src/mame/drivers/hng64.cpp
index 6c4df6876cc..0ca4a5ea2e2 100644
--- a/src/mame/drivers/hng64.cpp
+++ b/src/mame/drivers/hng64.cpp
@@ -1532,6 +1532,25 @@ void hng64_state::machine_reset()
reset_sound();
}
+READ8_MEMBER(hng64_state::ioport0_r) { logerror("ioport0_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport1_r) { logerror("ioport1_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport2_r) { logerror("ioport2_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport3_r) { logerror("ioport3_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport4_r) { logerror("ioport4_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport5_r) { logerror("ioport5_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport6_r) { logerror("ioport6_r\n"); return 0xff; }
+READ8_MEMBER(hng64_state::ioport7_r) { logerror("ioport7_r\n"); return 0xff; }
+
+WRITE8_MEMBER(hng64_state::ioport0_w) { logerror("ioport0_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport1_w) { logerror("ioport1_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport2_w) { logerror("ioport2_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport3_w) { logerror("ioport3_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport4_w) { logerror("ioport4_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport5_w) { logerror("ioport5_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport6_w) { logerror("ioport6_w %02x\n", data); }
+WRITE8_MEMBER(hng64_state::ioport7_w) { logerror("ioport7_w %02x\n", data); }
+
+
MACHINE_CONFIG_START(hng64_state::hng64)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", VR4300BE, HNG64_MASTER_CLOCK) // actually R4300
@@ -1557,7 +1576,23 @@ MACHINE_CONFIG_START(hng64_state::hng64)
hng64_audio(config);
hng64_network(config);
- MCFG_DEVICE_ADD("iomcu", TMP87PH40AN, 8000000)
+ tmp87ph40an_device &iomcu(TMP87PH40AN(config, m_iomcu, 8_MHz_XTAL));
+ iomcu.p0_in_cb().set(FUNC(hng64_state::ioport0_r));
+ iomcu.p1_in_cb().set(FUNC(hng64_state::ioport1_r));
+ iomcu.p2_in_cb().set(FUNC(hng64_state::ioport2_r));
+ iomcu.p3_in_cb().set(FUNC(hng64_state::ioport3_r));
+ iomcu.p4_in_cb().set(FUNC(hng64_state::ioport4_r));
+ iomcu.p5_in_cb().set(FUNC(hng64_state::ioport5_r));
+ iomcu.p6_in_cb().set(FUNC(hng64_state::ioport6_r));
+ iomcu.p7_in_cb().set(FUNC(hng64_state::ioport7_r));
+ iomcu.p0_out_cb().set(FUNC(hng64_state::ioport0_w));
+ iomcu.p1_out_cb().set(FUNC(hng64_state::ioport1_w));
+ iomcu.p2_out_cb().set(FUNC(hng64_state::ioport2_w));
+ iomcu.p3_out_cb().set(FUNC(hng64_state::ioport3_w));
+ iomcu.p4_out_cb().set(FUNC(hng64_state::ioport4_w));
+ iomcu.p5_out_cb().set(FUNC(hng64_state::ioport5_w));
+ iomcu.p6_out_cb().set(FUNC(hng64_state::ioport6_w));
+ iomcu.p7_out_cb().set(FUNC(hng64_state::ioport7_w));
MACHINE_CONFIG_END