diff options
author | Miodrag Milanovic <mmicko@gmail.com> | 2015-07-29 08:34:21 +0200 |
---|---|---|
committer | Miodrag Milanovic <mmicko@gmail.com> | 2015-07-29 08:34:21 +0200 |
commit | 1b452e3bfb48e9c77e705a60ab285c382d457e8a (patch) | |
tree | ec86ee0e176d53492a6f034a473c728cc6896ad7 /src/mame/drivers/firebeat.c | |
parent | b038bdab5ba511f2af2c23e24b3508062a42b3b3 (diff) |
Cleanups and version bumpmame0164
Diffstat (limited to 'src/mame/drivers/firebeat.c')
-rw-r--r-- | src/mame/drivers/firebeat.c | 124 |
1 files changed, 62 insertions, 62 deletions
diff --git a/src/mame/drivers/firebeat.c b/src/mame/drivers/firebeat.c index d126e31dbcf..03dfb533a06 100644 --- a/src/mame/drivers/firebeat.c +++ b/src/mame/drivers/firebeat.c @@ -227,7 +227,7 @@ READ32_MEMBER(firebeat_gcu_device::read) switch (reg) { - case 0x78: // GCU Status + case 0x78: // GCU Status /* ppd checks bits 0x0041 of the upper halfword on interrupt */ return 0xffff0005; @@ -255,96 +255,96 @@ WRITE32_MEMBER(firebeat_gcu_device::write) #endif break; - case 0x14: // ? + case 0x14: // ? break; - case 0x18: // ? + case 0x18: // ? break; - case 0x20: // Framebuffer 0 Origin(?) + case 0x20: // Framebuffer 0 Origin(?) break; - case 0x24: // Framebuffer 1 Origin(?) + case 0x24: // Framebuffer 1 Origin(?) break; - case 0x28: // Framebuffer 2 Origin(?) + case 0x28: // Framebuffer 2 Origin(?) break; - case 0x2c: // Framebuffer 3 Origin(?) + case 0x2c: // Framebuffer 3 Origin(?) break; - case 0x30: // Framebuffer 0 Dimensions + case 0x30: // Framebuffer 0 Dimensions if (ACCESSING_BITS_16_31) m_frame[0].height = (data >> 16) & 0xffff; if (ACCESSING_BITS_0_15) m_frame[0].width = data & 0xffff; break; - case 0x34: // Framebuffer 1 Dimensions + case 0x34: // Framebuffer 1 Dimensions if (ACCESSING_BITS_16_31) m_frame[1].height = (data >> 16) & 0xffff; if (ACCESSING_BITS_0_15) m_frame[1].width = data & 0xffff; break; - case 0x38: // Framebuffer 2 Dimensions + case 0x38: // Framebuffer 2 Dimensions if (ACCESSING_BITS_16_31) m_frame[2].height = (data >> 16) & 0xffff; if (ACCESSING_BITS_0_15) m_frame[2].width = data & 0xffff; break; - case 0x3c: // Framebuffer 3 Dimensions + case 0x3c: // Framebuffer 3 Dimensions if (ACCESSING_BITS_16_31) m_frame[3].height = (data >> 16) & 0xffff; if (ACCESSING_BITS_0_15) m_frame[3].width = data & 0xffff; break; - case 0x40: // Framebuffer 0 Base + case 0x40: // Framebuffer 0 Base m_frame[0].base = data; #if PRINT_GCU printf("%s FB0 Base: %08X\n", basetag(), data); #endif break; - case 0x44: // Framebuffer 1 Base + case 0x44: // Framebuffer 1 Base m_frame[1].base = data; #if PRINT_GCU printf("%s FB1 Base: %08X\n", basetag(), data); #endif break; - case 0x48: // Framebuffer 2 Base + case 0x48: // Framebuffer 2 Base m_frame[2].base = data; #if PRINT_GCU printf("%s FB2 Base: %08X\n", basetag(), data); #endif break; - case 0x4c: // Framebuffer 3 Base + case 0x4c: // Framebuffer 3 Base m_frame[3].base = data; #if PRINT_GCU printf("%s FB3 Base: %08X\n", basetag(), data); #endif break; - case 0x5c: // VRAM Read Address + case 0x5c: // VRAM Read Address m_vram_read_addr = (data & 0xffffff) / 2; break; - case 0x60: // VRAM Port 0 Write Address + case 0x60: // VRAM Port 0 Write Address m_vram_fifo0_addr = (data & 0xffffff) / 2; break; - case 0x68: // VRAM Port 0/1 Mode + case 0x68: // VRAM Port 0/1 Mode if (ACCESSING_BITS_16_31) m_vram_fifo0_mode = data >> 16; if (ACCESSING_BITS_0_15) m_vram_fifo1_mode = data & 0xffff; break; - case 0x70: // VRAM Port 0 Write FIFO + case 0x70: // VRAM Port 0 Write FIFO if (m_vram_fifo0_mode & 0x100) { // write to command fifo @@ -359,7 +359,7 @@ WRITE32_MEMBER(firebeat_gcu_device::write) m_command_fifo0_ptr = 0; } } - else + else { // write to VRAM fifo m_vram[m_vram_fifo0_addr] = data; @@ -367,12 +367,12 @@ WRITE32_MEMBER(firebeat_gcu_device::write) } break; - case 0x64: // VRAM Port 1 Write Address + case 0x64: // VRAM Port 1 Write Address m_vram_fifo1_addr = (data & 0xffffff) / 2; printf("GCU FIFO1 addr = %08X\n", data); break; - case 0x74: // VRAM Port 1 Write FIFO + case 0x74: // VRAM Port 1 Write FIFO printf("GCU FIFO1 write = %08X\n", data); if (m_vram_fifo1_mode & 0x100) @@ -388,7 +388,7 @@ WRITE32_MEMBER(firebeat_gcu_device::write) m_command_fifo1_ptr = 0; } } - else + else { // write to VRAM fifo m_vram[m_vram_fifo1_addr] = data; @@ -409,7 +409,7 @@ int firebeat_gcu_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const int x = 0; int y = 0; int width = m_frame[0].width; - int height = m_frame[0].height; + int height = m_frame[0].height; if (width != 0 && height != 0) { @@ -430,15 +430,15 @@ int firebeat_gcu_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const int li = ((j+y) * fb_pitch) + x; UINT32 fbaddr0 = m_frame[0].base + li; UINT32 fbaddr1 = m_frame[1].base + li; -// UINT32 fbaddr2 = m_frame[2].base + li; -// UINT32 fbaddr3 = m_frame[3].base + li; +// UINT32 fbaddr2 = m_frame[2].base + li; +// UINT32 fbaddr3 = m_frame[3].base + li; for (int i=0; i < width; i++) { UINT16 pix0 = vram16[fbaddr0 ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0)]; UINT16 pix1 = vram16[fbaddr1 ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0)]; -// UINT16 pix2 = vram16[fbaddr2 ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0)]; -// UINT16 pix3 = vram16[fbaddr3 ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0)]; +// UINT16 pix2 = vram16[fbaddr2 ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0)]; +// UINT16 pix3 = vram16[fbaddr3 ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0)]; if (pix0 & 0x8000) { @@ -451,8 +451,8 @@ int firebeat_gcu_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const fbaddr0++; fbaddr1++; -// fbaddr2++; -// fbaddr3++; +// fbaddr2++; +// fbaddr3++; } } @@ -493,7 +493,7 @@ void firebeat_gcu_device::draw_object(UINT32 *cmd) UINT32 address = cmd[0] & 0xffffff; int alpha_level = (cmd[2] >> 27) & 0x1f; bool relative_coords = (cmd[0] & 0x10000000) ? true : false; - + if (relative_coords) { x += m_fb_origin_x; @@ -522,7 +522,7 @@ void firebeat_gcu_device::draw_object(UINT32 *cmd) int index; int xinc; UINT32 fbaddr = ((j+y) * fb_pitch) + x; - + if (yflip) { index = address + ((height - 1 - (v >> 6)) * 1024); @@ -592,7 +592,7 @@ void firebeat_gcu_device::draw_object(UINT32 *cmd) void firebeat_gcu_device::fill_rect(UINT32 *cmd) { - // 0x00: xxx----- -------- -------- -------- command (4) + // 0x00: xxx----- -------- -------- -------- command (4) // 0x00: ---x---- -------- -------- -------- 0: absolute coordinates // 1: relative coordinates from framebuffer origin // 0x00: ----xx-- -------- -------- -------- ? @@ -742,30 +742,30 @@ void firebeat_gcu_device::execute_display_list(UINT32 addr) switch (command) { - case 0: // NOP? + case 0: // NOP? break; - case 1: // Execute display list + case 1: // Execute display list execute_display_list(cmd[0] & 0xffffff); break; - case 2: // End of display list + case 2: // End of display list end = true; break; - case 3: // Framebuffer config + case 3: // Framebuffer config fb_config(cmd); break; - case 4: // Fill rectangle + case 4: // Fill rectangle fill_rect(cmd); break; - case 5: // Draw object + case 5: // Draw object draw_object(cmd); break; - case 7: // Draw 8x8 character (2 bits per pixel) + case 7: // Draw 8x8 character (2 bits per pixel) draw_character(cmd); break; @@ -787,29 +787,29 @@ void firebeat_gcu_device::execute_command(UINT32* cmd) switch (command) { - case 0: // NOP? + case 0: // NOP? break; - case 1: // Execute display list + case 1: // Execute display list execute_display_list(cmd[0] & 0xffffff); break; - case 2: // End of display list + case 2: // End of display list break; - case 3: // Framebuffer config + case 3: // Framebuffer config fb_config(cmd); break; - case 4: // Fill rectangle + case 4: // Fill rectangle fill_rect(cmd); break; - case 5: // Draw object + case 5: // Draw object draw_object(cmd); break; - case 7: // Draw 8x8 character (2 bits per pixel) + case 7: // Draw 8x8 character (2 bits per pixel) draw_character(cmd); break; @@ -851,7 +851,7 @@ void firebeat_gcu_device::device_stop() printf("dumping %s\n", filename); FILE *file = fopen(filename, "wb"); int i; - + for (i=0; i < 0x2000000/4; i++) { fputc((m_vram[i] >> 24) & 0xff, file); @@ -859,7 +859,7 @@ void firebeat_gcu_device::device_stop() fputc((m_vram[i] >> 8) & 0xff, file); fputc((m_vram[i] >> 0) & 0xff, file); } - + fclose(file); #endif } @@ -1594,7 +1594,7 @@ READ32_MEMBER(firebeat_state::ppc_spu_share_r) { r |= m_spu_shared_ram[(offset * 4) + 3] << 0; - if (offset == 0xff) // address 0x3ff clears PPC interrupt + if (offset == 0xff) // address 0x3ff clears PPC interrupt { m_maincpu->set_input_line(INPUT_LINE_IRQ3, CLEAR_LINE); } @@ -1621,7 +1621,7 @@ WRITE32_MEMBER(firebeat_state::ppc_spu_share_w) { m_spu_shared_ram[(offset * 4) + 2] = (data >> 8) & 0xff; - if (offset == 0xff) // address 0x3fe triggers M68K interrupt + if (offset == 0xff) // address 0x3fe triggers M68K interrupt { m_audiocpu->set_input_line(INPUT_LINE_IRQ4, ASSERT_LINE); } @@ -1637,11 +1637,11 @@ WRITE32_MEMBER(firebeat_state::ppc_spu_share_w) IRQ1: ? IRQ2: Timer? - - IRQ4: Dual-port RAM mailbox (when PPC writes to 0x3FE) - Handles commands from PPC (bytes 0x00 and 0x01) - - IRQ6: ATA + + IRQ4: Dual-port RAM mailbox (when PPC writes to 0x3FE) + Handles commands from PPC (bytes 0x00 and 0x01) + + IRQ6: ATA */ READ16_MEMBER(firebeat_state::m68k_spu_share_r) @@ -1655,7 +1655,7 @@ READ16_MEMBER(firebeat_state::m68k_spu_share_r) { r |= m_spu_shared_ram[offset]; - if (offset == 0x3fe) // address 0x3fe clears M68K interrupt + if (offset == 0x3fe) // address 0x3fe clears M68K interrupt { m_audiocpu->set_input_line(INPUT_LINE_IRQ4, CLEAR_LINE); } @@ -1672,7 +1672,7 @@ WRITE16_MEMBER(firebeat_state::m68k_spu_share_w) { m_spu_shared_ram[offset] = data & 0xff; - if (offset == 0x3ff) // address 0x3ff triggers PPC interrupt + if (offset == 0x3ff) // address 0x3ff triggers PPC interrupt { m_maincpu->set_input_line(INPUT_LINE_IRQ3, ASSERT_LINE); } @@ -1684,7 +1684,7 @@ READ16_MEMBER(firebeat_state::spu_unk_r) // dipswitches? UINT16 r = 0; - r |= 0x80; // if set, uses ATA PIO mode, otherwise DMA + r |= 0x80; // if set, uses ATA PIO mode, otherwise DMA return r; } @@ -1760,7 +1760,7 @@ static ADDRESS_MAP_START( spu_map, AS_PROGRAM, 16, firebeat_state ) AM_RANGE(0x280000, 0x2807ff) AM_READWRITE(m68k_spu_share_r, m68k_spu_share_w) AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("spu_ata", ata_interface_device, read_cs0, write_cs0) AM_RANGE(0x340000, 0x34000f) AM_DEVREADWRITE("spu_ata", ata_interface_device, read_cs1, write_cs1) - AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rf5c400", rf5c400_device, rf5c400_r, rf5c400_w) + AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rf5c400", rf5c400_device, rf5c400_r, rf5c400_w) ADDRESS_MAP_END /*****************************************************************************/ @@ -2503,7 +2503,7 @@ ROM_END // Beatmania III has a different BIOS and SPU program, and they aren't dumped yet ROM_START( bm37th ) ROM_REGION32_BE(0x80000, "user1", 0) - ROM_LOAD16_WORD_SWAP("974a03.21e", 0x00000, 0x80000, BAD_DUMP CRC(ef9a932d) SHA1(6299d3b9823605e519dbf1f105b59a09197df72f)) // boots with KBM BIOS + ROM_LOAD16_WORD_SWAP("974a03.21e", 0x00000, 0x80000, BAD_DUMP CRC(ef9a932d) SHA1(6299d3b9823605e519dbf1f105b59a09197df72f)) // boots with KBM BIOS ROM_REGION(0xc0, "user2", ROMREGION_ERASE00) // Security dongle ROM_LOAD( "gcb07-jc", 0x000000, 0x0000c0, CRC(16115b6a) SHA1(dcb2a3346973941a946b2cdfd31a5a761f666ca3) ) @@ -2522,7 +2522,7 @@ ROM_END ROM_START( bm3final ) ROM_REGION32_BE(0x80000, "user1", 0) - ROM_LOAD16_WORD_SWAP("974a03.21e", 0x00000, 0x80000, BAD_DUMP CRC(ef9a932d) SHA1(6299d3b9823605e519dbf1f105b59a09197df72f)) // boots with KBM BIOS + ROM_LOAD16_WORD_SWAP("974a03.21e", 0x00000, 0x80000, BAD_DUMP CRC(ef9a932d) SHA1(6299d3b9823605e519dbf1f105b59a09197df72f)) // boots with KBM BIOS ROM_REGION(0xc0, "user2", ROMREGION_ERASE00) // Security dongle ROM_LOAD( "gcc01-jc", 0x000000, 0x0000c0, CRC(9c49fed8) SHA1(212b87c1d25763117611ffb2a36ed568d429d2f4) ) |