diff options
author | Aaron Giles <aaron@aarongiles.com> | 2011-04-01 06:50:56 +0000 |
---|---|---|
committer | Aaron Giles <aaron@aarongiles.com> | 2011-04-01 06:50:56 +0000 |
commit | 8409f7d3233f0dd5d211f68e564ca4ebb662f8bf (patch) | |
tree | 3edea78fc971015d4b0799f6c5999657685df573 /src/mame/drivers/cischeat.c | |
parent | 86afc9b913dd13338a8888f27bb13d1548ef8f33 (diff) |
Final bulk rename for 0.142: ensure that all members of
driver_device classes have an m_ prefix on them. When we
eventually move functions using these into member functions,
we will be able to remove the state-> pointers, and having
the member variables prefixed will allow them to be
distinguished from local variables.
Some regex'es used (plus manually fixing the remaining stuff):
In src/mame/...
state->([a-zA-Z_][^_][a-zA-Z0-9_]*)
state->m_\1
state->([^m]_[a-zA-Z0-9_]*)
state->m_\1
state->m_save_item
state->save_item
state->m_save_pointer
state->save_pointer
(AM_BASE_MEMBER *\( *[a-zA-Z0-9_]+ *, *)([a-zA-Z_][^_])
\1m_\2
(AM_BASE_SIZE_MEMBER *\( *[a-zA-Z0-9_]+ *, *)([a-zA-Z_][^_][a-zA-Z0-9_]* *, *)([a-zA-Z_][^_])
\1m_\2m_\3
(AM_SIZE_MEMBER *\( *[a-zA-Z0-9_]+ *, *)([a-zA-Z_][^_])
\1m_\2
m__
m_
In src/mame/includes/...
(\t[a-zA-Z0-9_<>]+[ \t]+[&*]*[ \t]*)([a-zA-Z_][^_][][a-zA-Z0-9_]*;)$
\1m_\2
(\t[a-zA-Z0-9_<>]+[ \t]*[&*]*[ \t]+)([a-zA-Z_][^_][][a-zA-Z0-9_]*;)$
\1m_\2
Diffstat (limited to 'src/mame/drivers/cischeat.c')
-rw-r--r-- | src/mame/drivers/cischeat.c | 148 |
1 files changed, 74 insertions, 74 deletions
diff --git a/src/mame/drivers/cischeat.c b/src/mame/drivers/cischeat.c index 7ca7c470038..5272025fa89 100644 --- a/src/mame/drivers/cischeat.c +++ b/src/mame/drivers/cischeat.c @@ -189,43 +189,43 @@ Cisco Heat. static READ16_HANDLER( sharedram1_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->sharedram1[offset]; + return state->m_sharedram1[offset]; } static READ16_HANDLER( sharedram2_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->sharedram2[offset]; + return state->m_sharedram2[offset]; } static WRITE16_HANDLER( sharedram1_w ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - COMBINE_DATA(&state->sharedram1[offset]); + COMBINE_DATA(&state->m_sharedram1[offset]); } static WRITE16_HANDLER( sharedram2_w ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - COMBINE_DATA(&state->sharedram2[offset]); + COMBINE_DATA(&state->m_sharedram2[offset]); } static READ16_HANDLER( rom_1_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->rom_1[offset]; + return state->m_rom_1[offset]; } static READ16_HANDLER( rom_2_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->rom_2[offset]; + return state->m_rom_2[offset]; } static READ16_HANDLER( rom_3_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->rom_3[offset]; + return state->m_rom_3[offset]; } @@ -256,19 +256,19 @@ static WRITE16_HANDLER( bigrun_paletteram16_w ) static ADDRESS_MAP_START( bigrun_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM - AM_RANGE(0x080000, 0x083fff) AM_READWRITE(bigrun_vregs_r, bigrun_vregs_w) AM_BASE_MEMBER(cischeat_state, vregs) // Vregs + AM_RANGE(0x080000, 0x083fff) AM_READWRITE(bigrun_vregs_r, bigrun_vregs_w) AM_BASE_MEMBER(cischeat_state, m_vregs) // Vregs AM_RANGE(0x084000, 0x087fff) AM_RAM // Linking with other units - AM_RANGE(0x088000, 0x08bfff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, sharedram2) // Sharedram with sub CPU#2 - AM_RANGE(0x08c000, 0x08ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, sharedram1) // Sharedram with sub CPU#1 + AM_RANGE(0x088000, 0x08bfff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, m_sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x08c000, 0x08ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, m_sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x090000, 0x093fff) AM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, scrollram[0]) // Scroll ram 0 - AM_RANGE(0x094000, 0x097fff) AM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, scrollram[1]) // Scroll ram 1 - AM_RANGE(0x098000, 0x09bfff) AM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, scrollram[2]) // Scroll ram 2 + AM_RANGE(0x090000, 0x093fff) AM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x094000, 0x097fff) AM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x098000, 0x09bfff) AM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[2]) // Scroll ram 2 AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes - AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, ram) // RAM + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_ram) // RAM AM_RANGE(0x100000, 0x13ffff) AM_READ(rom_1_r) // ROM ADDRESS_MAP_END @@ -309,7 +309,7 @@ static WRITE16_HANDLER( cischeat_paletteram16_w ) static ADDRESS_MAP_START( cischeat_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM - AM_RANGE(0x080000, 0x087fff) AM_READWRITE(cischeat_vregs_r, cischeat_vregs_w) AM_BASE_MEMBER(cischeat_state, vregs) // Vregs + AM_RANGE(0x080000, 0x087fff) AM_READWRITE(cischeat_vregs_r, cischeat_vregs_w) AM_BASE_MEMBER(cischeat_state, m_vregs) // Vregs AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units /* Only the first 0x800 bytes are tested but: @@ -318,18 +318,18 @@ static ADDRESS_MAP_START( cischeat_map, AS_PROGRAM, 16 ) No mem access error from the other CPU's, though.. */ /* this is the right order of sharedram's */ - AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, sharedram2) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, sharedram1) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, m_sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, m_sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, scrollram[0]) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, scrollram[1]) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, scrollram[2]) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[2]) // Scroll ram 2 AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes - AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, ram) // RAM + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_ram) // RAM AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM ADDRESS_MAP_END @@ -369,21 +369,21 @@ static WRITE16_HANDLER( f1gpstar_paletteram16_w ) static ADDRESS_MAP_START( f1gpstar_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM - AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstar_vregs_r, f1gpstar_vregs_w) AM_BASE_MEMBER(cischeat_state, vregs) // Vregs + AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstar_vregs_r, f1gpstar_vregs_w) AM_BASE_MEMBER(cischeat_state, m_vregs) // Vregs AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units - AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, sharedram2) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, sharedram1) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, m_sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, m_sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, scrollram[0]) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, scrollram[1]) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, scrollram[2]) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[2]) // Scroll ram 2 AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes - AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, ram) // RAM + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_ram) // RAM AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM ADDRESS_MAP_END @@ -395,21 +395,21 @@ ADDRESS_MAP_END // Same as f1gpstar, but vregs are slightly different: static ADDRESS_MAP_START( f1gpstr2_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM - AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstr2_vregs_r, f1gpstr2_vregs_w) AM_BASE_MEMBER(cischeat_state, vregs) // Vregs (slightly different from f1gpstar) + AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstr2_vregs_r, f1gpstr2_vregs_w) AM_BASE_MEMBER(cischeat_state, m_vregs) // Vregs (slightly different from f1gpstar) AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units - AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, sharedram2) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram2_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, sharedram1) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE_MEMBER(cischeat_state, m_sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram2_r, sharedram1_w) AM_BASE_MEMBER(cischeat_state, m_sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, scrollram[0]) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, scrollram[1]) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, scrollram[2]) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[2]) // Scroll ram 2 AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes - AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, ram) // RAM + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_ram) // RAM AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM ADDRESS_MAP_END @@ -447,7 +447,7 @@ static WRITE16_HANDLER( scudhamm_paletteram16_w ) READ16_HANDLER( scudhamm_motor_status_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->scudhamm_motor_command; // Motor Status + return state->m_scudhamm_motor_command; // Motor Status } @@ -468,7 +468,7 @@ READ16_HANDLER( scudhamm_motor_pos_r ) static WRITE16_HANDLER( scudhamm_motor_command_w ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - COMBINE_DATA( &state->scudhamm_motor_command ); + COMBINE_DATA( &state->m_scudhamm_motor_command ); } @@ -477,13 +477,13 @@ READ16_HANDLER( scudhamm_analog_r ) cischeat_state *state = space->machine().driver_data<cischeat_state>(); int i=input_port_read(space->machine(), "IN1"),j; - if ((i^state->prev)&0x4000) { - if (i<state->prev) state->prev-=0x8000; - else state->prev+=0x8000; + if ((i^state->m_prev)&0x4000) { + if (i<state->m_prev) state->m_prev-=0x8000; + else state->m_prev+=0x8000; } - j=i-state->prev; - state->prev=i; + j=i-state->m_prev; + state->m_prev=i; /* effect of hammer collision 'accelerometer': $00 - $09 - no hit @@ -538,11 +538,11 @@ static WRITE16_HANDLER( scudhamm_oki_bank_w ) static ADDRESS_MAP_START( scudhamm_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM - AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE_MEMBER(cischeat_state, vregs) // Video Registers + RAM - AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, scrollram[0]) // Scroll RAM 0 - AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, scrollram[2]) // Scroll RAM 2 + AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE_MEMBER(cischeat_state, m_vregs) // Video Registers + RAM + AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[0]) // Scroll RAM 0 + AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[2]) // Scroll RAM 2 AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palette - AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, ram) // Work RAM + Spriteram + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_ram) // Work RAM + Spriteram AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w) // Sound AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(scudhamm_leds_w) // Buttons AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8_MODERN("oki1", okim6295_device, read, write, 0x00ff) // Sound @@ -567,7 +567,7 @@ static READ16_HANDLER( armchmp2_motor_status_r ) static WRITE16_HANDLER( armchmp2_motor_command_w ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - COMBINE_DATA( &state->scudhamm_motor_command ); + COMBINE_DATA( &state->m_scudhamm_motor_command ); } static READ16_HANDLER( armchmp2_analog_r ) @@ -575,10 +575,10 @@ static READ16_HANDLER( armchmp2_analog_r ) cischeat_state *state = space->machine().driver_data<cischeat_state>(); int armdelta; - armdelta = input_port_read(space->machine(), "IN1") - state->armold; - state->armold = input_port_read(space->machine(), "IN1"); + armdelta = input_port_read(space->machine(), "IN1") - state->m_armold; + state->m_armold = input_port_read(space->machine(), "IN1"); - return ~( state->scudhamm_motor_command + armdelta ); // + x : x<=0 and player loses, x>0 and player wins + return ~( state->m_scudhamm_motor_command + armdelta ); // + x : x<=0 and player loses, x>0 and player wins } static READ16_HANDLER( armchmp2_buttons_r ) @@ -621,11 +621,11 @@ static WRITE16_HANDLER( armchmp2_leds_w ) static ADDRESS_MAP_START( armchmp2_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM - AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE_MEMBER(cischeat_state, vregs) // Video Registers + RAM - AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, scrollram[0]) // Scroll RAM 0 - AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, scrollram[2]) // Scroll RAM 2 + AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE_MEMBER(cischeat_state, m_vregs) // Video Registers + RAM + AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[0]) // Scroll RAM 0 + AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_BASE_MEMBER(cischeat_state, m_scrollram[2]) // Scroll RAM 2 AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palette - AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, ram) // Work RAM + Spriteram + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_ram) // Work RAM + Spriteram AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2") AM_WRITE(scudhamm_oki_bank_w) // DSW + Sound AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3") // DSW AM_RANGE(0x100008, 0x100009) AM_READWRITE(armchmp2_buttons_r, armchmp2_leds_w) // Leds + Coin Counters + Buttons + Sensors @@ -651,14 +651,14 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( bigrun_map2, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram1_r, sharedram1_w) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, roadram[0]) // Road RAM + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_roadram[0]) // Road RAM AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM ADDRESS_MAP_END static ADDRESS_MAP_START( bigrun_map3, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram2_r, sharedram2_w) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, roadram[1]) // Road RAM + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_roadram[1]) // Road RAM AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM ADDRESS_MAP_END @@ -670,7 +670,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( cischeat_map2, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram1_r, sharedram1_w) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, roadram[0]) // Road RAM + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_roadram[0]) // Road RAM AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_2_r) // ROM @@ -679,7 +679,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( cischeat_map3, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram2_r, sharedram2_w) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, roadram[1]) // Road RAM + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_roadram[1]) // Road RAM AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_3_r) // ROM @@ -694,7 +694,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( f1gpstar_map2, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM AM_RANGE(0x080000, 0x0807ff) AM_READWRITE(sharedram1_r, sharedram1_w) // Shared RAM (with Main CPU) - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE_MEMBER(cischeat_state, roadram[0]) // Road RAM + AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_roadram[0]) // Road RAM AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM AM_RANGE(0x200000, 0x200001) AM_WRITENOP // watchdog ADDRESS_MAP_END @@ -702,7 +702,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( f1gpstar_map3, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM AM_RANGE(0x080000, 0x0807ff) AM_READWRITE(sharedram2_r, sharedram2_w) // Shared RAM (with Main CPU) - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE_MEMBER(cischeat_state, roadram[1]) // Road RAM + AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE_MEMBER(cischeat_state, m_roadram[1]) // Road RAM AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM AM_RANGE(0x200000, 0x200001) AM_WRITENOP // watchdog ADDRESS_MAP_END @@ -811,19 +811,19 @@ ADDRESS_MAP_END static READ16_HANDLER ( f1gpstr2_io_r ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - return state->vregs[offset + 0x1000/2]; + return state->m_vregs[offset + 0x1000/2]; } static WRITE16_HANDLER( f1gpstr2_io_w ) { cischeat_state *state = space->machine().driver_data<cischeat_state>(); - COMBINE_DATA(&state->vregs[offset + 0x1000/2]); + COMBINE_DATA(&state->m_vregs[offset + 0x1000/2]); } static ADDRESS_MAP_START( f1gpstr2_io_map, AS_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM AM_RANGE(0x080000, 0x080fff) AM_READWRITE(f1gpstr2_io_r, f1gpstr2_io_w) // - AM_RANGE(0x100000, 0x100001) AM_WRITEONLY AM_BASE_MEMBER(cischeat_state, f1gpstr2_ioready) // + AM_RANGE(0x100000, 0x100001) AM_WRITEONLY AM_BASE_MEMBER(cischeat_state, m_f1gpstr2_ioready) // AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM AM_RANGE(0x200000, 0x200001) AM_WRITENOP // ADDRESS_MAP_END @@ -1989,7 +1989,7 @@ static DRIVER_INIT( bigrun ) { cischeat_state *state = machine.driver_data<cischeat_state>(); /* Split ROMs */ - state->rom_1 = (UINT16 *) machine.region("user1")->base(); + state->m_rom_1 = (UINT16 *) machine.region("user1")->base(); cischeat_untangle_sprites(machine, "gfx4"); // Untangle sprites phantasm_rom_decode(machine, "soundcpu"); // Decrypt sound cpu code @@ -2112,17 +2112,17 @@ static DRIVER_INIT( cischeat ) { cischeat_state *state = machine.driver_data<cischeat_state>(); /* Split ROMs */ - state->rom_1 = (UINT16 *) (machine.region("user1")->base() + 0x00000); - state->rom_2 = (UINT16 *) (machine.region("cpu2")->base() + 0x40000); - state->rom_3 = (UINT16 *) (machine.region("cpu3")->base() + 0x40000); + state->m_rom_1 = (UINT16 *) (machine.region("user1")->base() + 0x00000); + state->m_rom_2 = (UINT16 *) (machine.region("cpu2")->base() + 0x40000); + state->m_rom_3 = (UINT16 *) (machine.region("cpu3")->base() + 0x40000); - memcpy(machine.region("user1")->base() + 0x80000, state->rom_2, 0x40000); - memset(state->rom_2, 0, 0x40000); - state->rom_2 = (UINT16 *) (machine.region("user1")->base() + 0x80000); + memcpy(machine.region("user1")->base() + 0x80000, state->m_rom_2, 0x40000); + memset(state->m_rom_2, 0, 0x40000); + state->m_rom_2 = (UINT16 *) (machine.region("user1")->base() + 0x80000); - memcpy(machine.region("user1")->base() + 0xc0000, state->rom_3, 0x40000); - memset(state->rom_3, 0, 0x40000); - state->rom_3 = (UINT16 *) (machine.region("user1")->base() + 0xc0000); + memcpy(machine.region("user1")->base() + 0xc0000, state->m_rom_3, 0x40000); + memset(state->m_rom_3, 0, 0x40000); + state->m_rom_3 = (UINT16 *) (machine.region("user1")->base() + 0xc0000); cischeat_untangle_sprites(machine, "gfx4"); // Untangle sprites astyanax_rom_decode(machine, "soundcpu"); // Decrypt sound cpu code @@ -2340,7 +2340,7 @@ static DRIVER_INIT( f1gpstar ) { cischeat_state *state = machine.driver_data<cischeat_state>(); /* Split ROMs */ - state->rom_1 = (UINT16 *) machine.region("user1")->base(); + state->m_rom_1 = (UINT16 *) machine.region("user1")->base(); cischeat_untangle_sprites(machine, "gfx4"); } |