summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame/drivers/candela.cpp
diff options
context:
space:
mode:
author Olivier Galibert <galibert@pobox.com>2018-01-07 22:20:14 +0100
committer Olivier Galibert <galibert@pobox.com>2018-01-17 16:11:18 +0100
commitd469cc04bcace0f601802301caeddc5b473b75f2 (patch)
treea9d71540c9c69cee5ab3a533476b81833fa02f5f /src/mame/drivers/candela.cpp
parent9f383f76ce6f00cc3320e5ba53dc323781e0077b (diff)
API Change: Machine configs are now a method of the owner class, and the prototype is simplified [O. Galibert]
Beware, the device context does not follow in MCFG_FRAGMENT_ADD anymore due to the prototype change. So creating a device then configuring through a fragment doesn't work as-is. The simplest solution is just to add a MCFG_DEVICE_MODIFY at the start of the fragment with the correct tag.
Diffstat (limited to 'src/mame/drivers/candela.cpp')
-rw-r--r--src/mame/drivers/candela.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mame/drivers/candela.cpp b/src/mame/drivers/candela.cpp
index 37822ffba6a..b182664a634 100644
--- a/src/mame/drivers/candela.cpp
+++ b/src/mame/drivers/candela.cpp
@@ -155,6 +155,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( syspia_cb2_w);
DECLARE_WRITE_LINE_MEMBER( usrpia_cb2_w);
DECLARE_WRITE_LINE_MEMBER (write_acia_clock);
+ void can09t(machine_config &config);
protected:
required_device<pia6821_device> m_syspia;
required_device<pia6821_device> m_usrpia;
@@ -509,6 +510,7 @@ public:
DECLARE_WRITE8_MEMBER( pia1_B_w );
DECLARE_WRITE_LINE_MEMBER( pia1_cb2_w);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ void can09(machine_config &config);
protected:
required_device<pia6821_device> m_pia1;
required_device<ram_device> m_ram;
@@ -660,7 +662,7 @@ DEVICE_INPUT_DEFAULTS_END
#define CAN09T_BAUDGEN_CLOCK XTAL_1_8432MHz
#define CAN09T_ACIA_CLOCK (CAN09T_BAUDGEN_CLOCK / 12)
-static MACHINE_CONFIG_START( can09t )
+MACHINE_CONFIG_START(can09t_state::can09t)
MCFG_CPU_ADD("maincpu", MC6809, XTAL_4_9152MHz) // IPL crystal
MCFG_CPU_PROGRAM_MAP(can09t_map)
@@ -704,7 +706,7 @@ MACHINE_CONFIG_END
#define CAN09_X1_CLOCK XTAL_22_1184MHz /* UKI 22118.40 Khz */
#define CAN09_CPU_CLOCK (CAN09_X1_CLOCK / 16) /* ~1.38MHz Divider needs to be check but is the most likelly */
-static MACHINE_CONFIG_START( can09 )
+MACHINE_CONFIG_START(can09_state::can09)
MCFG_CPU_ADD("maincpu", MC6809E, CAN09_CPU_CLOCK) // MC68A09EP
MCFG_CPU_PROGRAM_MAP(can09_map)