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author Vas Crabb <vas@vastheman.com>2020-08-23 11:13:56 +1000
committer Vas Crabb <vas@vastheman.com>2020-08-23 11:13:56 +1000
commit164ef47ad2a2db22b599f42b5cf5cccde98323b7 (patch)
treeaf8848d4eba614fb27e6ec6fc022fb69ee100b0a /src/mame/audio
parent9be5a580607e56aac2b427621fa8a1f29745287e (diff)
srcclean for 0.224
Diffstat (limited to 'src/mame/audio')
-rw-r--r--src/mame/audio/mw8080bw.cpp22
-rw-r--r--src/mame/audio/nl_astrob.cpp206
-rw-r--r--src/mame/audio/nl_carpolo.cpp8
-rw-r--r--src/mame/audio/nl_elim.cpp222
-rw-r--r--src/mame/audio/nl_fireone.cpp126
-rw-r--r--src/mame/audio/nl_segaspeech.cpp6
-rw-r--r--src/mame/audio/nl_segausb.cpp198
-rw-r--r--src/mame/audio/nl_spacfury.cpp170
-rw-r--r--src/mame/audio/nl_starcrus.cpp12
-rw-r--r--src/mame/audio/nl_starfire.cpp116
-rw-r--r--src/mame/audio/nl_tankbatt.cpp12
-rw-r--r--src/mame/audio/segaspeech.h2
12 files changed, 550 insertions, 550 deletions
diff --git a/src/mame/audio/mw8080bw.cpp b/src/mame/audio/mw8080bw.cpp
index dbba34bfb95..55f8faedddf 100644
--- a/src/mame/audio/mw8080bw.cpp
+++ b/src/mame/audio/mw8080bw.cpp
@@ -3737,24 +3737,24 @@ void zzzap_common_audio_device::device_add_mconfig(machine_config &config)
.add_route(ALL_OUTPUTS, "mono", 1.0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit0",
- "I_PEDAL_BIT0", 0);
+ "I_PEDAL_BIT0", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit1",
- "I_PEDAL_BIT1", 0);
+ "I_PEDAL_BIT1", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit2",
- "I_PEDAL_BIT2", 0);
+ "I_PEDAL_BIT2", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit3",
- "I_PEDAL_BIT3", 0);
+ "I_PEDAL_BIT3", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:hi_shift",
- "I_HI_SHIFT", 0);
+ "I_HI_SHIFT", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:lo_shift",
- "I_LO_SHIFT", 0);
+ "I_LO_SHIFT", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:boom", "I_BOOM", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:engine_sound_off",
- "I_ENGINE_SOUND_OFF", 0);
+ "I_ENGINE_SOUND_OFF", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_1",
- "I_NOISE_CR_1", 0);
+ "I_NOISE_CR_1", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_2",
- "I_NOISE_CR_2", 0);
+ "I_NOISE_CR_2", 0);
// The audio output is taken from an LM3900 op-amp whose
// output has a peak-to-peak range of about 5 volts, centered
@@ -3786,13 +3786,13 @@ void zzzap_common_audio_device::device_start()
zzzap_audio_device::zzzap_audio_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) :
- zzzap_common_audio_device(mconfig, ZZZAP_AUDIO, tag, owner, clock, NETLIST_NAME(280zzzap))
+ zzzap_common_audio_device(mconfig, ZZZAP_AUDIO, tag, owner, clock, NETLIST_NAME(280zzzap))
{
}
lagunar_audio_device::lagunar_audio_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) :
- zzzap_common_audio_device(mconfig, LAGUNAR_AUDIO, tag, owner, clock, NETLIST_NAME(lagunar))
+ zzzap_common_audio_device(mconfig, LAGUNAR_AUDIO, tag, owner, clock, NETLIST_NAME(lagunar))
{
}
diff --git a/src/mame/audio/nl_astrob.cpp b/src/mame/audio/nl_astrob.cpp
index 90d3d6c98ed..2d5a5894c52 100644
--- a/src/mame/audio/nl_astrob.cpp
+++ b/src/mame/audio/nl_astrob.cpp
@@ -74,9 +74,9 @@ NETLIST_START(astrob)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 4e-5)
#if (SIMPLIFY_SONAR)
- PARAM(Solver.Solver_54.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
+ PARAM(Solver.Solver_54.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
#else
- PARAM(Solver.Solver_40.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
+ PARAM(Solver.Solver_40.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
#endif
#else
SOLVER(Solver, 48000)
@@ -171,7 +171,7 @@ NETLIST_START(astrob)
RES(R16, RES_K(10))
RES(R17, RES_K(10))
RES(R18, RES_M(2.7))
-// RES(R19, RES_K(1))
+// RES(R19, RES_K(1))
RES(R20, RES_M(1))
RES(R21, RES_K(100))
RES(R22, RES_K(470))
@@ -188,11 +188,11 @@ NETLIST_START(astrob)
RES(R33, RES_K(39))
RES(R34, RES_K(4.7))
RES(R35, RES_K(4.7))
- RES(R36, RES_K(100.1)) // part of SONAR circuit that relies on subtle part differences
- RES(R37, RES_K(1.51)) // part of SONAR circuit that relies on subtle part differences
- RES(R38, RES_K(330.1)) // part of SONAR circuit that relies on subtle part differences
- RES(R39, RES_K(10.1)) // part of SONAR circuit that relies on subtle part differences
- RES(R40, RES_K(68.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R36, RES_K(100.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R37, RES_K(1.51)) // part of SONAR circuit that relies on subtle part differences
+ RES(R38, RES_K(330.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R39, RES_K(10.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R40, RES_K(68.1)) // part of SONAR circuit that relies on subtle part differences
RES(R41, RES_K(10))
RES(R42, RES_K(100))
RES(R43, RES_K(470))
@@ -214,11 +214,11 @@ NETLIST_START(astrob)
RES(R59, RES_K(100))
RES(R60, RES_K(10))
RES(R61, RES_K(100))
- RES(R62, RES_K(99.9)) // part of SONAR circuit that relies on subtle part differences
- RES(R63, RES_K(1.49)) // part of SONAR circuit that relies on subtle part differences
- RES(R64, RES_K(329.9)) // part of SONAR circuit that relies on subtle part differences
- RES(R65, RES_K(9.9)) // part of SONAR circuit that relies on subtle part differences
- RES(R66, RES_K(67.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R62, RES_K(99.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R63, RES_K(1.49)) // part of SONAR circuit that relies on subtle part differences
+ RES(R64, RES_K(329.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R65, RES_K(9.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R66, RES_K(67.9)) // part of SONAR circuit that relies on subtle part differences
RES(R67, RES_K(10))
RES(R68, RES_K(82))
RES(R69, RES_K(470))
@@ -243,11 +243,11 @@ NETLIST_START(astrob)
RES(R88, RES_K(100))
RES(R89, RES_K(10))
RES(R90, RES_K(100))
- RES(R91, RES_K(100.2)) // part of SONAR circuit that relies on subtle part differences
- RES(R92, RES_K(1.52)) // part of SONAR circuit that relies on subtle part differences
- RES(R93, RES_K(330.2)) // part of SONAR circuit that relies on subtle part differences
- RES(R94, RES_K(10.2)) // part of SONAR circuit that relies on subtle part differences
- RES(R95, RES_K(68.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R91, RES_K(100.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R92, RES_K(1.52)) // part of SONAR circuit that relies on subtle part differences
+ RES(R93, RES_K(330.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R94, RES_K(10.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R95, RES_K(68.2)) // part of SONAR circuit that relies on subtle part differences
RES(R96, RES_K(10))
RES(R97, RES_K(4.7))
RES(R98, RES_M(1))
@@ -267,16 +267,16 @@ NETLIST_START(astrob)
RES(R112, RES_K(10))
RES(R113, RES_K(10))
RES(R114, 100)
-// RES(R115, RES_K(100)) -- part of final amp (not emulated)
-// RES(R116, RES_K(470)) -- part of final amp (not emulated)
+// RES(R115, RES_K(100)) -- part of final amp (not emulated)
+// RES(R116, RES_K(470)) -- part of final amp (not emulated)
RES(R117, RES_K(1))
RES(R118, RES_K(470))
RES(R119, RES_K(470))
RES(R120, RES_K(220))
RES(R121, RES_K(10))
RES(R122, RES_K(4.7))
-// RES(R123, RES_K(1)) -- part of final amp (not emulated)
-// RES(R124, RES_K(100)) -- part of final amp (not emulated)
+// RES(R123, RES_K(1)) -- part of final amp (not emulated)
+// RES(R124, RES_K(100)) -- part of final amp (not emulated)
RES(R125, RES_K(82))
RES(R126, RES_K(39))
RES(R127, RES_K(10))
@@ -287,16 +287,16 @@ NETLIST_START(astrob)
RES(R132, RES_K(82))
RES(R133, RES_K(100))
RES(R134, RES_M(2.7))
-// RES(R135, RES_K(22)) -- part of final amp (not emulated)
+// RES(R135, RES_K(22)) -- part of final amp (not emulated)
RES(R136, RES_K(1))
RES(R137, RES_K(4.7))
RES(R138, RES_M(2.2))
RES(R139, RES_K(4.7))
RES(R140, RES_K(4.7))
-// RES(R141, RES_K(22))
-// RES(R142, RES_M(1)) -- part of final amp (not emulated)
-// RES(R143, RES_K(22)) -- part of final amp (not emulated)
-// RES(R144, RES_K(22)) -- part of final amp (not emulated)
+// RES(R141, RES_K(22))
+// RES(R142, RES_M(1)) -- part of final amp (not emulated)
+// RES(R143, RES_K(22)) -- part of final amp (not emulated)
+// RES(R144, RES_K(22)) -- part of final amp (not emulated)
RES(R145, RES_K(4.7))
RES(R146, RES_K(100))
RES(R147, RES_M(2.2))
@@ -349,11 +349,11 @@ NETLIST_START(astrob)
CAP(C7, CAP_U(0.1))
CAP(C8, CAP_U(0.1))
CAP(C9, CAP_U(0.1))
-// CAP(C10, CAP_U(0.05))
-// CAP(C11, CAP_U(0.05))
+// CAP(C10, CAP_U(0.05))
+// CAP(C11, CAP_U(0.05))
CAP(C12, CAP_U(10))
-// CAP(C13, CAP_U(0.05))
-// CAP(C14, CAP_U(0.05))
+// CAP(C13, CAP_U(0.05))
+// CAP(C14, CAP_U(0.05))
CAP(C15, CAP_U(10))
CAP(C16, CAP_U(0.01))
CAP(C17, CAP_U(0.01))
@@ -368,8 +368,8 @@ NETLIST_START(astrob)
CAP(C26, CAP_U(0.022))
CAP(C27, CAP_U(10))
CAP(C28, CAP_U(0.05))
-// CAP(C29, CAP_U(0.05))
-// CAP(C30, CAP_U(0.05))
+// CAP(C29, CAP_U(0.05))
+// CAP(C30, CAP_U(0.05))
CAP(C31, CAP_U(0.0047))
CAP(C32, CAP_U(0.05))
CAP(C33, CAP_U(10))
@@ -381,23 +381,23 @@ NETLIST_START(astrob)
CAP(C39, CAP_U(0.1))
CAP(C40, CAP_U(0.01))
CAP(C41, CAP_U(0.01))
-// CAP(C42, CAP_U(0.001))
-// CAP(C43, CAP_U(10))
-// CAP(C44, CAP_U(0.001))
-// CAP(C45, CAP_U(0.001))
-// CAP(C46, CAP_U(10))
+// CAP(C42, CAP_U(0.001))
+// CAP(C43, CAP_U(10))
+// CAP(C44, CAP_U(0.001))
+// CAP(C45, CAP_U(0.001))
+// CAP(C46, CAP_U(10))
CAP(C47, CAP_U(4.7))
-// CAP(C48, CAP_U(22)) -- part of final amp (not emulated)
+// CAP(C48, CAP_U(22)) -- part of final amp (not emulated)
CAP(C49, CAP_U(0.05))
CAP(C50, CAP_U(0.05))
CAP(C51, CAP_U(0.05))
CAP(C52, CAP_U(0.05))
CAP(C53, CAP_U(0.1))
-// CAP(C54, CAP_U(0.05))
+// CAP(C54, CAP_U(0.05))
CAP(C55, CAP_U(0.05))
CAP(C56, CAP_U(10))
CAP(C57, CAP_U(0.1))
-// CAP(C58, CAP_U(4.7)) -- part of final amp (not emulated)
+// CAP(C58, CAP_U(4.7)) -- part of final amp (not emulated)
CAP(C59, CAP_U(0.33))
CAP(C60, CAP_U(4.7))
CAP(C61, CAP_U(4.7))
@@ -405,20 +405,20 @@ NETLIST_START(astrob)
CAP(C63, CAP_U(0.1))
CAP(C64, CAP_U(0.1))
CAP(C65, CAP_U(0.01))
-// CAP(C66, CAP_U(0.05))
+// CAP(C66, CAP_U(0.05))
CAP(C67, CAP_U(0.05))
CAP(C68, CAP_U(0.0047))
CAP(C69, CAP_U(4.7))
CAP(C70, CAP_U(0.1))
CAP(C71, CAP_U(0.022))
CAP(C72, CAP_U(0.05))
-// CAP(C73, CAP_U(0.05))
+// CAP(C73, CAP_U(0.05))
CAP(C74, CAP_U(0.05))
CAP(C75, CAP_U(0.05))
CAP(C76, CAP_U(0.022))
CAP(C77, CAP_U(0.0047))
CAP(C78, CAP_U(0.1))
-// CAP(C79, CAP_U(0.05))
+// CAP(C79, CAP_U(0.05))
CAP(C80, CAP_U(4.7))
CAP(C81, CAP_U(0.05))
CAP(C82, CAP_U(0.1))
@@ -435,7 +435,7 @@ NETLIST_START(astrob)
D_1N5231(D10)
D_1N914(D11)
D_1N914(D12)
-// D_1N914(D13) -- part of final amp (not emulated)
+// D_1N914(D13) -- part of final amp (not emulated)
D_1N914(D14)
D_1N914(D15)
D_1N914(D16)
@@ -466,138 +466,138 @@ NETLIST_START(astrob)
Q_2N4403(Q9)
Q_2N4403(Q10)
- TL084_DIP(U1) // Op. Amp.
+ TL084_DIP(U1) // Op. Amp.
NET_C(U1.4, I_V12)
NET_C(U1.11, I_VM12)
- TL084_DIP(U2) // Op. Amp.
+ TL084_DIP(U2) // Op. Amp.
NET_C(U2.4, I_V12)
NET_C(U2.11, I_VM12)
- CD4017_DIP(U3) // Decade Counter/Divider
+ CD4017_DIP(U3) // Decade Counter/Divider
NET_C(U3.8, GND)
NET_C(U3.16, I_V12)
- NE555_DIP(U4) // Timer
+ NE555_DIP(U4) // Timer
- NE555_DIP(U5) // Timer
+ NE555_DIP(U5) // Timer
- NE555_DIP(U6) // Timer
+ NE555_DIP(U6) // Timer
- TL084_DIP(U7) // Op. Amp.
+ TL084_DIP(U7) // Op. Amp.
NET_C(U7.4, I_V12)
NET_C(U7.11, I_VM12)
- MM5837_DIP(U8) // Noise Generator
+ MM5837_DIP(U8) // Noise Generator
#if (UNDERCLOCK_NOISE_GEN)
// officially runs at 48-112kHz, but little noticeable difference
// in exchange for a big performance boost
PARAM(U8.FREQ, 12000)
#endif
- CD4011_DIP(U9) // Quad 2-Input NAND Gates
+ CD4011_DIP(U9) // Quad 2-Input NAND Gates
NET_C(U9.7, GND)
NET_C(U9.14, I_V12)
- CD4011_DIP(U10) // Quad 2-Input NAND Gates
+ CD4011_DIP(U10) // Quad 2-Input NAND Gates
NET_C(U10.7, GND)
NET_C(U10.14, I_V12)
- CD4011_DIP(U11) // Quad 2-Input NAND Gates
+ CD4011_DIP(U11) // Quad 2-Input NAND Gates
NET_C(U11.7, GND)
NET_C(U11.14, I_V12)
- CD4024_DIP(U12) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U12) // 7-Stage Ripple Binary Counter
NET_C(U12.7, GND)
NET_C(U12.14, I_V12)
- NE555_DIP(U13) // Timer
+ NE555_DIP(U13) // Timer
- CD4024_DIP(U14) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U14) // 7-Stage Ripple Binary Counter
NET_C(U14.7, GND)
NET_C(U14.14, I_V12)
- CD4017_DIP(U15) // Decade Counter/Divider
+ CD4017_DIP(U15) // Decade Counter/Divider
NET_C(U15.8, GND)
NET_C(U15.16, I_V12)
- TL084_DIP(U16) // Op. Amp.
+ TL084_DIP(U16) // Op. Amp.
NET_C(U16.4, I_V12)
NET_C(U16.11, I_VM12)
- NE555_DIP(U17) // Timer
+ NE555_DIP(U17) // Timer
- NE555_DIP(U18) // Timer
+ NE555_DIP(U18) // Timer
- CD4024_DIP(U19) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U19) // 7-Stage Ripple Binary Counter
NET_C(U19.7, GND)
NET_C(U19.14, I_V12)
- NE555_DIP(U20) // Timer
+ NE555_DIP(U20) // Timer
- CD4011_DIP(U21) // Quad 2-Input NAND Gates
+ CD4011_DIP(U21) // Quad 2-Input NAND Gates
NET_C(U21.7, GND)
NET_C(U21.14, I_V12)
- TL084_DIP(U22) // Op. Amp.
+ TL084_DIP(U22) // Op. Amp.
NET_C(U22.4, I_V12)
NET_C(U22.11, I_VM12)
- NE555_DIP(U23) // Timer
+ NE555_DIP(U23) // Timer
- NE555_DIP(U24) // Timer
+ NE555_DIP(U24) // Timer
- CD4011_DIP(U25) // Quad 2-Input NAND Gates
+ CD4011_DIP(U25) // Quad 2-Input NAND Gates
NET_C(U25.7, GND)
NET_C(U25.14, I_V12)
- TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
- CD4011_DIP(U27) // Quad 2-Input NAND Gates
+ CD4011_DIP(U27) // Quad 2-Input NAND Gates
NET_C(U27.7, GND)
NET_C(U27.14, I_V12)
- CD4024_DIP(U28) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U28) // 7-Stage Ripple Binary Counter
NET_C(U28.7, GND)
NET_C(U28.14, I_V12)
- TTL_7407_DIP(U29) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U29.7, GND)
- NET_C(U29.14, I_V5)
+ TTL_7407_DIP(U29) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U29.7, GND)
+ NET_C(U29.14, I_V5)
- TTL_7406_DIP(U30) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U30) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U30.7, GND)
NET_C(U30.14, I_V5)
- TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U31.7, GND)
NET_C(U31.14, I_V5)
-// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U32.10, GND)
-// NET_C(U32.20, I_V5)
+// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U32.10, GND)
+// NET_C(U32.20, I_V5)
-// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U33.10, GND)
-// NET_C(U33.20, I_V5)
+// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U33.10, GND)
+// NET_C(U33.20, I_V5)
-// TTL_74LS00_DIP(U34) // Quad 4-Input NAND Gate
+// TTL_74LS00_DIP(U34) // Quad 4-Input NAND Gate
// NET_C(U34.7, GND)
// NET_C(U34.14, I_V5)
-// TTL_74LS30_DIP(U35) // 8-Input NAND Gate
-// NET_C(U35.7, GND)
-// NET_C(U35.14, I_V5)
+// TTL_74LS30_DIP(U35) // 8-Input NAND Gate
+// NET_C(U35.7, GND)
+// NET_C(U35.14, I_V5)
-// TTL_74LS04_DIP(U36) // Hex Inverting Gates
-// NET_C(U36.7, GND)
-// NET_C(U36.14, I_V5)
+// TTL_74LS04_DIP(U36) // Hex Inverting Gates
+// NET_C(U36.7, GND)
+// NET_C(U36.14, I_V5)
- NE555_DIP(U37) // Timer
+ NE555_DIP(U37) // Timer
- NE555_DIP(U38) // Timer
+ NE555_DIP(U38) // Timer
//
// Sheet 7, top-left (SONAR)
@@ -722,8 +722,8 @@ NETLIST_START(astrob)
VARCLOCK(LASER1CLK, 1, "max(0.000001,min(0.1,(0.0000000343262*A0*A0*A0*A0*A0) - (0.00000096054*A0*A0*A0*A0) + (0.0000105481*A0*A0*A0) - (0.0000561978*A0*A0) + (0.000148191*A0) - 0.000131018))")
NET_C(LASER1CLK.GND, GND)
NET_C(LASER1CLK.VCC, I_V12)
- NET_C(LASER1CLK.A0, Q10.E)
- NET_C(LASER1CLK.Q, LASER1ENV.A1)
+ NET_C(LASER1CLK.A0, Q10.E)
+ NET_C(LASER1CLK.Q, LASER1ENV.A1)
AFUNC(LASER1ENV, 2, "if(A0>6,A1,0)")
NET_C(LASER1ENV.A0, U25.10)
NET_C(LASER1ENV.Q, U19.1)
@@ -774,8 +774,8 @@ NETLIST_START(astrob)
VARCLOCK(LASER2CLK, 1, "max(0.000001,min(0.1,(0.0000000153499*A0*A0*A0*A0*A0) - (0.000000433800*A0*A0*A0*A0) + (0.00000480504*A0*A0*A0) - (0.0000257871*A0*A0) + (0.000068467*A0) - 0.0000608574))")
NET_C(LASER2CLK.GND, GND)
NET_C(LASER2CLK.VCC, I_V12)
- NET_C(LASER2CLK.A0, Q9.E)
- NET_C(LASER2CLK.Q, LASER2ENV.A1)
+ NET_C(LASER2CLK.A0, Q9.E)
+ NET_C(LASER2CLK.Q, LASER2ENV.A1)
AFUNC(LASER2ENV, 2, "if(A0>6,A1,0)")
NET_C(LASER2ENV.A0, U25.11)
NET_C(LASER2ENV.Q, U14.1)
@@ -916,7 +916,7 @@ NETLIST_START(astrob)
NET_C(C80.2, GND)
NET_C(R180.2, U16.9, R179.1)
NET_C(R179.2, U16.8, R177.1)
- NET_C(R181.2, U16.10, Q6.D, D26.K) // D and S swapped on schematics???
+ NET_C(R181.2, U16.10, Q6.D, D26.K) // D and S swapped on schematics???
NET_C(Q6.G, C72.2, R151.2, Q5.G)
NET_C(R151.1, GND)
NET_C(C72.1, U8.3)
@@ -960,7 +960,7 @@ NETLIST_START(astrob)
NET_C(I_ASTROIDS, R97.1, R174.1, R175.1)
NET_C(R97.2, I_V12)
NET_C(R174.2, U16.13, R173.1)
- NET_C(R175.2, U16.12, Q5.D, D25.K) // D and S swapped on schematics???
+ NET_C(R175.2, U16.12, Q5.D, D25.K) // D and S swapped on schematics???
NET_C(D25.A, Q5.S, GND)
NET_C(R173.2, U16.14, R172.1)
NET_C(R172.2, R150.1, C70.1)
@@ -992,7 +992,7 @@ NETLIST_START(astrob)
NET_C(MUTEFUNC.A0, I_MUTE)
NET_C(MUTEFUNC.A1, R121.2)
ALIAS(OUTPUT, MUTEFUNC.Q)
-// ALIAS(OUTPUT, C55.2)
+// ALIAS(OUTPUT, C55.2)
//
// Sheet 8, middle-top (INVADER_1)
@@ -1154,7 +1154,7 @@ NETLIST_START(astrob)
OPTIMIZE_FRONTIER(INVADER_4, RES_M(1), RXX)
OPTIMIZE_FRONTIER(C50.1, RES_M(10), RXX)
- OPTIMIZE_FRONTIER(C60.1, RES_M(10), RXX) // this is a big one
+ OPTIMIZE_FRONTIER(C60.1, RES_M(10), RXX) // this is a big one
OPTIMIZE_FRONTIER(C61.1, RES_M(10), RXX)
#endif
diff --git a/src/mame/audio/nl_carpolo.cpp b/src/mame/audio/nl_carpolo.cpp
index e135227c69b..cef3eb79346 100644
--- a/src/mame/audio/nl_carpolo.cpp
+++ b/src/mame/audio/nl_carpolo.cpp
@@ -81,10 +81,10 @@ NETLIST_START(carpolo)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5)
- TTL_INPUT(PL1_CRASH, 1) // active high
- TTL_INPUT(PL2_CRASH, 0) // active high
- TTL_INPUT(PL3_CRASH, 0) // active high
- TTL_INPUT(PL4_CRASH, 0) // active high
+ TTL_INPUT(PL1_CRASH, 1) // active high
+ TTL_INPUT(PL2_CRASH, 0) // active high
+ TTL_INPUT(PL3_CRASH, 0) // active high
+ TTL_INPUT(PL4_CRASH, 0) // active high
LOCAL_SOURCE(PLAYER_CRASH)
diff --git a/src/mame/audio/nl_elim.cpp b/src/mame/audio/nl_elim.cpp
index 1727de5c46f..147441f3a6f 100644
--- a/src/mame/audio/nl_elim.cpp
+++ b/src/mame/audio/nl_elim.cpp
@@ -96,14 +96,14 @@ NETLIST_END()
// once for Zektor
//
-#define VARIANT_ELIMINATOR 0
-#define VARIANT_ZEKTOR 1
+#define VARIANT_ELIMINATOR 0
+#define VARIANT_ZEKTOR 1
-#define SOUND_VARIANT (VARIANT_ELIMINATOR)
+#define SOUND_VARIANT (VARIANT_ELIMINATOR)
#include "nl_elim.cpp"
#undef SOUND_VARIANT
-#define SOUND_VARIANT (VARIANT_ZEKTOR)
+#define SOUND_VARIANT (VARIANT_ZEKTOR)
#include "nl_elim.cpp"
@@ -131,7 +131,7 @@ NETLIST_START(zektor)
LOCAL_SOURCE(_CA3080_FAST_DIP)
-// TTL_INPUT(I_LO_D0, 0)
+// TTL_INPUT(I_LO_D0, 0)
TTL_INPUT(I_LO_D1, 0)
ALIAS(I_FIREBALL, I_LO_D1)
TTL_INPUT(I_LO_D2, 0)
@@ -193,14 +193,14 @@ NETLIST_START(zektor)
// C46 0.022uF 0.047uF
//
-// RES(R1, RES_K(100)) -- part of final amp (not emulated)
-// RES(R2, RES_M(1)) -- part of final amp (not emulated)
-// RES(R3, RES_K(22)) -- part of final amp (not emulated)
-// RES(R4, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R1, RES_K(100)) -- part of final amp (not emulated)
+// RES(R2, RES_M(1)) -- part of final amp (not emulated)
+// RES(R3, RES_K(22)) -- part of final amp (not emulated)
+// RES(R4, RES_K(2.2)) -- part of final amp (not emulated)
#if (SOUND_VARIANT == VARIANT_ELIMINATOR)
-// RES(R5, RES_K(10)) -- part of final amp (not emulated)
+// RES(R5, RES_K(10)) -- part of final amp (not emulated)
#else // (SOUND_VARIANT == VARIANT_ZEKTOR)
-// RES(R5, RES_K(4.7)) -- part of final amp (not emulated)
+// RES(R5, RES_K(4.7)) -- part of final amp (not emulated)
#endif
RES(R6, RES_K(220))
RES(R7, RES_K(220))
@@ -211,9 +211,9 @@ NETLIST_START(zektor)
RES(R9, RES_K(12))
#endif
RES(R10, RES_K(10))
-// RES(R11, RES_K(2.2)) -- part of final amp (not emulated)
-// RES(R12, RES_M(1)) -- part of final amp (not emulated)
-// RES(R13, RES_K(330)) -- part of final amp (not emulated)
+// RES(R11, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R12, RES_M(1)) -- part of final amp (not emulated)
+// RES(R13, RES_K(330)) -- part of final amp (not emulated)
RES(R14, RES_K(470))
RES(R15, RES_K(100))
RES(R16, RES_K(100))
@@ -363,10 +363,10 @@ NETLIST_START(zektor)
RES(R146, RES_K(22))
RES(R147, RES_K(2.2))
-// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
-// CAP(C2, CAP_U(0.1))
-// CAP(C3, CAP_U(0.1))
-// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
+// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
+// CAP(C2, CAP_U(0.1))
+// CAP(C3, CAP_U(0.1))
+// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
CAP(C5, CAP_U(0.1))
CAP(C6, CAP_U(0.1))
CAP(C7, CAP_U(0.001))
@@ -388,17 +388,17 @@ NETLIST_START(zektor)
CAP(C19, CAP_U(0.068))
CAP(C20, CAP_U(0.068))
CAP(C21, CAP_U(2.2))
-// CAP(C22, CAP_U(0.1))
-// CAP(C23, CAP_U(0.1))
-// CAP(C24, CAP_U(0.1))
-// CAP(C25, CAP_U(0.1))
-// CAP(C26, CAP_U(0.1))
-// CAP(C27, CAP_U(0.1))
+// CAP(C22, CAP_U(0.1))
+// CAP(C23, CAP_U(0.1))
+// CAP(C24, CAP_U(0.1))
+// CAP(C25, CAP_U(0.1))
+// CAP(C26, CAP_U(0.1))
+// CAP(C27, CAP_U(0.1))
CAP(C28, CAP_U(0.1))
CAP(C29, CAP_U(0.1))
CAP(C30, CAP_U(0.022))
-// CAP(C31, CAP_U(0.1))
-// CAP(C32, CAP_U(0.1))
+// CAP(C31, CAP_U(0.1))
+// CAP(C32, CAP_U(0.1))
CAP(C33, CAP_U(0.1))
CAP(C34, CAP_U(0.1))
CAP(C35, CAP_U(1))
@@ -406,8 +406,8 @@ NETLIST_START(zektor)
CAP(C37, CAP_U(10))
CAP(C38, CAP_U(4.7))
CAP(C39, CAP_U(0.1))
-// CAP(C40, CAP_U(0.1))
-// CAP(C41, CAP_U(0.1))
+// CAP(C40, CAP_U(0.1))
+// CAP(C41, CAP_U(0.1))
// C42??
CAP(C43, CAP_U(0.033))
CAP(C44, CAP_U(0.1))
@@ -432,7 +432,7 @@ NETLIST_START(zektor)
CAP(C59, CAP_U(0.1))
CAP(C60, CAP_U(0.001))
CAP(C61, CAP_U(0.068))
-// CAP(C62, CAP_U(0.1))
+// CAP(C62, CAP_U(0.1))
CAP(C63, CAP_P(100))
CAP(C64, CAP_U(0.1))
CAP(C65, CAP_U(0.01))
@@ -440,11 +440,11 @@ NETLIST_START(zektor)
CAP(C67, CAP_U(0.047))
CAP(C68, CAP_U(0.01))
CAP(C69, CAP_U(0.1))
-// CAP(C70, CAP_U(0.1))
-// CAP(C71, CAP_U(0.1))
-// CAP(C72, CAP_U(0.1))
-// CAP(C73, CAP_U(10))
-// CAP(C74, CAP_U(0.1))
+// CAP(C70, CAP_U(0.1))
+// CAP(C71, CAP_U(0.1))
+// CAP(C72, CAP_U(0.1))
+// CAP(C73, CAP_U(10))
+// CAP(C74, CAP_U(0.1))
CAP(C75, CAP_U(0.1))
CAP(C76, CAP_U(0.1))
CAP(C77, CAP_U(0.1))
@@ -458,7 +458,7 @@ NETLIST_START(zektor)
D_1N914(D7)
D_1N4002(D8)
-// Q_2N4093(Q1) -- part of final amp (not emulated)
+// Q_2N4093(Q1) -- part of final amp (not emulated)
Q_2N4403(Q2)
Q_2N4403(Q3)
Q_2N4403(Q4)
@@ -470,164 +470,164 @@ NETLIST_START(zektor)
Q_2N4403(Q10)
Q_2N4403(Q11)
- TL081_DIP(U1) // Op. Amp.
+ TL081_DIP(U1) // Op. Amp.
NET_C(U1.7, I_V12)
NET_C(U1.4, I_VM12)
-// TL082_DIP(U2) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(U2.8, I_V12)
-// NET_C(U2.4, I_VM12)
+// TL082_DIP(U2) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(U2.8, I_V12)
+// NET_C(U2.4, I_VM12)
- TL081_DIP(U3) // Op. Amp.
+ TL081_DIP(U3) // Op. Amp.
NET_C(U3.7, I_V12)
NET_C(U3.4, I_VM12)
- MM5837_DIP(U4) // Noise Generator
+ MM5837_DIP(U4) // Noise Generator
#if (UNDERCLOCK_NOISE_GEN)
PARAM(U4.FREQ, 24000)
#endif
- LM555_DIP(U5) // Timer
+ LM555_DIP(U5) // Timer
- CA3080_DIP(U6) // Op. Amp.
+ CA3080_DIP(U6) // Op. Amp.
NET_C(U6.4, I_VM12)
NET_C(U6.7, I_V12)
- CA3080_DIP(U7) // Op. Amp.
+ CA3080_DIP(U7) // Op. Amp.
NET_C(U7.4, I_VM12)
NET_C(U7.7, I_V12)
- CA3080_DIP(U8) // Op. Amp.
+ CA3080_DIP(U8) // Op. Amp.
NET_C(U8.4, I_VM12)
NET_C(U8.7, I_V12)
- CA3080_DIP(U9) // Op. Amp.
+ CA3080_DIP(U9) // Op. Amp.
NET_C(U9.4, I_VM12)
NET_C(U9.7, I_V12)
- CA3080_DIP(U10) // Op. Amp.
+ CA3080_DIP(U10) // Op. Amp.
NET_C(U10.4, I_VM12)
NET_C(U10.7, I_V12)
- CA3080_DIP(U11) // Op. Amp.
+ CA3080_DIP(U11) // Op. Amp.
NET_C(U11.4, I_VM12)
NET_C(U11.7, I_V12)
- TL081_DIP(U12) // Op. Amp.
+ TL081_DIP(U12) // Op. Amp.
NET_C(U12.7, I_V12)
NET_C(U12.4, I_VM12)
- LM555_DIP(U13) // Timer
+ LM555_DIP(U13) // Timer
- CA3080_DIP(U14) // Op. Amp.
+ CA3080_DIP(U14) // Op. Amp.
NET_C(U14.4, I_VM12)
NET_C(U14.7, I_V12)
- CA3080_DIP(U15) // Op. Amp.
+ CA3080_DIP(U15) // Op. Amp.
NET_C(U15.4, I_VM12)
NET_C(U15.7, I_V12)
- TL082_DIP(U16) // Op. Amp.
+ TL082_DIP(U16) // Op. Amp.
NET_C(U16.8, I_V12)
NET_C(U16.4, I_VM12)
- CD4011_DIP(U17) // Quad 2-Input NAND Gates
+ CD4011_DIP(U17) // Quad 2-Input NAND Gates
NET_C(U17.7, GND)
NET_C(U17.14, I_V12)
- CD4011_DIP(U18) // Quad 2-Input NAND Gates
+ CD4011_DIP(U18) // Quad 2-Input NAND Gates
NET_C(U18.7, GND)
NET_C(U18.14, I_V12)
- CD4011_DIP(U19) // Quad 2-Input NAND Gates
+ CD4011_DIP(U19) // Quad 2-Input NAND Gates
NET_C(U19.7, GND)
NET_C(U19.14, I_V12)
- TL082_DIP(U20) // Op. Amp.
+ TL082_DIP(U20) // Op. Amp.
NET_C(U20.8, I_V12)
NET_C(U20.4, I_VM12)
- CD4024_DIP(U21) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U21) // 7-Stage Ripple Binary Counter
NET_C(U21.7, GND)
NET_C(U21.14, I_V12)
- CD4011_DIP(U22) // Quad 2-Input NAND Gates
+ CD4011_DIP(U22) // Quad 2-Input NAND Gates
NET_C(U22.7, GND)
NET_C(U22.14, I_V12)
- CD4024_DIP(U23) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U23) // 7-Stage Ripple Binary Counter
NET_C(U23.7, GND)
NET_C(U23.14, I_V12)
- TTL_7406_DIP(U24) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U24) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U24.7, GND)
NET_C(U24.14, I_V5)
#if (!HLE_BACKGROUND_VCO)
- LM566_DIP(U25) // Voltage-Controlled Oscillator
+ LM566_DIP(U25) // Voltage-Controlled Oscillator
#endif
- TTL_74LS00_DIP(U26) // Quad 4-Input NAND Gate
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_74LS00_DIP(U26) // Quad 4-Input NAND Gate
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
- TTL_7407_DIP(U27) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U27.7, GND)
- NET_C(U27.14, I_V5)
+ TTL_7407_DIP(U27) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U27.7, GND)
+ NET_C(U27.14, I_V5)
- TTL_7407_DIP(U28) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U28.7, GND)
- NET_C(U28.14, I_V5)
+ TTL_7407_DIP(U28) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U28.7, GND)
+ NET_C(U28.14, I_V5)
- TL081_DIP(U29) // Op. Amp.
+ TL081_DIP(U29) // Op. Amp.
NET_C(U29.7, I_V12)
NET_C(U29.4, I_VM12)
-// AY_3_8912_DIP(U30) // PSG -- emulated by MAME
+// AY_3_8912_DIP(U30) // PSG -- emulated by MAME
- CD4069_DIP(U31) // Hex Inverter
+ CD4069_DIP(U31) // Hex Inverter
NET_C(U31.7, GND)
NET_C(U31.14, I_V12)
- CD4069_DIP(U32) // Hex Inverter
+ CD4069_DIP(U32) // Hex Inverter
NET_C(U32.7, GND)
NET_C(U32.14, I_V12)
-// TTL_74LS125_DIP(U33) // Quad 3-state buffer
-// NET_C(U33.7, GND)
-// NET_C(U33.14, I_V5)
+// TTL_74LS125_DIP(U33) // Quad 3-state buffer
+// NET_C(U33.7, GND)
+// NET_C(U33.14, I_V5)
-// TTL_74LS374_DIP(U34) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U34.10, GND)
-// NET_C(U34.20, I_V5)
+// TTL_74LS374_DIP(U34) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U34.10, GND)
+// NET_C(U34.20, I_V5)
//
-// TTL_74LS374_DIP(U35) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U34.10, GND)
-// NET_C(U34.20, I_V5)
+// TTL_74LS374_DIP(U35) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U34.10, GND)
+// NET_C(U34.20, I_V5)
// TTL_74LS74_DIP(U36) // Dual D Flip Flop
// NET_C(U36.7, GND)
// NET_C(U36.14, I_V5)
-// TTL_74LS10_DIP(U37) // Triple 3-Input NAND Gate
-// NET_C(U37.7, GND)
-// NET_C(U37.14, I_V5)
+// TTL_74LS10_DIP(U37) // Triple 3-Input NAND Gate
+// NET_C(U37.7, GND)
+// NET_C(U37.14, I_V5)
-// TTL_74LS14_DIP(U38)
-// NET_C(U38.7, GND)
-// NET_C(U38.14, I_V5)
+// TTL_74LS14_DIP(U38)
+// NET_C(U38.7, GND)
+// NET_C(U38.14, I_V5)
-// TTL_74LS08_DIP(U39) // Quad 2-Input AND Gates
-// NET_C(U39.7, GND)
-// NET_C(U39.14, I_V5)
+// TTL_74LS08_DIP(U39) // Quad 2-Input AND Gates
+// NET_C(U39.7, GND)
+// NET_C(U39.14, I_V5)
-// TTL_74LS30_DIP(U40) // 8-Input NAND Gate
-// NET_C(U40.7, GND)
-// NET_C(U40.14, I_V5)
+// TTL_74LS30_DIP(U40) // 8-Input NAND Gate
+// NET_C(U40.7, GND)
+// NET_C(U40.14, I_V5)
-// TTL_74LS14_DIP(U41)
-// NET_C(U41.7, GND)
-// NET_C(U41.14, I_V5)
+// TTL_74LS14_DIP(U41)
+// NET_C(U41.7, GND)
+// NET_C(U41.14, I_V5)
//
// Sheet 7, top-left/middle (Thrust)
@@ -817,9 +817,9 @@ NETLIST_START(zektor)
VARCLOCK(BGCLK, 1, "max(0.000001,min(0.1,(0.00000748879*A0*A0*A0*A0) - (0.000189174*A0*A0*A0) + (0.00180942*A0*A0) - (0.00759439*A0) + 0.0124560))")
NET_C(BGCLK.GND, GND)
NET_C(BGCLK.VCC, I_V5)
- NET_C(BGCLK.A0, U16.1)
- NET_C(BGCLK.Q, BGENV.A0)
- NET_C(GND, C57.1, C57.2, C58.1, C58.2)
+ NET_C(BGCLK.A0, U16.1)
+ NET_C(BGCLK.Q, BGENV.A0)
+ NET_C(GND, C57.1, C57.2, C58.1, C58.2)
AFUNC(BGENV, 1, "if(A0>2.5,2.5,-2.5)")
NET_C(BGENV.Q, R106.1)
#else
@@ -867,7 +867,7 @@ NETLIST_START(zektor)
HINT(U32.6, NC)
HINT(U32.8, NC)
- CLOCK(_200HZBCLK, 217.98) // tweak frequency so this is out of phase
+ CLOCK(_200HZBCLK, 217.98) // tweak frequency so this is out of phase
NET_C(_200HZBCLK.VCC, I_V12)
NET_C(_200HZBCLK.GND, GND)
NET_C(_200HZB, _200HZBCLK.Q)
@@ -1100,14 +1100,14 @@ NETLIST_START(zektor)
VARCLOCK(TORP1CLK, 1, "max(0.000001,min(0.1,(0.00000342725*A0*A0*A0) + (0.000000183693*A0*A0) + (0.000079091*A0) + 0.0000157375))")
NET_C(TORP1CLK.GND, GND)
NET_C(TORP1CLK.VCC, I_V5)
- NET_C(TORP1CLK.A0, D2.K)
- NET_C(TORP1CLK.Q, T1ENV.A0)
+ NET_C(TORP1CLK.A0, D2.K)
+ NET_C(TORP1CLK.Q, T1ENV.A0)
AFUNC(T1ENV, 1, "if(A0>2.5,11.1,-11.1)")
NET_C(T1ENV.Q, U23.1)
NET_C(D2.A, D3.K, R91.1)
NET_C(C46.2, R90.1)
NET_C(R90.2, R91.2, R146.1)
- NET_C(GND, U20.3, U20.2)
+ NET_C(GND, U20.3, U20.2)
#else
NET_C(D2.A, D3.K, R91.1, U20.3)
NET_C(U20.2, C46.2, R90.1)
@@ -1129,9 +1129,9 @@ NETLIST_START(zektor)
NET_C(WBN, R36.1)
#if (DISABLE_TORPEDO2_NOISE)
- NET_C(R36.2, GND) // noise source
+ NET_C(R36.2, GND) // noise source
#else
- NET_C(R36.2, D6.A) // noise source
+ NET_C(R36.2, D6.A) // noise source
#endif
#if (HLE_TORPEDO2_VCO)
@@ -1145,14 +1145,14 @@ NETLIST_START(zektor)
VARCLOCK(TORP2CLK, 1, "max(0.000001,min(0.1,(0.0000104419*A0*A0*A0) - (0.00000603211*A0*A0) + (0.000109865*A0) + 0.0000082421))")
NET_C(TORP2CLK.GND, GND)
NET_C(TORP2CLK.VCC, I_V5)
- NET_C(TORP2CLK.A0, D6.K)
- NET_C(TORP2CLK.Q, T2ENV.A0)
+ NET_C(TORP2CLK.A0, D6.K)
+ NET_C(TORP2CLK.Q, T2ENV.A0)
AFUNC(T2ENV, 1, "if(A0>2.5,11.1,-11.1)")
NET_C(T2ENV.Q, U21.1)
NET_C(D6.A, D7.K, R93.1)
NET_C(C43.2, R94.1)
NET_C(R94.2, R93.2, R92.2)
- NET_C(GND, U20.6, U20.5)
+ NET_C(GND, U20.6, U20.5)
#else
NET_C(D6.A, U20.5, D7.K, R93.1)
NET_C(U20.6, C43.2, R94.1)
diff --git a/src/mame/audio/nl_fireone.cpp b/src/mame/audio/nl_fireone.cpp
index 3c0523cb36c..9b2c405535c 100644
--- a/src/mame/audio/nl_fireone.cpp
+++ b/src/mame/audio/nl_fireone.cpp
@@ -41,56 +41,56 @@ NETLIST_END()
//
static NETLIST_START(ICL8038_DIP)
- VCVS(VI, 1)
- CCCS(CI1, -1)
- CCCS(CI2, 2)
- SYS_COMPD(COMP)
- SYS_DSW2(SW)
- VCVS(VO, 1)
- RES(R_SHUNT, RES_R(50))
-
- PARAM(VO.RO, 50)
- PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
- PARAM(SW.GOFF, 0) // This has to be zero to block current sources
-
- NET_C(VI.OP, CI1.IN, CI2.IN)
- NET_C(CI1.OP, VO.IP)
- NET_C(COMP.Q, SW.I)
- NET_C(CI2.OP, SW.2)
- NET_C(COMP.VCC, R_SHUNT.1)
- NET_C(SW.1, R_SHUNT.2)
- NET_C(SW.3, VO.IP)
- NET_C(VO.OP, COMP.IN)
-
- // Avoid singular Matrix due to G=0 switch
- RES(RX1, 1e10)
- RES(RX2, 1e10)
- NET_C(RX1.1, SW.1)
- NET_C(RX2.1, SW.3)
-
- NET_C(COMP.GND, RX1.2, RX2.2)
-
- RES(R1, 5000)
- RES(R2, 5000)
- RES(R3, 5000)
-
- // Square output wave
- VCVS(V_SQR, 1)
- NET_C(COMP.Q, V_SQR.IP)
-
- NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
- NET_C(COMP.VCC, SW.VCC, R1.2)
- NET_C(COMP.IP, R1.1, R2.1, R3.1)
- NET_C(COMP.Q, R3.2)
-
- ALIAS(11, VI.ON) // GND
- ALIAS(9, V_SQR.OP) // Square out
- ALIAS(3, VO.OP) // Triag out
- ALIAS(8, VI.IP) // VC
- ALIAS(4, CI1.IP) // R1
- ALIAS(5, CI2.IP) // R2
- ALIAS(10, VO.IP) // C1
- ALIAS(6, COMP.VCC) // V+
+ VCVS(VI, 1)
+ CCCS(CI1, -1)
+ CCCS(CI2, 2)
+ SYS_COMPD(COMP)
+ SYS_DSW2(SW)
+ VCVS(VO, 1)
+ RES(R_SHUNT, RES_R(50))
+
+ PARAM(VO.RO, 50)
+ PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
+ PARAM(SW.GOFF, 0) // This has to be zero to block current sources
+
+ NET_C(VI.OP, CI1.IN, CI2.IN)
+ NET_C(CI1.OP, VO.IP)
+ NET_C(COMP.Q, SW.I)
+ NET_C(CI2.OP, SW.2)
+ NET_C(COMP.VCC, R_SHUNT.1)
+ NET_C(SW.1, R_SHUNT.2)
+ NET_C(SW.3, VO.IP)
+ NET_C(VO.OP, COMP.IN)
+
+ // Avoid singular Matrix due to G=0 switch
+ RES(RX1, 1e10)
+ RES(RX2, 1e10)
+ NET_C(RX1.1, SW.1)
+ NET_C(RX2.1, SW.3)
+
+ NET_C(COMP.GND, RX1.2, RX2.2)
+
+ RES(R1, 5000)
+ RES(R2, 5000)
+ RES(R3, 5000)
+
+ // Square output wave
+ VCVS(V_SQR, 1)
+ NET_C(COMP.Q, V_SQR.IP)
+
+ NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
+ NET_C(COMP.VCC, SW.VCC, R1.2)
+ NET_C(COMP.IP, R1.1, R2.1, R3.1)
+ NET_C(COMP.Q, R3.2)
+
+ ALIAS(11, VI.ON) // GND
+ ALIAS(9, V_SQR.OP) // Square out
+ ALIAS(3, VO.OP) // Triag out
+ ALIAS(8, VI.IP) // VC
+ ALIAS(4, CI1.IP) // R1
+ ALIAS(5, CI2.IP) // R2
+ ALIAS(10, VO.IP) // C1
+ ALIAS(6, COMP.VCC) // V+
NETLIST_END()
//
@@ -109,19 +109,19 @@ NETLIST_START(fireone)
NET_MODEL("PIT8253PORT FAMILY(TYPE=NMOS OVL=0.05 OVH=0.05 ORL=100.0 ORH=0.5k)")
- TTL_INPUT(LTORP, 0) // active high
- TTL_INPUT(LSHPHT, 0) // active high
- TTL_INPUT(LBOOM, 0) // active high
- TTL_INPUT(SOUND_OFF_L, 0) // active high
- TTL_INPUT(SOUND_OFF_R, 0) // active high
- TTL_INPUT(RTORP, 0) // active high
- TTL_INPUT(RSHPHT, 0) // active high
- TTL_INPUT(RBOOM, 0) // active high
- TTL_INPUT(TORPCOLL, 0) // active high
- TTL_INPUT(SUBENG, 0) // active high
- TTL_INPUT(ALERT, 0) // active high
- //TTL_INPUT(SONAR_ENABLE, 0) // active high
- TTL_INPUT(SONAR_SYNC, 0) // active low
+ TTL_INPUT(LTORP, 0) // active high
+ TTL_INPUT(LSHPHT, 0) // active high
+ TTL_INPUT(LBOOM, 0) // active high
+ TTL_INPUT(SOUND_OFF_L, 0) // active high
+ TTL_INPUT(SOUND_OFF_R, 0) // active high
+ TTL_INPUT(RTORP, 0) // active high
+ TTL_INPUT(RSHPHT, 0) // active high
+ TTL_INPUT(RBOOM, 0) // active high
+ TTL_INPUT(TORPCOLL, 0) // active high
+ TTL_INPUT(SUBENG, 0) // active high
+ TTL_INPUT(ALERT, 0) // active high
+ //TTL_INPUT(SONAR_ENABLE, 0) // active high
+ TTL_INPUT(SONAR_SYNC, 0) // active low
LOGIC_INPUT(MUSIC_A, 0, "PIT8253PORT")
LOGIC_INPUT(MUSIC_B, 0, "PIT8253PORT")
diff --git a/src/mame/audio/nl_segaspeech.cpp b/src/mame/audio/nl_segaspeech.cpp
index 6b52f886df5..8dc301f2db6 100644
--- a/src/mame/audio/nl_segaspeech.cpp
+++ b/src/mame/audio/nl_segaspeech.cpp
@@ -45,7 +45,7 @@ NETLIST_START(segaspeech)
// There are two schematic drawings of the speech board
// that show fairly different outputs from the SP0250.
// Both have their problems.
- //
+ //
// The simpler one is included in the Astro Blaster and
// Space Fury manuals. This is largely correct, except
// that it is believed (not verified) that R20 should be
@@ -89,14 +89,14 @@ NETLIST_START(segaspeech)
RES(R17, RES_K(10))
RES(R18, RES_K(22))
RES(R19, RES_K(250))
- RES(R20, RES_K(4.7)) // schematic shows 470Ohm, but a real PCB had 4.7k here
+ RES(R20, RES_K(4.7)) // schematic shows 470Ohm, but a real PCB had 4.7k here
RES(R21, RES_K(10))
CAP(C9, CAP_U(0.1))
CAP(C10, CAP_U(0.047))
CAP(C50, CAP_U(0.003))
- TL081_DIP(U8) // Op. Amp.
+ TL081_DIP(U8) // Op. Amp.
NET_C(U8.7, I_V5)
NET_C(U8.4, I_VM5)
diff --git a/src/mame/audio/nl_segausb.cpp b/src/mame/audio/nl_segausb.cpp
index 179f9b4a211..ac03fac0662 100644
--- a/src/mame/audio/nl_segausb.cpp
+++ b/src/mame/audio/nl_segausb.cpp
@@ -42,33 +42,33 @@ NETLIST_START(segausb)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- ANALOG_INPUT(I_U12_DAC, 0) // AD7524
- ANALOG_INPUT(I_U13_DAC, 0) // AD7524
- ANALOG_INPUT(I_U14_DAC, 0) // AD7524
- TTL_INPUT(I_U2B_SEL, 0) // 74LS74
+ ANALOG_INPUT(I_U12_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U13_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U14_DAC, 0) // AD7524
+ TTL_INPUT(I_U2B_SEL, 0) // 74LS74
- ANALOG_INPUT(I_U24_DAC, 0) // AD7524
- ANALOG_INPUT(I_U25_DAC, 0) // AD7524
- ANALOG_INPUT(I_U26_DAC, 0) // AD7524
- TTL_INPUT(I_U38B_SEL, 0) // 74LS74
+ ANALOG_INPUT(I_U24_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U25_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U26_DAC, 0) // AD7524
+ TTL_INPUT(I_U38B_SEL, 0) // 74LS74
- ANALOG_INPUT(I_U27_DAC, 0) // AD7524
- ANALOG_INPUT(I_U28_DAC, 0) // AD7524
- ANALOG_INPUT(I_U29_DAC, 0) // AD7524
- TTL_INPUT(I_U2A_SEL, 0) // 74LS74
+ ANALOG_INPUT(I_U27_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U28_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U29_DAC, 0) // AD7524
+ TTL_INPUT(I_U2A_SEL, 0) // 74LS74
NET_C(GND, I_U2B_SEL.GND, I_U38B_SEL.GND, I_U2A_SEL.GND)
NET_C(I_V5, I_U2B_SEL.VCC, I_U38B_SEL.VCC, I_U2A_SEL.VCC)
- TTL_INPUT(I_U41_OUT0, 0) // 8253 PIT U41
+ TTL_INPUT(I_U41_OUT0, 0) // 8253 PIT U41
TTL_INPUT(I_U41_OUT1, 0)
TTL_INPUT(I_U41_OUT2, 0)
- TTL_INPUT(I_U42_OUT0, 0) // 8253 PIT U42
+ TTL_INPUT(I_U42_OUT0, 0) // 8253 PIT U42
TTL_INPUT(I_U42_OUT1, 0)
TTL_INPUT(I_U42_OUT2, 0)
- TTL_INPUT(I_U43_OUT0, 0) // 8253 PIT U43
+ TTL_INPUT(I_U43_OUT0, 0) // 8253 PIT U43
TTL_INPUT(I_U43_OUT1, 0)
TTL_INPUT(I_U43_OUT2, 0)
@@ -142,21 +142,21 @@ NETLIST_START(segausb)
RES(R64, RES_K(2.7))
RES(R65, RES_K(2.7))
-// CAP(C6, CAP_P(100))
-// CAP(C7, CAP_P(100))
-// CAP(C8, CAP_P(100))
+// CAP(C6, CAP_P(100))
+// CAP(C7, CAP_P(100))
+// CAP(C8, CAP_P(100))
CAP(C9, CAP_U(0.01))
CAP(C13, CAP_U(0.01))
CAP(C14, CAP_U(1))
CAP(C15, CAP_U(1))
CAP(C16, CAP_U(0.01))
CAP(C17, CAP_U(0.01))
-// CAP(C19, CAP_P(100))
-// CAP(C20, CAP_P(100))
-// CAP(C21, CAP_P(100))
-// CAP(C22, CAP_P(100))
-// CAP(C23, CAP_P(100))
-// CAP(C24, CAP_P(100))
+// CAP(C19, CAP_P(100))
+// CAP(C20, CAP_P(100))
+// CAP(C21, CAP_P(100))
+// CAP(C22, CAP_P(100))
+// CAP(C23, CAP_P(100))
+// CAP(C24, CAP_P(100))
CAP(C25, CAP_U(0.01))
CAP(C32, CAP_U(0.01))
CAP(C33, CAP_U(1))
@@ -170,143 +170,143 @@ NETLIST_START(segausb)
CAP(C55, CAP_U(0.15))
CAP(C56, CAP_U(0.15))
-// TL082_DIP(U1) // Op. Amp.
-// NET_C(U1.7, I_V12)
-// NET_C(U1.4, I_VM12)
+// TL082_DIP(U1) // Op. Amp.
+// NET_C(U1.7, I_V12)
+// NET_C(U1.4, I_VM12)
-// TTL_74LS74(U2) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
-// NET_C(U2.7, GND)
-// NET_C(U2.14, I_V5)
+// TTL_74LS74(U2) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
+// NET_C(U2.7, GND)
+// NET_C(U2.14, I_V5)
- TL082_DIP(U3) // Op. Amp.
+ TL082_DIP(U3) // Op. Amp.
NET_C(U3.8, I_V12)
NET_C(U3.4, I_VM12)
- TL082_DIP(U4) // Op. Amp.
+ TL082_DIP(U4) // Op. Amp.
NET_C(U4.8, I_V12)
NET_C(U4.4, I_VM12)
- TL082_DIP(U5) // Op. Amp.
+ TL082_DIP(U5) // Op. Amp.
NET_C(U5.8, I_V12)
NET_C(U5.4, I_VM12)
- TL082_DIP(U6) // Op. Amp.
+ TL082_DIP(U6) // Op. Amp.
NET_C(U6.8, I_V12)
NET_C(U6.4, I_VM12)
- CD4053_DIP(U7) // 3x analog demuxer
+ CD4053_DIP(U7) // 3x analog demuxer
NET_C(U7.16, I_V5)
- NET_C(U7.6, GND) // INH
- NET_C(U7.7, I_V12) // VEE
+ NET_C(U7.6, GND) // INH
+ NET_C(U7.7, I_V12) // VEE
NET_C(U7.8, GND)
- CD4053_DIP(U8) // 3x analog demuxer
+ CD4053_DIP(U8) // 3x analog demuxer
NET_C(U8.16, I_V5)
- NET_C(U8.6, GND) // INH
- NET_C(U8.7, I_V12) // VEE
+ NET_C(U8.6, GND) // INH
+ NET_C(U8.7, I_V12) // VEE
NET_C(U8.8, GND)
- TL082_DIP(U9) // Op. Amp.
+ TL082_DIP(U9) // Op. Amp.
NET_C(U9.8, I_V12)
NET_C(U9.4, I_VM12)
-// TTL_74LS139_DIP(U10) // Dual 1-of-4 Decoder -- not emulated
+// TTL_74LS139_DIP(U10) // Dual 1-of-4 Decoder -- not emulated
-// TTL_74LS139_DIP(U11) // Dual 1-of-4 Decoder -- not emulated
+// TTL_74LS139_DIP(U11) // Dual 1-of-4 Decoder -- not emulated
-// AD7524_DIP(U12) // DAC -- not emulated
-// NET_C(U12.3, GND)
-// NET_C(U12.14, I_V5)
+// AD7524_DIP(U12) // DAC -- not emulated
+// NET_C(U12.3, GND)
+// NET_C(U12.14, I_V5)
-// AD7524_DIP(U13) // DAC -- not emulated
-// NET_C(U12.3, GND)
-// NET_C(U12.14, I_V5)
+// AD7524_DIP(U13) // DAC -- not emulated
+// NET_C(U12.3, GND)
+// NET_C(U12.14, I_V5)
-// AD7524_DIP(U14) // DAC -- not emulated
-// NET_C(U12.3, GND)
-// NET_C(U12.14, I_V5)
+// AD7524_DIP(U14) // DAC -- not emulated
+// NET_C(U12.3, GND)
+// NET_C(U12.14, I_V5)
- CD4053_DIP(U15) // 3x analog demuxer
+ CD4053_DIP(U15) // 3x analog demuxer
NET_C(U15.16, I_V5)
- NET_C(U15.6, GND) // INH
- NET_C(U15.7, I_V12) // VEE
+ NET_C(U15.6, GND) // INH
+ NET_C(U15.7, I_V12) // VEE
NET_C(U15.8, GND)
- CD4053_DIP(U16) // 3x analog demuxer
+ CD4053_DIP(U16) // 3x analog demuxer
NET_C(U16.16, I_V5)
- NET_C(U16.6, GND) // INH
- NET_C(U16.7, I_V12) // VEE
+ NET_C(U16.6, GND) // INH
+ NET_C(U16.7, I_V12) // VEE
NET_C(U16.8, GND)
- TL082_DIP(U17) // Op. Amp.
+ TL082_DIP(U17) // Op. Amp.
NET_C(U17.8, I_V12)
NET_C(U17.4, I_VM12)
- TL082_DIP(U18) // Op. Amp.
+ TL082_DIP(U18) // Op. Amp.
NET_C(U18.8, I_V12)
NET_C(U18.4, I_VM12)
- TL082_DIP(U19) // Op. Amp.
+ TL082_DIP(U19) // Op. Amp.
NET_C(U19.8, I_V12)
NET_C(U19.4, I_VM12)
- TL082_DIP(U20) // Op. Amp.
+ TL082_DIP(U20) // Op. Amp.
NET_C(U20.8, I_V12)
NET_C(U20.4, I_VM12)
- TL082_DIP(U21) // Op. Amp.
+ TL082_DIP(U21) // Op. Amp.
NET_C(U21.8, I_V12)
NET_C(U21.4, I_VM12)
- TL082_DIP(U22) // Op. Amp.
+ TL082_DIP(U22) // Op. Amp.
NET_C(U22.8, I_V12)
NET_C(U22.4, I_VM12)
- TL082_DIP(U23) // Op. Amp.
+ TL082_DIP(U23) // Op. Amp.
NET_C(U23.8, I_V12)
NET_C(U23.4, I_VM12)
-// AD7524_DIP(U24) // DAC -- not emulated
-// NET_C(U24.3, GND)
-// NET_C(U24.14, I_V5)
+// AD7524_DIP(U24) // DAC -- not emulated
+// NET_C(U24.3, GND)
+// NET_C(U24.14, I_V5)
-// AD7524_DIP(U25) // DAC -- not emulated
-// NET_C(U25.3, GND)
-// NET_C(U25.14, I_V5)
+// AD7524_DIP(U25) // DAC -- not emulated
+// NET_C(U25.3, GND)
+// NET_C(U25.14, I_V5)
-// AD7524_DIP(U26) // DAC -- not emulated
-// NET_C(U26.3, GND)
-// NET_C(U26.14, I_V5)
+// AD7524_DIP(U26) // DAC -- not emulated
+// NET_C(U26.3, GND)
+// NET_C(U26.14, I_V5)
-// AD7524_DIP(U27) // DAC -- not emulated
-// NET_C(U27.3, GND)
-// NET_C(U27.14, I_V5)
+// AD7524_DIP(U27) // DAC -- not emulated
+// NET_C(U27.3, GND)
+// NET_C(U27.14, I_V5)
-// AD7524_DIP(U28) // DAC -- not emulated
-// NET_C(U28.3, GND)
-// NET_C(U28.14, I_V5)
+// AD7524_DIP(U28) // DAC -- not emulated
+// NET_C(U28.3, GND)
+// NET_C(U28.14, I_V5)
-// AD7524_DIP(U29) // DAC -- not emulated
-// NET_C(U29.3, GND)
-// NET_C(U29.14, I_V5)
+// AD7524_DIP(U29) // DAC -- not emulated
+// NET_C(U29.3, GND)
+// NET_C(U29.14, I_V5)
- CD4053_DIP(U30) // 3x analog demuxer
+ CD4053_DIP(U30) // 3x analog demuxer
NET_C(U30.16, I_V5)
- NET_C(U30.6, GND) // INH
- NET_C(U30.7, I_V12) // VEE
+ NET_C(U30.6, GND) // INH
+ NET_C(U30.7, I_V12) // VEE
NET_C(U30.8, GND)
- CD4053_DIP(U31) // 3x analog demuxer
+ CD4053_DIP(U31) // 3x analog demuxer
NET_C(U31.16, I_V5)
- NET_C(U31.6, GND) // INH
- NET_C(U31.7, I_V12) // VEE
+ NET_C(U31.6, GND) // INH
+ NET_C(U31.7, I_V12) // VEE
NET_C(U31.8, GND)
-// TTL_74LS74(U38) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
-// NET_C(U38.7, GND)
-// NET_C(U38.14, I_V5)
+// TTL_74LS74(U38) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
+// NET_C(U38.7, GND)
+// NET_C(U38.14, I_V5)
- TL081_DIP(U49) // Op. Amp.
+ TL081_DIP(U49) // Op. Amp.
NET_C(U49.7, I_V12)
NET_C(U49.4, I_VM12)
@@ -533,12 +533,12 @@ NETLIST_START(segausb)
NET_C(GND, U15.2, U15.5, U16.2)
NET_C(GND, U30.2, U30.5, U31.2)
/*
- OPTIMIZE_FRONTIER(R48.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R49.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R18.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R19.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R35.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R48.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R49.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R18.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R19.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R35.1, RES_M(1), 50)
*/
NETLIST_END()
diff --git a/src/mame/audio/nl_spacfury.cpp b/src/mame/audio/nl_spacfury.cpp
index 797185e9dd0..c1926f6f817 100644
--- a/src/mame/audio/nl_spacfury.cpp
+++ b/src/mame/audio/nl_spacfury.cpp
@@ -154,7 +154,7 @@ NETLIST_START(spacfury)
// subtle but noticeable effect where the spin "whoosh" is missing
// some upper harmonics at 4e-5; however, this is the most demanding
// solver in the system and it keeps jumping around as I tweak things
-// PARAM(Solver.Solver_21.DYNAMIC_MIN_TIMESTEP, 2e-5)
+// PARAM(Solver.Solver_21.DYNAMIC_MIN_TIMESTEP, 2e-5)
// Overwrite model - the default model uses minimum datasheet
// specifications for 5V. These are for 10V and thus closer to the
@@ -203,10 +203,10 @@ NETLIST_START(spacfury)
ANALOG_INPUT(I_V12, 12)
ANALOG_INPUT(I_VM12, -12)
-// RES(R1, RES_K(2.2)) -- part of final amp (not emulated)
-// RES(R2, RES_K(10)) -- part of final amp (not emulated)
-// RES(R4, RES_K(330)) -- part of final amp (not emulated)
-// RES(R5, RES_M(1)) -- part of final amp (not emulated)
+// RES(R1, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R2, RES_K(10)) -- part of final amp (not emulated)
+// RES(R4, RES_K(330)) -- part of final amp (not emulated)
+// RES(R5, RES_M(1)) -- part of final amp (not emulated)
RES(R6, RES_K(680))
RES(R7, RES_K(680))
RES(R8, RES_K(10))
@@ -216,7 +216,7 @@ NETLIST_START(spacfury)
RES(R12, RES_K(47))
RES(R13, RES_K(47))
RES(R14, RES_M(1))
-// RES(R15, RES_K(100)) -- part of final amp (not emulated)
+// RES(R15, RES_K(100)) -- part of final amp (not emulated)
RES(R18, RES_K(10))
RES(R19, RES_K(470))
RES(R20, RES_K(22))
@@ -349,23 +349,23 @@ NETLIST_START(spacfury)
RES(R148, RES_K(10))
RES(R149, RES_K(220))
-// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
-// CAP(C2, CAP_U(0.05))
-// CAP(C3, CAP_U(0.05))
-// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
+// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
+// CAP(C2, CAP_U(0.05))
+// CAP(C3, CAP_U(0.05))
+// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
CAP(C5, CAP_U(0.01))
CAP(C6, CAP_U(0.01))
CAP(C7, CAP_U(4.7))
CAP(C8, CAP_U(0.047))
-// CAP(C9, CAP_U(0.05))
-// CAP(C10, CAP_U(0.05))
+// CAP(C9, CAP_U(0.05))
+// CAP(C10, CAP_U(0.05))
CAP(C11, CAP_U(0.01))
CAP(C12, CAP_U(0.01))
CAP(C13, CAP_U(0.01))
CAP(C14, CAP_U(0.01))
CAP(C15, CAP_U(0.01))
-// CAP(C16, CAP_U(0.05))
-// CAP(C17, CAP_U(0.05))
+// CAP(C16, CAP_U(0.05))
+// CAP(C17, CAP_U(0.05))
CAP(C18, CAP_U(0.01))
CAP(C19, CAP_U(0.047))
CAP(C20, CAP_U(0.01))
@@ -373,9 +373,9 @@ NETLIST_START(spacfury)
CAP(C22, CAP_U(0.05))
CAP(C23, CAP_U(0.05))
CAP(C24, CAP_U(10))
-// CAP(C25, CAP_U(0.05))
+// CAP(C25, CAP_U(0.05))
CAP(C26, CAP_U(0.0033))
-// CAP(C27, CAP_U(0.05))
+// CAP(C27, CAP_U(0.05))
CAP(C28, CAP_U(0.1))
CAP(C29, CAP_U(0.001))
CAP(C30, CAP_U(0.0022))
@@ -386,15 +386,15 @@ NETLIST_START(spacfury)
CAP(C35, CAP_U(0.0033))
CAP(C36, CAP_U(4.7))
CAP(C37, CAP_U(0.0022))
-// CAP(C38, CAP_U(0.05))
-// CAP(C39, CAP_U(0.05))
+// CAP(C38, CAP_U(0.05))
+// CAP(C39, CAP_U(0.05))
CAP(C40, CAP_U(0.047))
CAP(C41, CAP_U(0.0047))
CAP(C42, CAP_U(0.01))
CAP(C43, CAP_U(0.01))
CAP(C44, CAP_U(4.7))
-// CAP(C45, CAP_U(0.05))
-// CAP(C46, CAP_U(0.05))
+// CAP(C45, CAP_U(0.05))
+// CAP(C46, CAP_U(0.05))
CAP(C47, CAP_U(0.047))
CAP(C48, CAP_U(4.7))
CAP(C49, CAP_U(0.1))
@@ -404,30 +404,30 @@ NETLIST_START(spacfury)
CAP(C53, CAP_U(10))
CAP(C54, CAP_U(0.1))
CAP(C55, CAP_U(100))
-// CAP(C56, CAP_U(0.05))
+// CAP(C56, CAP_U(0.05))
CAP(C57, CAP_U(4.7))
-// CAP(C58, CAP_U(0.05))
+// CAP(C58, CAP_U(0.05))
CAP(C59, CAP_U(0.01))
CAP(C60, CAP_U(0.01))
CAP(C61, CAP_U(0.047))
CAP(C62, CAP_U(0.047))
CAP(C63, CAP_U(0.05))
CAP(C64, CAP_U(0.05))
-// CAP(C65, CAP_U(0.05))
+// CAP(C65, CAP_U(0.05))
CAP(C66, CAP_U(0.033))
-// CAP(C67, CAP_U(0.05))
+// CAP(C67, CAP_U(0.05))
CAP(C68, CAP_U(0.1))
CAP(C69, CAP_U(0.1))
CAP(C70, CAP_U(0.1))
CAP(C71, CAP_U(0.047))
CAP(C72, CAP_P(100))
CAP(C73, CAP_U(0.1))
-// CAP(C75, CAP_U(10))
-// CAP(C76, CAP_U(10))
-// CAP(C77, CAP_U(0.1))
-// CAP(C78, CAP_U(0.1))
-// CAP(C79, CAP_U(0.1))
-// CAP(C80, CAP_U(0.1))
+// CAP(C75, CAP_U(10))
+// CAP(C76, CAP_U(10))
+// CAP(C77, CAP_U(0.1))
+// CAP(C78, CAP_U(0.1))
+// CAP(C79, CAP_U(0.1))
+// CAP(C80, CAP_U(0.1))
D_1N914(D1)
D_1N914(D2)
@@ -446,7 +446,7 @@ NETLIST_START(spacfury)
D_1N914(D15)
D_1N914(D16)
-// Q_2N4093(Q1) -- part of final amp (not emulated)
+// Q_2N4093(Q1) -- part of final amp (not emulated)
Q_2N4093(Q2)
Q_2N4093(Q3)
Q_2N4403(Q4)
@@ -460,39 +460,39 @@ NETLIST_START(spacfury)
Q_2N4401(Q12)
Q_2N4403(Q13)
-// TL082_DIP(U1) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(U1.8, I_V12)
-// NET_C(U1.4, I_VM12)
+// TL082_DIP(U1) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(U1.8, I_V12)
+// NET_C(U1.4, I_VM12)
- TL082_DIP(U2) // Op. Amp.
+ TL082_DIP(U2) // Op. Amp.
NET_C(U2.8, I_V12)
NET_C(U2.4, I_VM12)
- CD4069_DIP(U3) // Hex Inverter
+ CD4069_DIP(U3) // Hex Inverter
NET_C(U3.7, GND)
NET_C(U3.14, I_V12)
- TL082_DIP(U4) // Op. Amp.
+ TL082_DIP(U4) // Op. Amp.
NET_C(U4.8, I_V12)
NET_C(U4.4, I_VM12)
- TL082_DIP(U5) // Op. Amp.
+ TL082_DIP(U5) // Op. Amp.
NET_C(U5.8, I_V12)
NET_C(U5.4, I_VM12)
- CD4011_DIP(U6) // Quad 2-Input NAND Gates
+ CD4011_DIP(U6) // Quad 2-Input NAND Gates
NET_C(U6.7, GND)
NET_C(U6.14, I_V12)
- CA3080_SLOW_DIP(U7) // Op. Amp.
+ CA3080_SLOW_DIP(U7) // Op. Amp.
NET_C(U7.4, I_VM12)
NET_C(U7.7, I_V12)
- TL082_DIP(U8) // Op. Amp.
+ TL082_DIP(U8) // Op. Amp.
NET_C(U8.8, I_V12)
NET_C(U8.4, I_VM12)
- MM5837_DIP(U9) // Noise Generator
+ MM5837_DIP(U9) // Noise Generator
#if (UNDERCLOCK_NOISE_GEN)
// officially runs at 48-112kHz, but little noticeable difference
// in exchange for a big performance boost
@@ -502,99 +502,99 @@ NETLIST_START(spacfury)
// MM5837 instance at a lower frequency to drive it; this
// second instance doesn't really exist, it just allows us
// a bit more performance
- MM5837_DIP(U9B) // Noise Generator
+ MM5837_DIP(U9B) // Noise Generator
PARAM(U9B.FREQ, 12000)
#endif
- TL082_DIP(U10) // Op. Amp.
+ TL082_DIP(U10) // Op. Amp.
NET_C(U10.8, I_V12)
NET_C(U10.4, I_VM12)
- CD4024_DIP(U11) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U11) // 7-Stage Ripple Binary Counter
NET_C(U11.7, GND)
NET_C(U11.14, I_V12)
- CA3080_SLOW_DIP(U12) // Op. Amp.
+ CA3080_SLOW_DIP(U12) // Op. Amp.
NET_C(U12.4, I_VM12)
NET_C(U12.7, I_V12)
- TL082_DIP(U13) // Op. Amp.
+ TL082_DIP(U13) // Op. Amp.
NET_C(U13.8, I_V12)
NET_C(U13.4, I_VM12)
- TL082_DIP(U14) // Op. Amp.
+ TL082_DIP(U14) // Op. Amp.
NET_C(U14.8, I_V12)
NET_C(U14.4, I_VM12)
- TL082_DIP(U15) // Op. Amp.
+ TL082_DIP(U15) // Op. Amp.
NET_C(U15.8, I_V12)
NET_C(U15.4, I_VM12)
- TL082_DIP(U16) // Op. Amp.
+ TL082_DIP(U16) // Op. Amp.
NET_C(U16.8, I_V12)
NET_C(U16.4, I_VM12)
LM555_DIP(U17)
- TL082_DIP(U18) // Op. Amp.
+ TL082_DIP(U18) // Op. Amp.
NET_C(U18.8, I_V12)
NET_C(U18.4, I_VM12)
- CD4069_DIP(U19) // Hex Inverter
+ CD4069_DIP(U19) // Hex Inverter
NET_C(U19.7, GND)
NET_C(U19.14, I_V12)
- CD4011_DIP(U20) // Quad 2-Input NAND Gates
+ CD4011_DIP(U20) // Quad 2-Input NAND Gates
NET_C(U20.7, GND)
NET_C(U20.14, I_V12)
- TL082_DIP(U21) // Op. Amp.
+ TL082_DIP(U21) // Op. Amp.
NET_C(U21.8, I_V12)
NET_C(U21.4, I_VM12)
- CD4011_DIP(U22) // Quad 2-Input NAND Gates
+ CD4011_DIP(U22) // Quad 2-Input NAND Gates
NET_C(U22.7, GND)
NET_C(U22.14, I_V12)
- TL082_DIP(U23) // Op. Amp.
+ TL082_DIP(U23) // Op. Amp.
NET_C(U23.8, I_V12)
NET_C(U23.4, I_VM12)
-// TTL_74LS08_DIP(U25) // Quad 2-Input AND Gates
-// NET_C(U25.7, GND)
-// NET_C(U25.14, I_V5)
+// TTL_74LS08_DIP(U25) // Quad 2-Input AND Gates
+// NET_C(U25.7, GND)
+// NET_C(U25.14, I_V5)
- TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
-// TTL_74LS10_DIP(U28) // Triple 3-Input NAND Gate
-// NET_C(U28.7, GND)
-// NET_C(U28.14, I_V5)
+// TTL_74LS10_DIP(U28) // Triple 3-Input NAND Gate
+// NET_C(U28.7, GND)
+// NET_C(U28.14, I_V5)
-// TTL_74LS14_DIP(U30)
-// NET_C(U30.7, GND)
-// NET_C(U30.14, I_V5)
+// TTL_74LS14_DIP(U30)
+// NET_C(U30.7, GND)
+// NET_C(U30.14, I_V5)
- TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U31.7, GND)
NET_C(U31.14, I_V5)
-// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U32.10, GND)
-// NET_C(U32.20, I_V5)
+// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U32.10, GND)
+// NET_C(U32.20, I_V5)
//
-// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U33.10, GND)
-// NET_C(U33.20, I_V5)
+// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U33.10, GND)
+// NET_C(U33.20, I_V5)
-// TTL_74LS30_DIP(U34) // 8-Input NAND Gate
-// NET_C(U34.7, GND)
-// NET_C(U34.14, I_V5)
+// TTL_74LS30_DIP(U34) // 8-Input NAND Gate
+// NET_C(U34.7, GND)
+// NET_C(U34.14, I_V5)
-// TTL_74LS14_DIP(U35)
-// NET_C(U35.7, GND)
-// NET_C(U35.14, I_V5)
+// TTL_74LS14_DIP(U35)
+// NET_C(U35.7, GND)
+// NET_C(U35.14, I_V5)
//
// Sheet 7, top (Moving)
@@ -1009,7 +1009,7 @@ NETLIST_START(spacfury)
NET_C(R140.2, D15.K, C68.2)
NET_C(C68.1, C66.1, D13.A, GND)
NET_C(D15.A, R102.1, D13.K) // and U21.3
- NET_C(C66.2, R103.1) // and U21.2
+ NET_C(C66.2, R103.1) // and U21.2
NET_C(R103.2, R102.2, R84.1)// and U21.1
#if (HLE_SHOOT_VCO)
@@ -1023,11 +1023,11 @@ NETLIST_START(spacfury)
VARCLOCK(SHOOTCLK, 1, "max(0.000001,min(0.1,(0.0000152345*A0*A0*A0) - (0.0000278973*A0*A0) + (0.000132881*A0) - 0.00000173354))")
NET_C(SHOOTCLK.GND, GND)
NET_C(SHOOTCLK.VCC, I_V5)
- NET_C(SHOOTCLK.A0, D15.K)
- NET_C(SHOOTCLK.Q, SHOOTENV.A0)
+ NET_C(SHOOTCLK.A0, D15.K)
+ NET_C(SHOOTCLK.Q, SHOOTENV.A0)
AFUNC(SHOOTENV, 1, "if(A0>2.5,11.1,-11.1)")
NET_C(SHOOTENV.Q, U11.1)
- NET_C(GND, U21.3, U21.2)
+ NET_C(GND, U21.3, U21.2)
#else
NET_C(D15.A, U21.3)
NET_C(U21.2, C66.2)
diff --git a/src/mame/audio/nl_starcrus.cpp b/src/mame/audio/nl_starcrus.cpp
index 99db733b726..f300cde61bd 100644
--- a/src/mame/audio/nl_starcrus.cpp
+++ b/src/mame/audio/nl_starcrus.cpp
@@ -25,12 +25,12 @@ NETLIST_START(starcrus)
ANALOG_INPUT(VM5, -5)
ALIAS(VCC, V5)
- TTL_INPUT(EXPLODE_1, 1) // active low
- TTL_INPUT(EXPLODE_2, 1) // active low
- TTL_INPUT(LAUNCH_1, 1) // active low
- TTL_INPUT(LAUNCH_2, 1) // active low
- TTL_INPUT(ENGINE_1, 1) // active low
- TTL_INPUT(ENGINE_2, 1) // active low
+ TTL_INPUT(EXPLODE_1, 1) // active low
+ TTL_INPUT(EXPLODE_2, 1) // active low
+ TTL_INPUT(LAUNCH_1, 1) // active low
+ TTL_INPUT(LAUNCH_2, 1) // active low
+ TTL_INPUT(ENGINE_1, 1) // active low
+ TTL_INPUT(ENGINE_2, 1) // active low
NET_C(GND, EXPLODE_1.GND, EXPLODE_2.GND, LAUNCH_1.GND, LAUNCH_2.GND, ENGINE_1.GND, ENGINE_2.GND)
NET_C(V5, EXPLODE_1.VCC, EXPLODE_2.VCC, LAUNCH_1.VCC, LAUNCH_2.VCC, ENGINE_1.VCC, ENGINE_2.VCC)
diff --git a/src/mame/audio/nl_starfire.cpp b/src/mame/audio/nl_starfire.cpp
index f2ed1546161..cf071f08e52 100644
--- a/src/mame/audio/nl_starfire.cpp
+++ b/src/mame/audio/nl_starfire.cpp
@@ -37,56 +37,56 @@ static NETLIST_START(NE556_DIP)
NETLIST_END()
static NETLIST_START(ICL8038_DIP)
- VCVS(VI, 1)
- CCCS(CI1, -1)
- CCCS(CI2, 2)
- SYS_COMPD(COMP)
- SYS_DSW2(SW)
- VCVS(VO, 1)
- RES(R_SHUNT, RES_R(50))
-
- PARAM(VO.RO, 50)
- PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
- PARAM(SW.GOFF, 0) // This has to be zero to block current sources
-
- NET_C(VI.OP, CI1.IN, CI2.IN)
- NET_C(CI1.OP, VO.IP)
- NET_C(COMP.Q, SW.I)
- NET_C(CI2.OP, SW.2)
- NET_C(COMP.VCC, R_SHUNT.1)
- NET_C(SW.1, R_SHUNT.2)
- NET_C(SW.3, VO.IP)
- NET_C(VO.OP, COMP.IN)
-
- // Avoid singular Matrix due to G=0 switch
- RES(RX1, 1e10)
- RES(RX2, 1e10)
- NET_C(RX1.1, SW.1)
- NET_C(RX2.1, SW.3)
-
- NET_C(COMP.GND, RX1.2, RX2.2)
-
- RES(R1, 5000)
- RES(R2, 5000)
- RES(R3, 5000)
-
- // Square output wave
- VCVS(V_SQR, 1)
- NET_C(COMP.Q, V_SQR.IP)
-
- NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
- NET_C(COMP.VCC, SW.VCC, R1.2)
- NET_C(COMP.IP, R1.1, R2.1, R3.1)
- NET_C(COMP.Q, R3.2)
-
- ALIAS(11, VI.ON) // GND
- ALIAS(9, V_SQR.OP) // Square out
- ALIAS(3, VO.OP) // Triag out
- ALIAS(8, VI.IP) // VC
- ALIAS(4, CI1.IP) // R1
- ALIAS(5, CI2.IP) // R2
- ALIAS(10, VO.IP) // C1
- ALIAS(6, COMP.VCC) // V+
+ VCVS(VI, 1)
+ CCCS(CI1, -1)
+ CCCS(CI2, 2)
+ SYS_COMPD(COMP)
+ SYS_DSW2(SW)
+ VCVS(VO, 1)
+ RES(R_SHUNT, RES_R(50))
+
+ PARAM(VO.RO, 50)
+ PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
+ PARAM(SW.GOFF, 0) // This has to be zero to block current sources
+
+ NET_C(VI.OP, CI1.IN, CI2.IN)
+ NET_C(CI1.OP, VO.IP)
+ NET_C(COMP.Q, SW.I)
+ NET_C(CI2.OP, SW.2)
+ NET_C(COMP.VCC, R_SHUNT.1)
+ NET_C(SW.1, R_SHUNT.2)
+ NET_C(SW.3, VO.IP)
+ NET_C(VO.OP, COMP.IN)
+
+ // Avoid singular Matrix due to G=0 switch
+ RES(RX1, 1e10)
+ RES(RX2, 1e10)
+ NET_C(RX1.1, SW.1)
+ NET_C(RX2.1, SW.3)
+
+ NET_C(COMP.GND, RX1.2, RX2.2)
+
+ RES(R1, 5000)
+ RES(R2, 5000)
+ RES(R3, 5000)
+
+ // Square output wave
+ VCVS(V_SQR, 1)
+ NET_C(COMP.Q, V_SQR.IP)
+
+ NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
+ NET_C(COMP.VCC, SW.VCC, R1.2)
+ NET_C(COMP.IP, R1.1, R2.1, R3.1)
+ NET_C(COMP.Q, R3.2)
+
+ ALIAS(11, VI.ON) // GND
+ ALIAS(9, V_SQR.OP) // Square out
+ ALIAS(3, VO.OP) // Triag out
+ ALIAS(8, VI.IP) // VC
+ ALIAS(4, CI1.IP) // R1
+ ALIAS(5, CI2.IP) // R2
+ ALIAS(10, VO.IP) // C1
+ ALIAS(6, COMP.VCC) // V+
NETLIST_END()
//
@@ -106,14 +106,14 @@ NETLIST_START(starfire)
ANALOG_INPUT(VM5, -5)
ALIAS(VCC, V5)
- TTL_INPUT(SIZE, 0) // active high
- TTL_INPUT(SEXPLO, 0) // active high
- TTL_INPUT(STIE, 0) // active high
- TTL_INPUT(SLASER, 0) // active high
- TTL_INPUT(TRACK, 0) // active high
- TTL_INPUT(LOCK, 0) // active high
- TTL_INPUT(SCANNER, 0) // active high
- TTL_INPUT(OHEAT, 0) // active high
+ TTL_INPUT(SIZE, 0) // active high
+ TTL_INPUT(SEXPLO, 0) // active high
+ TTL_INPUT(STIE, 0) // active high
+ TTL_INPUT(SLASER, 0) // active high
+ TTL_INPUT(TRACK, 0) // active high
+ TTL_INPUT(LOCK, 0) // active high
+ TTL_INPUT(SCANNER, 0) // active high
+ TTL_INPUT(OHEAT, 0) // active high
NET_C(VCC, SIZE.VCC, SEXPLO.VCC, STIE.VCC, SLASER.VCC, TRACK.VCC, LOCK.VCC, SCANNER.VCC, OHEAT.VCC)
NET_C(GND, SIZE.GND, SEXPLO.GND, STIE.GND, SLASER.GND, TRACK.GND, LOCK.GND, SCANNER.GND, OHEAT.GND)
diff --git a/src/mame/audio/nl_tankbatt.cpp b/src/mame/audio/nl_tankbatt.cpp
index 0e2345e6db9..ac19ef51f4d 100644
--- a/src/mame/audio/nl_tankbatt.cpp
+++ b/src/mame/audio/nl_tankbatt.cpp
@@ -26,12 +26,12 @@ NETLIST_START(tankbatt)
CLOCK(2V, 4000) // 18.432MHz / (3 * 384 * 2)
CLOCK(4V, 2000) // 18.432MHz / (3 * 384 * 4)
- TTL_INPUT(S1, 0) // active high
- TTL_INPUT(S2, 0) // active high
- TTL_INPUT(OFF, 1) // active high
- TTL_INPUT(ENGINE_HI, 0) // active high
- TTL_INPUT(SHOOT, 0) // active high
- TTL_INPUT(HIT, 0) // active high
+ TTL_INPUT(S1, 0) // active high
+ TTL_INPUT(S2, 0) // active high
+ TTL_INPUT(OFF, 1) // active high
+ TTL_INPUT(ENGINE_HI, 0) // active high
+ TTL_INPUT(SHOOT, 0) // active high
+ TTL_INPUT(HIT, 0) // active high
RES(R31, 470)
RES(R32, 470)
diff --git a/src/mame/audio/segaspeech.h b/src/mame/audio/segaspeech.h
index a9905ce05f5..81894b2ce25 100644
--- a/src/mame/audio/segaspeech.h
+++ b/src/mame/audio/segaspeech.h
@@ -21,7 +21,7 @@ class sega_speech_device : public device_t, public device_mixer_interface
public:
sega_speech_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
-// auto int_cb() { return m_int_cb.bind(); }
+// auto int_cb() { return m_int_cb.bind(); }
void data_w(uint8_t data);
void control_w(uint8_t data);