diff options
author | 2008-08-13 03:58:02 +0000 | |
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committer | 2008-08-13 03:58:02 +0000 | |
commit | 04239409b08bdad389ce84d81b9c28c13a62059a (patch) | |
tree | 00f1ec5f0ed57c32417483aacb9bd1cbddbad184 /src/emu | |
parent | 1daf41e21826daaa7e136f095672035817afcea5 (diff) |
SH2DRC: Allow delay slot of a BSR to trash the PR if it wants. (Manis 2059)
Diffstat (limited to 'src/emu')
-rw-r--r-- | src/emu/cpu/sh2/sh2drc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c index f0382683ad3..be5f3248408 100644 --- a/src/emu/cpu/sh2/sh2drc.c +++ b/src/emu/cpu/sh2/sh2drc.c @@ -1631,12 +1631,14 @@ static int generate_opcode(drcuml_block *block, compiler_state *compiler, const break; case 11: // BSR + // panicstr @ 403da22 relies on the delay slot clobbering the PR set by a BSR, so + // do this before running the delay slot + UML_ADD(block, MEM(&sh2->pr), IMM(desc->pc), IMM(4)); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot) + generate_delay_slot(block, compiler, desc); disp = ((INT32)opcode << 20) >> 20; - UML_ADD(block, MEM(&sh2->pr), IMM(desc->pc), IMM(4)); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot) - sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2 generate_update_cycles(block, compiler, IMM(sh2->ea), TRUE); // <subtract cycles> UML_HASHJMP(block, IMM(0), IMM(sh2->ea), sh2->nocode); // hashjmp sh2->ea |