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author Joakim Larsson <joakim@bildrulle.nu>2015-06-16 20:36:32 +0200
committer Joakim Larsson Edström <joakimlarsson42@gmail.com>2015-07-20 18:07:06 +0200
commit705458fd1fb78c356f72055a512d3d814ce3313a (patch)
tree242df830ba2591faffd0942bc2f62ac4eea5dbb1 /src/emu/machine
parent96cc9cb25be6b69bd55785829548e783b091cdb7 (diff)
started implementation of a Motorola 68230 PI/T (Parallell Interface / Timer) device
Diffstat (limited to 'src/emu/machine')
-rw-r--r--src/emu/machine/68230pit.c44
-rw-r--r--src/emu/machine/68230pit.h34
2 files changed, 78 insertions, 0 deletions
diff --git a/src/emu/machine/68230pit.c b/src/emu/machine/68230pit.c
new file mode 100644
index 00000000000..c31dcf2b36b
--- /dev/null
+++ b/src/emu/machine/68230pit.c
@@ -0,0 +1,44 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edström
+/**********************************************************************
+
+ Motorola MC68230 PI/T Parallell Interface and Timer
+
+**********************************************************************/
+
+/*
+ Registers
+-----------------------------------------------------------------------
+ Offset Reset R/W
+ RS1-RS5 Name Value Reset Description
+-----------------------------------------------------------------------
+ 0x00 RW PGCR No Port General Control register
+ 0x01 RW PSRR No Port Service Request register
+ 0x02 RW PADDR No Port A Data Direction register
+ 0x03 RW PBDDR No Port B Data Direction register
+ 0x04 RW PCDDR No Port C Data Direction register
+ 0x05 RW PIVR No Port Interrupt vector register
+ 0x06 RW PACR No Port A Control register
+ 0x07 RW PBCR No Port B Control register
+ 0x08 RW PADR May Port A Data register
+ 0x09 RW PBDR May Port B Data register
+ 0x0a RO PAAR No Port A Alternate register
+ 0x0b RO PBAR No Port B Alternate register
+ 0x0c RW PCDR No Port C Data register
+ 0x0d RW PSR May Port Status register
+ 0x0e n/a
+ 0x0f n/a
+ 0x10 RW TCR No Timer Control Register
+ 0x11 RW TIVR No Timer Interrupt Vector Register
+ 0x12 n/a
+ 0x13 RW CPRH No Counter Preload Register High
+ 0x14 RW CPRM No Counter Preload Register Middle
+ 0x15 RW CPRL No Counter Preload Register Low
+ 0x17 RO CNTRH No Counter Register High
+ 0x18 RO CNTRM No Counter Register Middle
+ 0x19 RO CNTRL No Counter Register Low
+ 0x1A RW TSR May Timer Status Register
+
+*/
+
+
diff --git a/src/emu/machine/68230pit.h b/src/emu/machine/68230pit.h
new file mode 100644
index 00000000000..6bae0fd63a4
--- /dev/null
+++ b/src/emu/machine/68230pit.h
@@ -0,0 +1,34 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edström
+/**********************************************************************
+
+ Motorola MC68230 PI/T Parallell Interface and Timer
+
+**********************************************************************/
+
+#define PGCR 0x00 /* Port General Control register */
+#define PSRR 0x01 /* Port Service Request register */
+#define PADDR 0x02 /* Port A Data Direction register */
+#define PBDDR 0x03 /* Port B Data Direction register */
+#define PCDDR 0x04 /* Port C Data Direction register */
+#define PIVR 0x05 /* Port Interrupt vector register */
+#define PACR 0x06 /* Port A Control register */
+#define PBCR 0x07 /* Port B Control register */
+#define PADR 0x08 /* Port A Data register */
+#define PBDR 0x09 /* Port B Data register */
+#define PAAR 0x0a /* Port A Alternate register */
+#define PBAR 0x0b /* Port B Alternate register */
+#define PCDR 0x0c /* Port C Data register */
+#define PSR 0x0d /* Port Status register */
+#define TCR 0x10 /* Timer Control Register */
+#define TIVR 0x11 /* Timer Interrupt Vector Register */
+#define CPRH 0x13 /* Counter Preload Register High */
+#define CPRM 0x14 /* Counter Preload Register Middle */
+#define CPRL 0x15 /* Counter Preload Register Low */
+#define CNTRH 0x17 /* Counter Register High */
+#define CNTRM 0x18 /* Counter Register Middle */
+#define CNTRL 0x19 /* Counter Register Low */
+#define TSR 0x1A /* Timer Status Register */
+
+
+