diff options
author | 2015-03-25 08:16:51 +0100 | |
---|---|---|
committer | 2015-03-25 08:16:51 +0100 | |
commit | 0147bb4cc82e642cf75151f039f240eb20989fbc (patch) | |
tree | 1da79e38b3eb810f9f5ab9f6f4853defad55792d /src/emu/machine/i8251.c | |
parent | fda60d87eb9228d923fd33130671b2c5de881683 (diff) |
Cleanups and version bumpmame0160
Diffstat (limited to 'src/emu/machine/i8251.c')
-rw-r--r-- | src/emu/machine/i8251.c | 132 |
1 files changed, 66 insertions, 66 deletions
diff --git a/src/emu/machine/i8251.c b/src/emu/machine/i8251.c index 59da201a4d5..622605453ca 100644 --- a/src/emu/machine/i8251.c +++ b/src/emu/machine/i8251.c @@ -3,10 +3,10 @@ i8251.c Intel 8251 Universal Synchronous/Asynchronous Receiver Transmitter code - NEC uPD71051 is a clone + NEC uPD71051 is a clone - The V53/V53A use a customized version with only the Asynchronous mode - and a split command / mode register + The V53/V53A use a customized version with only the Asynchronous mode + and a split command / mode register @@ -428,29 +428,29 @@ WRITE8_MEMBER(i8251_device::command_w) /* bit 7: - 0 = normal operation - 1 = hunt mode - bit 6: - 0 = normal operation - 1 = internal reset - bit 5: - 0 = /RTS set to 1 - 1 = /RTS set to 0 - bit 4: - 0 = normal operation - 1 = reset error flag - bit 3: - 0 = normal operation - 1 = send break character - bit 2: - 0 = receive disable - 1 = receive enable - bit 1: - 0 = /DTR set to 1 - 1 = /DTR set to 0 - bit 0: - 0 = transmit disable - 1 = transmit enable + 0 = normal operation + 1 = hunt mode + bit 6: + 0 = normal operation + 1 = internal reset + bit 5: + 0 = /RTS set to 1 + 1 = /RTS set to 0 + bit 4: + 0 = normal operation + 1 = reset error flag + bit 3: + 0 = normal operation + 1 = send break character + bit 2: + 0 = receive disable + 1 = receive enable + bit 1: + 0 = /DTR set to 1 + 1 = /DTR set to 0 + bit 0: + 0 = transmit disable + 1 = transmit enable */ m_rts_handler(!BIT(data, 5)); @@ -484,28 +484,28 @@ WRITE8_MEMBER(i8251_device::mode_w) { /* Asynchronous - bit 7,6: stop bit length - 0 = inhibit - 1 = 1 bit - 2 = 1.5 bits - 3 = 2 bits - bit 5: parity type - 0 = parity odd - 1 = parity even - bit 4: parity test enable - 0 = disable - 1 = enable - bit 3,2: character length - 0 = 5 bits - 1 = 6 bits - 2 = 7 bits - 3 = 8 bits - bit 1,0: baud rate factor - 0 = defines command byte for synchronous or asynchronous - 1 = x1 - 2 = x16 - 3 = x64 - */ + bit 7,6: stop bit length + 0 = inhibit + 1 = 1 bit + 2 = 1.5 bits + 3 = 2 bits + bit 5: parity type + 0 = parity odd + 1 = parity even + bit 4: parity test enable + 0 = disable + 1 = enable + bit 3,2: character length + 0 = 5 bits + 1 = 6 bits + 2 = 7 bits + 3 = 8 bits + bit 1,0: baud rate factor + 0 = defines command byte for synchronous or asynchronous + 1 = x1 + 2 = x16 + 3 = x64 + */ LOG(("I8251: Asynchronous operation\n")); @@ -597,24 +597,24 @@ WRITE8_MEMBER(i8251_device::mode_w) else { /* bit 7: Number of sync characters - 0 = 1 character - 1 = 2 character - bit 6: Synchronous mode - 0 = Internal synchronisation - 1 = External synchronisation - bit 5: parity type - 0 = parity odd - 1 = parity even - bit 4: parity test enable - 0 = disable - 1 = enable - bit 3,2: character length - 0 = 5 bits - 1 = 6 bits - 2 = 7 bits - 3 = 8 bits - bit 1,0 = 0 - */ + 0 = 1 character + 1 = 2 character + bit 6: Synchronous mode + 0 = Internal synchronisation + 1 = External synchronisation + bit 5: parity type + 0 = parity odd + 1 = parity even + bit 4: parity test enable + 0 = disable + 1 = enable + bit 3,2: character length + 0 = 5 bits + 1 = 6 bits + 2 = 7 bits + 3 = 8 bits + bit 1,0 = 0 + */ LOG(("I8251: Synchronous operation\n")); /* setup for sync byte(s) */ |