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author Stiletto <stilett0@users.noreply.github.com>2015-08-20 04:07:36 -0400
committer Stiletto <stilett0@users.noreply.github.com>2015-08-20 04:07:36 -0400
commitdafd09973d87052ccec8bc9ca8b453f47af90e5b (patch)
tree0620babfdae7721f850f22374f50e689583042c4 /src/emu/cpu
parent54ea6b9dd5328f12c1aa54d29984d5f1785b66af (diff)
comments (nw)
comments (nw)
Diffstat (limited to 'src/emu/cpu')
-rw-r--r--src/emu/cpu/v60/v60.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/src/emu/cpu/v60/v60.c b/src/emu/cpu/v60/v60.c
index 38b17139fb7..2a770739e25 100644
--- a/src/emu/cpu/v60/v60.c
+++ b/src/emu/cpu/v60/v60.c
@@ -8,6 +8,71 @@
// Emulation for the NEC V60 (uPD70615) and V70 (uPD70632) CPUs
//
+/*
+Taken from the NEC Semiconductor Selection Guide Guide Book (Oct. 1995):
+
+uPD70615 (V60)
+Features:
+- Virtual memory (paging method)
+- Level protection architecture - 4-level hierarchical protection function
+ for system multi-programming.
+- Abundant general registers - Thirty two 32-bit general registers for
+ optimizing compiler
+- Refined instruction set - 2-address method: Arbitrary addressing mode
+ can be used independently for source operand and destination operand.
+- Abundant address modes and data types - Auto increment/decrement mode
+ for string process, and memory indirect addressing for pointer operation
+- High cost-to performance chip
+- No multiprocessor system - no FRM function for increasing system
+ reliability using two or more processors.
+- No V20/V30 simulation mode
+Address bus: 24 bits
+Data bus: 16 bits
+Memory space: 4G bytes
+Operating frequency: 16 MHz
+Package: 120-pin QFP
+
+uPD70616 (V60)
+Features:
+- Virtual memory (paging method)
+- Level protection architecture - 4-level hierarchical protection function
+ for system multi-programming.
+- Abundant general registers - Thirty two 32-bit general registers for
+ optimizing compiler
+- Refined instruction set - 2-address method: Arbitrary addressing mode
+ can be used independently for source operand and destination operand.
+- Abundant address modes and data types - Auto increment/decrement mode
+ for string process, and memory indirect addressing for pointer operation
+- Multiprocessor system - FRM function for increasing system reliability
+ using two or more processors.
+- V20/V30 simulation mode
+Address bus: 24 bits
+Data bus: 16 bits
+Memory space: 4G bytes
+Operating frequency: 16 MHz
+Package: 68-pin PGA
+
+uPD70632 (V70)
+Features:
+- Virtual memory (paging method)
+- Level protection architecture - 4-level hierarchical protection function
+ for system multi-programming.
+- Abundant general registers - Thirty two 32-bit general registers for
+ optimizing compiler
+- Refined instruction set - 2-address method: Arbitrary addressing mode
+ can be used independently for source operand and destination operand.
+- Abundant address modes and data types - Auto increment/decrement mode
+ for string process, and memory indirect addressing for pointer operation
+- Multiprocessor system - FRM function for increasing system reliability
+ using two or more processors.
+- V20/V30 simulation mode
+Address bus: 32 bits
+Data bus: 32 bits
+Memory space: 4G bytes
+Operating frequency: 20 MHz
+Package: 132-pin PGA, 200-pin QFP
+*/
+
#include "emu.h"
#include "debugger.h"
#include "v60.h"