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author hap <happppp@users.noreply.github.com>2015-07-14 19:37:05 +0200
committer hap <happppp@users.noreply.github.com>2015-07-14 19:37:05 +0200
commit943ecf021f6f5326fda61c6fdbef151e74163a07 (patch)
tree69bfb97fa0d7875b74f1d7fc87143b8edad73812 /src/emu/cpu
parent1fe92d8e557651dc05ab7eb69b7552eb80ade98b (diff)
rm unneeded code
Diffstat (limited to 'src/emu/cpu')
-rw-r--r--src/emu/cpu/sm510/sm510.c6
-rw-r--r--src/emu/cpu/sm510/sm510.h12
-rw-r--r--src/emu/cpu/sm510/sm510core.c33
-rw-r--r--src/emu/cpu/sm510/sm510op.c2
-rw-r--r--src/emu/cpu/sm510/sm511core.c2
5 files changed, 8 insertions, 47 deletions
diff --git a/src/emu/cpu/sm510/sm510.c b/src/emu/cpu/sm510/sm510.c
index 4f60ec93731..ec1fa85fd77 100644
--- a/src/emu/cpu/sm510/sm510.c
+++ b/src/emu/cpu/sm510/sm510.c
@@ -3,9 +3,9 @@
/*
Sharp SM510 MCU family - known chips:
- - SM510: x
- - SM511: x
- - SM512: x
+ - SM510: 2.7Kx8 ROM, 128x4 RAM(32x4 for LCD)
+ - SM511: 4Kx8 ROM, 128x4 RAM(32x4 for LCD), melody controller
+ - SM512: 4Kx8 ROM, 128x4 RAM(48x4 for LCD), melody controller
Other chips that may be in the same family, investigate more when one of
them needs to get emulated: SM500, SM530, SM531, ..
diff --git a/src/emu/cpu/sm510/sm510.h b/src/emu/cpu/sm510/sm510.h
index bf691650547..b50cea20957 100644
--- a/src/emu/cpu/sm510/sm510.h
+++ b/src/emu/cpu/sm510/sm510.h
@@ -156,7 +156,7 @@ protected:
UINT16 get_lcd_row(int column, UINT8* ram);
TIMER_CALLBACK_MEMBER(lcd_timer_cb);
- virtual void init_lcd_driver();
+ void init_lcd_driver();
// melody controller
optional_region_ptr<UINT8> m_melody_rom;
@@ -175,9 +175,8 @@ protected:
bool m_1s;
bool wake_me_up();
- virtual void reset_divider() { m_div = 0; }
- virtual void init_divider();
- virtual TIMER_CALLBACK_MEMBER(div_timer_cb);
+ void init_divider();
+ TIMER_CALLBACK_MEMBER(div_timer_cb);
// other i/o handlers
devcb_read8 m_read_k;
@@ -277,11 +276,6 @@ protected:
virtual void get_opcode_param();
virtual void update_w_latch() { m_write_s(0, m_w, 0xff); } // W is connected directly to S
-
- // divider
- virtual TIMER_CALLBACK_MEMBER(div_timer_cb);
- virtual void reset_divider();
- virtual void init_divider();
};
diff --git a/src/emu/cpu/sm510/sm510core.c b/src/emu/cpu/sm510/sm510core.c
index cbdb4c37edd..bf1449804c3 100644
--- a/src/emu/cpu/sm510/sm510core.c
+++ b/src/emu/cpu/sm510/sm510core.c
@@ -44,39 +44,6 @@ offs_t sm510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
-
-//-------------------------------------------------
-// divider
-//-------------------------------------------------
-
-TIMER_CALLBACK_MEMBER(sm510_device::div_timer_cb)
-{
- // no need to increment it by 1 everytime, since only the
- // highest bits are accessible
- m_div = (m_div + 0x800) & 0x7fff;
-
- // 1S signal on overflow(falling edge of f1)
- if (m_div == 0)
- m_1s = true;
-
- // schedule next timeout
- m_div_timer->adjust(attotime::from_ticks(0x800, unscaled_clock()));
-}
-
-void sm510_device::reset_divider()
-{
- m_div = 0;
- m_div_timer->adjust(attotime::from_ticks(0x800, unscaled_clock()));
-}
-
-void sm510_device::init_divider()
-{
- m_div_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(sm510_device::div_timer_cb), this));
- reset_divider();
-}
-
-
-
//-------------------------------------------------
// execute
//-------------------------------------------------
diff --git a/src/emu/cpu/sm510/sm510op.c b/src/emu/cpu/sm510/sm510op.c
index f6c097932d3..eb877b594c2 100644
--- a/src/emu/cpu/sm510/sm510op.c
+++ b/src/emu/cpu/sm510/sm510op.c
@@ -432,7 +432,7 @@ void sm510_base_device::op_cend()
void sm510_base_device::op_idiv()
{
// IDIV: reset divider
- reset_divider();
+ m_div = 0;
}
void sm510_base_device::op_illegal()
diff --git a/src/emu/cpu/sm510/sm511core.c b/src/emu/cpu/sm510/sm511core.c
index 07f88152e27..d5dcf94cc7c 100644
--- a/src/emu/cpu/sm510/sm511core.c
+++ b/src/emu/cpu/sm510/sm511core.c
@@ -63,7 +63,7 @@ sm512_device::sm512_device(const machine_config &mconfig, const char *tag, devic
void sm511_device::get_opcode_param()
{
- // LBL, PRE, TL, TML and prefix opcodes are 2 bytes
+ // XXX?, LBL, PRE, TL, TML and prefix opcodes are 2 bytes
if (m_op == 0x01 || (m_op >= 0x5f && m_op <= 0x61) || (m_op & 0xf0) == 0x70 || (m_op & 0xfc) == 0x68)
{
m_icount--;