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author Aaron Giles <aaron@aarongiles.com>2008-11-09 01:04:37 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-11-09 01:04:37 +0000
commit1e16c452121de8429e05b38d5a0306ebe15fcdd4 (patch)
treed84961b587774ad4e0c68078eaf5ffb0f9b02e56 /src/emu/cpu
parentac7689264ec37623f67d18ca09ecd6ed88557672 (diff)
Cleanups/version bump.mame0128u3
Diffstat (limited to 'src/emu/cpu')
-rw-r--r--src/emu/cpu/adsp2100/adsp2100.c10
-rw-r--r--src/emu/cpu/dsp32/dsp32.c2
-rw-r--r--src/emu/cpu/dsp56k/dsp56dsm.c8
-rw-r--r--src/emu/cpu/dsp56k/dsp56ops.c60
-rw-r--r--src/emu/cpu/m6502/m4510.c26
-rw-r--r--src/emu/cpu/m6502/m6502.c30
-rw-r--r--src/emu/cpu/m6502/m6509.c24
-rw-r--r--src/emu/cpu/m6502/m65ce02.c2
-rw-r--r--src/emu/cpu/m68000/m68kcpu.c2
-rw-r--r--src/emu/cpu/m68000/m68kdasm.c18
-rw-r--r--src/emu/cpu/mcs48/mcs48.c4
-rw-r--r--src/emu/cpu/mcs51/mcs51.c28
-rw-r--r--src/emu/cpu/mcs51/mcs51.h4
-rw-r--r--src/emu/cpu/mcs51/mcs51dasm.c74
-rw-r--r--src/emu/cpu/mips/r3000.c6
-rw-r--r--src/emu/cpu/z80/z80.c18
16 files changed, 158 insertions, 158 deletions
diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c
index b79298ecf48..33efb32ae6c 100644
--- a/src/emu/cpu/adsp2100/adsp2100.c
+++ b/src/emu/cpu/adsp2100/adsp2100.c
@@ -249,7 +249,7 @@ typedef struct
int chip_type;
int mstat_mask;
int imask_mask;
-
+
/* register maps */
void * alu_xregs[8];
void * alu_yregs[4];
@@ -577,7 +577,7 @@ static CPU_SET_CONTEXT( adsp21xx )
static adsp2100_state *adsp21xx_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback)
{
adsp2100_state *adsp = device->token;
-
+
token = device->token; // temporary
/* create the tables */
@@ -587,7 +587,7 @@ static adsp2100_state *adsp21xx_init(const device_config *device, int index, int
/* set the IRQ callback */
adsp->irq_callback = irqcallback;
adsp->device = device;
-
+
/* set up ALU register pointers */
adsp->alu_xregs[0] = &adsp->core.ax0;
adsp->alu_xregs[1] = &adsp->core.ax1;
@@ -601,7 +601,7 @@ static adsp2100_state *adsp21xx_init(const device_config *device, int index, int
adsp->alu_yregs[1] = &adsp->core.ay1;
adsp->alu_yregs[2] = &adsp->core.af;
adsp->alu_yregs[3] = &adsp->core.zero;
-
+
/* set up MAC register pointers */
adsp->mac_xregs[0] = &adsp->core.mx0;
adsp->mac_xregs[1] = &adsp->core.mx1;
@@ -706,7 +706,7 @@ static adsp2100_state *adsp21xx_init(const device_config *device, int index, int
state_save_register_item("adsp2100", index, adsp->ifc);
state_save_register_item_array("adsp2100", index, adsp->irq_state);
state_save_register_item_array("adsp2100", index, adsp->irq_latch);
-
+
return adsp;
}
diff --git a/src/emu/cpu/dsp32/dsp32.c b/src/emu/cpu/dsp32/dsp32.c
index f02e6806e49..c2ab71d867c 100644
--- a/src/emu/cpu/dsp32/dsp32.c
+++ b/src/emu/cpu/dsp32/dsp32.c
@@ -354,7 +354,7 @@ static CPU_INIT( dsp32c )
/* copy in config data */
if (configdata)
dsp32.output_pins_changed = configdata->output_pins_changed;
-
+
dsp32.device = device;
}
diff --git a/src/emu/cpu/dsp56k/dsp56dsm.c b/src/emu/cpu/dsp56k/dsp56dsm.c
index 6af8ce7c4e2..bc104e233d4 100644
--- a/src/emu/cpu/dsp56k/dsp56dsm.c
+++ b/src/emu/cpu/dsp56k/dsp56dsm.c
@@ -344,10 +344,10 @@ CPU_DISASSEMBLE( dsp56k )
/* Now check it against all the other potential collisions */
/* This is necessary because "don't care bits" get in the way. */
/*
- MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152
- MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144
- MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128
- */
+ MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152
+ MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144
+ MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128
+ */
if (((op2 & 0xfe20) != 0x0200) &&
((op2 & 0xf810) != 0x3800) &&
((op2 & 0x00ff) != 0x0011))
diff --git a/src/emu/cpu/dsp56k/dsp56ops.c b/src/emu/cpu/dsp56k/dsp56ops.c
index 4138635fc31..a3dd016d2a1 100644
--- a/src/emu/cpu/dsp56k/dsp56ops.c
+++ b/src/emu/cpu/dsp56k/dsp56ops.c
@@ -367,10 +367,10 @@ static void execute_one(void)
/* Now check it against all the other potential collisions */
/* This is necessary because "don't care bits" get in the way. */
/*
- MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152
- MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144
- MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128
- */
+ MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152
+ MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144
+ MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128
+ */
if (((op2 & 0xfe20) != 0x0200) &&
((op2 & 0xf810) != 0x3800) &&
((op2 & 0x00ff) != 0x0011))
@@ -1821,7 +1821,7 @@ static size_t dsp56k_op_cmpm(const UINT16 op_byte, typed_pointer* d_register, UI
typed_pointer S = {NULL, DT_BYTE};
typed_pointer D = {NULL, DT_BYTE};
- decode_JJJF_table(BITS(op_byte,0x0007),BITS(op_byte,0x0008), &S, &D);
+ decode_JJJF_table(BITS(op_byte,0x0007),BITS(op_byte,0x0008), &S, &D);
*p_accum = *((UINT64*)D.addr);
@@ -1833,7 +1833,7 @@ static size_t dsp56k_op_cmpm(const UINT16 op_byte, typed_pointer* d_register, UI
absS |= U64(0xffffff8000000000);
}
else
- {
+ {
absS = (*((UINT16*)S.addr)) << 16;
if (absS & U64(0x0000000080000000))
absS |= U64(0xffffffff80000000);
@@ -1842,13 +1842,13 @@ static size_t dsp56k_op_cmpm(const UINT16 op_byte, typed_pointer* d_register, UI
/* Sign extend and get absolute value of the destination */
if (D.addr == &A || D.addr == &B)
- {
+ {
absD = *((UINT64*)D.addr);
if (absD & U64(0x0000008000000000))
absD |= U64(0xffffff8000000000);
}
else
- {
+ {
absD = (*((UINT16*)D.addr)) << 16;
if (absS & U64(0x0000000080000000))
absS |= U64(0xffffffff80000000);
@@ -4032,64 +4032,64 @@ static void decode_uuuuF_table(UINT16 uuuu, UINT16 F, UINT8 add_sub_other, typed
switch(switchVal)
{
- case 0x00: add_sub_other = OP_ADD;
+ case 0x00: add_sub_other = OP_ADD;
src_ret->addr = &X0; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x08: add_sub_other = OP_SUB;
+ case 0x08: add_sub_other = OP_SUB;
src_ret->addr = &X0; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x01: add_sub_other = OP_ADD;
+ case 0x01: add_sub_other = OP_ADD;
src_ret->addr = &X0; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x09: add_sub_other = OP_SUB;
+ case 0x09: add_sub_other = OP_SUB;
src_ret->addr = &X0; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x02: add_sub_other = OP_ADD;
+ case 0x02: add_sub_other = OP_ADD;
src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x0a: add_sub_other = OP_SUB;
+ case 0x0a: add_sub_other = OP_SUB;
src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x03: add_sub_other = OP_ADD;
+ case 0x03: add_sub_other = OP_ADD;
src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x0b: add_sub_other = OP_SUB;
+ case 0x0b: add_sub_other = OP_SUB;
src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x04: add_sub_other = OP_ADD;
+ case 0x04: add_sub_other = OP_ADD;
src_ret->addr = &X1; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x0c: add_sub_other = OP_SUB;
+ case 0x0c: add_sub_other = OP_SUB;
src_ret->addr = &X1; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x05: add_sub_other = OP_ADD;
+ case 0x05: add_sub_other = OP_ADD;
src_ret->addr = &X1; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x0d: add_sub_other = OP_SUB;
+ case 0x0d: add_sub_other = OP_SUB;
src_ret->addr = &X1; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x06: add_sub_other = OP_ADD;
+ case 0x06: add_sub_other = OP_ADD;
src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x0e: add_sub_other = OP_SUB;
+ case 0x0e: add_sub_other = OP_SUB;
src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x07: add_sub_other = OP_ADD;
+ case 0x07: add_sub_other = OP_ADD;
src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x0f: add_sub_other = OP_SUB;
+ case 0x0f: add_sub_other = OP_SUB;
src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x18: add_sub_other = OP_ADD;
+ case 0x18: add_sub_other = OP_ADD;
src_ret->addr = &B; src_ret->data_type = DT_LONG_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x1a: add_sub_other = OP_SUB;
+ case 0x1a: add_sub_other = OP_SUB;
src_ret->addr = &B; src_ret->data_type = DT_LONG_WORD;
dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x19: add_sub_other = OP_ADD;
+ case 0x19: add_sub_other = OP_ADD;
src_ret->addr = &A; src_ret->data_type = DT_LONG_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
- case 0x1b: add_sub_other = OP_SUB;
+ case 0x1b: add_sub_other = OP_SUB;
src_ret->addr = &A; src_ret->data_type = DT_LONG_WORD;
dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
}
@@ -4458,8 +4458,8 @@ static void execute_dual_x_memory_data_read(const UINT16 op, typed_pointer* d_re
if (R.addr == &R3)
fatalerror("Dsp56k: Error. Dual x memory data read specified R3 as its first source!");
- /* The note on A-142 is very interesting.
- You can effectively access external memory in the last 64 bytes of X data memory! */
+ /* The note on A-142 is very interesting.
+ You can effectively access external memory in the last 64 bytes of X data memory! */
if (*((UINT16*)D2.addr) >= 0xffc0)
fatalerror("Dsp56k: Unimplemented access to external X Data Memory >= 0xffc0 in Dual X Memory Data Read.");
diff --git a/src/emu/cpu/m6502/m4510.c b/src/emu/cpu/m6502/m4510.c
index c564a9b5771..e27a8240fce 100644
--- a/src/emu/cpu/m6502/m4510.c
+++ b/src/emu/cpu/m6502/m4510.c
@@ -141,11 +141,11 @@ struct _m4510_Regs {
UINT8 irq_state;
UINT16 low, high;
UINT32 mem[8];
-
+
cpu_irq_callback irq_callback;
const device_config *device;
int icount;
-
+
read8_machine_func rdmem_id; /* readmem callback for indexed instructions */
write8_machine_func wrmem_id; /* writemem callback for indexed instructions */
@@ -179,20 +179,20 @@ INLINE int m4510_cpu_readop_arg(m4510_Regs *m4510)
static READ8_HANDLER( default_rdmem_id )
{
m4510_Regs *m4510 = token;
- return program_read_byte_8le(M4510_MEM(offset));
+ return program_read_byte_8le(M4510_MEM(offset));
}
-static WRITE8_HANDLER( default_wrmem_id )
+static WRITE8_HANDLER( default_wrmem_id )
{
m4510_Regs *m4510 = token;
- program_write_byte_8le(M4510_MEM(offset), data);
+ program_write_byte_8le(M4510_MEM(offset), data);
}
static CPU_INIT( m4510 )
{
m4510_Regs *m4510 = device->token;
-
+
token = device->token;
-
+
m4510->interrupt_inhibit = 0;
m4510->rdmem_id = default_rdmem_id;
m4510->wrmem_id = default_wrmem_id;
@@ -203,7 +203,7 @@ static CPU_INIT( m4510 )
static CPU_RESET( m4510 )
{
m4510_Regs *m4510 = device->token;
-
+
m4510->insn = insn4510;
/* wipe out the rest of the m65ce02 structure */
@@ -276,7 +276,7 @@ INLINE void m4510_take_irq(m4510_Regs *m4510)
static CPU_EXECUTE( m4510 )
{
m4510_Regs *m4510 = token;
-
+
m4510->icount = cycles;
CHANGE_PC;
@@ -378,7 +378,7 @@ static READ8_HANDLER( m4510_read_0000 )
static WRITE8_HANDLER( m4510_write_0000 )
{
m4510_Regs *m4510 = token;
-
+
switch(offset)
{
case 0x0000: /* DDR */
@@ -400,7 +400,7 @@ ADDRESS_MAP_END
static CPU_TRANSLATE( m4510 )
{
m4510_Regs *m4510 = token;
-
+
if (space == ADDRESS_SPACE_PROGRAM)
*address = M4510_MEM(*address);
return TRUE;
@@ -413,7 +413,7 @@ static CPU_TRANSLATE( m4510 )
static CPU_SET_INFO( m4510 )
{
m4510_Regs *m4510 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@@ -460,7 +460,7 @@ static CPU_SET_INFO( m4510 )
CPU_GET_INFO( m4510 )
{
m4510_Regs *m4510 = token;
-
+
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c
index 02101f6f167..b68b770710c 100644
--- a/src/emu/cpu/m6502/m6502.c
+++ b/src/emu/cpu/m6502/m6502.c
@@ -137,7 +137,7 @@ static void m6502_common_init(const device_config *device, int index, int clock,
m6502_Regs *m6502 = device->token;
token = device->token; // temporary
-
+
m6502->irq_callback = irqcallback;
m6502->device = device;
m6502->subtype = subtype;
@@ -201,7 +201,7 @@ static CPU_GET_CONTEXT( m6502 )
static CPU_SET_CONTEXT( m6502 )
{
m6502_Regs *m6502;
-
+
if( src )
{
token = src;
@@ -233,7 +233,7 @@ INLINE void m6502_take_irq(m6502_Regs *m6502)
static CPU_EXECUTE( m6502 )
{
m6502_Regs *m6502 = device->token;
-
+
m6502->icount = cycles;
change_pc(PCD);
@@ -367,7 +367,7 @@ static CPU_INIT( m6510 )
static CPU_RESET( m6510 )
{
m6502_Regs *m6502 = device->token;
-
+
CPU_RESET_CALL(m6502);
m6502->port = 0xff;
m6502->ddr = 0x00;
@@ -400,7 +400,7 @@ static READ8_HANDLER( m6510_read_0000 )
static WRITE8_HANDLER( m6510_write_0000 )
{
m6502_Regs *m6502 = token;
-
+
switch(offset)
{
case 0x0000: /* DDR */
@@ -435,7 +435,7 @@ static CPU_INIT( m65c02 )
static CPU_RESET( m65c02 )
{
m6502_Regs *m6502 = device->token;
-
+
CPU_RESET_CALL(m6502);
P &=~F_D;
}
@@ -463,7 +463,7 @@ INLINE void m65c02_take_irq(m6502_Regs *m6502)
static CPU_EXECUTE( m65c02 )
{
m6502_Regs *m6502 = device->token;
-
+
m6502->icount = cycles;
change_pc(PCD);
@@ -557,7 +557,7 @@ static CPU_INIT( deco16 )
static CPU_RESET( deco16 )
{
m6502_Regs *m6502 = device->token;
-
+
CPU_RESET_CALL(m6502);
m6502->subtype = SUBTYPE_DECO16;
m6502->insn = insndeco16;
@@ -638,7 +638,7 @@ static void deco16_set_irq_line(m6502_Regs *m6502, int irqline, int state)
static CPU_EXECUTE( deco16 )
{
m6502_Regs *m6502 = device->token;
-
+
m6502->icount = cycles;
change_pc(PCD);
@@ -693,7 +693,7 @@ static CPU_EXECUTE( deco16 )
static CPU_SET_INFO( m6502 )
{
m6502_Regs *m6502 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@@ -727,7 +727,7 @@ static CPU_SET_INFO( m6502 )
CPU_GET_INFO( m6502 )
{
m6502_Regs *m6502 = token;
-
+
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@@ -844,7 +844,7 @@ CPU_GET_INFO( n2a03 )
static CPU_SET_INFO( m6510 )
{
m6502_Regs *m6502 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as pointers to data or functions --- */
@@ -858,7 +858,7 @@ static CPU_SET_INFO( m6510 )
CPU_GET_INFO( m6510 )
{
m6502_Regs *m6502 = token;
-
+
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
@@ -944,7 +944,7 @@ CPU_GET_INFO( m8502 )
static CPU_SET_INFO( m65c02 )
{
m6502_Regs *m6502 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@@ -1008,7 +1008,7 @@ CPU_GET_INFO( m65sc02 )
static CPU_SET_INFO( deco16 )
{
m6502_Regs *m6502 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
diff --git a/src/emu/cpu/m6502/m6509.c b/src/emu/cpu/m6502/m6509.c
index 7abe73f5154..6a63a2b0eff 100644
--- a/src/emu/cpu/m6502/m6509.c
+++ b/src/emu/cpu/m6502/m6509.c
@@ -97,14 +97,14 @@ static void *token;
static READ8_HANDLER( m6509_read_00000 )
{
m6509_Regs *m6509 = token;
-
+
return m6509->pc_bank.b.h2;
}
static READ8_HANDLER( m6509_read_00001 )
{
m6509_Regs *m6509 = token;
-
+
return m6509->ind_bank.b.h2;
}
@@ -112,7 +112,7 @@ static WRITE8_HANDLER( m6509_write_00000 )
{
m6509_Regs *m6509 = token;
m6509_Regs *m6502 = m6509;
-
+
m6509->pc_bank.b.h2=data&0xf;
m6509->pc.w.h=m6509->pc_bank.w.h;
change_pc(PCD);
@@ -122,7 +122,7 @@ static WRITE8_HANDLER( m6509_write_00000 )
static WRITE8_HANDLER( m6509_write_00001 )
{
m6509_Regs *m6509 = token;
-
+
m6509->ind_bank.b.h2=data&0xf;
}
@@ -137,9 +137,9 @@ static WRITE8_HANDLER( default_wdmem_id ) { program_write_byte_8le(offset, data)
static CPU_INIT( m6509 )
{
m6509_Regs *m6509 = device->token;
-
+
token = device->token; // temporary
-
+
m6509->rdmem_id = default_rdmem_id;
m6509->wrmem_id = default_wdmem_id;
m6509->irq_callback = irqcallback;
@@ -150,7 +150,7 @@ static CPU_RESET( m6509 )
{
m6509_Regs *m6509 = device->token;
m6509_Regs *m6502 = m6509;
-
+
m6509->insn = insn6509;
m6509->pc_bank.d=m6509->ind_bank.d=0;
@@ -182,7 +182,7 @@ static CPU_GET_CONTEXT( m6509 )
static CPU_SET_CONTEXT( m6509 )
{
m6509_Regs *m6502;
-
+
if( src )
{
token = src;
@@ -219,7 +219,7 @@ static CPU_EXECUTE( m6509 )
{
m6509_Regs *m6502 = device->token;
m6509_Regs *m6509 = m6502;
-
+
m6502->icount = cycles;
change_pc(PCD);
@@ -265,7 +265,7 @@ static CPU_EXECUTE( m6509 )
static void m6509_set_irq_line(m6509_Regs *m6509, int irqline, int state)
{
m6509_Regs *m6502 = m6509;
-
+
if (irqline == INPUT_LINE_NMI)
{
if (m6509->nmi_state == state) return;
@@ -315,7 +315,7 @@ static CPU_SET_INFO( m6509 )
{
m6509_Regs *m6509 = token;
m6509_Regs *m6502 = m6509;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@@ -352,7 +352,7 @@ CPU_GET_INFO( m6509 )
{
m6509_Regs *m6502 = token;
m6509_Regs *m6509 = m6502;
-
+
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c
index 29d7d876334..be9641d197c 100644
--- a/src/emu/cpu/m6502/m65ce02.c
+++ b/src/emu/cpu/m6502/m65ce02.c
@@ -55,7 +55,7 @@
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-typedef struct _m65ce02_Regs m65ce02_Regs;
+typedef struct _m65ce02_Regs m65ce02_Regs;
struct _m65ce02_Regs {
void (*const *insn)(void); /* pointer to the function pointer table */
PAIR ppc; /* previous program counter */
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index 8a8e9e2ddf8..7201d911fd0 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -873,7 +873,7 @@ unsigned int m68k_get_virq(m68ki_cpu_core *m68k, unsigned int level)
void m68k_init(m68ki_cpu_core *m68k)
{
static UINT32 emulation_initialized = 0;
-
+
/* The first call to this function initializes the opcode handler jump table */
if(!emulation_initialized)
{
diff --git a/src/emu/cpu/m68000/m68kdasm.c b/src/emu/cpu/m68000/m68kdasm.c
index d97b297bb9e..4e52b50d276 100644
--- a/src/emu/cpu/m68000/m68kdasm.c
+++ b/src/emu/cpu/m68000/m68kdasm.c
@@ -245,10 +245,10 @@ static const char *const g_cpcc[64] =
static UINT32 dasm_read_imm_8(UINT32 advance)
{
UINT32 result;
-// if (g_rawop)
+// if (g_rawop)
result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];
-// else
-// result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
+// else
+// result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
g_cpu_pc += advance;
return result;
}
@@ -256,11 +256,11 @@ static UINT32 dasm_read_imm_8(UINT32 advance)
static UINT32 dasm_read_imm_16(UINT32 advance)
{
UINT32 result;
-// if (g_rawop)
+// if (g_rawop)
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |
g_rawop[g_cpu_pc + 1 - g_rawbasepc];
-// else
-// result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
+// else
+// result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
g_cpu_pc += advance;
return result;
}
@@ -268,13 +268,13 @@ static UINT32 dasm_read_imm_16(UINT32 advance)
static UINT32 dasm_read_imm_32(UINT32 advance)
{
UINT32 result;
-// if (g_rawop)
+// if (g_rawop)
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |
(g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |
(g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
g_rawop[g_cpu_pc + 3 - g_rawbasepc];
-// else
-// result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask) & 0xff;
+// else
+// result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask) & 0xff;
g_cpu_pc += advance;
return result;
}
diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index ea0001e6332..ddffa5ad543 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -1009,7 +1009,7 @@ static CPU_SET_CONTEXT( mcs48 )
token = src;
mcs48 = token;
update_regptr(mcs48);
- change_pc(PC);
+ change_pc(PC);
}
/*-------------------------------------------------
@@ -1020,7 +1020,7 @@ static CPU_SET_CONTEXT( mcs48 )
static CPU_SET_INFO( mcs48 )
{
mcs48_state *mcs48 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c
index 642710f3059..96599d8b53f 100644
--- a/src/emu/cpu/mcs51/mcs51.c
+++ b/src/emu/cpu/mcs51/mcs51.c
@@ -32,7 +32,7 @@
/*****************************************************************************
* DS5002FP emulator by Manuel Abadia
- *
+ *
* October 2008, couriersud: Merged back in mcs51
*
* What has been added?
@@ -74,7 +74,7 @@
/******************************************************************************
* Notes:
- *
+ *
* The term cycles is used here to really refer to clock oscilations, because 1 machine cycle
* actually takes 12 oscilations.
*
@@ -267,7 +267,7 @@ struct _mcs51_regs
int cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
UINT8 irq_active; /* mask which irq levels are serviced */
UINT8 irq_prio[8]; /* interrupt priority */
-
+
int icount;
mcs51_uart uart; /* internal uart */
@@ -1906,7 +1906,7 @@ static void mcs51_set_irq_line(mcs51_regs *mcs51, int irqline, int state)
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( mcs51 )
{
- mcs51_regs *mcs51 = device->token;
+ mcs51_regs *mcs51 = device->token;
UINT8 op;
mcs51->icount = cycles;
@@ -2058,7 +2058,7 @@ static CPU_INIT( mcs51 )
mcs51_regs *mcs51 = device->token;
token = device->token; // temporary
-
+
mcs51->irq_callback = irqcallback;
mcs51->device = device;
@@ -2225,7 +2225,7 @@ static CPU_INIT( i8052 )
{
mcs51_regs *mcs51 = device->token;
CPU_INIT_CALL(mcs51);
-
+
mcs51->ram_mask = 0xFF; /* 256 bytes of ram */
mcs51->num_interrupts = 6; /* 6 interrupts */
@@ -2278,7 +2278,7 @@ static CPU_INIT( i80c52 )
{
mcs51_regs *mcs51 = device->token;
CPU_INIT_CALL(i8052);
-
+
mcs51->features |= (FEATURE_I80C52 | FEATURE_CMOS);
mcs51->sfr_read = i80c52_sfr_read;
mcs51->sfr_write = i80c52_sfr_write;
@@ -2358,7 +2358,7 @@ static UINT8 ds5002fp_sfr_read(mcs51_regs *mcs51, size_t offset)
case ADDR_RPS: DS5_LOGR(RPS, data); break;
case ADDR_PCON:
SET_PFW(0); /* reset PFW flag */
- return mcs51_sfr_read(mcs51, offset);
+ return mcs51_sfr_read(mcs51, offset);
default:
return mcs51_sfr_read(mcs51, offset);
}
@@ -2371,9 +2371,9 @@ static CPU_INIT( ds5002fp )
static const ds5002fp_config default_config = { 0x00, 0x00, 0x00 };
const ds5002fp_config *sconfig = config ? config : &default_config;
mcs51_regs *mcs51 = device->token;
-
+
CPU_INIT_CALL( mcs51 );
-
+
mcs51->ds5002fp.config = sconfig;
mcs51->features |= (FEATURE_DS5002FP | FEATURE_CMOS);
mcs51->sfr_read = ds5002fp_sfr_read;
@@ -2420,10 +2420,10 @@ static CPU_GET_CONTEXT( mcs51 )
static CPU_SET_CONTEXT( mcs51 )
{
mcs51_regs *mcs51;
-
+
if( src )
token = src;
-
+
mcs51 = token;
change_pc(PC);
update_ptrs(mcs51);
@@ -2436,7 +2436,7 @@ static CPU_SET_CONTEXT( mcs51 )
static CPU_SET_INFO( mcs51 )
{
mcs51_regs *mcs51 = token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@@ -2502,7 +2502,7 @@ static CPU_GET_INFO( mcs51 )
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 18; /* 128k for ds5002fp */ break;
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
-
+
case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
case CPUINFO_INT_PC: info->i = PC; break;
case CPUINFO_INT_SP: info->i = SP; break;
diff --git a/src/emu/cpu/mcs51/mcs51.h b/src/emu/cpu/mcs51/mcs51.h
index 252bacc5750..9c33d76984b 100644
--- a/src/emu/cpu/mcs51/mcs51.h
+++ b/src/emu/cpu/mcs51/mcs51.h
@@ -122,7 +122,7 @@ CPU_GET_INFO( at89c4051 );
/*
* The DS5002FP has 2 16 bits data address buses (the byte-wide bus and the expanded bus). The exact memory position accessed depends on the
* partition mode, the memory range and the expanded bus select. The partition mode and the expanded bus select can be changed at any time.
- *
+ *
* In order to simplify memory mapping to the data address bus, the following address map is assumed for partitioned mode:
* 0x00000-0x0ffff -> data memory on the expanded bus
@@ -131,7 +131,7 @@ CPU_GET_INFO( at89c4051 );
* For non-partitioned mode the following memory map is assumed:
* 0x0000-0xffff -> data memory (the bus used to access it does not matter)
- *
+ *
* Internal ram 128k and security features
*/
diff --git a/src/emu/cpu/mcs51/mcs51dasm.c b/src/emu/cpu/mcs51/mcs51dasm.c
index b7f1e01df70..020321f9b04 100644
--- a/src/emu/cpu/mcs51/mcs51dasm.c
+++ b/src/emu/cpu/mcs51/mcs51dasm.c
@@ -59,7 +59,7 @@ static struct {
int feature;
int addr;
const char *name;
-} mem_name_feature[] =
+} mem_name_feature[] =
{
{ FEATURE_NONE, 0x00, "rb0r0" },
{ FEATURE_NONE, 0x01, "rb0r1" },
@@ -93,7 +93,7 @@ static struct {
{ FEATURE_NONE, 0x1d, "rb3r5" },
{ FEATURE_NONE, 0x1e, "rb3r6" },
{ FEATURE_NONE, 0x1f, "rb3r7" },
-
+
{ FEATURE_NONE, 0x80, "p0" },
{ FEATURE_NONE, 0x81, "sp" },
{ FEATURE_NONE, 0x82, "dpl" },
@@ -115,13 +115,13 @@ static struct {
{ FEATURE_NONE, 0xd0, "psw" },
{ FEATURE_NONE, 0xe0, "acc" },
{ FEATURE_NONE, 0xf0, "b" },
-
+
{ FEATURE_I8052, 0xc8, "t2con" },
{ FEATURE_I8052, 0xca, "rcap2l" },
{ FEATURE_I8052, 0xcb, "rcap2h" },
{ FEATURE_I8052, 0xcc, "tl2" },
{ FEATURE_I8052, 0xcd, "th2" },
-
+
{ FEATURE_I80C52, 0xb7, "iph" },
{ FEATURE_I80C52, 0xa9, "saddr" },
{ FEATURE_I80C52, 0xb9, "saden" },
@@ -143,7 +143,7 @@ static struct {
{ FEATURE_I83C751, 0xf8, "i2sta" }, /* read only */
/* bit addresses */
-
+
{ FEATURE_NONE, 0x188, "it0" },
{ FEATURE_NONE, 0x189, "ie0" },
{ FEATURE_NONE, 0x18a, "it1" },
@@ -184,7 +184,7 @@ static struct {
{ FEATURE_I8052, 0x1ad, "et2" },
/* FIXME: port 3 - depends on external circuits and not really
- * implemented in the core. TBD */
+ * implemented in the core. TBD */
{ FEATURE_NONE, 0x1b0, "rxd" },
{ FEATURE_NONE, 0x1b1, "txd" },
{ FEATURE_NONE, 0x1b2, "int0" },
@@ -224,37 +224,37 @@ static struct {
{ FEATURE_NONE, 0x1d6, "ac" },
{ FEATURE_NONE, 0x1d7, "cy" },
- { FEATURE_DS5002FP, 0x1d8, "rg0" },
- { FEATURE_DS5002FP, 0x1d9, "rpc" },
- { FEATURE_DS5002FP, 0x1da, "dma" },
- { FEATURE_DS5002FP, 0x1db, "ibi" },
- { FEATURE_DS5002FP, 0x1dc, "ae" },
- { FEATURE_DS5002FP, 0x1dd, "exbs" },
- { FEATURE_DS5002FP, 0x1de, "d8.6" },
+ { FEATURE_DS5002FP, 0x1d8, "rg0" },
+ { FEATURE_DS5002FP, 0x1d9, "rpc" },
+ { FEATURE_DS5002FP, 0x1da, "dma" },
+ { FEATURE_DS5002FP, 0x1db, "ibi" },
+ { FEATURE_DS5002FP, 0x1dc, "ae" },
+ { FEATURE_DS5002FP, 0x1dd, "exbs" },
+ { FEATURE_DS5002FP, 0x1de, "d8.6" },
{ FEATURE_DS5002FP, 0x1df, "rnr" },
- { FEATURE_I83C751, 0x1d8, "ct0" },
- { FEATURE_I83C751, 0x1d9, "ct1" },
- { FEATURE_I83C751, 0x1da, "i2cfg.2" },
- { FEATURE_I83C751, 0x1db, "i2cfg.3" },
- { FEATURE_I83C751, 0x1dc, "tirun" },
- { FEATURE_I83C751, 0x1dd, "clrti" },
- { FEATURE_I83C751, 0x1de, "masterq" },
+ { FEATURE_I83C751, 0x1d8, "ct0" },
+ { FEATURE_I83C751, 0x1d9, "ct1" },
+ { FEATURE_I83C751, 0x1da, "i2cfg.2" },
+ { FEATURE_I83C751, 0x1db, "i2cfg.3" },
+ { FEATURE_I83C751, 0x1dc, "tirun" },
+ { FEATURE_I83C751, 0x1dd, "clrti" },
+ { FEATURE_I83C751, 0x1de, "masterq" },
{ FEATURE_I83C751, 0x1df, "slaven" },
- { FEATURE_I83C751, 0x1f8, "xstp" },
- { FEATURE_I83C751, 0x1f9, "xstr" },
- { FEATURE_I83C751, 0x1fa, "makstp" },
- { FEATURE_I83C751, 0x1fb, "makstr" },
- { FEATURE_I83C751, 0x1fc, "xactv" },
- { FEATURE_I83C751, 0x1fd, "xdata" },
- { FEATURE_I83C751, 0x1fe, "idle" },
+ { FEATURE_I83C751, 0x1f8, "xstp" },
+ { FEATURE_I83C751, 0x1f9, "xstr" },
+ { FEATURE_I83C751, 0x1fa, "makstp" },
+ { FEATURE_I83C751, 0x1fb, "makstr" },
+ { FEATURE_I83C751, 0x1fc, "xactv" },
+ { FEATURE_I83C751, 0x1fd, "xdata" },
+ { FEATURE_I83C751, 0x1fe, "idle" },
{ FEATURE_I83C751, 0x1ff, "i2sta.7" },
- /* unkown
- * "ibf", "obf", "idsm", "obfc", e8 - eb
- * "ma0", "ma1", "mb0", "mb1", ec - ef
- */
+ /* unkown
+ * "ibf", "obf", "idsm", "obfc", e8 - eb
+ * "ma0", "ma1", "mb0", "mb1", ec - ef
+ */
{ -1 }
};
@@ -263,7 +263,7 @@ static void init_mem_names(int feature_set, const char **mem_names)
{
int i;
int feature;
-
+
/* Set defaults / i8051 */
for (i = 0; feature = mem_name_feature[i].feature, feature >= 0; i++)
{
@@ -1158,7 +1158,7 @@ CPU_DISASSEMBLE( i8051 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
-
+
if (!mem_names_initialized)
{
init_mem_names( FEATURE_NONE, mem_names);
@@ -1171,7 +1171,7 @@ CPU_DISASSEMBLE( i8052 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
-
+
if (!mem_names_initialized)
{
init_mem_names( FEATURE_I8052, mem_names);
@@ -1184,7 +1184,7 @@ CPU_DISASSEMBLE( i80c51 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
-
+
if (!mem_names_initialized)
{
init_mem_names( FEATURE_CMOS, mem_names);
@@ -1197,7 +1197,7 @@ CPU_DISASSEMBLE( i80c52 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
-
+
if (!mem_names_initialized)
{
init_mem_names( FEATURE_I8052 | FEATURE_CMOS | FEATURE_I80C52, mem_names);
@@ -1210,7 +1210,7 @@ CPU_DISASSEMBLE( ds5002fp )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
-
+
if (!mem_names_initialized)
{
init_mem_names( FEATURE_DS5002FP | FEATURE_CMOS, mem_names);
diff --git a/src/emu/cpu/mips/r3000.c b/src/emu/cpu/mips/r3000.c
index 5e42d29cdd1..20674c3fd25 100644
--- a/src/emu/cpu/mips/r3000.c
+++ b/src/emu/cpu/mips/r3000.c
@@ -322,7 +322,7 @@ static CPU_GET_CONTEXT( r3000 )
static CPU_SET_CONTEXT( r3000 )
{
r3000_state *r3000;
-
+
/* copy the context */
if (src)
token = src;
@@ -344,7 +344,7 @@ static CPU_INIT( r3000 )
{
const r3000_cpu_core *configdata = config;
r3000_state *r3000 = device->token;
-
+
token = device->token; // temporary
/* allocate memory */
@@ -736,7 +736,7 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op)
static CPU_EXECUTE( r3000 )
{
r3000_state *r3000 = device->token;
-
+
/* count cycles and interrupt cycles */
r3000->icount = cycles;
r3000->icount -= r3000->interrupt_cycles;
diff --git a/src/emu/cpu/z80/z80.c b/src/emu/cpu/z80/z80.c
index 437602598c7..398dcf3d1c2 100644
--- a/src/emu/cpu/z80/z80.c
+++ b/src/emu/cpu/z80/z80.c
@@ -18,7 +18,7 @@
* - This entire notice must remain in the source code.
*
* Changes in 3.8 [Miodrag Milanovic]
- * - Added MEMPTR register (according to informations provided
+ * - Added MEMPTR register (according to informations provided
* by Vladimir Kladov
* - BIT n,(HL) now return valid values due to use of MEMPTR
* - Fixed BIT 6,(XY+o) undocumented instructions
@@ -805,7 +805,7 @@ INLINE UINT32 ARG16(z80_state *z80)
} \
else \
{ \
- MEMPTR = ARG16(z80); /* implicit call PC+=2; */ \
+ MEMPTR = ARG16(z80); /* implicit call PC+=2; */ \
}
/***************************************************************
@@ -882,7 +882,7 @@ INLINE UINT32 ARG16(z80_state *z80)
PUSH( pc ); \
PCD = addr; \
MEMPTR = PC; \
- change_pc(PCD);
+ change_pc(PCD);
/***************************************************************
* INC r8
@@ -3429,9 +3429,9 @@ static CPU_INIT( z80 )
{
z80_state *z80 = device->token;
int i, p;
-
+
token = device->token; // temporary
-
+
/* setup cycle tables */
cc[Z80_TABLE_op] = cc_op;
cc[Z80_TABLE_cb] = cc_cb;
@@ -3565,7 +3565,7 @@ static CPU_INIT( z80 )
static CPU_RESET( z80 )
{
z80_state *z80 = device->token;
-
+
PC = 0x0000;
I = 0;
R = 0;
@@ -3598,7 +3598,7 @@ static CPU_EXIT( z80 )
static CPU_EXECUTE( z80 )
{
z80_state *z80 = device->token;
-
+
z80->icount = cycles;
/* check for NMIs on the way in; they can only be set externally */
@@ -3641,7 +3641,7 @@ static CPU_EXECUTE( z80 )
static CPU_BURN( z80 )
{
z80_state *z80 = token;
-
+
if( cycles > 0 )
{
/* NOP takes 4 cycles per instruction */
@@ -3667,7 +3667,7 @@ static CPU_SET_CONTEXT( z80 )
if( src )
token = src;
z80 = token;
- change_pc(PCD);
+ change_pc(PCD);
}
/****************************************************************************