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author Angelo Salese <angelosa@users.noreply.github.com>2011-09-06 13:39:18 +0000
committer Angelo Salese <angelosa@users.noreply.github.com>2011-09-06 13:39:18 +0000
commitc0b3576488b11336c6379a12d6b2e3e2f6337d99 (patch)
tree02e0cbbecba525baf7add93dd3527736005770a5 /src/emu/cpu/m37710
parent7150db5043d9fb09a84f92e7e2537743ac1b0744 (diff)
Cleanups and version bumpmame0143u5
Diffstat (limited to 'src/emu/cpu/m37710')
-rw-r--r--src/emu/cpu/m37710/m37710.c30
-rw-r--r--src/emu/cpu/m37710/m37710op.h8
2 files changed, 19 insertions, 19 deletions
diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c
index d8a18431d61..6a0c9877db5 100644
--- a/src/emu/cpu/m37710/m37710.c
+++ b/src/emu/cpu/m37710/m37710.c
@@ -66,22 +66,22 @@ extern const int m37710_irq_levels[M37710_LINE_MAX];
const int m37710_irq_levels[M37710_LINE_MAX] =
{
// maskable
- 0x70, // ADC 0
+ 0x70, // ADC 0
0x73, // UART 1 XMIT 1
0x74, // UART 1 RECV 2
0x71, // UART 0 XMIT 3
0x72, // UART 0 RECV 4
- 0x7c, // Timer B2 5
- 0x7b, // Timer B1 6
- 0x7a, // Timer B0 7
- 0x79, // Timer A4 8
- 0x78, // Timer A3 9
- 0x77, // Timer A2 10
- 0x76, // Timer A1 11
- 0x75, // Timer A0 12
- 0x7f, // IRQ 2 13
- 0x7e, // IRQ 1 14
- 0x7d, // IRQ 0 15
+ 0x7c, // Timer B2 5
+ 0x7b, // Timer B1 6
+ 0x7a, // Timer B0 7
+ 0x79, // Timer A4 8
+ 0x78, // Timer A3 9
+ 0x77, // Timer A2 10
+ 0x76, // Timer A1 11
+ 0x75, // Timer A0 12
+ 0x7f, // IRQ 2 13
+ 0x7e, // IRQ 1 14
+ 0x7d, // IRQ 0 15
// non-maskable
0, // watchdog
@@ -94,11 +94,11 @@ const int m37710_irq_levels[M37710_LINE_MAX] =
static const int m37710_irq_vectors[M37710_LINE_MAX] =
{
// maskable
- 0xffd6, // A-D converter
+ 0xffd6, // A-D converter
0xffd8, // UART1 transmit
- 0xffda, // UART1 receive
+ 0xffda, // UART1 receive
0xffdc, // UART0 transmit
- 0xffde, // UART0 receive
+ 0xffde, // UART0 receive
0xffe0, // Timer B2
0xffe2, // Timer B1
0xffe4, // Timer B0
diff --git a/src/emu/cpu/m37710/m37710op.h b/src/emu/cpu/m37710/m37710op.h
index 64b025f5a3f..2fbf1765f00 100644
--- a/src/emu/cpu/m37710/m37710op.h
+++ b/src/emu/cpu/m37710/m37710op.h
@@ -521,7 +521,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
if (SRC&0x80) \
- { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
+ { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
#else // FLAG_SET_X
#define OP_PSH(MODE) \
SRC = OPER_8_##MODE(cpustate); \
@@ -541,7 +541,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
if (SRC&0x80) \
- { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
+ { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
#endif // FLAG_SET_X
#else // FLAG_SET_M
#if FLAG_SET_X
@@ -563,7 +563,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
if (SRC&0x80) \
- { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
+ { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
#else // FLAG_SET_X
#define OP_PSH(MODE) \
SRC = OPER_8_##MODE(cpustate); \
@@ -583,7 +583,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
if (SRC&0x80) \
- { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
+ { m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
#endif // FLAG_SET_X
#endif // FLAG_SET_M