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author Aaron Giles <aaron@aarongiles.com>2011-01-24 05:09:05 +0000
committer Aaron Giles <aaron@aarongiles.com>2011-01-24 05:09:05 +0000
commitb3d7e09292e4e9995349a4605177ce66a5afa696 (patch)
tree8aa035366d5f0670286f8be9202553adfc1f2a0a /src/emu/cpu/i86
parent8a8b7d7a52862fcad86a93fba9c6d5814dff59b5 (diff)
Cleanups and version bump.mame0141u1
Diffstat (limited to 'src/emu/cpu/i86')
-rw-r--r--src/emu/cpu/i86/i86.h130
-rw-r--r--src/emu/cpu/i86/instr86.c26
2 files changed, 78 insertions, 78 deletions
diff --git a/src/emu/cpu/i86/i86.h b/src/emu/cpu/i86/i86.h
index dc5cbf5941b..e8d1fd03738 100644
--- a/src/emu/cpu/i86/i86.h
+++ b/src/emu/cpu/i86/i86.h
@@ -1,65 +1,65 @@
-/* ASG 971222 -- rewrote this interface */
-#pragma once
-
-#ifndef __I86INTF_H__
-#define __I86INTF_H__
-
-
-#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
-#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
-#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
-#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
-#define INPUT_LINE_TEST 20 /* PJB 03/05 */
-#define INPUT_LINE_DRQ0 21
-#define INPUT_LINE_DRQ1 22
-#define INPUT_LINE_TMRIN0 23
-#define INPUT_LINE_TMRIN1 24
-
-
-typedef struct _i80186_interface i80186_interface;
-struct _i80186_interface
-{
- devcb_write_line out_tmrout0_func;
- devcb_write_line out_tmrout1_func;
-};
-#define I80186_INTERFACE(name) const i80186_interface (name) =
-
-
-enum
-{
- I8086_IP,
- I8086_AX,
- I8086_CX,
- I8086_DX,
- I8086_BX,
- I8086_SP,
- I8086_BP,
- I8086_SI,
- I8086_DI,
- I8086_AL,
- I8086_CL,
- I8086_DL,
- I8086_BL,
- I8086_AH,
- I8086_CH,
- I8086_DH,
- I8086_BH,
- I8086_FLAGS,
- I8086_ES,
- I8086_CS,
- I8086_SS,
- I8086_DS,
- I8086_VECTOR,
-
- I8086_GENPC = STATE_GENPC,
- I8086_GENSP = STATE_GENSP,
- I8086_GENPCBASE = STATE_GENPCBASE
-};
-
-/* Public functions */
-DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
-DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
-DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
-DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
-
-#endif /* __I86INTF_H__ */
+/* ASG 971222 -- rewrote this interface */
+#pragma once
+
+#ifndef __I86INTF_H__
+#define __I86INTF_H__
+
+
+#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
+#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
+#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
+#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
+#define INPUT_LINE_TEST 20 /* PJB 03/05 */
+#define INPUT_LINE_DRQ0 21
+#define INPUT_LINE_DRQ1 22
+#define INPUT_LINE_TMRIN0 23
+#define INPUT_LINE_TMRIN1 24
+
+
+typedef struct _i80186_interface i80186_interface;
+struct _i80186_interface
+{
+ devcb_write_line out_tmrout0_func;
+ devcb_write_line out_tmrout1_func;
+};
+#define I80186_INTERFACE(name) const i80186_interface (name) =
+
+
+enum
+{
+ I8086_IP,
+ I8086_AX,
+ I8086_CX,
+ I8086_DX,
+ I8086_BX,
+ I8086_SP,
+ I8086_BP,
+ I8086_SI,
+ I8086_DI,
+ I8086_AL,
+ I8086_CL,
+ I8086_DL,
+ I8086_BL,
+ I8086_AH,
+ I8086_CH,
+ I8086_DH,
+ I8086_BH,
+ I8086_FLAGS,
+ I8086_ES,
+ I8086_CS,
+ I8086_SS,
+ I8086_DS,
+ I8086_VECTOR,
+
+ I8086_GENPC = STATE_GENPC,
+ I8086_GENSP = STATE_GENSP,
+ I8086_GENPCBASE = STATE_GENPCBASE
+};
+
+/* Public functions */
+DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
+DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
+DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
+DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
+
+#endif /* __I86INTF_H__ */
diff --git a/src/emu/cpu/i86/instr86.c b/src/emu/cpu/i86/instr86.c
index ee0c5c0a50c..bbf6d2e44eb 100644
--- a/src/emu/cpu/i86/instr86.c
+++ b/src/emu/cpu/i86/instr86.c
@@ -10,19 +10,19 @@
* timing value should move to separate array
*/
-/*
- PHS - 2010-12-29
-
- Moved several instruction stubs so that they are compiled separately for
- the 8086 and 80186. The instructions affected are :
-
- _pop_ss, _es, _cs, _ss, _ds, _mov_sregw and _sti
-
- This is because they call the next instruction directly as it cannot be
- interrupted. If they are not compiled separately when executing on an
- 80186, the wrong set of instructions are used (the 8086 set). This has
- the serious effect of ignoring the next instruction, as invalid, *IF*
- it is an 80186 specific instruction.
+/*
+ PHS - 2010-12-29
+
+ Moved several instruction stubs so that they are compiled separately for
+ the 8086 and 80186. The instructions affected are :
+
+ _pop_ss, _es, _cs, _ss, _ds, _mov_sregw and _sti
+
+ This is because they call the next instruction directly as it cannot be
+ interrupted. If they are not compiled separately when executing on an
+ 80186, the wrong set of instructions are used (the 8086 set). This has
+ the serious effect of ignoring the next instruction, as invalid, *IF*
+ it is an 80186 specific instruction.
*/