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author Aaron Giles <aaron@aarongiles.com>2008-05-29 07:18:35 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-05-29 07:18:35 +0000
commiteeb821032e7556896ad4c4d26c79bddd9882a022 (patch)
tree7158cb382e055d636a685b8cbe5b2eb01d718c9e /src/emu/cpu/drcuml.c
parent9438e76f1fb759f0b4bbcae22231c3e75296179f (diff)
Several miscellaneous changes:
1. In the MIPS core: - renamed struct mips3_config -> mips3_config - updated all drivers to the new names - removed MIPS3DRC_STRICT_COP0 flag, which is no longer used - a few minor cleanups 2. In the CPU interface: - added new 'intention' parameter to the translate callback to indicate read/write/fetch access, user/supervisor mode, and a flag for debugging - updated all call sites to pass an appropriate value - updated all CPU cores to the new prototype 3. In the UML: - added new opcode SETC to set the carry flag from a source bit - added new opcode BSWAP to swap bytes within a value - updated C, x86, x64 back-ends to support the new opcodes - updated disassembler to support the new opcodes 4. In the DRC frontend: - fixed bug in handling edge case with the PC near the 0 or ~0
Diffstat (limited to 'src/emu/cpu/drcuml.c')
-rw-r--r--src/emu/cpu/drcuml.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/emu/cpu/drcuml.c b/src/emu/cpu/drcuml.c
index de97a317e8a..a86ca7dd555 100644
--- a/src/emu/cpu/drcuml.c
+++ b/src/emu/cpu/drcuml.c
@@ -21,6 +21,12 @@
* Support for FPU exceptions
* New instructions?
+ - FDRNDS dst,src
+ round to single-precision
+
+ - FCOPYI, ICOPYF
+ copy raw between float and integer registers
+
- VALID opcode_desc,handle,param
checksum/compare code referenced by opcode_desc; if not
matching, generate exception with handle,param
@@ -228,6 +234,7 @@ static const drcuml_opcode_valid opcode_valid_list[] =
OPVALID_ENTRY_3(WRITE8, 8, NONE, IMV4, IANY4, IANY)
OPVALID_ENTRY_4(WRIT8M, 8, NONE, IMV4, IANY4, IANY, IANY)
OPVALID_ENTRY_3(FLAGS, 4|8, NONE, IRM, IMV, MEM)
+ OPVALID_ENTRY_2(SETC, 4|8, NONE, IANY, IANY)
OPVALID_ENTRY_2(MOV, 4|8, COND, IRM, IANY)
OPVALID_ENTRY_2(ZEXT1, 4|8, NONE, IRM, IANY4)
OPVALID_ENTRY_2(ZEXT2, 4|8, NONE, IRM, IANY4)
@@ -251,6 +258,7 @@ static const drcuml_opcode_valid opcode_valid_list[] =
OPVALID_ENTRY_3(OR, 4|8, SZ, IRM, IANY, IANY)
OPVALID_ENTRY_3(XOR, 4|8, SZ, IRM, IANY, IANY)
OPVALID_ENTRY_2(LZCNT, 4|8, NONE, IRM, IANY)
+ OPVALID_ENTRY_2(BSWAP, 4|8, NONE, IRM, IANY)
OPVALID_ENTRY_3(SHL, 4|8, SZC, IRM, IANY, IANY)
OPVALID_ENTRY_3(SHR, 4|8, SZC, IRM, IANY, IANY)
OPVALID_ENTRY_3(SAR, 4|8, SZC, IRM, IANY, IANY)