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author Miodrag Milanovic <mmicko@gmail.com>2014-10-15 07:19:47 +0000
committer Miodrag Milanovic <mmicko@gmail.com>2014-10-15 07:19:47 +0000
commitc93ed344fbd26a9c2c49bdbc99014d8dc0cbe9ef (patch)
treea5017b8341bdadc5bcd1185ae49fe4c0a85424b8 /src/emu/bus/wswan
parenta4dd32afb6cbfaae0e452c90486060682ab1c31c (diff)
Cleanups and version bumpmame0155
Diffstat (limited to 'src/emu/bus/wswan')
-rw-r--r--src/emu/bus/wswan/rom.c108
-rw-r--r--src/emu/bus/wswan/rom.h8
-rw-r--r--src/emu/bus/wswan/slot.c28
-rw-r--r--src/emu/bus/wswan/slot.h7
4 files changed, 75 insertions, 76 deletions
diff --git a/src/emu/bus/wswan/rom.c b/src/emu/bus/wswan/rom.c
index 4b27d7fe348..1bac91a4a5d 100644
--- a/src/emu/bus/wswan/rom.c
+++ b/src/emu/bus/wswan/rom.c
@@ -154,7 +154,7 @@ void ws_rom_device::device_timer(emu_timer &timer, device_timer_id id, int param
m_rtc_second++;
if ((m_rtc_second & 0x0f) > 9)
m_rtc_second = (m_rtc_second & 0xf0) + 0x10;
-
+
// check for minute passed
if (m_rtc_second >= 0x60)
{
@@ -163,7 +163,7 @@ void ws_rom_device::device_timer(emu_timer &timer, device_timer_id id, int param
if ((m_rtc_minute & 0x0f) > 9)
m_rtc_minute = (m_rtc_minute & 0xf0) + 0x10;
}
-
+
// check for hour passed
if (m_rtc_minute >= 0x60)
{
@@ -174,7 +174,7 @@ void ws_rom_device::device_timer(emu_timer &timer, device_timer_id id, int param
if (m_rtc_hour == 0x12)
m_rtc_hour |= 0x80;
}
-
+
// check for day passed
if (m_rtc_hour >= 0x24)
{
@@ -217,7 +217,7 @@ READ8_MEMBER(ws_rom_device::read_io)
case 0x0b: // RTC data
if (!m_has_rtc)
break;
-
+
if (m_io_regs[0x0a] == 0x95 && (m_rtc_index < 7))
{
switch (m_rtc_index)
@@ -307,7 +307,7 @@ WRITE8_MEMBER(ws_rom_device::write_io)
case 0x0b: // RTC Data
if (!m_has_rtc)
break;
-
+
if (m_io_regs[0x0a] == 0x94 && m_rtc_index < 7)
{
switch (m_rtc_index)
@@ -339,7 +339,7 @@ WRITE8_MEMBER(ws_rom_sram_device::write_ram)
}
WRITE8_MEMBER(ws_rom_sram_device::write_io)
-{
+{
switch (offset)
{
case 0x01: // SRAM bank to select
@@ -354,7 +354,7 @@ WRITE8_MEMBER(ws_rom_sram_device::write_io)
READ8_MEMBER(ws_rom_eeprom_device::read_io)
{
UINT8 value = m_io_regs[offset];
-
+
switch (offset)
{
case 0x04:
@@ -368,29 +368,29 @@ READ8_MEMBER(ws_rom_eeprom_device::read_io)
value = ws_rom_device::read_io(space, offset);
break;
}
-
+
return value;
}
WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
-{
+{
switch (offset)
{
case 0x06: /* EEPROM address lower bits port/EEPROM address and command port
- 1KBit EEPROM:
- Bit 0-5 - EEPROM address bit 1-6
- Bit 6-7 - Command
- 00 - Extended command address bit 4-5:
- 00 - Write disable
- 01 - Write all
- 10 - Erase all
- 11 - Write enable
- 01 - Write
- 10 - Read
- 11 - Erase
- 16KBit EEPROM:
- Bit 0-7 - EEPROM address bit 1-8
- */
+ 1KBit EEPROM:
+ Bit 0-5 - EEPROM address bit 1-6
+ Bit 6-7 - Command
+ 00 - Extended command address bit 4-5:
+ 00 - Write disable
+ 01 - Write all
+ 10 - Erase all
+ 11 - Write enable
+ 01 - Write
+ 10 - Read
+ 11 - Erase
+ 16KBit EEPROM:
+ Bit 0-7 - EEPROM address bit 1-8
+ */
switch (m_eeprom_mode)
{
case EEPROM_1K:
@@ -412,23 +412,23 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
break;
case 0x07: /* EEPROM higher bits/command bits port
- 1KBit EEPROM:
- Bit 0 - Start
- Bit 1-7 - Unknown
- 16KBit EEPROM:
- Bit 0-1 - EEPROM address bit 9-10
- Bit 2-3 - Command
- 00 - Extended command address bit 0-1:
- 00 - Write disable
- 01 - Write all
- 10 - Erase all
- 11 - Write enable
- 01 - Write
- 10 - Read
- 11 - Erase
- Bit 4 - Start
- Bit 5-7 - Unknown
- */
+ 1KBit EEPROM:
+ Bit 0 - Start
+ Bit 1-7 - Unknown
+ 16KBit EEPROM:
+ Bit 0-1 - EEPROM address bit 9-10
+ Bit 2-3 - Command
+ 00 - Extended command address bit 0-1:
+ 00 - Write disable
+ 01 - Write all
+ 10 - Erase all
+ 11 - Write enable
+ 01 - Write
+ 10 - Read
+ 11 - Erase
+ Bit 4 - Start
+ Bit 5-7 - Unknown
+ */
switch (m_eeprom_mode)
{
case EEPROM_1K:
@@ -450,7 +450,7 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
m_eeprom_command = m_eeprom_command & 0x0c;
m_eeprom_start = (data >> 4) & 0x01;
break;
-
+
default:
logerror( "Write EEPROM address/command register C7 for unsupported EEPROM type\n" );
break;
@@ -458,19 +458,19 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
break;
case 0x08: /* EEPROM command
- Bit 0 - Read complete (read only)
- Bit 1 - Write complete (read only)
- Bit 2-3 - Unknown
- Bit 4 - Read
- Bit 5 - Write
- Bit 6 - Protect
- Bit 7 - Initialize
- */
- if (data & 0x80) // Initialize
+ Bit 0 - Read complete (read only)
+ Bit 1 - Write complete (read only)
+ Bit 2-3 - Unknown
+ Bit 4 - Read
+ Bit 5 - Write
+ Bit 6 - Protect
+ Bit 7 - Initialize
+ */
+ if (data & 0x80) // Initialize
logerror("Unsupported EEPROM command 'Initialize'\n");
- if (data & 0x40) // Protect
- {
+ if (data & 0x40) // Protect
+ {
switch (m_eeprom_command)
{
case 0x00:
@@ -487,7 +487,7 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
}
}
- if (data & 0x20) // Write
+ if (data & 0x20) // Write
{
if (m_eeprom_write_enabled)
{
@@ -505,7 +505,7 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
}
}
- if (data & 0x10) // Read
+ if (data & 0x10) // Read
{
m_io_regs[0x04] = m_nvram[(m_eeprom_address << 1) + 1];
m_io_regs[0x05] = m_nvram[m_eeprom_address << 1];
diff --git a/src/emu/bus/wswan/rom.h b/src/emu/bus/wswan/rom.h
index 2ee51e35d43..7c64f8cda02 100644
--- a/src/emu/bus/wswan/rom.h
+++ b/src/emu/bus/wswan/rom.h
@@ -53,11 +53,11 @@ class ws_rom_sram_device : public ws_rom_device
public:
// construction/destruction
ws_rom_sram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
virtual void device_start();
virtual void device_reset();
-
+
// reading and writing
virtual DECLARE_READ8_MEMBER(read_ram);
virtual DECLARE_WRITE8_MEMBER(write_ram);
@@ -75,11 +75,11 @@ class ws_rom_eeprom_device : public ws_rom_device
public:
// construction/destruction
ws_rom_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
virtual void device_start();
virtual void device_reset();
-
+
// reading and writing
virtual DECLARE_READ8_MEMBER(read_io);
virtual DECLARE_WRITE8_MEMBER(write_io);
diff --git a/src/emu/bus/wswan/slot.c b/src/emu/bus/wswan/slot.c
index 9d5772fd479..72fa3d21677 100644
--- a/src/emu/bus/wswan/slot.c
+++ b/src/emu/bus/wswan/slot.c
@@ -167,10 +167,10 @@ bool ws_cart_slot_device::call_load()
UINT8 *ROM;
UINT32 size = (software_entry() == NULL) ? length() : get_software_region_length("rom");
UINT32 nvram_size = 0;
-
+
m_cart->rom_alloc(size, tag());
ROM = m_cart->get_rom_base();
-
+
if (software_entry() == NULL)
fread(ROM, size);
else
@@ -261,35 +261,35 @@ int ws_cart_slot_device::get_cart_type(UINT8 *ROM, UINT32 len, UINT32 &nvram_len
{
case 0x00:
break;
- case 0x01: // SRAM 64Kbit
+ case 0x01: // SRAM 64Kbit
type = WS_SRAM;
nvram_len = 0x2000;
break;
- case 0x02: // SRAM 256Kbit
+ case 0x02: // SRAM 256Kbit
type = WS_SRAM;
nvram_len = 0x8000;
break;
- case 0x05: // SRAM 512Kbit
+ case 0x05: // SRAM 512Kbit
type = WS_SRAM;
nvram_len = 0x10000;
break;
- case 0x03: // SRAM 1Mbit
+ case 0x03: // SRAM 1Mbit
type = WS_SRAM;
nvram_len = 0x20000;
break;
- case 0x04: // SRAM 2Mbit
+ case 0x04: // SRAM 2Mbit
type = WS_SRAM;
nvram_len = 0x40000;
break;
- case 0x10: // EEPROM 1Kbit
+ case 0x10: // EEPROM 1Kbit
type = WS_EEPROM;
nvram_len = 0x80;
break;
- case 0x50: // EEPROM 8Kbit
+ case 0x50: // EEPROM 8Kbit
type = WS_EEPROM;
nvram_len = 0x400;
break;
- case 0x20: // EEPROM 16Kbit
+ case 0x20: // EEPROM 16Kbit
type = WS_EEPROM;
nvram_len = 0x800;
break;
@@ -298,7 +298,7 @@ int ws_cart_slot_device::get_cart_type(UINT8 *ROM, UINT32 len, UINT32 &nvram_len
logerror("Unknown RAM size [0x%X]\n", ROM[(chunks - 1) * 0x10000 + 0xfffb]);
break;
}
-
+
return type;
}
@@ -315,7 +315,7 @@ void ws_cart_slot_device::get_default_card_software(astring &result)
dynamic_buffer rom(size);
int type;
UINT32 nvram;
-
+
core_fread(m_file, rom, size);
// nvram size is not really used here, but we set it up nevertheless
@@ -427,9 +427,9 @@ void ws_cart_slot_device::internal_header_logging(UINT8 *ROM, UINT32 offs, UINT3
int sum = 0, banks = len / 0x10000;
UINT8 romsize, ramtype, ramsize;
romsize = ROM[offs + 0xfffa];
- ramtype = (ROM[offs + 0xfffb] & 0xf0) ? 1 : 0; // 1 = EEPROM, 0 = SRAM
+ ramtype = (ROM[offs + 0xfffb] & 0xf0) ? 1 : 0; // 1 = EEPROM, 0 = SRAM
ramsize = ramtype ? ((ROM[offs + 0xfffb] & 0xf0) >> 4) : (ROM[offs + 0xfffb] & 0x0f);
-
+
logerror( "ROM DETAILS\n" );
logerror( "===========\n\n" );
diff --git a/src/emu/bus/wswan/slot.h b/src/emu/bus/wswan/slot.h
index cde3d81c3a6..97e838be793 100644
--- a/src/emu/bus/wswan/slot.h
+++ b/src/emu/bus/wswan/slot.h
@@ -40,7 +40,7 @@ public:
UINT32 get_rom_size() { return m_rom_size; }
UINT32 get_nvram_size() { return m_nvram.count(); }
- void save_nvram() { device().save_item(NAME(m_nvram)); }
+ void save_nvram() { device().save_item(NAME(m_nvram)); }
void set_has_rtc(bool val) { m_has_rtc = val; }
void set_is_rotated(bool val) { m_is_rotated = val; }
int get_is_rotated() { return m_is_rotated ? 1 : 0; }
@@ -81,7 +81,7 @@ public:
int get_cart_type(UINT8 *ROM, UINT32 len, UINT32 &nvram_len);
void internal_header_logging(UINT8 *ROM, UINT32 offs, UINT32 len);
- void save_nvram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram(); }
+ void save_nvram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram(); }
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
virtual bool is_readable() const { return 1; }
@@ -125,6 +125,5 @@ extern const device_type WS_CART_SLOT;
#define MCFG_WSWAN_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
MCFG_DEVICE_ADD(_tag, WS_CART_SLOT, 0) \
- MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
-
+ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
#endif