diff options
author | cam900 <dbtlrchl@naver.com> | 2019-11-21 00:59:18 +0900 |
---|---|---|
committer | Vas Crabb <cuavas@users.noreply.github.com> | 2019-11-21 02:59:18 +1100 |
commit | ab67769285877c38638bb9f4eb8c7b9c84af5e80 (patch) | |
tree | 804faf156a459afa3db220778b7503f812f2adab /src/devices | |
parent | fc0de7cfce9b4b6c252572df3eef2a1f037a322a (diff) |
mb8421.cpp : Support variable size and data width, Use template for base device, Add notes (#5929)
* mb8421.cpp : Support variable size and data width, Reduce duplicate, Add notes
twinkle.cpp, firebeat.cpp : Device-fied CY7C131 Dual port SRAM, Add notes
esqmr.cpp : Add IDT7130 Dual port SRAM placeholder, Add notes
* esqmr.cpp : Fix spacing
* mb8421.cpp : Fix data width behavior
* mb8421.cpp : Forgot this
* mb8421.cpp : Fix spacing
* mb8421.cpp : Use const in initializers, Fix class name related to support more similar DPRAMs in future
, Add notes, Remove internal helpers
* mb8421.cpp : Re-add masking
* mb8421.cpp : Fix notes
* mb8421.cpp : Fix manufacturer tags, Add notes
* mb8421.cpp : Fix ram size argument behavior, Add notes
* mb8421.cpp : Use template for base device, Fix build
* mb8421.cpp : Use template and static constexprs for RAM defines
* mb8421.cpp : Use extern template, Fix build, RAM size
Diffstat (limited to 'src/devices')
-rw-r--r-- | src/devices/machine/mb8421.cpp | 210 | ||||
-rw-r--r-- | src/devices/machine/mb8421.h | 219 |
2 files changed, 201 insertions, 228 deletions
diff --git a/src/devices/machine/mb8421.cpp b/src/devices/machine/mb8421.cpp index 087c84d8595..8ba1388f879 100644 --- a/src/devices/machine/mb8421.cpp +++ b/src/devices/machine/mb8421.cpp @@ -2,6 +2,8 @@ // copyright-holders:hap,AJR /********************************************************************** + Dual port RAM with Mailbox emulation + Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL CMOS 16K-bit (2KB) dual-port SRAM @@ -10,192 +12,34 @@ 32-bit expansion. It makes sure there are no clashes with the _BUSY pin. IDT71321 is function compatible, but not pin compatible with MB8421 + IDT7130 is 1KB variation of IDT71321 + CY7C131 is similar as IDT7130 **********************************************************************/ #include "emu.h" #include "machine/mb8421.h" - -DEFINE_DEVICE_TYPE(MB8421, mb8421_device, "mb8421", "MB8421 8-bit Dual-Port SRAM with Interrupts") -DEFINE_DEVICE_TYPE(IDT71321, idt71321_device, "idt71321", "IDT71321 8-bit Dual-Port SRAM with Interrupts") -DEFINE_DEVICE_TYPE(MB8421_MB8431_16BIT, mb8421_mb8431_16_device, "mb8421_mb8431_16", "MB8421/MB8431 16-bit Dual-Port SRAM with Interrupts") - -//------------------------------------------------- -// mb8421_master_device - constructor -//------------------------------------------------- - -mb8421_master_device::mb8421_master_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) - : device_t(mconfig, type, tag, owner, clock) - , m_intl_callback(*this) - , m_intr_callback(*this) -{ -} - -//------------------------------------------------- -// mb8421_device - constructor -//------------------------------------------------- - -mb8421_device::mb8421_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : mb8421_master_device(mconfig, MB8421, tag, owner, clock) -{ -} - -mb8421_device::mb8421_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) - : mb8421_master_device(mconfig, type, tag, owner, clock) -{ -} - -//------------------------------------------------- -// idt71321_device - constructor -//------------------------------------------------- - -idt71321_device::idt71321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : mb8421_device(mconfig, IDT71321, tag, owner, clock) -{ -} - -//------------------------------------------------- -// mb8421_mb8431_16_device - constructor -//------------------------------------------------- - -mb8421_mb8431_16_device::mb8421_mb8431_16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : mb8421_master_device(mconfig, MB8421_MB8431_16BIT, tag, owner, clock) -{ -} - -//------------------------------------------------- -// device_resolve_objects - resolve objects that -// may be needed for other devices to set -// initial conditions at start time -//------------------------------------------------- - -void mb8421_master_device::device_resolve_objects() -{ - // resolve callbacks - m_intl_callback.resolve_safe(); - m_intr_callback.resolve_safe(); -} - -//------------------------------------------------- -// device_start - device-specific startup -//------------------------------------------------- - -void mb8421_device::device_start() -{ - m_ram = make_unique_clear<u8[]>(0x800); - - // state save - save_pointer(NAME(m_ram), 0x800); -} - -void mb8421_mb8431_16_device::device_start() -{ - m_ram = make_unique_clear<u16[]>(0x800); - - // state save - save_pointer(NAME(m_ram), 0x800); -} - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void mb8421_master_device::device_reset() -{ - m_intl_callback(CLEAR_LINE); - m_intr_callback(CLEAR_LINE); -} - -//------------------------------------------------- -// update_intr - update interrupt lines upon -// read or write accesses to special locations -//------------------------------------------------- - -template<read_or_write row, bool is_right> -void mb8421_master_device::update_intr(offs_t offset) -{ - if (machine().side_effects_disabled()) - return; - - if (row == read_or_write::WRITE && offset == (is_right ? 0x7fe : 0x7ff)) - (is_right ? m_intl_callback : m_intr_callback)(ASSERT_LINE); - else if (row == read_or_write::READ && offset == (is_right ? 0x7ff : 0x7fe)) - (is_right ? m_intr_callback : m_intl_callback)(CLEAR_LINE); -} - -//------------------------------------------------- -// left_w - write access for left-side bus -// (write to 7FF asserts INTR) -//------------------------------------------------- - -void mb8421_device::left_w(offs_t offset, u8 data) -{ - offset &= 0x7ff; - m_ram[offset] = data; - update_intr<read_or_write::WRITE, false>(offset); -} - -void mb8421_mb8431_16_device::left_w(offs_t offset, u16 data, u16 mem_mask) -{ - offset &= 0x7ff; - COMBINE_DATA(&m_ram[offset]); - update_intr<read_or_write::WRITE, false>(offset); -} - -//------------------------------------------------- -// left_r - read access for left-side bus -// (read from 7FE acknowledges INTL) -//------------------------------------------------- - -u8 mb8421_device::left_r(offs_t offset) -{ - offset &= 0x7ff; - update_intr<read_or_write::READ, false>(offset); - return m_ram[offset]; -} - -u16 mb8421_mb8431_16_device::left_r(offs_t offset, u16 mem_mask) -{ - offset &= 0x7ff; - update_intr<read_or_write::READ, false>(offset); - return m_ram[offset]; -} - -//------------------------------------------------- -// right_w - write access for right-side bus -// (write to 7FE asserts INTL) -//------------------------------------------------- - -void mb8421_device::right_w(offs_t offset, u8 data) -{ - offset &= 0x7ff; - m_ram[offset] = data; - update_intr<read_or_write::WRITE, true>(offset); -} - -void mb8421_mb8431_16_device::right_w(offs_t offset, u16 data, u16 mem_mask) -{ - offset &= 0x7ff; - COMBINE_DATA(&m_ram[offset]); - update_intr<read_or_write::WRITE, true>(offset); -} - -//------------------------------------------------- -// right_r - read access for right-side bus -// (read from 7FF acknowledges INTR) -//------------------------------------------------- - -u8 mb8421_device::right_r(offs_t offset) -{ - offset &= 0x7ff; - update_intr<read_or_write::READ, true>(offset); - return m_ram[offset]; -} - -u16 mb8421_mb8431_16_device::right_r(offs_t offset, u16 mem_mask) -{ - offset &= 0x7ff; - update_intr<read_or_write::READ, true>(offset); - return m_ram[offset]; -} +template class dual_port_mailbox_ram_base<u8, 10, 8>; +template class dual_port_mailbox_ram_base<u8, 11, 8>; +template class dual_port_mailbox_ram_base<u16, 11, 16>; + +template <typename Type, unsigned AddrBits, unsigned DataBits> +constexpr Type dual_port_mailbox_ram_base<Type, AddrBits, DataBits>::DATA_MASK; +template <typename Type, unsigned AddrBits, unsigned DataBits> +constexpr size_t dual_port_mailbox_ram_base<Type, AddrBits, DataBits>::RAM_SIZE; +template <typename Type, unsigned AddrBits, unsigned DataBits> +constexpr offs_t dual_port_mailbox_ram_base<Type, AddrBits, DataBits>::ADDR_MASK; +template <typename Type, unsigned AddrBits, unsigned DataBits> +constexpr offs_t dual_port_mailbox_ram_base<Type, AddrBits, DataBits>::INT_ADDR_LEFT; +template <typename Type, unsigned AddrBits, unsigned DataBits> +constexpr offs_t dual_port_mailbox_ram_base<Type, AddrBits, DataBits>::INT_ADDR_RIGHT; + +// 1Kx8 +DEFINE_DEVICE_TYPE(CY7C131, cy7c131_device, "cy7c131", "Cypress CY7C131 8-bit Dual-Port SRAM with Interrupts") +DEFINE_DEVICE_TYPE(IDT7130, idt7130_device, "idt7130", "IDT 7130 8-bit Dual-Port SRAM with Interrupts") +// 2Kx8 +DEFINE_DEVICE_TYPE(IDT71321, idt71321_device, "idt71321", "IDT 71321 8-bit Dual-Port SRAM with Interrupts") +DEFINE_DEVICE_TYPE(MB8421, mb8421_device, "mb8421", "Fujitsu MB8421 8-bit Dual-Port SRAM with Interrupts") +// 2Kx16 +DEFINE_DEVICE_TYPE(MB8421_MB8431_16BIT, mb8421_mb8431_16_device, "mb8421_mb8431_16", "Fujitsu MB8421/MB8431 16-bit Dual-Port SRAM with Interrupts") diff --git a/src/devices/machine/mb8421.h b/src/devices/machine/mb8421.h index 00e8f8d207f..1cf992f50d2 100644 --- a/src/devices/machine/mb8421.h +++ b/src/devices/machine/mb8421.h @@ -2,8 +2,13 @@ // copyright-holders:hap,AJR /********************************************************************** + Dual port RAM with Mailbox emulation + Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL - CMOS 16K-bit (2KB) dual-port SRAM + CMOS 16K-bit (2KB) dual-port SRAM (pinouts : see below) + IDT 71321 16K-bit (2Kx8) dual port SRAM + IDT 7130 8K-bit (1Kx8) dual port SRAM + Cypress CY7C131 8K-bit (1Kx8) dual port SRAM *********************************************************************** _____________ @@ -72,9 +77,17 @@ // TYPE DEFINITIONS //************************************************************************** -// ======================> mb8421_device +// device type definition +DECLARE_DEVICE_TYPE(CY7C131, cy7c131_device) +DECLARE_DEVICE_TYPE(IDT7130, idt7130_device) +DECLARE_DEVICE_TYPE(MB8421, mb8421_device) +DECLARE_DEVICE_TYPE(IDT71321, idt71321_device) +DECLARE_DEVICE_TYPE(MB8421_MB8431_16BIT, mb8421_mb8431_16_device) -class mb8421_master_device : public device_t +// ======================> dual_port_mailbox_ram_base + +template <typename Type, unsigned AddrBits, unsigned DataBits> +class dual_port_mailbox_ram_base : public device_t { public: // note: INT pins are only available on MB84x1 @@ -82,80 +95,196 @@ public: auto intl_callback() { return m_intl_callback.bind(); } auto intr_callback() { return m_intr_callback.bind(); } + Type peek(offs_t offset) const { return m_ram[offset & ADDR_MASK]; } + + //------------------------------------------------- + // left_w - write access for left-side bus + // (write to (max word size - 1) asserts INTR) + //------------------------------------------------- + + void left_w(offs_t offset, Type data, Type mem_mask = ~Type(0)) + { + offset &= ADDR_MASK; + data &= DATA_MASK; + COMBINE_DATA(&m_ram[offset]); + update_intr(read_or_write::WRITE, false, offset); + } + + //------------------------------------------------- + // left_r - read access for left-side bus + // (read from (max word size - 2) acknowledges INTL) + //------------------------------------------------- + + Type left_r(offs_t offset) + { + offset &= ADDR_MASK; + update_intr(read_or_write::READ, false, offset); + return m_ram[offset]; + } + + //------------------------------------------------- + // right_w - write access for right-side bus + // (write to (max word size - 2) asserts INTL) + //------------------------------------------------- + + void right_w(offs_t offset, Type data, Type mem_mask = ~Type(0)) + { + offset &= ADDR_MASK; + data &= DATA_MASK; + COMBINE_DATA(&m_ram[offset]); + update_intr(read_or_write::WRITE, true, offset); + } + + //------------------------------------------------- + // right_r - read access for right-side bus + // (read from (max word size - 1) acknowledges INTR) + //------------------------------------------------- + + Type right_r(offs_t offset) + { + offset &= ADDR_MASK; + update_intr(read_or_write::READ, true, offset); + return m_ram[offset]; + } + DECLARE_READ_LINE_MEMBER(busy_r) { return 0; } // _BUSY pin - not emulated protected: - mb8421_master_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); + dual_port_mailbox_ram_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, type, tag, owner, clock) + , m_intl_callback(*this) + , m_intr_callback(*this) + , m_ram(nullptr) + { + } // device-level overrides - virtual void device_resolve_objects() override; - virtual void device_reset() override; - // internal helpers - template<read_or_write row, bool is_right> void update_intr(offs_t offset); + //------------------------------------------------- + // device_resolve_objects - resolve objects that + // may be needed for other devices to set + // initial conditions at start time + //------------------------------------------------- + + virtual void device_resolve_objects() override + { + // resolve callbacks + m_intl_callback.resolve_safe(); + m_intr_callback.resolve_safe(); + } + + //------------------------------------------------- + // device_start - device-specific startup + //------------------------------------------------- + + virtual void device_start() override + { + m_ram = make_unique_clear<Type[]>(RAM_SIZE); + + // state save + save_pointer(NAME(m_ram), RAM_SIZE); + } + + //------------------------------------------------- + // device_reset - device-specific reset + //------------------------------------------------- + + virtual void device_reset() override + { + m_intl_callback(CLEAR_LINE); + m_intr_callback(CLEAR_LINE); + } private: + // internal helpers + static constexpr Type DATA_MASK = make_bitmask<Type>(DataBits); // for DPRAMs with 9/18/36bit data buses + static constexpr size_t RAM_SIZE = make_bitmask<size_t>(AddrBits) + 1; // max RAM word size + static constexpr offs_t ADDR_MASK = RAM_SIZE - 1; + static constexpr offs_t INT_ADDR_LEFT = ADDR_MASK - 1; // max RAM word size - 2 + static constexpr offs_t INT_ADDR_RIGHT = ADDR_MASK; // max RAM word size - 1 + + //------------------------------------------------- + // update_intr - update interrupt lines upon + // read or write accesses to special locations + //------------------------------------------------- + + void update_intr(read_or_write row, bool is_right, offs_t offset) + { + if (machine().side_effects_disabled()) + return; + + if (row == read_or_write::WRITE && offset == (is_right ? INT_ADDR_LEFT : INT_ADDR_RIGHT)) + (is_right ? m_intl_callback : m_intr_callback)(ASSERT_LINE); + else if (row == read_or_write::READ && offset == (is_right ? INT_ADDR_RIGHT : INT_ADDR_LEFT)) + (is_right ? m_intr_callback : m_intl_callback)(CLEAR_LINE); + } + devcb_write_line m_intl_callback; devcb_write_line m_intr_callback; + std::unique_ptr<Type[]> m_ram; }; -// ======================> mb8421_device +// ======================> cy7c131_device -class mb8421_device : public mb8421_master_device +class cy7c131_device : public dual_port_mailbox_ram_base<u8, 10, 8> { public: - mb8421_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); - - u8 peek(offs_t offset) const { return m_ram[offset & 0x7ff]; } + cy7c131_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0) + : dual_port_mailbox_ram_base<u8, 10, 8>(mconfig, CY7C131, tag, owner, clock) // 1kx8 + { + } +}; - void left_w(offs_t offset, u8 data); - u8 left_r(offs_t offset); - void right_w(offs_t offset, u8 data); - u8 right_r(offs_t offset); +// ======================> idt7130_device -protected: - mb8421_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); +class idt7130_device : public dual_port_mailbox_ram_base<u8, 10, 8> +{ +public: + idt7130_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0) + : dual_port_mailbox_ram_base<u8, 10, 8>(mconfig, IDT7130, tag, owner, clock) // 1kx8 + { + } +}; - // device-level overrides - virtual void device_start() override; +// ======================> idt71321_device -private: - std::unique_ptr<u8[]> m_ram; +class idt71321_device : public dual_port_mailbox_ram_base<u8, 11, 8> +{ +public: + idt71321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0) + : dual_port_mailbox_ram_base<u8, 11, 8>(mconfig, IDT71321, tag, owner, clock) // 2kx8 + { + } }; // ======================> mb8421_device -class idt71321_device : public mb8421_device +class mb8421_device : public dual_port_mailbox_ram_base<u8, 11, 8> { public: - idt71321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + mb8421_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0) + : dual_port_mailbox_ram_base<u8, 11, 8>(mconfig, MB8421, tag, owner, clock) // 2kx8 + { + } }; // ======================> mb8421_mb8431_16_device -class mb8421_mb8431_16_device : public mb8421_master_device +class mb8421_mb8431_16_device : public dual_port_mailbox_ram_base<u16, 11, 16> { public: - mb8421_mb8431_16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); - - u16 peek(offs_t offset) const { return m_ram[offset & 0x7ff]; } - - void left_w(offs_t offset, u16 data, u16 mem_mask = 0xffff); - u16 left_r(offs_t offset, u16 mem_mask = 0xffff); - void right_w(offs_t offset, u16 data, u16 mem_mask = 0xffff); - u16 right_r(offs_t offset, u16 mem_mask = 0xffff); - -protected: - // device-level overrides - virtual void device_start() override; - -private: - std::unique_ptr<u16[]> m_ram; + mb8421_mb8431_16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0) + : dual_port_mailbox_ram_base<u16, 11, 16>(mconfig, MB8421_MB8431_16BIT, tag, owner, clock) // 2kx16 + { + } }; -// device type definition -DECLARE_DEVICE_TYPE(MB8421, mb8421_device) -DECLARE_DEVICE_TYPE(IDT71321, idt71321_device) -DECLARE_DEVICE_TYPE(MB8421_MB8431_16BIT, mb8421_mb8431_16_device) +//************************************************************************** +// EXTERNAL TEMPLATE INSTANTIATIONS +//************************************************************************** + +extern template class dual_port_mailbox_ram_base<u8, 10, 8>; +extern template class dual_port_mailbox_ram_base<u8, 11, 8>; +extern template class dual_port_mailbox_ram_base<u16, 11, 16>; #endif // MAME_MACHINE_MB8421_H |