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author Vas Crabb <vas@vastheman.com>2020-03-22 14:33:57 +1100
committer Vas Crabb <vas@vastheman.com>2020-03-22 14:33:57 +1100
commit92d6e163a8e417c3ec527a70d3858b182e2e6d13 (patch)
tree6467713a3ef5dfc0dcffeae713ee6cdbac0be8c1 /src/devices
parent6aef85534bf3077c3cd22aa33705f9abad3a5ffb (diff)
srcclean (nw)
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/bus/coco/coco_psg.cpp18
-rw-r--r--src/devices/bus/isa/bblue2.cpp28
-rw-r--r--src/devices/bus/isa/bblue2.h6
-rw-r--r--src/devices/bus/multibus/multibus.h22
-rw-r--r--src/devices/bus/ti99/peb/cc_fdc.cpp160
-rw-r--r--src/devices/bus/ti99/peb/cc_fdc.h42
-rw-r--r--src/devices/bus/ti99/peb/forti.cpp38
-rw-r--r--src/devices/bus/ti99/peb/forti.h6
-rw-r--r--src/devices/cpu/avr8/avr8.cpp84
-rw-r--r--src/devices/cpu/avr8/avr8ops.hxx2
-rw-r--r--src/devices/cpu/gigatron/gigatron.cpp2
-rw-r--r--src/devices/cpu/gigatron/gigatron.h4
-rw-r--r--src/devices/cpu/ks0164/ks0164.cpp10
-rw-r--r--src/devices/cpu/ks0164/ks0164d.cpp2
-rw-r--r--src/devices/cpu/tlcs90/tlcs90d.cpp2
-rw-r--r--src/devices/cpu/xavix2/xavix2.h4
-rw-r--r--src/devices/machine/pxa255.cpp22
-rw-r--r--src/devices/machine/scn_pci.cpp26
-rw-r--r--src/devices/machine/sunplus_gcm394_video.cpp6
-rw-r--r--src/devices/machine/sunplus_gcm394_video.h4
-rw-r--r--src/devices/sound/ks0164.cpp16
-rw-r--r--src/devices/sound/ks0164.h6
-rw-r--r--src/devices/video/crt9212.cpp6
-rw-r--r--src/devices/video/ppu2c0x.cpp18
-rw-r--r--src/devices/video/ppu2c0x.h2
-rw-r--r--src/devices/video/ppu2c0x_sh6578.cpp2
-rw-r--r--src/devices/video/ppu2c0x_sh6578.h2
27 files changed, 270 insertions, 270 deletions
diff --git a/src/devices/bus/coco/coco_psg.cpp b/src/devices/bus/coco/coco_psg.cpp
index 4ca8c412d35..46dd0998f93 100644
--- a/src/devices/bus/coco/coco_psg.cpp
+++ b/src/devices/bus/coco/coco_psg.cpp
@@ -200,15 +200,15 @@ WRITE8_MEMBER(coco_psg_device::scs_write)
case 0x1d:
/* control register
- BIT FUNCTION
- 0 YM2149 MASTER CLOCK; 0=2MHz, 1=1MHz
- 1 Gameport A SEL signal (pin 7 of controller port A)
- 2 Gameport B SEL signal (pin 7 of controller port B)
- 3 Write Enable (for FLASH/SRAM); 0=disabled, 1=enabled
- 4 Autostart enable; 0=enabled, 1=disabled
- 5 FLASH programming enable; 0=disabled, 1=enabled
- 6 not used
- 7 not used
+ BIT FUNCTION
+ 0 YM2149 MASTER CLOCK; 0=2MHz, 1=1MHz
+ 1 Gameport A SEL signal (pin 7 of controller port A)
+ 2 Gameport B SEL signal (pin 7 of controller port B)
+ 3 Write Enable (for FLASH/SRAM); 0=disabled, 1=enabled
+ 4 Autostart enable; 0=enabled, 1=disabled
+ 5 FLASH programming enable; 0=disabled, 1=enabled
+ 6 not used
+ 7 not used
*/
m_control = data;
diff --git a/src/devices/bus/isa/bblue2.cpp b/src/devices/bus/isa/bblue2.cpp
index e376440a3b3..121ec92e390 100644
--- a/src/devices/bus/isa/bblue2.cpp
+++ b/src/devices/bus/isa/bblue2.cpp
@@ -2,10 +2,10 @@
// copyright-holders:Barry Rodewald
/*
* Microlog Baby Blue II CPU Plus
- *
+ *
* ISA card used to emulate CP/M-80 on a PC or XT
* Includes a Z80B CPU, 2 DB25 RS-232C serial ports (8250), a Centronics parallel port, and an RTC
- *
+ *
* Issues:
* RTC type is unknown
* Z80 location test and Interrupt test sometimes fail
@@ -26,14 +26,14 @@ DEFINE_DEVICE_TYPE(ISA8_BABYBLUE2, isa8_babyblue2_device, "isa_bblue2", "Microlo
static void isa_com(device_slot_interface &device)
{
-// device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE);
-// device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE);
-// device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE);
-// device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE);
-// device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE);
+// device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE);
+// device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE);
+// device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE);
+// device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE);
+// device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE);
device.option_add("terminal", SERIAL_TERMINAL);
device.option_add("null_modem", NULL_MODEM);
-// device.option_add("sun_kbd", SUN_KBD_ADAPTOR);
+// device.option_add("sun_kbd", SUN_KBD_ADAPTOR);
}
void isa8_babyblue2_device::z80_program_map(address_map &map)
@@ -58,10 +58,10 @@ void isa8_babyblue2_device::device_add_mconfig(machine_config &config)
Z80(config, m_z80, 6_MHz_XTAL);
m_z80->set_addrmap(AS_PROGRAM, &isa8_babyblue2_device::z80_program_map);
m_z80->set_addrmap(AS_IO, &isa8_babyblue2_device::z80_io_map);
-
+
RAM(config, m_ram);
m_ram->set_default_size("64k");
-
+
INS8250(config, m_serial1, XTAL(1'843'200));
m_serial1->out_tx_callback().set("rs232_1", FUNC(rs232_port_device::write_txd));
m_serial1->out_dtr_callback().set("rs232_1", FUNC(rs232_port_device::write_dtr));
@@ -85,7 +85,7 @@ void isa8_babyblue2_device::device_add_mconfig(machine_config &config)
m_rs232_2->dsr_handler().set(m_serial2, FUNC(ins8250_uart_device::dsr_w));
m_rs232_2->ri_handler().set(m_serial2, FUNC(ins8250_uart_device::ri_w));
m_rs232_2->cts_handler().set(m_serial2, FUNC(ins8250_uart_device::cts_w));
-
+
PC_LPT(config, m_parallel);
}
@@ -110,7 +110,7 @@ static INPUT_PORTS_START( babyblue2 )
PORT_DIPSETTING( 0x0e, "RAM: E0000 I/O: 31c" )
PORT_DIPSETTING( 0x0f, "RAM: F0000 I/O: 31f" )
PORT_DIPUNKNOWN( 0x70, 0x00 ) PORT_DIPLOCATION( "SW1:3,2,1" )
-
+
// exact setting unknown at this stage
PORT_START("SW2")
PORT_DIPNAME( 0x07, 0x07, "Device Module Ports" ) PORT_DIPLOCATION( "SW2:3,2,1" )
@@ -152,7 +152,7 @@ static INPUT_PORTS_START( babyblue2 )
PORT_DIPNAME(0x10, 0x40, "RAM Bank III" ) PORT_DIPLOCATION( "SW3:3" )
PORT_DIPSETTING( 0x00, "Enabled" )
PORT_DIPSETTING( 0x10, "Disabled" )
-
+
PORT_START("H2")
PORT_CONFNAME( 0x01, 0x01, "LPT port config" )
PORT_CONFSETTING( 0x00, "LPT1" )
@@ -216,7 +216,7 @@ void isa8_babyblue2_device::device_reset()
{
// map Z80 LPT port based on jumper setting
m_z80->space(AS_IO).install_readwrite_handler(z80lptloc, z80lptloc+7, read8_delegate(m_parallel, FUNC(pc_lpt_device::read)), write8_delegate(m_parallel, FUNC(pc_lpt_device::write)));
-
+
m_isa->install_device(ioloc, ioloc+1, read8_delegate(*this, FUNC(isa8_babyblue2_device::z80_control_r)), write8_delegate(*this, FUNC(isa8_babyblue2_device::z80_control_w)));
m_isa->install_device(lptloc, lptloc+7, read8_delegate(m_parallel, FUNC(pc_lpt_device::read)), write8_delegate(m_parallel, FUNC(pc_lpt_device::write)));
m_isa->install_device(0x3f8, 0x03ff, read8sm_delegate(m_serial1, FUNC(ins8250_device::ins8250_r)), write8sm_delegate(m_serial1, FUNC(ins8250_device::ins8250_w)));
diff --git a/src/devices/bus/isa/bblue2.h b/src/devices/bus/isa/bblue2.h
index 6f888a7d869..e81f0a0c500 100644
--- a/src/devices/bus/isa/bblue2.h
+++ b/src/devices/bus/isa/bblue2.h
@@ -29,7 +29,7 @@ public:
DECLARE_WRITE8_MEMBER(z80_control_w);
DECLARE_READ8_MEMBER(z80_ram_r) { return m_ram->read(offset); }
DECLARE_WRITE8_MEMBER(z80_ram_w) { m_ram->write(offset,data); }
-
+
DECLARE_WRITE_LINE_MEMBER(port1_irq) { m_isa->irq4_w(state); }
DECLARE_WRITE_LINE_MEMBER(port2_irq) { m_isa->irq3_w(state); }
DECLARE_WRITE_LINE_MEMBER(lpt_irq);
@@ -55,10 +55,10 @@ private:
required_ioport m_dsw3;
required_ioport m_h2;
required_device<ram_device> m_ram;
-
+
void z80_program_map(address_map &map);
void z80_io_map(address_map &map);
-
+
bool m_devices_installed;
};
diff --git a/src/devices/bus/multibus/multibus.h b/src/devices/bus/multibus/multibus.h
index 3f7ee5cbf77..def7895d16d 100644
--- a/src/devices/bus/multibus/multibus.h
+++ b/src/devices/bus/multibus/multibus.h
@@ -5,7 +5,7 @@
multibus.h
Intel Multibus
-
+
P1 Multibus connector:
Power supplies
@@ -58,17 +58,17 @@
81 +5Vdc 82 +5Vdc
83 +5Vdc 84 +5Vdc
85 GND 86 GND
-
+
P2 Multibus connector:
-
+
1-54 reserved for iLBX bus
-
+
Address
55 ADR16/ 56 ADR17/
57 ADR14/ 58 ADR15/
-
+
59-60 reserved for iLBx bus
-
+
*********************************************************************/
#ifndef MAME_BUS_MULTIBUS_MULTIBUS_H
@@ -92,7 +92,7 @@ public:
// Set memory space
void install_mem_rw(address_space& space);
-
+
auto irq0_callback() { return m_irq_cb[0].bind(); }
auto irq1_callback() { return m_irq_cb[1].bind(); }
auto irq2_callback() { return m_irq_cb[2].bind(); }
@@ -102,7 +102,7 @@ public:
auto irq6_callback() { return m_irq_cb[6].bind(); }
auto irq7_callback() { return m_irq_cb[7].bind(); }
auto irqa_callback() { return m_irqa_cb.bind(); }
-
+
DECLARE_WRITE_LINE_MEMBER( irq0_w );
DECLARE_WRITE_LINE_MEMBER( irq1_w );
DECLARE_WRITE_LINE_MEMBER( irq2_w );
@@ -112,10 +112,10 @@ public:
DECLARE_WRITE_LINE_MEMBER( irq6_w );
DECLARE_WRITE_LINE_MEMBER( irq7_w );
DECLARE_WRITE_LINE_MEMBER( irqa_w );
-
+
protected:
virtual void device_start() override;
-
+
devcb_write_line::array<8> m_irq_cb;
devcb_write_line m_irqa_cb;
@@ -129,7 +129,7 @@ public:
// Set CPU memory space
virtual void install_mem_rw(address_space& space) = 0;
-
+
protected:
device_multibus_interface(const machine_config &mconfig , device_t &device);
virtual ~device_multibus_interface();
diff --git a/src/devices/bus/ti99/peb/cc_fdc.cpp b/src/devices/bus/ti99/peb/cc_fdc.cpp
index 7fe38b5b4b7..d26ae2604a9 100644
--- a/src/devices/bus/ti99/peb/cc_fdc.cpp
+++ b/src/devices/bus/ti99/peb/cc_fdc.cpp
@@ -6,13 +6,13 @@
Double Density, Double-sided
Two flavors:
-
+
* Original controller
Named "PEB-DCC"
Single 16K EPROM or two 8K EPROMs (selectable by jumper; only 2x8K emulated)
Two PALs
WD2793
-
+
* Modified controller with redesigned PCB
Named "CorComp FDC Rev A"
Two 8K EPROMs (by Millers Graphics, 3rd party HW/SW contributor)
@@ -21,7 +21,7 @@
Michael Zapf
March 2020
-
+
*******************************************************************************/
#include "emu.h"
@@ -75,21 +75,21 @@ namespace bus { namespace ti99 { namespace peb {
corcomp_fdc_device::corcomp_fdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock):
device_t(mconfig, type, tag, owner, clock),
device_ti99_peribox_card_interface(mconfig, *this),
- m_wdc(*this, WDC_TAG),
- m_decpal(nullptr),
- m_ctrlpal(nullptr),
- m_motormf(*this, MOTORMF_TAG),
- m_tms9901(*this, TMS9901_TAG),
- m_buffer_ram(*this, BUFFER),
- m_dsrrom(nullptr),
- m_cardsel(false),
- m_banksel(false),
- m_selected_drive(0),
- m_address(0),
- m_writing(false)
-{
-}
-
+ m_wdc(*this, WDC_TAG),
+ m_decpal(nullptr),
+ m_ctrlpal(nullptr),
+ m_motormf(*this, MOTORMF_TAG),
+ m_tms9901(*this, TMS9901_TAG),
+ m_buffer_ram(*this, BUFFER),
+ m_dsrrom(nullptr),
+ m_cardsel(false),
+ m_banksel(false),
+ m_selected_drive(0),
+ m_address(0),
+ m_writing(false)
+{
+}
+
SETADDRESS_DBIN_MEMBER( corcomp_fdc_device::setaddress_dbin )
{
// Do not allow setaddress for debugger
@@ -100,7 +100,7 @@ SETADDRESS_DBIN_MEMBER( corcomp_fdc_device::setaddress_dbin )
}
/*
- Provides the current address to the PALs.
+ Provides the current address to the PALs.
*/
uint16_t corcomp_fdc_device::get_address()
{
@@ -108,9 +108,9 @@ uint16_t corcomp_fdc_device::get_address()
}
/*
- Before the 9901 configures the P11 pin as output, it delivers Z output,
- which is pulled down by R10 on the board. We implement this by using a
- variable.
+ Before the 9901 configures the P11 pin as output, it delivers Z output,
+ which is pulled down by R10 on the board. We implement this by using a
+ variable.
*/
bool corcomp_fdc_device::upper_bank()
{
@@ -128,8 +128,8 @@ bool corcomp_fdc_device::write_access()
}
/*
- The Debugging access must not have any side effect on the controller.
- We only allow access to the EPROM and RAM.
+ The Debugging access must not have any side effect on the controller.
+ We only allow access to the EPROM and RAM.
*/
void corcomp_fdc_device::debug_read(offs_t offset, uint8_t* value)
{
@@ -137,20 +137,20 @@ void corcomp_fdc_device::debug_read(offs_t offset, uint8_t* value)
m_address = offset;
*value = 0x00;
-
+
if (m_ctrlpal->selectram())
{
// SRAM selected
*value = m_buffer_ram->pointer()[m_address & 0x7f] & 0xf0; // only the first 4 bits
}
-
+
if (m_ctrlpal->selectdsr())
{
// EPROM selected
uint16_t base = m_banksel? 0x2000 : 0;
uint8_t* rom = &m_dsrrom[base | (m_address & 0x1fff)];
*value = *rom;
- }
+ }
m_address = saveaddress;
}
@@ -161,7 +161,7 @@ void corcomp_fdc_device::debug_write(offs_t offset, uint8_t data)
if (m_ctrlpal->selectram())
{
m_buffer_ram->pointer()[m_address & 0x7f] = data & 0xf0; // only the first 4 bits
- }
+ }
m_address = saveaddress;
}
@@ -175,7 +175,7 @@ void corcomp_fdc_device::operate_ready_line()
}
/*
- Callbacks from the WDC chip
+ Callbacks from the WDC chip
*/
WRITE_LINE_MEMBER( corcomp_fdc_device::fdc_irq_w )
{
@@ -201,36 +201,36 @@ READ8Z_MEMBER(corcomp_fdc_device::readz)
debug_read(offset, value);
return;
}
-
+
if (m_ctrlpal->selectram())
{
// SRAM selected
*value = m_buffer_ram->pointer()[m_address & 0x7f] & 0xf0; // only the first 4 bits
LOGMASKED(LOG_RAM, "Read RAM: %04x -> %02x\n", m_address & 0xffff, *value);
}
-
+
if (m_ctrlpal->selectwdc())
{
// WDC selected
*value = m_wdc->read((m_address >> 1)&0x03);
LOGMASKED(LOG_CONTR, "Read FDC: %04x -> %02x\n", m_address & 0xffff, *value);
}
-
+
if (m_ctrlpal->selectdsr())
{
// EPROM selected
uint16_t base = m_banksel? 0x2000 : 0;
uint8_t* rom = &m_dsrrom[base | (m_address & 0x1fff)];
*value = *rom;
-
+
if (WORD_ALIGNED(m_address))
{
- uint16_t val = (*rom << 8) | (*(rom+1));
+ uint16_t val = (*rom << 8) | (*(rom+1));
LOGMASKED(LOG_EPROM, "Read DSR: %04x (page %d)-> %04x\n", m_address & 0xffff, base>>13, val);
}
}
}
-
+
void corcomp_fdc_device::write(offs_t offset, uint8_t data)
{
if (machine().side_effects_disabled())
@@ -244,7 +244,7 @@ void corcomp_fdc_device::write(offs_t offset, uint8_t data)
LOGMASKED(LOG_RAM, "Write RAM: %04x <- %02x\n", m_address & 0xffff, data&0xf0);
m_buffer_ram->pointer()[m_address & 0x7f] = data & 0xf0; // only the first 4 bits
}
-
+
if (m_ctrlpal->selectwdc())
{
// WDC selected
@@ -297,9 +297,9 @@ READ8_MEMBER( corcomp_fdc_device::tms9901_input )
// INT6: Switch 2
// INT7: Switch 4
// INT8: Switch 6
- // INT9: -
+ // INT9: -
// P9: MotorMF
- // P12: WDCu11.28 (HLD)
+ // P12: WDCu11.28 (HLD)
const uint8_t dipswitch[] = { 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
switch (offset)
@@ -396,7 +396,7 @@ WRITE_LINE_MEMBER( corcomp_fdc_device::motor_w )
}
/*
- Push the P11 state to the variable.
+ Push the P11 state to the variable.
*/
WRITE_LINE_MEMBER( corcomp_fdc_device::select_bank )
{
@@ -487,10 +487,10 @@ void corcomp_fdc_device::common_config(machine_config& config)
m_wdc->intrq_wr_callback().set(FUNC(corcomp_fdc_device::fdc_irq_w));
m_wdc->drq_wr_callback().set(FUNC(corcomp_fdc_device::fdc_drq_w));
m_wdc->hld_wr_callback().set(FUNC(corcomp_fdc_device::fdc_hld_w));
-
+
TMS9901(config, m_tms9901, 0);
m_tms9901->read_cb().set(FUNC(corcomp_fdc_device::tms9901_input));
-
+
// Outputs
// P0: LED (DSR?), PALu2.1
// P1: MFu6.clk (Motor)
@@ -505,7 +505,7 @@ void corcomp_fdc_device::common_config(machine_config& config)
// P11: ROMBNK
// P13: -
// P14: -
- // P15: -
+ // P15: -
m_tms9901->p_out_cb(0).set(FUNC(corcomp_fdc_device::select_card));
m_tms9901->p_out_cb(1).set(MOTORMF_TAG, FUNC(ttl74123_device::b_w));
m_tms9901->p_out_cb(4).set(FUNC(corcomp_fdc_device::select_dsk));
@@ -515,7 +515,7 @@ void corcomp_fdc_device::common_config(machine_config& config)
m_tms9901->p_out_cb(8).set(FUNC(corcomp_fdc_device::select_dsk));
m_tms9901->p_out_cb(10).set(WDC_TAG, FUNC(wd_fdc_device_base::dden_w));
m_tms9901->p_out_cb(11).set(FUNC(corcomp_fdc_device::select_bank));
-
+
// Motor monoflop
TTL74123(config, m_motormf, 0);
m_motormf->set_connection_type(TTL74123_NOT_GROUNDED_NO_DIODE);
@@ -532,7 +532,7 @@ void corcomp_fdc_device::common_config(machine_config& config)
FLOPPY_CONNECTOR(config, "3", ccfdc_floppies, nullptr, corcomp_fdc_device::floppy_formats).enable_sound(true);
// SRAM 2114 1Kx4
- RAM(config, BUFFER).set_default_size("1k").set_default_value(0);
+ RAM(config, BUFFER).set_default_size("1k").set_default_value(0);
}
// ============================================================================
@@ -541,20 +541,20 @@ void corcomp_fdc_device::common_config(machine_config& config)
corcomp_dcc_device::corcomp_dcc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock):
corcomp_fdc_device(mconfig, TI99_CCDCC, tag, owner, clock)
-{
+{
}
void corcomp_dcc_device::device_add_mconfig(machine_config& config)
{
WD2793(config, m_wdc, 4_MHz_XTAL / 4);
common_config(config);
-
+
// For the 2793, attach the HLT line
m_tms9901->p_out_cb(3).set(WDC_TAG, FUNC(wd_fdc_device_base::hlt_w));
-
+
// PAL circuits are connected in device_config_complete
CCDCC_PALU2(config, CCDCC_PALU2_TAG, 0);
- CCDCC_PALU1(config, CCDCC_PALU1_TAG, 0);
+ CCDCC_PALU1(config, CCDCC_PALU1_TAG, 0);
}
ROM_START( cc_dcc )
@@ -581,8 +581,8 @@ const tiny_rom_entry *corcomp_dcc_device::device_rom_region() const
}
// ========================================================================
-// PAL circuits on the CorComp board
-// ========================================================================
+// PAL circuits on the CorComp board
+// ========================================================================
ccfdc_dec_pal_device::ccfdc_dec_pal_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock),
@@ -607,7 +607,7 @@ void ccfdc_dec_pal_device::device_config_complete()
}
/*
- Indicates 9901 addressing.
+ Indicates 9901 addressing.
*/
READ_LINE_MEMBER( ccfdc_dec_pal_device::address9901 )
{
@@ -615,7 +615,7 @@ READ_LINE_MEMBER( ccfdc_dec_pal_device::address9901 )
}
/*
- Indicates SRAM addressing.
+ Indicates SRAM addressing.
*/
READ_LINE_MEMBER( ccfdc_dec_pal_device::addressram )
{
@@ -624,7 +624,7 @@ READ_LINE_MEMBER( ccfdc_dec_pal_device::addressram )
}
/*
- Indicates WDC addressing.
+ Indicates WDC addressing.
*/
READ_LINE_MEMBER( ccfdc_dec_pal_device::addresswdc )
{
@@ -633,7 +633,7 @@ READ_LINE_MEMBER( ccfdc_dec_pal_device::addresswdc )
}
/*
- Indicates DSR addressing.
+ Indicates DSR addressing.
*/
READ_LINE_MEMBER( ccfdc_dec_pal_device::address4 )
{
@@ -642,7 +642,7 @@ READ_LINE_MEMBER( ccfdc_dec_pal_device::address4 )
}
/*
- Indicates SRAM selection.
+ Indicates SRAM selection.
*/
READ_LINE_MEMBER( ccfdc_sel_pal_device::selectram )
{
@@ -651,7 +651,7 @@ READ_LINE_MEMBER( ccfdc_sel_pal_device::selectram )
}
/*
- Indicates WDC selection.
+ Indicates WDC selection.
*/
READ_LINE_MEMBER( ccfdc_sel_pal_device::selectwdc )
{
@@ -659,18 +659,18 @@ READ_LINE_MEMBER( ccfdc_sel_pal_device::selectwdc )
}
/*
- Indicates EPROM selection.
+ Indicates EPROM selection.
*/
READ_LINE_MEMBER( ccfdc_sel_pal_device::selectdsr )
{
return (m_decpal->address4()
&& !m_decpal->addresswdc()
- && !(m_decpal->addressram() && (m_board->upper_bank())))
+ && !(m_decpal->addressram() && (m_board->upper_bank())))
? ASSERT_LINE : CLEAR_LINE;
}
// ========================================================================
-// PAL circuits on the original CorComp board
+// PAL circuits on the original CorComp board
// PAL u2 is the address decoder, delivering its results to the
// selector PAL u1.
// ========================================================================
@@ -686,7 +686,7 @@ ccdcc_palu1_device::ccdcc_palu1_device(const machine_config &mconfig, const char
}
/*
- Wait state logic
+ Wait state logic
*/
READ_LINE_MEMBER( ccdcc_palu1_device::ready_out )
{
@@ -697,8 +697,8 @@ READ_LINE_MEMBER( ccdcc_palu1_device::ready_out )
bool noterm = m_wdc->intrq_r()==CLEAR_LINE; // There is no interrupt yet
bool motor = (m_motormf->q_r()==1); // The disk is spinning
- line_state ready = (wdc && lastdig && trap && waitbyte && noterm && motor)? CLEAR_LINE : ASSERT_LINE; // then clear READY and thus trigger wait states
-
+ line_state ready = (wdc && lastdig && trap && waitbyte && noterm && motor)? CLEAR_LINE : ASSERT_LINE; // then clear READY and thus trigger wait states
+
LOGMASKED(LOG_READY, "READY = %d (%d,%d,%d,%d,%d,%d)\n", ready, wdc, lastdig, trap, waitbyte, noterm, motor);
return ready;
}
@@ -715,25 +715,25 @@ void ccdcc_palu1_device::device_config_complete()
corcomp_fdca_device::corcomp_fdca_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock):
corcomp_fdc_device(mconfig, TI99_CCFDC, tag, owner, clock)
-{
+{
}
void corcomp_fdca_device::device_add_mconfig(machine_config& config)
{
WD1773(config, m_wdc, 8_MHz_XTAL);
common_config(config);
-
+
// PAL circuits are connected in device_config_complete
CCFDC_PALU12(config, CCFDC_PALU12_TAG, 0);
- CCFDC_PALU6(config, CCFDC_PALU6_TAG, 0);
+ CCFDC_PALU6(config, CCFDC_PALU6_TAG, 0);
}
/*
- READY trap circuitry on the revised board (U10)
+ READY trap circuitry on the revised board (U10)
*/
bool corcomp_fdca_device::ready_trap_active()
{
- return m_tms9901->read_bit(tms9901_device::P2)
+ return m_tms9901->read_bit(tms9901_device::P2)
&& ((m_address & 6)==6)
&& (m_motormf->q_r()==1);
}
@@ -757,7 +757,7 @@ const tiny_rom_entry *corcomp_fdca_device::device_rom_region() const
}
// ========================================================================
-// PAL circuits on the revised CorComp board
+// PAL circuits on the revised CorComp board
// PAL u12 is the address decoder, delivering its results to the
// selector PAL u6.
// ========================================================================
@@ -768,8 +768,8 @@ ccfdc_palu12_device::ccfdc_palu12_device(const machine_config &mconfig, const ch
}
/*
- Indicates 9901 addressing. In this PAL version, the A9 address line is
- also used.
+ Indicates 9901 addressing. In this PAL version, the A9 address line is
+ also used.
*/
READ_LINE_MEMBER( ccfdc_palu12_device::address9901 )
{
@@ -782,20 +782,20 @@ ccfdc_palu6_device::ccfdc_palu6_device(const machine_config &mconfig, const char
}
/*
- Indicates WDC selection. Also checks whether A12 and /WE match.
- That is, when writing (/WE=0), A12 must be 1 (addresses 5ff8..e),
- otherwise (/WE=1), A12 must be 0 (addresses 5ff0..6)
+ Indicates WDC selection. Also checks whether A12 and /WE match.
+ That is, when writing (/WE=0), A12 must be 1 (addresses 5ff8..e),
+ otherwise (/WE=1), A12 must be 0 (addresses 5ff0..6)
*/
READ_LINE_MEMBER( ccfdc_palu6_device::selectwdc )
{
- return (m_decpal->addresswdc()
+ return (m_decpal->addresswdc()
&& ((m_board->get_address()&1)==0)
&& (((m_board->get_address()&8)!=0)==(m_board->write_access())))? ASSERT_LINE : CLEAR_LINE;
}
/*
- Indicates EPROM selection. The Rev A selector PAL leads back some of
- its outputs for this calculation.
+ Indicates EPROM selection. The Rev A selector PAL leads back some of
+ its outputs for this calculation.
*/
READ_LINE_MEMBER( ccfdc_palu6_device::selectdsr )
{
@@ -803,8 +803,8 @@ READ_LINE_MEMBER( ccfdc_palu6_device::selectdsr )
}
/*
- Wait state logic. The Rev A selector relies on an AND circuit on the
- board which evaluates whether the trap is active.
+ Wait state logic. The Rev A selector relies on an AND circuit on the
+ board which evaluates whether the trap is active.
*/
READ_LINE_MEMBER( ccfdc_palu6_device::ready_out )
@@ -815,8 +815,8 @@ READ_LINE_MEMBER( ccfdc_palu6_device::ready_out )
bool waitbyte = m_wdc->drq_r()==CLEAR_LINE; // We are waiting for a byte
bool noterm = m_wdc->intrq_r()==CLEAR_LINE; // There is no interrupt yet
- line_state ready = (wdc && even && trap && waitbyte && noterm)? CLEAR_LINE : ASSERT_LINE; // then clear READY and thus trigger wait states
-
+ line_state ready = (wdc && even && trap && waitbyte && noterm)? CLEAR_LINE : ASSERT_LINE; // then clear READY and thus trigger wait states
+
LOGMASKED(LOG_READY, "READY = %d (%d,%d,%d,%d,%d)\n", ready, wdc, even, trap, waitbyte, noterm);
return ready;
}
diff --git a/src/devices/bus/ti99/peb/cc_fdc.h b/src/devices/bus/ti99/peb/cc_fdc.h
index ac356c8c0c7..116604e8857 100644
--- a/src/devices/bus/ti99/peb/cc_fdc.h
+++ b/src/devices/bus/ti99/peb/cc_fdc.h
@@ -34,9 +34,9 @@ class corcomp_fdc_device : public device_t, public device_ti99_peribox_card_inte
friend class ccfdc_dec_pal_device;
friend class ccfdc_sel_pal_device;
friend class ccdcc_palu1_device;
- friend class ccfdc_palu6_device;
+ friend class ccfdc_palu6_device;
friend class ccfdc_palu12_device;
-
+
public:
DECLARE_READ8Z_MEMBER(readz) override;
void write(offs_t offset, uint8_t data) override;
@@ -50,12 +50,12 @@ public:
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
DECLARE_WRITE_LINE_MEMBER( fdc_hld_w );
DECLARE_READ8_MEMBER( tms9901_input );
- DECLARE_WRITE_LINE_MEMBER( select_dsk );
+ DECLARE_WRITE_LINE_MEMBER( select_dsk );
DECLARE_WRITE_LINE_MEMBER( side_select );
DECLARE_WRITE_LINE_MEMBER( motor_w );
DECLARE_WRITE_LINE_MEMBER( select_card );
DECLARE_WRITE_LINE_MEMBER( select_bank );
-
+
protected:
corcomp_fdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -76,16 +76,16 @@ protected:
// PALs
ccfdc_dec_pal_device* m_decpal;
ccfdc_sel_pal_device* m_ctrlpal;
-
+
// Lines that are polled by the PAL chips
bool card_selected();
bool upper_bank();
bool write_access();
bool ready_trap_active();
-
+
// Deliver the current state of the address bus
uint16_t get_address();
-
+
// Wait state logic
void operate_ready_line();
@@ -94,10 +94,10 @@ protected:
// Motor monoflop
required_device<ttl74123_device> m_motormf;
-
+
// Interface chip
- required_device<tms9901_device> m_tms9901;
-
+ required_device<tms9901_device> m_tms9901;
+
// Debugger accessors
void debug_read(offs_t offset, uint8_t* value);
void debug_write(offs_t offset, uint8_t data);
@@ -107,17 +107,17 @@ protected:
// DSR ROM
uint8_t* m_dsrrom;
-
+
// State of the bank select line. Pulled down initially.
bool m_cardsel;
bool m_banksel;
// Selected drive
- int m_selected_drive;
-
+ int m_selected_drive;
+
// Recent address
int m_address;
-
+
// Write access
bool m_writing;
};
@@ -145,15 +145,15 @@ public:
DECLARE_READ_LINE_MEMBER(address4);
DECLARE_READ_LINE_MEMBER(addressram);
virtual DECLARE_READ_LINE_MEMBER(address9901);
-
+
protected:
ccfdc_dec_pal_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
void device_start() override { };
- void device_config_complete() override;
+ void device_config_complete() override;
corcomp_fdc_device* m_board;
- required_device<tms9901_device> m_tms9901;
+ required_device<tms9901_device> m_tms9901;
};
// =========== Selector PAL circuit ================
@@ -175,8 +175,8 @@ protected:
corcomp_fdc_device* m_board;
ccfdc_dec_pal_device* m_decpal;
required_device<ttl74123_device> m_motormf;
- required_device<tms9901_device> m_tms9901;
- required_device<wd_fdc_device_base> m_wdc;
+ required_device<tms9901_device> m_tms9901;
+ required_device<wd_fdc_device_base> m_wdc;
};
// =========== Specific decoder PAL circuit of the CCDCC ================
@@ -194,7 +194,7 @@ class ccdcc_palu1_device : public ccfdc_sel_pal_device
public:
ccdcc_palu1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ_LINE_MEMBER(ready_out) override;
-
+
private:
void device_config_complete() override;
};
@@ -206,7 +206,7 @@ private:
class corcomp_fdca_device : public corcomp_fdc_device
{
friend class ccfdc_palu6_device;
-
+
public:
corcomp_fdca_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
private:
diff --git a/src/devices/bus/ti99/peb/forti.cpp b/src/devices/bus/ti99/peb/forti.cpp
index b4a3836bc0d..d91cc2b2149 100644
--- a/src/devices/bus/ti99/peb/forti.cpp
+++ b/src/devices/bus/ti99/peb/forti.cpp
@@ -2,27 +2,27 @@
// copyright-holders:Michael Zapf
/*******************************************************************************
FORTi Sound card
-
+
4 x TMS9919 sound generators
4 sound outputs; may be coupled to two stereo outputs
-
+
Mapping:
-
+
1000 01xx xxxD CBA0
-
+
8402: Sound chip 1 (A)
8404: Sound chip 2 (B)
8408: Sound chip 3 (C)
8410: Sound chip 4 (D)
-
+
Sound chips may be addressed in parallel:
8406: Sound chips 1+2
841a: Sound chips 1+3+4
- All sound READY lines are combined by a wired-AND as the common
+ All sound READY lines are combined by a wired-AND as the common
READY line to the CPU.
-
- Michael Zapf
+
+ Michael Zapf
March 2020
*******************************************************************************/
@@ -44,19 +44,19 @@
DEFINE_DEVICE_TYPE_NS(TI99_FORTI, bus::ti99::peb, forti_device, "ti99_forti", "FORTi Sound Card")
namespace bus { namespace ti99 { namespace peb {
-
+
forti_device::forti_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock):
device_t(mconfig, TI99_FORTI, tag, owner, clock),
device_ti99_peribox_card_interface(mconfig, *this),
m_generator1(*this, FORTI_GEN1_TAG),
m_generator2(*this, FORTI_GEN2_TAG),
m_generator3(*this, FORTI_GEN3_TAG),
- m_generator4(*this, FORTI_GEN4_TAG)
+ m_generator4(*this, FORTI_GEN4_TAG)
{
}
/*
- No read access. The FORTi card does not support any reading.
+ No read access. The FORTi card does not support any reading.
*/
READ8Z_MEMBER(forti_device::readz)
{
@@ -64,20 +64,20 @@ READ8Z_MEMBER(forti_device::readz)
}
/*
- READY callbacks from the sound chips.
+ READY callbacks from the sound chips.
*/
WRITE_LINE_MEMBER( forti_device::ready_sound )
{
- LOGMASKED(LOG_READY, "READY (%d, %d, %d, %d)\n", m_generator1->ready_r(),
+ LOGMASKED(LOG_READY, "READY (%d, %d, %d, %d)\n", m_generator1->ready_r(),
m_generator2->ready_r(), m_generator3->ready_r(), m_generator4->ready_r());
-
+
line_state ready = (m_generator1->ready_r() && m_generator2->ready_r()
&& m_generator3->ready_r() && m_generator4->ready_r())? ASSERT_LINE : CLEAR_LINE;
-
+
m_slot->set_ready(ready);
}
-void forti_device::write(offs_t offset, uint8_t data)
+void forti_device::write(offs_t offset, uint8_t data)
{
// Decode for 8400-87ff
if ((offset & 0xfc01) == 0x8400)
@@ -101,10 +101,10 @@ void forti_device::device_add_mconfig(machine_config& config)
{
// 1 and 3 are mixed to left channel
// 2 and 4 are moxed to right channel
-
+
SPEAKER(config, "forti_left").front_left();
SPEAKER(config, "forti_right").front_right();
-
+
SN94624(config, m_generator1, XTAL(3'579'545)/8);
m_generator1->ready_cb().set(FUNC(forti_device::ready_sound));
m_generator1->add_route(ALL_OUTPUTS, "forti_left", 0.75);
@@ -130,4 +130,4 @@ void forti_device::device_reset()
{
}
-} } } // end namespace bus::ti99::peb \ No newline at end of file
+} } } // end namespace bus::ti99::peb
diff --git a/src/devices/bus/ti99/peb/forti.h b/src/devices/bus/ti99/peb/forti.h
index f5ede4b0a71..46c812a7c00 100644
--- a/src/devices/bus/ti99/peb/forti.h
+++ b/src/devices/bus/ti99/peb/forti.h
@@ -2,11 +2,11 @@
// copyright-holders:Michael Zapf
/*******************************************************************************
FORTi Sound card
-
+
4 x TMS9919 sound generators
4 sound outputs; may be coupled to two stereo outputs
-
- Michael Zapf
+
+ Michael Zapf
March 2020
*******************************************************************************/
diff --git a/src/devices/cpu/avr8/avr8.cpp b/src/devices/cpu/avr8/avr8.cpp
index 024fead2789..eefc6fdf230 100644
--- a/src/devices/cpu/avr8/avr8.cpp
+++ b/src/devices/cpu/avr8/avr8.cpp
@@ -62,39 +62,39 @@
#include "avr8dasm.h"
#include "debugger.h"
-#define LOG_UNKNOWN (1 << 1)
-#define LOG_BOOT (1 << 2)
-#define LOG_TIMER0 (1 << 3)
-#define LOG_TIMER1 (1 << 4)
-#define LOG_TIMER2 (1 << 5)
-#define LOG_TIMER3 (1 << 6)
-#define LOG_TIMER4 (1 << 7)
-#define LOG_TIMER5 (1 << 8)
-#define LOG_TIMER0_TICK (1 << 9)
-#define LOG_TIMER1_TICK (1 << 10)
-#define LOG_TIMER2_TICK (1 << 11)
-#define LOG_TIMER3_TICK (1 << 12)
-#define LOG_TIMER4_TICK (1 << 13)
-#define LOG_TIMER5_TICK (1 << 14)
-#define LOG_EEPROM (1 << 15)
-#define LOG_GPIO (1 << 16)
-#define LOG_WDOG (1 << 17)
-#define LOG_CLOCK (1 << 18)
-#define LOG_POWER (1 << 19)
-#define LOG_OSC (1 << 20)
-#define LOG_PINCHG (1 << 21)
-#define LOG_EXTMEM (1 << 22)
-#define LOG_ADC (1 << 23)
-#define LOG_DIGINPUT (1 << 24)
-#define LOG_ASYNC (1 << 25)
-#define LOG_TWI (1 << 26)
-#define LOG_UART (1 << 27)
-#define LOG_TIMERS (LOG_TIMER0 | LOG_TIMER1 | LOG_TIMER2 | LOG_TIMER3 | LOG_TIMER4 | LOG_TIMER5)
-#define LOG_TIMER_TICKS (LOG_TIMER0_TICK | LOG_TIMER1_TICK | LOG_TIMER2_TICK | LOG_TIMER3_TICK | LOG_TIMER4_TICK | LOG_TIMER5_TICK)
-#define LOG_ALL (LOG_UNKNOWN | LOG_BOOT | LOG_TIMERS | LOG_TIMER_TICKS | LOG_EEPROM | LOG_GPIO | LOG_WDOG | LOG_CLOCK | LOG_POWER \
+#define LOG_UNKNOWN (1 << 1)
+#define LOG_BOOT (1 << 2)
+#define LOG_TIMER0 (1 << 3)
+#define LOG_TIMER1 (1 << 4)
+#define LOG_TIMER2 (1 << 5)
+#define LOG_TIMER3 (1 << 6)
+#define LOG_TIMER4 (1 << 7)
+#define LOG_TIMER5 (1 << 8)
+#define LOG_TIMER0_TICK (1 << 9)
+#define LOG_TIMER1_TICK (1 << 10)
+#define LOG_TIMER2_TICK (1 << 11)
+#define LOG_TIMER3_TICK (1 << 12)
+#define LOG_TIMER4_TICK (1 << 13)
+#define LOG_TIMER5_TICK (1 << 14)
+#define LOG_EEPROM (1 << 15)
+#define LOG_GPIO (1 << 16)
+#define LOG_WDOG (1 << 17)
+#define LOG_CLOCK (1 << 18)
+#define LOG_POWER (1 << 19)
+#define LOG_OSC (1 << 20)
+#define LOG_PINCHG (1 << 21)
+#define LOG_EXTMEM (1 << 22)
+#define LOG_ADC (1 << 23)
+#define LOG_DIGINPUT (1 << 24)
+#define LOG_ASYNC (1 << 25)
+#define LOG_TWI (1 << 26)
+#define LOG_UART (1 << 27)
+#define LOG_TIMERS (LOG_TIMER0 | LOG_TIMER1 | LOG_TIMER2 | LOG_TIMER3 | LOG_TIMER4 | LOG_TIMER5)
+#define LOG_TIMER_TICKS (LOG_TIMER0_TICK | LOG_TIMER1_TICK | LOG_TIMER2_TICK | LOG_TIMER3_TICK | LOG_TIMER4_TICK | LOG_TIMER5_TICK)
+#define LOG_ALL (LOG_UNKNOWN | LOG_BOOT | LOG_TIMERS | LOG_TIMER_TICKS | LOG_EEPROM | LOG_GPIO | LOG_WDOG | LOG_CLOCK | LOG_POWER \
LOG_OSC | LOG_PINCHG | LOG_EXTMEM | LOG_ADC | LOG_DIGINPUT | LOG_ASYNC | LOG_TWI | LOG_UART)
-#define VERBOSE (0)
+#define VERBOSE (0)
#include "logmacro.h"
//**************************************************************************
@@ -197,9 +197,9 @@ enum
static const char avr8_reg_name[4] = { 'A', 'B', 'C', 'D' };
-#define SREG_R(b) ((m_r[AVR8_REGIDX_SREG] & (1 << (b))) >> (b))
-#define SREG_W(b,v) m_r[AVR8_REGIDX_SREG] = (m_r[AVR8_REGIDX_SREG] & ~(1 << (b))) | ((v) << (b))
-#define SREG m_r[AVR8_REGIDX_SREG]
+#define SREG_R(b) ((m_r[AVR8_REGIDX_SREG] & (1 << (b))) >> (b))
+#define SREG_W(b,v) m_r[AVR8_REGIDX_SREG] = (m_r[AVR8_REGIDX_SREG] & ~(1 << (b))) | ((v) << (b))
+#define SREG m_r[AVR8_REGIDX_SREG]
#define NOT(x) (1 - (x))
// Opcode-Parsing Defines
@@ -1744,7 +1744,7 @@ void avr8_device::timer4_tick()
// uint8_t compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
// (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
// uint16_t ocr4[2] = { static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR4AH] << 8) | m_r[AVR8_REGIDX_OCR4AL]),
- // static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL]) };
+ // static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL]) };
// TODO uint8_t ocf4[2] = { (1 << AVR8_TIFR4_OCF4A_SHIFT), (1 << AVR8_TIFR4_OCF4B_SHIFT) };
// TODO uint8_t int4[2] = { AVR8_INTIDX_OCF4A, AVR8_INTIDX_OCF4B };
int32_t increment = m_timer_increment[4];
@@ -1934,7 +1934,7 @@ void avr8_device::timer5_tick()
case WGM5_PWM_8_PC:
case WGM5_PWM_9_PC:
case WGM5_PWM_10_PC:
-// case WGM5_CTC_OCR:
+// case WGM5_CTC_OCR:
case WGM5_FAST_PWM_8:
case WGM5_FAST_PWM_9:
case WGM5_FAST_PWM_10:
@@ -2874,18 +2874,18 @@ READ8_MEMBER(avr8_device::regs_r)
case AVR8_REGIDX_GPIOR0:
case AVR8_REGIDX_GPIOR1:
case AVR8_REGIDX_GPIOR2:
-// case AVR8_REGIDX_UCSR0B: // TODO: needed for Replicator 1
- case AVR8_REGIDX_SPDR: // TODO: needed for Replicator 1
- case AVR8_REGIDX_SPSR: // TODO: needed for Replicator 1
-// case AVR8_REGIDX_ADCSRA: // TODO: needed for Replicator 1
-// case AVR8_REGIDX_ADCSRB: // TODO: needed for Replicator 1
+// case AVR8_REGIDX_UCSR0B: // TODO: needed for Replicator 1
+ case AVR8_REGIDX_SPDR: // TODO: needed for Replicator 1
+ case AVR8_REGIDX_SPSR: // TODO: needed for Replicator 1
+// case AVR8_REGIDX_ADCSRA: // TODO: needed for Replicator 1
+// case AVR8_REGIDX_ADCSRB: // TODO: needed for Replicator 1
case AVR8_REGIDX_SPL:
case AVR8_REGIDX_SPH:
case AVR8_REGIDX_SREG:
case AVR8_REGIDX_TIMSK0:
case AVR8_REGIDX_TIMSK1:
case AVR8_REGIDX_TIMSK2:
-// case AVR8_REGIDX_TIMSK3: // TODO: needed for Replicator 1
+// case AVR8_REGIDX_TIMSK3: // TODO: needed for Replicator 1
case AVR8_REGIDX_TIMSK4:
case AVR8_REGIDX_TIMSK5:
return m_r[offset];
diff --git a/src/devices/cpu/avr8/avr8ops.hxx b/src/devices/cpu/avr8/avr8ops.hxx
index 4c465230d21..6ad36baa35b 100644
--- a/src/devices/cpu/avr8/avr8ops.hxx
+++ b/src/devices/cpu/avr8/avr8ops.hxx
@@ -4,7 +4,7 @@
Atmel 8-bit AVR simulator
- Opcode implementations
+ Opcode implementations
***************************************************************************/
diff --git a/src/devices/cpu/gigatron/gigatron.cpp b/src/devices/cpu/gigatron/gigatron.cpp
index dc4f38cc3fe..6c25f4abd52 100644
--- a/src/devices/cpu/gigatron/gigatron.cpp
+++ b/src/devices/cpu/gigatron/gigatron.cpp
@@ -119,7 +119,7 @@ void gigatron_cpu_device::init()
save_item(NAME(m_ppc));
save_item(NAME(m_inReg));
save_item(NAME(m_pc));
-
+
m_outx_cb.resolve_safe();
}
diff --git a/src/devices/cpu/gigatron/gigatron.h b/src/devices/cpu/gigatron/gigatron.h
index e11f48d226a..6cc1173d23c 100644
--- a/src/devices/cpu/gigatron/gigatron.h
+++ b/src/devices/cpu/gigatron/gigatron.h
@@ -26,7 +26,7 @@ public:
// construction/destruction
gigatron_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
auto outx_cb() { return m_outx_cb.bind(); }
-
+
protected:
// device-level overrides
virtual void device_start() override;
@@ -77,7 +77,7 @@ private:
int m_icount;
void gigatron_illegal();
-
+
devcb_write8 m_outx_cb;
};
diff --git a/src/devices/cpu/ks0164/ks0164.cpp b/src/devices/cpu/ks0164/ks0164.cpp
index d3de46b9267..f4122eeab5d 100644
--- a/src/devices/cpu/ks0164/ks0164.cpp
+++ b/src/devices/cpu/ks0164/ks0164.cpp
@@ -138,8 +138,8 @@ u16 ks0164_cpu_device::snz(u16 r)
if(r & 0x8000)
f |= F_N;
m_r[R_PSW] = (m_r[R_PSW] & ~F_MASK) | f;
- return r;
-}
+ return r;
+}
void ks0164_cpu_device::do_alu(u16 opcode, u16 v2)
{
@@ -384,7 +384,7 @@ void ks0164_cpu_device::execute_run()
case 0: {
// Push all registers
// 1100 .... .... .001
-
+
m_program->write_word(m_r[R_SP] - 2, m_r[0]);
m_program->write_word(m_r[R_SP] - 4, m_r[1]);
m_program->write_word(m_r[R_SP] - 6, m_r[2]);
@@ -475,7 +475,7 @@ void ks0164_cpu_device::execute_run()
case 0: {
// Push all registers
// 1100 .... .... .011
-
+
m_r[0] = m_program->read_word(m_r[R_SP] + 6);
m_r[1] = m_program->read_word(m_r[R_SP] + 4);
m_r[2] = m_program->read_word(m_r[R_SP] + 2);
@@ -741,7 +741,7 @@ void ks0164_cpu_device::execute_run()
default:
unk(opcode);
break;
- }
+ }
m_r[R_ZERO] = 0;
}
diff --git a/src/devices/cpu/ks0164/ks0164d.cpp b/src/devices/cpu/ks0164/ks0164d.cpp
index dfdb4e79ce7..a87c7bb89b9 100644
--- a/src/devices/cpu/ks0164/ks0164d.cpp
+++ b/src/devices/cpu/ks0164/ks0164d.cpp
@@ -217,7 +217,7 @@ const ks0164_disassembler::instruction ks0164_disassembler::instructions[] {
{ 0xf004, 0xf8ff, [](P) -> u32 { util::stream_format(stream, "dbra %s, %04x", regs[(opcode >> 8) & 7], opcodes.r16(pc+2)); return 4; } },
{ 0xf00d, 0xf8ff, [](P) -> u32 { util::stream_format(stream, "cmpbeq %s, %04x, %04x", regs[(opcode >> 8) & 7], opcodes.r16(pc+2), opcodes.r16(pc+4)); return 6; } },
-
+
{ 0x0000, 0x0000, [](P) -> u32 { util::stream_format(stream, "?%04x", opcode); return 2; } },
};
diff --git a/src/devices/cpu/tlcs90/tlcs90d.cpp b/src/devices/cpu/tlcs90/tlcs90d.cpp
index e56bb02d59a..bb0a1b9931c 100644
--- a/src/devices/cpu/tlcs90/tlcs90d.cpp
+++ b/src/devices/cpu/tlcs90/tlcs90d.cpp
@@ -65,7 +65,7 @@ tmp90844_disassembler::tmp90844_disassembler()
}
const char *const tmp90c051_disassembler::ir_names[0x4c] = {
- "P2", "P2CR", "P3", "P3CR",
+ "P2", "P2CR", "P3", "P3CR",
"P3FR", "P4", "P5", "P45CR", "P45FR", "P6", "P6CR", "P6FR",
"TREG0", "TREG1", "TREG2", "TREG3", "T01MOD", "T23MOD", "TFFCR", "TRDC",
"TRUN", "IRF0", "IRF1", "IRF2", "INTE0", "INTE1", "INTE2", "DMAE",
diff --git a/src/devices/cpu/xavix2/xavix2.h b/src/devices/cpu/xavix2/xavix2.h
index 099b7e4a27e..de4d62e38bc 100644
--- a/src/devices/cpu/xavix2/xavix2.h
+++ b/src/devices/cpu/xavix2/xavix2.h
@@ -108,8 +108,8 @@ protected:
if(r & 0x80000000)
f |= F_N;
m_hr[4] = (m_hr[4] & ~F_MASK) | f;
- return r;
- }
+ return r;
+ }
inline u32 do_lsl(u32 v1, u32 shift) {
if(!shift) {
diff --git a/src/devices/machine/pxa255.cpp b/src/devices/machine/pxa255.cpp
index eb3e377a098..6788c10a3ce 100644
--- a/src/devices/machine/pxa255.cpp
+++ b/src/devices/machine/pxa255.cpp
@@ -15,17 +15,17 @@
#include "screen.h"
#include "speaker.h"
-#define LOG_UNKNOWN (1 << 1)
-#define LOG_I2S (1 << 2)
-#define LOG_DMA (1 << 3)
-#define LOG_OSTIMER (1 << 4)
-#define LOG_INTC (1 << 5)
-#define LOG_GPIO (1 << 6)
-#define LOG_LCD_DMA (1 << 7)
-#define LOG_LCD (1 << 8)
-#define LOG_ALL (LOG_UNKNOWN | LOG_I2S | LOG_DMA | LOG_OSTIMER | LOG_INTC | LOG_GPIO | LOG_LCD_DMA | LOG_LCD)
-
-#define VERBOSE (0)
+#define LOG_UNKNOWN (1 << 1)
+#define LOG_I2S (1 << 2)
+#define LOG_DMA (1 << 3)
+#define LOG_OSTIMER (1 << 4)
+#define LOG_INTC (1 << 5)
+#define LOG_GPIO (1 << 6)
+#define LOG_LCD_DMA (1 << 7)
+#define LOG_LCD (1 << 8)
+#define LOG_ALL (LOG_UNKNOWN | LOG_I2S | LOG_DMA | LOG_OSTIMER | LOG_INTC | LOG_GPIO | LOG_LCD_DMA | LOG_LCD)
+
+#define VERBOSE (0)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(PXA255_PERIPHERALS, pxa255_periphs_device, "pxa255_periphs", "Intel XScale PXA255 Peripherals")
diff --git a/src/devices/machine/scn_pci.cpp b/src/devices/machine/scn_pci.cpp
index 2c77f3ac9fd..2f34f1a9be5 100644
--- a/src/devices/machine/scn_pci.cpp
+++ b/src/devices/machine/scn_pci.cpp
@@ -1212,18 +1212,18 @@ void scn_pci_device::write_mode(u8 data)
if ((data & 0x03) != 0)
{
LOGMASKED(LOG_INIT, "Asynchronous %dX mode: %d data bits, %s parity, %s stop bit%s\n",
- BIT(data, 1) ? (BIT(data, 0) ? 64 : 16) : 1,
- ((data & 0x0c) >> 2) + 5,
- BIT(data, 4) ? (BIT(data, 5) ? "even" : "odd") : "no",
- s_stop_bit_desc[(data & 0xc0) >> 6], (data & 0xc0) != 0x40 ? "s" : "");
+ BIT(data, 1) ? (BIT(data, 0) ? 64 : 16) : 1,
+ ((data & 0x0c) >> 2) + 5,
+ BIT(data, 4) ? (BIT(data, 5) ? "even" : "odd") : "no",
+ s_stop_bit_desc[(data & 0xc0) >> 6], (data & 0xc0) != 0x40 ? "s" : "");
}
else
{
LOGMASKED(LOG_INIT, "Synchronous 1X mode: %s%s SYN, %d data bits, %s parity\n",
- BIT(data, 6) ? "transparent " : "",
- BIT(data, 7) ? "single" : "double",
- ((data & 0x0c) >> 2) + 5,
- BIT(data, 4) ? (BIT(data, 5) ? "even" : "odd") : "no");
+ BIT(data, 6) ? "transparent " : "",
+ BIT(data, 7) ? "single" : "double",
+ ((data & 0x0c) >> 2) + 5,
+ BIT(data, 4) ? (BIT(data, 5) ? "even" : "odd") : "no");
if (m_is_aci)
logerror("%s: Invalid synchronous mode configured\n", machine().describe_context());
}
@@ -1258,9 +1258,9 @@ void scn_pci_device::write_mode(u8 data)
else if (BIT(data, 4))
{
LOGMASKED(LOG_INIT, "%sRxC (%.1f baud with %s output)\n",
- BIT(data, 5) ? "Internal TxC/" : "External TxC, internal ",
- baud_rate,
- BIT(data, 7) ? "BKDET" : BIT(data, 6) ? "16X" : "1X");
+ BIT(data, 5) ? "Internal TxC/" : "External TxC, internal ",
+ baud_rate,
+ BIT(data, 7) ? "BKDET" : BIT(data, 6) ? "16X" : "1X");
// BKDET output
if (BIT(data, 7))
@@ -1269,8 +1269,8 @@ void scn_pci_device::write_mode(u8 data)
else if (BIT(data, 5))
{
LOGMASKED(LOG_INIT, "Internal TxC (%.1f baud with %s output), external RxC\n",
- baud_rate,
- BIT(data, 6) ? "16X" : "1X");
+ baud_rate,
+ BIT(data, 6) ? "16X" : "1X");
}
else
LOGMASKED(LOG_INIT, "External TxC, external RxC (may be indepedent)\n");
diff --git a/src/devices/machine/sunplus_gcm394_video.cpp b/src/devices/machine/sunplus_gcm394_video.cpp
index 34eb17c3d32..ebba1fd8557 100644
--- a/src/devices/machine/sunplus_gcm394_video.cpp
+++ b/src/devices/machine/sunplus_gcm394_video.cpp
@@ -4,7 +4,7 @@
SunPlus GCM394-series SoC peripheral emulation (Video)
- This is very similar to spg2xx but with additional features, layers and modes
+ This is very similar to spg2xx but with additional features, layers and modes
**********************************************************************/
@@ -219,7 +219,7 @@ void gcm394_base_video_device::device_start()
decodegfx(":maincpu");
m_space_read_cb.resolve_safe(0);
-
+
m_screenpos_timer = timer_alloc(TIMER_SCREENPOS);
m_screenpos_timer->adjust(attotime::never);
@@ -365,7 +365,7 @@ void gcm394_base_video_device::draw(const rectangle &cliprect, uint32_t line, ui
{
words_per_tile = 8; // seems to be correct for sprites regardless of size / bpp on smartfp
}
-
+
int x_max;
if (m_707f & 0x0010)
{
diff --git a/src/devices/machine/sunplus_gcm394_video.h b/src/devices/machine/sunplus_gcm394_video.h
index e88cf402c82..a17923a2917 100644
--- a/src/devices/machine/sunplus_gcm394_video.h
+++ b/src/devices/machine/sunplus_gcm394_video.h
@@ -81,7 +81,7 @@ public:
DECLARE_READ16_MEMBER(video_703a_palettebank_r);
DECLARE_WRITE16_MEMBER(video_703a_palettebank_w);
-
+
void update_raster_split_position();
DECLARE_WRITE16_MEMBER(split_irq_xpos_w);
DECLARE_WRITE16_MEMBER(split_irq_ypos_w);
@@ -125,7 +125,7 @@ public:
DECLARE_READ16_MEMBER(video_7051_r);
DECLARE_READ16_MEMBER(video_70e0_r);
-
+
auto write_video_irq_callback() { return m_video_irq_cb.bind(); };
virtual void device_add_mconfig(machine_config& config) override;
diff --git a/src/devices/sound/ks0164.cpp b/src/devices/sound/ks0164.cpp
index 6746fba18d2..928234f8697 100644
--- a/src/devices/sound/ks0164.cpp
+++ b/src/devices/sound/ks0164.cpp
@@ -98,7 +98,7 @@ void ks0164_device::device_timer(emu_timer &timer, device_timer_id id, int param
void ks0164_device::mpuin_set(bool control, u8 data)
{
- // logerror("mpu push %s %02x\n", control ? "ctrl" : "data", data);
+ // logerror("mpu push %s %02x\n", control ? "ctrl" : "data", data);
m_mpu_in = data;
if(control)
m_mpu_status |= MPUS_RX_CTRL;
@@ -122,7 +122,7 @@ void ks0164_device::mpu401_ctrl_w(u8 data)
u8 ks0164_device::mpu401_data_r()
{
- // logerror("mpu pop %02x\n", m_mpu_out);
+ // logerror("mpu pop %02x\n", m_mpu_out);
return m_mpu_out;
}
@@ -139,7 +139,7 @@ u8 ks0164_device::mpu401_status_r()
std::string cc = machine().describe_context();
if(pc != cc || pr != res) {
- // logerror("status read %02x (%s)\n", res, cc);
+ // logerror("status read %02x (%s)\n", res, cc);
pc = cc;
pr = res;
}
@@ -148,7 +148,7 @@ u8 ks0164_device::mpu401_status_r()
u8 ks0164_device::mpu401_istatus_r()
{
- // logerror("mpu istatus read %02x (%04x)\n", m_mpu_status, m_cpu->pc());
+ // logerror("mpu istatus read %02x (%04x)\n", m_mpu_status, m_cpu->pc());
return m_mpu_status;
}
@@ -156,14 +156,14 @@ void ks0164_device::mpu401_istatus_w(u8 data)
{
m_mpu_status = (m_mpu_status & ~(MPUS_RX_INT|MPUS_TX_INT)) | (data & (MPUS_RX_INT|MPUS_TX_INT));
m_cpu->set_input_line(11, (m_mpu_status & (MPUS_RX_INT|MPUS_RX_FULL)) == (MPUS_RX_INT|MPUS_RX_FULL) ? ASSERT_LINE : CLEAR_LINE);
- // logerror("mpu status write %02x (%04x)\n", m_mpu_status, m_cpu->pc());
+ // logerror("mpu status write %02x (%04x)\n", m_mpu_status, m_cpu->pc());
}
u8 ks0164_device::mpu401_r()
{
m_mpu_status &= ~MPUS_RX_FULL;
m_cpu->set_input_line(11, CLEAR_LINE);
- // logerror("mpu_r %02x (%04x)\n", m_mpu_in, m_cpu->pc());
+ // logerror("mpu_r %02x (%04x)\n", m_mpu_in, m_cpu->pc());
return m_mpu_in;
}
@@ -171,7 +171,7 @@ void ks0164_device::mpu401_w(u8 data)
{
m_mpu_out = data;
m_mpu_status |= MPUS_TX_FULL;
- // logerror("mpu_w %02x (%04x)\n", m_mpu_out, m_cpu->pc());
+ // logerror("mpu_w %02x (%04x)\n", m_mpu_out, m_cpu->pc());
}
u16 ks0164_device::vec_r(offs_t offset, u16 mem_mask)
@@ -254,7 +254,7 @@ void ks0164_device::irqen_76_w(u8 data)
m_cpu->set_input_line(14, CLEAR_LINE);
}
- // logerror("irqen_76 = %02x (%04x)\n", m_irqen_76, m_cpu->pc());
+ // logerror("irqen_76 = %02x (%04x)\n", m_irqen_76, m_cpu->pc());
}
u8 ks0164_device::irqen_77_r()
diff --git a/src/devices/sound/ks0164.h b/src/devices/sound/ks0164.h
index 2edb82d590f..a89d30b96d0 100644
--- a/src/devices/sound/ks0164.h
+++ b/src/devices/sound/ks0164.h
@@ -40,7 +40,7 @@ private:
optional_memory_region m_mem_region;
required_device<ks0164_cpu_device> m_cpu;
address_space_config m_mem_config;
- sound_stream *m_stream;
+ sound_stream *m_stream;
emu_timer *m_timer;
memory_access_cache<1, 0, ENDIANNESS_BIG> *m_mem_cache;
@@ -50,7 +50,7 @@ private:
u16 m_sregs[0x20][0x20];
u8 m_mpu_in;
- u8 m_mpu_out;
+ u8 m_mpu_out;
u8 m_mpu_status;
u8 m_unk60;
@@ -80,7 +80,7 @@ private:
u8 voice_select_r();
void voice_select_w(u8 data);
u16 voice_r(offs_t offset);
- void voice_w(offs_t offset, u16 data, u16 mem_mask);
+ void voice_w(offs_t offset, u16 data, u16 mem_mask);
void mpuin_set(bool control, u8 data);
u8 mpu401_r();
diff --git a/src/devices/video/crt9212.cpp b/src/devices/video/crt9212.cpp
index 836680dffee..5bbcd8aaac7 100644
--- a/src/devices/video/crt9212.cpp
+++ b/src/devices/video/crt9212.cpp
@@ -92,7 +92,7 @@ void crt9212_device::device_start()
// clrcnt_w - clear counter
//-------------------------------------------------
-void crt9212_device::clrcnt_w(int state)
+void crt9212_device::clrcnt_w(int state)
{
if (m_clrcnt && !state)
{
@@ -107,7 +107,7 @@ void crt9212_device::clrcnt_w(int state)
// rclk_w - read clock
//-------------------------------------------------
-void crt9212_device::rclk_w(int state)
+void crt9212_device::rclk_w(int state)
{
if (!m_rclk && state)
{
@@ -160,7 +160,7 @@ void crt9212_device::rclk_w(int state)
// wclk_w - write clock
//-------------------------------------------------
-void crt9212_device::wclk_w(int state)
+void crt9212_device::wclk_w(int state)
{
if (!m_wclk && state)
{
diff --git a/src/devices/video/ppu2c0x.cpp b/src/devices/video/ppu2c0x.cpp
index 39023752c8f..bad650cf0a6 100644
--- a/src/devices/video/ppu2c0x.cpp
+++ b/src/devices/video/ppu2c0x.cpp
@@ -32,7 +32,7 @@
/***************************************************************************
- CONSTANTS
+ CONSTANTS
***************************************************************************/
/* default monochromatic colortable */
@@ -428,14 +428,14 @@ void ppu2c0x_device::init_palette(bool indirect)
switch (color_emphasis)
{
- case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
- case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
- case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
- case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
- case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
- case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
- case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
- case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
+ case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
+ case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
+ case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
+ case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
+ case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
+ case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
+ case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
+ case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
}
*/
diff --git a/src/devices/video/ppu2c0x.h b/src/devices/video/ppu2c0x.h
index b95652791f5..fcd53435809 100644
--- a/src/devices/video/ppu2c0x.h
+++ b/src/devices/video/ppu2c0x.h
@@ -197,7 +197,7 @@ protected:
int m_global_refresh_mask;
int m_line_write_increment_large;
bool m_paletteram_in_ppuspace; // sh6578 doesn't have the palette in PPU space, so various side-effects don't apply
- std::vector<uint8_t> m_palette_ram; /* shouldn't be in main memory! */
+ std::vector<uint8_t> m_palette_ram; /* shouldn't be in main memory! */
std::unique_ptr<bitmap_rgb32> m_bitmap; /* target bitmap */
int m_regs[PPU_MAX_REG]; /* registers */
int m_tile_page; /* current tile page */
diff --git a/src/devices/video/ppu2c0x_sh6578.cpp b/src/devices/video/ppu2c0x_sh6578.cpp
index c075f684147..0514d7dcc8d 100644
--- a/src/devices/video/ppu2c0x_sh6578.cpp
+++ b/src/devices/video/ppu2c0x_sh6578.cpp
@@ -145,7 +145,7 @@ void ppu_sh6578_device::draw_tile(uint8_t* line_priority, int color_byte, int co
pen = this->pen(palval);
}
- *dest = pen;
+ *dest = pen;
// priority marking
if (!trans)
diff --git a/src/devices/video/ppu2c0x_sh6578.h b/src/devices/video/ppu2c0x_sh6578.h
index 99cbe7f41a2..9671bf00dfb 100644
--- a/src/devices/video/ppu2c0x_sh6578.h
+++ b/src/devices/video/ppu2c0x_sh6578.h
@@ -23,7 +23,7 @@ public:
protected:
ppu_sh6578_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
-
+
void ppu_internal_map(address_map& map);
private: