diff options
author | Ville Linde <villedevs@gmail.com> | 2016-06-06 23:36:12 +0300 |
---|---|---|
committer | Ville Linde <villedevs@gmail.com> | 2016-06-06 23:39:06 +0300 |
commit | 728e18f768df7d530322ae8706c687ae349a566e (patch) | |
tree | 13dfefceab66f513edcb98ac6ebe562f5710d43a /src/devices | |
parent | 758aaa496aa546a372fd3f21612395a2dd65826e (diff) |
runtime enable for sharcdrc (nw)
Diffstat (limited to 'src/devices')
-rw-r--r-- | src/devices/cpu/sharc/sharc.cpp | 94 | ||||
-rw-r--r-- | src/devices/cpu/sharc/sharc.h | 4 |
2 files changed, 55 insertions, 43 deletions
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index 67290164b0c..4123da67594 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -11,7 +11,6 @@ #include "sharcfe.h" -#define ENABLE_DRC 0 #define DISABLE_FAST_REGISTERS 1 @@ -76,6 +75,7 @@ adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *ta , m_cache(CACHE_SIZE + sizeof(sharc_internal_state)) , m_drcuml(nullptr) , m_drcfe(nullptr) + , m_enable_drc(false) { } @@ -86,6 +86,11 @@ offs_t adsp21062_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 return CPU_DISASSEMBLE_NAME(sharc)(this, buffer, pc, oprom, opram, options); } +void adsp21062_device::enable_recompiler() +{ + m_enable_drc = true; +} + void adsp21062_device::CHANGE_PC(UINT32 newpc) { @@ -892,45 +897,48 @@ void adsp21062_device::check_interrupts() void adsp21062_device::execute_run() { -#if ENABLE_DRC - if (m_core->irq_pending != 0) + if (m_enable_drc) { - m_core->idle = 0; - } - execute_run_drc(); - return; -#else - if (m_core->idle && m_core->irq_pending == 0) - { - m_core->icount = 0; - debugger_instruction_hook(this, m_core->daddr); + if (m_core->irq_pending != 0) + { + m_core->idle = 0; + } + execute_run_drc(); + return; } - if (m_core->irq_pending != 0) + else { - check_interrupts(); - m_core->idle = 0; - } + if (m_core->idle && m_core->irq_pending == 0) + { + m_core->icount = 0; + debugger_instruction_hook(this, m_core->daddr); + } + if (m_core->irq_pending != 0) + { + check_interrupts(); + m_core->idle = 0; + } - while (m_core->icount > 0 && !m_core->idle) - { - m_core->pc = m_core->daddr; - m_core->daddr = m_core->faddr; - m_core->faddr = m_core->nfaddr; - m_core->nfaddr++; + while (m_core->icount > 0 && !m_core->idle) + { + m_core->pc = m_core->daddr; + m_core->daddr = m_core->faddr; + m_core->faddr = m_core->nfaddr; + m_core->nfaddr++; - m_core->astat_old_old_old = m_core->astat_old_old; - m_core->astat_old_old = m_core->astat_old; - m_core->astat_old = m_core->astat; + m_core->astat_old_old_old = m_core->astat_old_old; + m_core->astat_old_old = m_core->astat_old; + m_core->astat_old = m_core->astat; - debugger_instruction_hook(this, m_core->pc); + debugger_instruction_hook(this, m_core->pc); - m_core->opcode = ROPCODE(m_core->pc); + m_core->opcode = ROPCODE(m_core->pc); - // handle looping - if (m_core->pc == m_core->laddr.addr) - { - switch (m_core->laddr.loop_type) + // handle looping + if (m_core->pc == m_core->laddr.addr) { + switch (m_core->laddr.loop_type) + { case 0: // arithmetic condition-based { int condition = m_core->laddr.code; @@ -980,27 +988,27 @@ void adsp21062_device::execute_run() CHANGE_PC(TOP_PC()); } } + } } - } - (this->*m_sharc_op[(m_core->opcode >> 39) & 0x1ff])(); + (this->*m_sharc_op[(m_core->opcode >> 39) & 0x1ff])(); - // System register latency effect - if (m_core->systemreg_latency_cycles > 0) - { - --m_core->systemreg_latency_cycles; - if (m_core->systemreg_latency_cycles <= 0) + // System register latency effect + if (m_core->systemreg_latency_cycles > 0) { - systemreg_write_latency_effect(); + --m_core->systemreg_latency_cycles; + if (m_core->systemreg_latency_cycles <= 0) + { + systemreg_write_latency_effect(); + } } - } - --m_core->icount; - }; -#endif + --m_core->icount; + }; + } } bool adsp21062_device::memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value) diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 20eeb003ebe..f8718997d4d 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -168,6 +168,8 @@ public: void sharc_cfunc_unimplemented_shiftimm(); void sharc_cfunc_write_snoop(); + void enable_recompiler(); + enum ASTAT_FLAGS { // ASTAT flags @@ -452,6 +454,8 @@ private: UINT16 m_internal_ram[2 * 0x10000]; // 2x 128KB + bool m_enable_drc; + inline void CHANGE_PC(UINT32 newpc); inline void CHANGE_PC_DELAYED(UINT32 newpc); void sharc_iop_delayed_w(UINT32 reg, UINT32 data, int cycles); |