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author yz70s <yz70s@users.noreply.github.com>2018-08-21 23:51:34 +0200
committer yz70s <yz70s@users.noreply.github.com>2018-08-21 23:52:29 +0200
commit1c9ae9b1f4fa15b9a78f904b2cdd50493c0fec6e (patch)
tree1ce7fd11157770307af99eb4c7954b4421d03a07 /src/devices
parentbaedd0ca8145195ca8af66ab06adff2348f2c301 (diff)
i386.cpp: Add Athlon XP processor (nw)
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/cpu/i386/i386.cpp72
-rw-r--r--src/devices/cpu/i386/i386.h15
2 files changed, 86 insertions, 1 deletions
diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp
index 2d39e450c4c..ad38f79a04a 100644
--- a/src/devices/cpu/i386/i386.cpp
+++ b/src/devices/cpu/i386/i386.cpp
@@ -4513,6 +4513,78 @@ void pentium3_device::device_reset()
}
/*****************************************************************************/
+/* AMD Athlon XP
+ Model: Athlon XP 2400+
+ Part number: AXDA2400DKV3C
+ Stepping code: AIUCP
+ Date code: 0240MPMW
+*/
+
+void athlonxp_device::device_start()
+{
+ i386_common_init();
+ register_state_i386_x87_xmm();
+
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE);
+ m_cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM].get(); // TODO: generate own cycle tables
+ m_cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM].get(); // TODO: generate own cycle tables
+}
+
+void athlonxp_device::device_reset()
+{
+ zero_state();
+
+ m_sreg[CS].selector = 0xf000;
+ m_sreg[CS].base = 0xffff0000;
+ m_sreg[CS].limit = 0xffff;
+ m_sreg[CS].flags = 0x0093;
+
+ m_sreg[DS].base = m_sreg[ES].base = m_sreg[FS].base = m_sreg[GS].base = m_sreg[SS].base = 0x00000000;
+ m_sreg[DS].limit = m_sreg[ES].limit = m_sreg[FS].limit = m_sreg[GS].limit = m_sreg[SS].limit = 0xffff;
+ m_sreg[DS].flags = m_sreg[ES].flags = m_sreg[FS].flags = m_sreg[GS].flags = m_sreg[SS].flags = 0x0093;
+
+ m_idtr.base = 0;
+ m_idtr.limit = 0x3ff;
+
+ m_a20_mask = ~0;
+
+ m_cr[0] = 0x60000010;
+ m_eflags = 0x00200000;
+ m_eflags_mask = 0x00277fd7; /* TODO: is this correct? */
+ m_eip = 0xfff0;
+ m_mxcsr = 0x1f80;
+ m_smm = false;
+ m_smi_latched = false;
+ m_smbase = 0x30000;
+ m_nmi_masked = false;
+ m_nmi_latched = false;
+
+ x87_reset();
+
+ // [11:8] Family
+ // [ 7:4] Model
+ // [ 3:0] Stepping ID
+ // Family 6, Model 8, Stepping 1
+ REG32(EAX) = 0;
+ REG32(EDX) = (6 << 8) | (8 << 4) | (1);
+
+ m_cpuid_id0 = ('h' << 24) | ('t' << 16) | ('u' << 8) | 'A'; // Auth
+ m_cpuid_id1 = ('i' << 24) | ('t' << 16) | ('n' << 8) | 'e'; // enti
+ m_cpuid_id2 = ('D' << 24) | ('M' << 16) | ('A' << 8) | 'c'; // cAMD
+
+ m_cpuid_max_input_value_eax = 0x01;
+ m_cpu_version = REG32(EDX);
+
+ // [ 0:0] FPU on chip
+ // [ 4:4] Time Stamp Counter
+ // [ D:D] PTE Global Bit
+ m_feature_flags = 0x2383fbff; // TODO: enable relevant flags here
+
+ CHANGE_PC(m_eip);
+}
+
+/*****************************************************************************/
/* Intel Pentium 4 */
void pentium4_device::device_start()
diff --git a/src/devices/cpu/i386/i386.h b/src/devices/cpu/i386/i386.h
index 92a5e4ddbc5..e83910adbe7 100644
--- a/src/devices/cpu/i386/i386.h
+++ b/src/devices/cpu/i386/i386.h
@@ -223,7 +223,7 @@ protected:
address_space *m_io;
uint32_t m_a20_mask;
- int m_cpuid_max_input_value_eax;
+ int m_cpuid_max_input_value_eax; // Highest CPUID standard function available
uint32_t m_cpuid_id0, m_cpuid_id1, m_cpuid_id2;
uint32_t m_cpu_version;
uint32_t m_feature_flags;
@@ -1543,6 +1543,18 @@ protected:
};
+class athlonxp_device : public pentium_device
+{
+public:
+ // construction/destruction
+ athlonxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual void device_start() override;
+ virtual void device_reset() override;
+};
+
+
class pentium4_device : public pentium_device
{
public:
@@ -1565,6 +1577,7 @@ DECLARE_DEVICE_TYPE(PENTIUM_PRO, pentium_pro_device)
DECLARE_DEVICE_TYPE(PENTIUM_MMX, pentium_mmx_device)
DECLARE_DEVICE_TYPE(PENTIUM2, pentium2_device)
DECLARE_DEVICE_TYPE(PENTIUM3, pentium3_device)
+DECLARE_DEVICE_TYPE(ATHLONXP, athlonxp_device)
DECLARE_DEVICE_TYPE(PENTIUM4, pentium4_device)
#endif // MAME_CPU_I386_I386_H