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authorGravatarGravatar AJR <ajrhacker@users.noreply.github.com>2019-12-02 12:51:29 -0500
committerGravatarGravatar AJR <ajrhacker@users.noreply.github.com>2019-12-02 12:51:29 -0500
commit05d7590928aefb11291e34474037f56f41eb7994 (patch)
treeea916018f87b6bb15a7390e2db7f8aacd77f5800 /src/devices
parentdd51bcb2fab20c5272fcd99c11199ce576eb2ec8 (diff)
dp8344: Add timer interrupt (nw)
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/cpu/bcp/dp8344.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/devices/cpu/bcp/dp8344.cpp b/src/devices/cpu/bcp/dp8344.cpp
index 7572f3dd90f..d890ba603ae 100644
--- a/src/devices/cpu/bcp/dp8344.cpp
+++ b/src/devices/cpu/bcp/dp8344.cpp
@@ -275,7 +275,7 @@ void dp8344_device::device_reset()
// Reset Condition Code Register
m_ccr &= 0x10;
- // Reset Interrupt Control Register
+ // Reset Interrupt Control Register (all interrupts masked out)
m_icr = 0xff;
// Reset Auxiliary Control Register and timer interrupt
@@ -488,9 +488,9 @@ void dp8344_device::set_auxiliary_control(u8 data)
else if (BIT(data, 7) && !BIT(m_acr, 7))
{
unsigned prescale = (BIT(m_dcr, 7) ? 2 : 1) * (BIT(data, 5) ? 2 : 16);
- logerror("%04X: Timer Start (TO Period = %.3f kHz)\n",
+ logerror("%04X: Timer Start (TO Period = %d Hz)\n",
m_ppc,
- clocks_to_attotime(prescale * (m_tr == 0 ? 65536 : m_tr)).as_khz());
+ int(clocks_to_attotime(prescale * (m_tr == 0 ? 65536 : m_tr)).as_hz()));
}
if (BIT(data, 6))
@@ -546,8 +546,8 @@ void dp8344_device::set_device_control(u8 data)
bool dp8344_device::interrupt_active() const
{
- // TODO
- return false;
+ // TODO: non-timer interrupts
+ return !BIT(m_icr, 4) && BIT(m_ccr, 7);
}
@@ -558,8 +558,8 @@ bool dp8344_device::interrupt_active() const
u8 dp8344_device::get_interrupt_vector() const
{
- // TODO
- return 0;
+ // TODO: non-timer interrupts
+ return 0x14;
}