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author Paul-Arnold <98924583+Paul-Arnold@users.noreply.github.com>2022-10-04 20:18:53 +0100
committer GitHub <noreply@github.com>2022-10-04 21:18:53 +0200
commit90371fc002f18363a98a499585441e9e1eb68616 (patch)
tree50ac29afaf478c0a561e15519c1291865f9821fc /src/devices/machine
parent6fd46a6b31e0f2642cdec1848a1d55a1d1339ac6 (diff)
Change cpu32 and M68340 to 16 bit data bus instead of 32 [Paul Arnold]
Diffstat (limited to 'src/devices/machine')
-rw-r--r--src/devices/machine/68340.cpp34
-rw-r--r--src/devices/machine/68340.h12
-rw-r--r--src/devices/machine/68340dma.cpp8
-rw-r--r--src/devices/machine/68340sim.cpp92
-rw-r--r--src/devices/machine/68340tmu.cpp2
5 files changed, 95 insertions, 53 deletions
diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp
index 56a4ff007a6..710e7cadeb0 100644
--- a/src/devices/machine/68340.cpp
+++ b/src/devices/machine/68340.cpp
@@ -127,16 +127,16 @@ uint8_t m68340_cpu_device::int_ack(offs_t offset)
/* 68340 specifics - MOVE */
-uint32_t m68340_cpu_device::m68340_internal_base_r(offs_t offset, uint32_t mem_mask)
+uint16_t m68340_cpu_device::m68340_internal_base_r(offs_t offset, uint16_t mem_mask)
{
if (!machine().side_effects_disabled())
- LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask);
- return m_m68340_base;
+ LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask);
+ return ((!BIT(offset, 0) ? (m_m68340_base >> 16): m_m68340_base)) & 0xffff;
}
-void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask);
+ LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*2,data,mem_mask);
// other conditions?
if (m_dfc==0x7)
@@ -152,9 +152,17 @@ void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uin
m_internal->unmap_readwrite(base + 0x780, base + 0x7bf);
}
+
+ uint32_t data32 = data;
+ uint32_t mem_mask32 = mem_mask;
+ if (!BIT(offset,0))
+ {
+ data32 <<= 16;
+ mem_mask32 <<= 16;
+ }
- COMBINE_DATA(&m_m68340_base);
- LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*4,data,mem_mask);
+ m_m68340_base = (m_m68340_base & ~mem_mask32) | (data32 & mem_mask32);
+ LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*2,data,mem_mask);
// map new modules
if (m_m68340_base & 1)
@@ -168,8 +176,8 @@ void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uin
read8sm_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_r)),
write8sm_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_ports_w)),0xffffffff);
m_internal->install_readwrite_handler(base + 0x040, base + 0x05f,
- read32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_r)),
- write32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_w)));
+ read16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_r)),
+ write16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_sim_cs_w)));
m_internal->install_readwrite_handler(base + 0x600, base + 0x63f,
read16s_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::read)),
write16s_delegate(*m_timer[0], FUNC(mc68340_timer_module_device::write)),0xffffffff);
@@ -180,13 +188,13 @@ void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint32_t data, uin
read8sm_delegate(*m_serial, FUNC(mc68340_serial_module_device::read)),
write8sm_delegate(*m_serial, FUNC(mc68340_serial_module_device::write)),0xffffffff);
m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf,
- read32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_r)),
- write32s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_w)));
+ read16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_r)),
+ write16s_delegate(*this, FUNC(m68340_cpu_device::m68340_internal_dma_w)));
}
}
else
{
- LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*4,data,mem_mask);
+ LOGMASKED(LOG_BASE, "%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*2,data,mem_mask);
}
}
@@ -214,7 +222,7 @@ void m68340_cpu_device::device_add_mconfig(machine_config &config)
//**************************************************************************
m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : fscpu32_device(mconfig, tag, owner, clock, M68340, 32,32, address_map_constructor(FUNC(m68340_cpu_device::m68340_internal_map), this))
+ : fscpu32_device(mconfig, tag, owner, clock, M68340, address_map_constructor(FUNC(m68340_cpu_device::m68340_internal_map), this))
, m_serial(*this, "serial")
, m_timer(*this, "timer%u", 1U)
, m_clock_mode(0)
diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h
index 464c7131b90..ef89972a72c 100644
--- a/src/devices/machine/68340.h
+++ b/src/devices/machine/68340.h
@@ -83,16 +83,16 @@ private:
m_clock_mode |= (m68340_sim::CLOCK_MODCK | m68340_sim::CLOCK_PLL);
}
- uint32_t m68340_internal_base_r(offs_t offset, uint32_t mem_mask = ~0);
- void m68340_internal_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
- uint32_t m68340_internal_dma_r(offs_t offset, uint32_t mem_mask = ~0);
- void m68340_internal_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t m68340_internal_base_r(offs_t offset, uint16_t mem_mask = ~0);
+ void m68340_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t m68340_internal_dma_r(offs_t offset, uint16_t mem_mask = ~0);
+ void m68340_internal_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t m68340_internal_sim_r(offs_t offset, uint16_t mem_mask = ~0);
uint8_t m68340_internal_sim_ports_r(offs_t offset);
- uint32_t m68340_internal_sim_cs_r(offs_t offset, uint32_t mem_mask = ~0);
+ uint16_t m68340_internal_sim_cs_r(offs_t offset, uint16_t mem_mask = ~0);
void m68340_internal_sim_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void m68340_internal_sim_ports_w(offs_t offset, uint8_t data);
- void m68340_internal_sim_cs_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ void m68340_internal_sim_cs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
// Clock/VCO setting TODO: support external clock with PLL and Limp mode
DECLARE_WRITE_LINE_MEMBER( set_modck );
diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp
index 6cff61a9464..1a832ff95c4 100644
--- a/src/devices/machine/68340dma.cpp
+++ b/src/devices/machine/68340dma.cpp
@@ -6,22 +6,22 @@
#include "68340.h"
-uint32_t m68340_cpu_device::m68340_internal_dma_r(offs_t offset, uint32_t mem_mask)
+uint16_t m68340_cpu_device::m68340_internal_dma_r(offs_t offset, uint16_t mem_mask)
{
assert(m_m68340DMA);
//m68340_dma &dma = *m_m68340DMA;
- logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask);
+ logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask);
return 0x00000000;
}
-void m68340_cpu_device::m68340_internal_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+void m68340_cpu_device::m68340_internal_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
assert(m_m68340DMA);
//m68340_dma &dma = *m_m68340DMA;
- logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask);
+ logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", m_ppc, offset*2,data,mem_mask);
}
void m68340_dma::reset()
diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp
index 865a7eafc52..e70bb6bf9b6 100644
--- a/src/devices/machine/68340sim.cpp
+++ b/src/devices/machine/68340sim.cpp
@@ -344,87 +344,119 @@ void m68340_cpu_device::m68340_internal_sim_ports_w(offs_t offset, uint8_t data)
}
}
-uint32_t m68340_cpu_device::m68340_internal_sim_cs_r(offs_t offset, uint32_t mem_mask)
+uint16_t m68340_cpu_device::m68340_internal_sim_cs_r(offs_t offset, uint16_t mem_mask)
{
+ uint32_t data = 0;
LOGR("%s\n", FUNCNAME);
- offset += m68340_sim::REG_AM_CS0>>2;
+ offset += m68340_sim::REG_AM_CS0>>1;
assert(m_m68340SIM);
m68340_sim &sim = *m_m68340SIM;
- switch (offset<<2)
+ switch (offset << 1)
{
- case m68340_sim::REG_AM_CS0: return sim.m_am[0];
- case m68340_sim::REG_BA_CS0: return sim.m_ba[0];
- case m68340_sim::REG_AM_CS1: return sim.m_am[1];
- case m68340_sim::REG_BA_CS1: return sim.m_ba[1];
- case m68340_sim::REG_AM_CS2: return sim.m_am[2];
- case m68340_sim::REG_BA_CS2: return sim.m_ba[2];
- case m68340_sim::REG_AM_CS3: return sim.m_am[3];
- case m68340_sim::REG_BA_CS3: return sim.m_ba[3];
+ case m68340_sim::REG_AM_CS0: data = sim.m_am[0]; break;
+ case m68340_sim::REG_BA_CS0: data = sim.m_ba[0]; break;
+ case m68340_sim::REG_AM_CS1: data = sim.m_am[1]; break;
+ case m68340_sim::REG_BA_CS1: data = sim.m_ba[1]; break;
+ case m68340_sim::REG_AM_CS2: data = sim.m_am[2]; break;
+ case m68340_sim::REG_BA_CS2: data = sim.m_ba[2]; break;
+ case m68340_sim::REG_AM_CS3: data = sim.m_am[3]; break;
+ case m68340_sim::REG_BA_CS3: data = sim.m_ba[3]; break;
default:
- logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask);
+ logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask);
}
- return 0x00000000;
+ return (BIT(offset,0) ? data : (data >> 16)) & 0xffff;
}
-void m68340_cpu_device::m68340_internal_sim_cs_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+void m68340_cpu_device::m68340_internal_sim_cs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("%s\n", FUNCNAME);
- offset += m68340_sim::REG_AM_CS0>>2;
- if (offset & 1)
+ auto combine_data32 = [&](uint32_t *varptr)
{
- LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask);
- LOGCS("- Base: %08x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No");
+ uint32_t data32 = data;
+ uint32_t mem_mask32 = mem_mask;
+
+ if(!BIT(offset,0))
+ {
+ data32 <<= 16;
+ mem_mask32 <<= 16;
+ }
+
+ *varptr = (*varptr & ~mem_mask32) | (data32 & mem_mask32);
+ };
+
+ offset += m68340_sim::REG_AM_CS0>>1;
+
+ if (BIT(offset, 1))
+ {
+ if (BIT(offset, 0))
+ {
+ LOGCS("%08x (LSWORD) Base address CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask);
+ LOGCS("- Base: %04x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No");
+ }
+ else
+ {
+ LOGCS("%08x (MSWORD) Base address CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask);
+ LOGCS("- Base: %04x\n", data);
+ }
}
else
{
- LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask);
- LOGCS("- Mask: %08x FCM:%02x DD:%d PS: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array<char const *, 4>{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]);
+ if (BIT(offset, 0))
+ {
+ LOGCS("%08x Address mask CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask);
+ LOGCS("- FCM:%02x DD:%d PS: %s\n", (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array<char const *, 4>{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]);
+ }
+ else
+ {
+ LOGCS("%08x Address mask CS%d %08x, %04x (%04x) ", m_ppc, (offset - 0x20) / 2, offset * 2, data, mem_mask);
+ LOGCS("- Mask: %04x\n", data & 0xff00);
+ }
}
assert(m_m68340SIM);
m68340_sim &sim = *m_m68340SIM;
- switch (offset << 2)
+ switch ((offset << 1) & ~3)
{
case m68340_sim::REG_AM_CS0:
- COMBINE_DATA(&sim.m_am[0]);
+ combine_data32(&sim.m_am[0]);
break;
case m68340_sim::REG_BA_CS0:
- COMBINE_DATA(&sim.m_ba[0]);
+ combine_data32(&sim.m_ba[0]);
break;
case m68340_sim::REG_AM_CS1:
- COMBINE_DATA(&sim.m_am[1]);
+ combine_data32(&sim.m_am[1]);
break;
case m68340_sim::REG_BA_CS1:
- COMBINE_DATA(&sim.m_ba[1]);
+ combine_data32(&sim.m_ba[1]);
break;
case m68340_sim::REG_AM_CS2:
- COMBINE_DATA(&sim.m_am[2]);
+ combine_data32(&sim.m_am[2]);
break;
case m68340_sim::REG_BA_CS2:
- COMBINE_DATA(&sim.m_ba[2]);
+ combine_data32(&sim.m_ba[2]);
break;
case m68340_sim::REG_AM_CS3:
- COMBINE_DATA(&sim.m_am[3]);
+ combine_data32(&sim.m_am[3]);
break;
case m68340_sim::REG_BA_CS3:
- COMBINE_DATA(&sim.m_ba[3]);
+ combine_data32(&sim.m_ba[3]);
break;
default:
- logerror("%08x m68340_internal_sim_cs_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask);
+ logerror("%08x m68340_internal_sim_cs_w %08x, %08x (%08x)\n", m_ppc, offset*2,data,mem_mask);
break;
}
}
diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp
index 6eddadf6f94..1b358e14f6c 100644
--- a/src/devices/machine/68340tmu.cpp
+++ b/src/devices/machine/68340tmu.cpp
@@ -318,6 +318,8 @@ void mc68340_timer_module_device::device_start()
m_tout_out_cb.resolve_safe();
m_tgate_in_cb.resolve_safe();
m_tin_in_cb.resolve_safe();
+
+ m_ir = 0x000f;
}
void mc68340_timer_module_device::device_reset()